diff options
author | Colin Cross <ccross@android.com> | 2010-11-28 23:14:53 -0500 |
---|---|---|
committer | Colin Cross <ccross@android.com> | 2011-01-27 00:28:06 -0500 |
commit | cc939754db459d9caf3d77eef4f8a58bd8e15077 (patch) | |
tree | d0ce82110197b55289e6973c6012f23a235a1d7a /arch | |
parent | 867996cb4fc51aeccb2148f30356a00352e0f22f (diff) |
ARM: tegra: irq: Rename gic pointers to avoid conflicts
A future patch will export gic_mask_irq and gic_unmask_irq.
Rename the pointers in arch/arm/mach-tegra/irq.c to avoid
a compile error.
Signed-off-by: Colin Cross <ccross@android.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-tegra/irq.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c index de7dfad6f769..17c74d21077c 100644 --- a/arch/arm/mach-tegra/irq.c +++ b/arch/arm/mach-tegra/irq.c | |||
@@ -46,24 +46,24 @@ | |||
46 | #define ICTLR_COP_IER_CLR 0x38 | 46 | #define ICTLR_COP_IER_CLR 0x38 |
47 | #define ICTLR_COP_IEP_CLASS 0x3c | 47 | #define ICTLR_COP_IEP_CLASS 0x3c |
48 | 48 | ||
49 | static void (*gic_mask_irq)(struct irq_data *d); | 49 | static void (*tegra_gic_mask_irq)(struct irq_data *d); |
50 | static void (*gic_unmask_irq)(struct irq_data *d); | 50 | static void (*tegra_gic_unmask_irq)(struct irq_data *d); |
51 | 51 | ||
52 | #define irq_to_ictlr(irq) (((irq)-32) >> 5) | 52 | #define irq_to_ictlr(irq) (((irq) - 32) >> 5) |
53 | static void __iomem *tegra_ictlr_base = IO_ADDRESS(TEGRA_PRIMARY_ICTLR_BASE); | 53 | static void __iomem *tegra_ictlr_base = IO_ADDRESS(TEGRA_PRIMARY_ICTLR_BASE); |
54 | #define ictlr_to_virt(ictlr) (tegra_ictlr_base + (ictlr)*0x100) | 54 | #define ictlr_to_virt(ictlr) (tegra_ictlr_base + (ictlr) * 0x100) |
55 | 55 | ||
56 | static void tegra_mask(struct irq_data *d) | 56 | static void tegra_mask(struct irq_data *d) |
57 | { | 57 | { |
58 | void __iomem *addr = ictlr_to_virt(irq_to_ictlr(d->irq)); | 58 | void __iomem *addr = ictlr_to_virt(irq_to_ictlr(d->irq)); |
59 | gic_mask_irq(d); | 59 | tegra_gic_mask_irq(d); |
60 | writel(1<<(d->irq&31), addr+ICTLR_CPU_IER_CLR); | 60 | writel(1 << (d->irq & 31), addr+ICTLR_CPU_IER_CLR); |
61 | } | 61 | } |
62 | 62 | ||
63 | static void tegra_unmask(struct irq_data *d) | 63 | static void tegra_unmask(struct irq_data *d) |
64 | { | 64 | { |
65 | void __iomem *addr = ictlr_to_virt(irq_to_ictlr(d->irq)); | 65 | void __iomem *addr = ictlr_to_virt(irq_to_ictlr(d->irq)); |
66 | gic_unmask_irq(d); | 66 | tegra_gic_unmask_irq(d); |
67 | writel(1<<(d->irq&31), addr+ICTLR_CPU_IER_SET); | 67 | writel(1<<(d->irq&31), addr+ICTLR_CPU_IER_SET); |
68 | } | 68 | } |
69 | 69 | ||
@@ -98,8 +98,8 @@ void __init tegra_init_irq(void) | |||
98 | IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100)); | 98 | IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100)); |
99 | 99 | ||
100 | gic = get_irq_chip(29); | 100 | gic = get_irq_chip(29); |
101 | gic_unmask_irq = gic->irq_unmask; | 101 | tegra_gic_unmask_irq = gic->irq_unmask; |
102 | gic_mask_irq = gic->irq_mask; | 102 | tegra_gic_mask_irq = gic->irq_mask; |
103 | tegra_irq.irq_ack = gic->irq_ack; | 103 | tegra_irq.irq_ack = gic->irq_ack; |
104 | #ifdef CONFIG_SMP | 104 | #ifdef CONFIG_SMP |
105 | tegra_irq.irq_set_affinity = gic->irq_set_affinity; | 105 | tegra_irq.irq_set_affinity = gic->irq_set_affinity; |