aboutsummaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
authorIngo Molnar <mingo@elte.hu>2008-10-19 13:04:47 -0400
committerIngo Molnar <mingo@elte.hu>2008-10-19 13:04:47 -0400
commit3e10e879a8c334a5927d800a3663a24d562cfa31 (patch)
tree5d18bc7e38c986a044e99aa0d0a4aff4931ec7d0 /arch
parent98d9c66ab07471006fd7910cb16453581c41a3e7 (diff)
parent0cfd81031a26717fe14380d18275f8e217571615 (diff)
Merge branch 'linus' into tracing-v28-for-linus-v3
Conflicts: init/main.c kernel/module.c scripts/bootgraph.pl
Diffstat (limited to 'arch')
-rw-r--r--arch/Kconfig18
-rw-r--r--arch/alpha/Kconfig7
-rw-r--r--arch/alpha/include/asm/a.out.h2
-rw-r--r--arch/alpha/include/asm/elf.h4
-rw-r--r--arch/alpha/include/asm/statfs.h4
-rw-r--r--arch/alpha/kernel/pci_iommu.c17
-rw-r--r--arch/alpha/kernel/smp.c1
-rw-r--r--arch/arm/Kconfig4
-rw-r--r--arch/arm/Makefile3
-rw-r--r--arch/arm/configs/omap3_beagle_defconfig1321
-rw-r--r--arch/arm/configs/omap_ldp_defconfig1044
-rw-r--r--arch/arm/configs/overo_defconfig1885
-rw-r--r--arch/arm/include/asm/elf.h2
-rw-r--r--arch/arm/include/asm/statfs.h34
-rw-r--r--arch/arm/kernel/dma.c17
-rw-r--r--arch/arm/mach-integrator/cpu.c1
-rw-r--r--arch/arm/mach-omap1/board-h3.c4
-rw-r--r--arch/arm/mach-omap1/clock.c10
-rw-r--r--arch/arm/mach-omap1/clock.h6
-rw-r--r--arch/arm/mach-omap1/devices.c2
-rw-r--r--arch/arm/mach-omap1/mcbsp.c45
-rw-r--r--arch/arm/mach-omap1/serial.c12
-rw-r--r--arch/arm/mach-omap2/Kconfig22
-rw-r--r--arch/arm/mach-omap2/Makefile12
-rw-r--r--arch/arm/mach-omap2/board-h4.c11
-rw-r--r--arch/arm/mach-omap2/board-ldp.c86
-rw-r--r--arch/arm/mach-omap2/board-omap3beagle.c244
-rw-r--r--arch/arm/mach-omap2/board-overo.c242
-rw-r--r--arch/arm/mach-omap2/clock.c64
-rw-r--r--arch/arm/mach-omap2/clock.h2
-rw-r--r--arch/arm/mach-omap2/clock24xx.h238
-rw-r--r--arch/arm/mach-omap2/clock34xx.c31
-rw-r--r--arch/arm/mach-omap2/clock34xx.h248
-rw-r--r--arch/arm/mach-omap2/clockdomain.c623
-rw-r--r--arch/arm/mach-omap2/clockdomains.h305
-rw-r--r--arch/arm/mach-omap2/cm-regbits-24xx.h24
-rw-r--r--arch/arm/mach-omap2/cm-regbits-34xx.h42
-rw-r--r--arch/arm/mach-omap2/cm.h2
-rw-r--r--arch/arm/mach-omap2/devices.c225
-rw-r--r--arch/arm/mach-omap2/gpmc.c88
-rw-r--r--arch/arm/mach-omap2/id.c39
-rw-r--r--arch/arm/mach-omap2/io.c152
-rw-r--r--arch/arm/mach-omap2/irq.c81
-rw-r--r--arch/arm/mach-omap2/mcbsp.c151
-rw-r--r--arch/arm/mach-omap2/memory.c14
-rw-r--r--arch/arm/mach-omap2/memory.h7
-rw-r--r--arch/arm/mach-omap2/mux.c245
-rw-r--r--arch/arm/mach-omap2/powerdomain.c1113
-rw-r--r--arch/arm/mach-omap2/powerdomains.h187
-rw-r--r--arch/arm/mach-omap2/powerdomains24xx.h200
-rw-r--r--arch/arm/mach-omap2/powerdomains34xx.h327
-rw-r--r--arch/arm/mach-omap2/prcm-common.h3
-rw-r--r--arch/arm/mach-omap2/prm-regbits-24xx.h12
-rw-r--r--arch/arm/mach-omap2/prm-regbits-34xx.h11
-rw-r--r--arch/arm/mach-omap2/prm.h5
-rw-r--r--arch/arm/mach-omap2/serial.c116
-rw-r--r--arch/arm/mach-omap2/sleep24xx.S (renamed from arch/arm/mach-omap2/sleep.S)32
-rw-r--r--arch/arm/mach-omap2/sram34xx.S179
-rw-r--r--arch/arm/mach-pxa/cm-x270.c2
-rw-r--r--arch/arm/mach-pxa/cpufreq-pxa2xx.c3
-rw-r--r--arch/arm/mach-pxa/cpufreq-pxa3xx.c1
-rw-r--r--arch/arm/mach-pxa/include/mach/camera.h2
-rw-r--r--arch/arm/mach-pxa/viper.c54
-rw-r--r--arch/arm/mach-s3c2410/bast-irq.c2
-rw-r--r--arch/arm/mach-s3c2410/clock.c8
-rw-r--r--arch/arm/mach-s3c2410/dma.c6
-rw-r--r--arch/arm/mach-s3c2410/include/mach/debug-macro.S4
-rw-r--r--arch/arm/mach-s3c2410/include/mach/map.h2
-rw-r--r--arch/arm/mach-s3c2410/include/mach/spi.h1
-rw-r--r--arch/arm/mach-s3c2410/include/mach/uncompress.h2
-rw-r--r--arch/arm/mach-s3c2410/irq.c4
-rw-r--r--arch/arm/mach-s3c2410/mach-amlm5900.c6
-rw-r--r--arch/arm/mach-s3c2410/mach-bast.c8
-rw-r--r--arch/arm/mach-s3c2410/mach-h1940.c10
-rw-r--r--arch/arm/mach-s3c2410/mach-n30.c10
-rw-r--r--arch/arm/mach-s3c2410/mach-otom.c10
-rw-r--r--arch/arm/mach-s3c2410/mach-qt2410.c10
-rw-r--r--arch/arm/mach-s3c2410/mach-smdk2410.c8
-rw-r--r--arch/arm/mach-s3c2410/mach-tct_hammer.c6
-rw-r--r--arch/arm/mach-s3c2410/mach-vr1000.c8
-rw-r--r--arch/arm/mach-s3c2410/pm.c4
-rw-r--r--arch/arm/mach-s3c2410/s3c2410.c10
-rw-r--r--arch/arm/mach-s3c2410/sleep.S2
-rw-r--r--arch/arm/mach-s3c2410/usb-simtec.c2
-rw-r--r--arch/arm/mach-s3c2412/clock.c8
-rw-r--r--arch/arm/mach-s3c2412/dma.c6
-rw-r--r--arch/arm/mach-s3c2412/irq.c6
-rw-r--r--arch/arm/mach-s3c2412/mach-jive.c10
-rw-r--r--arch/arm/mach-s3c2412/mach-smdk2413.c14
-rw-r--r--arch/arm/mach-s3c2412/mach-vstms.c12
-rw-r--r--arch/arm/mach-s3c2412/pm.c6
-rw-r--r--arch/arm/mach-s3c2412/s3c2412.c12
-rw-r--r--arch/arm/mach-s3c2440/clock.c4
-rw-r--r--arch/arm/mach-s3c2440/dma.c6
-rw-r--r--arch/arm/mach-s3c2440/dsc.c4
-rw-r--r--arch/arm/mach-s3c2440/irq.c6
-rw-r--r--arch/arm/mach-s3c2440/mach-anubis.c8
-rw-r--r--arch/arm/mach-s3c2440/mach-at2440evb.c8
-rw-r--r--arch/arm/mach-s3c2440/mach-nexcoder.c12
-rw-r--r--arch/arm/mach-s3c2440/mach-osiris.c8
-rw-r--r--arch/arm/mach-s3c2440/mach-rx3715.c10
-rw-r--r--arch/arm/mach-s3c2440/mach-smdk2440.c14
-rw-r--r--arch/arm/mach-s3c2440/s3c2440.c6
-rw-r--r--arch/arm/mach-s3c2442/clock.c4
-rw-r--r--arch/arm/mach-s3c2442/s3c2442.c4
-rw-r--r--arch/arm/mach-s3c2443/clock.c6
-rw-r--r--arch/arm/mach-s3c2443/dma.c6
-rw-r--r--arch/arm/mach-s3c2443/irq.c6
-rw-r--r--arch/arm/mach-s3c2443/mach-smdk2443.c14
-rw-r--r--arch/arm/mach-s3c2443/s3c2443.c6
-rw-r--r--arch/arm/mach-sa1100/cpu-sa1100.c1
-rw-r--r--arch/arm/mm/Kconfig2
-rw-r--r--arch/arm/plat-omap/Kconfig33
-rw-r--r--arch/arm/plat-omap/Makefile2
-rw-r--r--arch/arm/plat-omap/common.c40
-rw-r--r--arch/arm/plat-omap/devices.c22
-rw-r--r--arch/arm/plat-omap/dma.c8
-rw-r--r--arch/arm/plat-omap/dmtimer.c2
-rw-r--r--arch/arm/plat-omap/gpio.c70
-rw-r--r--arch/arm/plat-omap/include/mach/board-2430sdp.h6
-rw-r--r--arch/arm/plat-omap/include/mach/board-apollon.h6
-rw-r--r--arch/arm/plat-omap/include/mach/board-h4.h5
-rw-r--r--arch/arm/plat-omap/include/mach/board-ldp.h36
-rw-r--r--arch/arm/plat-omap/include/mach/board-omap3beagle.h33
-rw-r--r--arch/arm/plat-omap/include/mach/board-overo.h26
-rw-r--r--arch/arm/plat-omap/include/mach/board.h2
-rw-r--r--arch/arm/plat-omap/include/mach/clock.h3
-rw-r--r--arch/arm/plat-omap/include/mach/clockdomain.h106
-rw-r--r--arch/arm/plat-omap/include/mach/common.h3
-rw-r--r--arch/arm/plat-omap/include/mach/control.h23
-rw-r--r--arch/arm/plat-omap/include/mach/cpu.h5
-rw-r--r--arch/arm/plat-omap/include/mach/debug-macro.S12
-rw-r--r--arch/arm/plat-omap/include/mach/entry-macro.S12
-rw-r--r--arch/arm/plat-omap/include/mach/fpga.h12
-rw-r--r--arch/arm/plat-omap/include/mach/gpio.h4
-rw-r--r--arch/arm/plat-omap/include/mach/gpmc.h12
-rw-r--r--arch/arm/plat-omap/include/mach/hardware.h12
-rw-r--r--arch/arm/plat-omap/include/mach/io.h59
-rw-r--r--arch/arm/plat-omap/include/mach/irqs.h59
-rw-r--r--arch/arm/plat-omap/include/mach/mcbsp.h44
-rw-r--r--arch/arm/plat-omap/include/mach/memory.h2
-rw-r--r--arch/arm/plat-omap/include/mach/mux.h180
-rw-r--r--arch/arm/plat-omap/include/mach/omap1510.h2
-rw-r--r--arch/arm/plat-omap/include/mach/omap16xx.h7
-rw-r--r--arch/arm/plat-omap/include/mach/omap24xx.h2
-rw-r--r--arch/arm/plat-omap/include/mach/omapfb.h3
-rw-r--r--arch/arm/plat-omap/include/mach/pm.h7
-rw-r--r--arch/arm/plat-omap/include/mach/powerdomain.h166
-rw-r--r--arch/arm/plat-omap/include/mach/sdrc.h8
-rw-r--r--arch/arm/plat-omap/include/mach/serial.h18
-rw-r--r--arch/arm/plat-omap/include/mach/sram.h10
-rw-r--r--arch/arm/plat-omap/include/mach/system.h2
-rw-r--r--arch/arm/plat-omap/io.c107
-rw-r--r--arch/arm/plat-omap/mcbsp.c431
-rw-r--r--arch/arm/plat-omap/sram.c53
-rw-r--r--arch/arm/plat-s3c/Makefile3
-rw-r--r--arch/arm/plat-s3c/include/plat/debug-macro.S75
-rw-r--r--arch/arm/plat-s3c/include/plat/map.h40
-rw-r--r--arch/arm/plat-s3c/include/plat/regs-adc.h60
-rw-r--r--arch/arm/plat-s3c/include/plat/regs-serial.h232
-rw-r--r--arch/arm/plat-s3c/include/plat/regs-timer.h115
-rw-r--r--arch/arm/plat-s3c/include/plat/uncompress.h155
-rw-r--r--arch/arm/plat-s3c24xx/clock.c4
-rw-r--r--arch/arm/plat-s3c24xx/common-smdk.c6
-rw-r--r--arch/arm/plat-s3c24xx/cpu.c22
-rw-r--r--arch/arm/plat-s3c24xx/devs.c6
-rw-r--r--arch/arm/plat-s3c24xx/dma.c2
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/clock.h64
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/common-smdk.h15
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/cpu.h54
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/devs.h49
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/dma.h82
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/irq.h109
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/pm.h73
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/s3c2400.h31
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/s3c2410.h31
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/s3c2412.h29
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/s3c2440.h17
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/s3c2442.h17
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/s3c2443.h32
-rw-r--r--arch/arm/plat-s3c24xx/irq.c6
-rw-r--r--arch/arm/plat-s3c24xx/pm-simtec.c2
-rw-r--r--arch/arm/plat-s3c24xx/pm.c4
-rw-r--r--arch/arm/plat-s3c24xx/pwm-clock.c6
-rw-r--r--arch/arm/plat-s3c24xx/pwm.c4
-rw-r--r--arch/arm/plat-s3c24xx/s3c244x-clock.c4
-rw-r--r--arch/arm/plat-s3c24xx/s3c244x-irq.c6
-rw-r--r--arch/arm/plat-s3c24xx/s3c244x.c14
-rw-r--r--arch/arm/plat-s3c24xx/sleep.S2
-rw-r--r--arch/arm/plat-s3c24xx/time.c6
-rw-r--r--arch/avr32/include/asm/a.out.h20
-rw-r--r--arch/avr32/include/asm/elf.h2
-rw-r--r--arch/avr32/mach-at32ap/cpufreq.c1
-rw-r--r--arch/blackfin/Kconfig75
-rw-r--r--arch/blackfin/Kconfig.debug55
-rw-r--r--arch/blackfin/Makefile1
-rw-r--r--arch/blackfin/configs/BF526-EZBRD_defconfig1427
-rw-r--r--arch/blackfin/configs/BF527-EZKIT_defconfig2
-rw-r--r--arch/blackfin/configs/BF533-EZKIT_defconfig4
-rw-r--r--arch/blackfin/configs/BF533-STAMP_defconfig2
-rw-r--r--arch/blackfin/configs/BF537-STAMP_defconfig4
-rw-r--r--arch/blackfin/configs/BF548-EZKIT_defconfig4
-rw-r--r--arch/blackfin/configs/BF561-EZKIT_defconfig4
-rw-r--r--arch/blackfin/configs/CM-BF527_defconfig2
-rw-r--r--arch/blackfin/configs/CM-BF533_defconfig2
-rw-r--r--arch/blackfin/configs/CM-BF537E_defconfig2
-rw-r--r--arch/blackfin/configs/CM-BF537U_defconfig2
-rw-r--r--arch/blackfin/configs/CM-BF548_defconfig4
-rw-r--r--arch/blackfin/configs/CM-BF561_defconfig2
-rw-r--r--arch/blackfin/configs/H8606_defconfig36
-rw-r--r--arch/blackfin/include/asm/a.out.h19
-rw-r--r--arch/blackfin/include/asm/bfin-global.h5
-rw-r--r--arch/blackfin/include/asm/bfrom.h85
-rw-r--r--arch/blackfin/include/asm/cacheflush.h29
-rw-r--r--arch/blackfin/include/asm/cplb.h8
-rw-r--r--arch/blackfin/include/asm/cplbinit.h5
-rw-r--r--arch/blackfin/include/asm/cpumask.h6
-rw-r--r--arch/blackfin/include/asm/dma-mapping.h11
-rw-r--r--arch/blackfin/include/asm/elf.h2
-rw-r--r--arch/blackfin/include/asm/io.h30
-rw-r--r--arch/blackfin/include/asm/kgdb.h21
-rw-r--r--arch/blackfin/include/asm/mmu_context.h79
-rw-r--r--arch/blackfin/include/asm/processor.h6
-rw-r--r--arch/blackfin/include/asm/ptrace.h2
-rw-r--r--arch/blackfin/include/asm/timex.h2
-rw-r--r--arch/blackfin/include/asm/traps.h5
-rw-r--r--arch/blackfin/kernel/asm-offsets.c1
-rw-r--r--arch/blackfin/kernel/bfin_gpio.c9
-rw-r--r--arch/blackfin/kernel/cplb-mpu/cplbinit.c12
-rw-r--r--arch/blackfin/kernel/cplb-mpu/cplbmgr.c19
-rw-r--r--arch/blackfin/kernel/cplb-nompu/cplbinit.c7
-rw-r--r--arch/blackfin/kernel/early_printk.c12
-rw-r--r--arch/blackfin/kernel/kgdb.c711
-rw-r--r--arch/blackfin/kernel/ptrace.c215
-rw-r--r--arch/blackfin/kernel/reboot.c18
-rw-r--r--arch/blackfin/kernel/setup.c97
-rw-r--r--arch/blackfin/kernel/traps.c367
-rw-r--r--arch/blackfin/mach-bf527/boards/Kconfig5
-rw-r--r--arch/blackfin/mach-bf527/boards/Makefile1
-rw-r--r--arch/blackfin/mach-bf527/boards/cm_bf527.c17
-rw-r--r--arch/blackfin/mach-bf527/boards/ezbrd.c734
-rw-r--r--arch/blackfin/mach-bf527/boards/ezkit.c53
-rw-r--r--arch/blackfin/mach-bf527/head.S3
-rw-r--r--arch/blackfin/mach-bf527/include/mach/anomaly.h160
-rw-r--r--arch/blackfin/mach-bf527/include/mach/bf527.h21
-rw-r--r--arch/blackfin/mach-bf527/include/mach/defBF52x_base.h27
-rw-r--r--arch/blackfin/mach-bf527/include/mach/portmux.h4
-rw-r--r--arch/blackfin/mach-bf533/boards/H8606.c34
-rw-r--r--arch/blackfin/mach-bf533/head.S3
-rw-r--r--arch/blackfin/mach-bf533/include/mach/anomaly.h49
-rw-r--r--arch/blackfin/mach-bf533/include/mach/bf533.h12
-rw-r--r--arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h4
-rw-r--r--arch/blackfin/mach-bf537/boards/stamp.c98
-rw-r--r--arch/blackfin/mach-bf537/head.S3
-rw-r--r--arch/blackfin/mach-bf537/include/mach/anomaly.h2
-rw-r--r--arch/blackfin/mach-bf537/include/mach/bf537.h12
-rw-r--r--arch/blackfin/mach-bf548/boards/cm_bf548.c22
-rw-r--r--arch/blackfin/mach-bf548/boards/ezkit.c58
-rw-r--r--arch/blackfin/mach-bf548/head.S52
-rw-r--r--arch/blackfin/mach-bf548/include/mach/anomaly.h93
-rw-r--r--arch/blackfin/mach-bf548/include/mach/bf548.h25
-rw-r--r--arch/blackfin/mach-bf548/include/mach/mem_map.h14
-rw-r--r--arch/blackfin/mach-bf561/head.S3
-rw-r--r--arch/blackfin/mach-bf561/include/mach/anomaly.h2
-rw-r--r--arch/blackfin/mach-bf561/include/mach/bf561.h8
-rw-r--r--arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h4
-rw-r--r--arch/blackfin/mach-bf561/include/mach/mem_map.h18
-rw-r--r--arch/blackfin/mach-common/cache.S173
-rw-r--r--arch/blackfin/mach-common/cpufreq.c2
-rw-r--r--arch/blackfin/mach-common/entry.S219
-rw-r--r--arch/blackfin/mach-common/head.S106
-rw-r--r--arch/blackfin/mach-common/interrupt.S11
-rw-r--r--arch/blackfin/mach-common/ints-priority.c25
-rw-r--r--arch/blackfin/mm/Makefile2
-rw-r--r--arch/blackfin/mm/isram-driver.c201
-rw-r--r--arch/blackfin/mm/sram-alloc.c (renamed from arch/blackfin/mm/blackfin_sram.c)31
-rw-r--r--arch/cris/Makefile2
-rw-r--r--arch/cris/arch-v10/boot/compressed/Makefile2
-rw-r--r--arch/cris/arch-v10/boot/compressed/decompress.lds (renamed from arch/cris/arch-v10/boot/compressed/decompress.ld)0
-rw-r--r--arch/cris/arch-v10/boot/rescue/Makefile2
-rw-r--r--arch/cris/arch-v10/boot/rescue/rescue.lds (renamed from arch/cris/arch-v10/boot/rescue/rescue.ld)0
-rw-r--r--arch/cris/arch-v10/boot/tools/build.c1
-rw-r--r--arch/cris/arch-v32/boot/compressed/Makefile2
-rw-r--r--arch/cris/arch-v32/boot/compressed/decompress.lds (renamed from arch/cris/arch-v32/boot/compressed/decompress.ld)0
-rw-r--r--arch/cris/arch-v32/boot/rescue/Makefile2
-rw-r--r--arch/cris/arch-v32/boot/rescue/rescue.lds (renamed from arch/cris/arch-v32/boot/rescue/rescue.ld)0
-rw-r--r--arch/cris/arch-v32/mach-a3/cpufreq.c1
-rw-r--r--arch/cris/arch-v32/mach-fs/cpufreq.c1
-rw-r--r--arch/cris/configs/artpec_3_defconfig (renamed from arch/cris/artpec_3_defconfig)0
-rw-r--r--arch/cris/configs/etrax-100lx_defconfig (renamed from arch/cris/arch-v10/defconfig)0
-rw-r--r--arch/cris/configs/etrax-100lx_v2_defconfig (renamed from arch/cris/defconfig)0
-rw-r--r--arch/cris/configs/etraxfs_defconfig (renamed from arch/cris/etraxfs_defconfig)0
-rw-r--r--arch/frv/kernel/pm.c6
-rw-r--r--arch/frv/mb93090-mb00/pci-dma-nommu.c23
-rw-r--r--arch/frv/mb93090-mb00/pci-dma.c11
-rw-r--r--arch/frv/mb93090-mb00/pci-frv.c32
-rw-r--r--arch/frv/mb93090-mb00/pci-frv.h1
-rw-r--r--arch/frv/mb93090-mb00/pci-vdk.c2
-rw-r--r--arch/frv/mm/init.c2
-rw-r--r--arch/h8300/Kconfig7
-rw-r--r--arch/h8300/Kconfig.cpu115
-rw-r--r--arch/h8300/include/asm/a.out.h20
-rw-r--r--arch/h8300/include/asm/bug.h4
-rw-r--r--arch/h8300/include/asm/elf.h2
-rw-r--r--arch/h8300/include/asm/io.h34
-rw-r--r--arch/h8300/include/asm/md.h2
-rw-r--r--arch/h8300/include/asm/system.h2
-rw-r--r--arch/h8300/kernel/Makefile2
-rw-r--r--arch/h8300/kernel/module.c3
-rw-r--r--arch/h8300/kernel/process.c1
-rw-r--r--arch/h8300/kernel/time.c29
-rw-r--r--arch/h8300/kernel/timer/Makefile6
-rw-r--r--arch/h8300/kernel/timer/itu.c83
-rw-r--r--arch/h8300/kernel/timer/timer16.c78
-rw-r--r--arch/h8300/kernel/timer/timer8.c103
-rw-r--r--arch/h8300/kernel/timer/tpu.c102
-rw-r--r--arch/h8300/kernel/traps.c17
-rw-r--r--arch/h8300/mm/fault.c5
-rw-r--r--arch/h8300/platform/h8300h/aki3068net/Makefile1
-rw-r--r--arch/h8300/platform/h8300h/aki3068net/timer.c51
-rw-r--r--arch/h8300/platform/h8300h/generic/Makefile1
-rw-r--r--arch/h8300/platform/h8300h/generic/timer.c95
-rw-r--r--arch/h8300/platform/h8300h/h8max/Makefile1
-rw-r--r--arch/h8300/platform/h8300h/h8max/timer.c52
-rw-r--r--arch/h8300/platform/h8s/edosk2674/Makefile1
-rw-r--r--arch/h8300/platform/h8s/edosk2674/timer.c54
-rw-r--r--arch/h8300/platform/h8s/generic/Makefile1
-rw-r--r--arch/h8300/platform/h8s/generic/timer.c53
-rw-r--r--arch/ia64/Kconfig8
-rw-r--r--arch/ia64/ia32/binfmt_elf32.c2
-rw-r--r--arch/ia64/ia32/ia32_entry.S4
-rw-r--r--arch/ia64/ia32/ia32priv.h4
-rw-r--r--arch/ia64/ia32/sys_ia32.c91
-rw-r--r--arch/ia64/include/asm/a.out.h32
-rw-r--r--arch/ia64/include/asm/elf.h2
-rw-r--r--arch/ia64/include/asm/kvm_host.h6
-rw-r--r--arch/ia64/include/asm/statfs.h52
-rw-r--r--arch/ia64/kvm/Kconfig2
-rw-r--r--arch/ia64/kvm/Makefile6
-rw-r--r--arch/ia64/kvm/irq.h31
-rw-r--r--arch/ia64/kvm/kvm-ia64.c66
-rw-r--r--arch/ia64/kvm/kvm_minstate.h23
-rw-r--r--arch/ia64/kvm/optvfault.S181
-rw-r--r--arch/ia64/kvm/process.c4
-rw-r--r--arch/ia64/kvm/vcpu.h26
-rw-r--r--arch/ia64/kvm/vmm_ivt.S39
-rw-r--r--arch/ia64/kvm/vtlb.c23
-rw-r--r--arch/ia64/mm/init.c1
-rw-r--r--arch/m32r/Kconfig3
-rw-r--r--arch/m32r/kernel/process.c2
-rw-r--r--arch/m32r/mm/discontig.c4
-rw-r--r--arch/m68k/Kconfig64
-rw-r--r--arch/m68k/amiga/config.c9
-rw-r--r--arch/m68k/atari/Makefile3
-rw-r--r--arch/m68k/atari/ataints.c6
-rw-r--r--arch/m68k/atari/atakeyb.c12
-rw-r--r--arch/m68k/atari/config.c37
-rw-r--r--arch/m68k/atari/hades-pci.c440
-rw-r--r--arch/m68k/atari/time.c38
-rw-r--r--arch/m68k/bvme6000/config.c15
-rw-r--r--arch/m68k/bvme6000/rtc.c30
-rw-r--r--arch/m68k/kernel/Makefile1
-rw-r--r--arch/m68k/kernel/bios32.c514
-rw-r--r--arch/m68k/kernel/dma.c4
-rw-r--r--arch/m68k/kernel/ints.c3
-rw-r--r--arch/m68k/kernel/process.c2
-rw-r--r--arch/m68k/kernel/traps.c9
-rw-r--r--arch/m68k/kernel/vmlinux-std.lds9
-rw-r--r--arch/m68k/mm/kmap.c4
-rw-r--r--arch/m68k/mvme16x/rtc.c26
-rw-r--r--arch/m68k/q40/config.c12
-rw-r--r--arch/m68k/sun3x/time.c28
-rw-r--r--arch/m68knommu/Kconfig3
-rw-r--r--arch/m68knommu/include/asm/a.out.h1
-rw-r--r--arch/m68knommu/include/asm/elf.h2
-rw-r--r--arch/m68knommu/kernel/process.c1
-rw-r--r--arch/m68knommu/kernel/traps.c1
-rw-r--r--arch/mips/Kconfig1
-rw-r--r--arch/mips/bcm47xx/gpio.c85
-rw-r--r--arch/mips/bcm47xx/setup.c5
-rw-r--r--arch/mips/bcm47xx/wgt634u.c40
-rw-r--r--arch/mips/emma2rh/common/irq.c1
-rw-r--r--arch/mips/emma2rh/common/prom.c1
-rw-r--r--arch/mips/emma2rh/markeins/platform.c1
-rw-r--r--arch/mips/include/asm/a.out.h35
-rw-r--r--arch/mips/include/asm/cevt-r4k.h46
-rw-r--r--arch/mips/include/asm/elf.h10
-rw-r--r--arch/mips/include/asm/mach-bcm47xx/gpio.h41
-rw-r--r--arch/mips/include/asm/mach-bcm47xx/war.h6
-rw-r--r--arch/mips/include/asm/mach-generic/ide.h29
-rw-r--r--arch/mips/include/asm/mach-ip22/ds1286.h18
-rw-r--r--arch/mips/include/asm/mach-ip28/ds1286.h4
-rw-r--r--arch/mips/include/asm/spinlock.h2
-rw-r--r--arch/mips/kernel/linux32.c101
-rw-r--r--arch/mips/kernel/proc.c2
-rw-r--r--arch/mips/kernel/process.c1
-rw-r--r--arch/mips/kernel/rtlx.c4
-rw-r--r--arch/mips/kernel/scall64-n32.S4
-rw-r--r--arch/mips/kernel/scall64-o32.S4
-rw-r--r--arch/mips/kernel/syscall.c1
-rw-r--r--arch/mips/kernel/vmlinux.lds.S2
-rw-r--r--arch/mips/lasat/sysctl.c17
-rw-r--r--arch/mips/pci/fixup-emma2rh.c1
-rw-r--r--arch/mips/pci/ops-pnx8550.c2
-rw-r--r--arch/mips/pci/pci-emma2rh.c1
-rw-r--r--arch/mips/pci/pci.c80
-rw-r--r--arch/mips/rb532/time.c1
-rw-r--r--arch/mips/sgi-ip22/ip22-platform.c15
-rw-r--r--arch/mips/sgi-ip22/ip22-setup.c1
-rw-r--r--arch/mips/sgi-ip22/ip22-time.c64
-rw-r--r--arch/mips/sgi-ip27/ip27-timer.c99
-rw-r--r--arch/mips/sgi-ip32/ip32-platform.c16
-rw-r--r--arch/mips/sgi-ip32/ip32-setup.c5
-rw-r--r--arch/mips/sibyte/common/sb_tbprof.c3
-rw-r--r--arch/mn10300/Kconfig3
-rw-r--r--arch/parisc/Kconfig3
-rw-r--r--arch/parisc/kernel/binfmt_elf32.c2
-rw-r--r--arch/parisc/kernel/sys_parisc32.c105
-rw-r--r--arch/parisc/kernel/syscall_table.S4
-rw-r--r--arch/powerpc/Kconfig19
-rw-r--r--arch/powerpc/Kconfig.debug5
-rw-r--r--arch/powerpc/Makefile7
-rw-r--r--arch/powerpc/boot/Makefile3
-rw-r--r--arch/powerpc/boot/addnote.c144
-rw-r--r--arch/powerpc/boot/dtc-src/Makefile.dtc18
-rw-r--r--arch/powerpc/boot/dtc-src/checks.c305
-rw-r--r--arch/powerpc/boot/dtc-src/data.c62
-rw-r--r--arch/powerpc/boot/dtc-src/dtc-lexer.l120
-rw-r--r--arch/powerpc/boot/dtc-src/dtc-lexer.lex.c_shipped445
-rw-r--r--arch/powerpc/boot/dtc-src/dtc-parser.tab.c_shipped387
-rw-r--r--arch/powerpc/boot/dtc-src/dtc-parser.tab.h_shipped12
-rw-r--r--arch/powerpc/boot/dtc-src/dtc-parser.y67
-rw-r--r--arch/powerpc/boot/dtc-src/dtc.c41
-rw-r--r--arch/powerpc/boot/dtc-src/dtc.h43
-rw-r--r--arch/powerpc/boot/dtc-src/flattree.c232
-rw-r--r--arch/powerpc/boot/dtc-src/fstree.c8
-rw-r--r--arch/powerpc/boot/dtc-src/libfdt_env.h23
-rw-r--r--arch/powerpc/boot/dtc-src/livetree.c9
-rw-r--r--arch/powerpc/boot/dtc-src/srcpos.c121
-rw-r--r--arch/powerpc/boot/dtc-src/srcpos.h30
-rw-r--r--arch/powerpc/boot/dtc-src/treesource.c15
-rw-r--r--arch/powerpc/boot/dtc-src/version_gen.h2
-rw-r--r--arch/powerpc/boot/dts/arches.dts293
-rw-r--r--arch/powerpc/boot/dts/asp834x-redboot.dts4
-rw-r--r--arch/powerpc/boot/dts/gef_sbc610.dts293
-rw-r--r--arch/powerpc/boot/dts/glacier.dts2
-rw-r--r--arch/powerpc/boot/dts/mgcoge.dts174
-rw-r--r--arch/powerpc/boot/dts/mgsuvd.dts163
-rw-r--r--arch/powerpc/boot/dts/mpc5121ads.dts3
-rw-r--r--arch/powerpc/boot/dts/mpc8313erdb.dts7
-rw-r--r--arch/powerpc/boot/dts/mpc8315erdb.dts7
-rw-r--r--arch/powerpc/boot/dts/mpc832x_mds.dts7
-rw-r--r--arch/powerpc/boot/dts/mpc832x_rdb.dts7
-rw-r--r--arch/powerpc/boot/dts/mpc8349emitx.dts10
-rw-r--r--arch/powerpc/boot/dts/mpc8349emitxgp.dts7
-rw-r--r--arch/powerpc/boot/dts/mpc834x_mds.dts10
-rw-r--r--arch/powerpc/boot/dts/mpc836x_mds.dts30
-rw-r--r--arch/powerpc/boot/dts/mpc836x_rdk.dts19
-rw-r--r--arch/powerpc/boot/dts/mpc8377_mds.dts14
-rw-r--r--arch/powerpc/boot/dts/mpc8377_rdb.dts7
-rw-r--r--arch/powerpc/boot/dts/mpc8378_mds.dts14
-rw-r--r--arch/powerpc/boot/dts/mpc8378_rdb.dts7
-rw-r--r--arch/powerpc/boot/dts/mpc8379_mds.dts14
-rw-r--r--arch/powerpc/boot/dts/mpc8379_rdb.dts7
-rw-r--r--arch/powerpc/boot/dts/mpc8536ds.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc8610_hpcd.dts12
-rw-r--r--arch/powerpc/boot/dts/sbc8349.dts7
-rw-r--r--arch/powerpc/boot/dts/sequoia.dts9
-rw-r--r--arch/powerpc/boot/dts/yosemite.dts2
-rw-r--r--arch/powerpc/boot/elf_util.c6
-rw-r--r--arch/powerpc/boot/libfdt/Makefile.libfdt8
-rw-r--r--arch/powerpc/boot/libfdt/fdt.c61
-rw-r--r--arch/powerpc/boot/libfdt/fdt_ro.c329
-rw-r--r--arch/powerpc/boot/libfdt/fdt_rw.c200
-rw-r--r--arch/powerpc/boot/libfdt/fdt_strerror.c34
-rw-r--r--arch/powerpc/boot/libfdt/fdt_sw.c55
-rw-r--r--arch/powerpc/boot/libfdt/fdt_wip.c9
-rw-r--r--arch/powerpc/boot/libfdt/libfdt.h383
-rw-r--r--arch/powerpc/boot/libfdt/libfdt_internal.h24
-rw-r--r--arch/powerpc/boot/libfdt_env.h1
-rwxr-xr-xarch/powerpc/boot/wrapper4
-rw-r--r--arch/powerpc/configs/44x/arches_defconfig767
-rw-r--r--arch/powerpc/configs/83xx/asp8347_defconfig4
-rw-r--r--arch/powerpc/configs/83xx/mpc8313_rdb_defconfig4
-rw-r--r--arch/powerpc/configs/83xx/mpc8315_rdb_defconfig4
-rw-r--r--arch/powerpc/configs/83xx/mpc832x_mds_defconfig4
-rw-r--r--arch/powerpc/configs/83xx/mpc832x_rdb_defconfig4
-rw-r--r--arch/powerpc/configs/83xx/mpc834x_itx_defconfig4
-rw-r--r--arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig4
-rw-r--r--arch/powerpc/configs/83xx/mpc834x_mds_defconfig4
-rw-r--r--arch/powerpc/configs/83xx/mpc836x_mds_defconfig83
-rw-r--r--arch/powerpc/configs/83xx/mpc836x_rdk_defconfig4
-rw-r--r--arch/powerpc/configs/83xx/mpc837x_mds_defconfig4
-rw-r--r--arch/powerpc/configs/83xx/mpc837x_rdb_defconfig4
-rw-r--r--arch/powerpc/configs/83xx/sbc834x_defconfig4
-rw-r--r--arch/powerpc/configs/86xx/gef_sbc610_defconfig1657
-rw-r--r--arch/powerpc/configs/86xx/mpc8610_hpcd_defconfig (renamed from arch/powerpc/configs/mpc8610_hpcd_defconfig)4
-rw-r--r--arch/powerpc/configs/86xx/mpc8641_hpcn_defconfig (renamed from arch/powerpc/configs/mpc8641_hpcn_defconfig)4
-rw-r--r--arch/powerpc/configs/86xx/sbc8641d_defconfig (renamed from arch/powerpc/configs/sbc8641d_defconfig)4
-rw-r--r--arch/powerpc/configs/ep8248e_defconfig4
-rw-r--r--arch/powerpc/configs/mgcoge_defconfig900
-rw-r--r--arch/powerpc/configs/mgsuvd_defconfig872
-rw-r--r--arch/powerpc/configs/mpc8272_ads_defconfig4
-rw-r--r--arch/powerpc/configs/mpc83xx_defconfig4
-rw-r--r--arch/powerpc/configs/mpc86xx_defconfig1646
-rw-r--r--arch/powerpc/configs/pq2fads_defconfig4
-rw-r--r--arch/powerpc/include/asm/a.out.h20
-rw-r--r--arch/powerpc/include/asm/cputable.h10
-rw-r--r--arch/powerpc/include/asm/dcr-regs.h7
-rw-r--r--arch/powerpc/include/asm/device.h3
-rw-r--r--arch/powerpc/include/asm/dma-mapping.h187
-rw-r--r--arch/powerpc/include/asm/elf.h4
-rw-r--r--arch/powerpc/include/asm/exception.h42
-rw-r--r--arch/powerpc/include/asm/fsl_lbc.h48
-rw-r--r--arch/powerpc/include/asm/highmem.h2
-rw-r--r--arch/powerpc/include/asm/io.h2
-rw-r--r--arch/powerpc/include/asm/irq.h18
-rw-r--r--arch/powerpc/include/asm/kvm_host.h14
-rw-r--r--arch/powerpc/include/asm/kvm_ppc.h12
-rw-r--r--arch/powerpc/include/asm/machdep.h5
-rw-r--r--arch/powerpc/include/asm/mman.h2
-rw-r--r--arch/powerpc/include/asm/mmu-hash64.h2
-rw-r--r--arch/powerpc/include/asm/mpic.h4
-rw-r--r--arch/powerpc/include/asm/msi_bitmap.h35
-rw-r--r--arch/powerpc/include/asm/of_device.h3
-rw-r--r--arch/powerpc/include/asm/of_platform.h3
-rw-r--r--arch/powerpc/include/asm/paca.h2
-rw-r--r--arch/powerpc/include/asm/page.h14
-rw-r--r--arch/powerpc/include/asm/page_32.h8
-rw-r--r--arch/powerpc/include/asm/pci.h14
-rw-r--r--arch/powerpc/include/asm/pgtable-ppc32.h72
-rw-r--r--arch/powerpc/include/asm/pgtable-ppc64.h12
-rw-r--r--arch/powerpc/include/asm/ppc_asm.h2
-rw-r--r--arch/powerpc/include/asm/reg_booke.h7
-rw-r--r--arch/powerpc/include/asm/sections.h6
-rw-r--r--arch/powerpc/include/asm/sfp-machine.h (renamed from arch/powerpc/math-emu/sfp-machine.h)114
-rw-r--r--arch/powerpc/include/asm/smp.h42
-rw-r--r--arch/powerpc/include/asm/statfs.h54
-rw-r--r--arch/powerpc/include/asm/systbl.h2
-rw-r--r--arch/powerpc/include/asm/tlbflush.h13
-rw-r--r--arch/powerpc/include/asm/types.h9
-rw-r--r--arch/powerpc/kernel/.gitignore1
-rw-r--r--arch/powerpc/kernel/Makefile9
-rw-r--r--arch/powerpc/kernel/asm-offsets.c7
-rw-r--r--arch/powerpc/kernel/btext.c34
-rw-r--r--arch/powerpc/kernel/cpu_setup_ppc970.S4
-rw-r--r--arch/powerpc/kernel/cputable.c24
-rw-r--r--arch/powerpc/kernel/dma-iommu.c (renamed from arch/powerpc/kernel/dma_64.c)101
-rw-r--r--arch/powerpc/kernel/dma.c131
-rw-r--r--arch/powerpc/kernel/entry_64.S69
-rw-r--r--arch/powerpc/kernel/head_32.S10
-rw-r--r--arch/powerpc/kernel/head_64.S473
-rw-r--r--arch/powerpc/kernel/head_fsl_booke.S26
-rw-r--r--arch/powerpc/kernel/iommu.c23
-rw-r--r--arch/powerpc/kernel/irq.c169
-rw-r--r--arch/powerpc/kernel/lparcfg.c8
-rw-r--r--arch/powerpc/kernel/misc.S10
-rw-r--r--arch/powerpc/kernel/misc_32.S62
-rw-r--r--arch/powerpc/kernel/misc_64.S8
-rw-r--r--arch/powerpc/kernel/of_device.c2
-rw-r--r--arch/powerpc/kernel/paca.c3
-rw-r--r--arch/powerpc/kernel/pci-common.c216
-rw-r--r--arch/powerpc/kernel/pci_32.c18
-rw-r--r--arch/powerpc/kernel/pci_64.c49
-rw-r--r--arch/powerpc/kernel/ppc_ksyms.c3
-rw-r--r--arch/powerpc/kernel/prom.c43
-rw-r--r--arch/powerpc/kernel/prom_init.c29
-rw-r--r--arch/powerpc/kernel/reloc_64.S87
-rw-r--r--arch/powerpc/kernel/setup-common.c17
-rw-r--r--arch/powerpc/kernel/setup_32.c13
-rw-r--r--arch/powerpc/kernel/setup_64.c9
-rw-r--r--arch/powerpc/kernel/smp.c3
-rw-r--r--arch/powerpc/kernel/softemu8xx.c1
-rw-r--r--arch/powerpc/kernel/swsusp_asm64.S2
-rw-r--r--arch/powerpc/kernel/sys_ppc32.c107
-rw-r--r--arch/powerpc/kernel/sysfs.c119
-rw-r--r--arch/powerpc/kernel/traps.c1
-rw-r--r--arch/powerpc/kernel/vio.c2
-rw-r--r--arch/powerpc/kernel/vmlinux.lds.S18
-rw-r--r--arch/powerpc/kvm/44x_tlb.c53
-rw-r--r--arch/powerpc/kvm/Kconfig11
-rw-r--r--arch/powerpc/kvm/Makefile6
-rw-r--r--arch/powerpc/kvm/booke_guest.c17
-rw-r--r--arch/powerpc/kvm/booke_interrupts.S79
-rw-r--r--arch/powerpc/kvm/emulate.c8
-rw-r--r--arch/powerpc/kvm/powerpc.c99
-rw-r--r--arch/powerpc/lib/copypage_64.S198
-rw-r--r--arch/powerpc/lib/dma-noncoherent.c2
-rw-r--r--arch/powerpc/math-emu/Makefile7
-rw-r--r--arch/powerpc/math-emu/double.h129
-rw-r--r--arch/powerpc/math-emu/fadd.c17
-rw-r--r--arch/powerpc/math-emu/fadds.c20
-rw-r--r--arch/powerpc/math-emu/fcmpo.c10
-rw-r--r--arch/powerpc/math-emu/fcmpu.c10
-rw-r--r--arch/powerpc/math-emu/fctiw.c8
-rw-r--r--arch/powerpc/math-emu/fctiwz.c8
-rw-r--r--arch/powerpc/math-emu/fdiv.c14
-rw-r--r--arch/powerpc/math-emu/fdivs.c16
-rw-r--r--arch/powerpc/math-emu/fmadd.c16
-rw-r--r--arch/powerpc/math-emu/fmadds.c18
-rw-r--r--arch/powerpc/math-emu/fmsub.c16
-rw-r--r--arch/powerpc/math-emu/fmsubs.c18
-rw-r--r--arch/powerpc/math-emu/fmul.c14
-rw-r--r--arch/powerpc/math-emu/fmuls.c16
-rw-r--r--arch/powerpc/math-emu/fnmadd.c16
-rw-r--r--arch/powerpc/math-emu/fnmadds.c18
-rw-r--r--arch/powerpc/math-emu/fnmsub.c16
-rw-r--r--arch/powerpc/math-emu/fnmsubs.c18
-rw-r--r--arch/powerpc/math-emu/frsp.c14
-rw-r--r--arch/powerpc/math-emu/fsel.c8
-rw-r--r--arch/powerpc/math-emu/fsqrt.c12
-rw-r--r--arch/powerpc/math-emu/fsqrts.c14
-rw-r--r--arch/powerpc/math-emu/fsub.c14
-rw-r--r--arch/powerpc/math-emu/fsubs.c16
-rw-r--r--arch/powerpc/math-emu/lfd.c4
-rw-r--r--arch/powerpc/math-emu/lfs.c19
-rw-r--r--arch/powerpc/math-emu/math.c8
-rw-r--r--arch/powerpc/math-emu/mcrfs.c3
-rw-r--r--arch/powerpc/math-emu/mffs.c3
-rw-r--r--arch/powerpc/math-emu/mtfsb0.c3
-rw-r--r--arch/powerpc/math-emu/mtfsb1.c3
-rw-r--r--arch/powerpc/math-emu/mtfsf.c20
-rw-r--r--arch/powerpc/math-emu/mtfsfi.c3
-rw-r--r--arch/powerpc/math-emu/op-1.h245
-rw-r--r--arch/powerpc/math-emu/op-2.h434
-rw-r--r--arch/powerpc/math-emu/op-4.h317
-rw-r--r--arch/powerpc/math-emu/op-common.h688
-rw-r--r--arch/powerpc/math-emu/single.h66
-rw-r--r--arch/powerpc/math-emu/soft-fp.h104
-rw-r--r--arch/powerpc/math-emu/stfs.c19
-rw-r--r--arch/powerpc/math-emu/types.c51
-rw-r--r--arch/powerpc/math-emu/udivmodti4.c2
-rw-r--r--arch/powerpc/mm/fsl_booke_mmu.c5
-rw-r--r--arch/powerpc/mm/gup.c7
-rw-r--r--arch/powerpc/mm/hash_low_32.S122
-rw-r--r--arch/powerpc/mm/hash_utils_64.c8
-rw-r--r--arch/powerpc/mm/hugetlbpage.c59
-rw-r--r--arch/powerpc/mm/init_64.c4
-rw-r--r--arch/powerpc/mm/mem.c5
-rw-r--r--arch/powerpc/mm/numa.c185
-rw-r--r--arch/powerpc/mm/pgtable_32.c4
-rw-r--r--arch/powerpc/mm/tlb_32.c1
-rw-r--r--arch/powerpc/oprofile/cell/vma_map.c2
-rw-r--r--arch/powerpc/oprofile/op_model_power4.c4
-rw-r--r--arch/powerpc/platforms/44x/Kconfig42
-rw-r--r--arch/powerpc/platforms/44x/Makefile8
-rw-r--r--arch/powerpc/platforms/44x/bamboo.c62
-rw-r--r--arch/powerpc/platforms/44x/canyonlands.c63
-rw-r--r--arch/powerpc/platforms/44x/katmai.c62
-rw-r--r--arch/powerpc/platforms/44x/ppc44x_simple.c88
-rw-r--r--arch/powerpc/platforms/44x/rainier.c62
-rw-r--r--arch/powerpc/platforms/44x/sequoia.c63
-rw-r--r--arch/powerpc/platforms/44x/taishan.c72
-rw-r--r--arch/powerpc/platforms/512x/Kconfig2
-rw-r--r--arch/powerpc/platforms/512x/mpc5121_ads.c10
-rw-r--r--arch/powerpc/platforms/52xx/mpc52xx_common.c5
-rw-r--r--arch/powerpc/platforms/52xx/mpc52xx_pci.c13
-rw-r--r--arch/powerpc/platforms/82xx/Kconfig8
-rw-r--r--arch/powerpc/platforms/82xx/Makefile1
-rw-r--r--arch/powerpc/platforms/82xx/mgcoge.c129
-rw-r--r--arch/powerpc/platforms/83xx/Kconfig5
-rw-r--r--arch/powerpc/platforms/83xx/mpc837x_mds.c8
-rw-r--r--arch/powerpc/platforms/85xx/Kconfig1
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_ads.c1
-rw-r--r--arch/powerpc/platforms/85xx/sbc8560.c3
-rw-r--r--arch/powerpc/platforms/86xx/Kconfig9
-rw-r--r--arch/powerpc/platforms/86xx/Makefile1
-rw-r--r--arch/powerpc/platforms/86xx/gef_pic.c258
-rw-r--r--arch/powerpc/platforms/86xx/gef_pic.h11
-rw-r--r--arch/powerpc/platforms/86xx/gef_sbc610.c221
-rw-r--r--arch/powerpc/platforms/86xx/mpc8610_hpcd.c1
-rw-r--r--arch/powerpc/platforms/86xx/mpc86xx_hpcn.c8
-rw-r--r--arch/powerpc/platforms/86xx/sbc8641d.c8
-rw-r--r--arch/powerpc/platforms/8xx/Kconfig6
-rw-r--r--arch/powerpc/platforms/8xx/Makefile1
-rw-r--r--arch/powerpc/platforms/8xx/mgsuvd.c92
-rw-r--r--arch/powerpc/platforms/Kconfig21
-rw-r--r--arch/powerpc/platforms/Kconfig.cputype18
-rw-r--r--arch/powerpc/platforms/cell/iommu.c6
-rw-r--r--arch/powerpc/platforms/cell/spufs/inode.c13
-rw-r--r--arch/powerpc/platforms/chrp/pci.c4
-rw-r--r--arch/powerpc/platforms/chrp/setup.c1
-rw-r--r--arch/powerpc/platforms/chrp/time.c24
-rw-r--r--arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c1
-rw-r--r--arch/powerpc/platforms/iseries/exception.S23
-rw-r--r--arch/powerpc/platforms/iseries/mf.c26
-rw-r--r--arch/powerpc/platforms/maple/setup.c1
-rw-r--r--arch/powerpc/platforms/maple/time.c24
-rw-r--r--arch/powerpc/platforms/powermac/feature.c2
-rw-r--r--arch/powerpc/platforms/powermac/setup.c1
-rw-r--r--arch/powerpc/platforms/powermac/smp.c4
-rw-r--r--arch/powerpc/platforms/powermac/time.c3
-rw-r--r--arch/powerpc/platforms/ps3/system-bus.c2
-rw-r--r--arch/powerpc/platforms/pseries/cmm.c4
-rw-r--r--arch/powerpc/platforms/pseries/eeh_driver.c2
-rw-r--r--arch/powerpc/platforms/pseries/hotplug-memory.c2
-rw-r--r--arch/powerpc/platforms/pseries/reconfig.c6
-rw-r--r--arch/powerpc/platforms/pseries/rtasd.c26
-rw-r--r--arch/powerpc/platforms/pseries/setup.c1
-rw-r--r--arch/powerpc/platforms/pseries/smp.c32
-rw-r--r--arch/powerpc/platforms/pseries/xics.c550
-rw-r--r--arch/powerpc/platforms/pseries/xics.h12
-rw-r--r--arch/powerpc/sysdev/Kconfig6
-rw-r--r--arch/powerpc/sysdev/Makefile5
-rw-r--r--arch/powerpc/sysdev/cpm1.c74
-rw-r--r--arch/powerpc/sysdev/fsl_lbc.c53
-rw-r--r--arch/powerpc/sysdev/fsl_msi.c109
-rw-r--r--arch/powerpc/sysdev/fsl_msi.h8
-rw-r--r--arch/powerpc/sysdev/fsl_pci.c58
-rw-r--r--arch/powerpc/sysdev/fsl_soc.c85
-rw-r--r--arch/powerpc/sysdev/fsl_soc.h8
-rw-r--r--arch/powerpc/sysdev/mpc8xxx_gpio.c171
-rw-r--r--arch/powerpc/sysdev/mpic.h2
-rw-r--r--arch/powerpc/sysdev/mpic_msi.c123
-rw-r--r--arch/powerpc/sysdev/mpic_pasemi_msi.c24
-rw-r--r--arch/powerpc/sysdev/mpic_u3msi.c22
-rw-r--r--arch/powerpc/sysdev/msi_bitmap.c247
-rw-r--r--arch/powerpc/sysdev/ppc4xx_pci.c48
-rw-r--r--arch/powerpc/sysdev/qe_lib/Kconfig9
-rw-r--r--arch/s390/Kconfig7
-rw-r--r--arch/s390/hypfs/inode.c2
-rw-r--r--arch/s390/include/asm/elf.h8
-rw-r--r--arch/s390/include/asm/statfs.h11
-rw-r--r--arch/s390/kernel/compat_linux.c102
-rw-r--r--arch/s390/kernel/compat_linux.h4
-rw-r--r--arch/s390/kernel/compat_wrapper.S12
-rw-r--r--arch/s390/kernel/syscalls.S4
-rw-r--r--arch/s390/kvm/priv.c4
-rw-r--r--arch/sh/include/asm/elf.h2
-rw-r--r--arch/sparc/include/asm/Kbuild2
-rw-r--r--arch/sparc/include/asm/elf_32.h2
-rw-r--r--arch/sparc/include/asm/elf_64.h6
-rw-r--r--arch/sparc/include/asm/statfs.h8
-rw-r--r--arch/sparc/include/asm/statfs_32.h6
-rw-r--r--arch/sparc/include/asm/statfs_64.h54
-rw-r--r--arch/sparc/kernel/sun4d_smp.c1
-rw-r--r--arch/sparc/kernel/sun4m_smp.c1
-rw-r--r--arch/sparc64/kernel/chmc.c2
-rw-r--r--arch/sparc64/kernel/iommu.c7
-rw-r--r--arch/sparc64/kernel/iommu_common.h14
-rw-r--r--arch/sparc64/kernel/pci_sun4v.c7
-rw-r--r--arch/sparc64/kernel/smp.c4
-rw-r--r--arch/sparc64/kernel/sys_sparc32.c97
-rw-r--r--arch/sparc64/kernel/systbls.S4
-rw-r--r--arch/sparc64/kernel/us3_cpufreq.c1
-rw-r--r--arch/um/Kconfig.i3868
-rw-r--r--arch/um/Kconfig.x86_643
-rw-r--r--arch/um/kernel/exec.c12
-rw-r--r--arch/um/os-Linux/Makefile3
-rw-r--r--arch/um/os-Linux/tty_log.c217
-rw-r--r--arch/x86/Kconfig33
-rw-r--r--arch/x86/boot/video-vesa.c9
-rw-r--r--arch/x86/ia32/ia32entry.S4
-rw-r--r--arch/x86/ia32/sys_ia32.c99
-rw-r--r--arch/x86/kernel/amd_iommu.c9
-rw-r--r--arch/x86/kernel/cpuid.c4
-rw-r--r--arch/x86/kernel/dumpstack_32.c2
-rw-r--r--arch/x86/kernel/dumpstack_64.c2
-rw-r--r--arch/x86/kernel/e820.c4
-rw-r--r--arch/x86/kernel/kvmclock.c30
-rw-r--r--arch/x86/kernel/msr.c4
-rw-r--r--arch/x86/kernel/pci-calgary_64.c18
-rw-r--r--arch/x86/kernel/pci-dma.c4
-rw-r--r--arch/x86/kernel/pci-gart_64.c8
-rw-r--r--arch/x86/kernel/pvclock.c12
-rw-r--r--arch/x86/kernel/rtc.c22
-rw-r--r--arch/x86/kernel/smpboot.c14
-rw-r--r--arch/x86/kvm/Makefile5
-rw-r--r--arch/x86/kvm/i8254.c81
-rw-r--r--arch/x86/kvm/i8254.h7
-rw-r--r--arch/x86/kvm/i8259.c53
-rw-r--r--arch/x86/kvm/irq.c3
-rw-r--r--arch/x86/kvm/irq.h6
-rw-r--r--arch/x86/kvm/kvm_cache_regs.h32
-rw-r--r--arch/x86/kvm/lapic.c43
-rw-r--r--arch/x86/kvm/mmu.c680
-rw-r--r--arch/x86/kvm/paging_tmpl.h249
-rw-r--r--arch/x86/kvm/svm.c156
-rw-r--r--arch/x86/kvm/vmx.c712
-rw-r--r--arch/x86/kvm/vmx.h3
-rw-r--r--arch/x86/kvm/x86.c554
-rw-r--r--arch/x86/kvm/x86.h22
-rw-r--r--arch/x86/kvm/x86_emulate.c170
-rw-r--r--arch/x86/mm/fault.c45
-rw-r--r--arch/x86/mm/highmem_32.c1
-rw-r--r--arch/x86/mm/ioremap.c6
-rw-r--r--arch/x86/xen/time.c11
-rw-r--r--arch/xtensa/kernel/setup.c5
788 files changed, 33241 insertions, 12868 deletions
diff --git a/arch/Kconfig b/arch/Kconfig
index 0267babe5eb9..e6ab550bceb3 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -28,7 +28,7 @@ config OPROFILE_IBS
28 If unsure, say N. 28 If unsure, say N.
29 29
30config HAVE_OPROFILE 30config HAVE_OPROFILE
31 def_bool n 31 bool
32 32
33config KPROBES 33config KPROBES
34 bool "Kprobes" 34 bool "Kprobes"
@@ -42,7 +42,7 @@ config KPROBES
42 If in doubt, say "N". 42 If in doubt, say "N".
43 43
44config HAVE_EFFICIENT_UNALIGNED_ACCESS 44config HAVE_EFFICIENT_UNALIGNED_ACCESS
45 def_bool n 45 bool
46 help 46 help
47 Some architectures are unable to perform unaligned accesses 47 Some architectures are unable to perform unaligned accesses
48 without the use of get_unaligned/put_unaligned. Others are 48 without the use of get_unaligned/put_unaligned. Others are
@@ -65,13 +65,13 @@ config KRETPROBES
65 depends on KPROBES && HAVE_KRETPROBES 65 depends on KPROBES && HAVE_KRETPROBES
66 66
67config HAVE_IOREMAP_PROT 67config HAVE_IOREMAP_PROT
68 def_bool n 68 bool
69 69
70config HAVE_KPROBES 70config HAVE_KPROBES
71 def_bool n 71 bool
72 72
73config HAVE_KRETPROBES 73config HAVE_KRETPROBES
74 def_bool n 74 bool
75 75
76# 76#
77# An arch should select this if it provides all these things: 77# An arch should select this if it provides all these things:
@@ -89,16 +89,16 @@ config HAVE_KRETPROBES
89# signal delivery calls tracehook_signal_handler() 89# signal delivery calls tracehook_signal_handler()
90# 90#
91config HAVE_ARCH_TRACEHOOK 91config HAVE_ARCH_TRACEHOOK
92 def_bool n 92 bool
93 93
94config HAVE_DMA_ATTRS 94config HAVE_DMA_ATTRS
95 def_bool n 95 bool
96 96
97config USE_GENERIC_SMP_HELPERS 97config USE_GENERIC_SMP_HELPERS
98 def_bool n 98 bool
99 99
100config HAVE_CLK 100config HAVE_CLK
101 def_bool n 101 bool
102 help 102 help
103 The <linux/clk.h> calls support software clock gating and 103 The <linux/clk.h> calls support software clock gating and
104 thus are a key power management tool on many systems. 104 thus are a key power management tool on many systems.
diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig
index 1bec55d63ef6..a0f642b6a4b9 100644
--- a/arch/alpha/Kconfig
+++ b/arch/alpha/Kconfig
@@ -5,6 +5,7 @@
5config ALPHA 5config ALPHA
6 bool 6 bool
7 default y 7 default y
8 select HAVE_AOUT
8 select HAVE_IDE 9 select HAVE_IDE
9 select HAVE_OPROFILE 10 select HAVE_OPROFILE
10 help 11 help
@@ -68,9 +69,6 @@ config AUTO_IRQ_AFFINITY
68 depends on SMP 69 depends on SMP
69 default y 70 default y
70 71
71config ARCH_SUPPORTS_AOUT
72 def_bool y
73
74source "init/Kconfig" 72source "init/Kconfig"
75 73
76 74
@@ -224,8 +222,7 @@ config ALPHA_MIATA
224 bool "Miata" 222 bool "Miata"
225 help 223 help
226 The Digital PersonalWorkStation (PWS 433a, 433au, 500a, 500au, 600a, 224 The Digital PersonalWorkStation (PWS 433a, 433au, 500a, 500au, 600a,
227 or 600au). There is an Installation HOWTO for this hardware at 225 or 600au).
228 <http://eijk.homelinux.org/~stefan/miata.html>.
229 226
230config ALPHA_MIKASA 227config ALPHA_MIKASA
231 bool "Mikasa" 228 bool "Mikasa"
diff --git a/arch/alpha/include/asm/a.out.h b/arch/alpha/include/asm/a.out.h
index 02ce8473870a..acdc681231cb 100644
--- a/arch/alpha/include/asm/a.out.h
+++ b/arch/alpha/include/asm/a.out.h
@@ -95,7 +95,7 @@ struct exec
95 Worse, we have to notice the start address before swapping to use 95 Worse, we have to notice the start address before swapping to use
96 /sbin/loader, which of course is _not_ a TASO application. */ 96 /sbin/loader, which of course is _not_ a TASO application. */
97#define SET_AOUT_PERSONALITY(BFPM, EX) \ 97#define SET_AOUT_PERSONALITY(BFPM, EX) \
98 set_personality (((BFPM->sh_bang || EX.ah.entry < 0x100000000L \ 98 set_personality (((BFPM->taso || EX.ah.entry < 0x100000000L \
99 ? ADDR_LIMIT_32BIT : 0) | PER_OSF4)) 99 ? ADDR_LIMIT_32BIT : 0) | PER_OSF4))
100 100
101#endif /* __KERNEL__ */ 101#endif /* __KERNEL__ */
diff --git a/arch/alpha/include/asm/elf.h b/arch/alpha/include/asm/elf.h
index fc1002ea1e0c..5c75c1b2352a 100644
--- a/arch/alpha/include/asm/elf.h
+++ b/arch/alpha/include/asm/elf.h
@@ -144,9 +144,9 @@ extern int dump_elf_task_fp(elf_fpreg_t *dest, struct task_struct *task);
144 : amask (AMASK_CIX) ? "ev6" : "ev67"); \ 144 : amask (AMASK_CIX) ? "ev6" : "ev67"); \
145}) 145})
146 146
147#define SET_PERSONALITY(EX, IBCS2) \ 147#define SET_PERSONALITY(EX) \
148 set_personality(((EX).e_flags & EF_ALPHA_32BIT) \ 148 set_personality(((EX).e_flags & EF_ALPHA_32BIT) \
149 ? PER_LINUX_32BIT : (IBCS2) ? PER_SVR4 : PER_LINUX) 149 ? PER_LINUX_32BIT : PER_LINUX)
150 150
151extern int alpha_l1i_cacheshape; 151extern int alpha_l1i_cacheshape;
152extern int alpha_l1d_cacheshape; 152extern int alpha_l1d_cacheshape;
diff --git a/arch/alpha/include/asm/statfs.h b/arch/alpha/include/asm/statfs.h
index ad15830baefe..de35cd438a10 100644
--- a/arch/alpha/include/asm/statfs.h
+++ b/arch/alpha/include/asm/statfs.h
@@ -1,6 +1,10 @@
1#ifndef _ALPHA_STATFS_H 1#ifndef _ALPHA_STATFS_H
2#define _ALPHA_STATFS_H 2#define _ALPHA_STATFS_H
3 3
4/* Alpha is the only 64-bit platform with 32-bit statfs. And doesn't
5 even seem to implement statfs64 */
6#define __statfs_word __u32
7
4#include <asm-generic/statfs.h> 8#include <asm-generic/statfs.h>
5 9
6#endif 10#endif
diff --git a/arch/alpha/kernel/pci_iommu.c b/arch/alpha/kernel/pci_iommu.c
index 2179c602032a..b9094da05d7a 100644
--- a/arch/alpha/kernel/pci_iommu.c
+++ b/arch/alpha/kernel/pci_iommu.c
@@ -41,13 +41,6 @@ mk_iommu_pte(unsigned long paddr)
41 return (paddr >> (PAGE_SHIFT-1)) | 1; 41 return (paddr >> (PAGE_SHIFT-1)) | 1;
42} 42}
43 43
44static inline long
45calc_npages(long bytes)
46{
47 return (bytes + PAGE_SIZE - 1) >> PAGE_SHIFT;
48}
49
50
51/* Return the minimum of MAX or the first power of two larger 44/* Return the minimum of MAX or the first power of two larger
52 than main memory. */ 45 than main memory. */
53 46
@@ -287,7 +280,7 @@ pci_map_single_1(struct pci_dev *pdev, void *cpu_addr, size_t size,
287 if (!arena || arena->dma_base + arena->size - 1 > max_dma) 280 if (!arena || arena->dma_base + arena->size - 1 > max_dma)
288 arena = hose->sg_isa; 281 arena = hose->sg_isa;
289 282
290 npages = calc_npages((paddr & ~PAGE_MASK) + size); 283 npages = iommu_num_pages(paddr, size, PAGE_SIZE);
291 284
292 /* Force allocation to 64KB boundary for ISA bridges. */ 285 /* Force allocation to 64KB boundary for ISA bridges. */
293 if (pdev && pdev == isa_bridge) 286 if (pdev && pdev == isa_bridge)
@@ -387,7 +380,7 @@ pci_unmap_single(struct pci_dev *pdev, dma_addr_t dma_addr, size_t size,
387 BUG(); 380 BUG();
388 } 381 }
389 382
390 npages = calc_npages((dma_addr & ~PAGE_MASK) + size); 383 npages = iommu_num_pages(dma_addr, size, PAGE_SIZE);
391 384
392 spin_lock_irqsave(&arena->lock, flags); 385 spin_lock_irqsave(&arena->lock, flags);
393 386
@@ -580,7 +573,7 @@ sg_fill(struct device *dev, struct scatterlist *leader, struct scatterlist *end,
580 contiguous. */ 573 contiguous. */
581 574
582 paddr &= ~PAGE_MASK; 575 paddr &= ~PAGE_MASK;
583 npages = calc_npages(paddr + size); 576 npages = iommu_num_pages(paddr, size, PAGE_SIZE);
584 dma_ofs = iommu_arena_alloc(dev, arena, npages, 0); 577 dma_ofs = iommu_arena_alloc(dev, arena, npages, 0);
585 if (dma_ofs < 0) { 578 if (dma_ofs < 0) {
586 /* If we attempted a direct map above but failed, die. */ 579 /* If we attempted a direct map above but failed, die. */
@@ -616,7 +609,7 @@ sg_fill(struct device *dev, struct scatterlist *leader, struct scatterlist *end,
616 sg++; 609 sg++;
617 } 610 }
618 611
619 npages = calc_npages((paddr & ~PAGE_MASK) + size); 612 npages = iommu_num_pages(paddr, size, PAGE_SIZE);
620 613
621 paddr &= PAGE_MASK; 614 paddr &= PAGE_MASK;
622 for (i = 0; i < npages; ++i, paddr += PAGE_SIZE) 615 for (i = 0; i < npages; ++i, paddr += PAGE_SIZE)
@@ -775,7 +768,7 @@ pci_unmap_sg(struct pci_dev *pdev, struct scatterlist *sg, int nents,
775 DBGA(" (%ld) sg [%lx,%lx]\n", 768 DBGA(" (%ld) sg [%lx,%lx]\n",
776 sg - end + nents, addr, size); 769 sg - end + nents, addr, size);
777 770
778 npages = calc_npages((addr & ~PAGE_MASK) + size); 771 npages = iommu_num_pages(addr, size, PAGE_SIZE);
779 ofs = (addr - arena->dma_base) >> PAGE_SHIFT; 772 ofs = (addr - arena->dma_base) >> PAGE_SHIFT;
780 iommu_arena_free(arena, ofs, npages); 773 iommu_arena_free(arena, ofs, npages);
781 774
diff --git a/arch/alpha/kernel/smp.c b/arch/alpha/kernel/smp.c
index 06b6fdab639f..e657c45d91d2 100644
--- a/arch/alpha/kernel/smp.c
+++ b/arch/alpha/kernel/smp.c
@@ -27,6 +27,7 @@
27#include <linux/cache.h> 27#include <linux/cache.h>
28#include <linux/profile.h> 28#include <linux/profile.h>
29#include <linux/bitops.h> 29#include <linux/bitops.h>
30#include <linux/cpu.h>
30 31
31#include <asm/hwrpb.h> 32#include <asm/hwrpb.h>
32#include <asm/ptrace.h> 33#include <asm/ptrace.h>
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index efeed65b4a66..4853f9df37bd 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -8,6 +8,7 @@ mainmenu "Linux Kernel Configuration"
8config ARM 8config ARM
9 bool 9 bool
10 default y 10 default y
11 select HAVE_AOUT
11 select HAVE_IDE 12 select HAVE_IDE
12 select RTC_LIB 13 select RTC_LIB
13 select SYS_SUPPORTS_APM_EMULATION 14 select SYS_SUPPORTS_APM_EMULATION
@@ -140,9 +141,6 @@ config GENERIC_CALIBRATE_DELAY
140 bool 141 bool
141 default y 142 default y
142 143
143config ARCH_SUPPORTS_AOUT
144 def_bool y
145
146config ARCH_MAY_HAVE_PC_FDC 144config ARCH_MAY_HAVE_PC_FDC
147 bool 145 bool
148 146
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index e2274bc0b544..7d5121260fda 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -118,9 +118,10 @@ endif
118 machine-$(CONFIG_ARCH_IXP23XX) := ixp23xx 118 machine-$(CONFIG_ARCH_IXP23XX) := ixp23xx
119 machine-$(CONFIG_ARCH_OMAP1) := omap1 119 machine-$(CONFIG_ARCH_OMAP1) := omap1
120 machine-$(CONFIG_ARCH_OMAP2) := omap2 120 machine-$(CONFIG_ARCH_OMAP2) := omap2
121 machine-$(CONFIG_ARCH_OMAP3) := omap2
121 plat-$(CONFIG_ARCH_OMAP) := omap 122 plat-$(CONFIG_ARCH_OMAP) := omap
122 machine-$(CONFIG_ARCH_S3C2410) := s3c2410 s3c2400 s3c2412 s3c2440 s3c2442 s3c2443 123 machine-$(CONFIG_ARCH_S3C2410) := s3c2410 s3c2400 s3c2412 s3c2440 s3c2442 s3c2443
123 plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx 124 plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx s3c
124 machine-$(CONFIG_ARCH_LH7A40X) := lh7a40x 125 machine-$(CONFIG_ARCH_LH7A40X) := lh7a40x
125 machine-$(CONFIG_ARCH_VERSATILE) := versatile 126 machine-$(CONFIG_ARCH_VERSATILE) := versatile
126 machine-$(CONFIG_ARCH_IMX) := imx 127 machine-$(CONFIG_ARCH_IMX) := imx
diff --git a/arch/arm/configs/omap3_beagle_defconfig b/arch/arm/configs/omap3_beagle_defconfig
new file mode 100644
index 000000000000..e042d27eae16
--- /dev/null
+++ b/arch/arm/configs/omap3_beagle_defconfig
@@ -0,0 +1,1321 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.27-rc8
4# Wed Oct 1 17:14:22 2008
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_MMU=y
12# CONFIG_NO_IOPORT is not set
13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_HAVE_LATENCYTOP_SUPPORT=y
16CONFIG_LOCKDEP_SUPPORT=y
17CONFIG_TRACE_IRQFLAGS_SUPPORT=y
18CONFIG_HARDIRQS_SW_RESEND=y
19CONFIG_GENERIC_IRQ_PROBE=y
20CONFIG_RWSEM_GENERIC_SPINLOCK=y
21# CONFIG_ARCH_HAS_ILOG2_U32 is not set
22# CONFIG_ARCH_HAS_ILOG2_U64 is not set
23CONFIG_GENERIC_HWEIGHT=y
24CONFIG_GENERIC_CALIBRATE_DELAY=y
25CONFIG_ARCH_SUPPORTS_AOUT=y
26CONFIG_ZONE_DMA=y
27CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
28CONFIG_VECTORS_BASE=0xffff0000
29CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
30
31#
32# General setup
33#
34CONFIG_EXPERIMENTAL=y
35CONFIG_BROKEN_ON_SMP=y
36CONFIG_INIT_ENV_ARG_LIMIT=32
37CONFIG_LOCALVERSION=""
38CONFIG_LOCALVERSION_AUTO=y
39CONFIG_SWAP=y
40CONFIG_SYSVIPC=y
41CONFIG_SYSVIPC_SYSCTL=y
42# CONFIG_POSIX_MQUEUE is not set
43CONFIG_BSD_PROCESS_ACCT=y
44# CONFIG_BSD_PROCESS_ACCT_V3 is not set
45# CONFIG_TASKSTATS is not set
46# CONFIG_AUDIT is not set
47# CONFIG_IKCONFIG is not set
48CONFIG_LOG_BUF_SHIFT=14
49# CONFIG_CGROUPS is not set
50CONFIG_GROUP_SCHED=y
51CONFIG_FAIR_GROUP_SCHED=y
52# CONFIG_RT_GROUP_SCHED is not set
53CONFIG_USER_SCHED=y
54# CONFIG_CGROUP_SCHED is not set
55CONFIG_SYSFS_DEPRECATED=y
56CONFIG_SYSFS_DEPRECATED_V2=y
57# CONFIG_RELAY is not set
58# CONFIG_NAMESPACES is not set
59CONFIG_BLK_DEV_INITRD=y
60CONFIG_INITRAMFS_SOURCE=""
61CONFIG_CC_OPTIMIZE_FOR_SIZE=y
62CONFIG_SYSCTL=y
63CONFIG_EMBEDDED=y
64CONFIG_UID16=y
65# CONFIG_SYSCTL_SYSCALL is not set
66CONFIG_KALLSYMS=y
67# CONFIG_KALLSYMS_ALL is not set
68CONFIG_KALLSYMS_EXTRA_PASS=y
69CONFIG_HOTPLUG=y
70CONFIG_PRINTK=y
71CONFIG_BUG=y
72CONFIG_ELF_CORE=y
73CONFIG_COMPAT_BRK=y
74CONFIG_BASE_FULL=y
75CONFIG_FUTEX=y
76CONFIG_ANON_INODES=y
77CONFIG_EPOLL=y
78CONFIG_SIGNALFD=y
79CONFIG_TIMERFD=y
80CONFIG_EVENTFD=y
81CONFIG_SHMEM=y
82CONFIG_VM_EVENT_COUNTERS=y
83CONFIG_SLAB=y
84# CONFIG_SLUB is not set
85# CONFIG_SLOB is not set
86# CONFIG_PROFILING is not set
87# CONFIG_MARKERS is not set
88CONFIG_HAVE_OPROFILE=y
89# CONFIG_KPROBES is not set
90# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
91# CONFIG_HAVE_IOREMAP_PROT is not set
92CONFIG_HAVE_KPROBES=y
93CONFIG_HAVE_KRETPROBES=y
94# CONFIG_HAVE_ARCH_TRACEHOOK is not set
95# CONFIG_HAVE_DMA_ATTRS is not set
96# CONFIG_USE_GENERIC_SMP_HELPERS is not set
97CONFIG_HAVE_CLK=y
98CONFIG_PROC_PAGE_MONITOR=y
99CONFIG_HAVE_GENERIC_DMA_COHERENT=y
100CONFIG_SLABINFO=y
101CONFIG_RT_MUTEXES=y
102# CONFIG_TINY_SHMEM is not set
103CONFIG_BASE_SMALL=0
104CONFIG_MODULES=y
105# CONFIG_MODULE_FORCE_LOAD is not set
106CONFIG_MODULE_UNLOAD=y
107# CONFIG_MODULE_FORCE_UNLOAD is not set
108CONFIG_MODVERSIONS=y
109CONFIG_MODULE_SRCVERSION_ALL=y
110CONFIG_KMOD=y
111CONFIG_BLOCK=y
112# CONFIG_LBD is not set
113# CONFIG_BLK_DEV_IO_TRACE is not set
114# CONFIG_LSF is not set
115# CONFIG_BLK_DEV_BSG is not set
116# CONFIG_BLK_DEV_INTEGRITY is not set
117
118#
119# IO Schedulers
120#
121CONFIG_IOSCHED_NOOP=y
122CONFIG_IOSCHED_AS=y
123CONFIG_IOSCHED_DEADLINE=y
124CONFIG_IOSCHED_CFQ=y
125CONFIG_DEFAULT_AS=y
126# CONFIG_DEFAULT_DEADLINE is not set
127# CONFIG_DEFAULT_CFQ is not set
128# CONFIG_DEFAULT_NOOP is not set
129CONFIG_DEFAULT_IOSCHED="anticipatory"
130CONFIG_CLASSIC_RCU=y
131
132#
133# System Type
134#
135# CONFIG_ARCH_AAEC2000 is not set
136# CONFIG_ARCH_INTEGRATOR is not set
137# CONFIG_ARCH_REALVIEW is not set
138# CONFIG_ARCH_VERSATILE is not set
139# CONFIG_ARCH_AT91 is not set
140# CONFIG_ARCH_CLPS7500 is not set
141# CONFIG_ARCH_CLPS711X is not set
142# CONFIG_ARCH_EBSA110 is not set
143# CONFIG_ARCH_EP93XX is not set
144# CONFIG_ARCH_FOOTBRIDGE is not set
145# CONFIG_ARCH_NETX is not set
146# CONFIG_ARCH_H720X is not set
147# CONFIG_ARCH_IMX is not set
148# CONFIG_ARCH_IOP13XX is not set
149# CONFIG_ARCH_IOP32X is not set
150# CONFIG_ARCH_IOP33X is not set
151# CONFIG_ARCH_IXP23XX is not set
152# CONFIG_ARCH_IXP2000 is not set
153# CONFIG_ARCH_IXP4XX is not set
154# CONFIG_ARCH_L7200 is not set
155# CONFIG_ARCH_KIRKWOOD is not set
156# CONFIG_ARCH_KS8695 is not set
157# CONFIG_ARCH_NS9XXX is not set
158# CONFIG_ARCH_LOKI is not set
159# CONFIG_ARCH_MV78XX0 is not set
160# CONFIG_ARCH_MXC is not set
161# CONFIG_ARCH_ORION5X is not set
162# CONFIG_ARCH_PNX4008 is not set
163# CONFIG_ARCH_PXA is not set
164# CONFIG_ARCH_RPC is not set
165# CONFIG_ARCH_SA1100 is not set
166# CONFIG_ARCH_S3C2410 is not set
167# CONFIG_ARCH_SHARK is not set
168# CONFIG_ARCH_LH7A40X is not set
169# CONFIG_ARCH_DAVINCI is not set
170CONFIG_ARCH_OMAP=y
171# CONFIG_ARCH_MSM7X00A is not set
172
173#
174# TI OMAP Implementations
175#
176CONFIG_ARCH_OMAP_OTG=y
177# CONFIG_ARCH_OMAP1 is not set
178# CONFIG_ARCH_OMAP2 is not set
179CONFIG_ARCH_OMAP3=y
180
181#
182# OMAP Feature Selections
183#
184# CONFIG_OMAP_DEBUG_POWERDOMAIN is not set
185# CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set
186# CONFIG_OMAP_RESET_CLOCKS is not set
187# CONFIG_OMAP_MUX is not set
188# CONFIG_OMAP_MCBSP is not set
189# CONFIG_OMAP_MPU_TIMER is not set
190CONFIG_OMAP_32K_TIMER=y
191CONFIG_OMAP_32K_TIMER_HZ=128
192CONFIG_OMAP_DM_TIMER=y
193# CONFIG_OMAP_LL_DEBUG_UART1 is not set
194# CONFIG_OMAP_LL_DEBUG_UART2 is not set
195CONFIG_OMAP_LL_DEBUG_UART3=y
196CONFIG_ARCH_OMAP34XX=y
197CONFIG_ARCH_OMAP3430=y
198
199#
200# OMAP Board Type
201#
202CONFIG_MACH_OMAP3_BEAGLE=y
203
204#
205# Boot options
206#
207
208#
209# Power management
210#
211
212#
213# Processor Type
214#
215CONFIG_CPU_32=y
216CONFIG_CPU_32v6K=y
217CONFIG_CPU_V7=y
218CONFIG_CPU_32v7=y
219CONFIG_CPU_ABRT_EV7=y
220CONFIG_CPU_PABRT_IFAR=y
221CONFIG_CPU_CACHE_V7=y
222CONFIG_CPU_CACHE_VIPT=y
223CONFIG_CPU_COPY_V6=y
224CONFIG_CPU_TLB_V7=y
225CONFIG_CPU_HAS_ASID=y
226CONFIG_CPU_CP15=y
227CONFIG_CPU_CP15_MMU=y
228
229#
230# Processor Features
231#
232CONFIG_ARM_THUMB=y
233# CONFIG_ARM_THUMBEE is not set
234# CONFIG_CPU_ICACHE_DISABLE is not set
235# CONFIG_CPU_DCACHE_DISABLE is not set
236# CONFIG_CPU_BPREDICT_DISABLE is not set
237CONFIG_HAS_TLS_REG=y
238# CONFIG_OUTER_CACHE is not set
239
240#
241# Bus support
242#
243# CONFIG_PCI_SYSCALL is not set
244# CONFIG_ARCH_SUPPORTS_MSI is not set
245# CONFIG_PCCARD is not set
246
247#
248# Kernel Features
249#
250CONFIG_TICK_ONESHOT=y
251CONFIG_NO_HZ=y
252CONFIG_HIGH_RES_TIMERS=y
253CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
254CONFIG_VMSPLIT_3G=y
255# CONFIG_VMSPLIT_2G is not set
256# CONFIG_VMSPLIT_1G is not set
257CONFIG_PAGE_OFFSET=0xC0000000
258# CONFIG_PREEMPT is not set
259CONFIG_HZ=128
260CONFIG_AEABI=y
261CONFIG_OABI_COMPAT=y
262CONFIG_ARCH_FLATMEM_HAS_HOLES=y
263# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
264CONFIG_SELECT_MEMORY_MODEL=y
265CONFIG_FLATMEM_MANUAL=y
266# CONFIG_DISCONTIGMEM_MANUAL is not set
267# CONFIG_SPARSEMEM_MANUAL is not set
268CONFIG_FLATMEM=y
269CONFIG_FLAT_NODE_MEM_MAP=y
270# CONFIG_SPARSEMEM_STATIC is not set
271# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
272CONFIG_PAGEFLAGS_EXTENDED=y
273CONFIG_SPLIT_PTLOCK_CPUS=4
274# CONFIG_RESOURCES_64BIT is not set
275CONFIG_ZONE_DMA_FLAG=1
276CONFIG_BOUNCE=y
277CONFIG_VIRT_TO_BUS=y
278# CONFIG_LEDS is not set
279CONFIG_ALIGNMENT_TRAP=y
280
281#
282# Boot options
283#
284CONFIG_ZBOOT_ROM_TEXT=0x0
285CONFIG_ZBOOT_ROM_BSS=0x0
286CONFIG_CMDLINE="root=/dev/nfs nfsroot=192.168.0.1:/home/user/buildroot ip=192.168.0.2:192.168.0.1:192.168.0.1:255.255.255.0:tgt:eth0:off rw console=ttyS2,115200n8"
287# CONFIG_XIP_KERNEL is not set
288# CONFIG_KEXEC is not set
289
290#
291# CPU Power Management
292#
293# CONFIG_CPU_FREQ is not set
294# CONFIG_CPU_IDLE is not set
295
296#
297# Floating point emulation
298#
299
300#
301# At least one emulation must be selected
302#
303CONFIG_FPE_NWFPE=y
304# CONFIG_FPE_NWFPE_XP is not set
305# CONFIG_FPE_FASTFPE is not set
306CONFIG_VFP=y
307CONFIG_VFPv3=y
308# CONFIG_NEON is not set
309
310#
311# Userspace binary formats
312#
313CONFIG_BINFMT_ELF=y
314# CONFIG_BINFMT_AOUT is not set
315CONFIG_BINFMT_MISC=y
316
317#
318# Power management options
319#
320# CONFIG_PM is not set
321CONFIG_ARCH_SUSPEND_POSSIBLE=y
322CONFIG_NET=y
323
324#
325# Networking options
326#
327CONFIG_PACKET=y
328# CONFIG_PACKET_MMAP is not set
329CONFIG_UNIX=y
330CONFIG_XFRM=y
331# CONFIG_XFRM_USER is not set
332# CONFIG_XFRM_SUB_POLICY is not set
333# CONFIG_XFRM_MIGRATE is not set
334# CONFIG_XFRM_STATISTICS is not set
335CONFIG_NET_KEY=y
336# CONFIG_NET_KEY_MIGRATE is not set
337CONFIG_INET=y
338# CONFIG_IP_MULTICAST is not set
339# CONFIG_IP_ADVANCED_ROUTER is not set
340CONFIG_IP_FIB_HASH=y
341CONFIG_IP_PNP=y
342CONFIG_IP_PNP_DHCP=y
343CONFIG_IP_PNP_BOOTP=y
344CONFIG_IP_PNP_RARP=y
345# CONFIG_NET_IPIP is not set
346# CONFIG_NET_IPGRE is not set
347# CONFIG_ARPD is not set
348# CONFIG_SYN_COOKIES is not set
349# CONFIG_INET_AH is not set
350# CONFIG_INET_ESP is not set
351# CONFIG_INET_IPCOMP is not set
352# CONFIG_INET_XFRM_TUNNEL is not set
353# CONFIG_INET_TUNNEL is not set
354CONFIG_INET_XFRM_MODE_TRANSPORT=y
355CONFIG_INET_XFRM_MODE_TUNNEL=y
356CONFIG_INET_XFRM_MODE_BEET=y
357# CONFIG_INET_LRO is not set
358CONFIG_INET_DIAG=y
359CONFIG_INET_TCP_DIAG=y
360# CONFIG_TCP_CONG_ADVANCED is not set
361CONFIG_TCP_CONG_CUBIC=y
362CONFIG_DEFAULT_TCP_CONG="cubic"
363# CONFIG_TCP_MD5SIG is not set
364# CONFIG_IPV6 is not set
365# CONFIG_NETWORK_SECMARK is not set
366# CONFIG_NETFILTER is not set
367# CONFIG_IP_DCCP is not set
368# CONFIG_IP_SCTP is not set
369# CONFIG_TIPC is not set
370# CONFIG_ATM is not set
371# CONFIG_BRIDGE is not set
372# CONFIG_VLAN_8021Q is not set
373# CONFIG_DECNET is not set
374# CONFIG_LLC2 is not set
375# CONFIG_IPX is not set
376# CONFIG_ATALK is not set
377# CONFIG_X25 is not set
378# CONFIG_LAPB is not set
379# CONFIG_ECONET is not set
380# CONFIG_WAN_ROUTER is not set
381# CONFIG_NET_SCHED is not set
382
383#
384# Network testing
385#
386# CONFIG_NET_PKTGEN is not set
387# CONFIG_HAMRADIO is not set
388# CONFIG_CAN is not set
389# CONFIG_IRDA is not set
390# CONFIG_BT is not set
391# CONFIG_AF_RXRPC is not set
392
393#
394# Wireless
395#
396# CONFIG_CFG80211 is not set
397# CONFIG_WIRELESS_EXT is not set
398# CONFIG_MAC80211 is not set
399# CONFIG_IEEE80211 is not set
400# CONFIG_RFKILL is not set
401# CONFIG_NET_9P is not set
402
403#
404# Device Drivers
405#
406
407#
408# Generic Driver Options
409#
410CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
411CONFIG_STANDALONE=y
412CONFIG_PREVENT_FIRMWARE_BUILD=y
413# CONFIG_FW_LOADER is not set
414# CONFIG_DEBUG_DRIVER is not set
415# CONFIG_DEBUG_DEVRES is not set
416# CONFIG_SYS_HYPERVISOR is not set
417# CONFIG_CONNECTOR is not set
418CONFIG_MTD=y
419# CONFIG_MTD_DEBUG is not set
420# CONFIG_MTD_CONCAT is not set
421CONFIG_MTD_PARTITIONS=y
422# CONFIG_MTD_REDBOOT_PARTS is not set
423# CONFIG_MTD_CMDLINE_PARTS is not set
424# CONFIG_MTD_AFS_PARTS is not set
425# CONFIG_MTD_AR7_PARTS is not set
426
427#
428# User Modules And Translation Layers
429#
430CONFIG_MTD_CHAR=y
431CONFIG_MTD_BLKDEVS=y
432CONFIG_MTD_BLOCK=y
433# CONFIG_FTL is not set
434# CONFIG_NFTL is not set
435# CONFIG_INFTL is not set
436# CONFIG_RFD_FTL is not set
437# CONFIG_SSFDC is not set
438# CONFIG_MTD_OOPS is not set
439
440#
441# RAM/ROM/Flash chip drivers
442#
443# CONFIG_MTD_CFI is not set
444# CONFIG_MTD_JEDECPROBE is not set
445CONFIG_MTD_MAP_BANK_WIDTH_1=y
446CONFIG_MTD_MAP_BANK_WIDTH_2=y
447CONFIG_MTD_MAP_BANK_WIDTH_4=y
448# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
449# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
450# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
451CONFIG_MTD_CFI_I1=y
452CONFIG_MTD_CFI_I2=y
453# CONFIG_MTD_CFI_I4 is not set
454# CONFIG_MTD_CFI_I8 is not set
455# CONFIG_MTD_RAM is not set
456# CONFIG_MTD_ROM is not set
457# CONFIG_MTD_ABSENT is not set
458
459#
460# Mapping drivers for chip access
461#
462# CONFIG_MTD_COMPLEX_MAPPINGS is not set
463# CONFIG_MTD_PLATRAM is not set
464
465#
466# Self-contained MTD device drivers
467#
468# CONFIG_MTD_SLRAM is not set
469# CONFIG_MTD_PHRAM is not set
470# CONFIG_MTD_MTDRAM is not set
471# CONFIG_MTD_BLOCK2MTD is not set
472
473#
474# Disk-On-Chip Device Drivers
475#
476# CONFIG_MTD_DOC2000 is not set
477# CONFIG_MTD_DOC2001 is not set
478# CONFIG_MTD_DOC2001PLUS is not set
479CONFIG_MTD_NAND=y
480# CONFIG_MTD_NAND_VERIFY_WRITE is not set
481# CONFIG_MTD_NAND_ECC_SMC is not set
482# CONFIG_MTD_NAND_MUSEUM_IDS is not set
483CONFIG_MTD_NAND_IDS=y
484# CONFIG_MTD_NAND_DISKONCHIP is not set
485# CONFIG_MTD_NAND_NANDSIM is not set
486# CONFIG_MTD_NAND_PLATFORM is not set
487# CONFIG_MTD_ALAUDA is not set
488# CONFIG_MTD_ONENAND is not set
489
490#
491# UBI - Unsorted block images
492#
493# CONFIG_MTD_UBI is not set
494# CONFIG_PARPORT is not set
495CONFIG_BLK_DEV=y
496# CONFIG_BLK_DEV_COW_COMMON is not set
497CONFIG_BLK_DEV_LOOP=y
498# CONFIG_BLK_DEV_CRYPTOLOOP is not set
499# CONFIG_BLK_DEV_NBD is not set
500# CONFIG_BLK_DEV_UB is not set
501CONFIG_BLK_DEV_RAM=y
502CONFIG_BLK_DEV_RAM_COUNT=16
503CONFIG_BLK_DEV_RAM_SIZE=16384
504# CONFIG_BLK_DEV_XIP is not set
505# CONFIG_CDROM_PKTCDVD is not set
506# CONFIG_ATA_OVER_ETH is not set
507# CONFIG_MISC_DEVICES is not set
508CONFIG_HAVE_IDE=y
509# CONFIG_IDE is not set
510
511#
512# SCSI device support
513#
514# CONFIG_RAID_ATTRS is not set
515CONFIG_SCSI=y
516CONFIG_SCSI_DMA=y
517# CONFIG_SCSI_TGT is not set
518# CONFIG_SCSI_NETLINK is not set
519CONFIG_SCSI_PROC_FS=y
520
521#
522# SCSI support type (disk, tape, CD-ROM)
523#
524CONFIG_BLK_DEV_SD=y
525# CONFIG_CHR_DEV_ST is not set
526# CONFIG_CHR_DEV_OSST is not set
527# CONFIG_BLK_DEV_SR is not set
528# CONFIG_CHR_DEV_SG is not set
529# CONFIG_CHR_DEV_SCH is not set
530
531#
532# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
533#
534# CONFIG_SCSI_MULTI_LUN is not set
535# CONFIG_SCSI_CONSTANTS is not set
536# CONFIG_SCSI_LOGGING is not set
537# CONFIG_SCSI_SCAN_ASYNC is not set
538CONFIG_SCSI_WAIT_SCAN=m
539
540#
541# SCSI Transports
542#
543# CONFIG_SCSI_SPI_ATTRS is not set
544# CONFIG_SCSI_FC_ATTRS is not set
545# CONFIG_SCSI_ISCSI_ATTRS is not set
546# CONFIG_SCSI_SAS_LIBSAS is not set
547# CONFIG_SCSI_SRP_ATTRS is not set
548CONFIG_SCSI_LOWLEVEL=y
549# CONFIG_ISCSI_TCP is not set
550# CONFIG_SCSI_DEBUG is not set
551# CONFIG_SCSI_DH is not set
552# CONFIG_ATA is not set
553# CONFIG_MD is not set
554CONFIG_NETDEVICES=y
555# CONFIG_DUMMY is not set
556# CONFIG_BONDING is not set
557# CONFIG_MACVLAN is not set
558# CONFIG_EQUALIZER is not set
559# CONFIG_TUN is not set
560# CONFIG_VETH is not set
561# CONFIG_NET_ETHERNET is not set
562# CONFIG_NETDEV_1000 is not set
563# CONFIG_NETDEV_10000 is not set
564
565#
566# Wireless LAN
567#
568# CONFIG_WLAN_PRE80211 is not set
569# CONFIG_WLAN_80211 is not set
570# CONFIG_IWLWIFI_LEDS is not set
571
572#
573# USB Network Adapters
574#
575# CONFIG_USB_CATC is not set
576# CONFIG_USB_KAWETH is not set
577# CONFIG_USB_PEGASUS is not set
578# CONFIG_USB_RTL8150 is not set
579# CONFIG_USB_USBNET is not set
580# CONFIG_WAN is not set
581# CONFIG_PPP is not set
582# CONFIG_SLIP is not set
583# CONFIG_NETCONSOLE is not set
584# CONFIG_NETPOLL is not set
585# CONFIG_NET_POLL_CONTROLLER is not set
586# CONFIG_ISDN is not set
587
588#
589# Input device support
590#
591CONFIG_INPUT=y
592# CONFIG_INPUT_FF_MEMLESS is not set
593# CONFIG_INPUT_POLLDEV is not set
594
595#
596# Userland interfaces
597#
598# CONFIG_INPUT_MOUSEDEV is not set
599# CONFIG_INPUT_JOYDEV is not set
600# CONFIG_INPUT_EVDEV is not set
601# CONFIG_INPUT_EVBUG is not set
602
603#
604# Input Device Drivers
605#
606# CONFIG_INPUT_KEYBOARD is not set
607# CONFIG_INPUT_MOUSE is not set
608# CONFIG_INPUT_JOYSTICK is not set
609# CONFIG_INPUT_TABLET is not set
610# CONFIG_INPUT_TOUCHSCREEN is not set
611# CONFIG_INPUT_MISC is not set
612
613#
614# Hardware I/O ports
615#
616# CONFIG_SERIO is not set
617# CONFIG_GAMEPORT is not set
618
619#
620# Character devices
621#
622CONFIG_VT=y
623CONFIG_CONSOLE_TRANSLATIONS=y
624CONFIG_VT_CONSOLE=y
625CONFIG_HW_CONSOLE=y
626# CONFIG_VT_HW_CONSOLE_BINDING is not set
627CONFIG_DEVKMEM=y
628# CONFIG_SERIAL_NONSTANDARD is not set
629
630#
631# Serial drivers
632#
633CONFIG_SERIAL_8250=y
634CONFIG_SERIAL_8250_CONSOLE=y
635CONFIG_SERIAL_8250_NR_UARTS=32
636CONFIG_SERIAL_8250_RUNTIME_UARTS=4
637CONFIG_SERIAL_8250_EXTENDED=y
638CONFIG_SERIAL_8250_MANY_PORTS=y
639CONFIG_SERIAL_8250_SHARE_IRQ=y
640CONFIG_SERIAL_8250_DETECT_IRQ=y
641CONFIG_SERIAL_8250_RSA=y
642
643#
644# Non-8250 serial port support
645#
646CONFIG_SERIAL_CORE=y
647CONFIG_SERIAL_CORE_CONSOLE=y
648CONFIG_UNIX98_PTYS=y
649# CONFIG_LEGACY_PTYS is not set
650# CONFIG_IPMI_HANDLER is not set
651CONFIG_HW_RANDOM=y
652# CONFIG_NVRAM is not set
653# CONFIG_R3964 is not set
654# CONFIG_RAW_DRIVER is not set
655# CONFIG_TCG_TPM is not set
656CONFIG_I2C=y
657CONFIG_I2C_BOARDINFO=y
658CONFIG_I2C_CHARDEV=y
659CONFIG_I2C_HELPER_AUTO=y
660
661#
662# I2C Hardware Bus support
663#
664
665#
666# I2C system bus drivers (mostly embedded / system-on-chip)
667#
668# CONFIG_I2C_GPIO is not set
669# CONFIG_I2C_OCORES is not set
670CONFIG_I2C_OMAP=y
671# CONFIG_I2C_SIMTEC is not set
672
673#
674# External I2C/SMBus adapter drivers
675#
676# CONFIG_I2C_PARPORT_LIGHT is not set
677# CONFIG_I2C_TAOS_EVM is not set
678# CONFIG_I2C_TINY_USB is not set
679
680#
681# Other I2C/SMBus bus drivers
682#
683# CONFIG_I2C_PCA_PLATFORM is not set
684# CONFIG_I2C_STUB is not set
685
686#
687# Miscellaneous I2C Chip support
688#
689# CONFIG_DS1682 is not set
690# CONFIG_AT24 is not set
691# CONFIG_SENSORS_EEPROM is not set
692# CONFIG_SENSORS_PCF8574 is not set
693# CONFIG_PCF8575 is not set
694# CONFIG_SENSORS_PCA9539 is not set
695# CONFIG_SENSORS_PCF8591 is not set
696# CONFIG_ISP1301_OMAP is not set
697# CONFIG_TPS65010 is not set
698# CONFIG_SENSORS_MAX6875 is not set
699# CONFIG_SENSORS_TSL2550 is not set
700# CONFIG_I2C_DEBUG_CORE is not set
701# CONFIG_I2C_DEBUG_ALGO is not set
702# CONFIG_I2C_DEBUG_BUS is not set
703# CONFIG_I2C_DEBUG_CHIP is not set
704# CONFIG_SPI is not set
705CONFIG_ARCH_REQUIRE_GPIOLIB=y
706CONFIG_GPIOLIB=y
707# CONFIG_DEBUG_GPIO is not set
708# CONFIG_GPIO_SYSFS is not set
709
710#
711# I2C GPIO expanders:
712#
713# CONFIG_GPIO_MAX732X is not set
714# CONFIG_GPIO_PCA953X is not set
715# CONFIG_GPIO_PCF857X is not set
716
717#
718# PCI GPIO expanders:
719#
720
721#
722# SPI GPIO expanders:
723#
724# CONFIG_W1 is not set
725# CONFIG_POWER_SUPPLY is not set
726# CONFIG_HWMON is not set
727# CONFIG_THERMAL is not set
728# CONFIG_THERMAL_HWMON is not set
729# CONFIG_WATCHDOG is not set
730
731#
732# Sonics Silicon Backplane
733#
734CONFIG_SSB_POSSIBLE=y
735# CONFIG_SSB is not set
736
737#
738# Multifunction device drivers
739#
740# CONFIG_MFD_CORE is not set
741# CONFIG_MFD_SM501 is not set
742# CONFIG_HTC_EGPIO is not set
743# CONFIG_HTC_PASIC3 is not set
744# CONFIG_UCB1400_CORE is not set
745# CONFIG_MFD_TMIO is not set
746# CONFIG_MFD_T7L66XB is not set
747# CONFIG_MFD_TC6387XB is not set
748# CONFIG_MFD_TC6393XB is not set
749
750#
751# Multimedia devices
752#
753
754#
755# Multimedia core support
756#
757# CONFIG_VIDEO_DEV is not set
758# CONFIG_DVB_CORE is not set
759# CONFIG_VIDEO_MEDIA is not set
760
761#
762# Multimedia drivers
763#
764CONFIG_DAB=y
765# CONFIG_USB_DABUSB is not set
766
767#
768# Graphics support
769#
770# CONFIG_VGASTATE is not set
771# CONFIG_VIDEO_OUTPUT_CONTROL is not set
772# CONFIG_FB is not set
773# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
774
775#
776# Display device support
777#
778# CONFIG_DISPLAY_SUPPORT is not set
779
780#
781# Console display driver support
782#
783# CONFIG_VGA_CONSOLE is not set
784CONFIG_DUMMY_CONSOLE=y
785# CONFIG_SOUND is not set
786# CONFIG_HID_SUPPORT is not set
787CONFIG_USB_SUPPORT=y
788CONFIG_USB_ARCH_HAS_HCD=y
789CONFIG_USB_ARCH_HAS_OHCI=y
790# CONFIG_USB_ARCH_HAS_EHCI is not set
791CONFIG_USB=y
792# CONFIG_USB_DEBUG is not set
793# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
794
795#
796# Miscellaneous USB options
797#
798CONFIG_USB_DEVICEFS=y
799CONFIG_USB_DEVICE_CLASS=y
800# CONFIG_USB_DYNAMIC_MINORS is not set
801# CONFIG_USB_OTG is not set
802# CONFIG_USB_OTG_WHITELIST is not set
803# CONFIG_USB_OTG_BLACKLIST_HUB is not set
804CONFIG_USB_MON=y
805
806#
807# USB Host Controller Drivers
808#
809# CONFIG_USB_C67X00_HCD is not set
810# CONFIG_USB_ISP116X_HCD is not set
811# CONFIG_USB_ISP1760_HCD is not set
812# CONFIG_USB_OHCI_HCD is not set
813# CONFIG_USB_SL811_HCD is not set
814# CONFIG_USB_R8A66597_HCD is not set
815CONFIG_USB_MUSB_HDRC=y
816CONFIG_USB_MUSB_SOC=y
817
818#
819# OMAP 343x high speed USB support
820#
821CONFIG_USB_MUSB_HOST=y
822# CONFIG_USB_MUSB_PERIPHERAL is not set
823# CONFIG_USB_MUSB_OTG is not set
824# CONFIG_USB_GADGET_MUSB_HDRC is not set
825CONFIG_USB_MUSB_HDRC_HCD=y
826# CONFIG_MUSB_PIO_ONLY is not set
827CONFIG_USB_INVENTRA_DMA=y
828# CONFIG_USB_TI_CPPI_DMA is not set
829# CONFIG_USB_MUSB_DEBUG is not set
830
831#
832# USB Device Class drivers
833#
834# CONFIG_USB_ACM is not set
835# CONFIG_USB_PRINTER is not set
836# CONFIG_USB_WDM is not set
837
838#
839# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
840#
841
842#
843# may also be needed; see USB_STORAGE Help for more information
844#
845# CONFIG_USB_STORAGE is not set
846# CONFIG_USB_LIBUSUAL is not set
847
848#
849# USB Imaging devices
850#
851# CONFIG_USB_MDC800 is not set
852# CONFIG_USB_MICROTEK is not set
853
854#
855# USB port drivers
856#
857# CONFIG_USB_SERIAL is not set
858
859#
860# USB Miscellaneous drivers
861#
862# CONFIG_USB_EMI62 is not set
863# CONFIG_USB_EMI26 is not set
864# CONFIG_USB_ADUTUX is not set
865# CONFIG_USB_RIO500 is not set
866# CONFIG_USB_LEGOTOWER is not set
867# CONFIG_USB_LCD is not set
868# CONFIG_USB_BERRY_CHARGE is not set
869# CONFIG_USB_LED is not set
870# CONFIG_USB_CYPRESS_CY7C63 is not set
871# CONFIG_USB_CYTHERM is not set
872# CONFIG_USB_PHIDGET is not set
873# CONFIG_USB_IDMOUSE is not set
874# CONFIG_USB_FTDI_ELAN is not set
875# CONFIG_USB_APPLEDISPLAY is not set
876# CONFIG_USB_LD is not set
877# CONFIG_USB_TRANCEVIBRATOR is not set
878# CONFIG_USB_IOWARRIOR is not set
879# CONFIG_USB_TEST is not set
880# CONFIG_USB_ISIGHTFW is not set
881CONFIG_USB_GADGET=y
882# CONFIG_USB_GADGET_DEBUG is not set
883# CONFIG_USB_GADGET_DEBUG_FILES is not set
884CONFIG_USB_GADGET_SELECTED=y
885# CONFIG_USB_GADGET_AMD5536UDC is not set
886# CONFIG_USB_GADGET_ATMEL_USBA is not set
887# CONFIG_USB_GADGET_FSL_USB2 is not set
888# CONFIG_USB_GADGET_NET2280 is not set
889# CONFIG_USB_GADGET_PXA25X is not set
890CONFIG_USB_GADGET_M66592=y
891CONFIG_USB_M66592=y
892# CONFIG_USB_GADGET_PXA27X is not set
893# CONFIG_USB_GADGET_GOKU is not set
894# CONFIG_USB_GADGET_LH7A40X is not set
895# CONFIG_USB_GADGET_OMAP is not set
896# CONFIG_USB_GADGET_S3C2410 is not set
897# CONFIG_USB_GADGET_AT91 is not set
898# CONFIG_USB_GADGET_DUMMY_HCD is not set
899CONFIG_USB_GADGET_DUALSPEED=y
900# CONFIG_USB_ZERO is not set
901CONFIG_USB_ETH=m
902CONFIG_USB_ETH_RNDIS=y
903# CONFIG_USB_GADGETFS is not set
904# CONFIG_USB_FILE_STORAGE is not set
905# CONFIG_USB_G_SERIAL is not set
906# CONFIG_USB_MIDI_GADGET is not set
907# CONFIG_USB_G_PRINTER is not set
908# CONFIG_USB_CDC_COMPOSITE is not set
909CONFIG_MMC=y
910# CONFIG_MMC_DEBUG is not set
911# CONFIG_MMC_UNSAFE_RESUME is not set
912
913#
914# MMC/SD Card Drivers
915#
916CONFIG_MMC_BLOCK=y
917CONFIG_MMC_BLOCK_BOUNCE=y
918# CONFIG_SDIO_UART is not set
919# CONFIG_MMC_TEST is not set
920
921#
922# MMC/SD Host Controller Drivers
923#
924# CONFIG_MMC_SDHCI is not set
925# CONFIG_MMC_OMAP is not set
926# CONFIG_MEMSTICK is not set
927# CONFIG_ACCESSIBILITY is not set
928# CONFIG_NEW_LEDS is not set
929CONFIG_RTC_LIB=y
930CONFIG_RTC_CLASS=y
931CONFIG_RTC_HCTOSYS=y
932CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
933# CONFIG_RTC_DEBUG is not set
934
935#
936# RTC interfaces
937#
938CONFIG_RTC_INTF_SYSFS=y
939CONFIG_RTC_INTF_PROC=y
940CONFIG_RTC_INTF_DEV=y
941# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
942# CONFIG_RTC_DRV_TEST is not set
943
944#
945# I2C RTC drivers
946#
947# CONFIG_RTC_DRV_DS1307 is not set
948# CONFIG_RTC_DRV_DS1374 is not set
949# CONFIG_RTC_DRV_DS1672 is not set
950# CONFIG_RTC_DRV_MAX6900 is not set
951# CONFIG_RTC_DRV_RS5C372 is not set
952# CONFIG_RTC_DRV_ISL1208 is not set
953# CONFIG_RTC_DRV_X1205 is not set
954# CONFIG_RTC_DRV_PCF8563 is not set
955# CONFIG_RTC_DRV_PCF8583 is not set
956# CONFIG_RTC_DRV_M41T80 is not set
957# CONFIG_RTC_DRV_S35390A is not set
958# CONFIG_RTC_DRV_FM3130 is not set
959
960#
961# SPI RTC drivers
962#
963
964#
965# Platform RTC drivers
966#
967# CONFIG_RTC_DRV_CMOS is not set
968# CONFIG_RTC_DRV_DS1511 is not set
969# CONFIG_RTC_DRV_DS1553 is not set
970# CONFIG_RTC_DRV_DS1742 is not set
971# CONFIG_RTC_DRV_STK17TA8 is not set
972# CONFIG_RTC_DRV_M48T86 is not set
973# CONFIG_RTC_DRV_M48T59 is not set
974# CONFIG_RTC_DRV_V3020 is not set
975
976#
977# on-CPU RTC drivers
978#
979# CONFIG_DMADEVICES is not set
980
981#
982# Voltage and Current regulators
983#
984# CONFIG_REGULATOR is not set
985# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
986# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
987# CONFIG_REGULATOR_BQ24022 is not set
988# CONFIG_UIO is not set
989
990#
991# File systems
992#
993CONFIG_EXT2_FS=y
994# CONFIG_EXT2_FS_XATTR is not set
995# CONFIG_EXT2_FS_XIP is not set
996CONFIG_EXT3_FS=y
997# CONFIG_EXT3_FS_XATTR is not set
998# CONFIG_EXT4DEV_FS is not set
999CONFIG_JBD=y
1000# CONFIG_REISERFS_FS is not set
1001# CONFIG_JFS_FS is not set
1002# CONFIG_FS_POSIX_ACL is not set
1003# CONFIG_XFS_FS is not set
1004# CONFIG_OCFS2_FS is not set
1005CONFIG_DNOTIFY=y
1006CONFIG_INOTIFY=y
1007CONFIG_INOTIFY_USER=y
1008CONFIG_QUOTA=y
1009# CONFIG_QUOTA_NETLINK_INTERFACE is not set
1010CONFIG_PRINT_QUOTA_WARNING=y
1011# CONFIG_QFMT_V1 is not set
1012CONFIG_QFMT_V2=y
1013CONFIG_QUOTACTL=y
1014# CONFIG_AUTOFS_FS is not set
1015# CONFIG_AUTOFS4_FS is not set
1016# CONFIG_FUSE_FS is not set
1017
1018#
1019# CD-ROM/DVD Filesystems
1020#
1021# CONFIG_ISO9660_FS is not set
1022# CONFIG_UDF_FS is not set
1023
1024#
1025# DOS/FAT/NT Filesystems
1026#
1027CONFIG_FAT_FS=y
1028CONFIG_MSDOS_FS=y
1029CONFIG_VFAT_FS=y
1030CONFIG_FAT_DEFAULT_CODEPAGE=437
1031CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1032# CONFIG_NTFS_FS is not set
1033
1034#
1035# Pseudo filesystems
1036#
1037CONFIG_PROC_FS=y
1038CONFIG_PROC_SYSCTL=y
1039CONFIG_SYSFS=y
1040CONFIG_TMPFS=y
1041# CONFIG_TMPFS_POSIX_ACL is not set
1042# CONFIG_HUGETLB_PAGE is not set
1043# CONFIG_CONFIGFS_FS is not set
1044
1045#
1046# Miscellaneous filesystems
1047#
1048# CONFIG_ADFS_FS is not set
1049# CONFIG_AFFS_FS is not set
1050# CONFIG_HFS_FS is not set
1051# CONFIG_HFSPLUS_FS is not set
1052# CONFIG_BEFS_FS is not set
1053# CONFIG_BFS_FS is not set
1054# CONFIG_EFS_FS is not set
1055CONFIG_JFFS2_FS=y
1056CONFIG_JFFS2_FS_DEBUG=0
1057CONFIG_JFFS2_FS_WRITEBUFFER=y
1058# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
1059# CONFIG_JFFS2_SUMMARY is not set
1060# CONFIG_JFFS2_FS_XATTR is not set
1061# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
1062CONFIG_JFFS2_ZLIB=y
1063# CONFIG_JFFS2_LZO is not set
1064CONFIG_JFFS2_RTIME=y
1065# CONFIG_JFFS2_RUBIN is not set
1066# CONFIG_CRAMFS is not set
1067# CONFIG_VXFS_FS is not set
1068# CONFIG_MINIX_FS is not set
1069# CONFIG_OMFS_FS is not set
1070# CONFIG_HPFS_FS is not set
1071# CONFIG_QNX4FS_FS is not set
1072# CONFIG_ROMFS_FS is not set
1073# CONFIG_SYSV_FS is not set
1074# CONFIG_UFS_FS is not set
1075CONFIG_NETWORK_FILESYSTEMS=y
1076CONFIG_NFS_FS=y
1077CONFIG_NFS_V3=y
1078# CONFIG_NFS_V3_ACL is not set
1079CONFIG_NFS_V4=y
1080CONFIG_ROOT_NFS=y
1081# CONFIG_NFSD is not set
1082CONFIG_LOCKD=y
1083CONFIG_LOCKD_V4=y
1084CONFIG_NFS_COMMON=y
1085CONFIG_SUNRPC=y
1086CONFIG_SUNRPC_GSS=y
1087CONFIG_RPCSEC_GSS_KRB5=y
1088# CONFIG_RPCSEC_GSS_SPKM3 is not set
1089# CONFIG_SMB_FS is not set
1090# CONFIG_CIFS is not set
1091# CONFIG_NCP_FS is not set
1092# CONFIG_CODA_FS is not set
1093# CONFIG_AFS_FS is not set
1094
1095#
1096# Partition Types
1097#
1098CONFIG_PARTITION_ADVANCED=y
1099# CONFIG_ACORN_PARTITION is not set
1100# CONFIG_OSF_PARTITION is not set
1101# CONFIG_AMIGA_PARTITION is not set
1102# CONFIG_ATARI_PARTITION is not set
1103# CONFIG_MAC_PARTITION is not set
1104CONFIG_MSDOS_PARTITION=y
1105# CONFIG_BSD_DISKLABEL is not set
1106# CONFIG_MINIX_SUBPARTITION is not set
1107# CONFIG_SOLARIS_X86_PARTITION is not set
1108# CONFIG_UNIXWARE_DISKLABEL is not set
1109# CONFIG_LDM_PARTITION is not set
1110# CONFIG_SGI_PARTITION is not set
1111# CONFIG_ULTRIX_PARTITION is not set
1112# CONFIG_SUN_PARTITION is not set
1113# CONFIG_KARMA_PARTITION is not set
1114# CONFIG_EFI_PARTITION is not set
1115# CONFIG_SYSV68_PARTITION is not set
1116CONFIG_NLS=y
1117CONFIG_NLS_DEFAULT="iso8859-1"
1118CONFIG_NLS_CODEPAGE_437=y
1119# CONFIG_NLS_CODEPAGE_737 is not set
1120# CONFIG_NLS_CODEPAGE_775 is not set
1121# CONFIG_NLS_CODEPAGE_850 is not set
1122# CONFIG_NLS_CODEPAGE_852 is not set
1123# CONFIG_NLS_CODEPAGE_855 is not set
1124# CONFIG_NLS_CODEPAGE_857 is not set
1125# CONFIG_NLS_CODEPAGE_860 is not set
1126# CONFIG_NLS_CODEPAGE_861 is not set
1127# CONFIG_NLS_CODEPAGE_862 is not set
1128# CONFIG_NLS_CODEPAGE_863 is not set
1129# CONFIG_NLS_CODEPAGE_864 is not set
1130# CONFIG_NLS_CODEPAGE_865 is not set
1131# CONFIG_NLS_CODEPAGE_866 is not set
1132# CONFIG_NLS_CODEPAGE_869 is not set
1133# CONFIG_NLS_CODEPAGE_936 is not set
1134# CONFIG_NLS_CODEPAGE_950 is not set
1135# CONFIG_NLS_CODEPAGE_932 is not set
1136# CONFIG_NLS_CODEPAGE_949 is not set
1137# CONFIG_NLS_CODEPAGE_874 is not set
1138# CONFIG_NLS_ISO8859_8 is not set
1139# CONFIG_NLS_CODEPAGE_1250 is not set
1140# CONFIG_NLS_CODEPAGE_1251 is not set
1141# CONFIG_NLS_ASCII is not set
1142CONFIG_NLS_ISO8859_1=y
1143# CONFIG_NLS_ISO8859_2 is not set
1144# CONFIG_NLS_ISO8859_3 is not set
1145# CONFIG_NLS_ISO8859_4 is not set
1146# CONFIG_NLS_ISO8859_5 is not set
1147# CONFIG_NLS_ISO8859_6 is not set
1148# CONFIG_NLS_ISO8859_7 is not set
1149# CONFIG_NLS_ISO8859_9 is not set
1150# CONFIG_NLS_ISO8859_13 is not set
1151# CONFIG_NLS_ISO8859_14 is not set
1152# CONFIG_NLS_ISO8859_15 is not set
1153# CONFIG_NLS_KOI8_R is not set
1154# CONFIG_NLS_KOI8_U is not set
1155# CONFIG_NLS_UTF8 is not set
1156# CONFIG_DLM is not set
1157
1158#
1159# Kernel hacking
1160#
1161# CONFIG_PRINTK_TIME is not set
1162CONFIG_ENABLE_WARN_DEPRECATED=y
1163CONFIG_ENABLE_MUST_CHECK=y
1164CONFIG_FRAME_WARN=1024
1165CONFIG_MAGIC_SYSRQ=y
1166# CONFIG_UNUSED_SYMBOLS is not set
1167# CONFIG_DEBUG_FS is not set
1168# CONFIG_HEADERS_CHECK is not set
1169CONFIG_DEBUG_KERNEL=y
1170# CONFIG_DEBUG_SHIRQ is not set
1171CONFIG_DETECT_SOFTLOCKUP=y
1172# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
1173CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
1174CONFIG_SCHED_DEBUG=y
1175# CONFIG_SCHEDSTATS is not set
1176# CONFIG_TIMER_STATS is not set
1177# CONFIG_DEBUG_OBJECTS is not set
1178# CONFIG_DEBUG_SLAB is not set
1179# CONFIG_DEBUG_RT_MUTEXES is not set
1180# CONFIG_RT_MUTEX_TESTER is not set
1181# CONFIG_DEBUG_SPINLOCK is not set
1182CONFIG_DEBUG_MUTEXES=y
1183# CONFIG_DEBUG_LOCK_ALLOC is not set
1184# CONFIG_PROVE_LOCKING is not set
1185# CONFIG_LOCK_STAT is not set
1186# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1187# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1188# CONFIG_DEBUG_KOBJECT is not set
1189# CONFIG_DEBUG_BUGVERBOSE is not set
1190CONFIG_DEBUG_INFO=y
1191# CONFIG_DEBUG_VM is not set
1192# CONFIG_DEBUG_WRITECOUNT is not set
1193# CONFIG_DEBUG_MEMORY_INIT is not set
1194# CONFIG_DEBUG_LIST is not set
1195# CONFIG_DEBUG_SG is not set
1196CONFIG_FRAME_POINTER=y
1197# CONFIG_BOOT_PRINTK_DELAY is not set
1198# CONFIG_RCU_TORTURE_TEST is not set
1199# CONFIG_BACKTRACE_SELF_TEST is not set
1200# CONFIG_FAULT_INJECTION is not set
1201# CONFIG_LATENCYTOP is not set
1202CONFIG_HAVE_FTRACE=y
1203CONFIG_HAVE_DYNAMIC_FTRACE=y
1204# CONFIG_FTRACE is not set
1205# CONFIG_IRQSOFF_TRACER is not set
1206# CONFIG_SCHED_TRACER is not set
1207# CONFIG_CONTEXT_SWITCH_TRACER is not set
1208# CONFIG_SAMPLES is not set
1209CONFIG_HAVE_ARCH_KGDB=y
1210# CONFIG_KGDB is not set
1211# CONFIG_DEBUG_USER is not set
1212# CONFIG_DEBUG_ERRORS is not set
1213# CONFIG_DEBUG_STACK_USAGE is not set
1214# CONFIG_DEBUG_LL is not set
1215
1216#
1217# Security options
1218#
1219# CONFIG_KEYS is not set
1220# CONFIG_SECURITY is not set
1221# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1222CONFIG_CRYPTO=y
1223
1224#
1225# Crypto core or helper
1226#
1227CONFIG_CRYPTO_ALGAPI=y
1228CONFIG_CRYPTO_BLKCIPHER=y
1229CONFIG_CRYPTO_MANAGER=y
1230# CONFIG_CRYPTO_GF128MUL is not set
1231# CONFIG_CRYPTO_NULL is not set
1232# CONFIG_CRYPTO_CRYPTD is not set
1233# CONFIG_CRYPTO_AUTHENC is not set
1234# CONFIG_CRYPTO_TEST is not set
1235
1236#
1237# Authenticated Encryption with Associated Data
1238#
1239# CONFIG_CRYPTO_CCM is not set
1240# CONFIG_CRYPTO_GCM is not set
1241# CONFIG_CRYPTO_SEQIV is not set
1242
1243#
1244# Block modes
1245#
1246CONFIG_CRYPTO_CBC=y
1247# CONFIG_CRYPTO_CTR is not set
1248# CONFIG_CRYPTO_CTS is not set
1249CONFIG_CRYPTO_ECB=m
1250# CONFIG_CRYPTO_LRW is not set
1251CONFIG_CRYPTO_PCBC=m
1252# CONFIG_CRYPTO_XTS is not set
1253
1254#
1255# Hash modes
1256#
1257# CONFIG_CRYPTO_HMAC is not set
1258# CONFIG_CRYPTO_XCBC is not set
1259
1260#
1261# Digest
1262#
1263# CONFIG_CRYPTO_CRC32C is not set
1264# CONFIG_CRYPTO_MD4 is not set
1265CONFIG_CRYPTO_MD5=y
1266# CONFIG_CRYPTO_MICHAEL_MIC is not set
1267# CONFIG_CRYPTO_RMD128 is not set
1268# CONFIG_CRYPTO_RMD160 is not set
1269# CONFIG_CRYPTO_RMD256 is not set
1270# CONFIG_CRYPTO_RMD320 is not set
1271# CONFIG_CRYPTO_SHA1 is not set
1272# CONFIG_CRYPTO_SHA256 is not set
1273# CONFIG_CRYPTO_SHA512 is not set
1274# CONFIG_CRYPTO_TGR192 is not set
1275# CONFIG_CRYPTO_WP512 is not set
1276
1277#
1278# Ciphers
1279#
1280# CONFIG_CRYPTO_AES is not set
1281# CONFIG_CRYPTO_ANUBIS is not set
1282# CONFIG_CRYPTO_ARC4 is not set
1283# CONFIG_CRYPTO_BLOWFISH is not set
1284# CONFIG_CRYPTO_CAMELLIA is not set
1285# CONFIG_CRYPTO_CAST5 is not set
1286# CONFIG_CRYPTO_CAST6 is not set
1287CONFIG_CRYPTO_DES=y
1288# CONFIG_CRYPTO_FCRYPT is not set
1289# CONFIG_CRYPTO_KHAZAD is not set
1290# CONFIG_CRYPTO_SALSA20 is not set
1291# CONFIG_CRYPTO_SEED is not set
1292# CONFIG_CRYPTO_SERPENT is not set
1293# CONFIG_CRYPTO_TEA is not set
1294# CONFIG_CRYPTO_TWOFISH is not set
1295
1296#
1297# Compression
1298#
1299# CONFIG_CRYPTO_DEFLATE is not set
1300# CONFIG_CRYPTO_LZO is not set
1301CONFIG_CRYPTO_HW=y
1302
1303#
1304# Library routines
1305#
1306CONFIG_BITREVERSE=y
1307# CONFIG_GENERIC_FIND_FIRST_BIT is not set
1308# CONFIG_GENERIC_FIND_NEXT_BIT is not set
1309CONFIG_CRC_CCITT=y
1310# CONFIG_CRC16 is not set
1311# CONFIG_CRC_T10DIF is not set
1312# CONFIG_CRC_ITU_T is not set
1313CONFIG_CRC32=y
1314# CONFIG_CRC7 is not set
1315CONFIG_LIBCRC32C=y
1316CONFIG_ZLIB_INFLATE=y
1317CONFIG_ZLIB_DEFLATE=y
1318CONFIG_PLIST=y
1319CONFIG_HAS_IOMEM=y
1320CONFIG_HAS_IOPORT=y
1321CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/omap_ldp_defconfig b/arch/arm/configs/omap_ldp_defconfig
new file mode 100644
index 000000000000..948a212fb1cc
--- /dev/null
+++ b/arch/arm/configs/omap_ldp_defconfig
@@ -0,0 +1,1044 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.27-rc5
4# Fri Oct 10 11:49:41 2008
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_MMU=y
12# CONFIG_NO_IOPORT is not set
13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_HAVE_LATENCYTOP_SUPPORT=y
16CONFIG_LOCKDEP_SUPPORT=y
17CONFIG_TRACE_IRQFLAGS_SUPPORT=y
18CONFIG_HARDIRQS_SW_RESEND=y
19CONFIG_GENERIC_IRQ_PROBE=y
20CONFIG_RWSEM_GENERIC_SPINLOCK=y
21# CONFIG_ARCH_HAS_ILOG2_U32 is not set
22# CONFIG_ARCH_HAS_ILOG2_U64 is not set
23CONFIG_GENERIC_HWEIGHT=y
24CONFIG_GENERIC_CALIBRATE_DELAY=y
25CONFIG_ARCH_SUPPORTS_AOUT=y
26CONFIG_ZONE_DMA=y
27CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
28CONFIG_VECTORS_BASE=0xffff0000
29CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
30
31#
32# General setup
33#
34CONFIG_EXPERIMENTAL=y
35CONFIG_BROKEN_ON_SMP=y
36CONFIG_INIT_ENV_ARG_LIMIT=32
37CONFIG_LOCALVERSION=""
38CONFIG_LOCALVERSION_AUTO=y
39CONFIG_SWAP=y
40CONFIG_SYSVIPC=y
41CONFIG_SYSVIPC_SYSCTL=y
42CONFIG_BSD_PROCESS_ACCT=y
43# CONFIG_BSD_PROCESS_ACCT_V3 is not set
44# CONFIG_IKCONFIG is not set
45CONFIG_LOG_BUF_SHIFT=14
46# CONFIG_CGROUPS is not set
47CONFIG_GROUP_SCHED=y
48CONFIG_FAIR_GROUP_SCHED=y
49# CONFIG_RT_GROUP_SCHED is not set
50CONFIG_USER_SCHED=y
51# CONFIG_CGROUP_SCHED is not set
52CONFIG_SYSFS_DEPRECATED=y
53CONFIG_SYSFS_DEPRECATED_V2=y
54# CONFIG_RELAY is not set
55# CONFIG_NAMESPACES is not set
56CONFIG_BLK_DEV_INITRD=y
57CONFIG_INITRAMFS_SOURCE=""
58CONFIG_CC_OPTIMIZE_FOR_SIZE=y
59CONFIG_SYSCTL=y
60CONFIG_EMBEDDED=y
61CONFIG_UID16=y
62# CONFIG_SYSCTL_SYSCALL is not set
63CONFIG_KALLSYMS=y
64# CONFIG_KALLSYMS_ALL is not set
65CONFIG_KALLSYMS_EXTRA_PASS=y
66CONFIG_HOTPLUG=y
67CONFIG_PRINTK=y
68CONFIG_BUG=y
69CONFIG_ELF_CORE=y
70CONFIG_COMPAT_BRK=y
71CONFIG_BASE_FULL=y
72CONFIG_FUTEX=y
73CONFIG_ANON_INODES=y
74CONFIG_EPOLL=y
75CONFIG_SIGNALFD=y
76CONFIG_TIMERFD=y
77CONFIG_EVENTFD=y
78CONFIG_SHMEM=y
79CONFIG_VM_EVENT_COUNTERS=y
80CONFIG_SLAB=y
81# CONFIG_SLUB is not set
82# CONFIG_SLOB is not set
83# CONFIG_PROFILING is not set
84# CONFIG_MARKERS is not set
85CONFIG_HAVE_OPROFILE=y
86# CONFIG_KPROBES is not set
87# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
88# CONFIG_HAVE_IOREMAP_PROT is not set
89CONFIG_HAVE_KPROBES=y
90CONFIG_HAVE_KRETPROBES=y
91# CONFIG_HAVE_ARCH_TRACEHOOK is not set
92# CONFIG_HAVE_DMA_ATTRS is not set
93# CONFIG_USE_GENERIC_SMP_HELPERS is not set
94CONFIG_HAVE_CLK=y
95CONFIG_PROC_PAGE_MONITOR=y
96CONFIG_HAVE_GENERIC_DMA_COHERENT=y
97CONFIG_SLABINFO=y
98CONFIG_RT_MUTEXES=y
99# CONFIG_TINY_SHMEM is not set
100CONFIG_BASE_SMALL=0
101CONFIG_MODULES=y
102# CONFIG_MODULE_FORCE_LOAD is not set
103CONFIG_MODULE_UNLOAD=y
104# CONFIG_MODULE_FORCE_UNLOAD is not set
105CONFIG_MODVERSIONS=y
106CONFIG_MODULE_SRCVERSION_ALL=y
107CONFIG_KMOD=y
108CONFIG_BLOCK=y
109# CONFIG_LBD is not set
110# CONFIG_BLK_DEV_IO_TRACE is not set
111# CONFIG_LSF is not set
112# CONFIG_BLK_DEV_BSG is not set
113# CONFIG_BLK_DEV_INTEGRITY is not set
114
115#
116# IO Schedulers
117#
118CONFIG_IOSCHED_NOOP=y
119CONFIG_IOSCHED_AS=y
120CONFIG_IOSCHED_DEADLINE=y
121CONFIG_IOSCHED_CFQ=y
122CONFIG_DEFAULT_AS=y
123# CONFIG_DEFAULT_DEADLINE is not set
124# CONFIG_DEFAULT_CFQ is not set
125# CONFIG_DEFAULT_NOOP is not set
126CONFIG_DEFAULT_IOSCHED="anticipatory"
127CONFIG_CLASSIC_RCU=y
128
129#
130# System Type
131#
132# CONFIG_ARCH_AAEC2000 is not set
133# CONFIG_ARCH_INTEGRATOR is not set
134# CONFIG_ARCH_REALVIEW is not set
135# CONFIG_ARCH_VERSATILE is not set
136# CONFIG_ARCH_AT91 is not set
137# CONFIG_ARCH_CLPS7500 is not set
138# CONFIG_ARCH_CLPS711X is not set
139# CONFIG_ARCH_EBSA110 is not set
140# CONFIG_ARCH_EP93XX is not set
141# CONFIG_ARCH_FOOTBRIDGE is not set
142# CONFIG_ARCH_NETX is not set
143# CONFIG_ARCH_H720X is not set
144# CONFIG_ARCH_IMX is not set
145# CONFIG_ARCH_IOP13XX is not set
146# CONFIG_ARCH_IOP32X is not set
147# CONFIG_ARCH_IOP33X is not set
148# CONFIG_ARCH_IXP23XX is not set
149# CONFIG_ARCH_IXP2000 is not set
150# CONFIG_ARCH_IXP4XX is not set
151# CONFIG_ARCH_L7200 is not set
152# CONFIG_ARCH_KIRKWOOD is not set
153# CONFIG_ARCH_KS8695 is not set
154# CONFIG_ARCH_NS9XXX is not set
155# CONFIG_ARCH_LOKI is not set
156# CONFIG_ARCH_MV78XX0 is not set
157# CONFIG_ARCH_MXC is not set
158# CONFIG_ARCH_ORION5X is not set
159# CONFIG_ARCH_PNX4008 is not set
160# CONFIG_ARCH_PXA is not set
161# CONFIG_ARCH_RPC is not set
162# CONFIG_ARCH_SA1100 is not set
163# CONFIG_ARCH_S3C2410 is not set
164# CONFIG_ARCH_SHARK is not set
165# CONFIG_ARCH_LH7A40X is not set
166# CONFIG_ARCH_DAVINCI is not set
167CONFIG_ARCH_OMAP=y
168# CONFIG_ARCH_MSM7X00A is not set
169
170#
171# TI OMAP Implementations
172#
173CONFIG_ARCH_OMAP_OTG=y
174# CONFIG_ARCH_OMAP1 is not set
175# CONFIG_ARCH_OMAP2 is not set
176CONFIG_ARCH_OMAP3=y
177
178#
179# OMAP Feature Selections
180#
181# CONFIG_OMAP_DEBUG_POWERDOMAIN is not set
182# CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set
183# CONFIG_OMAP_RESET_CLOCKS is not set
184CONFIG_OMAP_MUX=y
185CONFIG_OMAP_MUX_DEBUG=y
186CONFIG_OMAP_MUX_WARNINGS=y
187CONFIG_OMAP_MCBSP=y
188# CONFIG_OMAP_MPU_TIMER is not set
189CONFIG_OMAP_32K_TIMER=y
190CONFIG_OMAP_32K_TIMER_HZ=128
191CONFIG_OMAP_DM_TIMER=y
192# CONFIG_OMAP_LL_DEBUG_UART1 is not set
193# CONFIG_OMAP_LL_DEBUG_UART2 is not set
194CONFIG_OMAP_LL_DEBUG_UART3=y
195CONFIG_OMAP_SERIAL_WAKE=y
196CONFIG_ARCH_OMAP34XX=y
197CONFIG_ARCH_OMAP3430=y
198
199#
200# OMAP Board Type
201#
202# CONFIG_MACH_OMAP3_BEAGLE is not set
203CONFIG_MACH_OMAP_LDP=y
204# CONFIG_MACH_OVERO is not set
205
206#
207# Boot options
208#
209
210#
211# Power management
212#
213
214#
215# Processor Type
216#
217CONFIG_CPU_32=y
218CONFIG_CPU_32v6K=y
219CONFIG_CPU_V7=y
220CONFIG_CPU_32v7=y
221CONFIG_CPU_ABRT_EV7=y
222CONFIG_CPU_PABRT_IFAR=y
223CONFIG_CPU_CACHE_V7=y
224CONFIG_CPU_CACHE_VIPT=y
225CONFIG_CPU_COPY_V6=y
226CONFIG_CPU_TLB_V7=y
227CONFIG_CPU_HAS_ASID=y
228CONFIG_CPU_CP15=y
229CONFIG_CPU_CP15_MMU=y
230
231#
232# Processor Features
233#
234CONFIG_ARM_THUMB=y
235# CONFIG_ARM_THUMBEE is not set
236# CONFIG_CPU_ICACHE_DISABLE is not set
237# CONFIG_CPU_DCACHE_DISABLE is not set
238# CONFIG_CPU_BPREDICT_DISABLE is not set
239CONFIG_HAS_TLS_REG=y
240# CONFIG_OUTER_CACHE is not set
241
242#
243# Bus support
244#
245# CONFIG_PCI_SYSCALL is not set
246# CONFIG_ARCH_SUPPORTS_MSI is not set
247# CONFIG_PCCARD is not set
248
249#
250# Kernel Features
251#
252CONFIG_TICK_ONESHOT=y
253CONFIG_NO_HZ=y
254CONFIG_HIGH_RES_TIMERS=y
255CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
256# CONFIG_PREEMPT is not set
257CONFIG_HZ=128
258CONFIG_AEABI=y
259CONFIG_OABI_COMPAT=y
260CONFIG_ARCH_FLATMEM_HAS_HOLES=y
261# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
262CONFIG_SELECT_MEMORY_MODEL=y
263CONFIG_FLATMEM_MANUAL=y
264# CONFIG_DISCONTIGMEM_MANUAL is not set
265# CONFIG_SPARSEMEM_MANUAL is not set
266CONFIG_FLATMEM=y
267CONFIG_FLAT_NODE_MEM_MAP=y
268# CONFIG_SPARSEMEM_STATIC is not set
269# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
270CONFIG_PAGEFLAGS_EXTENDED=y
271CONFIG_SPLIT_PTLOCK_CPUS=4
272# CONFIG_RESOURCES_64BIT is not set
273CONFIG_ZONE_DMA_FLAG=1
274CONFIG_BOUNCE=y
275CONFIG_VIRT_TO_BUS=y
276# CONFIG_LEDS is not set
277CONFIG_ALIGNMENT_TRAP=y
278
279#
280# Boot options
281#
282CONFIG_ZBOOT_ROM_TEXT=0x0
283CONFIG_ZBOOT_ROM_BSS=0x0
284CONFIG_CMDLINE="root=/dev/nfs nfsroot=192.168.0.1:/home/user/buildroot ip=192.168.0.2:192.168.0.1:192.168.0.1:255.255.255.0:tgt:eth0:off rw console=ttyS2,115200n8"
285# CONFIG_XIP_KERNEL is not set
286# CONFIG_KEXEC is not set
287
288#
289# CPU Frequency scaling
290#
291# CONFIG_CPU_FREQ is not set
292
293#
294# Floating point emulation
295#
296
297#
298# At least one emulation must be selected
299#
300CONFIG_FPE_NWFPE=y
301# CONFIG_FPE_NWFPE_XP is not set
302# CONFIG_FPE_FASTFPE is not set
303CONFIG_VFP=y
304CONFIG_VFPv3=y
305# CONFIG_NEON is not set
306
307#
308# Userspace binary formats
309#
310CONFIG_BINFMT_ELF=y
311# CONFIG_BINFMT_AOUT is not set
312CONFIG_BINFMT_MISC=y
313
314#
315# Power management options
316#
317# CONFIG_PM is not set
318CONFIG_ARCH_SUSPEND_POSSIBLE=y
319# CONFIG_NET is not set
320
321#
322# Device Drivers
323#
324
325#
326# Generic Driver Options
327#
328CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
329CONFIG_STANDALONE=y
330CONFIG_PREVENT_FIRMWARE_BUILD=y
331# CONFIG_FW_LOADER is not set
332# CONFIG_DEBUG_DRIVER is not set
333# CONFIG_DEBUG_DEVRES is not set
334# CONFIG_SYS_HYPERVISOR is not set
335# CONFIG_MTD is not set
336# CONFIG_PARPORT is not set
337CONFIG_BLK_DEV=y
338# CONFIG_BLK_DEV_COW_COMMON is not set
339CONFIG_BLK_DEV_LOOP=y
340# CONFIG_BLK_DEV_CRYPTOLOOP is not set
341CONFIG_BLK_DEV_RAM=y
342CONFIG_BLK_DEV_RAM_COUNT=16
343CONFIG_BLK_DEV_RAM_SIZE=16384
344# CONFIG_BLK_DEV_XIP is not set
345# CONFIG_CDROM_PKTCDVD is not set
346CONFIG_MISC_DEVICES=y
347# CONFIG_EEPROM_93CX6 is not set
348# CONFIG_ENCLOSURE_SERVICES is not set
349CONFIG_HAVE_IDE=y
350# CONFIG_IDE is not set
351
352#
353# SCSI device support
354#
355# CONFIG_RAID_ATTRS is not set
356CONFIG_SCSI=y
357CONFIG_SCSI_DMA=y
358# CONFIG_SCSI_TGT is not set
359# CONFIG_SCSI_NETLINK is not set
360CONFIG_SCSI_PROC_FS=y
361
362#
363# SCSI support type (disk, tape, CD-ROM)
364#
365CONFIG_BLK_DEV_SD=y
366# CONFIG_CHR_DEV_ST is not set
367# CONFIG_CHR_DEV_OSST is not set
368# CONFIG_BLK_DEV_SR is not set
369# CONFIG_CHR_DEV_SG is not set
370# CONFIG_CHR_DEV_SCH is not set
371
372#
373# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
374#
375# CONFIG_SCSI_MULTI_LUN is not set
376# CONFIG_SCSI_CONSTANTS is not set
377# CONFIG_SCSI_LOGGING is not set
378# CONFIG_SCSI_SCAN_ASYNC is not set
379CONFIG_SCSI_WAIT_SCAN=m
380
381#
382# SCSI Transports
383#
384# CONFIG_SCSI_SPI_ATTRS is not set
385# CONFIG_SCSI_FC_ATTRS is not set
386# CONFIG_SCSI_SAS_LIBSAS is not set
387# CONFIG_SCSI_SRP_ATTRS is not set
388CONFIG_SCSI_LOWLEVEL=y
389# CONFIG_SCSI_DEBUG is not set
390# CONFIG_SCSI_DH is not set
391# CONFIG_ATA is not set
392# CONFIG_MD is not set
393
394#
395# Input device support
396#
397CONFIG_INPUT=y
398# CONFIG_INPUT_FF_MEMLESS is not set
399# CONFIG_INPUT_POLLDEV is not set
400
401#
402# Userland interfaces
403#
404# CONFIG_INPUT_MOUSEDEV is not set
405# CONFIG_INPUT_JOYDEV is not set
406CONFIG_INPUT_EVDEV=y
407# CONFIG_INPUT_EVBUG is not set
408
409#
410# Input Device Drivers
411#
412# CONFIG_INPUT_KEYBOARD is not set
413# CONFIG_INPUT_MOUSE is not set
414# CONFIG_INPUT_JOYSTICK is not set
415# CONFIG_INPUT_TABLET is not set
416CONFIG_INPUT_TOUCHSCREEN=y
417CONFIG_TOUCHSCREEN_ADS7846=y
418# CONFIG_TOUCHSCREEN_FUJITSU is not set
419# CONFIG_TOUCHSCREEN_GUNZE is not set
420# CONFIG_TOUCHSCREEN_ELO is not set
421# CONFIG_TOUCHSCREEN_MTOUCH is not set
422# CONFIG_TOUCHSCREEN_INEXIO is not set
423# CONFIG_TOUCHSCREEN_MK712 is not set
424# CONFIG_TOUCHSCREEN_PENMOUNT is not set
425# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
426# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
427# CONFIG_TOUCHSCREEN_UCB1400 is not set
428# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
429# CONFIG_INPUT_MISC is not set
430
431#
432# Hardware I/O ports
433#
434# CONFIG_SERIO is not set
435# CONFIG_GAMEPORT is not set
436
437#
438# Character devices
439#
440CONFIG_VT=y
441CONFIG_CONSOLE_TRANSLATIONS=y
442CONFIG_VT_CONSOLE=y
443CONFIG_HW_CONSOLE=y
444# CONFIG_VT_HW_CONSOLE_BINDING is not set
445CONFIG_DEVKMEM=y
446# CONFIG_SERIAL_NONSTANDARD is not set
447
448#
449# Serial drivers
450#
451CONFIG_SERIAL_8250=y
452CONFIG_SERIAL_8250_CONSOLE=y
453CONFIG_SERIAL_8250_NR_UARTS=32
454CONFIG_SERIAL_8250_RUNTIME_UARTS=4
455CONFIG_SERIAL_8250_EXTENDED=y
456CONFIG_SERIAL_8250_MANY_PORTS=y
457CONFIG_SERIAL_8250_SHARE_IRQ=y
458CONFIG_SERIAL_8250_DETECT_IRQ=y
459CONFIG_SERIAL_8250_RSA=y
460
461#
462# Non-8250 serial port support
463#
464CONFIG_SERIAL_CORE=y
465CONFIG_SERIAL_CORE_CONSOLE=y
466CONFIG_UNIX98_PTYS=y
467# CONFIG_LEGACY_PTYS is not set
468# CONFIG_IPMI_HANDLER is not set
469CONFIG_HW_RANDOM=y
470# CONFIG_NVRAM is not set
471# CONFIG_R3964 is not set
472# CONFIG_RAW_DRIVER is not set
473# CONFIG_TCG_TPM is not set
474CONFIG_I2C=y
475CONFIG_I2C_BOARDINFO=y
476CONFIG_I2C_CHARDEV=y
477CONFIG_I2C_HELPER_AUTO=y
478
479#
480# I2C Hardware Bus support
481#
482
483#
484# I2C system bus drivers (mostly embedded / system-on-chip)
485#
486# CONFIG_I2C_GPIO is not set
487# CONFIG_I2C_OCORES is not set
488CONFIG_I2C_OMAP=y
489# CONFIG_I2C_SIMTEC is not set
490
491#
492# External I2C/SMBus adapter drivers
493#
494# CONFIG_I2C_PARPORT_LIGHT is not set
495# CONFIG_I2C_TAOS_EVM is not set
496
497#
498# Other I2C/SMBus bus drivers
499#
500# CONFIG_I2C_PCA_PLATFORM is not set
501# CONFIG_I2C_STUB is not set
502
503#
504# Miscellaneous I2C Chip support
505#
506# CONFIG_DS1682 is not set
507# CONFIG_AT24 is not set
508# CONFIG_SENSORS_EEPROM is not set
509# CONFIG_SENSORS_PCF8574 is not set
510# CONFIG_PCF8575 is not set
511# CONFIG_SENSORS_PCA9539 is not set
512# CONFIG_SENSORS_PCF8591 is not set
513# CONFIG_ISP1301_OMAP is not set
514# CONFIG_TPS65010 is not set
515# CONFIG_SENSORS_MAX6875 is not set
516# CONFIG_SENSORS_TSL2550 is not set
517# CONFIG_I2C_DEBUG_CORE is not set
518# CONFIG_I2C_DEBUG_ALGO is not set
519# CONFIG_I2C_DEBUG_BUS is not set
520# CONFIG_I2C_DEBUG_CHIP is not set
521CONFIG_SPI=y
522# CONFIG_SPI_DEBUG is not set
523CONFIG_SPI_MASTER=y
524
525#
526# SPI Master Controller Drivers
527#
528# CONFIG_SPI_BITBANG is not set
529CONFIG_SPI_OMAP24XX=y
530
531#
532# SPI Protocol Masters
533#
534# CONFIG_SPI_AT25 is not set
535# CONFIG_SPI_SPIDEV is not set
536# CONFIG_SPI_TLE62X0 is not set
537CONFIG_ARCH_REQUIRE_GPIOLIB=y
538CONFIG_GPIOLIB=y
539# CONFIG_DEBUG_GPIO is not set
540# CONFIG_GPIO_SYSFS is not set
541
542#
543# I2C GPIO expanders:
544#
545# CONFIG_GPIO_MAX732X is not set
546# CONFIG_GPIO_PCA953X is not set
547# CONFIG_GPIO_PCF857X is not set
548
549#
550# PCI GPIO expanders:
551#
552
553#
554# SPI GPIO expanders:
555#
556# CONFIG_GPIO_MAX7301 is not set
557# CONFIG_GPIO_MCP23S08 is not set
558CONFIG_W1=y
559
560#
561# 1-wire Bus Masters
562#
563# CONFIG_W1_MASTER_DS2482 is not set
564# CONFIG_W1_MASTER_DS1WM is not set
565# CONFIG_W1_MASTER_GPIO is not set
566
567#
568# 1-wire Slaves
569#
570# CONFIG_W1_SLAVE_THERM is not set
571# CONFIG_W1_SLAVE_SMEM is not set
572# CONFIG_W1_SLAVE_DS2433 is not set
573# CONFIG_W1_SLAVE_DS2760 is not set
574CONFIG_POWER_SUPPLY=y
575# CONFIG_POWER_SUPPLY_DEBUG is not set
576# CONFIG_PDA_POWER is not set
577# CONFIG_BATTERY_DS2760 is not set
578# CONFIG_HWMON is not set
579CONFIG_WATCHDOG=y
580CONFIG_WATCHDOG_NOWAYOUT=y
581
582#
583# Watchdog Device Drivers
584#
585# CONFIG_SOFT_WATCHDOG is not set
586
587#
588# Sonics Silicon Backplane
589#
590CONFIG_SSB_POSSIBLE=y
591# CONFIG_SSB is not set
592
593#
594# Multifunction device drivers
595#
596# CONFIG_MFD_CORE is not set
597# CONFIG_MFD_SM501 is not set
598# CONFIG_HTC_EGPIO is not set
599# CONFIG_HTC_PASIC3 is not set
600# CONFIG_MFD_TMIO is not set
601# CONFIG_MFD_T7L66XB is not set
602# CONFIG_MFD_TC6387XB is not set
603# CONFIG_MFD_TC6393XB is not set
604
605#
606# Multimedia devices
607#
608
609#
610# Multimedia core support
611#
612# CONFIG_VIDEO_DEV is not set
613# CONFIG_VIDEO_MEDIA is not set
614
615#
616# Multimedia drivers
617#
618CONFIG_DAB=y
619
620#
621# Graphics support
622#
623# CONFIG_VGASTATE is not set
624CONFIG_VIDEO_OUTPUT_CONTROL=m
625# CONFIG_FB is not set
626# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
627
628#
629# Display device support
630#
631# CONFIG_DISPLAY_SUPPORT is not set
632
633#
634# Console display driver support
635#
636# CONFIG_VGA_CONSOLE is not set
637CONFIG_DUMMY_CONSOLE=y
638CONFIG_SOUND=y
639CONFIG_SND=y
640# CONFIG_SND_SEQUENCER is not set
641# CONFIG_SND_MIXER_OSS is not set
642# CONFIG_SND_PCM_OSS is not set
643# CONFIG_SND_DYNAMIC_MINORS is not set
644CONFIG_SND_SUPPORT_OLD_API=y
645CONFIG_SND_VERBOSE_PROCFS=y
646# CONFIG_SND_VERBOSE_PRINTK is not set
647# CONFIG_SND_DEBUG is not set
648CONFIG_SND_DRIVERS=y
649# CONFIG_SND_DUMMY is not set
650# CONFIG_SND_MTPAV is not set
651# CONFIG_SND_SERIAL_U16550 is not set
652# CONFIG_SND_MPU401 is not set
653CONFIG_SND_ARM=y
654CONFIG_SND_SPI=y
655# CONFIG_SND_SOC is not set
656# CONFIG_SOUND_PRIME is not set
657CONFIG_HID_SUPPORT=y
658CONFIG_HID=y
659# CONFIG_HID_DEBUG is not set
660# CONFIG_HIDRAW is not set
661# CONFIG_USB_SUPPORT is not set
662CONFIG_MMC=y
663# CONFIG_MMC_DEBUG is not set
664# CONFIG_MMC_UNSAFE_RESUME is not set
665
666#
667# MMC/SD Card Drivers
668#
669CONFIG_MMC_BLOCK=y
670CONFIG_MMC_BLOCK_BOUNCE=y
671# CONFIG_SDIO_UART is not set
672# CONFIG_MMC_TEST is not set
673
674#
675# MMC/SD Host Controller Drivers
676#
677# CONFIG_MMC_SDHCI is not set
678# CONFIG_MMC_OMAP is not set
679# CONFIG_MMC_SPI is not set
680# CONFIG_NEW_LEDS is not set
681CONFIG_RTC_LIB=y
682CONFIG_RTC_CLASS=y
683CONFIG_RTC_HCTOSYS=y
684CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
685# CONFIG_RTC_DEBUG is not set
686
687#
688# RTC interfaces
689#
690CONFIG_RTC_INTF_SYSFS=y
691CONFIG_RTC_INTF_PROC=y
692CONFIG_RTC_INTF_DEV=y
693# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
694# CONFIG_RTC_DRV_TEST is not set
695
696#
697# I2C RTC drivers
698#
699# CONFIG_RTC_DRV_DS1307 is not set
700# CONFIG_RTC_DRV_DS1374 is not set
701# CONFIG_RTC_DRV_DS1672 is not set
702# CONFIG_RTC_DRV_MAX6900 is not set
703# CONFIG_RTC_DRV_RS5C372 is not set
704# CONFIG_RTC_DRV_ISL1208 is not set
705# CONFIG_RTC_DRV_X1205 is not set
706# CONFIG_RTC_DRV_PCF8563 is not set
707# CONFIG_RTC_DRV_PCF8583 is not set
708# CONFIG_RTC_DRV_M41T80 is not set
709# CONFIG_RTC_DRV_S35390A is not set
710# CONFIG_RTC_DRV_FM3130 is not set
711
712#
713# SPI RTC drivers
714#
715# CONFIG_RTC_DRV_M41T94 is not set
716# CONFIG_RTC_DRV_DS1305 is not set
717# CONFIG_RTC_DRV_MAX6902 is not set
718# CONFIG_RTC_DRV_R9701 is not set
719# CONFIG_RTC_DRV_RS5C348 is not set
720
721#
722# Platform RTC drivers
723#
724# CONFIG_RTC_DRV_CMOS is not set
725# CONFIG_RTC_DRV_DS1511 is not set
726# CONFIG_RTC_DRV_DS1553 is not set
727# CONFIG_RTC_DRV_DS1742 is not set
728# CONFIG_RTC_DRV_STK17TA8 is not set
729# CONFIG_RTC_DRV_M48T86 is not set
730# CONFIG_RTC_DRV_M48T59 is not set
731# CONFIG_RTC_DRV_V3020 is not set
732
733#
734# on-CPU RTC drivers
735#
736# CONFIG_DMADEVICES is not set
737
738#
739# Voltage and Current regulators
740#
741# CONFIG_REGULATOR is not set
742# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
743# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
744# CONFIG_REGULATOR_BQ24022 is not set
745# CONFIG_UIO is not set
746
747#
748# File systems
749#
750CONFIG_EXT2_FS=y
751# CONFIG_EXT2_FS_XATTR is not set
752# CONFIG_EXT2_FS_XIP is not set
753CONFIG_EXT3_FS=y
754# CONFIG_EXT3_FS_XATTR is not set
755# CONFIG_EXT4DEV_FS is not set
756CONFIG_JBD=y
757# CONFIG_REISERFS_FS is not set
758# CONFIG_JFS_FS is not set
759# CONFIG_FS_POSIX_ACL is not set
760# CONFIG_XFS_FS is not set
761CONFIG_DNOTIFY=y
762CONFIG_INOTIFY=y
763CONFIG_INOTIFY_USER=y
764CONFIG_QUOTA=y
765CONFIG_PRINT_QUOTA_WARNING=y
766# CONFIG_QFMT_V1 is not set
767CONFIG_QFMT_V2=y
768CONFIG_QUOTACTL=y
769# CONFIG_AUTOFS_FS is not set
770# CONFIG_AUTOFS4_FS is not set
771# CONFIG_FUSE_FS is not set
772
773#
774# CD-ROM/DVD Filesystems
775#
776# CONFIG_ISO9660_FS is not set
777# CONFIG_UDF_FS is not set
778
779#
780# DOS/FAT/NT Filesystems
781#
782CONFIG_FAT_FS=y
783CONFIG_MSDOS_FS=y
784CONFIG_VFAT_FS=y
785CONFIG_FAT_DEFAULT_CODEPAGE=437
786CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
787# CONFIG_NTFS_FS is not set
788
789#
790# Pseudo filesystems
791#
792CONFIG_PROC_FS=y
793CONFIG_PROC_SYSCTL=y
794CONFIG_SYSFS=y
795CONFIG_TMPFS=y
796# CONFIG_TMPFS_POSIX_ACL is not set
797# CONFIG_HUGETLB_PAGE is not set
798# CONFIG_CONFIGFS_FS is not set
799
800#
801# Miscellaneous filesystems
802#
803# CONFIG_ADFS_FS is not set
804# CONFIG_AFFS_FS is not set
805# CONFIG_HFS_FS is not set
806# CONFIG_HFSPLUS_FS is not set
807# CONFIG_BEFS_FS is not set
808# CONFIG_BFS_FS is not set
809# CONFIG_EFS_FS is not set
810# CONFIG_CRAMFS is not set
811# CONFIG_VXFS_FS is not set
812# CONFIG_MINIX_FS is not set
813# CONFIG_OMFS_FS is not set
814# CONFIG_HPFS_FS is not set
815# CONFIG_QNX4FS_FS is not set
816# CONFIG_ROMFS_FS is not set
817# CONFIG_SYSV_FS is not set
818# CONFIG_UFS_FS is not set
819
820#
821# Partition Types
822#
823CONFIG_PARTITION_ADVANCED=y
824# CONFIG_ACORN_PARTITION is not set
825# CONFIG_OSF_PARTITION is not set
826# CONFIG_AMIGA_PARTITION is not set
827# CONFIG_ATARI_PARTITION is not set
828# CONFIG_MAC_PARTITION is not set
829CONFIG_MSDOS_PARTITION=y
830# CONFIG_BSD_DISKLABEL is not set
831# CONFIG_MINIX_SUBPARTITION is not set
832# CONFIG_SOLARIS_X86_PARTITION is not set
833# CONFIG_UNIXWARE_DISKLABEL is not set
834# CONFIG_LDM_PARTITION is not set
835# CONFIG_SGI_PARTITION is not set
836# CONFIG_ULTRIX_PARTITION is not set
837# CONFIG_SUN_PARTITION is not set
838# CONFIG_KARMA_PARTITION is not set
839# CONFIG_EFI_PARTITION is not set
840# CONFIG_SYSV68_PARTITION is not set
841CONFIG_NLS=y
842CONFIG_NLS_DEFAULT="iso8859-1"
843CONFIG_NLS_CODEPAGE_437=y
844# CONFIG_NLS_CODEPAGE_737 is not set
845# CONFIG_NLS_CODEPAGE_775 is not set
846# CONFIG_NLS_CODEPAGE_850 is not set
847# CONFIG_NLS_CODEPAGE_852 is not set
848# CONFIG_NLS_CODEPAGE_855 is not set
849# CONFIG_NLS_CODEPAGE_857 is not set
850# CONFIG_NLS_CODEPAGE_860 is not set
851# CONFIG_NLS_CODEPAGE_861 is not set
852# CONFIG_NLS_CODEPAGE_862 is not set
853# CONFIG_NLS_CODEPAGE_863 is not set
854# CONFIG_NLS_CODEPAGE_864 is not set
855# CONFIG_NLS_CODEPAGE_865 is not set
856# CONFIG_NLS_CODEPAGE_866 is not set
857# CONFIG_NLS_CODEPAGE_869 is not set
858# CONFIG_NLS_CODEPAGE_936 is not set
859# CONFIG_NLS_CODEPAGE_950 is not set
860# CONFIG_NLS_CODEPAGE_932 is not set
861# CONFIG_NLS_CODEPAGE_949 is not set
862# CONFIG_NLS_CODEPAGE_874 is not set
863# CONFIG_NLS_ISO8859_8 is not set
864# CONFIG_NLS_CODEPAGE_1250 is not set
865# CONFIG_NLS_CODEPAGE_1251 is not set
866# CONFIG_NLS_ASCII is not set
867CONFIG_NLS_ISO8859_1=y
868# CONFIG_NLS_ISO8859_2 is not set
869# CONFIG_NLS_ISO8859_3 is not set
870# CONFIG_NLS_ISO8859_4 is not set
871# CONFIG_NLS_ISO8859_5 is not set
872# CONFIG_NLS_ISO8859_6 is not set
873# CONFIG_NLS_ISO8859_7 is not set
874# CONFIG_NLS_ISO8859_9 is not set
875# CONFIG_NLS_ISO8859_13 is not set
876# CONFIG_NLS_ISO8859_14 is not set
877# CONFIG_NLS_ISO8859_15 is not set
878# CONFIG_NLS_KOI8_R is not set
879# CONFIG_NLS_KOI8_U is not set
880# CONFIG_NLS_UTF8 is not set
881
882#
883# Kernel hacking
884#
885# CONFIG_PRINTK_TIME is not set
886CONFIG_ENABLE_WARN_DEPRECATED=y
887CONFIG_ENABLE_MUST_CHECK=y
888CONFIG_FRAME_WARN=1024
889CONFIG_MAGIC_SYSRQ=y
890# CONFIG_UNUSED_SYMBOLS is not set
891# CONFIG_DEBUG_FS is not set
892# CONFIG_HEADERS_CHECK is not set
893CONFIG_DEBUG_KERNEL=y
894# CONFIG_DEBUG_SHIRQ is not set
895CONFIG_DETECT_SOFTLOCKUP=y
896# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
897CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
898CONFIG_SCHED_DEBUG=y
899# CONFIG_SCHEDSTATS is not set
900# CONFIG_TIMER_STATS is not set
901# CONFIG_DEBUG_OBJECTS is not set
902# CONFIG_DEBUG_SLAB is not set
903# CONFIG_DEBUG_RT_MUTEXES is not set
904# CONFIG_RT_MUTEX_TESTER is not set
905# CONFIG_DEBUG_SPINLOCK is not set
906CONFIG_DEBUG_MUTEXES=y
907# CONFIG_DEBUG_LOCK_ALLOC is not set
908# CONFIG_PROVE_LOCKING is not set
909# CONFIG_LOCK_STAT is not set
910# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
911# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
912# CONFIG_DEBUG_KOBJECT is not set
913# CONFIG_DEBUG_BUGVERBOSE is not set
914CONFIG_DEBUG_INFO=y
915# CONFIG_DEBUG_VM is not set
916# CONFIG_DEBUG_WRITECOUNT is not set
917# CONFIG_DEBUG_MEMORY_INIT is not set
918# CONFIG_DEBUG_LIST is not set
919# CONFIG_DEBUG_SG is not set
920CONFIG_FRAME_POINTER=y
921# CONFIG_BOOT_PRINTK_DELAY is not set
922# CONFIG_RCU_TORTURE_TEST is not set
923# CONFIG_BACKTRACE_SELF_TEST is not set
924# CONFIG_FAULT_INJECTION is not set
925# CONFIG_LATENCYTOP is not set
926CONFIG_HAVE_FTRACE=y
927CONFIG_HAVE_DYNAMIC_FTRACE=y
928# CONFIG_FTRACE is not set
929# CONFIG_IRQSOFF_TRACER is not set
930# CONFIG_SCHED_TRACER is not set
931# CONFIG_CONTEXT_SWITCH_TRACER is not set
932# CONFIG_SAMPLES is not set
933CONFIG_HAVE_ARCH_KGDB=y
934# CONFIG_KGDB is not set
935# CONFIG_DEBUG_USER is not set
936# CONFIG_DEBUG_ERRORS is not set
937# CONFIG_DEBUG_STACK_USAGE is not set
938CONFIG_DEBUG_LL=y
939# CONFIG_DEBUG_ICEDCC is not set
940
941#
942# Security options
943#
944# CONFIG_KEYS is not set
945# CONFIG_SECURITY is not set
946# CONFIG_SECURITY_FILE_CAPABILITIES is not set
947CONFIG_CRYPTO=y
948
949#
950# Crypto core or helper
951#
952CONFIG_CRYPTO_ALGAPI=y
953CONFIG_CRYPTO_BLKCIPHER=y
954CONFIG_CRYPTO_MANAGER=y
955# CONFIG_CRYPTO_GF128MUL is not set
956# CONFIG_CRYPTO_NULL is not set
957# CONFIG_CRYPTO_CRYPTD is not set
958# CONFIG_CRYPTO_AUTHENC is not set
959# CONFIG_CRYPTO_TEST is not set
960
961#
962# Authenticated Encryption with Associated Data
963#
964# CONFIG_CRYPTO_CCM is not set
965# CONFIG_CRYPTO_GCM is not set
966# CONFIG_CRYPTO_SEQIV is not set
967
968#
969# Block modes
970#
971CONFIG_CRYPTO_CBC=y
972# CONFIG_CRYPTO_CTR is not set
973# CONFIG_CRYPTO_CTS is not set
974CONFIG_CRYPTO_ECB=m
975# CONFIG_CRYPTO_LRW is not set
976CONFIG_CRYPTO_PCBC=m
977# CONFIG_CRYPTO_XTS is not set
978
979#
980# Hash modes
981#
982# CONFIG_CRYPTO_HMAC is not set
983# CONFIG_CRYPTO_XCBC is not set
984
985#
986# Digest
987#
988# CONFIG_CRYPTO_CRC32C is not set
989# CONFIG_CRYPTO_MD4 is not set
990CONFIG_CRYPTO_MD5=y
991# CONFIG_CRYPTO_MICHAEL_MIC is not set
992# CONFIG_CRYPTO_RMD128 is not set
993# CONFIG_CRYPTO_RMD160 is not set
994# CONFIG_CRYPTO_RMD256 is not set
995# CONFIG_CRYPTO_RMD320 is not set
996# CONFIG_CRYPTO_SHA1 is not set
997# CONFIG_CRYPTO_SHA256 is not set
998# CONFIG_CRYPTO_SHA512 is not set
999# CONFIG_CRYPTO_TGR192 is not set
1000# CONFIG_CRYPTO_WP512 is not set
1001
1002#
1003# Ciphers
1004#
1005# CONFIG_CRYPTO_AES is not set
1006# CONFIG_CRYPTO_ANUBIS is not set
1007# CONFIG_CRYPTO_ARC4 is not set
1008# CONFIG_CRYPTO_BLOWFISH is not set
1009# CONFIG_CRYPTO_CAMELLIA is not set
1010# CONFIG_CRYPTO_CAST5 is not set
1011# CONFIG_CRYPTO_CAST6 is not set
1012CONFIG_CRYPTO_DES=y
1013# CONFIG_CRYPTO_FCRYPT is not set
1014# CONFIG_CRYPTO_KHAZAD is not set
1015# CONFIG_CRYPTO_SALSA20 is not set
1016# CONFIG_CRYPTO_SEED is not set
1017# CONFIG_CRYPTO_SERPENT is not set
1018# CONFIG_CRYPTO_TEA is not set
1019# CONFIG_CRYPTO_TWOFISH is not set
1020
1021#
1022# Compression
1023#
1024# CONFIG_CRYPTO_DEFLATE is not set
1025# CONFIG_CRYPTO_LZO is not set
1026CONFIG_CRYPTO_HW=y
1027
1028#
1029# Library routines
1030#
1031CONFIG_BITREVERSE=y
1032# CONFIG_GENERIC_FIND_FIRST_BIT is not set
1033# CONFIG_GENERIC_FIND_NEXT_BIT is not set
1034CONFIG_CRC_CCITT=y
1035# CONFIG_CRC16 is not set
1036CONFIG_CRC_T10DIF=y
1037# CONFIG_CRC_ITU_T is not set
1038CONFIG_CRC32=y
1039# CONFIG_CRC7 is not set
1040CONFIG_LIBCRC32C=y
1041CONFIG_PLIST=y
1042CONFIG_HAS_IOMEM=y
1043CONFIG_HAS_IOPORT=y
1044CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/overo_defconfig b/arch/arm/configs/overo_defconfig
new file mode 100644
index 000000000000..49200967a153
--- /dev/null
+++ b/arch/arm/configs/overo_defconfig
@@ -0,0 +1,1885 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.27-rc8
4# Fri Oct 3 11:50:34 2008
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_MMU=y
12# CONFIG_NO_IOPORT is not set
13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_HAVE_LATENCYTOP_SUPPORT=y
16CONFIG_LOCKDEP_SUPPORT=y
17CONFIG_TRACE_IRQFLAGS_SUPPORT=y
18CONFIG_HARDIRQS_SW_RESEND=y
19CONFIG_GENERIC_IRQ_PROBE=y
20CONFIG_RWSEM_GENERIC_SPINLOCK=y
21# CONFIG_ARCH_HAS_ILOG2_U32 is not set
22# CONFIG_ARCH_HAS_ILOG2_U64 is not set
23CONFIG_GENERIC_HWEIGHT=y
24CONFIG_GENERIC_CALIBRATE_DELAY=y
25CONFIG_ARCH_SUPPORTS_AOUT=y
26CONFIG_ZONE_DMA=y
27CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
28CONFIG_OPROFILE_ARMV7=y
29CONFIG_VECTORS_BASE=0xffff0000
30CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
31
32#
33# General setup
34#
35CONFIG_EXPERIMENTAL=y
36CONFIG_BROKEN_ON_SMP=y
37CONFIG_INIT_ENV_ARG_LIMIT=32
38CONFIG_LOCALVERSION=""
39CONFIG_LOCALVERSION_AUTO=y
40CONFIG_SWAP=y
41CONFIG_SYSVIPC=y
42CONFIG_SYSVIPC_SYSCTL=y
43# CONFIG_POSIX_MQUEUE is not set
44CONFIG_BSD_PROCESS_ACCT=y
45# CONFIG_BSD_PROCESS_ACCT_V3 is not set
46# CONFIG_TASKSTATS is not set
47# CONFIG_AUDIT is not set
48CONFIG_IKCONFIG=y
49CONFIG_IKCONFIG_PROC=y
50CONFIG_LOG_BUF_SHIFT=14
51# CONFIG_CGROUPS is not set
52CONFIG_GROUP_SCHED=y
53CONFIG_FAIR_GROUP_SCHED=y
54# CONFIG_RT_GROUP_SCHED is not set
55CONFIG_USER_SCHED=y
56# CONFIG_CGROUP_SCHED is not set
57CONFIG_SYSFS_DEPRECATED=y
58CONFIG_SYSFS_DEPRECATED_V2=y
59# CONFIG_RELAY is not set
60# CONFIG_NAMESPACES is not set
61CONFIG_BLK_DEV_INITRD=y
62CONFIG_INITRAMFS_SOURCE=""
63CONFIG_CC_OPTIMIZE_FOR_SIZE=y
64CONFIG_SYSCTL=y
65CONFIG_EMBEDDED=y
66CONFIG_UID16=y
67# CONFIG_SYSCTL_SYSCALL is not set
68CONFIG_KALLSYMS=y
69# CONFIG_KALLSYMS_ALL is not set
70# CONFIG_KALLSYMS_EXTRA_PASS is not set
71CONFIG_HOTPLUG=y
72CONFIG_PRINTK=y
73CONFIG_BUG=y
74# CONFIG_ELF_CORE is not set
75# CONFIG_COMPAT_BRK is not set
76CONFIG_BASE_FULL=y
77CONFIG_FUTEX=y
78CONFIG_ANON_INODES=y
79CONFIG_EPOLL=y
80CONFIG_SIGNALFD=y
81CONFIG_TIMERFD=y
82CONFIG_EVENTFD=y
83CONFIG_SHMEM=y
84CONFIG_VM_EVENT_COUNTERS=y
85CONFIG_SLUB_DEBUG=y
86# CONFIG_SLAB is not set
87CONFIG_SLUB=y
88# CONFIG_SLOB is not set
89CONFIG_PROFILING=y
90# CONFIG_MARKERS is not set
91CONFIG_OPROFILE=y
92CONFIG_HAVE_OPROFILE=y
93# CONFIG_KPROBES is not set
94# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
95# CONFIG_HAVE_IOREMAP_PROT is not set
96CONFIG_HAVE_KPROBES=y
97CONFIG_HAVE_KRETPROBES=y
98# CONFIG_HAVE_ARCH_TRACEHOOK is not set
99# CONFIG_HAVE_DMA_ATTRS is not set
100# CONFIG_USE_GENERIC_SMP_HELPERS is not set
101CONFIG_HAVE_CLK=y
102CONFIG_PROC_PAGE_MONITOR=y
103CONFIG_HAVE_GENERIC_DMA_COHERENT=y
104CONFIG_SLABINFO=y
105CONFIG_RT_MUTEXES=y
106# CONFIG_TINY_SHMEM is not set
107CONFIG_BASE_SMALL=0
108CONFIG_MODULES=y
109# CONFIG_MODULE_FORCE_LOAD is not set
110CONFIG_MODULE_UNLOAD=y
111CONFIG_MODULE_FORCE_UNLOAD=y
112CONFIG_MODVERSIONS=y
113CONFIG_MODULE_SRCVERSION_ALL=y
114CONFIG_KMOD=y
115CONFIG_BLOCK=y
116CONFIG_LBD=y
117# CONFIG_BLK_DEV_IO_TRACE is not set
118CONFIG_LSF=y
119# CONFIG_BLK_DEV_BSG is not set
120# CONFIG_BLK_DEV_INTEGRITY is not set
121
122#
123# IO Schedulers
124#
125CONFIG_IOSCHED_NOOP=y
126CONFIG_IOSCHED_AS=y
127CONFIG_IOSCHED_DEADLINE=y
128CONFIG_IOSCHED_CFQ=y
129# CONFIG_DEFAULT_AS is not set
130# CONFIG_DEFAULT_DEADLINE is not set
131CONFIG_DEFAULT_CFQ=y
132# CONFIG_DEFAULT_NOOP is not set
133CONFIG_DEFAULT_IOSCHED="cfq"
134CONFIG_CLASSIC_RCU=y
135
136#
137# System Type
138#
139# CONFIG_ARCH_AAEC2000 is not set
140# CONFIG_ARCH_INTEGRATOR is not set
141# CONFIG_ARCH_REALVIEW is not set
142# CONFIG_ARCH_VERSATILE is not set
143# CONFIG_ARCH_AT91 is not set
144# CONFIG_ARCH_CLPS7500 is not set
145# CONFIG_ARCH_CLPS711X is not set
146# CONFIG_ARCH_EBSA110 is not set
147# CONFIG_ARCH_EP93XX is not set
148# CONFIG_ARCH_FOOTBRIDGE is not set
149# CONFIG_ARCH_NETX is not set
150# CONFIG_ARCH_H720X is not set
151# CONFIG_ARCH_IMX is not set
152# CONFIG_ARCH_IOP13XX is not set
153# CONFIG_ARCH_IOP32X is not set
154# CONFIG_ARCH_IOP33X is not set
155# CONFIG_ARCH_IXP23XX is not set
156# CONFIG_ARCH_IXP2000 is not set
157# CONFIG_ARCH_IXP4XX is not set
158# CONFIG_ARCH_L7200 is not set
159# CONFIG_ARCH_KIRKWOOD is not set
160# CONFIG_ARCH_KS8695 is not set
161# CONFIG_ARCH_NS9XXX is not set
162# CONFIG_ARCH_LOKI is not set
163# CONFIG_ARCH_MV78XX0 is not set
164# CONFIG_ARCH_MXC is not set
165# CONFIG_ARCH_ORION5X is not set
166# CONFIG_ARCH_PNX4008 is not set
167# CONFIG_ARCH_PXA is not set
168# CONFIG_ARCH_RPC is not set
169# CONFIG_ARCH_SA1100 is not set
170# CONFIG_ARCH_S3C2410 is not set
171# CONFIG_ARCH_SHARK is not set
172# CONFIG_ARCH_LH7A40X is not set
173# CONFIG_ARCH_DAVINCI is not set
174CONFIG_ARCH_OMAP=y
175# CONFIG_ARCH_MSM7X00A is not set
176
177#
178# TI OMAP Implementations
179#
180CONFIG_ARCH_OMAP_OTG=y
181# CONFIG_ARCH_OMAP1 is not set
182# CONFIG_ARCH_OMAP2 is not set
183CONFIG_ARCH_OMAP3=y
184
185#
186# OMAP Feature Selections
187#
188# CONFIG_OMAP_DEBUG_POWERDOMAIN is not set
189# CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set
190# CONFIG_OMAP_RESET_CLOCKS is not set
191# CONFIG_OMAP_MUX is not set
192CONFIG_OMAP_MCBSP=y
193# CONFIG_OMAP_MPU_TIMER is not set
194CONFIG_OMAP_32K_TIMER=y
195CONFIG_OMAP_32K_TIMER_HZ=128
196CONFIG_OMAP_DM_TIMER=y
197# CONFIG_OMAP_LL_DEBUG_UART1 is not set
198# CONFIG_OMAP_LL_DEBUG_UART2 is not set
199CONFIG_OMAP_LL_DEBUG_UART3=y
200CONFIG_ARCH_OMAP34XX=y
201CONFIG_ARCH_OMAP3430=y
202
203#
204# OMAP Board Type
205#
206# CONFIG_MACH_OMAP3_BEAGLE is not set
207CONFIG_MACH_OVERO=y
208
209#
210# Boot options
211#
212
213#
214# Power management
215#
216
217#
218# Processor Type
219#
220CONFIG_CPU_32=y
221CONFIG_CPU_32v6K=y
222CONFIG_CPU_V7=y
223CONFIG_CPU_32v7=y
224CONFIG_CPU_ABRT_EV7=y
225CONFIG_CPU_PABRT_IFAR=y
226CONFIG_CPU_CACHE_V7=y
227CONFIG_CPU_CACHE_VIPT=y
228CONFIG_CPU_COPY_V6=y
229CONFIG_CPU_TLB_V7=y
230CONFIG_CPU_HAS_ASID=y
231CONFIG_CPU_CP15=y
232CONFIG_CPU_CP15_MMU=y
233
234#
235# Processor Features
236#
237CONFIG_ARM_THUMB=y
238CONFIG_ARM_THUMBEE=y
239# CONFIG_CPU_ICACHE_DISABLE is not set
240# CONFIG_CPU_DCACHE_DISABLE is not set
241# CONFIG_CPU_BPREDICT_DISABLE is not set
242CONFIG_HAS_TLS_REG=y
243# CONFIG_OUTER_CACHE is not set
244
245#
246# Bus support
247#
248# CONFIG_PCI_SYSCALL is not set
249# CONFIG_ARCH_SUPPORTS_MSI is not set
250# CONFIG_PCCARD is not set
251
252#
253# Kernel Features
254#
255CONFIG_TICK_ONESHOT=y
256CONFIG_NO_HZ=y
257CONFIG_HIGH_RES_TIMERS=y
258CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
259CONFIG_VMSPLIT_3G=y
260# CONFIG_VMSPLIT_2G is not set
261# CONFIG_VMSPLIT_1G is not set
262CONFIG_PAGE_OFFSET=0xC0000000
263# CONFIG_PREEMPT is not set
264CONFIG_HZ=128
265CONFIG_AEABI=y
266# CONFIG_OABI_COMPAT is not set
267CONFIG_ARCH_FLATMEM_HAS_HOLES=y
268# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
269CONFIG_SELECT_MEMORY_MODEL=y
270CONFIG_FLATMEM_MANUAL=y
271# CONFIG_DISCONTIGMEM_MANUAL is not set
272# CONFIG_SPARSEMEM_MANUAL is not set
273CONFIG_FLATMEM=y
274CONFIG_FLAT_NODE_MEM_MAP=y
275# CONFIG_SPARSEMEM_STATIC is not set
276# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
277CONFIG_PAGEFLAGS_EXTENDED=y
278CONFIG_SPLIT_PTLOCK_CPUS=4
279# CONFIG_RESOURCES_64BIT is not set
280CONFIG_ZONE_DMA_FLAG=1
281CONFIG_BOUNCE=y
282CONFIG_VIRT_TO_BUS=y
283CONFIG_LEDS=y
284CONFIG_ALIGNMENT_TRAP=y
285
286#
287# Boot options
288#
289CONFIG_ZBOOT_ROM_TEXT=0x0
290CONFIG_ZBOOT_ROM_BSS=0x0
291CONFIG_CMDLINE=" debug "
292# CONFIG_XIP_KERNEL is not set
293CONFIG_KEXEC=y
294CONFIG_ATAGS_PROC=y
295
296#
297# CPU Power Management
298#
299CONFIG_CPU_FREQ=y
300CONFIG_CPU_FREQ_TABLE=y
301# CONFIG_CPU_FREQ_DEBUG is not set
302CONFIG_CPU_FREQ_STAT=y
303CONFIG_CPU_FREQ_STAT_DETAILS=y
304CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
305# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
306# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
307# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
308# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
309CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
310# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
311CONFIG_CPU_FREQ_GOV_USERSPACE=y
312CONFIG_CPU_FREQ_GOV_ONDEMAND=y
313# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
314# CONFIG_CPU_IDLE is not set
315
316#
317# Floating point emulation
318#
319
320#
321# At least one emulation must be selected
322#
323CONFIG_VFP=y
324CONFIG_VFPv3=y
325CONFIG_NEON=y
326
327#
328# Userspace binary formats
329#
330CONFIG_BINFMT_ELF=y
331CONFIG_BINFMT_AOUT=m
332CONFIG_BINFMT_MISC=y
333
334#
335# Power management options
336#
337# CONFIG_PM is not set
338CONFIG_ARCH_SUSPEND_POSSIBLE=y
339CONFIG_NET=y
340
341#
342# Networking options
343#
344CONFIG_PACKET=y
345CONFIG_PACKET_MMAP=y
346CONFIG_UNIX=y
347CONFIG_XFRM=y
348# CONFIG_XFRM_USER is not set
349# CONFIG_XFRM_SUB_POLICY is not set
350# CONFIG_XFRM_MIGRATE is not set
351# CONFIG_XFRM_STATISTICS is not set
352CONFIG_NET_KEY=y
353# CONFIG_NET_KEY_MIGRATE is not set
354CONFIG_INET=y
355# CONFIG_IP_MULTICAST is not set
356# CONFIG_IP_ADVANCED_ROUTER is not set
357CONFIG_IP_FIB_HASH=y
358CONFIG_IP_PNP=y
359CONFIG_IP_PNP_DHCP=y
360CONFIG_IP_PNP_BOOTP=y
361CONFIG_IP_PNP_RARP=y
362# CONFIG_NET_IPIP is not set
363# CONFIG_NET_IPGRE is not set
364# CONFIG_ARPD is not set
365# CONFIG_SYN_COOKIES is not set
366# CONFIG_INET_AH is not set
367# CONFIG_INET_ESP is not set
368# CONFIG_INET_IPCOMP is not set
369# CONFIG_INET_XFRM_TUNNEL is not set
370CONFIG_INET_TUNNEL=m
371CONFIG_INET_XFRM_MODE_TRANSPORT=y
372CONFIG_INET_XFRM_MODE_TUNNEL=y
373CONFIG_INET_XFRM_MODE_BEET=y
374# CONFIG_INET_LRO is not set
375CONFIG_INET_DIAG=y
376CONFIG_INET_TCP_DIAG=y
377# CONFIG_TCP_CONG_ADVANCED is not set
378CONFIG_TCP_CONG_CUBIC=y
379CONFIG_DEFAULT_TCP_CONG="cubic"
380# CONFIG_TCP_MD5SIG is not set
381CONFIG_IPV6=m
382# CONFIG_IPV6_PRIVACY is not set
383# CONFIG_IPV6_ROUTER_PREF is not set
384# CONFIG_IPV6_OPTIMISTIC_DAD is not set
385# CONFIG_INET6_AH is not set
386# CONFIG_INET6_ESP is not set
387# CONFIG_INET6_IPCOMP is not set
388# CONFIG_IPV6_MIP6 is not set
389# CONFIG_INET6_XFRM_TUNNEL is not set
390# CONFIG_INET6_TUNNEL is not set
391CONFIG_INET6_XFRM_MODE_TRANSPORT=m
392CONFIG_INET6_XFRM_MODE_TUNNEL=m
393CONFIG_INET6_XFRM_MODE_BEET=m
394# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
395CONFIG_IPV6_SIT=m
396CONFIG_IPV6_NDISC_NODETYPE=y
397# CONFIG_IPV6_TUNNEL is not set
398# CONFIG_IPV6_MULTIPLE_TABLES is not set
399# CONFIG_IPV6_MROUTE is not set
400# CONFIG_NETWORK_SECMARK is not set
401# CONFIG_NETFILTER is not set
402# CONFIG_IP_DCCP is not set
403# CONFIG_IP_SCTP is not set
404# CONFIG_TIPC is not set
405# CONFIG_ATM is not set
406# CONFIG_BRIDGE is not set
407# CONFIG_VLAN_8021Q is not set
408# CONFIG_DECNET is not set
409# CONFIG_LLC2 is not set
410# CONFIG_IPX is not set
411# CONFIG_ATALK is not set
412# CONFIG_X25 is not set
413# CONFIG_LAPB is not set
414# CONFIG_ECONET is not set
415# CONFIG_WAN_ROUTER is not set
416# CONFIG_NET_SCHED is not set
417
418#
419# Network testing
420#
421# CONFIG_NET_PKTGEN is not set
422# CONFIG_HAMRADIO is not set
423# CONFIG_CAN is not set
424# CONFIG_IRDA is not set
425CONFIG_BT=y
426CONFIG_BT_L2CAP=y
427CONFIG_BT_SCO=y
428CONFIG_BT_RFCOMM=y
429CONFIG_BT_RFCOMM_TTY=y
430CONFIG_BT_BNEP=y
431CONFIG_BT_BNEP_MC_FILTER=y
432CONFIG_BT_BNEP_PROTO_FILTER=y
433CONFIG_BT_HIDP=y
434
435#
436# Bluetooth device drivers
437#
438CONFIG_BT_HCIUSB=m
439CONFIG_BT_HCIUSB_SCO=y
440# CONFIG_BT_HCIBTUSB is not set
441# CONFIG_BT_HCIBTSDIO is not set
442CONFIG_BT_HCIUART=y
443CONFIG_BT_HCIUART_H4=y
444CONFIG_BT_HCIUART_BCSP=y
445# CONFIG_BT_HCIUART_LL is not set
446CONFIG_BT_HCIBCM203X=y
447CONFIG_BT_HCIBPA10X=y
448# CONFIG_BT_HCIBFUSB is not set
449# CONFIG_BT_HCIVHCI is not set
450# CONFIG_AF_RXRPC is not set
451
452#
453# Wireless
454#
455CONFIG_CFG80211=y
456CONFIG_NL80211=y
457CONFIG_WIRELESS_EXT=y
458CONFIG_WIRELESS_EXT_SYSFS=y
459CONFIG_MAC80211=y
460
461#
462# Rate control algorithm selection
463#
464CONFIG_MAC80211_RC_PID=y
465CONFIG_MAC80211_RC_DEFAULT_PID=y
466CONFIG_MAC80211_RC_DEFAULT="pid"
467# CONFIG_MAC80211_MESH is not set
468CONFIG_MAC80211_LEDS=y
469# CONFIG_MAC80211_DEBUGFS is not set
470# CONFIG_MAC80211_DEBUG_MENU is not set
471CONFIG_IEEE80211=y
472# CONFIG_IEEE80211_DEBUG is not set
473CONFIG_IEEE80211_CRYPT_WEP=y
474CONFIG_IEEE80211_CRYPT_CCMP=y
475CONFIG_IEEE80211_CRYPT_TKIP=y
476# CONFIG_RFKILL is not set
477# CONFIG_NET_9P is not set
478
479#
480# Device Drivers
481#
482
483#
484# Generic Driver Options
485#
486CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
487CONFIG_STANDALONE=y
488CONFIG_PREVENT_FIRMWARE_BUILD=y
489CONFIG_FW_LOADER=y
490CONFIG_FIRMWARE_IN_KERNEL=y
491CONFIG_EXTRA_FIRMWARE=""
492# CONFIG_DEBUG_DRIVER is not set
493# CONFIG_DEBUG_DEVRES is not set
494# CONFIG_SYS_HYPERVISOR is not set
495# CONFIG_CONNECTOR is not set
496CONFIG_MTD=y
497# CONFIG_MTD_DEBUG is not set
498CONFIG_MTD_CONCAT=y
499CONFIG_MTD_PARTITIONS=y
500# CONFIG_MTD_REDBOOT_PARTS is not set
501# CONFIG_MTD_CMDLINE_PARTS is not set
502# CONFIG_MTD_AFS_PARTS is not set
503# CONFIG_MTD_AR7_PARTS is not set
504
505#
506# User Modules And Translation Layers
507#
508CONFIG_MTD_CHAR=y
509CONFIG_MTD_BLKDEVS=y
510CONFIG_MTD_BLOCK=y
511# CONFIG_FTL is not set
512# CONFIG_NFTL is not set
513# CONFIG_INFTL is not set
514# CONFIG_RFD_FTL is not set
515# CONFIG_SSFDC is not set
516# CONFIG_MTD_OOPS is not set
517
518#
519# RAM/ROM/Flash chip drivers
520#
521# CONFIG_MTD_CFI is not set
522# CONFIG_MTD_JEDECPROBE is not set
523CONFIG_MTD_MAP_BANK_WIDTH_1=y
524CONFIG_MTD_MAP_BANK_WIDTH_2=y
525CONFIG_MTD_MAP_BANK_WIDTH_4=y
526# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
527# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
528# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
529CONFIG_MTD_CFI_I1=y
530CONFIG_MTD_CFI_I2=y
531# CONFIG_MTD_CFI_I4 is not set
532# CONFIG_MTD_CFI_I8 is not set
533# CONFIG_MTD_RAM is not set
534# CONFIG_MTD_ROM is not set
535# CONFIG_MTD_ABSENT is not set
536
537#
538# Mapping drivers for chip access
539#
540# CONFIG_MTD_COMPLEX_MAPPINGS is not set
541# CONFIG_MTD_PLATRAM is not set
542
543#
544# Self-contained MTD device drivers
545#
546# CONFIG_MTD_DATAFLASH is not set
547# CONFIG_MTD_M25P80 is not set
548# CONFIG_MTD_SLRAM is not set
549# CONFIG_MTD_PHRAM is not set
550# CONFIG_MTD_MTDRAM is not set
551# CONFIG_MTD_BLOCK2MTD is not set
552
553#
554# Disk-On-Chip Device Drivers
555#
556# CONFIG_MTD_DOC2000 is not set
557# CONFIG_MTD_DOC2001 is not set
558# CONFIG_MTD_DOC2001PLUS is not set
559CONFIG_MTD_NAND=y
560# CONFIG_MTD_NAND_VERIFY_WRITE is not set
561# CONFIG_MTD_NAND_ECC_SMC is not set
562# CONFIG_MTD_NAND_MUSEUM_IDS is not set
563CONFIG_MTD_NAND_IDS=y
564# CONFIG_MTD_NAND_DISKONCHIP is not set
565# CONFIG_MTD_NAND_NANDSIM is not set
566# CONFIG_MTD_NAND_PLATFORM is not set
567# CONFIG_MTD_ALAUDA is not set
568# CONFIG_MTD_ONENAND is not set
569
570#
571# UBI - Unsorted block images
572#
573# CONFIG_MTD_UBI is not set
574# CONFIG_PARPORT is not set
575CONFIG_BLK_DEV=y
576# CONFIG_BLK_DEV_COW_COMMON is not set
577CONFIG_BLK_DEV_LOOP=y
578CONFIG_BLK_DEV_CRYPTOLOOP=m
579# CONFIG_BLK_DEV_NBD is not set
580# CONFIG_BLK_DEV_UB is not set
581CONFIG_BLK_DEV_RAM=y
582CONFIG_BLK_DEV_RAM_COUNT=16
583CONFIG_BLK_DEV_RAM_SIZE=16384
584# CONFIG_BLK_DEV_XIP is not set
585CONFIG_CDROM_PKTCDVD=m
586CONFIG_CDROM_PKTCDVD_BUFFERS=8
587# CONFIG_CDROM_PKTCDVD_WCACHE is not set
588# CONFIG_ATA_OVER_ETH is not set
589CONFIG_MISC_DEVICES=y
590CONFIG_EEPROM_93CX6=m
591# CONFIG_ENCLOSURE_SERVICES is not set
592CONFIG_HAVE_IDE=y
593# CONFIG_IDE is not set
594
595#
596# SCSI device support
597#
598CONFIG_RAID_ATTRS=m
599CONFIG_SCSI=y
600CONFIG_SCSI_DMA=y
601# CONFIG_SCSI_TGT is not set
602# CONFIG_SCSI_NETLINK is not set
603CONFIG_SCSI_PROC_FS=y
604
605#
606# SCSI support type (disk, tape, CD-ROM)
607#
608CONFIG_BLK_DEV_SD=y
609# CONFIG_CHR_DEV_ST is not set
610# CONFIG_CHR_DEV_OSST is not set
611# CONFIG_BLK_DEV_SR is not set
612CONFIG_CHR_DEV_SG=m
613# CONFIG_CHR_DEV_SCH is not set
614
615#
616# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
617#
618CONFIG_SCSI_MULTI_LUN=y
619# CONFIG_SCSI_CONSTANTS is not set
620# CONFIG_SCSI_LOGGING is not set
621# CONFIG_SCSI_SCAN_ASYNC is not set
622CONFIG_SCSI_WAIT_SCAN=m
623
624#
625# SCSI Transports
626#
627# CONFIG_SCSI_SPI_ATTRS is not set
628# CONFIG_SCSI_FC_ATTRS is not set
629# CONFIG_SCSI_ISCSI_ATTRS is not set
630# CONFIG_SCSI_SAS_LIBSAS is not set
631# CONFIG_SCSI_SRP_ATTRS is not set
632CONFIG_SCSI_LOWLEVEL=y
633# CONFIG_ISCSI_TCP is not set
634# CONFIG_SCSI_DEBUG is not set
635# CONFIG_SCSI_DH is not set
636# CONFIG_ATA is not set
637CONFIG_MD=y
638CONFIG_BLK_DEV_MD=m
639CONFIG_MD_LINEAR=m
640CONFIG_MD_RAID0=m
641CONFIG_MD_RAID1=m
642CONFIG_MD_RAID10=m
643CONFIG_MD_RAID456=m
644CONFIG_MD_RAID5_RESHAPE=y
645CONFIG_MD_MULTIPATH=m
646CONFIG_MD_FAULTY=m
647CONFIG_BLK_DEV_DM=m
648# CONFIG_DM_DEBUG is not set
649CONFIG_DM_CRYPT=m
650CONFIG_DM_SNAPSHOT=m
651CONFIG_DM_MIRROR=m
652CONFIG_DM_ZERO=m
653CONFIG_DM_MULTIPATH=m
654CONFIG_DM_DELAY=m
655# CONFIG_DM_UEVENT is not set
656CONFIG_NETDEVICES=y
657CONFIG_DUMMY=m
658# CONFIG_BONDING is not set
659# CONFIG_MACVLAN is not set
660# CONFIG_EQUALIZER is not set
661CONFIG_TUN=m
662# CONFIG_VETH is not set
663# CONFIG_NET_ETHERNET is not set
664CONFIG_MII=y
665# CONFIG_NETDEV_1000 is not set
666# CONFIG_NETDEV_10000 is not set
667
668#
669# Wireless LAN
670#
671# CONFIG_WLAN_PRE80211 is not set
672CONFIG_WLAN_80211=y
673CONFIG_LIBERTAS=y
674CONFIG_LIBERTAS_USB=y
675CONFIG_LIBERTAS_SDIO=y
676CONFIG_LIBERTAS_DEBUG=y
677CONFIG_USB_ZD1201=m
678# CONFIG_USB_NET_RNDIS_WLAN is not set
679CONFIG_RTL8187=m
680# CONFIG_MAC80211_HWSIM is not set
681CONFIG_P54_COMMON=m
682CONFIG_P54_USB=m
683# CONFIG_IWLWIFI_LEDS is not set
684CONFIG_HOSTAP=m
685CONFIG_HOSTAP_FIRMWARE=y
686CONFIG_HOSTAP_FIRMWARE_NVRAM=y
687# CONFIG_B43 is not set
688# CONFIG_B43LEGACY is not set
689# CONFIG_ZD1211RW is not set
690# CONFIG_RT2X00 is not set
691
692#
693# USB Network Adapters
694#
695CONFIG_USB_CATC=m
696CONFIG_USB_KAWETH=m
697CONFIG_USB_PEGASUS=m
698CONFIG_USB_RTL8150=m
699CONFIG_USB_USBNET=y
700CONFIG_USB_NET_AX8817X=y
701CONFIG_USB_NET_CDCETHER=y
702CONFIG_USB_NET_DM9601=m
703CONFIG_USB_NET_GL620A=m
704CONFIG_USB_NET_NET1080=m
705CONFIG_USB_NET_PLUSB=m
706CONFIG_USB_NET_MCS7830=m
707CONFIG_USB_NET_RNDIS_HOST=m
708CONFIG_USB_NET_CDC_SUBSET=m
709CONFIG_USB_ALI_M5632=y
710CONFIG_USB_AN2720=y
711CONFIG_USB_BELKIN=y
712CONFIG_USB_ARMLINUX=y
713CONFIG_USB_EPSON2888=y
714CONFIG_USB_KC2190=y
715CONFIG_USB_NET_ZAURUS=m
716# CONFIG_WAN is not set
717CONFIG_PPP=m
718# CONFIG_PPP_MULTILINK is not set
719# CONFIG_PPP_FILTER is not set
720CONFIG_PPP_ASYNC=m
721CONFIG_PPP_SYNC_TTY=m
722CONFIG_PPP_DEFLATE=m
723CONFIG_PPP_BSDCOMP=m
724CONFIG_PPP_MPPE=m
725CONFIG_PPPOE=m
726# CONFIG_PPPOL2TP is not set
727# CONFIG_SLIP is not set
728CONFIG_SLHC=m
729# CONFIG_NETCONSOLE is not set
730# CONFIG_NETPOLL is not set
731# CONFIG_NET_POLL_CONTROLLER is not set
732# CONFIG_ISDN is not set
733
734#
735# Input device support
736#
737CONFIG_INPUT=y
738# CONFIG_INPUT_FF_MEMLESS is not set
739# CONFIG_INPUT_POLLDEV is not set
740
741#
742# Userland interfaces
743#
744CONFIG_INPUT_MOUSEDEV=y
745CONFIG_INPUT_MOUSEDEV_PSAUX=y
746CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
747CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
748# CONFIG_INPUT_JOYDEV is not set
749CONFIG_INPUT_EVDEV=y
750# CONFIG_INPUT_EVBUG is not set
751
752#
753# Input Device Drivers
754#
755CONFIG_INPUT_KEYBOARD=y
756# CONFIG_KEYBOARD_ATKBD is not set
757# CONFIG_KEYBOARD_SUNKBD is not set
758# CONFIG_KEYBOARD_LKKBD is not set
759# CONFIG_KEYBOARD_XTKBD is not set
760# CONFIG_KEYBOARD_NEWTON is not set
761# CONFIG_KEYBOARD_STOWAWAY is not set
762# CONFIG_KEYBOARD_GPIO is not set
763CONFIG_INPUT_MOUSE=y
764CONFIG_MOUSE_PS2=y
765CONFIG_MOUSE_PS2_ALPS=y
766CONFIG_MOUSE_PS2_LOGIPS2PP=y
767CONFIG_MOUSE_PS2_SYNAPTICS=y
768CONFIG_MOUSE_PS2_LIFEBOOK=y
769CONFIG_MOUSE_PS2_TRACKPOINT=y
770# CONFIG_MOUSE_PS2_TOUCHKIT is not set
771# CONFIG_MOUSE_SERIAL is not set
772# CONFIG_MOUSE_APPLETOUCH is not set
773# CONFIG_MOUSE_BCM5974 is not set
774# CONFIG_MOUSE_VSXXXAA is not set
775# CONFIG_MOUSE_GPIO is not set
776# CONFIG_INPUT_JOYSTICK is not set
777# CONFIG_INPUT_TABLET is not set
778# CONFIG_INPUT_TOUCHSCREEN is not set
779# CONFIG_INPUT_MISC is not set
780
781#
782# Hardware I/O ports
783#
784CONFIG_SERIO=y
785CONFIG_SERIO_SERPORT=y
786CONFIG_SERIO_LIBPS2=y
787# CONFIG_SERIO_RAW is not set
788# CONFIG_GAMEPORT is not set
789
790#
791# Character devices
792#
793CONFIG_VT=y
794CONFIG_CONSOLE_TRANSLATIONS=y
795CONFIG_VT_CONSOLE=y
796CONFIG_HW_CONSOLE=y
797CONFIG_VT_HW_CONSOLE_BINDING=y
798CONFIG_DEVKMEM=y
799# CONFIG_SERIAL_NONSTANDARD is not set
800
801#
802# Serial drivers
803#
804CONFIG_SERIAL_8250=y
805CONFIG_SERIAL_8250_CONSOLE=y
806CONFIG_SERIAL_8250_NR_UARTS=32
807CONFIG_SERIAL_8250_RUNTIME_UARTS=4
808CONFIG_SERIAL_8250_EXTENDED=y
809CONFIG_SERIAL_8250_MANY_PORTS=y
810CONFIG_SERIAL_8250_SHARE_IRQ=y
811CONFIG_SERIAL_8250_DETECT_IRQ=y
812CONFIG_SERIAL_8250_RSA=y
813
814#
815# Non-8250 serial port support
816#
817CONFIG_SERIAL_CORE=y
818CONFIG_SERIAL_CORE_CONSOLE=y
819CONFIG_UNIX98_PTYS=y
820# CONFIG_LEGACY_PTYS is not set
821# CONFIG_IPMI_HANDLER is not set
822CONFIG_HW_RANDOM=y
823# CONFIG_NVRAM is not set
824# CONFIG_R3964 is not set
825# CONFIG_RAW_DRIVER is not set
826# CONFIG_TCG_TPM is not set
827CONFIG_I2C=y
828CONFIG_I2C_BOARDINFO=y
829CONFIG_I2C_CHARDEV=y
830CONFIG_I2C_HELPER_AUTO=y
831
832#
833# I2C Hardware Bus support
834#
835
836#
837# I2C system bus drivers (mostly embedded / system-on-chip)
838#
839# CONFIG_I2C_GPIO is not set
840# CONFIG_I2C_OCORES is not set
841CONFIG_I2C_OMAP=y
842# CONFIG_I2C_SIMTEC is not set
843
844#
845# External I2C/SMBus adapter drivers
846#
847# CONFIG_I2C_PARPORT_LIGHT is not set
848# CONFIG_I2C_TAOS_EVM is not set
849# CONFIG_I2C_TINY_USB is not set
850
851#
852# Other I2C/SMBus bus drivers
853#
854# CONFIG_I2C_PCA_PLATFORM is not set
855# CONFIG_I2C_STUB is not set
856
857#
858# Miscellaneous I2C Chip support
859#
860# CONFIG_DS1682 is not set
861# CONFIG_AT24 is not set
862CONFIG_SENSORS_EEPROM=y
863# CONFIG_SENSORS_PCF8574 is not set
864# CONFIG_PCF8575 is not set
865# CONFIG_SENSORS_PCA9539 is not set
866# CONFIG_SENSORS_PCF8591 is not set
867# CONFIG_ISP1301_OMAP is not set
868# CONFIG_TPS65010 is not set
869# CONFIG_SENSORS_MAX6875 is not set
870# CONFIG_SENSORS_TSL2550 is not set
871# CONFIG_I2C_DEBUG_CORE is not set
872# CONFIG_I2C_DEBUG_ALGO is not set
873# CONFIG_I2C_DEBUG_BUS is not set
874# CONFIG_I2C_DEBUG_CHIP is not set
875CONFIG_SPI=y
876# CONFIG_SPI_DEBUG is not set
877CONFIG_SPI_MASTER=y
878
879#
880# SPI Master Controller Drivers
881#
882# CONFIG_SPI_BITBANG is not set
883CONFIG_SPI_OMAP24XX=y
884
885#
886# SPI Protocol Masters
887#
888# CONFIG_SPI_AT25 is not set
889# CONFIG_SPI_SPIDEV is not set
890# CONFIG_SPI_TLE62X0 is not set
891CONFIG_ARCH_REQUIRE_GPIOLIB=y
892CONFIG_GPIOLIB=y
893CONFIG_DEBUG_GPIO=y
894CONFIG_GPIO_SYSFS=y
895
896#
897# I2C GPIO expanders:
898#
899# CONFIG_GPIO_MAX732X is not set
900# CONFIG_GPIO_PCA953X is not set
901# CONFIG_GPIO_PCF857X is not set
902
903#
904# PCI GPIO expanders:
905#
906
907#
908# SPI GPIO expanders:
909#
910# CONFIG_GPIO_MAX7301 is not set
911# CONFIG_GPIO_MCP23S08 is not set
912# CONFIG_W1 is not set
913CONFIG_POWER_SUPPLY=m
914# CONFIG_POWER_SUPPLY_DEBUG is not set
915# CONFIG_PDA_POWER is not set
916# CONFIG_BATTERY_DS2760 is not set
917CONFIG_HWMON=y
918# CONFIG_HWMON_VID is not set
919# CONFIG_SENSORS_AD7414 is not set
920# CONFIG_SENSORS_AD7418 is not set
921# CONFIG_SENSORS_ADCXX is not set
922# CONFIG_SENSORS_ADM1021 is not set
923# CONFIG_SENSORS_ADM1025 is not set
924# CONFIG_SENSORS_ADM1026 is not set
925# CONFIG_SENSORS_ADM1029 is not set
926# CONFIG_SENSORS_ADM1031 is not set
927# CONFIG_SENSORS_ADM9240 is not set
928# CONFIG_SENSORS_ADT7470 is not set
929# CONFIG_SENSORS_ADT7473 is not set
930# CONFIG_SENSORS_ATXP1 is not set
931# CONFIG_SENSORS_DS1621 is not set
932# CONFIG_SENSORS_F71805F is not set
933# CONFIG_SENSORS_F71882FG is not set
934# CONFIG_SENSORS_F75375S is not set
935# CONFIG_SENSORS_GL518SM is not set
936# CONFIG_SENSORS_GL520SM is not set
937# CONFIG_SENSORS_IT87 is not set
938# CONFIG_SENSORS_LM63 is not set
939# CONFIG_SENSORS_LM70 is not set
940# CONFIG_SENSORS_LM75 is not set
941# CONFIG_SENSORS_LM77 is not set
942# CONFIG_SENSORS_LM78 is not set
943# CONFIG_SENSORS_LM80 is not set
944# CONFIG_SENSORS_LM83 is not set
945# CONFIG_SENSORS_LM85 is not set
946# CONFIG_SENSORS_LM87 is not set
947# CONFIG_SENSORS_LM90 is not set
948# CONFIG_SENSORS_LM92 is not set
949# CONFIG_SENSORS_LM93 is not set
950# CONFIG_SENSORS_MAX1111 is not set
951# CONFIG_SENSORS_MAX1619 is not set
952# CONFIG_SENSORS_MAX6650 is not set
953# CONFIG_SENSORS_PC87360 is not set
954# CONFIG_SENSORS_PC87427 is not set
955# CONFIG_SENSORS_DME1737 is not set
956# CONFIG_SENSORS_SMSC47M1 is not set
957# CONFIG_SENSORS_SMSC47M192 is not set
958# CONFIG_SENSORS_SMSC47B397 is not set
959# CONFIG_SENSORS_ADS7828 is not set
960# CONFIG_SENSORS_THMC50 is not set
961# CONFIG_SENSORS_VT1211 is not set
962# CONFIG_SENSORS_W83781D is not set
963# CONFIG_SENSORS_W83791D is not set
964# CONFIG_SENSORS_W83792D is not set
965# CONFIG_SENSORS_W83793 is not set
966# CONFIG_SENSORS_W83L785TS is not set
967# CONFIG_SENSORS_W83L786NG is not set
968# CONFIG_SENSORS_W83627HF is not set
969# CONFIG_SENSORS_W83627EHF is not set
970# CONFIG_HWMON_DEBUG_CHIP is not set
971# CONFIG_THERMAL is not set
972# CONFIG_THERMAL_HWMON is not set
973CONFIG_WATCHDOG=y
974CONFIG_WATCHDOG_NOWAYOUT=y
975
976#
977# Watchdog Device Drivers
978#
979# CONFIG_SOFT_WATCHDOG is not set
980
981#
982# USB-based Watchdog Cards
983#
984# CONFIG_USBPCWATCHDOG is not set
985
986#
987# Sonics Silicon Backplane
988#
989CONFIG_SSB_POSSIBLE=y
990# CONFIG_SSB is not set
991
992#
993# Multifunction device drivers
994#
995# CONFIG_MFD_CORE is not set
996# CONFIG_MFD_SM501 is not set
997# CONFIG_HTC_EGPIO is not set
998# CONFIG_HTC_PASIC3 is not set
999# CONFIG_UCB1400_CORE is not set
1000# CONFIG_MFD_TMIO is not set
1001# CONFIG_MFD_T7L66XB is not set
1002# CONFIG_MFD_TC6387XB is not set
1003# CONFIG_MFD_TC6393XB is not set
1004
1005#
1006# Multimedia devices
1007#
1008
1009#
1010# Multimedia core support
1011#
1012CONFIG_VIDEO_DEV=m
1013CONFIG_VIDEO_V4L2_COMMON=m
1014CONFIG_VIDEO_ALLOW_V4L1=y
1015CONFIG_VIDEO_V4L1_COMPAT=y
1016CONFIG_DVB_CORE=m
1017CONFIG_VIDEO_MEDIA=m
1018
1019#
1020# Multimedia drivers
1021#
1022CONFIG_MEDIA_ATTACH=y
1023CONFIG_MEDIA_TUNER=m
1024# CONFIG_MEDIA_TUNER_CUSTOMIZE is not set
1025CONFIG_MEDIA_TUNER_SIMPLE=m
1026CONFIG_MEDIA_TUNER_TDA8290=m
1027CONFIG_MEDIA_TUNER_TDA827X=m
1028CONFIG_MEDIA_TUNER_TDA18271=m
1029CONFIG_MEDIA_TUNER_TDA9887=m
1030CONFIG_MEDIA_TUNER_TEA5761=m
1031CONFIG_MEDIA_TUNER_TEA5767=m
1032CONFIG_MEDIA_TUNER_MT20XX=m
1033CONFIG_MEDIA_TUNER_MT2060=m
1034CONFIG_MEDIA_TUNER_MT2266=m
1035CONFIG_MEDIA_TUNER_QT1010=m
1036CONFIG_MEDIA_TUNER_XC2028=m
1037CONFIG_MEDIA_TUNER_XC5000=m
1038CONFIG_MEDIA_TUNER_MXL5005S=m
1039CONFIG_VIDEO_V4L2=m
1040CONFIG_VIDEO_V4L1=m
1041CONFIG_VIDEO_TVEEPROM=m
1042CONFIG_VIDEO_TUNER=m
1043CONFIG_VIDEO_CAPTURE_DRIVERS=y
1044# CONFIG_VIDEO_ADV_DEBUG is not set
1045CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
1046CONFIG_VIDEO_MSP3400=m
1047CONFIG_VIDEO_CS53L32A=m
1048CONFIG_VIDEO_WM8775=m
1049CONFIG_VIDEO_SAA711X=m
1050CONFIG_VIDEO_CX25840=m
1051CONFIG_VIDEO_CX2341X=m
1052# CONFIG_VIDEO_VIVI is not set
1053# CONFIG_VIDEO_CPIA is not set
1054# CONFIG_VIDEO_CPIA2 is not set
1055# CONFIG_VIDEO_SAA5246A is not set
1056# CONFIG_VIDEO_SAA5249 is not set
1057# CONFIG_TUNER_3036 is not set
1058# CONFIG_VIDEO_AU0828 is not set
1059CONFIG_V4L_USB_DRIVERS=y
1060CONFIG_USB_VIDEO_CLASS=m
1061CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
1062# CONFIG_USB_GSPCA is not set
1063CONFIG_VIDEO_PVRUSB2=m
1064CONFIG_VIDEO_PVRUSB2_SYSFS=y
1065CONFIG_VIDEO_PVRUSB2_DVB=y
1066# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set
1067# CONFIG_VIDEO_EM28XX is not set
1068CONFIG_VIDEO_USBVISION=m
1069CONFIG_VIDEO_USBVIDEO=m
1070CONFIG_USB_VICAM=m
1071CONFIG_USB_IBMCAM=m
1072CONFIG_USB_KONICAWC=m
1073CONFIG_USB_QUICKCAM_MESSENGER=m
1074# CONFIG_USB_ET61X251 is not set
1075CONFIG_VIDEO_OVCAMCHIP=m
1076CONFIG_USB_W9968CF=m
1077CONFIG_USB_OV511=m
1078CONFIG_USB_SE401=m
1079CONFIG_USB_SN9C102=m
1080CONFIG_USB_STV680=m
1081# CONFIG_USB_ZC0301 is not set
1082CONFIG_USB_PWC=m
1083# CONFIG_USB_PWC_DEBUG is not set
1084CONFIG_USB_ZR364XX=m
1085# CONFIG_USB_STKWEBCAM is not set
1086# CONFIG_USB_S2255 is not set
1087# CONFIG_SOC_CAMERA is not set
1088# CONFIG_VIDEO_SH_MOBILE_CEU is not set
1089CONFIG_RADIO_ADAPTERS=y
1090# CONFIG_USB_DSBR is not set
1091# CONFIG_USB_SI470X is not set
1092CONFIG_DVB_CAPTURE_DRIVERS=y
1093# CONFIG_TTPCI_EEPROM is not set
1094
1095#
1096# Supported USB Adapters
1097#
1098CONFIG_DVB_USB=m
1099# CONFIG_DVB_USB_DEBUG is not set
1100CONFIG_DVB_USB_A800=m
1101CONFIG_DVB_USB_DIBUSB_MB=m
1102# CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set
1103CONFIG_DVB_USB_DIBUSB_MC=m
1104CONFIG_DVB_USB_DIB0700=m
1105CONFIG_DVB_USB_UMT_010=m
1106CONFIG_DVB_USB_CXUSB=m
1107CONFIG_DVB_USB_M920X=m
1108CONFIG_DVB_USB_GL861=m
1109CONFIG_DVB_USB_AU6610=m
1110CONFIG_DVB_USB_DIGITV=m
1111CONFIG_DVB_USB_VP7045=m
1112CONFIG_DVB_USB_VP702X=m
1113CONFIG_DVB_USB_GP8PSK=m
1114CONFIG_DVB_USB_NOVA_T_USB2=m
1115CONFIG_DVB_USB_TTUSB2=m
1116CONFIG_DVB_USB_DTT200U=m
1117CONFIG_DVB_USB_OPERA1=m
1118CONFIG_DVB_USB_AF9005=m
1119CONFIG_DVB_USB_AF9005_REMOTE=m
1120# CONFIG_DVB_USB_DW2102 is not set
1121# CONFIG_DVB_USB_ANYSEE is not set
1122CONFIG_DVB_TTUSB_BUDGET=m
1123CONFIG_DVB_TTUSB_DEC=m
1124CONFIG_DVB_CINERGYT2=m
1125# CONFIG_DVB_CINERGYT2_TUNING is not set
1126# CONFIG_DVB_SIANO_SMS1XXX is not set
1127
1128#
1129# Supported FlexCopII (B2C2) Adapters
1130#
1131# CONFIG_DVB_B2C2_FLEXCOP is not set
1132
1133#
1134# Supported DVB Frontends
1135#
1136
1137#
1138# Customise DVB Frontends
1139#
1140# CONFIG_DVB_FE_CUSTOMISE is not set
1141
1142#
1143# DVB-S (satellite) frontends
1144#
1145CONFIG_DVB_CX24110=m
1146CONFIG_DVB_CX24123=m
1147CONFIG_DVB_MT312=m
1148CONFIG_DVB_S5H1420=m
1149CONFIG_DVB_STV0299=m
1150CONFIG_DVB_TDA8083=m
1151CONFIG_DVB_TDA10086=m
1152CONFIG_DVB_VES1X93=m
1153CONFIG_DVB_TUNER_ITD1000=m
1154CONFIG_DVB_TDA826X=m
1155CONFIG_DVB_TUA6100=m
1156
1157#
1158# DVB-T (terrestrial) frontends
1159#
1160CONFIG_DVB_SP8870=m
1161CONFIG_DVB_SP887X=m
1162CONFIG_DVB_CX22700=m
1163CONFIG_DVB_CX22702=m
1164# CONFIG_DVB_DRX397XD is not set
1165CONFIG_DVB_L64781=m
1166CONFIG_DVB_TDA1004X=m
1167CONFIG_DVB_NXT6000=m
1168CONFIG_DVB_MT352=m
1169CONFIG_DVB_ZL10353=m
1170CONFIG_DVB_DIB3000MB=m
1171CONFIG_DVB_DIB3000MC=m
1172CONFIG_DVB_DIB7000M=m
1173CONFIG_DVB_DIB7000P=m
1174CONFIG_DVB_TDA10048=m
1175
1176#
1177# DVB-C (cable) frontends
1178#
1179CONFIG_DVB_VES1820=m
1180CONFIG_DVB_TDA10021=m
1181CONFIG_DVB_TDA10023=m
1182CONFIG_DVB_STV0297=m
1183
1184#
1185# ATSC (North American/Korean Terrestrial/Cable DTV) frontends
1186#
1187CONFIG_DVB_NXT200X=m
1188# CONFIG_DVB_OR51211 is not set
1189# CONFIG_DVB_OR51132 is not set
1190CONFIG_DVB_BCM3510=m
1191CONFIG_DVB_LGDT330X=m
1192CONFIG_DVB_S5H1409=m
1193CONFIG_DVB_AU8522=m
1194CONFIG_DVB_S5H1411=m
1195
1196#
1197# Digital terrestrial only tuners/PLL
1198#
1199CONFIG_DVB_PLL=m
1200CONFIG_DVB_TUNER_DIB0070=m
1201
1202#
1203# SEC control devices for DVB-S
1204#
1205CONFIG_DVB_LNBP21=m
1206# CONFIG_DVB_ISL6405 is not set
1207CONFIG_DVB_ISL6421=m
1208# CONFIG_DAB is not set
1209
1210#
1211# Graphics support
1212#
1213# CONFIG_VGASTATE is not set
1214# CONFIG_VIDEO_OUTPUT_CONTROL is not set
1215# CONFIG_FB is not set
1216# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
1217
1218#
1219# Display device support
1220#
1221CONFIG_DISPLAY_SUPPORT=y
1222
1223#
1224# Display hardware drivers
1225#
1226
1227#
1228# Console display driver support
1229#
1230# CONFIG_VGA_CONSOLE is not set
1231CONFIG_DUMMY_CONSOLE=y
1232CONFIG_SOUND=y
1233CONFIG_SND=y
1234CONFIG_SND_TIMER=y
1235CONFIG_SND_PCM=y
1236CONFIG_SND_HWDEP=y
1237CONFIG_SND_RAWMIDI=y
1238CONFIG_SND_SEQUENCER=m
1239# CONFIG_SND_SEQ_DUMMY is not set
1240CONFIG_SND_OSSEMUL=y
1241CONFIG_SND_MIXER_OSS=y
1242CONFIG_SND_PCM_OSS=y
1243CONFIG_SND_PCM_OSS_PLUGINS=y
1244CONFIG_SND_SEQUENCER_OSS=y
1245# CONFIG_SND_DYNAMIC_MINORS is not set
1246CONFIG_SND_SUPPORT_OLD_API=y
1247CONFIG_SND_VERBOSE_PROCFS=y
1248CONFIG_SND_VERBOSE_PRINTK=y
1249CONFIG_SND_DEBUG=y
1250# CONFIG_SND_DEBUG_VERBOSE is not set
1251# CONFIG_SND_PCM_XRUN_DEBUG is not set
1252CONFIG_SND_DRIVERS=y
1253# CONFIG_SND_DUMMY is not set
1254# CONFIG_SND_VIRMIDI is not set
1255# CONFIG_SND_MTPAV is not set
1256# CONFIG_SND_SERIAL_U16550 is not set
1257# CONFIG_SND_MPU401 is not set
1258CONFIG_SND_ARM=y
1259CONFIG_SND_SPI=y
1260CONFIG_SND_USB=y
1261CONFIG_SND_USB_AUDIO=y
1262CONFIG_SND_USB_CAIAQ=m
1263CONFIG_SND_USB_CAIAQ_INPUT=y
1264CONFIG_SND_SOC=y
1265CONFIG_SND_OMAP_SOC=y
1266# CONFIG_SOUND_PRIME is not set
1267CONFIG_HID_SUPPORT=y
1268CONFIG_HID=y
1269CONFIG_HID_DEBUG=y
1270# CONFIG_HIDRAW is not set
1271
1272#
1273# USB Input Devices
1274#
1275CONFIG_USB_HID=y
1276# CONFIG_USB_HIDINPUT_POWERBOOK is not set
1277# CONFIG_HID_FF is not set
1278# CONFIG_USB_HIDDEV is not set
1279CONFIG_USB_SUPPORT=y
1280CONFIG_USB_ARCH_HAS_HCD=y
1281CONFIG_USB_ARCH_HAS_OHCI=y
1282# CONFIG_USB_ARCH_HAS_EHCI is not set
1283CONFIG_USB=y
1284CONFIG_USB_DEBUG=y
1285CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
1286
1287#
1288# Miscellaneous USB options
1289#
1290CONFIG_USB_DEVICEFS=y
1291CONFIG_USB_DEVICE_CLASS=y
1292# CONFIG_USB_DYNAMIC_MINORS is not set
1293# CONFIG_USB_OTG is not set
1294# CONFIG_USB_OTG_WHITELIST is not set
1295# CONFIG_USB_OTG_BLACKLIST_HUB is not set
1296CONFIG_USB_MON=y
1297
1298#
1299# USB Host Controller Drivers
1300#
1301# CONFIG_USB_C67X00_HCD is not set
1302# CONFIG_USB_ISP116X_HCD is not set
1303# CONFIG_USB_ISP1760_HCD is not set
1304# CONFIG_USB_OHCI_HCD is not set
1305# CONFIG_USB_SL811_HCD is not set
1306# CONFIG_USB_R8A66597_HCD is not set
1307CONFIG_USB_MUSB_HDRC=y
1308CONFIG_USB_MUSB_SOC=y
1309
1310#
1311# OMAP 343x high speed USB support
1312#
1313CONFIG_USB_MUSB_HOST=y
1314# CONFIG_USB_MUSB_PERIPHERAL is not set
1315# CONFIG_USB_MUSB_OTG is not set
1316CONFIG_USB_MUSB_HDRC_HCD=y
1317CONFIG_MUSB_PIO_ONLY=y
1318# CONFIG_USB_MUSB_DEBUG is not set
1319
1320#
1321# USB Device Class drivers
1322#
1323CONFIG_USB_ACM=m
1324CONFIG_USB_PRINTER=m
1325CONFIG_USB_WDM=y
1326
1327#
1328# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
1329#
1330
1331#
1332# may also be needed; see USB_STORAGE Help for more information
1333#
1334CONFIG_USB_STORAGE=y
1335# CONFIG_USB_STORAGE_DEBUG is not set
1336# CONFIG_USB_STORAGE_DATAFAB is not set
1337# CONFIG_USB_STORAGE_FREECOM is not set
1338# CONFIG_USB_STORAGE_ISD200 is not set
1339# CONFIG_USB_STORAGE_DPCM is not set
1340# CONFIG_USB_STORAGE_USBAT is not set
1341# CONFIG_USB_STORAGE_SDDR09 is not set
1342# CONFIG_USB_STORAGE_SDDR55 is not set
1343# CONFIG_USB_STORAGE_JUMPSHOT is not set
1344# CONFIG_USB_STORAGE_ALAUDA is not set
1345# CONFIG_USB_STORAGE_ONETOUCH is not set
1346# CONFIG_USB_STORAGE_KARMA is not set
1347# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
1348# CONFIG_USB_LIBUSUAL is not set
1349
1350#
1351# USB Imaging devices
1352#
1353# CONFIG_USB_MDC800 is not set
1354# CONFIG_USB_MICROTEK is not set
1355
1356#
1357# USB port drivers
1358#
1359CONFIG_USB_SERIAL=m
1360# CONFIG_USB_EZUSB is not set
1361# CONFIG_USB_SERIAL_GENERIC is not set
1362# CONFIG_USB_SERIAL_AIRCABLE is not set
1363# CONFIG_USB_SERIAL_ARK3116 is not set
1364# CONFIG_USB_SERIAL_BELKIN is not set
1365# CONFIG_USB_SERIAL_CH341 is not set
1366# CONFIG_USB_SERIAL_WHITEHEAT is not set
1367# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
1368# CONFIG_USB_SERIAL_CP2101 is not set
1369# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
1370# CONFIG_USB_SERIAL_EMPEG is not set
1371# CONFIG_USB_SERIAL_FTDI_SIO is not set
1372# CONFIG_USB_SERIAL_FUNSOFT is not set
1373# CONFIG_USB_SERIAL_VISOR is not set
1374# CONFIG_USB_SERIAL_IPAQ is not set
1375# CONFIG_USB_SERIAL_IR is not set
1376# CONFIG_USB_SERIAL_EDGEPORT is not set
1377# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
1378# CONFIG_USB_SERIAL_GARMIN is not set
1379# CONFIG_USB_SERIAL_IPW is not set
1380# CONFIG_USB_SERIAL_IUU is not set
1381# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
1382# CONFIG_USB_SERIAL_KEYSPAN is not set
1383# CONFIG_USB_SERIAL_KLSI is not set
1384# CONFIG_USB_SERIAL_KOBIL_SCT is not set
1385# CONFIG_USB_SERIAL_MCT_U232 is not set
1386# CONFIG_USB_SERIAL_MOS7720 is not set
1387# CONFIG_USB_SERIAL_MOS7840 is not set
1388# CONFIG_USB_SERIAL_MOTOROLA is not set
1389# CONFIG_USB_SERIAL_NAVMAN is not set
1390# CONFIG_USB_SERIAL_PL2303 is not set
1391# CONFIG_USB_SERIAL_OTI6858 is not set
1392# CONFIG_USB_SERIAL_SPCP8X5 is not set
1393# CONFIG_USB_SERIAL_HP4X is not set
1394# CONFIG_USB_SERIAL_SAFE is not set
1395# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
1396# CONFIG_USB_SERIAL_TI is not set
1397# CONFIG_USB_SERIAL_CYBERJACK is not set
1398# CONFIG_USB_SERIAL_XIRCOM is not set
1399# CONFIG_USB_SERIAL_OPTION is not set
1400# CONFIG_USB_SERIAL_OMNINET is not set
1401# CONFIG_USB_SERIAL_DEBUG is not set
1402
1403#
1404# USB Miscellaneous drivers
1405#
1406CONFIG_USB_EMI62=m
1407CONFIG_USB_EMI26=m
1408# CONFIG_USB_ADUTUX is not set
1409# CONFIG_USB_RIO500 is not set
1410CONFIG_USB_LEGOTOWER=m
1411CONFIG_USB_LCD=m
1412# CONFIG_USB_BERRY_CHARGE is not set
1413CONFIG_USB_LED=m
1414# CONFIG_USB_CYPRESS_CY7C63 is not set
1415# CONFIG_USB_CYTHERM is not set
1416# CONFIG_USB_PHIDGET is not set
1417# CONFIG_USB_IDMOUSE is not set
1418# CONFIG_USB_FTDI_ELAN is not set
1419# CONFIG_USB_APPLEDISPLAY is not set
1420# CONFIG_USB_LD is not set
1421# CONFIG_USB_TRANCEVIBRATOR is not set
1422# CONFIG_USB_IOWARRIOR is not set
1423# CONFIG_USB_TEST is not set
1424# CONFIG_USB_ISIGHTFW is not set
1425# CONFIG_USB_GADGET is not set
1426CONFIG_MMC=y
1427# CONFIG_MMC_DEBUG is not set
1428CONFIG_MMC_UNSAFE_RESUME=y
1429
1430#
1431# MMC/SD Card Drivers
1432#
1433CONFIG_MMC_BLOCK=y
1434CONFIG_MMC_BLOCK_BOUNCE=y
1435CONFIG_SDIO_UART=y
1436# CONFIG_MMC_TEST is not set
1437
1438#
1439# MMC/SD Host Controller Drivers
1440#
1441# CONFIG_MMC_SDHCI is not set
1442# CONFIG_MMC_OMAP is not set
1443# CONFIG_MMC_SPI is not set
1444# CONFIG_MEMSTICK is not set
1445# CONFIG_ACCESSIBILITY is not set
1446CONFIG_NEW_LEDS=y
1447CONFIG_LEDS_CLASS=y
1448
1449#
1450# LED drivers
1451#
1452# CONFIG_LEDS_PCA9532 is not set
1453CONFIG_LEDS_GPIO=y
1454# CONFIG_LEDS_PCA955X is not set
1455
1456#
1457# LED Triggers
1458#
1459CONFIG_LEDS_TRIGGERS=y
1460CONFIG_LEDS_TRIGGER_TIMER=y
1461CONFIG_LEDS_TRIGGER_HEARTBEAT=y
1462# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
1463CONFIG_RTC_LIB=y
1464CONFIG_RTC_CLASS=y
1465CONFIG_RTC_HCTOSYS=y
1466CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1467# CONFIG_RTC_DEBUG is not set
1468
1469#
1470# RTC interfaces
1471#
1472CONFIG_RTC_INTF_SYSFS=y
1473CONFIG_RTC_INTF_PROC=y
1474CONFIG_RTC_INTF_DEV=y
1475# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1476# CONFIG_RTC_DRV_TEST is not set
1477
1478#
1479# I2C RTC drivers
1480#
1481# CONFIG_RTC_DRV_DS1307 is not set
1482# CONFIG_RTC_DRV_DS1374 is not set
1483# CONFIG_RTC_DRV_DS1672 is not set
1484# CONFIG_RTC_DRV_MAX6900 is not set
1485# CONFIG_RTC_DRV_RS5C372 is not set
1486# CONFIG_RTC_DRV_ISL1208 is not set
1487# CONFIG_RTC_DRV_X1205 is not set
1488# CONFIG_RTC_DRV_PCF8563 is not set
1489# CONFIG_RTC_DRV_PCF8583 is not set
1490# CONFIG_RTC_DRV_M41T80 is not set
1491# CONFIG_RTC_DRV_S35390A is not set
1492# CONFIG_RTC_DRV_FM3130 is not set
1493
1494#
1495# SPI RTC drivers
1496#
1497# CONFIG_RTC_DRV_M41T94 is not set
1498# CONFIG_RTC_DRV_DS1305 is not set
1499# CONFIG_RTC_DRV_MAX6902 is not set
1500# CONFIG_RTC_DRV_R9701 is not set
1501# CONFIG_RTC_DRV_RS5C348 is not set
1502
1503#
1504# Platform RTC drivers
1505#
1506# CONFIG_RTC_DRV_CMOS is not set
1507# CONFIG_RTC_DRV_DS1511 is not set
1508# CONFIG_RTC_DRV_DS1553 is not set
1509# CONFIG_RTC_DRV_DS1742 is not set
1510# CONFIG_RTC_DRV_STK17TA8 is not set
1511# CONFIG_RTC_DRV_M48T86 is not set
1512# CONFIG_RTC_DRV_M48T59 is not set
1513# CONFIG_RTC_DRV_V3020 is not set
1514
1515#
1516# on-CPU RTC drivers
1517#
1518# CONFIG_DMADEVICES is not set
1519
1520#
1521# Voltage and Current regulators
1522#
1523# CONFIG_REGULATOR is not set
1524# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
1525# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
1526# CONFIG_REGULATOR_BQ24022 is not set
1527# CONFIG_UIO is not set
1528
1529#
1530# File systems
1531#
1532CONFIG_EXT2_FS=y
1533# CONFIG_EXT2_FS_XATTR is not set
1534# CONFIG_EXT2_FS_XIP is not set
1535CONFIG_EXT3_FS=y
1536# CONFIG_EXT3_FS_XATTR is not set
1537# CONFIG_EXT4DEV_FS is not set
1538CONFIG_JBD=y
1539# CONFIG_JBD_DEBUG is not set
1540# CONFIG_REISERFS_FS is not set
1541# CONFIG_JFS_FS is not set
1542CONFIG_FS_POSIX_ACL=y
1543CONFIG_XFS_FS=m
1544# CONFIG_XFS_QUOTA is not set
1545# CONFIG_XFS_POSIX_ACL is not set
1546# CONFIG_XFS_RT is not set
1547# CONFIG_XFS_DEBUG is not set
1548# CONFIG_GFS2_FS is not set
1549# CONFIG_OCFS2_FS is not set
1550CONFIG_DNOTIFY=y
1551CONFIG_INOTIFY=y
1552CONFIG_INOTIFY_USER=y
1553CONFIG_QUOTA=y
1554# CONFIG_QUOTA_NETLINK_INTERFACE is not set
1555CONFIG_PRINT_QUOTA_WARNING=y
1556# CONFIG_QFMT_V1 is not set
1557CONFIG_QFMT_V2=y
1558CONFIG_QUOTACTL=y
1559# CONFIG_AUTOFS_FS is not set
1560# CONFIG_AUTOFS4_FS is not set
1561CONFIG_FUSE_FS=m
1562
1563#
1564# CD-ROM/DVD Filesystems
1565#
1566CONFIG_ISO9660_FS=m
1567CONFIG_JOLIET=y
1568CONFIG_ZISOFS=y
1569CONFIG_UDF_FS=m
1570CONFIG_UDF_NLS=y
1571
1572#
1573# DOS/FAT/NT Filesystems
1574#
1575CONFIG_FAT_FS=y
1576CONFIG_MSDOS_FS=y
1577CONFIG_VFAT_FS=y
1578CONFIG_FAT_DEFAULT_CODEPAGE=437
1579CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1580# CONFIG_NTFS_FS is not set
1581
1582#
1583# Pseudo filesystems
1584#
1585CONFIG_PROC_FS=y
1586CONFIG_PROC_SYSCTL=y
1587CONFIG_SYSFS=y
1588CONFIG_TMPFS=y
1589# CONFIG_TMPFS_POSIX_ACL is not set
1590# CONFIG_HUGETLB_PAGE is not set
1591# CONFIG_CONFIGFS_FS is not set
1592
1593#
1594# Miscellaneous filesystems
1595#
1596# CONFIG_ADFS_FS is not set
1597# CONFIG_AFFS_FS is not set
1598# CONFIG_HFS_FS is not set
1599# CONFIG_HFSPLUS_FS is not set
1600# CONFIG_BEFS_FS is not set
1601# CONFIG_BFS_FS is not set
1602# CONFIG_EFS_FS is not set
1603CONFIG_JFFS2_FS=y
1604CONFIG_JFFS2_FS_DEBUG=0
1605CONFIG_JFFS2_FS_WRITEBUFFER=y
1606# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
1607CONFIG_JFFS2_SUMMARY=y
1608CONFIG_JFFS2_FS_XATTR=y
1609CONFIG_JFFS2_FS_POSIX_ACL=y
1610CONFIG_JFFS2_FS_SECURITY=y
1611CONFIG_JFFS2_COMPRESSION_OPTIONS=y
1612CONFIG_JFFS2_ZLIB=y
1613CONFIG_JFFS2_LZO=y
1614CONFIG_JFFS2_RTIME=y
1615CONFIG_JFFS2_RUBIN=y
1616# CONFIG_JFFS2_CMODE_NONE is not set
1617CONFIG_JFFS2_CMODE_PRIORITY=y
1618# CONFIG_JFFS2_CMODE_SIZE is not set
1619# CONFIG_JFFS2_CMODE_FAVOURLZO is not set
1620# CONFIG_CRAMFS is not set
1621# CONFIG_VXFS_FS is not set
1622# CONFIG_MINIX_FS is not set
1623# CONFIG_OMFS_FS is not set
1624# CONFIG_HPFS_FS is not set
1625# CONFIG_QNX4FS_FS is not set
1626# CONFIG_ROMFS_FS is not set
1627# CONFIG_SYSV_FS is not set
1628# CONFIG_UFS_FS is not set
1629CONFIG_NETWORK_FILESYSTEMS=y
1630CONFIG_NFS_FS=y
1631CONFIG_NFS_V3=y
1632# CONFIG_NFS_V3_ACL is not set
1633CONFIG_NFS_V4=y
1634CONFIG_ROOT_NFS=y
1635# CONFIG_NFSD is not set
1636CONFIG_LOCKD=y
1637CONFIG_LOCKD_V4=y
1638CONFIG_NFS_COMMON=y
1639CONFIG_SUNRPC=y
1640CONFIG_SUNRPC_GSS=y
1641CONFIG_RPCSEC_GSS_KRB5=y
1642# CONFIG_RPCSEC_GSS_SPKM3 is not set
1643# CONFIG_SMB_FS is not set
1644# CONFIG_CIFS is not set
1645# CONFIG_NCP_FS is not set
1646# CONFIG_CODA_FS is not set
1647# CONFIG_AFS_FS is not set
1648
1649#
1650# Partition Types
1651#
1652CONFIG_PARTITION_ADVANCED=y
1653# CONFIG_ACORN_PARTITION is not set
1654# CONFIG_OSF_PARTITION is not set
1655# CONFIG_AMIGA_PARTITION is not set
1656# CONFIG_ATARI_PARTITION is not set
1657# CONFIG_MAC_PARTITION is not set
1658CONFIG_MSDOS_PARTITION=y
1659# CONFIG_BSD_DISKLABEL is not set
1660# CONFIG_MINIX_SUBPARTITION is not set
1661# CONFIG_SOLARIS_X86_PARTITION is not set
1662# CONFIG_UNIXWARE_DISKLABEL is not set
1663# CONFIG_LDM_PARTITION is not set
1664# CONFIG_SGI_PARTITION is not set
1665# CONFIG_ULTRIX_PARTITION is not set
1666# CONFIG_SUN_PARTITION is not set
1667# CONFIG_KARMA_PARTITION is not set
1668# CONFIG_EFI_PARTITION is not set
1669# CONFIG_SYSV68_PARTITION is not set
1670CONFIG_NLS=y
1671CONFIG_NLS_DEFAULT="iso8859-1"
1672CONFIG_NLS_CODEPAGE_437=y
1673# CONFIG_NLS_CODEPAGE_737 is not set
1674# CONFIG_NLS_CODEPAGE_775 is not set
1675# CONFIG_NLS_CODEPAGE_850 is not set
1676# CONFIG_NLS_CODEPAGE_852 is not set
1677# CONFIG_NLS_CODEPAGE_855 is not set
1678# CONFIG_NLS_CODEPAGE_857 is not set
1679# CONFIG_NLS_CODEPAGE_860 is not set
1680# CONFIG_NLS_CODEPAGE_861 is not set
1681# CONFIG_NLS_CODEPAGE_862 is not set
1682# CONFIG_NLS_CODEPAGE_863 is not set
1683# CONFIG_NLS_CODEPAGE_864 is not set
1684# CONFIG_NLS_CODEPAGE_865 is not set
1685# CONFIG_NLS_CODEPAGE_866 is not set
1686# CONFIG_NLS_CODEPAGE_869 is not set
1687# CONFIG_NLS_CODEPAGE_936 is not set
1688# CONFIG_NLS_CODEPAGE_950 is not set
1689# CONFIG_NLS_CODEPAGE_932 is not set
1690# CONFIG_NLS_CODEPAGE_949 is not set
1691# CONFIG_NLS_CODEPAGE_874 is not set
1692# CONFIG_NLS_ISO8859_8 is not set
1693# CONFIG_NLS_CODEPAGE_1250 is not set
1694# CONFIG_NLS_CODEPAGE_1251 is not set
1695# CONFIG_NLS_ASCII is not set
1696CONFIG_NLS_ISO8859_1=y
1697# CONFIG_NLS_ISO8859_2 is not set
1698# CONFIG_NLS_ISO8859_3 is not set
1699# CONFIG_NLS_ISO8859_4 is not set
1700# CONFIG_NLS_ISO8859_5 is not set
1701# CONFIG_NLS_ISO8859_6 is not set
1702# CONFIG_NLS_ISO8859_7 is not set
1703# CONFIG_NLS_ISO8859_9 is not set
1704# CONFIG_NLS_ISO8859_13 is not set
1705# CONFIG_NLS_ISO8859_14 is not set
1706# CONFIG_NLS_ISO8859_15 is not set
1707# CONFIG_NLS_KOI8_R is not set
1708# CONFIG_NLS_KOI8_U is not set
1709# CONFIG_NLS_UTF8 is not set
1710# CONFIG_DLM is not set
1711
1712#
1713# Kernel hacking
1714#
1715# CONFIG_PRINTK_TIME is not set
1716CONFIG_ENABLE_WARN_DEPRECATED=y
1717CONFIG_ENABLE_MUST_CHECK=y
1718CONFIG_FRAME_WARN=1024
1719CONFIG_MAGIC_SYSRQ=y
1720# CONFIG_UNUSED_SYMBOLS is not set
1721CONFIG_DEBUG_FS=y
1722# CONFIG_HEADERS_CHECK is not set
1723CONFIG_DEBUG_KERNEL=y
1724# CONFIG_DEBUG_SHIRQ is not set
1725CONFIG_DETECT_SOFTLOCKUP=y
1726# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
1727CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
1728CONFIG_SCHED_DEBUG=y
1729CONFIG_SCHEDSTATS=y
1730CONFIG_TIMER_STATS=y
1731# CONFIG_DEBUG_OBJECTS is not set
1732# CONFIG_SLUB_DEBUG_ON is not set
1733# CONFIG_SLUB_STATS is not set
1734# CONFIG_DEBUG_RT_MUTEXES is not set
1735# CONFIG_RT_MUTEX_TESTER is not set
1736# CONFIG_DEBUG_SPINLOCK is not set
1737CONFIG_DEBUG_MUTEXES=y
1738# CONFIG_DEBUG_LOCK_ALLOC is not set
1739# CONFIG_PROVE_LOCKING is not set
1740# CONFIG_LOCK_STAT is not set
1741# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1742# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1743# CONFIG_DEBUG_KOBJECT is not set
1744# CONFIG_DEBUG_BUGVERBOSE is not set
1745# CONFIG_DEBUG_INFO is not set
1746# CONFIG_DEBUG_VM is not set
1747# CONFIG_DEBUG_WRITECOUNT is not set
1748# CONFIG_DEBUG_MEMORY_INIT is not set
1749# CONFIG_DEBUG_LIST is not set
1750# CONFIG_DEBUG_SG is not set
1751CONFIG_FRAME_POINTER=y
1752# CONFIG_BOOT_PRINTK_DELAY is not set
1753# CONFIG_RCU_TORTURE_TEST is not set
1754# CONFIG_BACKTRACE_SELF_TEST is not set
1755# CONFIG_FAULT_INJECTION is not set
1756# CONFIG_LATENCYTOP is not set
1757CONFIG_HAVE_FTRACE=y
1758CONFIG_HAVE_DYNAMIC_FTRACE=y
1759# CONFIG_FTRACE is not set
1760# CONFIG_IRQSOFF_TRACER is not set
1761# CONFIG_SCHED_TRACER is not set
1762# CONFIG_CONTEXT_SWITCH_TRACER is not set
1763# CONFIG_SAMPLES is not set
1764CONFIG_HAVE_ARCH_KGDB=y
1765# CONFIG_KGDB is not set
1766# CONFIG_DEBUG_USER is not set
1767# CONFIG_DEBUG_ERRORS is not set
1768# CONFIG_DEBUG_STACK_USAGE is not set
1769# CONFIG_DEBUG_LL is not set
1770
1771#
1772# Security options
1773#
1774# CONFIG_KEYS is not set
1775# CONFIG_SECURITY is not set
1776# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1777CONFIG_XOR_BLOCKS=m
1778CONFIG_ASYNC_CORE=m
1779CONFIG_ASYNC_MEMCPY=m
1780CONFIG_ASYNC_XOR=m
1781CONFIG_CRYPTO=y
1782
1783#
1784# Crypto core or helper
1785#
1786CONFIG_CRYPTO_ALGAPI=y
1787CONFIG_CRYPTO_AEAD=m
1788CONFIG_CRYPTO_BLKCIPHER=y
1789CONFIG_CRYPTO_HASH=m
1790CONFIG_CRYPTO_MANAGER=y
1791CONFIG_CRYPTO_GF128MUL=m
1792CONFIG_CRYPTO_NULL=m
1793CONFIG_CRYPTO_CRYPTD=m
1794# CONFIG_CRYPTO_AUTHENC is not set
1795CONFIG_CRYPTO_TEST=m
1796
1797#
1798# Authenticated Encryption with Associated Data
1799#
1800# CONFIG_CRYPTO_CCM is not set
1801# CONFIG_CRYPTO_GCM is not set
1802# CONFIG_CRYPTO_SEQIV is not set
1803
1804#
1805# Block modes
1806#
1807CONFIG_CRYPTO_CBC=y
1808# CONFIG_CRYPTO_CTR is not set
1809# CONFIG_CRYPTO_CTS is not set
1810CONFIG_CRYPTO_ECB=y
1811CONFIG_CRYPTO_LRW=m
1812CONFIG_CRYPTO_PCBC=m
1813# CONFIG_CRYPTO_XTS is not set
1814
1815#
1816# Hash modes
1817#
1818CONFIG_CRYPTO_HMAC=m
1819CONFIG_CRYPTO_XCBC=m
1820
1821#
1822# Digest
1823#
1824CONFIG_CRYPTO_CRC32C=m
1825CONFIG_CRYPTO_MD4=m
1826CONFIG_CRYPTO_MD5=y
1827CONFIG_CRYPTO_MICHAEL_MIC=y
1828# CONFIG_CRYPTO_RMD128 is not set
1829# CONFIG_CRYPTO_RMD160 is not set
1830# CONFIG_CRYPTO_RMD256 is not set
1831# CONFIG_CRYPTO_RMD320 is not set
1832CONFIG_CRYPTO_SHA1=m
1833CONFIG_CRYPTO_SHA256=m
1834CONFIG_CRYPTO_SHA512=m
1835CONFIG_CRYPTO_TGR192=m
1836CONFIG_CRYPTO_WP512=m
1837
1838#
1839# Ciphers
1840#
1841CONFIG_CRYPTO_AES=y
1842CONFIG_CRYPTO_ANUBIS=m
1843CONFIG_CRYPTO_ARC4=y
1844CONFIG_CRYPTO_BLOWFISH=m
1845CONFIG_CRYPTO_CAMELLIA=m
1846CONFIG_CRYPTO_CAST5=m
1847CONFIG_CRYPTO_CAST6=m
1848CONFIG_CRYPTO_DES=y
1849CONFIG_CRYPTO_FCRYPT=m
1850CONFIG_CRYPTO_KHAZAD=m
1851# CONFIG_CRYPTO_SALSA20 is not set
1852# CONFIG_CRYPTO_SEED is not set
1853CONFIG_CRYPTO_SERPENT=m
1854CONFIG_CRYPTO_TEA=m
1855CONFIG_CRYPTO_TWOFISH=m
1856CONFIG_CRYPTO_TWOFISH_COMMON=m
1857
1858#
1859# Compression
1860#
1861CONFIG_CRYPTO_DEFLATE=m
1862# CONFIG_CRYPTO_LZO is not set
1863CONFIG_CRYPTO_HW=y
1864
1865#
1866# Library routines
1867#
1868CONFIG_BITREVERSE=y
1869# CONFIG_GENERIC_FIND_FIRST_BIT is not set
1870# CONFIG_GENERIC_FIND_NEXT_BIT is not set
1871CONFIG_CRC_CCITT=y
1872CONFIG_CRC16=m
1873CONFIG_CRC_T10DIF=y
1874CONFIG_CRC_ITU_T=y
1875CONFIG_CRC32=y
1876CONFIG_CRC7=y
1877CONFIG_LIBCRC32C=y
1878CONFIG_ZLIB_INFLATE=y
1879CONFIG_ZLIB_DEFLATE=y
1880CONFIG_LZO_COMPRESS=y
1881CONFIG_LZO_DECOMPRESS=y
1882CONFIG_PLIST=y
1883CONFIG_HAS_IOMEM=y
1884CONFIG_HAS_IOPORT=y
1885CONFIG_HAS_DMA=y
diff --git a/arch/arm/include/asm/elf.h b/arch/arm/include/asm/elf.h
index 5be016980c19..a58378c343b9 100644
--- a/arch/arm/include/asm/elf.h
+++ b/arch/arm/include/asm/elf.h
@@ -107,6 +107,6 @@ extern int arm_elf_read_implies_exec(const struct elf32_hdr *, int);
107#define ELF_PLAT_INIT(_r, load_addr) (_r)->ARM_r0 = 0 107#define ELF_PLAT_INIT(_r, load_addr) (_r)->ARM_r0 = 0
108 108
109extern void elf_set_personality(const struct elf32_hdr *); 109extern void elf_set_personality(const struct elf32_hdr *);
110#define SET_PERSONALITY(ex, ibcs2) elf_set_personality(&(ex)) 110#define SET_PERSONALITY(ex) elf_set_personality(&(ex))
111 111
112#endif 112#endif
diff --git a/arch/arm/include/asm/statfs.h b/arch/arm/include/asm/statfs.h
index a02e6a8c3d70..079447c05ba7 100644
--- a/arch/arm/include/asm/statfs.h
+++ b/arch/arm/include/asm/statfs.h
@@ -1,42 +1,12 @@
1#ifndef _ASMARM_STATFS_H 1#ifndef _ASMARM_STATFS_H
2#define _ASMARM_STATFS_H 2#define _ASMARM_STATFS_H
3 3
4#ifndef __KERNEL_STRICT_NAMES
5# include <linux/types.h>
6typedef __kernel_fsid_t fsid_t;
7#endif
8
9struct statfs {
10 __u32 f_type;
11 __u32 f_bsize;
12 __u32 f_blocks;
13 __u32 f_bfree;
14 __u32 f_bavail;
15 __u32 f_files;
16 __u32 f_ffree;
17 __kernel_fsid_t f_fsid;
18 __u32 f_namelen;
19 __u32 f_frsize;
20 __u32 f_spare[5];
21};
22
23/* 4/*
24 * With EABI there is 4 bytes of padding added to this structure. 5 * With EABI there is 4 bytes of padding added to this structure.
25 * Let's pack it so the padding goes away to simplify dual ABI support. 6 * Let's pack it so the padding goes away to simplify dual ABI support.
26 * Note that user space does NOT have to pack this structure. 7 * Note that user space does NOT have to pack this structure.
27 */ 8 */
28struct statfs64 { 9#define ARCH_PACK_STATFS64 __attribute__((packed,aligned(4)))
29 __u32 f_type;
30 __u32 f_bsize;
31 __u64 f_blocks;
32 __u64 f_bfree;
33 __u64 f_bavail;
34 __u64 f_files;
35 __u64 f_ffree;
36 __kernel_fsid_t f_fsid;
37 __u32 f_namelen;
38 __u32 f_frsize;
39 __u32 f_spare[5];
40} __attribute__ ((packed,aligned(4)));
41 10
11#include <asm-generic/statfs.h>
42#endif 12#endif
diff --git a/arch/arm/kernel/dma.c b/arch/arm/kernel/dma.c
index ba99a2035523..d006085ed7e7 100644
--- a/arch/arm/kernel/dma.c
+++ b/arch/arm/kernel/dma.c
@@ -26,23 +26,6 @@ EXPORT_SYMBOL(dma_spin_lock);
26static dma_t dma_chan[MAX_DMA_CHANNELS]; 26static dma_t dma_chan[MAX_DMA_CHANNELS];
27 27
28/* 28/*
29 * Get dma list for /proc/dma
30 */
31int get_dma_list(char *buf)
32{
33 dma_t *dma;
34 char *p = buf;
35 int i;
36
37 for (i = 0, dma = dma_chan; i < MAX_DMA_CHANNELS; i++, dma++)
38 if (dma->lock)
39 p += sprintf(p, "%2d: %14s %s\n", i,
40 dma->d_ops->type, dma->device_id);
41
42 return p - buf;
43}
44
45/*
46 * Request DMA channel 29 * Request DMA channel
47 * 30 *
48 * On certain platforms, we have to allocate an interrupt as well... 31 * On certain platforms, we have to allocate an interrupt as well...
diff --git a/arch/arm/mach-integrator/cpu.c b/arch/arm/mach-integrator/cpu.c
index e4f72d202cc0..44d4c2e8207b 100644
--- a/arch/arm/mach-integrator/cpu.c
+++ b/arch/arm/mach-integrator/cpu.c
@@ -184,7 +184,6 @@ static int integrator_cpufreq_init(struct cpufreq_policy *policy)
184{ 184{
185 185
186 /* set default policy and cpuinfo */ 186 /* set default policy and cpuinfo */
187 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
188 policy->cpuinfo.max_freq = 160000; 187 policy->cpuinfo.max_freq = 160000;
189 policy->cpuinfo.min_freq = 12000; 188 policy->cpuinfo.min_freq = 12000;
190 policy->cpuinfo.transition_latency = 1000000; /* 1 ms, assumed */ 189 policy->cpuinfo.transition_latency = 1000000; /* 1 ms, assumed */
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index 2ced6d9984d2..adfcd7b51393 100644
--- a/arch/arm/mach-omap1/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -476,6 +476,10 @@ static struct i2c_board_info __initdata h3_i2c_board_info[] = {
476 I2C_BOARD_INFO("tps65013", 0x48), 476 I2C_BOARD_INFO("tps65013", 0x48),
477 /* .irq = OMAP_GPIO_IRQ(??), */ 477 /* .irq = OMAP_GPIO_IRQ(??), */
478 }, 478 },
479 {
480 I2C_BOARD_INFO("isp1301_omap", 0x2d),
481 .irq = OMAP_GPIO_IRQ(14),
482 },
479}; 483};
480 484
481static struct omap_gpio_switch h3_gpio_switches[] __initdata = { 485static struct omap_gpio_switch h3_gpio_switches[] __initdata = {
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 478c2c9a22cb..5fba20731710 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -201,7 +201,7 @@ static int calc_dsor_exp(struct clk *clk, unsigned long rate)
201 return -EINVAL; 201 return -EINVAL;
202 202
203 parent = clk->parent; 203 parent = clk->parent;
204 if (unlikely(parent == 0)) 204 if (unlikely(parent == NULL))
205 return -EIO; 205 return -EIO;
206 206
207 realrate = parent->rate; 207 realrate = parent->rate;
@@ -499,7 +499,7 @@ static int omap1_clk_enable_generic(struct clk *clk)
499 if (clk->flags & ALWAYS_ENABLED) 499 if (clk->flags & ALWAYS_ENABLED)
500 return 0; 500 return 0;
501 501
502 if (unlikely(clk->enable_reg == 0)) { 502 if (unlikely(clk->enable_reg == NULL)) {
503 printk(KERN_ERR "clock.c: Enable for %s without enable code\n", 503 printk(KERN_ERR "clock.c: Enable for %s without enable code\n",
504 clk->name); 504 clk->name);
505 return -EINVAL; 505 return -EINVAL;
@@ -535,7 +535,7 @@ static void omap1_clk_disable_generic(struct clk *clk)
535 __u16 regval16; 535 __u16 regval16;
536 __u32 regval32; 536 __u32 regval32;
537 537
538 if (clk->enable_reg == 0) 538 if (clk->enable_reg == NULL)
539 return; 539 return;
540 540
541 if (clk->flags & ENABLE_REG_32BIT) { 541 if (clk->flags & ENABLE_REG_32BIT) {
@@ -577,7 +577,7 @@ static long omap1_clk_round_rate(struct clk *clk, unsigned long rate)
577 return clk->parent->rate / (1 << dsor_exp); 577 return clk->parent->rate / (1 << dsor_exp);
578 } 578 }
579 579
580 if(clk->round_rate != 0) 580 if (clk->round_rate != NULL)
581 return clk->round_rate(clk, rate); 581 return clk->round_rate(clk, rate);
582 582
583 return clk->rate; 583 return clk->rate;
@@ -625,7 +625,7 @@ static void __init omap1_clk_disable_unused(struct clk *clk)
625 625
626 /* Clocks in the DSP domain need api_ck. Just assume bootloader 626 /* Clocks in the DSP domain need api_ck. Just assume bootloader
627 * has not enabled any DSP clocks */ 627 * has not enabled any DSP clocks */
628 if ((u32)clk->enable_reg == DSP_IDLECT2) { 628 if (clk->enable_reg == DSP_IDLECT2) {
629 printk(KERN_INFO "Skipping reset check for DSP domain " 629 printk(KERN_INFO "Skipping reset check for DSP domain "
630 "clock \"%s\"\n", clk->name); 630 "clock \"%s\"\n", clk->name);
631 return; 631 return;
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h
index 6eadf72828d8..5635b511ab6f 100644
--- a/arch/arm/mach-omap1/clock.h
+++ b/arch/arm/mach-omap1/clock.h
@@ -324,7 +324,7 @@ static struct clk dspper_ck = {
324 .parent = &ck_dpll1, 324 .parent = &ck_dpll1,
325 .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | 325 .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
326 RATE_CKCTL | VIRTUAL_IO_ADDRESS, 326 RATE_CKCTL | VIRTUAL_IO_ADDRESS,
327 .enable_reg = (void __iomem *)DSP_IDLECT2, 327 .enable_reg = DSP_IDLECT2,
328 .enable_bit = EN_PERCK, 328 .enable_bit = EN_PERCK,
329 .rate_offset = CKCTL_PERDIV_OFFSET, 329 .rate_offset = CKCTL_PERDIV_OFFSET,
330 .recalc = &omap1_ckctl_recalc_dsp_domain, 330 .recalc = &omap1_ckctl_recalc_dsp_domain,
@@ -338,7 +338,7 @@ static struct clk dspxor_ck = {
338 .parent = &ck_ref, 338 .parent = &ck_ref,
339 .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | 339 .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
340 VIRTUAL_IO_ADDRESS, 340 VIRTUAL_IO_ADDRESS,
341 .enable_reg = (void __iomem *)DSP_IDLECT2, 341 .enable_reg = DSP_IDLECT2,
342 .enable_bit = EN_XORPCK, 342 .enable_bit = EN_XORPCK,
343 .recalc = &followparent_recalc, 343 .recalc = &followparent_recalc,
344 .enable = &omap1_clk_enable_dsp_domain, 344 .enable = &omap1_clk_enable_dsp_domain,
@@ -350,7 +350,7 @@ static struct clk dsptim_ck = {
350 .parent = &ck_ref, 350 .parent = &ck_ref,
351 .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | 351 .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
352 VIRTUAL_IO_ADDRESS, 352 VIRTUAL_IO_ADDRESS,
353 .enable_reg = (void __iomem *)DSP_IDLECT2, 353 .enable_reg = DSP_IDLECT2,
354 .enable_bit = EN_DSPTIMCK, 354 .enable_bit = EN_DSPTIMCK,
355 .recalc = &followparent_recalc, 355 .recalc = &followparent_recalc,
356 .enable = &omap1_clk_enable_dsp_domain, 356 .enable = &omap1_clk_enable_dsp_domain,
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index 99982d3380c9..e382b438c64e 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -101,7 +101,7 @@ static inline void omap_init_mbox(void) { }
101 101
102#if defined(CONFIG_OMAP_STI) 102#if defined(CONFIG_OMAP_STI)
103 103
104#define OMAP1_STI_BASE IO_ADDRESS(0xfffea000) 104#define OMAP1_STI_BASE 0xfffea000
105#define OMAP1_STI_CHANNEL_BASE (OMAP1_STI_BASE + 0x400) 105#define OMAP1_STI_CHANNEL_BASE (OMAP1_STI_BASE + 0x400)
106 106
107static struct resource sti_resources[] = { 107static struct resource sti_resources[] = {
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
index 2baeaeb0c900..7de7c6915584 100644
--- a/arch/arm/mach-omap1/mcbsp.c
+++ b/arch/arm/mach-omap1/mcbsp.c
@@ -103,30 +103,6 @@ static inline void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk)
103{ } 103{ }
104#endif 104#endif
105 105
106static int omap1_mcbsp_check(unsigned int id)
107{
108 /* REVISIT: Check correctly for number of registered McBSPs */
109 if (cpu_is_omap730()) {
110 if (id > OMAP_MAX_MCBSP_COUNT - 2) {
111 printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n",
112 id + 1);
113 return -ENODEV;
114 }
115 return 0;
116 }
117
118 if (cpu_is_omap15xx() || cpu_is_omap16xx()) {
119 if (id > OMAP_MAX_MCBSP_COUNT - 1) {
120 printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n",
121 id + 1);
122 return -ENODEV;
123 }
124 return 0;
125 }
126
127 return -ENODEV;
128}
129
130static void omap1_mcbsp_request(unsigned int id) 106static void omap1_mcbsp_request(unsigned int id)
131{ 107{
132 /* 108 /*
@@ -151,7 +127,6 @@ static void omap1_mcbsp_free(unsigned int id)
151} 127}
152 128
153static struct omap_mcbsp_ops omap1_mcbsp_ops = { 129static struct omap_mcbsp_ops omap1_mcbsp_ops = {
154 .check = omap1_mcbsp_check,
155 .request = omap1_mcbsp_request, 130 .request = omap1_mcbsp_request,
156 .free = omap1_mcbsp_free, 131 .free = omap1_mcbsp_free,
157}; 132};
@@ -160,7 +135,6 @@ static struct omap_mcbsp_ops omap1_mcbsp_ops = {
160static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = { 135static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = {
161 { 136 {
162 .phys_base = OMAP730_MCBSP1_BASE, 137 .phys_base = OMAP730_MCBSP1_BASE,
163 .virt_base = io_p2v(OMAP730_MCBSP1_BASE),
164 .dma_rx_sync = OMAP_DMA_MCBSP1_RX, 138 .dma_rx_sync = OMAP_DMA_MCBSP1_RX,
165 .dma_tx_sync = OMAP_DMA_MCBSP1_TX, 139 .dma_tx_sync = OMAP_DMA_MCBSP1_TX,
166 .rx_irq = INT_730_McBSP1RX, 140 .rx_irq = INT_730_McBSP1RX,
@@ -169,7 +143,6 @@ static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = {
169 }, 143 },
170 { 144 {
171 .phys_base = OMAP730_MCBSP2_BASE, 145 .phys_base = OMAP730_MCBSP2_BASE,
172 .virt_base = io_p2v(OMAP730_MCBSP2_BASE),
173 .dma_rx_sync = OMAP_DMA_MCBSP3_RX, 146 .dma_rx_sync = OMAP_DMA_MCBSP3_RX,
174 .dma_tx_sync = OMAP_DMA_MCBSP3_TX, 147 .dma_tx_sync = OMAP_DMA_MCBSP3_TX,
175 .rx_irq = INT_730_McBSP2RX, 148 .rx_irq = INT_730_McBSP2RX,
@@ -187,7 +160,6 @@ static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = {
187static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { 160static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
188 { 161 {
189 .phys_base = OMAP1510_MCBSP1_BASE, 162 .phys_base = OMAP1510_MCBSP1_BASE,
190 .virt_base = OMAP1510_MCBSP1_BASE,
191 .dma_rx_sync = OMAP_DMA_MCBSP1_RX, 163 .dma_rx_sync = OMAP_DMA_MCBSP1_RX,
192 .dma_tx_sync = OMAP_DMA_MCBSP1_TX, 164 .dma_tx_sync = OMAP_DMA_MCBSP1_TX,
193 .rx_irq = INT_McBSP1RX, 165 .rx_irq = INT_McBSP1RX,
@@ -197,7 +169,6 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
197 }, 169 },
198 { 170 {
199 .phys_base = OMAP1510_MCBSP2_BASE, 171 .phys_base = OMAP1510_MCBSP2_BASE,
200 .virt_base = io_p2v(OMAP1510_MCBSP2_BASE),
201 .dma_rx_sync = OMAP_DMA_MCBSP2_RX, 172 .dma_rx_sync = OMAP_DMA_MCBSP2_RX,
202 .dma_tx_sync = OMAP_DMA_MCBSP2_TX, 173 .dma_tx_sync = OMAP_DMA_MCBSP2_TX,
203 .rx_irq = INT_1510_SPI_RX, 174 .rx_irq = INT_1510_SPI_RX,
@@ -206,7 +177,6 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
206 }, 177 },
207 { 178 {
208 .phys_base = OMAP1510_MCBSP3_BASE, 179 .phys_base = OMAP1510_MCBSP3_BASE,
209 .virt_base = OMAP1510_MCBSP3_BASE,
210 .dma_rx_sync = OMAP_DMA_MCBSP3_RX, 180 .dma_rx_sync = OMAP_DMA_MCBSP3_RX,
211 .dma_tx_sync = OMAP_DMA_MCBSP3_TX, 181 .dma_tx_sync = OMAP_DMA_MCBSP3_TX,
212 .rx_irq = INT_McBSP3RX, 182 .rx_irq = INT_McBSP3RX,
@@ -225,7 +195,6 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
225static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { 195static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
226 { 196 {
227 .phys_base = OMAP1610_MCBSP1_BASE, 197 .phys_base = OMAP1610_MCBSP1_BASE,
228 .virt_base = OMAP1610_MCBSP1_BASE,
229 .dma_rx_sync = OMAP_DMA_MCBSP1_RX, 198 .dma_rx_sync = OMAP_DMA_MCBSP1_RX,
230 .dma_tx_sync = OMAP_DMA_MCBSP1_TX, 199 .dma_tx_sync = OMAP_DMA_MCBSP1_TX,
231 .rx_irq = INT_McBSP1RX, 200 .rx_irq = INT_McBSP1RX,
@@ -235,7 +204,6 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
235 }, 204 },
236 { 205 {
237 .phys_base = OMAP1610_MCBSP2_BASE, 206 .phys_base = OMAP1610_MCBSP2_BASE,
238 .virt_base = io_p2v(OMAP1610_MCBSP2_BASE),
239 .dma_rx_sync = OMAP_DMA_MCBSP2_RX, 207 .dma_rx_sync = OMAP_DMA_MCBSP2_RX,
240 .dma_tx_sync = OMAP_DMA_MCBSP2_TX, 208 .dma_tx_sync = OMAP_DMA_MCBSP2_TX,
241 .rx_irq = INT_1610_McBSP2_RX, 209 .rx_irq = INT_1610_McBSP2_RX,
@@ -244,7 +212,6 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
244 }, 212 },
245 { 213 {
246 .phys_base = OMAP1610_MCBSP3_BASE, 214 .phys_base = OMAP1610_MCBSP3_BASE,
247 .virt_base = OMAP1610_MCBSP3_BASE,
248 .dma_rx_sync = OMAP_DMA_MCBSP3_RX, 215 .dma_rx_sync = OMAP_DMA_MCBSP3_RX,
249 .dma_tx_sync = OMAP_DMA_MCBSP3_TX, 216 .dma_tx_sync = OMAP_DMA_MCBSP3_TX,
250 .rx_irq = INT_McBSP3RX, 217 .rx_irq = INT_McBSP3RX,
@@ -271,6 +238,18 @@ int __init omap1_mcbsp_init(void)
271 } 238 }
272 239
273 if (cpu_is_omap730()) 240 if (cpu_is_omap730())
241 omap_mcbsp_count = OMAP730_MCBSP_PDATA_SZ;
242 if (cpu_is_omap15xx())
243 omap_mcbsp_count = OMAP15XX_MCBSP_PDATA_SZ;
244 if (cpu_is_omap16xx())
245 omap_mcbsp_count = OMAP16XX_MCBSP_PDATA_SZ;
246
247 mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *),
248 GFP_KERNEL);
249 if (!mcbsp_ptr)
250 return -ENOMEM;
251
252 if (cpu_is_omap730())
274 omap_mcbsp_register_board_cfg(omap730_mcbsp_pdata, 253 omap_mcbsp_register_board_cfg(omap730_mcbsp_pdata,
275 OMAP730_MCBSP_PDATA_SZ); 254 OMAP730_MCBSP_PDATA_SZ);
276 255
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c
index aefc967fc003..528691d5cb51 100644
--- a/arch/arm/mach-omap1/serial.c
+++ b/arch/arm/mach-omap1/serial.c
@@ -67,8 +67,8 @@ static void __init omap_serial_reset(struct plat_serial8250_port *p)
67 67
68static struct plat_serial8250_port serial_platform_data[] = { 68static struct plat_serial8250_port serial_platform_data[] = {
69 { 69 {
70 .membase = (char*)IO_ADDRESS(OMAP_UART1_BASE), 70 .membase = IO_ADDRESS(OMAP_UART1_BASE),
71 .mapbase = (unsigned long)OMAP_UART1_BASE, 71 .mapbase = OMAP_UART1_BASE,
72 .irq = INT_UART1, 72 .irq = INT_UART1,
73 .flags = UPF_BOOT_AUTOCONF, 73 .flags = UPF_BOOT_AUTOCONF,
74 .iotype = UPIO_MEM, 74 .iotype = UPIO_MEM,
@@ -76,8 +76,8 @@ static struct plat_serial8250_port serial_platform_data[] = {
76 .uartclk = OMAP16XX_BASE_BAUD * 16, 76 .uartclk = OMAP16XX_BASE_BAUD * 16,
77 }, 77 },
78 { 78 {
79 .membase = (char*)IO_ADDRESS(OMAP_UART2_BASE), 79 .membase = IO_ADDRESS(OMAP_UART2_BASE),
80 .mapbase = (unsigned long)OMAP_UART2_BASE, 80 .mapbase = OMAP_UART2_BASE,
81 .irq = INT_UART2, 81 .irq = INT_UART2,
82 .flags = UPF_BOOT_AUTOCONF, 82 .flags = UPF_BOOT_AUTOCONF,
83 .iotype = UPIO_MEM, 83 .iotype = UPIO_MEM,
@@ -85,8 +85,8 @@ static struct plat_serial8250_port serial_platform_data[] = {
85 .uartclk = OMAP16XX_BASE_BAUD * 16, 85 .uartclk = OMAP16XX_BASE_BAUD * 16,
86 }, 86 },
87 { 87 {
88 .membase = (char*)IO_ADDRESS(OMAP_UART3_BASE), 88 .membase = IO_ADDRESS(OMAP_UART3_BASE),
89 .mapbase = (unsigned long)OMAP_UART3_BASE, 89 .mapbase = OMAP_UART3_BASE,
90 .irq = INT_UART3, 90 .irq = INT_UART3,
91 .flags = UPF_BOOT_AUTOCONF, 91 .flags = UPF_BOOT_AUTOCONF,
92 .iotype = UPIO_MEM, 92 .iotype = UPIO_MEM,
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 7069c9d536f1..4832fcc7d04a 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -15,8 +15,17 @@ config ARCH_OMAP2430
15 bool "OMAP2430 support" 15 bool "OMAP2430 support"
16 depends on ARCH_OMAP24XX 16 depends on ARCH_OMAP24XX
17 17
18config ARCH_OMAP34XX
19 bool "OMAP34xx Based System"
20 depends on ARCH_OMAP3
21
22config ARCH_OMAP3430
23 bool "OMAP3430 support"
24 depends on ARCH_OMAP3 && ARCH_OMAP34XX
25 select ARCH_OMAP_OTG
26
18comment "OMAP Board Type" 27comment "OMAP Board Type"
19 depends on ARCH_OMAP2 28 depends on ARCH_OMAP2 || ARCH_OMAP3
20 29
21config MACH_OMAP_GENERIC 30config MACH_OMAP_GENERIC
22 bool "Generic OMAP board" 31 bool "Generic OMAP board"
@@ -35,3 +44,14 @@ config MACH_OMAP_2430SDP
35 bool "OMAP 2430 SDP board" 44 bool "OMAP 2430 SDP board"
36 depends on ARCH_OMAP2 && ARCH_OMAP24XX 45 depends on ARCH_OMAP2 && ARCH_OMAP24XX
37 46
47config MACH_OMAP3_BEAGLE
48 bool "OMAP3 BEAGLE board"
49 depends on ARCH_OMAP3 && ARCH_OMAP34XX
50
51config MACH_OMAP_LDP
52 bool "OMAP3 LDP board"
53 depends on ARCH_OMAP3 && ARCH_OMAP34XX
54
55config MACH_OVERO
56 bool "Gumstix Overo board"
57 depends on ARCH_OMAP3 && ARCH_OMAP34XX
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 93ee990618ef..c69392372c99 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -4,16 +4,21 @@
4 4
5# Common support 5# Common support
6obj-y := irq.o id.o io.o memory.o control.o prcm.o clock.o mux.o \ 6obj-y := irq.o id.o io.o memory.o control.o prcm.o clock.o mux.o \
7 devices.o serial.o gpmc.o timer-gp.o 7 devices.o serial.o gpmc.o timer-gp.o powerdomain.o \
8 clockdomain.o
8 9
9obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o 10obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
10 11
11# Functions loaded to SRAM 12# Functions loaded to SRAM
12obj-$(CONFIG_ARCH_OMAP2420) += sram242x.o 13obj-$(CONFIG_ARCH_OMAP2420) += sram242x.o
13obj-$(CONFIG_ARCH_OMAP2430) += sram243x.o 14obj-$(CONFIG_ARCH_OMAP2430) += sram243x.o
15obj-$(CONFIG_ARCH_OMAP3) += sram34xx.o
14 16
15# Power Management 17# Power Management
16obj-$(CONFIG_PM) += pm.o sleep.o 18ifeq ($(CONFIG_PM),y)
19obj-y += pm.o
20obj-$(CONFIG_ARCH_OMAP24XX) += sleep24xx.o
21endif
17 22
18# Clock framework 23# Clock framework
19obj-$(CONFIG_ARCH_OMAP2) += clock24xx.o 24obj-$(CONFIG_ARCH_OMAP2) += clock24xx.o
@@ -24,4 +29,7 @@ obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o
24obj-$(CONFIG_MACH_OMAP_H4) += board-h4.o 29obj-$(CONFIG_MACH_OMAP_H4) += board-h4.o
25obj-$(CONFIG_MACH_OMAP_2430SDP) += board-2430sdp.o 30obj-$(CONFIG_MACH_OMAP_2430SDP) += board-2430sdp.o
26obj-$(CONFIG_MACH_OMAP_APOLLON) += board-apollon.o 31obj-$(CONFIG_MACH_OMAP_APOLLON) += board-apollon.o
32obj-$(CONFIG_MACH_OMAP3_BEAGLE) += board-omap3beagle.o
33obj-$(CONFIG_MACH_OMAP_LDP) += board-ldp.o
34obj-$(CONFIG_MACH_OVERO) += board-overo.o
27 35
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index d4e3b6fc4705..2fef2c845083 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -18,6 +18,7 @@
18#include <linux/mtd/partitions.h> 18#include <linux/mtd/partitions.h>
19#include <linux/delay.h> 19#include <linux/delay.h>
20#include <linux/workqueue.h> 20#include <linux/workqueue.h>
21#include <linux/i2c.h>
21#include <linux/input.h> 22#include <linux/input.h>
22#include <linux/err.h> 23#include <linux/err.h>
23#include <linux/clk.h> 24#include <linux/clk.h>
@@ -391,6 +392,13 @@ static struct omap_board_config_kernel h4_config[] = {
391 { OMAP_TAG_LCD, &h4_lcd_config }, 392 { OMAP_TAG_LCD, &h4_lcd_config },
392}; 393};
393 394
395static struct i2c_board_info __initdata h4_i2c_board_info[] = {
396 {
397 I2C_BOARD_INFO("isp1301_omap", 0x2d),
398 .irq = OMAP_GPIO_IRQ(125),
399 },
400};
401
394static void __init omap_h4_init(void) 402static void __init omap_h4_init(void)
395{ 403{
396 /* 404 /*
@@ -411,6 +419,9 @@ static void __init omap_h4_init(void)
411 } 419 }
412#endif 420#endif
413 421
422 i2c_register_board_info(1, h4_i2c_board_info,
423 ARRAY_SIZE(h4_i2c_board_info));
424
414 platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices)); 425 platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices));
415 omap_board_config = h4_config; 426 omap_board_config = h4_config;
416 omap_board_config_size = ARRAY_SIZE(h4_config); 427 omap_board_config_size = ARRAY_SIZE(h4_config);
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
new file mode 100644
index 000000000000..1ea59986aa7a
--- /dev/null
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -0,0 +1,86 @@
1/*
2 * linux/arch/arm/mach-omap2/board-ldp.c
3 *
4 * Copyright (C) 2008 Texas Instruments Inc.
5 * Nishant Kamat <nskamat@ti.com>
6 *
7 * Modified from mach-omap2/board-3430sdp.c
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/platform_device.h>
17#include <linux/delay.h>
18#include <linux/input.h>
19#include <linux/workqueue.h>
20#include <linux/err.h>
21#include <linux/clk.h>
22#include <linux/spi/spi.h>
23#include <linux/spi/ads7846.h>
24
25#include <mach/hardware.h>
26#include <asm/mach-types.h>
27#include <asm/mach/arch.h>
28#include <asm/mach/map.h>
29
30#include <mach/board-ldp.h>
31#include <mach/mcspi.h>
32#include <mach/gpio.h>
33#include <mach/board.h>
34#include <mach/common.h>
35#include <mach/gpmc.h>
36
37#include <asm/io.h>
38#include <asm/delay.h>
39#include <mach/control.h>
40
41static void __init omap_ldp_init_irq(void)
42{
43 omap2_init_common_hw();
44 omap_init_irq();
45 omap_gpio_init();
46}
47
48static struct omap_uart_config ldp_uart_config __initdata = {
49 .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
50};
51
52static struct omap_board_config_kernel ldp_config[] __initdata = {
53 { OMAP_TAG_UART, &ldp_uart_config },
54};
55
56static int __init omap_i2c_init(void)
57{
58 omap_register_i2c_bus(1, 2600, NULL, 0);
59 omap_register_i2c_bus(2, 400, NULL, 0);
60 omap_register_i2c_bus(3, 400, NULL, 0);
61 return 0;
62}
63
64static void __init omap_ldp_init(void)
65{
66 omap_i2c_init();
67 omap_board_config = ldp_config;
68 omap_board_config_size = ARRAY_SIZE(ldp_config);
69 omap_serial_init();
70}
71
72static void __init omap_ldp_map_io(void)
73{
74 omap2_set_globals_343x();
75 omap2_map_common_io();
76}
77
78MACHINE_START(OMAP_LDP, "OMAP LDP board")
79 .phys_io = 0x48000000,
80 .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc,
81 .boot_params = 0x80000100,
82 .map_io = omap_ldp_map_io,
83 .init_irq = omap_ldp_init_irq,
84 .init_machine = omap_ldp_init,
85 .timer = &omap_timer,
86MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
new file mode 100644
index 000000000000..baa79674e9d5
--- /dev/null
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -0,0 +1,244 @@
1/*
2 * linux/arch/arm/mach-omap2/board-omap3beagle.c
3 *
4 * Copyright (C) 2008 Texas Instruments
5 *
6 * Modified from mach-omap2/board-3430sdp.c
7 *
8 * Initial code: Syed Mohammed Khasim
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/platform_device.h>
18#include <linux/delay.h>
19#include <linux/err.h>
20#include <linux/clk.h>
21#include <linux/io.h>
22#include <linux/leds.h>
23#include <linux/gpio.h>
24#include <linux/input.h>
25#include <linux/gpio_keys.h>
26
27#include <linux/mtd/mtd.h>
28#include <linux/mtd/partitions.h>
29#include <linux/mtd/nand.h>
30
31#include <mach/hardware.h>
32#include <asm/mach-types.h>
33#include <asm/mach/arch.h>
34#include <asm/mach/map.h>
35#include <asm/mach/flash.h>
36
37#include <mach/board.h>
38#include <mach/common.h>
39#include <mach/gpmc.h>
40#include <mach/nand.h>
41
42
43#define GPMC_CS0_BASE 0x60
44#define GPMC_CS_SIZE 0x30
45
46#define NAND_BLOCK_SIZE SZ_128K
47
48static struct mtd_partition omap3beagle_nand_partitions[] = {
49 /* All the partition sizes are listed in terms of NAND block size */
50 {
51 .name = "X-Loader",
52 .offset = 0,
53 .size = 4 * NAND_BLOCK_SIZE,
54 .mask_flags = MTD_WRITEABLE, /* force read-only */
55 },
56 {
57 .name = "U-Boot",
58 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
59 .size = 15 * NAND_BLOCK_SIZE,
60 .mask_flags = MTD_WRITEABLE, /* force read-only */
61 },
62 {
63 .name = "U-Boot Env",
64 .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
65 .size = 1 * NAND_BLOCK_SIZE,
66 },
67 {
68 .name = "Kernel",
69 .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
70 .size = 32 * NAND_BLOCK_SIZE,
71 },
72 {
73 .name = "File System",
74 .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */
75 .size = MTDPART_SIZ_FULL,
76 },
77};
78
79static struct omap_nand_platform_data omap3beagle_nand_data = {
80 .options = NAND_BUSWIDTH_16,
81 .parts = omap3beagle_nand_partitions,
82 .nr_parts = ARRAY_SIZE(omap3beagle_nand_partitions),
83 .dma_channel = -1, /* disable DMA in OMAP NAND driver */
84 .nand_setup = NULL,
85 .dev_ready = NULL,
86};
87
88static struct resource omap3beagle_nand_resource = {
89 .flags = IORESOURCE_MEM,
90};
91
92static struct platform_device omap3beagle_nand_device = {
93 .name = "omap2-nand",
94 .id = -1,
95 .dev = {
96 .platform_data = &omap3beagle_nand_data,
97 },
98 .num_resources = 1,
99 .resource = &omap3beagle_nand_resource,
100};
101
102static struct omap_uart_config omap3_beagle_uart_config __initdata = {
103 .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
104};
105
106static void __init omap3_beagle_init_irq(void)
107{
108 omap2_init_common_hw();
109 omap_init_irq();
110 omap_gpio_init();
111}
112
113static struct platform_device omap3_beagle_lcd_device = {
114 .name = "omap3beagle_lcd",
115 .id = -1,
116};
117
118static struct omap_lcd_config omap3_beagle_lcd_config __initdata = {
119 .ctrl_name = "internal",
120};
121
122static struct gpio_led gpio_leds[] = {
123 {
124 .name = "beagleboard::usr0",
125 .default_trigger = "heartbeat",
126 .gpio = 150,
127 },
128 {
129 .name = "beagleboard::usr1",
130 .default_trigger = "mmc0",
131 .gpio = 149,
132 },
133};
134
135static struct gpio_led_platform_data gpio_led_info = {
136 .leds = gpio_leds,
137 .num_leds = ARRAY_SIZE(gpio_leds),
138};
139
140static struct platform_device leds_gpio = {
141 .name = "leds-gpio",
142 .id = -1,
143 .dev = {
144 .platform_data = &gpio_led_info,
145 },
146};
147
148static struct gpio_keys_button gpio_buttons[] = {
149 {
150 .code = BTN_EXTRA,
151 .gpio = 7,
152 .desc = "user",
153 .wakeup = 1,
154 },
155};
156
157static struct gpio_keys_platform_data gpio_key_info = {
158 .buttons = gpio_buttons,
159 .nbuttons = ARRAY_SIZE(gpio_buttons),
160};
161
162static struct platform_device keys_gpio = {
163 .name = "gpio-keys",
164 .id = -1,
165 .dev = {
166 .platform_data = &gpio_key_info,
167 },
168};
169
170static struct omap_board_config_kernel omap3_beagle_config[] __initdata = {
171 { OMAP_TAG_UART, &omap3_beagle_uart_config },
172 { OMAP_TAG_LCD, &omap3_beagle_lcd_config },
173};
174
175static struct platform_device *omap3_beagle_devices[] __initdata = {
176 &omap3_beagle_lcd_device,
177 &leds_gpio,
178 &keys_gpio,
179};
180
181static void __init omap3beagle_flash_init(void)
182{
183 u8 cs = 0;
184 u8 nandcs = GPMC_CS_NUM + 1;
185
186 u32 gpmc_base_add = OMAP34XX_GPMC_VIRT;
187
188 /* find out the chip-select on which NAND exists */
189 while (cs < GPMC_CS_NUM) {
190 u32 ret = 0;
191 ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
192
193 if ((ret & 0xC00) == 0x800) {
194 printk(KERN_INFO "Found NAND on CS%d\n", cs);
195 if (nandcs > GPMC_CS_NUM)
196 nandcs = cs;
197 }
198 cs++;
199 }
200
201 if (nandcs > GPMC_CS_NUM) {
202 printk(KERN_INFO "NAND: Unable to find configuration "
203 "in GPMC\n ");
204 return;
205 }
206
207 if (nandcs < GPMC_CS_NUM) {
208 omap3beagle_nand_data.cs = nandcs;
209 omap3beagle_nand_data.gpmc_cs_baseaddr = (void *)
210 (gpmc_base_add + GPMC_CS0_BASE + nandcs * GPMC_CS_SIZE);
211 omap3beagle_nand_data.gpmc_baseaddr = (void *) (gpmc_base_add);
212
213 printk(KERN_INFO "Registering NAND on CS%d\n", nandcs);
214 if (platform_device_register(&omap3beagle_nand_device) < 0)
215 printk(KERN_ERR "Unable to register NAND device\n");
216 }
217}
218
219static void __init omap3_beagle_init(void)
220{
221 platform_add_devices(omap3_beagle_devices,
222 ARRAY_SIZE(omap3_beagle_devices));
223 omap_board_config = omap3_beagle_config;
224 omap_board_config_size = ARRAY_SIZE(omap3_beagle_config);
225 omap_serial_init();
226 omap3beagle_flash_init();
227}
228
229static void __init omap3_beagle_map_io(void)
230{
231 omap2_set_globals_343x();
232 omap2_map_common_io();
233}
234
235MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
236 /* Maintainer: Syed Mohammed Khasim - http://beagleboard.org */
237 .phys_io = 0x48000000,
238 .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc,
239 .boot_params = 0x80000100,
240 .map_io = omap3_beagle_map_io,
241 .init_irq = omap3_beagle_init_irq,
242 .init_machine = omap3_beagle_init,
243 .timer = &omap_timer,
244MACHINE_END
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
new file mode 100644
index 000000000000..e09aa59a399c
--- /dev/null
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -0,0 +1,242 @@
1/*
2 * board-overo.c (Gumstix Overo)
3 *
4 * Initial code: Steve Sakoman <steve@sakoman.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22#include <linux/clk.h>
23#include <linux/delay.h>
24#include <linux/err.h>
25#include <linux/init.h>
26#include <linux/io.h>
27#include <linux/kernel.h>
28#include <linux/platform_device.h>
29
30#include <linux/mtd/mtd.h>
31#include <linux/mtd/nand.h>
32#include <linux/mtd/partitions.h>
33
34#include <asm/mach-types.h>
35#include <asm/mach/arch.h>
36#include <asm/mach/flash.h>
37#include <asm/mach/map.h>
38
39#include <mach/board-overo.h>
40#include <mach/board.h>
41#include <mach/common.h>
42#include <mach/gpio.h>
43#include <mach/gpmc.h>
44#include <mach/hardware.h>
45#include <mach/nand.h>
46
47#define NAND_BLOCK_SIZE SZ_128K
48#define GPMC_CS0_BASE 0x60
49#define GPMC_CS_SIZE 0x30
50
51static struct mtd_partition overo_nand_partitions[] = {
52 {
53 .name = "xloader",
54 .offset = 0, /* Offset = 0x00000 */
55 .size = 4 * NAND_BLOCK_SIZE,
56 .mask_flags = MTD_WRITEABLE
57 },
58 {
59 .name = "uboot",
60 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
61 .size = 14 * NAND_BLOCK_SIZE,
62 },
63 {
64 .name = "uboot environment",
65 .offset = MTDPART_OFS_APPEND, /* Offset = 0x240000 */
66 .size = 2 * NAND_BLOCK_SIZE,
67 },
68 {
69 .name = "linux",
70 .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
71 .size = 32 * NAND_BLOCK_SIZE,
72 },
73 {
74 .name = "rootfs",
75 .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */
76 .size = MTDPART_SIZ_FULL,
77 },
78};
79
80static struct omap_nand_platform_data overo_nand_data = {
81 .parts = overo_nand_partitions,
82 .nr_parts = ARRAY_SIZE(overo_nand_partitions),
83 .dma_channel = -1, /* disable DMA in OMAP NAND driver */
84};
85
86static struct resource overo_nand_resource = {
87 .flags = IORESOURCE_MEM,
88};
89
90static struct platform_device overo_nand_device = {
91 .name = "omap2-nand",
92 .id = -1,
93 .dev = {
94 .platform_data = &overo_nand_data,
95 },
96 .num_resources = 1,
97 .resource = &overo_nand_resource,
98};
99
100
101static void __init overo_flash_init(void)
102{
103 u8 cs = 0;
104 u8 nandcs = GPMC_CS_NUM + 1;
105
106 u32 gpmc_base_add = OMAP34XX_GPMC_VIRT;
107
108 /* find out the chip-select on which NAND exists */
109 while (cs < GPMC_CS_NUM) {
110 u32 ret = 0;
111 ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
112
113 if ((ret & 0xC00) == 0x800) {
114 printk(KERN_INFO "Found NAND on CS%d\n", cs);
115 if (nandcs > GPMC_CS_NUM)
116 nandcs = cs;
117 }
118 cs++;
119 }
120
121 if (nandcs > GPMC_CS_NUM) {
122 printk(KERN_INFO "NAND: Unable to find configuration "
123 "in GPMC\n ");
124 return;
125 }
126
127 if (nandcs < GPMC_CS_NUM) {
128 overo_nand_data.cs = nandcs;
129 overo_nand_data.gpmc_cs_baseaddr = (void *)
130 (gpmc_base_add + GPMC_CS0_BASE + nandcs * GPMC_CS_SIZE);
131 overo_nand_data.gpmc_baseaddr = (void *) (gpmc_base_add);
132
133 printk(KERN_INFO "Registering NAND on CS%d\n", nandcs);
134 if (platform_device_register(&overo_nand_device) < 0)
135 printk(KERN_ERR "Unable to register NAND device\n");
136 }
137}
138static struct omap_uart_config overo_uart_config __initdata = {
139 .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
140};
141
142static int __init overo_i2c_init(void)
143{
144 /* i2c2 pins are used for gpio */
145 omap_register_i2c_bus(3, 400, NULL, 0);
146 return 0;
147}
148
149static void __init overo_init_irq(void)
150{
151 omap2_init_common_hw();
152 omap_init_irq();
153 omap_gpio_init();
154}
155
156static struct platform_device overo_lcd_device = {
157 .name = "overo_lcd",
158 .id = -1,
159};
160
161static struct omap_lcd_config overo_lcd_config __initdata = {
162 .ctrl_name = "internal",
163};
164
165static struct omap_board_config_kernel overo_config[] __initdata = {
166 { OMAP_TAG_UART, &overo_uart_config },
167 { OMAP_TAG_LCD, &overo_lcd_config },
168};
169
170static struct platform_device *overo_devices[] __initdata = {
171 &overo_lcd_device,
172};
173
174static void __init overo_init(void)
175{
176 overo_i2c_init();
177 platform_add_devices(overo_devices, ARRAY_SIZE(overo_devices));
178 omap_board_config = overo_config;
179 omap_board_config_size = ARRAY_SIZE(overo_config);
180 omap_serial_init();
181 overo_flash_init();
182
183 if ((gpio_request(OVERO_GPIO_W2W_NRESET,
184 "OVERO_GPIO_W2W_NRESET") == 0) &&
185 (gpio_direction_output(OVERO_GPIO_W2W_NRESET, 1) == 0)) {
186 gpio_export(OVERO_GPIO_W2W_NRESET, 0);
187 gpio_set_value(OVERO_GPIO_W2W_NRESET, 0);
188 udelay(10);
189 gpio_set_value(OVERO_GPIO_W2W_NRESET, 1);
190 } else {
191 printk(KERN_ERR "could not obtain gpio for "
192 "OVERO_GPIO_W2W_NRESET\n");
193 }
194
195 if ((gpio_request(OVERO_GPIO_BT_XGATE, "OVERO_GPIO_BT_XGATE") == 0) &&
196 (gpio_direction_output(OVERO_GPIO_BT_XGATE, 0) == 0))
197 gpio_export(OVERO_GPIO_BT_XGATE, 0);
198 else
199 printk(KERN_ERR "could not obtain gpio for OVERO_GPIO_BT_XGATE\n");
200
201 if ((gpio_request(OVERO_GPIO_BT_NRESET, "OVERO_GPIO_BT_NRESET") == 0) &&
202 (gpio_direction_output(OVERO_GPIO_BT_NRESET, 1) == 0)) {
203 gpio_export(OVERO_GPIO_BT_NRESET, 0);
204 gpio_set_value(OVERO_GPIO_BT_NRESET, 0);
205 mdelay(6);
206 gpio_set_value(OVERO_GPIO_BT_NRESET, 1);
207 } else {
208 printk(KERN_ERR "could not obtain gpio for "
209 "OVERO_GPIO_BT_NRESET\n");
210 }
211
212 if ((gpio_request(OVERO_GPIO_USBH_CPEN, "OVERO_GPIO_USBH_CPEN") == 0) &&
213 (gpio_direction_output(OVERO_GPIO_USBH_CPEN, 1) == 0))
214 gpio_export(OVERO_GPIO_USBH_CPEN, 0);
215 else
216 printk(KERN_ERR "could not obtain gpio for "
217 "OVERO_GPIO_USBH_CPEN\n");
218
219 if ((gpio_request(OVERO_GPIO_USBH_NRESET,
220 "OVERO_GPIO_USBH_NRESET") == 0) &&
221 (gpio_direction_output(OVERO_GPIO_USBH_NRESET, 1) == 0))
222 gpio_export(OVERO_GPIO_USBH_NRESET, 0);
223 else
224 printk(KERN_ERR "could not obtain gpio for "
225 "OVERO_GPIO_USBH_NRESET\n");
226}
227
228static void __init overo_map_io(void)
229{
230 omap2_set_globals_343x();
231 omap2_map_common_io();
232}
233
234MACHINE_START(OVERO, "Gumstix Overo")
235 .phys_io = 0x48000000,
236 .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc,
237 .boot_params = 0x80000100,
238 .map_io = overo_map_io,
239 .init_irq = overo_init_irq,
240 .init_machine = overo_init,
241 .timer = &omap_timer,
242MACHINE_END
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 97cde3d3611d..ad721e0cbf7a 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -25,6 +25,7 @@
25#include <linux/bitops.h> 25#include <linux/bitops.h>
26 26
27#include <mach/clock.h> 27#include <mach/clock.h>
28#include <mach/clockdomain.h>
28#include <mach/sram.h> 29#include <mach/sram.h>
29#include <mach/cpu.h> 30#include <mach/cpu.h>
30#include <asm/div64.h> 31#include <asm/div64.h>
@@ -61,10 +62,36 @@
61u8 cpu_mask; 62u8 cpu_mask;
62 63
63/*------------------------------------------------------------------------- 64/*-------------------------------------------------------------------------
64 * Omap2 specific clock functions 65 * OMAP2/3 specific clock functions
65 *-------------------------------------------------------------------------*/ 66 *-------------------------------------------------------------------------*/
66 67
67/** 68/**
69 * omap2_init_clk_clkdm - look up a clockdomain name, store pointer in clk
70 * @clk: OMAP clock struct ptr to use
71 *
72 * Convert a clockdomain name stored in a struct clk 'clk' into a
73 * clockdomain pointer, and save it into the struct clk. Intended to be
74 * called during clk_register(). No return value.
75 */
76void omap2_init_clk_clkdm(struct clk *clk)
77{
78 struct clockdomain *clkdm;
79
80 if (!clk->clkdm_name)
81 return;
82
83 clkdm = clkdm_lookup(clk->clkdm_name);
84 if (clkdm) {
85 pr_debug("clock: associated clk %s to clkdm %s\n",
86 clk->name, clk->clkdm_name);
87 clk->clkdm = clkdm;
88 } else {
89 pr_debug("clock: could not associate clk %s to "
90 "clkdm %s\n", clk->name, clk->clkdm_name);
91 }
92}
93
94/**
68 * omap2_init_clksel_parent - set a clksel clk's parent field from the hardware 95 * omap2_init_clksel_parent - set a clksel clk's parent field from the hardware
69 * @clk: OMAP clock struct ptr to use 96 * @clk: OMAP clock struct ptr to use
70 * 97 *
@@ -250,7 +277,7 @@ int _omap2_clk_enable(struct clk *clk)
250 if (clk->enable) 277 if (clk->enable)
251 return clk->enable(clk); 278 return clk->enable(clk);
252 279
253 if (unlikely(clk->enable_reg == 0)) { 280 if (unlikely(clk->enable_reg == NULL)) {
254 printk(KERN_ERR "clock.c: Enable for %s without enable code\n", 281 printk(KERN_ERR "clock.c: Enable for %s without enable code\n",
255 clk->name); 282 clk->name);
256 return 0; /* REVISIT: -EINVAL */ 283 return 0; /* REVISIT: -EINVAL */
@@ -282,7 +309,7 @@ void _omap2_clk_disable(struct clk *clk)
282 return; 309 return;
283 } 310 }
284 311
285 if (clk->enable_reg == 0) { 312 if (clk->enable_reg == NULL) {
286 /* 313 /*
287 * 'Independent' here refers to a clock which is not 314 * 'Independent' here refers to a clock which is not
288 * controlled by its parent. 315 * controlled by its parent.
@@ -307,6 +334,9 @@ void omap2_clk_disable(struct clk *clk)
307 _omap2_clk_disable(clk); 334 _omap2_clk_disable(clk);
308 if (likely((u32)clk->parent)) 335 if (likely((u32)clk->parent))
309 omap2_clk_disable(clk->parent); 336 omap2_clk_disable(clk->parent);
337 if (clk->clkdm)
338 omap2_clkdm_clk_disable(clk->clkdm, clk);
339
310 } 340 }
311} 341}
312 342
@@ -323,11 +353,19 @@ int omap2_clk_enable(struct clk *clk)
323 return ret; 353 return ret;
324 } 354 }
325 355
356 if (clk->clkdm)
357 omap2_clkdm_clk_enable(clk->clkdm, clk);
358
326 ret = _omap2_clk_enable(clk); 359 ret = _omap2_clk_enable(clk);
327 360
328 if (unlikely(ret != 0) && clk->parent) { 361 if (unlikely(ret != 0)) {
329 omap2_clk_disable(clk->parent); 362 if (clk->clkdm)
330 clk->usecount--; 363 omap2_clkdm_clk_disable(clk->clkdm, clk);
364
365 if (clk->parent) {
366 omap2_clk_disable(clk->parent);
367 clk->usecount--;
368 }
331 } 369 }
332 } 370 }
333 371
@@ -476,7 +514,7 @@ long omap2_clksel_round_rate(struct clk *clk, unsigned long target_rate)
476/* Given a clock and a rate apply a clock specific rounding function */ 514/* Given a clock and a rate apply a clock specific rounding function */
477long omap2_clk_round_rate(struct clk *clk, unsigned long rate) 515long omap2_clk_round_rate(struct clk *clk, unsigned long rate)
478{ 516{
479 if (clk->round_rate != 0) 517 if (clk->round_rate != NULL)
480 return clk->round_rate(clk, rate); 518 return clk->round_rate(clk, rate);
481 519
482 if (clk->flags & RATE_FIXED) 520 if (clk->flags & RATE_FIXED)
@@ -565,7 +603,7 @@ u32 omap2_divisor_to_clksel(struct clk *clk, u32 div)
565 */ 603 */
566void __iomem *omap2_get_clksel(struct clk *clk, u32 *field_mask) 604void __iomem *omap2_get_clksel(struct clk *clk, u32 *field_mask)
567{ 605{
568 if (unlikely((clk->clksel_reg == 0) || (clk->clksel_mask == 0))) 606 if (unlikely((clk->clksel_reg == NULL) || (clk->clksel_mask == NULL)))
569 return NULL; 607 return NULL;
570 608
571 *field_mask = clk->clksel_mask; 609 *field_mask = clk->clksel_mask;
@@ -585,7 +623,7 @@ u32 omap2_clksel_get_divisor(struct clk *clk)
585 void __iomem *div_addr; 623 void __iomem *div_addr;
586 624
587 div_addr = omap2_get_clksel(clk, &field_mask); 625 div_addr = omap2_get_clksel(clk, &field_mask);
588 if (div_addr == 0) 626 if (div_addr == NULL)
589 return 0; 627 return 0;
590 628
591 field_val = __raw_readl(div_addr) & field_mask; 629 field_val = __raw_readl(div_addr) & field_mask;
@@ -604,7 +642,7 @@ int omap2_clksel_set_rate(struct clk *clk, unsigned long rate)
604 return -EINVAL; 642 return -EINVAL;
605 643
606 div_addr = omap2_get_clksel(clk, &field_mask); 644 div_addr = omap2_get_clksel(clk, &field_mask);
607 if (div_addr == 0) 645 if (div_addr == NULL)
608 return -EINVAL; 646 return -EINVAL;
609 647
610 field_val = omap2_divisor_to_clksel(clk, new_div); 648 field_val = omap2_divisor_to_clksel(clk, new_div);
@@ -642,7 +680,7 @@ int omap2_clk_set_rate(struct clk *clk, unsigned long rate)
642 return -EINVAL; 680 return -EINVAL;
643 681
644 /* dpll_ck, core_ck, virt_prcm_set; plus all clksel clocks */ 682 /* dpll_ck, core_ck, virt_prcm_set; plus all clksel clocks */
645 if (clk->set_rate != 0) 683 if (clk->set_rate != NULL)
646 ret = clk->set_rate(clk, rate); 684 ret = clk->set_rate(clk, rate);
647 685
648 if (unlikely(ret == 0 && (clk->flags & RATE_PROPAGATES))) 686 if (unlikely(ret == 0 && (clk->flags & RATE_PROPAGATES)))
@@ -663,7 +701,7 @@ static u32 omap2_clksel_get_src_field(void __iomem **src_addr,
663 const struct clksel_rate *clkr; 701 const struct clksel_rate *clkr;
664 702
665 *parent_div = 0; 703 *parent_div = 0;
666 *src_addr = 0; 704 *src_addr = NULL;
667 705
668 clks = omap2_get_clksel_by_parent(clk, src_clk); 706 clks = omap2_get_clksel_by_parent(clk, src_clk);
669 if (clks == NULL) 707 if (clks == NULL)
@@ -704,7 +742,7 @@ int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent)
704 742
705 field_val = omap2_clksel_get_src_field(&src_addr, new_parent, 743 field_val = omap2_clksel_get_src_field(&src_addr, new_parent,
706 &field_mask, clk, &parent_div); 744 &field_mask, clk, &parent_div);
707 if (src_addr == 0) 745 if (src_addr == NULL)
708 return -EINVAL; 746 return -EINVAL;
709 747
710 if (clk->usecount > 0) 748 if (clk->usecount > 0)
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 626e5fa93b6a..1fb330e0847d 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -21,6 +21,7 @@
21/* The maximum error between a target DPLL rate and the rounded rate in Hz */ 21/* The maximum error between a target DPLL rate and the rounded rate in Hz */
22#define DEFAULT_DPLL_RATE_TOLERANCE 50000 22#define DEFAULT_DPLL_RATE_TOLERANCE 50000
23 23
24int omap2_clk_init(void);
24int omap2_clk_enable(struct clk *clk); 25int omap2_clk_enable(struct clk *clk);
25void omap2_clk_disable(struct clk *clk); 26void omap2_clk_disable(struct clk *clk);
26long omap2_clk_round_rate(struct clk *clk, unsigned long rate); 27long omap2_clk_round_rate(struct clk *clk, unsigned long rate);
@@ -36,6 +37,7 @@ void omap2_clk_disable_unused(struct clk *clk);
36#endif 37#endif
37 38
38void omap2_clksel_recalc(struct clk *clk); 39void omap2_clksel_recalc(struct clk *clk);
40void omap2_init_clk_clkdm(struct clk *clk);
39void omap2_init_clksel_parent(struct clk *clk); 41void omap2_init_clksel_parent(struct clk *clk);
40u32 omap2_clksel_get_divisor(struct clk *clk); 42u32 omap2_clksel_get_divisor(struct clk *clk);
41u32 omap2_clksel_round_rate_div(struct clk *clk, unsigned long target_rate, 43u32 omap2_clksel_round_rate_div(struct clk *clk, unsigned long target_rate,
diff --git a/arch/arm/mach-omap2/clock24xx.h b/arch/arm/mach-omap2/clock24xx.h
index be4e25554e05..242a19d86ccd 100644
--- a/arch/arm/mach-omap2/clock24xx.h
+++ b/arch/arm/mach-omap2/clock24xx.h
@@ -626,6 +626,7 @@ static struct clk func_32k_ck = {
626 .rate = 32000, 626 .rate = 32000,
627 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | 627 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
628 RATE_FIXED | ALWAYS_ENABLED | RATE_PROPAGATES, 628 RATE_FIXED | ALWAYS_ENABLED | RATE_PROPAGATES,
629 .clkdm_name = "wkup_clkdm",
629 .recalc = &propagate_rate, 630 .recalc = &propagate_rate,
630}; 631};
631 632
@@ -634,17 +635,19 @@ static struct clk osc_ck = { /* (*12, *13, 19.2, *26, 38.4)MHz */
634 .name = "osc_ck", 635 .name = "osc_ck",
635 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | 636 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
636 RATE_PROPAGATES, 637 RATE_PROPAGATES,
638 .clkdm_name = "wkup_clkdm",
637 .enable = &omap2_enable_osc_ck, 639 .enable = &omap2_enable_osc_ck,
638 .disable = &omap2_disable_osc_ck, 640 .disable = &omap2_disable_osc_ck,
639 .recalc = &omap2_osc_clk_recalc, 641 .recalc = &omap2_osc_clk_recalc,
640}; 642};
641 643
642/* With out modem likely 12MHz, with modem likely 13MHz */ 644/* Without modem likely 12MHz, with modem likely 13MHz */
643static struct clk sys_ck = { /* (*12, *13, 19.2, 26, 38.4)MHz */ 645static struct clk sys_ck = { /* (*12, *13, 19.2, 26, 38.4)MHz */
644 .name = "sys_ck", /* ~ ref_clk also */ 646 .name = "sys_ck", /* ~ ref_clk also */
645 .parent = &osc_ck, 647 .parent = &osc_ck,
646 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | 648 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
647 ALWAYS_ENABLED | RATE_PROPAGATES, 649 ALWAYS_ENABLED | RATE_PROPAGATES,
650 .clkdm_name = "wkup_clkdm",
648 .recalc = &omap2_sys_clk_recalc, 651 .recalc = &omap2_sys_clk_recalc,
649}; 652};
650 653
@@ -653,6 +656,7 @@ static struct clk alt_ck = { /* Typical 54M or 48M, may not exist */
653 .rate = 54000000, 656 .rate = 54000000,
654 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | 657 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
655 RATE_FIXED | ALWAYS_ENABLED | RATE_PROPAGATES, 658 RATE_FIXED | ALWAYS_ENABLED | RATE_PROPAGATES,
659 .clkdm_name = "wkup_clkdm",
656 .recalc = &propagate_rate, 660 .recalc = &propagate_rate,
657}; 661};
658 662
@@ -684,6 +688,7 @@ static struct clk dpll_ck = {
684 .dpll_data = &dpll_dd, 688 .dpll_data = &dpll_dd,
685 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | 689 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
686 RATE_PROPAGATES | ALWAYS_ENABLED, 690 RATE_PROPAGATES | ALWAYS_ENABLED,
691 .clkdm_name = "wkup_clkdm",
687 .recalc = &omap2_dpllcore_recalc, 692 .recalc = &omap2_dpllcore_recalc,
688 .set_rate = &omap2_reprogram_dpllcore, 693 .set_rate = &omap2_reprogram_dpllcore,
689}; 694};
@@ -694,6 +699,7 @@ static struct clk apll96_ck = {
694 .rate = 96000000, 699 .rate = 96000000,
695 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | 700 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
696 RATE_FIXED | RATE_PROPAGATES | ENABLE_ON_INIT, 701 RATE_FIXED | RATE_PROPAGATES | ENABLE_ON_INIT,
702 .clkdm_name = "wkup_clkdm",
697 .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), 703 .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
698 .enable_bit = OMAP24XX_EN_96M_PLL_SHIFT, 704 .enable_bit = OMAP24XX_EN_96M_PLL_SHIFT,
699 .enable = &omap2_clk_fixed_enable, 705 .enable = &omap2_clk_fixed_enable,
@@ -707,6 +713,7 @@ static struct clk apll54_ck = {
707 .rate = 54000000, 713 .rate = 54000000,
708 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | 714 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
709 RATE_FIXED | RATE_PROPAGATES | ENABLE_ON_INIT, 715 RATE_FIXED | RATE_PROPAGATES | ENABLE_ON_INIT,
716 .clkdm_name = "wkup_clkdm",
710 .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), 717 .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
711 .enable_bit = OMAP24XX_EN_54M_PLL_SHIFT, 718 .enable_bit = OMAP24XX_EN_54M_PLL_SHIFT,
712 .enable = &omap2_clk_fixed_enable, 719 .enable = &omap2_clk_fixed_enable,
@@ -741,6 +748,7 @@ static struct clk func_54m_ck = {
741 .parent = &apll54_ck, /* can also be alt_clk */ 748 .parent = &apll54_ck, /* can also be alt_clk */
742 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | 749 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
743 RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, 750 RATE_PROPAGATES | PARENT_CONTROLS_CLOCK,
751 .clkdm_name = "wkup_clkdm",
744 .init = &omap2_init_clksel_parent, 752 .init = &omap2_init_clksel_parent,
745 .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1), 753 .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
746 .clksel_mask = OMAP24XX_54M_SOURCE, 754 .clksel_mask = OMAP24XX_54M_SOURCE,
@@ -753,6 +761,7 @@ static struct clk core_ck = {
753 .parent = &dpll_ck, /* can also be 32k */ 761 .parent = &dpll_ck, /* can also be 32k */
754 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | 762 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
755 ALWAYS_ENABLED | RATE_PROPAGATES, 763 ALWAYS_ENABLED | RATE_PROPAGATES,
764 .clkdm_name = "wkup_clkdm",
756 .recalc = &followparent_recalc, 765 .recalc = &followparent_recalc,
757}; 766};
758 767
@@ -779,6 +788,7 @@ static struct clk func_96m_ck = {
779 .parent = &apll96_ck, 788 .parent = &apll96_ck,
780 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | 789 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
781 RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, 790 RATE_PROPAGATES | PARENT_CONTROLS_CLOCK,
791 .clkdm_name = "wkup_clkdm",
782 .init = &omap2_init_clksel_parent, 792 .init = &omap2_init_clksel_parent,
783 .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1), 793 .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
784 .clksel_mask = OMAP2430_96M_SOURCE, 794 .clksel_mask = OMAP2430_96M_SOURCE,
@@ -811,6 +821,7 @@ static struct clk func_48m_ck = {
811 .parent = &apll96_ck, /* 96M or Alt */ 821 .parent = &apll96_ck, /* 96M or Alt */
812 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | 822 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
813 RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, 823 RATE_PROPAGATES | PARENT_CONTROLS_CLOCK,
824 .clkdm_name = "wkup_clkdm",
814 .init = &omap2_init_clksel_parent, 825 .init = &omap2_init_clksel_parent,
815 .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1), 826 .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
816 .clksel_mask = OMAP24XX_48M_SOURCE, 827 .clksel_mask = OMAP24XX_48M_SOURCE,
@@ -826,6 +837,7 @@ static struct clk func_12m_ck = {
826 .fixed_div = 4, 837 .fixed_div = 4,
827 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | 838 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
828 RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, 839 RATE_PROPAGATES | PARENT_CONTROLS_CLOCK,
840 .clkdm_name = "wkup_clkdm",
829 .recalc = &omap2_fixed_divisor_recalc, 841 .recalc = &omap2_fixed_divisor_recalc,
830}; 842};
831 843
@@ -878,6 +890,7 @@ static struct clk sys_clkout_src = {
878 .parent = &func_54m_ck, 890 .parent = &func_54m_ck,
879 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | 891 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
880 RATE_PROPAGATES, 892 RATE_PROPAGATES,
893 .clkdm_name = "wkup_clkdm",
881 .enable_reg = OMAP24XX_PRCM_CLKOUT_CTRL, 894 .enable_reg = OMAP24XX_PRCM_CLKOUT_CTRL,
882 .enable_bit = OMAP24XX_CLKOUT_EN_SHIFT, 895 .enable_bit = OMAP24XX_CLKOUT_EN_SHIFT,
883 .init = &omap2_init_clksel_parent, 896 .init = &omap2_init_clksel_parent,
@@ -908,6 +921,7 @@ static struct clk sys_clkout = {
908 .parent = &sys_clkout_src, 921 .parent = &sys_clkout_src,
909 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | 922 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
910 PARENT_CONTROLS_CLOCK, 923 PARENT_CONTROLS_CLOCK,
924 .clkdm_name = "wkup_clkdm",
911 .clksel_reg = OMAP24XX_PRCM_CLKOUT_CTRL, 925 .clksel_reg = OMAP24XX_PRCM_CLKOUT_CTRL,
912 .clksel_mask = OMAP24XX_CLKOUT_DIV_MASK, 926 .clksel_mask = OMAP24XX_CLKOUT_DIV_MASK,
913 .clksel = sys_clkout_clksel, 927 .clksel = sys_clkout_clksel,
@@ -921,6 +935,7 @@ static struct clk sys_clkout2_src = {
921 .name = "sys_clkout2_src", 935 .name = "sys_clkout2_src",
922 .parent = &func_54m_ck, 936 .parent = &func_54m_ck,
923 .flags = CLOCK_IN_OMAP242X | RATE_PROPAGATES, 937 .flags = CLOCK_IN_OMAP242X | RATE_PROPAGATES,
938 .clkdm_name = "wkup_clkdm",
924 .enable_reg = OMAP24XX_PRCM_CLKOUT_CTRL, 939 .enable_reg = OMAP24XX_PRCM_CLKOUT_CTRL,
925 .enable_bit = OMAP2420_CLKOUT2_EN_SHIFT, 940 .enable_bit = OMAP2420_CLKOUT2_EN_SHIFT,
926 .init = &omap2_init_clksel_parent, 941 .init = &omap2_init_clksel_parent,
@@ -942,6 +957,7 @@ static struct clk sys_clkout2 = {
942 .name = "sys_clkout2", 957 .name = "sys_clkout2",
943 .parent = &sys_clkout2_src, 958 .parent = &sys_clkout2_src,
944 .flags = CLOCK_IN_OMAP242X | PARENT_CONTROLS_CLOCK, 959 .flags = CLOCK_IN_OMAP242X | PARENT_CONTROLS_CLOCK,
960 .clkdm_name = "wkup_clkdm",
945 .clksel_reg = OMAP24XX_PRCM_CLKOUT_CTRL, 961 .clksel_reg = OMAP24XX_PRCM_CLKOUT_CTRL,
946 .clksel_mask = OMAP2420_CLKOUT2_DIV_MASK, 962 .clksel_mask = OMAP2420_CLKOUT2_DIV_MASK,
947 .clksel = sys_clkout2_clksel, 963 .clksel = sys_clkout2_clksel,
@@ -954,6 +970,7 @@ static struct clk emul_ck = {
954 .name = "emul_ck", 970 .name = "emul_ck",
955 .parent = &func_54m_ck, 971 .parent = &func_54m_ck,
956 .flags = CLOCK_IN_OMAP242X, 972 .flags = CLOCK_IN_OMAP242X,
973 .clkdm_name = "wkup_clkdm",
957 .enable_reg = OMAP24XX_PRCM_CLKEMUL_CTRL, 974 .enable_reg = OMAP24XX_PRCM_CLKEMUL_CTRL,
958 .enable_bit = OMAP24XX_EMULATION_EN_SHIFT, 975 .enable_bit = OMAP24XX_EMULATION_EN_SHIFT,
959 .recalc = &followparent_recalc, 976 .recalc = &followparent_recalc,
@@ -990,12 +1007,13 @@ static struct clk mpu_ck = { /* Control cpu */
990 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | 1007 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
991 ALWAYS_ENABLED | DELAYED_APP | 1008 ALWAYS_ENABLED | DELAYED_APP |
992 CONFIG_PARTICIPANT | RATE_PROPAGATES, 1009 CONFIG_PARTICIPANT | RATE_PROPAGATES,
1010 .clkdm_name = "mpu_clkdm",
993 .init = &omap2_init_clksel_parent, 1011 .init = &omap2_init_clksel_parent,
994 .clksel_reg = OMAP_CM_REGADDR(MPU_MOD, CM_CLKSEL), 1012 .clksel_reg = OMAP_CM_REGADDR(MPU_MOD, CM_CLKSEL),
995 .clksel_mask = OMAP24XX_CLKSEL_MPU_MASK, 1013 .clksel_mask = OMAP24XX_CLKSEL_MPU_MASK,
996 .clksel = mpu_clksel, 1014 .clksel = mpu_clksel,
997 .recalc = &omap2_clksel_recalc, 1015 .recalc = &omap2_clksel_recalc,
998 .round_rate = &omap2_clksel_round_rate, 1016 .round_rate = &omap2_clksel_round_rate,
999 .set_rate = &omap2_clksel_set_rate 1017 .set_rate = &omap2_clksel_set_rate
1000}; 1018};
1001 1019
@@ -1031,6 +1049,7 @@ static struct clk dsp_fck = {
1031 .parent = &core_ck, 1049 .parent = &core_ck,
1032 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | DELAYED_APP | 1050 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | DELAYED_APP |
1033 CONFIG_PARTICIPANT | RATE_PROPAGATES, 1051 CONFIG_PARTICIPANT | RATE_PROPAGATES,
1052 .clkdm_name = "dsp_clkdm",
1034 .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN), 1053 .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN),
1035 .enable_bit = OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT, 1054 .enable_bit = OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT,
1036 .clksel_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_CLKSEL), 1055 .clksel_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_CLKSEL),
@@ -1054,10 +1073,7 @@ static const struct clksel dsp_irate_ick_clksel[] = {
1054 { .parent = NULL } 1073 { .parent = NULL }
1055}; 1074};
1056 1075
1057/* 1076/* This clock does not exist as such in the TRM. */
1058 * This clock does not exist as such in the TRM, but is added to
1059 * separate source selection from XXX
1060 */
1061static struct clk dsp_irate_ick = { 1077static struct clk dsp_irate_ick = {
1062 .name = "dsp_irate_ick", 1078 .name = "dsp_irate_ick",
1063 .parent = &dsp_fck, 1079 .parent = &dsp_fck,
@@ -1089,11 +1105,17 @@ static struct clk iva2_1_ick = {
1089 .enable_bit = OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT, 1105 .enable_bit = OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT,
1090}; 1106};
1091 1107
1108/*
1109 * The IVA1 is an ARM7 core on the 2420 that has nothing to do with
1110 * the C54x, but which is contained in the DSP powerdomain. Does not
1111 * exist on later OMAPs.
1112 */
1092static struct clk iva1_ifck = { 1113static struct clk iva1_ifck = {
1093 .name = "iva1_ifck", 1114 .name = "iva1_ifck",
1094 .parent = &core_ck, 1115 .parent = &core_ck,
1095 .flags = CLOCK_IN_OMAP242X | CONFIG_PARTICIPANT | 1116 .flags = CLOCK_IN_OMAP242X | CONFIG_PARTICIPANT |
1096 RATE_PROPAGATES | DELAYED_APP, 1117 RATE_PROPAGATES | DELAYED_APP,
1118 .clkdm_name = "iva1_clkdm",
1097 .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN), 1119 .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN),
1098 .enable_bit = OMAP2420_EN_IVA_COP_SHIFT, 1120 .enable_bit = OMAP2420_EN_IVA_COP_SHIFT,
1099 .clksel_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_CLKSEL), 1121 .clksel_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_CLKSEL),
@@ -1109,6 +1131,7 @@ static struct clk iva1_mpu_int_ifck = {
1109 .name = "iva1_mpu_int_ifck", 1131 .name = "iva1_mpu_int_ifck",
1110 .parent = &iva1_ifck, 1132 .parent = &iva1_ifck,
1111 .flags = CLOCK_IN_OMAP242X, 1133 .flags = CLOCK_IN_OMAP242X,
1134 .clkdm_name = "iva1_clkdm",
1112 .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN), 1135 .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN),
1113 .enable_bit = OMAP2420_EN_IVA_MPU_SHIFT, 1136 .enable_bit = OMAP2420_EN_IVA_MPU_SHIFT,
1114 .fixed_div = 2, 1137 .fixed_div = 2,
@@ -1156,6 +1179,7 @@ static struct clk core_l3_ck = { /* Used for ick and fck, interconnect */
1156 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | 1179 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
1157 ALWAYS_ENABLED | DELAYED_APP | 1180 ALWAYS_ENABLED | DELAYED_APP |
1158 CONFIG_PARTICIPANT | RATE_PROPAGATES, 1181 CONFIG_PARTICIPANT | RATE_PROPAGATES,
1182 .clkdm_name = "core_l3_clkdm",
1159 .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1), 1183 .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1),
1160 .clksel_mask = OMAP24XX_CLKSEL_L3_MASK, 1184 .clksel_mask = OMAP24XX_CLKSEL_L3_MASK,
1161 .clksel = core_l3_clksel, 1185 .clksel = core_l3_clksel,
@@ -1177,11 +1201,13 @@ static const struct clksel usb_l4_ick_clksel[] = {
1177 { .parent = NULL }, 1201 { .parent = NULL },
1178}; 1202};
1179 1203
1204/* It is unclear from TRM whether usb_l4_ick is really in L3 or L4 clkdm */
1180static struct clk usb_l4_ick = { /* FS-USB interface clock */ 1205static struct clk usb_l4_ick = { /* FS-USB interface clock */
1181 .name = "usb_l4_ick", 1206 .name = "usb_l4_ick",
1182 .parent = &core_l3_ck, 1207 .parent = &core_l3_ck,
1183 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | 1208 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
1184 DELAYED_APP | CONFIG_PARTICIPANT, 1209 DELAYED_APP | CONFIG_PARTICIPANT,
1210 .clkdm_name = "core_l4_clkdm",
1185 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), 1211 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2),
1186 .enable_bit = OMAP24XX_EN_USB_SHIFT, 1212 .enable_bit = OMAP24XX_EN_USB_SHIFT,
1187 .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1), 1213 .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1),
@@ -1193,10 +1219,42 @@ static struct clk usb_l4_ick = { /* FS-USB interface clock */
1193}; 1219};
1194 1220
1195/* 1221/*
1222 * L4 clock management domain
1223 *
1224 * This domain contains lots of interface clocks from the L4 interface, some
1225 * functional clocks. Fixed APLL functional source clocks are managed in
1226 * this domain.
1227 */
1228static const struct clksel_rate l4_core_l3_rates[] = {
1229 { .div = 1, .val = 1, .flags = RATE_IN_24XX | DEFAULT_RATE },
1230 { .div = 2, .val = 2, .flags = RATE_IN_24XX },
1231 { .div = 0 }
1232};
1233
1234static const struct clksel l4_clksel[] = {
1235 { .parent = &core_l3_ck, .rates = l4_core_l3_rates },
1236 { .parent = NULL }
1237};
1238
1239static struct clk l4_ck = { /* used both as an ick and fck */
1240 .name = "l4_ck",
1241 .parent = &core_l3_ck,
1242 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
1243 ALWAYS_ENABLED | DELAYED_APP | RATE_PROPAGATES,
1244 .clkdm_name = "core_l4_clkdm",
1245 .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1),
1246 .clksel_mask = OMAP24XX_CLKSEL_L4_MASK,
1247 .clksel = l4_clksel,
1248 .recalc = &omap2_clksel_recalc,
1249 .round_rate = &omap2_clksel_round_rate,
1250 .set_rate = &omap2_clksel_set_rate
1251};
1252
1253/*
1196 * SSI is in L3 management domain, its direct parent is core not l3, 1254 * SSI is in L3 management domain, its direct parent is core not l3,
1197 * many core power domain entities are grouped into the L3 clock 1255 * many core power domain entities are grouped into the L3 clock
1198 * domain. 1256 * domain.
1199 * SSI_SSR_FCLK, SSI_SST_FCLK, SSI_L4_CLIK 1257 * SSI_SSR_FCLK, SSI_SST_FCLK, SSI_L4_ICLK
1200 * 1258 *
1201 * ssr = core/1/2/3/4/5, sst = 1/2 ssr. 1259 * ssr = core/1/2/3/4/5, sst = 1/2 ssr.
1202 */ 1260 */
@@ -1221,6 +1279,7 @@ static struct clk ssi_ssr_sst_fck = {
1221 .parent = &core_ck, 1279 .parent = &core_ck,
1222 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | 1280 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
1223 DELAYED_APP, 1281 DELAYED_APP,
1282 .clkdm_name = "core_l3_clkdm",
1224 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), 1283 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
1225 .enable_bit = OMAP24XX_EN_SSI_SHIFT, 1284 .enable_bit = OMAP24XX_EN_SSI_SHIFT,
1226 .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1), 1285 .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1),
@@ -1231,6 +1290,7 @@ static struct clk ssi_ssr_sst_fck = {
1231 .set_rate = &omap2_clksel_set_rate 1290 .set_rate = &omap2_clksel_set_rate
1232}; 1291};
1233 1292
1293
1234/* 1294/*
1235 * GFX clock domain 1295 * GFX clock domain
1236 * Clocks: 1296 * Clocks:
@@ -1254,6 +1314,7 @@ static struct clk gfx_3d_fck = {
1254 .name = "gfx_3d_fck", 1314 .name = "gfx_3d_fck",
1255 .parent = &core_l3_ck, 1315 .parent = &core_l3_ck,
1256 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1316 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1317 .clkdm_name = "gfx_clkdm",
1257 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN), 1318 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN),
1258 .enable_bit = OMAP24XX_EN_3D_SHIFT, 1319 .enable_bit = OMAP24XX_EN_3D_SHIFT,
1259 .clksel_reg = OMAP_CM_REGADDR(GFX_MOD, CM_CLKSEL), 1320 .clksel_reg = OMAP_CM_REGADDR(GFX_MOD, CM_CLKSEL),
@@ -1268,6 +1329,7 @@ static struct clk gfx_2d_fck = {
1268 .name = "gfx_2d_fck", 1329 .name = "gfx_2d_fck",
1269 .parent = &core_l3_ck, 1330 .parent = &core_l3_ck,
1270 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1331 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1332 .clkdm_name = "gfx_clkdm",
1271 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN), 1333 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN),
1272 .enable_bit = OMAP24XX_EN_2D_SHIFT, 1334 .enable_bit = OMAP24XX_EN_2D_SHIFT,
1273 .clksel_reg = OMAP_CM_REGADDR(GFX_MOD, CM_CLKSEL), 1335 .clksel_reg = OMAP_CM_REGADDR(GFX_MOD, CM_CLKSEL),
@@ -1282,6 +1344,7 @@ static struct clk gfx_ick = {
1282 .name = "gfx_ick", /* From l3 */ 1344 .name = "gfx_ick", /* From l3 */
1283 .parent = &core_l3_ck, 1345 .parent = &core_l3_ck,
1284 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1346 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1347 .clkdm_name = "gfx_clkdm",
1285 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN), 1348 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN),
1286 .enable_bit = OMAP_EN_GFX_SHIFT, 1349 .enable_bit = OMAP_EN_GFX_SHIFT,
1287 .recalc = &followparent_recalc, 1350 .recalc = &followparent_recalc,
@@ -1311,6 +1374,7 @@ static struct clk mdm_ick = { /* used both as a ick and fck */
1311 .name = "mdm_ick", 1374 .name = "mdm_ick",
1312 .parent = &core_ck, 1375 .parent = &core_ck,
1313 .flags = CLOCK_IN_OMAP243X | DELAYED_APP | CONFIG_PARTICIPANT, 1376 .flags = CLOCK_IN_OMAP243X | DELAYED_APP | CONFIG_PARTICIPANT,
1377 .clkdm_name = "mdm_clkdm",
1314 .enable_reg = OMAP_CM_REGADDR(OMAP2430_MDM_MOD, CM_ICLKEN), 1378 .enable_reg = OMAP_CM_REGADDR(OMAP2430_MDM_MOD, CM_ICLKEN),
1315 .enable_bit = OMAP2430_CM_ICLKEN_MDM_EN_MDM_SHIFT, 1379 .enable_bit = OMAP2430_CM_ICLKEN_MDM_EN_MDM_SHIFT,
1316 .clksel_reg = OMAP_CM_REGADDR(OMAP2430_MDM_MOD, CM_CLKSEL), 1380 .clksel_reg = OMAP_CM_REGADDR(OMAP2430_MDM_MOD, CM_CLKSEL),
@@ -1325,52 +1389,13 @@ static struct clk mdm_osc_ck = {
1325 .name = "mdm_osc_ck", 1389 .name = "mdm_osc_ck",
1326 .parent = &osc_ck, 1390 .parent = &osc_ck,
1327 .flags = CLOCK_IN_OMAP243X, 1391 .flags = CLOCK_IN_OMAP243X,
1392 .clkdm_name = "mdm_clkdm",
1328 .enable_reg = OMAP_CM_REGADDR(OMAP2430_MDM_MOD, CM_FCLKEN), 1393 .enable_reg = OMAP_CM_REGADDR(OMAP2430_MDM_MOD, CM_FCLKEN),
1329 .enable_bit = OMAP2430_EN_OSC_SHIFT, 1394 .enable_bit = OMAP2430_EN_OSC_SHIFT,
1330 .recalc = &followparent_recalc, 1395 .recalc = &followparent_recalc,
1331}; 1396};
1332 1397
1333/* 1398/*
1334 * L4 clock management domain
1335 *
1336 * This domain contains lots of interface clocks from the L4 interface, some
1337 * functional clocks. Fixed APLL functional source clocks are managed in
1338 * this domain.
1339 */
1340static const struct clksel_rate l4_core_l3_rates[] = {
1341 { .div = 1, .val = 1, .flags = RATE_IN_24XX | DEFAULT_RATE },
1342 { .div = 2, .val = 2, .flags = RATE_IN_24XX },
1343 { .div = 0 }
1344};
1345
1346static const struct clksel l4_clksel[] = {
1347 { .parent = &core_l3_ck, .rates = l4_core_l3_rates },
1348 { .parent = NULL }
1349};
1350
1351static struct clk l4_ck = { /* used both as an ick and fck */
1352 .name = "l4_ck",
1353 .parent = &core_l3_ck,
1354 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
1355 ALWAYS_ENABLED | DELAYED_APP | RATE_PROPAGATES,
1356 .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1),
1357 .clksel_mask = OMAP24XX_CLKSEL_L4_MASK,
1358 .clksel = l4_clksel,
1359 .recalc = &omap2_clksel_recalc,
1360 .round_rate = &omap2_clksel_round_rate,
1361 .set_rate = &omap2_clksel_set_rate
1362};
1363
1364static struct clk ssi_l4_ick = {
1365 .name = "ssi_l4_ick",
1366 .parent = &l4_ck,
1367 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1368 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2),
1369 .enable_bit = OMAP24XX_EN_SSI_SHIFT,
1370 .recalc = &followparent_recalc,
1371};
1372
1373/*
1374 * DSS clock domain 1399 * DSS clock domain
1375 * CLOCKs: 1400 * CLOCKs:
1376 * DSS_L4_ICLK, DSS_L3_ICLK, 1401 * DSS_L4_ICLK, DSS_L3_ICLK,
@@ -1409,6 +1434,7 @@ static struct clk dss_ick = { /* Enables both L3,L4 ICLK's */
1409 .name = "dss_ick", 1434 .name = "dss_ick",
1410 .parent = &l4_ck, /* really both l3 and l4 */ 1435 .parent = &l4_ck, /* really both l3 and l4 */
1411 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1436 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1437 .clkdm_name = "dss_clkdm",
1412 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1438 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1413 .enable_bit = OMAP24XX_EN_DSS1_SHIFT, 1439 .enable_bit = OMAP24XX_EN_DSS1_SHIFT,
1414 .recalc = &followparent_recalc, 1440 .recalc = &followparent_recalc,
@@ -1419,6 +1445,7 @@ static struct clk dss1_fck = {
1419 .parent = &core_ck, /* Core or sys */ 1445 .parent = &core_ck, /* Core or sys */
1420 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | 1446 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
1421 DELAYED_APP, 1447 DELAYED_APP,
1448 .clkdm_name = "dss_clkdm",
1422 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1449 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1423 .enable_bit = OMAP24XX_EN_DSS1_SHIFT, 1450 .enable_bit = OMAP24XX_EN_DSS1_SHIFT,
1424 .init = &omap2_init_clksel_parent, 1451 .init = &omap2_init_clksel_parent,
@@ -1451,6 +1478,7 @@ static struct clk dss2_fck = { /* Alt clk used in power management */
1451 .parent = &sys_ck, /* fixed at sys_ck or 48MHz */ 1478 .parent = &sys_ck, /* fixed at sys_ck or 48MHz */
1452 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | 1479 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
1453 DELAYED_APP, 1480 DELAYED_APP,
1481 .clkdm_name = "dss_clkdm",
1454 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1482 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1455 .enable_bit = OMAP24XX_EN_DSS2_SHIFT, 1483 .enable_bit = OMAP24XX_EN_DSS2_SHIFT,
1456 .init = &omap2_init_clksel_parent, 1484 .init = &omap2_init_clksel_parent,
@@ -1464,6 +1492,7 @@ static struct clk dss_54m_fck = { /* Alt clk used in power management */
1464 .name = "dss_54m_fck", /* 54m tv clk */ 1492 .name = "dss_54m_fck", /* 54m tv clk */
1465 .parent = &func_54m_ck, 1493 .parent = &func_54m_ck,
1466 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1494 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1495 .clkdm_name = "dss_clkdm",
1467 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1496 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1468 .enable_bit = OMAP24XX_EN_TV_SHIFT, 1497 .enable_bit = OMAP24XX_EN_TV_SHIFT,
1469 .recalc = &followparent_recalc, 1498 .recalc = &followparent_recalc,
@@ -1491,6 +1520,7 @@ static struct clk gpt1_ick = {
1491 .name = "gpt1_ick", 1520 .name = "gpt1_ick",
1492 .parent = &l4_ck, 1521 .parent = &l4_ck,
1493 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1522 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1523 .clkdm_name = "core_l4_clkdm",
1494 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), 1524 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN),
1495 .enable_bit = OMAP24XX_EN_GPT1_SHIFT, 1525 .enable_bit = OMAP24XX_EN_GPT1_SHIFT,
1496 .recalc = &followparent_recalc, 1526 .recalc = &followparent_recalc,
@@ -1500,6 +1530,7 @@ static struct clk gpt1_fck = {
1500 .name = "gpt1_fck", 1530 .name = "gpt1_fck",
1501 .parent = &func_32k_ck, 1531 .parent = &func_32k_ck,
1502 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1532 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1533 .clkdm_name = "core_l4_clkdm",
1503 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), 1534 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
1504 .enable_bit = OMAP24XX_EN_GPT1_SHIFT, 1535 .enable_bit = OMAP24XX_EN_GPT1_SHIFT,
1505 .init = &omap2_init_clksel_parent, 1536 .init = &omap2_init_clksel_parent,
@@ -1515,6 +1546,7 @@ static struct clk gpt2_ick = {
1515 .name = "gpt2_ick", 1546 .name = "gpt2_ick",
1516 .parent = &l4_ck, 1547 .parent = &l4_ck,
1517 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1548 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1549 .clkdm_name = "core_l4_clkdm",
1518 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1550 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1519 .enable_bit = OMAP24XX_EN_GPT2_SHIFT, 1551 .enable_bit = OMAP24XX_EN_GPT2_SHIFT,
1520 .recalc = &followparent_recalc, 1552 .recalc = &followparent_recalc,
@@ -1524,6 +1556,7 @@ static struct clk gpt2_fck = {
1524 .name = "gpt2_fck", 1556 .name = "gpt2_fck",
1525 .parent = &func_32k_ck, 1557 .parent = &func_32k_ck,
1526 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1558 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1559 .clkdm_name = "core_l4_clkdm",
1527 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1560 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1528 .enable_bit = OMAP24XX_EN_GPT2_SHIFT, 1561 .enable_bit = OMAP24XX_EN_GPT2_SHIFT,
1529 .init = &omap2_init_clksel_parent, 1562 .init = &omap2_init_clksel_parent,
@@ -1537,6 +1570,7 @@ static struct clk gpt3_ick = {
1537 .name = "gpt3_ick", 1570 .name = "gpt3_ick",
1538 .parent = &l4_ck, 1571 .parent = &l4_ck,
1539 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1572 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1573 .clkdm_name = "core_l4_clkdm",
1540 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1574 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1541 .enable_bit = OMAP24XX_EN_GPT3_SHIFT, 1575 .enable_bit = OMAP24XX_EN_GPT3_SHIFT,
1542 .recalc = &followparent_recalc, 1576 .recalc = &followparent_recalc,
@@ -1546,6 +1580,7 @@ static struct clk gpt3_fck = {
1546 .name = "gpt3_fck", 1580 .name = "gpt3_fck",
1547 .parent = &func_32k_ck, 1581 .parent = &func_32k_ck,
1548 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1582 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1583 .clkdm_name = "core_l4_clkdm",
1549 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1584 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1550 .enable_bit = OMAP24XX_EN_GPT3_SHIFT, 1585 .enable_bit = OMAP24XX_EN_GPT3_SHIFT,
1551 .init = &omap2_init_clksel_parent, 1586 .init = &omap2_init_clksel_parent,
@@ -1559,6 +1594,7 @@ static struct clk gpt4_ick = {
1559 .name = "gpt4_ick", 1594 .name = "gpt4_ick",
1560 .parent = &l4_ck, 1595 .parent = &l4_ck,
1561 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1596 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1597 .clkdm_name = "core_l4_clkdm",
1562 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1598 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1563 .enable_bit = OMAP24XX_EN_GPT4_SHIFT, 1599 .enable_bit = OMAP24XX_EN_GPT4_SHIFT,
1564 .recalc = &followparent_recalc, 1600 .recalc = &followparent_recalc,
@@ -1568,6 +1604,7 @@ static struct clk gpt4_fck = {
1568 .name = "gpt4_fck", 1604 .name = "gpt4_fck",
1569 .parent = &func_32k_ck, 1605 .parent = &func_32k_ck,
1570 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1606 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1607 .clkdm_name = "core_l4_clkdm",
1571 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1608 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1572 .enable_bit = OMAP24XX_EN_GPT4_SHIFT, 1609 .enable_bit = OMAP24XX_EN_GPT4_SHIFT,
1573 .init = &omap2_init_clksel_parent, 1610 .init = &omap2_init_clksel_parent,
@@ -1581,6 +1618,7 @@ static struct clk gpt5_ick = {
1581 .name = "gpt5_ick", 1618 .name = "gpt5_ick",
1582 .parent = &l4_ck, 1619 .parent = &l4_ck,
1583 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1620 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1621 .clkdm_name = "core_l4_clkdm",
1584 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1622 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1585 .enable_bit = OMAP24XX_EN_GPT5_SHIFT, 1623 .enable_bit = OMAP24XX_EN_GPT5_SHIFT,
1586 .recalc = &followparent_recalc, 1624 .recalc = &followparent_recalc,
@@ -1590,6 +1628,7 @@ static struct clk gpt5_fck = {
1590 .name = "gpt5_fck", 1628 .name = "gpt5_fck",
1591 .parent = &func_32k_ck, 1629 .parent = &func_32k_ck,
1592 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1630 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1631 .clkdm_name = "core_l4_clkdm",
1593 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1632 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1594 .enable_bit = OMAP24XX_EN_GPT5_SHIFT, 1633 .enable_bit = OMAP24XX_EN_GPT5_SHIFT,
1595 .init = &omap2_init_clksel_parent, 1634 .init = &omap2_init_clksel_parent,
@@ -1603,6 +1642,7 @@ static struct clk gpt6_ick = {
1603 .name = "gpt6_ick", 1642 .name = "gpt6_ick",
1604 .parent = &l4_ck, 1643 .parent = &l4_ck,
1605 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1644 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1645 .clkdm_name = "core_l4_clkdm",
1606 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1646 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1607 .enable_bit = OMAP24XX_EN_GPT6_SHIFT, 1647 .enable_bit = OMAP24XX_EN_GPT6_SHIFT,
1608 .recalc = &followparent_recalc, 1648 .recalc = &followparent_recalc,
@@ -1612,6 +1652,7 @@ static struct clk gpt6_fck = {
1612 .name = "gpt6_fck", 1652 .name = "gpt6_fck",
1613 .parent = &func_32k_ck, 1653 .parent = &func_32k_ck,
1614 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1654 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1655 .clkdm_name = "core_l4_clkdm",
1615 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1656 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1616 .enable_bit = OMAP24XX_EN_GPT6_SHIFT, 1657 .enable_bit = OMAP24XX_EN_GPT6_SHIFT,
1617 .init = &omap2_init_clksel_parent, 1658 .init = &omap2_init_clksel_parent,
@@ -1634,6 +1675,7 @@ static struct clk gpt7_fck = {
1634 .name = "gpt7_fck", 1675 .name = "gpt7_fck",
1635 .parent = &func_32k_ck, 1676 .parent = &func_32k_ck,
1636 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1677 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1678 .clkdm_name = "core_l4_clkdm",
1637 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1679 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1638 .enable_bit = OMAP24XX_EN_GPT7_SHIFT, 1680 .enable_bit = OMAP24XX_EN_GPT7_SHIFT,
1639 .init = &omap2_init_clksel_parent, 1681 .init = &omap2_init_clksel_parent,
@@ -1647,6 +1689,7 @@ static struct clk gpt8_ick = {
1647 .name = "gpt8_ick", 1689 .name = "gpt8_ick",
1648 .parent = &l4_ck, 1690 .parent = &l4_ck,
1649 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1691 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1692 .clkdm_name = "core_l4_clkdm",
1650 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1693 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1651 .enable_bit = OMAP24XX_EN_GPT8_SHIFT, 1694 .enable_bit = OMAP24XX_EN_GPT8_SHIFT,
1652 .recalc = &followparent_recalc, 1695 .recalc = &followparent_recalc,
@@ -1656,6 +1699,7 @@ static struct clk gpt8_fck = {
1656 .name = "gpt8_fck", 1699 .name = "gpt8_fck",
1657 .parent = &func_32k_ck, 1700 .parent = &func_32k_ck,
1658 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1701 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1702 .clkdm_name = "core_l4_clkdm",
1659 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1703 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1660 .enable_bit = OMAP24XX_EN_GPT8_SHIFT, 1704 .enable_bit = OMAP24XX_EN_GPT8_SHIFT,
1661 .init = &omap2_init_clksel_parent, 1705 .init = &omap2_init_clksel_parent,
@@ -1669,6 +1713,7 @@ static struct clk gpt9_ick = {
1669 .name = "gpt9_ick", 1713 .name = "gpt9_ick",
1670 .parent = &l4_ck, 1714 .parent = &l4_ck,
1671 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1715 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1716 .clkdm_name = "core_l4_clkdm",
1672 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1717 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1673 .enable_bit = OMAP24XX_EN_GPT9_SHIFT, 1718 .enable_bit = OMAP24XX_EN_GPT9_SHIFT,
1674 .recalc = &followparent_recalc, 1719 .recalc = &followparent_recalc,
@@ -1678,6 +1723,7 @@ static struct clk gpt9_fck = {
1678 .name = "gpt9_fck", 1723 .name = "gpt9_fck",
1679 .parent = &func_32k_ck, 1724 .parent = &func_32k_ck,
1680 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1725 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1726 .clkdm_name = "core_l4_clkdm",
1681 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1727 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1682 .enable_bit = OMAP24XX_EN_GPT9_SHIFT, 1728 .enable_bit = OMAP24XX_EN_GPT9_SHIFT,
1683 .init = &omap2_init_clksel_parent, 1729 .init = &omap2_init_clksel_parent,
@@ -1691,6 +1737,7 @@ static struct clk gpt10_ick = {
1691 .name = "gpt10_ick", 1737 .name = "gpt10_ick",
1692 .parent = &l4_ck, 1738 .parent = &l4_ck,
1693 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1739 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1740 .clkdm_name = "core_l4_clkdm",
1694 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1741 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1695 .enable_bit = OMAP24XX_EN_GPT10_SHIFT, 1742 .enable_bit = OMAP24XX_EN_GPT10_SHIFT,
1696 .recalc = &followparent_recalc, 1743 .recalc = &followparent_recalc,
@@ -1700,6 +1747,7 @@ static struct clk gpt10_fck = {
1700 .name = "gpt10_fck", 1747 .name = "gpt10_fck",
1701 .parent = &func_32k_ck, 1748 .parent = &func_32k_ck,
1702 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1749 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1750 .clkdm_name = "core_l4_clkdm",
1703 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1751 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1704 .enable_bit = OMAP24XX_EN_GPT10_SHIFT, 1752 .enable_bit = OMAP24XX_EN_GPT10_SHIFT,
1705 .init = &omap2_init_clksel_parent, 1753 .init = &omap2_init_clksel_parent,
@@ -1713,6 +1761,7 @@ static struct clk gpt11_ick = {
1713 .name = "gpt11_ick", 1761 .name = "gpt11_ick",
1714 .parent = &l4_ck, 1762 .parent = &l4_ck,
1715 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1763 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1764 .clkdm_name = "core_l4_clkdm",
1716 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1765 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1717 .enable_bit = OMAP24XX_EN_GPT11_SHIFT, 1766 .enable_bit = OMAP24XX_EN_GPT11_SHIFT,
1718 .recalc = &followparent_recalc, 1767 .recalc = &followparent_recalc,
@@ -1722,6 +1771,7 @@ static struct clk gpt11_fck = {
1722 .name = "gpt11_fck", 1771 .name = "gpt11_fck",
1723 .parent = &func_32k_ck, 1772 .parent = &func_32k_ck,
1724 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1773 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1774 .clkdm_name = "core_l4_clkdm",
1725 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1775 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1726 .enable_bit = OMAP24XX_EN_GPT11_SHIFT, 1776 .enable_bit = OMAP24XX_EN_GPT11_SHIFT,
1727 .init = &omap2_init_clksel_parent, 1777 .init = &omap2_init_clksel_parent,
@@ -1735,6 +1785,7 @@ static struct clk gpt12_ick = {
1735 .name = "gpt12_ick", 1785 .name = "gpt12_ick",
1736 .parent = &l4_ck, 1786 .parent = &l4_ck,
1737 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1787 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1788 .clkdm_name = "core_l4_clkdm",
1738 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1789 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1739 .enable_bit = OMAP24XX_EN_GPT12_SHIFT, 1790 .enable_bit = OMAP24XX_EN_GPT12_SHIFT,
1740 .recalc = &followparent_recalc, 1791 .recalc = &followparent_recalc,
@@ -1744,6 +1795,7 @@ static struct clk gpt12_fck = {
1744 .name = "gpt12_fck", 1795 .name = "gpt12_fck",
1745 .parent = &func_32k_ck, 1796 .parent = &func_32k_ck,
1746 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1797 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1798 .clkdm_name = "core_l4_clkdm",
1747 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1799 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1748 .enable_bit = OMAP24XX_EN_GPT12_SHIFT, 1800 .enable_bit = OMAP24XX_EN_GPT12_SHIFT,
1749 .init = &omap2_init_clksel_parent, 1801 .init = &omap2_init_clksel_parent,
@@ -1758,6 +1810,7 @@ static struct clk mcbsp1_ick = {
1758 .id = 1, 1810 .id = 1,
1759 .parent = &l4_ck, 1811 .parent = &l4_ck,
1760 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1812 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1813 .clkdm_name = "core_l4_clkdm",
1761 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1814 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1762 .enable_bit = OMAP24XX_EN_MCBSP1_SHIFT, 1815 .enable_bit = OMAP24XX_EN_MCBSP1_SHIFT,
1763 .recalc = &followparent_recalc, 1816 .recalc = &followparent_recalc,
@@ -1768,6 +1821,7 @@ static struct clk mcbsp1_fck = {
1768 .id = 1, 1821 .id = 1,
1769 .parent = &func_96m_ck, 1822 .parent = &func_96m_ck,
1770 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1823 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1824 .clkdm_name = "core_l4_clkdm",
1771 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1825 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1772 .enable_bit = OMAP24XX_EN_MCBSP1_SHIFT, 1826 .enable_bit = OMAP24XX_EN_MCBSP1_SHIFT,
1773 .recalc = &followparent_recalc, 1827 .recalc = &followparent_recalc,
@@ -1778,6 +1832,7 @@ static struct clk mcbsp2_ick = {
1778 .id = 2, 1832 .id = 2,
1779 .parent = &l4_ck, 1833 .parent = &l4_ck,
1780 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1834 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1835 .clkdm_name = "core_l4_clkdm",
1781 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1836 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1782 .enable_bit = OMAP24XX_EN_MCBSP2_SHIFT, 1837 .enable_bit = OMAP24XX_EN_MCBSP2_SHIFT,
1783 .recalc = &followparent_recalc, 1838 .recalc = &followparent_recalc,
@@ -1788,6 +1843,7 @@ static struct clk mcbsp2_fck = {
1788 .id = 2, 1843 .id = 2,
1789 .parent = &func_96m_ck, 1844 .parent = &func_96m_ck,
1790 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1845 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1846 .clkdm_name = "core_l4_clkdm",
1791 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1847 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1792 .enable_bit = OMAP24XX_EN_MCBSP2_SHIFT, 1848 .enable_bit = OMAP24XX_EN_MCBSP2_SHIFT,
1793 .recalc = &followparent_recalc, 1849 .recalc = &followparent_recalc,
@@ -1798,6 +1854,7 @@ static struct clk mcbsp3_ick = {
1798 .id = 3, 1854 .id = 3,
1799 .parent = &l4_ck, 1855 .parent = &l4_ck,
1800 .flags = CLOCK_IN_OMAP243X, 1856 .flags = CLOCK_IN_OMAP243X,
1857 .clkdm_name = "core_l4_clkdm",
1801 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), 1858 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2),
1802 .enable_bit = OMAP2430_EN_MCBSP3_SHIFT, 1859 .enable_bit = OMAP2430_EN_MCBSP3_SHIFT,
1803 .recalc = &followparent_recalc, 1860 .recalc = &followparent_recalc,
@@ -1808,6 +1865,7 @@ static struct clk mcbsp3_fck = {
1808 .id = 3, 1865 .id = 3,
1809 .parent = &func_96m_ck, 1866 .parent = &func_96m_ck,
1810 .flags = CLOCK_IN_OMAP243X, 1867 .flags = CLOCK_IN_OMAP243X,
1868 .clkdm_name = "core_l4_clkdm",
1811 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), 1869 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
1812 .enable_bit = OMAP2430_EN_MCBSP3_SHIFT, 1870 .enable_bit = OMAP2430_EN_MCBSP3_SHIFT,
1813 .recalc = &followparent_recalc, 1871 .recalc = &followparent_recalc,
@@ -1818,6 +1876,7 @@ static struct clk mcbsp4_ick = {
1818 .id = 4, 1876 .id = 4,
1819 .parent = &l4_ck, 1877 .parent = &l4_ck,
1820 .flags = CLOCK_IN_OMAP243X, 1878 .flags = CLOCK_IN_OMAP243X,
1879 .clkdm_name = "core_l4_clkdm",
1821 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), 1880 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2),
1822 .enable_bit = OMAP2430_EN_MCBSP4_SHIFT, 1881 .enable_bit = OMAP2430_EN_MCBSP4_SHIFT,
1823 .recalc = &followparent_recalc, 1882 .recalc = &followparent_recalc,
@@ -1828,6 +1887,7 @@ static struct clk mcbsp4_fck = {
1828 .id = 4, 1887 .id = 4,
1829 .parent = &func_96m_ck, 1888 .parent = &func_96m_ck,
1830 .flags = CLOCK_IN_OMAP243X, 1889 .flags = CLOCK_IN_OMAP243X,
1890 .clkdm_name = "core_l4_clkdm",
1831 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), 1891 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
1832 .enable_bit = OMAP2430_EN_MCBSP4_SHIFT, 1892 .enable_bit = OMAP2430_EN_MCBSP4_SHIFT,
1833 .recalc = &followparent_recalc, 1893 .recalc = &followparent_recalc,
@@ -1838,6 +1898,7 @@ static struct clk mcbsp5_ick = {
1838 .id = 5, 1898 .id = 5,
1839 .parent = &l4_ck, 1899 .parent = &l4_ck,
1840 .flags = CLOCK_IN_OMAP243X, 1900 .flags = CLOCK_IN_OMAP243X,
1901 .clkdm_name = "core_l4_clkdm",
1841 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), 1902 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2),
1842 .enable_bit = OMAP2430_EN_MCBSP5_SHIFT, 1903 .enable_bit = OMAP2430_EN_MCBSP5_SHIFT,
1843 .recalc = &followparent_recalc, 1904 .recalc = &followparent_recalc,
@@ -1848,6 +1909,7 @@ static struct clk mcbsp5_fck = {
1848 .id = 5, 1909 .id = 5,
1849 .parent = &func_96m_ck, 1910 .parent = &func_96m_ck,
1850 .flags = CLOCK_IN_OMAP243X, 1911 .flags = CLOCK_IN_OMAP243X,
1912 .clkdm_name = "core_l4_clkdm",
1851 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), 1913 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
1852 .enable_bit = OMAP2430_EN_MCBSP5_SHIFT, 1914 .enable_bit = OMAP2430_EN_MCBSP5_SHIFT,
1853 .recalc = &followparent_recalc, 1915 .recalc = &followparent_recalc,
@@ -1857,6 +1919,7 @@ static struct clk mcspi1_ick = {
1857 .name = "mcspi_ick", 1919 .name = "mcspi_ick",
1858 .id = 1, 1920 .id = 1,
1859 .parent = &l4_ck, 1921 .parent = &l4_ck,
1922 .clkdm_name = "core_l4_clkdm",
1860 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1923 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1861 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1924 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1862 .enable_bit = OMAP24XX_EN_MCSPI1_SHIFT, 1925 .enable_bit = OMAP24XX_EN_MCSPI1_SHIFT,
@@ -1868,6 +1931,7 @@ static struct clk mcspi1_fck = {
1868 .id = 1, 1931 .id = 1,
1869 .parent = &func_48m_ck, 1932 .parent = &func_48m_ck,
1870 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1933 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1934 .clkdm_name = "core_l4_clkdm",
1871 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1935 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1872 .enable_bit = OMAP24XX_EN_MCSPI1_SHIFT, 1936 .enable_bit = OMAP24XX_EN_MCSPI1_SHIFT,
1873 .recalc = &followparent_recalc, 1937 .recalc = &followparent_recalc,
@@ -1878,6 +1942,7 @@ static struct clk mcspi2_ick = {
1878 .id = 2, 1942 .id = 2,
1879 .parent = &l4_ck, 1943 .parent = &l4_ck,
1880 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1944 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1945 .clkdm_name = "core_l4_clkdm",
1881 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1946 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1882 .enable_bit = OMAP24XX_EN_MCSPI2_SHIFT, 1947 .enable_bit = OMAP24XX_EN_MCSPI2_SHIFT,
1883 .recalc = &followparent_recalc, 1948 .recalc = &followparent_recalc,
@@ -1888,6 +1953,7 @@ static struct clk mcspi2_fck = {
1888 .id = 2, 1953 .id = 2,
1889 .parent = &func_48m_ck, 1954 .parent = &func_48m_ck,
1890 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1955 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1956 .clkdm_name = "core_l4_clkdm",
1891 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1957 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1892 .enable_bit = OMAP24XX_EN_MCSPI2_SHIFT, 1958 .enable_bit = OMAP24XX_EN_MCSPI2_SHIFT,
1893 .recalc = &followparent_recalc, 1959 .recalc = &followparent_recalc,
@@ -1898,6 +1964,7 @@ static struct clk mcspi3_ick = {
1898 .id = 3, 1964 .id = 3,
1899 .parent = &l4_ck, 1965 .parent = &l4_ck,
1900 .flags = CLOCK_IN_OMAP243X, 1966 .flags = CLOCK_IN_OMAP243X,
1967 .clkdm_name = "core_l4_clkdm",
1901 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), 1968 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2),
1902 .enable_bit = OMAP2430_EN_MCSPI3_SHIFT, 1969 .enable_bit = OMAP2430_EN_MCSPI3_SHIFT,
1903 .recalc = &followparent_recalc, 1970 .recalc = &followparent_recalc,
@@ -1908,6 +1975,7 @@ static struct clk mcspi3_fck = {
1908 .id = 3, 1975 .id = 3,
1909 .parent = &func_48m_ck, 1976 .parent = &func_48m_ck,
1910 .flags = CLOCK_IN_OMAP243X, 1977 .flags = CLOCK_IN_OMAP243X,
1978 .clkdm_name = "core_l4_clkdm",
1911 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), 1979 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
1912 .enable_bit = OMAP2430_EN_MCSPI3_SHIFT, 1980 .enable_bit = OMAP2430_EN_MCSPI3_SHIFT,
1913 .recalc = &followparent_recalc, 1981 .recalc = &followparent_recalc,
@@ -1917,6 +1985,7 @@ static struct clk uart1_ick = {
1917 .name = "uart1_ick", 1985 .name = "uart1_ick",
1918 .parent = &l4_ck, 1986 .parent = &l4_ck,
1919 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1987 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1988 .clkdm_name = "core_l4_clkdm",
1920 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1989 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1921 .enable_bit = OMAP24XX_EN_UART1_SHIFT, 1990 .enable_bit = OMAP24XX_EN_UART1_SHIFT,
1922 .recalc = &followparent_recalc, 1991 .recalc = &followparent_recalc,
@@ -1926,6 +1995,7 @@ static struct clk uart1_fck = {
1926 .name = "uart1_fck", 1995 .name = "uart1_fck",
1927 .parent = &func_48m_ck, 1996 .parent = &func_48m_ck,
1928 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 1997 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
1998 .clkdm_name = "core_l4_clkdm",
1929 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1999 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1930 .enable_bit = OMAP24XX_EN_UART1_SHIFT, 2000 .enable_bit = OMAP24XX_EN_UART1_SHIFT,
1931 .recalc = &followparent_recalc, 2001 .recalc = &followparent_recalc,
@@ -1935,6 +2005,7 @@ static struct clk uart2_ick = {
1935 .name = "uart2_ick", 2005 .name = "uart2_ick",
1936 .parent = &l4_ck, 2006 .parent = &l4_ck,
1937 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 2007 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
2008 .clkdm_name = "core_l4_clkdm",
1938 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 2009 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1939 .enable_bit = OMAP24XX_EN_UART2_SHIFT, 2010 .enable_bit = OMAP24XX_EN_UART2_SHIFT,
1940 .recalc = &followparent_recalc, 2011 .recalc = &followparent_recalc,
@@ -1944,6 +2015,7 @@ static struct clk uart2_fck = {
1944 .name = "uart2_fck", 2015 .name = "uart2_fck",
1945 .parent = &func_48m_ck, 2016 .parent = &func_48m_ck,
1946 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 2017 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
2018 .clkdm_name = "core_l4_clkdm",
1947 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 2019 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1948 .enable_bit = OMAP24XX_EN_UART2_SHIFT, 2020 .enable_bit = OMAP24XX_EN_UART2_SHIFT,
1949 .recalc = &followparent_recalc, 2021 .recalc = &followparent_recalc,
@@ -1953,6 +2025,7 @@ static struct clk uart3_ick = {
1953 .name = "uart3_ick", 2025 .name = "uart3_ick",
1954 .parent = &l4_ck, 2026 .parent = &l4_ck,
1955 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 2027 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
2028 .clkdm_name = "core_l4_clkdm",
1956 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), 2029 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2),
1957 .enable_bit = OMAP24XX_EN_UART3_SHIFT, 2030 .enable_bit = OMAP24XX_EN_UART3_SHIFT,
1958 .recalc = &followparent_recalc, 2031 .recalc = &followparent_recalc,
@@ -1962,6 +2035,7 @@ static struct clk uart3_fck = {
1962 .name = "uart3_fck", 2035 .name = "uart3_fck",
1963 .parent = &func_48m_ck, 2036 .parent = &func_48m_ck,
1964 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 2037 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
2038 .clkdm_name = "core_l4_clkdm",
1965 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), 2039 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
1966 .enable_bit = OMAP24XX_EN_UART3_SHIFT, 2040 .enable_bit = OMAP24XX_EN_UART3_SHIFT,
1967 .recalc = &followparent_recalc, 2041 .recalc = &followparent_recalc,
@@ -1971,6 +2045,7 @@ static struct clk gpios_ick = {
1971 .name = "gpios_ick", 2045 .name = "gpios_ick",
1972 .parent = &l4_ck, 2046 .parent = &l4_ck,
1973 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 2047 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
2048 .clkdm_name = "core_l4_clkdm",
1974 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), 2049 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN),
1975 .enable_bit = OMAP24XX_EN_GPIOS_SHIFT, 2050 .enable_bit = OMAP24XX_EN_GPIOS_SHIFT,
1976 .recalc = &followparent_recalc, 2051 .recalc = &followparent_recalc,
@@ -1980,6 +2055,7 @@ static struct clk gpios_fck = {
1980 .name = "gpios_fck", 2055 .name = "gpios_fck",
1981 .parent = &func_32k_ck, 2056 .parent = &func_32k_ck,
1982 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 2057 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
2058 .clkdm_name = "wkup_clkdm",
1983 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), 2059 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
1984 .enable_bit = OMAP24XX_EN_GPIOS_SHIFT, 2060 .enable_bit = OMAP24XX_EN_GPIOS_SHIFT,
1985 .recalc = &followparent_recalc, 2061 .recalc = &followparent_recalc,
@@ -1989,6 +2065,7 @@ static struct clk mpu_wdt_ick = {
1989 .name = "mpu_wdt_ick", 2065 .name = "mpu_wdt_ick",
1990 .parent = &l4_ck, 2066 .parent = &l4_ck,
1991 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 2067 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
2068 .clkdm_name = "core_l4_clkdm",
1992 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), 2069 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN),
1993 .enable_bit = OMAP24XX_EN_MPU_WDT_SHIFT, 2070 .enable_bit = OMAP24XX_EN_MPU_WDT_SHIFT,
1994 .recalc = &followparent_recalc, 2071 .recalc = &followparent_recalc,
@@ -1998,6 +2075,7 @@ static struct clk mpu_wdt_fck = {
1998 .name = "mpu_wdt_fck", 2075 .name = "mpu_wdt_fck",
1999 .parent = &func_32k_ck, 2076 .parent = &func_32k_ck,
2000 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 2077 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
2078 .clkdm_name = "wkup_clkdm",
2001 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), 2079 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
2002 .enable_bit = OMAP24XX_EN_MPU_WDT_SHIFT, 2080 .enable_bit = OMAP24XX_EN_MPU_WDT_SHIFT,
2003 .recalc = &followparent_recalc, 2081 .recalc = &followparent_recalc,
@@ -2006,31 +2084,40 @@ static struct clk mpu_wdt_fck = {
2006static struct clk sync_32k_ick = { 2084static struct clk sync_32k_ick = {
2007 .name = "sync_32k_ick", 2085 .name = "sync_32k_ick",
2008 .parent = &l4_ck, 2086 .parent = &l4_ck,
2009 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ENABLE_ON_INIT, 2087 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
2088 ENABLE_ON_INIT,
2089 .clkdm_name = "core_l4_clkdm",
2010 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), 2090 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN),
2011 .enable_bit = OMAP24XX_EN_32KSYNC_SHIFT, 2091 .enable_bit = OMAP24XX_EN_32KSYNC_SHIFT,
2012 .recalc = &followparent_recalc, 2092 .recalc = &followparent_recalc,
2013}; 2093};
2094
2014static struct clk wdt1_ick = { 2095static struct clk wdt1_ick = {
2015 .name = "wdt1_ick", 2096 .name = "wdt1_ick",
2016 .parent = &l4_ck, 2097 .parent = &l4_ck,
2017 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 2098 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
2099 .clkdm_name = "core_l4_clkdm",
2018 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), 2100 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN),
2019 .enable_bit = OMAP24XX_EN_WDT1_SHIFT, 2101 .enable_bit = OMAP24XX_EN_WDT1_SHIFT,
2020 .recalc = &followparent_recalc, 2102 .recalc = &followparent_recalc,
2021}; 2103};
2104
2022static struct clk omapctrl_ick = { 2105static struct clk omapctrl_ick = {
2023 .name = "omapctrl_ick", 2106 .name = "omapctrl_ick",
2024 .parent = &l4_ck, 2107 .parent = &l4_ck,
2025 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ENABLE_ON_INIT, 2108 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
2109 ENABLE_ON_INIT,
2110 .clkdm_name = "core_l4_clkdm",
2026 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), 2111 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN),
2027 .enable_bit = OMAP24XX_EN_OMAPCTRL_SHIFT, 2112 .enable_bit = OMAP24XX_EN_OMAPCTRL_SHIFT,
2028 .recalc = &followparent_recalc, 2113 .recalc = &followparent_recalc,
2029}; 2114};
2115
2030static struct clk icr_ick = { 2116static struct clk icr_ick = {
2031 .name = "icr_ick", 2117 .name = "icr_ick",
2032 .parent = &l4_ck, 2118 .parent = &l4_ck,
2033 .flags = CLOCK_IN_OMAP243X, 2119 .flags = CLOCK_IN_OMAP243X,
2120 .clkdm_name = "core_l4_clkdm",
2034 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), 2121 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN),
2035 .enable_bit = OMAP2430_EN_ICR_SHIFT, 2122 .enable_bit = OMAP2430_EN_ICR_SHIFT,
2036 .recalc = &followparent_recalc, 2123 .recalc = &followparent_recalc,
@@ -2040,15 +2127,22 @@ static struct clk cam_ick = {
2040 .name = "cam_ick", 2127 .name = "cam_ick",
2041 .parent = &l4_ck, 2128 .parent = &l4_ck,
2042 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 2129 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
2130 .clkdm_name = "core_l4_clkdm",
2043 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 2131 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2044 .enable_bit = OMAP24XX_EN_CAM_SHIFT, 2132 .enable_bit = OMAP24XX_EN_CAM_SHIFT,
2045 .recalc = &followparent_recalc, 2133 .recalc = &followparent_recalc,
2046}; 2134};
2047 2135
2136/*
2137 * cam_fck controls both CAM_MCLK and CAM_FCLK. It should probably be
2138 * split into two separate clocks, since the parent clocks are different
2139 * and the clockdomains are also different.
2140 */
2048static struct clk cam_fck = { 2141static struct clk cam_fck = {
2049 .name = "cam_fck", 2142 .name = "cam_fck",
2050 .parent = &func_96m_ck, 2143 .parent = &func_96m_ck,
2051 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 2144 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
2145 .clkdm_name = "core_l3_clkdm",
2052 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 2146 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
2053 .enable_bit = OMAP24XX_EN_CAM_SHIFT, 2147 .enable_bit = OMAP24XX_EN_CAM_SHIFT,
2054 .recalc = &followparent_recalc, 2148 .recalc = &followparent_recalc,
@@ -2058,6 +2152,7 @@ static struct clk mailboxes_ick = {
2058 .name = "mailboxes_ick", 2152 .name = "mailboxes_ick",
2059 .parent = &l4_ck, 2153 .parent = &l4_ck,
2060 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 2154 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
2155 .clkdm_name = "core_l4_clkdm",
2061 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 2156 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2062 .enable_bit = OMAP24XX_EN_MAILBOXES_SHIFT, 2157 .enable_bit = OMAP24XX_EN_MAILBOXES_SHIFT,
2063 .recalc = &followparent_recalc, 2158 .recalc = &followparent_recalc,
@@ -2067,6 +2162,7 @@ static struct clk wdt4_ick = {
2067 .name = "wdt4_ick", 2162 .name = "wdt4_ick",
2068 .parent = &l4_ck, 2163 .parent = &l4_ck,
2069 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 2164 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
2165 .clkdm_name = "core_l4_clkdm",
2070 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 2166 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2071 .enable_bit = OMAP24XX_EN_WDT4_SHIFT, 2167 .enable_bit = OMAP24XX_EN_WDT4_SHIFT,
2072 .recalc = &followparent_recalc, 2168 .recalc = &followparent_recalc,
@@ -2076,6 +2172,7 @@ static struct clk wdt4_fck = {
2076 .name = "wdt4_fck", 2172 .name = "wdt4_fck",
2077 .parent = &func_32k_ck, 2173 .parent = &func_32k_ck,
2078 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 2174 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
2175 .clkdm_name = "core_l4_clkdm",
2079 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 2176 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
2080 .enable_bit = OMAP24XX_EN_WDT4_SHIFT, 2177 .enable_bit = OMAP24XX_EN_WDT4_SHIFT,
2081 .recalc = &followparent_recalc, 2178 .recalc = &followparent_recalc,
@@ -2085,6 +2182,7 @@ static struct clk wdt3_ick = {
2085 .name = "wdt3_ick", 2182 .name = "wdt3_ick",
2086 .parent = &l4_ck, 2183 .parent = &l4_ck,
2087 .flags = CLOCK_IN_OMAP242X, 2184 .flags = CLOCK_IN_OMAP242X,
2185 .clkdm_name = "core_l4_clkdm",
2088 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 2186 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2089 .enable_bit = OMAP2420_EN_WDT3_SHIFT, 2187 .enable_bit = OMAP2420_EN_WDT3_SHIFT,
2090 .recalc = &followparent_recalc, 2188 .recalc = &followparent_recalc,
@@ -2094,6 +2192,7 @@ static struct clk wdt3_fck = {
2094 .name = "wdt3_fck", 2192 .name = "wdt3_fck",
2095 .parent = &func_32k_ck, 2193 .parent = &func_32k_ck,
2096 .flags = CLOCK_IN_OMAP242X, 2194 .flags = CLOCK_IN_OMAP242X,
2195 .clkdm_name = "core_l4_clkdm",
2097 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 2196 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
2098 .enable_bit = OMAP2420_EN_WDT3_SHIFT, 2197 .enable_bit = OMAP2420_EN_WDT3_SHIFT,
2099 .recalc = &followparent_recalc, 2198 .recalc = &followparent_recalc,
@@ -2103,6 +2202,7 @@ static struct clk mspro_ick = {
2103 .name = "mspro_ick", 2202 .name = "mspro_ick",
2104 .parent = &l4_ck, 2203 .parent = &l4_ck,
2105 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 2204 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
2205 .clkdm_name = "core_l4_clkdm",
2106 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 2206 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2107 .enable_bit = OMAP24XX_EN_MSPRO_SHIFT, 2207 .enable_bit = OMAP24XX_EN_MSPRO_SHIFT,
2108 .recalc = &followparent_recalc, 2208 .recalc = &followparent_recalc,
@@ -2112,6 +2212,7 @@ static struct clk mspro_fck = {
2112 .name = "mspro_fck", 2212 .name = "mspro_fck",
2113 .parent = &func_96m_ck, 2213 .parent = &func_96m_ck,
2114 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 2214 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
2215 .clkdm_name = "core_l4_clkdm",
2115 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 2216 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
2116 .enable_bit = OMAP24XX_EN_MSPRO_SHIFT, 2217 .enable_bit = OMAP24XX_EN_MSPRO_SHIFT,
2117 .recalc = &followparent_recalc, 2218 .recalc = &followparent_recalc,
@@ -2121,6 +2222,7 @@ static struct clk mmc_ick = {
2121 .name = "mmc_ick", 2222 .name = "mmc_ick",
2122 .parent = &l4_ck, 2223 .parent = &l4_ck,
2123 .flags = CLOCK_IN_OMAP242X, 2224 .flags = CLOCK_IN_OMAP242X,
2225 .clkdm_name = "core_l4_clkdm",
2124 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 2226 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2125 .enable_bit = OMAP2420_EN_MMC_SHIFT, 2227 .enable_bit = OMAP2420_EN_MMC_SHIFT,
2126 .recalc = &followparent_recalc, 2228 .recalc = &followparent_recalc,
@@ -2130,6 +2232,7 @@ static struct clk mmc_fck = {
2130 .name = "mmc_fck", 2232 .name = "mmc_fck",
2131 .parent = &func_96m_ck, 2233 .parent = &func_96m_ck,
2132 .flags = CLOCK_IN_OMAP242X, 2234 .flags = CLOCK_IN_OMAP242X,
2235 .clkdm_name = "core_l4_clkdm",
2133 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 2236 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
2134 .enable_bit = OMAP2420_EN_MMC_SHIFT, 2237 .enable_bit = OMAP2420_EN_MMC_SHIFT,
2135 .recalc = &followparent_recalc, 2238 .recalc = &followparent_recalc,
@@ -2139,6 +2242,7 @@ static struct clk fac_ick = {
2139 .name = "fac_ick", 2242 .name = "fac_ick",
2140 .parent = &l4_ck, 2243 .parent = &l4_ck,
2141 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 2244 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
2245 .clkdm_name = "core_l4_clkdm",
2142 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 2246 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2143 .enable_bit = OMAP24XX_EN_FAC_SHIFT, 2247 .enable_bit = OMAP24XX_EN_FAC_SHIFT,
2144 .recalc = &followparent_recalc, 2248 .recalc = &followparent_recalc,
@@ -2148,6 +2252,7 @@ static struct clk fac_fck = {
2148 .name = "fac_fck", 2252 .name = "fac_fck",
2149 .parent = &func_12m_ck, 2253 .parent = &func_12m_ck,
2150 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 2254 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
2255 .clkdm_name = "core_l4_clkdm",
2151 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 2256 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
2152 .enable_bit = OMAP24XX_EN_FAC_SHIFT, 2257 .enable_bit = OMAP24XX_EN_FAC_SHIFT,
2153 .recalc = &followparent_recalc, 2258 .recalc = &followparent_recalc,
@@ -2157,6 +2262,7 @@ static struct clk eac_ick = {
2157 .name = "eac_ick", 2262 .name = "eac_ick",
2158 .parent = &l4_ck, 2263 .parent = &l4_ck,
2159 .flags = CLOCK_IN_OMAP242X, 2264 .flags = CLOCK_IN_OMAP242X,
2265 .clkdm_name = "core_l4_clkdm",
2160 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 2266 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2161 .enable_bit = OMAP2420_EN_EAC_SHIFT, 2267 .enable_bit = OMAP2420_EN_EAC_SHIFT,
2162 .recalc = &followparent_recalc, 2268 .recalc = &followparent_recalc,
@@ -2166,6 +2272,7 @@ static struct clk eac_fck = {
2166 .name = "eac_fck", 2272 .name = "eac_fck",
2167 .parent = &func_96m_ck, 2273 .parent = &func_96m_ck,
2168 .flags = CLOCK_IN_OMAP242X, 2274 .flags = CLOCK_IN_OMAP242X,
2275 .clkdm_name = "core_l4_clkdm",
2169 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 2276 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
2170 .enable_bit = OMAP2420_EN_EAC_SHIFT, 2277 .enable_bit = OMAP2420_EN_EAC_SHIFT,
2171 .recalc = &followparent_recalc, 2278 .recalc = &followparent_recalc,
@@ -2175,6 +2282,7 @@ static struct clk hdq_ick = {
2175 .name = "hdq_ick", 2282 .name = "hdq_ick",
2176 .parent = &l4_ck, 2283 .parent = &l4_ck,
2177 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 2284 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
2285 .clkdm_name = "core_l4_clkdm",
2178 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 2286 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2179 .enable_bit = OMAP24XX_EN_HDQ_SHIFT, 2287 .enable_bit = OMAP24XX_EN_HDQ_SHIFT,
2180 .recalc = &followparent_recalc, 2288 .recalc = &followparent_recalc,
@@ -2184,6 +2292,7 @@ static struct clk hdq_fck = {
2184 .name = "hdq_fck", 2292 .name = "hdq_fck",
2185 .parent = &func_12m_ck, 2293 .parent = &func_12m_ck,
2186 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 2294 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
2295 .clkdm_name = "core_l4_clkdm",
2187 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 2296 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
2188 .enable_bit = OMAP24XX_EN_HDQ_SHIFT, 2297 .enable_bit = OMAP24XX_EN_HDQ_SHIFT,
2189 .recalc = &followparent_recalc, 2298 .recalc = &followparent_recalc,
@@ -2194,6 +2303,7 @@ static struct clk i2c2_ick = {
2194 .id = 2, 2303 .id = 2,
2195 .parent = &l4_ck, 2304 .parent = &l4_ck,
2196 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 2305 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
2306 .clkdm_name = "core_l4_clkdm",
2197 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 2307 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2198 .enable_bit = OMAP2420_EN_I2C2_SHIFT, 2308 .enable_bit = OMAP2420_EN_I2C2_SHIFT,
2199 .recalc = &followparent_recalc, 2309 .recalc = &followparent_recalc,
@@ -2204,6 +2314,7 @@ static struct clk i2c2_fck = {
2204 .id = 2, 2314 .id = 2,
2205 .parent = &func_12m_ck, 2315 .parent = &func_12m_ck,
2206 .flags = CLOCK_IN_OMAP242X, 2316 .flags = CLOCK_IN_OMAP242X,
2317 .clkdm_name = "core_l4_clkdm",
2207 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 2318 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
2208 .enable_bit = OMAP2420_EN_I2C2_SHIFT, 2319 .enable_bit = OMAP2420_EN_I2C2_SHIFT,
2209 .recalc = &followparent_recalc, 2320 .recalc = &followparent_recalc,
@@ -2214,6 +2325,7 @@ static struct clk i2chs2_fck = {
2214 .id = 2, 2325 .id = 2,
2215 .parent = &func_96m_ck, 2326 .parent = &func_96m_ck,
2216 .flags = CLOCK_IN_OMAP243X, 2327 .flags = CLOCK_IN_OMAP243X,
2328 .clkdm_name = "core_l4_clkdm",
2217 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), 2329 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
2218 .enable_bit = OMAP2430_EN_I2CHS2_SHIFT, 2330 .enable_bit = OMAP2430_EN_I2CHS2_SHIFT,
2219 .recalc = &followparent_recalc, 2331 .recalc = &followparent_recalc,
@@ -2224,6 +2336,7 @@ static struct clk i2c1_ick = {
2224 .id = 1, 2336 .id = 1,
2225 .parent = &l4_ck, 2337 .parent = &l4_ck,
2226 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 2338 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
2339 .clkdm_name = "core_l4_clkdm",
2227 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 2340 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2228 .enable_bit = OMAP2420_EN_I2C1_SHIFT, 2341 .enable_bit = OMAP2420_EN_I2C1_SHIFT,
2229 .recalc = &followparent_recalc, 2342 .recalc = &followparent_recalc,
@@ -2234,6 +2347,7 @@ static struct clk i2c1_fck = {
2234 .id = 1, 2347 .id = 1,
2235 .parent = &func_12m_ck, 2348 .parent = &func_12m_ck,
2236 .flags = CLOCK_IN_OMAP242X, 2349 .flags = CLOCK_IN_OMAP242X,
2350 .clkdm_name = "core_l4_clkdm",
2237 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 2351 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
2238 .enable_bit = OMAP2420_EN_I2C1_SHIFT, 2352 .enable_bit = OMAP2420_EN_I2C1_SHIFT,
2239 .recalc = &followparent_recalc, 2353 .recalc = &followparent_recalc,
@@ -2244,6 +2358,7 @@ static struct clk i2chs1_fck = {
2244 .id = 1, 2358 .id = 1,
2245 .parent = &func_96m_ck, 2359 .parent = &func_96m_ck,
2246 .flags = CLOCK_IN_OMAP243X, 2360 .flags = CLOCK_IN_OMAP243X,
2361 .clkdm_name = "core_l4_clkdm",
2247 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), 2362 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
2248 .enable_bit = OMAP2430_EN_I2CHS1_SHIFT, 2363 .enable_bit = OMAP2430_EN_I2CHS1_SHIFT,
2249 .recalc = &followparent_recalc, 2364 .recalc = &followparent_recalc,
@@ -2252,7 +2367,9 @@ static struct clk i2chs1_fck = {
2252static struct clk gpmc_fck = { 2367static struct clk gpmc_fck = {
2253 .name = "gpmc_fck", 2368 .name = "gpmc_fck",
2254 .parent = &core_l3_ck, 2369 .parent = &core_l3_ck,
2255 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ENABLE_ON_INIT, 2370 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
2371 ENABLE_ON_INIT,
2372 .clkdm_name = "core_l3_clkdm",
2256 .recalc = &followparent_recalc, 2373 .recalc = &followparent_recalc,
2257}; 2374};
2258 2375
@@ -2260,6 +2377,7 @@ static struct clk sdma_fck = {
2260 .name = "sdma_fck", 2377 .name = "sdma_fck",
2261 .parent = &core_l3_ck, 2378 .parent = &core_l3_ck,
2262 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 2379 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
2380 .clkdm_name = "core_l3_clkdm",
2263 .recalc = &followparent_recalc, 2381 .recalc = &followparent_recalc,
2264}; 2382};
2265 2383
@@ -2267,6 +2385,7 @@ static struct clk sdma_ick = {
2267 .name = "sdma_ick", 2385 .name = "sdma_ick",
2268 .parent = &l4_ck, 2386 .parent = &l4_ck,
2269 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, 2387 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
2388 .clkdm_name = "core_l3_clkdm",
2270 .recalc = &followparent_recalc, 2389 .recalc = &followparent_recalc,
2271}; 2390};
2272 2391
@@ -2274,6 +2393,7 @@ static struct clk vlynq_ick = {
2274 .name = "vlynq_ick", 2393 .name = "vlynq_ick",
2275 .parent = &core_l3_ck, 2394 .parent = &core_l3_ck,
2276 .flags = CLOCK_IN_OMAP242X, 2395 .flags = CLOCK_IN_OMAP242X,
2396 .clkdm_name = "core_l3_clkdm",
2277 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 2397 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2278 .enable_bit = OMAP2420_EN_VLYNQ_SHIFT, 2398 .enable_bit = OMAP2420_EN_VLYNQ_SHIFT,
2279 .recalc = &followparent_recalc, 2399 .recalc = &followparent_recalc,
@@ -2308,6 +2428,7 @@ static struct clk vlynq_fck = {
2308 .name = "vlynq_fck", 2428 .name = "vlynq_fck",
2309 .parent = &func_96m_ck, 2429 .parent = &func_96m_ck,
2310 .flags = CLOCK_IN_OMAP242X | DELAYED_APP, 2430 .flags = CLOCK_IN_OMAP242X | DELAYED_APP,
2431 .clkdm_name = "core_l3_clkdm",
2311 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 2432 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
2312 .enable_bit = OMAP2420_EN_VLYNQ_SHIFT, 2433 .enable_bit = OMAP2420_EN_VLYNQ_SHIFT,
2313 .init = &omap2_init_clksel_parent, 2434 .init = &omap2_init_clksel_parent,
@@ -2323,6 +2444,7 @@ static struct clk sdrc_ick = {
2323 .name = "sdrc_ick", 2444 .name = "sdrc_ick",
2324 .parent = &l4_ck, 2445 .parent = &l4_ck,
2325 .flags = CLOCK_IN_OMAP243X | ENABLE_ON_INIT, 2446 .flags = CLOCK_IN_OMAP243X | ENABLE_ON_INIT,
2447 .clkdm_name = "core_l4_clkdm",
2326 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN3), 2448 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN3),
2327 .enable_bit = OMAP2430_EN_SDRC_SHIFT, 2449 .enable_bit = OMAP2430_EN_SDRC_SHIFT,
2328 .recalc = &followparent_recalc, 2450 .recalc = &followparent_recalc,
@@ -2332,6 +2454,7 @@ static struct clk des_ick = {
2332 .name = "des_ick", 2454 .name = "des_ick",
2333 .parent = &l4_ck, 2455 .parent = &l4_ck,
2334 .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X, 2456 .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
2457 .clkdm_name = "core_l4_clkdm",
2335 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_ICLKEN4), 2458 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_ICLKEN4),
2336 .enable_bit = OMAP24XX_EN_DES_SHIFT, 2459 .enable_bit = OMAP24XX_EN_DES_SHIFT,
2337 .recalc = &followparent_recalc, 2460 .recalc = &followparent_recalc,
@@ -2341,6 +2464,7 @@ static struct clk sha_ick = {
2341 .name = "sha_ick", 2464 .name = "sha_ick",
2342 .parent = &l4_ck, 2465 .parent = &l4_ck,
2343 .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X, 2466 .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
2467 .clkdm_name = "core_l4_clkdm",
2344 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_ICLKEN4), 2468 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_ICLKEN4),
2345 .enable_bit = OMAP24XX_EN_SHA_SHIFT, 2469 .enable_bit = OMAP24XX_EN_SHA_SHIFT,
2346 .recalc = &followparent_recalc, 2470 .recalc = &followparent_recalc,
@@ -2350,6 +2474,7 @@ static struct clk rng_ick = {
2350 .name = "rng_ick", 2474 .name = "rng_ick",
2351 .parent = &l4_ck, 2475 .parent = &l4_ck,
2352 .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X, 2476 .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
2477 .clkdm_name = "core_l4_clkdm",
2353 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_ICLKEN4), 2478 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_ICLKEN4),
2354 .enable_bit = OMAP24XX_EN_RNG_SHIFT, 2479 .enable_bit = OMAP24XX_EN_RNG_SHIFT,
2355 .recalc = &followparent_recalc, 2480 .recalc = &followparent_recalc,
@@ -2359,6 +2484,7 @@ static struct clk aes_ick = {
2359 .name = "aes_ick", 2484 .name = "aes_ick",
2360 .parent = &l4_ck, 2485 .parent = &l4_ck,
2361 .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X, 2486 .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
2487 .clkdm_name = "core_l4_clkdm",
2362 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_ICLKEN4), 2488 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_ICLKEN4),
2363 .enable_bit = OMAP24XX_EN_AES_SHIFT, 2489 .enable_bit = OMAP24XX_EN_AES_SHIFT,
2364 .recalc = &followparent_recalc, 2490 .recalc = &followparent_recalc,
@@ -2368,6 +2494,7 @@ static struct clk pka_ick = {
2368 .name = "pka_ick", 2494 .name = "pka_ick",
2369 .parent = &l4_ck, 2495 .parent = &l4_ck,
2370 .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X, 2496 .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
2497 .clkdm_name = "core_l4_clkdm",
2371 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_ICLKEN4), 2498 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_ICLKEN4),
2372 .enable_bit = OMAP24XX_EN_PKA_SHIFT, 2499 .enable_bit = OMAP24XX_EN_PKA_SHIFT,
2373 .recalc = &followparent_recalc, 2500 .recalc = &followparent_recalc,
@@ -2377,6 +2504,7 @@ static struct clk usb_fck = {
2377 .name = "usb_fck", 2504 .name = "usb_fck",
2378 .parent = &func_48m_ck, 2505 .parent = &func_48m_ck,
2379 .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X, 2506 .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
2507 .clkdm_name = "core_l3_clkdm",
2380 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), 2508 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
2381 .enable_bit = OMAP24XX_EN_USB_SHIFT, 2509 .enable_bit = OMAP24XX_EN_USB_SHIFT,
2382 .recalc = &followparent_recalc, 2510 .recalc = &followparent_recalc,
@@ -2386,6 +2514,7 @@ static struct clk usbhs_ick = {
2386 .name = "usbhs_ick", 2514 .name = "usbhs_ick",
2387 .parent = &core_l3_ck, 2515 .parent = &core_l3_ck,
2388 .flags = CLOCK_IN_OMAP243X, 2516 .flags = CLOCK_IN_OMAP243X,
2517 .clkdm_name = "core_l3_clkdm",
2389 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), 2518 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2),
2390 .enable_bit = OMAP2430_EN_USBHS_SHIFT, 2519 .enable_bit = OMAP2430_EN_USBHS_SHIFT,
2391 .recalc = &followparent_recalc, 2520 .recalc = &followparent_recalc,
@@ -2396,6 +2525,7 @@ static struct clk mmchs1_ick = {
2396 .id = 1, 2525 .id = 1,
2397 .parent = &l4_ck, 2526 .parent = &l4_ck,
2398 .flags = CLOCK_IN_OMAP243X, 2527 .flags = CLOCK_IN_OMAP243X,
2528 .clkdm_name = "core_l4_clkdm",
2399 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), 2529 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2),
2400 .enable_bit = OMAP2430_EN_MMCHS1_SHIFT, 2530 .enable_bit = OMAP2430_EN_MMCHS1_SHIFT,
2401 .recalc = &followparent_recalc, 2531 .recalc = &followparent_recalc,
@@ -2406,6 +2536,7 @@ static struct clk mmchs1_fck = {
2406 .id = 1, 2536 .id = 1,
2407 .parent = &func_96m_ck, 2537 .parent = &func_96m_ck,
2408 .flags = CLOCK_IN_OMAP243X, 2538 .flags = CLOCK_IN_OMAP243X,
2539 .clkdm_name = "core_l3_clkdm",
2409 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), 2540 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
2410 .enable_bit = OMAP2430_EN_MMCHS1_SHIFT, 2541 .enable_bit = OMAP2430_EN_MMCHS1_SHIFT,
2411 .recalc = &followparent_recalc, 2542 .recalc = &followparent_recalc,
@@ -2416,6 +2547,7 @@ static struct clk mmchs2_ick = {
2416 .id = 2, 2547 .id = 2,
2417 .parent = &l4_ck, 2548 .parent = &l4_ck,
2418 .flags = CLOCK_IN_OMAP243X, 2549 .flags = CLOCK_IN_OMAP243X,
2550 .clkdm_name = "core_l4_clkdm",
2419 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), 2551 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2),
2420 .enable_bit = OMAP2430_EN_MMCHS2_SHIFT, 2552 .enable_bit = OMAP2430_EN_MMCHS2_SHIFT,
2421 .recalc = &followparent_recalc, 2553 .recalc = &followparent_recalc,
@@ -2435,6 +2567,7 @@ static struct clk gpio5_ick = {
2435 .name = "gpio5_ick", 2567 .name = "gpio5_ick",
2436 .parent = &l4_ck, 2568 .parent = &l4_ck,
2437 .flags = CLOCK_IN_OMAP243X, 2569 .flags = CLOCK_IN_OMAP243X,
2570 .clkdm_name = "core_l4_clkdm",
2438 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), 2571 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2),
2439 .enable_bit = OMAP2430_EN_GPIO5_SHIFT, 2572 .enable_bit = OMAP2430_EN_GPIO5_SHIFT,
2440 .recalc = &followparent_recalc, 2573 .recalc = &followparent_recalc,
@@ -2444,6 +2577,7 @@ static struct clk gpio5_fck = {
2444 .name = "gpio5_fck", 2577 .name = "gpio5_fck",
2445 .parent = &func_32k_ck, 2578 .parent = &func_32k_ck,
2446 .flags = CLOCK_IN_OMAP243X, 2579 .flags = CLOCK_IN_OMAP243X,
2580 .clkdm_name = "core_l4_clkdm",
2447 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), 2581 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
2448 .enable_bit = OMAP2430_EN_GPIO5_SHIFT, 2582 .enable_bit = OMAP2430_EN_GPIO5_SHIFT,
2449 .recalc = &followparent_recalc, 2583 .recalc = &followparent_recalc,
@@ -2453,6 +2587,7 @@ static struct clk mdm_intc_ick = {
2453 .name = "mdm_intc_ick", 2587 .name = "mdm_intc_ick",
2454 .parent = &l4_ck, 2588 .parent = &l4_ck,
2455 .flags = CLOCK_IN_OMAP243X, 2589 .flags = CLOCK_IN_OMAP243X,
2590 .clkdm_name = "core_l4_clkdm",
2456 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), 2591 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2),
2457 .enable_bit = OMAP2430_EN_MDM_INTC_SHIFT, 2592 .enable_bit = OMAP2430_EN_MDM_INTC_SHIFT,
2458 .recalc = &followparent_recalc, 2593 .recalc = &followparent_recalc,
@@ -2463,6 +2598,7 @@ static struct clk mmchsdb1_fck = {
2463 .id = 1, 2598 .id = 1,
2464 .parent = &func_32k_ck, 2599 .parent = &func_32k_ck,
2465 .flags = CLOCK_IN_OMAP243X, 2600 .flags = CLOCK_IN_OMAP243X,
2601 .clkdm_name = "core_l4_clkdm",
2466 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), 2602 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
2467 .enable_bit = OMAP2430_EN_MMCHSDB1_SHIFT, 2603 .enable_bit = OMAP2430_EN_MMCHSDB1_SHIFT,
2468 .recalc = &followparent_recalc, 2604 .recalc = &followparent_recalc,
@@ -2473,6 +2609,7 @@ static struct clk mmchsdb2_fck = {
2473 .id = 2, 2609 .id = 2,
2474 .parent = &func_32k_ck, 2610 .parent = &func_32k_ck,
2475 .flags = CLOCK_IN_OMAP243X, 2611 .flags = CLOCK_IN_OMAP243X,
2612 .clkdm_name = "core_l4_clkdm",
2476 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), 2613 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
2477 .enable_bit = OMAP2430_EN_MMCHSDB2_SHIFT, 2614 .enable_bit = OMAP2430_EN_MMCHSDB2_SHIFT,
2478 .recalc = &followparent_recalc, 2615 .recalc = &followparent_recalc,
@@ -2551,7 +2688,6 @@ static struct clk *onchip_24xx_clks[] __initdata = {
2551 &usb_l4_ick, 2688 &usb_l4_ick,
2552 /* L4 domain clocks */ 2689 /* L4 domain clocks */
2553 &l4_ck, /* used as both core_l4 and wu_l4 */ 2690 &l4_ck, /* used as both core_l4 and wu_l4 */
2554 &ssi_l4_ick,
2555 /* virtual meta-group clock */ 2691 /* virtual meta-group clock */
2556 &virt_prcm_set, 2692 &virt_prcm_set,
2557 /* general l4 interface ck, multi-parent functional clk */ 2693 /* general l4 interface ck, multi-parent functional clk */
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index e5b475f21081..084e11082f80 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -62,11 +62,14 @@ static void omap3_dpll_recalc(struct clk *clk)
62static void _omap3_dpll_write_clken(struct clk *clk, u8 clken_bits) 62static void _omap3_dpll_write_clken(struct clk *clk, u8 clken_bits)
63{ 63{
64 const struct dpll_data *dd; 64 const struct dpll_data *dd;
65 u32 v;
65 66
66 dd = clk->dpll_data; 67 dd = clk->dpll_data;
67 68
68 cm_rmw_reg_bits(dd->enable_mask, clken_bits << __ffs(dd->enable_mask), 69 v = __raw_readl(dd->control_reg);
69 dd->control_reg); 70 v &= ~dd->enable_mask;
71 v |= clken_bits << __ffs(dd->enable_mask);
72 __raw_writel(v, dd->control_reg);
70} 73}
71 74
72/* _omap3_wait_dpll_status: wait for a DPLL to enter a specific state */ 75/* _omap3_wait_dpll_status: wait for a DPLL to enter a specific state */
@@ -82,7 +85,7 @@ static int _omap3_wait_dpll_status(struct clk *clk, u8 state)
82 state <<= dd->idlest_bit; 85 state <<= dd->idlest_bit;
83 idlest_mask = 1 << dd->idlest_bit; 86 idlest_mask = 1 << dd->idlest_bit;
84 87
85 while (((cm_read_reg(dd->idlest_reg) & idlest_mask) != state) && 88 while (((__raw_readl(dd->idlest_reg) & idlest_mask) != state) &&
86 i < MAX_DPLL_WAIT_TRIES) { 89 i < MAX_DPLL_WAIT_TRIES) {
87 i++; 90 i++;
88 udelay(1); 91 udelay(1);
@@ -285,7 +288,7 @@ static u32 omap3_dpll_autoidle_read(struct clk *clk)
285 288
286 dd = clk->dpll_data; 289 dd = clk->dpll_data;
287 290
288 v = cm_read_reg(dd->autoidle_reg); 291 v = __raw_readl(dd->autoidle_reg);
289 v &= dd->autoidle_mask; 292 v &= dd->autoidle_mask;
290 v >>= __ffs(dd->autoidle_mask); 293 v >>= __ffs(dd->autoidle_mask);
291 294
@@ -304,6 +307,7 @@ static u32 omap3_dpll_autoidle_read(struct clk *clk)
304static void omap3_dpll_allow_idle(struct clk *clk) 307static void omap3_dpll_allow_idle(struct clk *clk)
305{ 308{
306 const struct dpll_data *dd; 309 const struct dpll_data *dd;
310 u32 v;
307 311
308 if (!clk || !clk->dpll_data) 312 if (!clk || !clk->dpll_data)
309 return; 313 return;
@@ -315,9 +319,10 @@ static void omap3_dpll_allow_idle(struct clk *clk)
315 * by writing 0x5 instead of 0x1. Add some mechanism to 319 * by writing 0x5 instead of 0x1. Add some mechanism to
316 * optionally enter this mode. 320 * optionally enter this mode.
317 */ 321 */
318 cm_rmw_reg_bits(dd->autoidle_mask, 322 v = __raw_readl(dd->autoidle_reg);
319 DPLL_AUTOIDLE_LOW_POWER_STOP << __ffs(dd->autoidle_mask), 323 v &= ~dd->autoidle_mask;
320 dd->autoidle_reg); 324 v |= DPLL_AUTOIDLE_LOW_POWER_STOP << __ffs(dd->autoidle_mask);
325 __raw_writel(v, dd->autoidle_reg);
321} 326}
322 327
323/** 328/**
@@ -329,15 +334,17 @@ static void omap3_dpll_allow_idle(struct clk *clk)
329static void omap3_dpll_deny_idle(struct clk *clk) 334static void omap3_dpll_deny_idle(struct clk *clk)
330{ 335{
331 const struct dpll_data *dd; 336 const struct dpll_data *dd;
337 u32 v;
332 338
333 if (!clk || !clk->dpll_data) 339 if (!clk || !clk->dpll_data)
334 return; 340 return;
335 341
336 dd = clk->dpll_data; 342 dd = clk->dpll_data;
337 343
338 cm_rmw_reg_bits(dd->autoidle_mask, 344 v = __raw_readl(dd->autoidle_reg);
339 DPLL_AUTOIDLE_DISABLE << __ffs(dd->autoidle_mask), 345 v &= ~dd->autoidle_mask;
340 dd->autoidle_reg); 346 v |= DPLL_AUTOIDLE_DISABLE << __ffs(dd->autoidle_mask);
347 __raw_writel(v, dd->autoidle_reg);
341} 348}
342 349
343/* Clock control for DPLL outputs */ 350/* Clock control for DPLL outputs */
@@ -482,8 +489,10 @@ int __init omap2_clk_init(void)
482 for (clkp = onchip_34xx_clks; 489 for (clkp = onchip_34xx_clks;
483 clkp < onchip_34xx_clks + ARRAY_SIZE(onchip_34xx_clks); 490 clkp < onchip_34xx_clks + ARRAY_SIZE(onchip_34xx_clks);
484 clkp++) { 491 clkp++) {
485 if ((*clkp)->flags & cpu_clkflg) 492 if ((*clkp)->flags & cpu_clkflg) {
486 clk_register(*clkp); 493 clk_register(*clkp);
494 omap2_init_clk_clkdm(*clkp);
495 }
487 } 496 }
488 497
489 /* REVISIT: Not yet ready for OMAP3 */ 498 /* REVISIT: Not yet ready for OMAP3 */
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index ec664457a11a..c38a8a09692f 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -478,7 +478,7 @@ static struct clk dpll3_m2_ck = {
478}; 478};
479 479
480static const struct clksel core_ck_clksel[] = { 480static const struct clksel core_ck_clksel[] = {
481 { .parent = &sys_ck, .rates = dpll_bypass_rates }, 481 { .parent = &sys_ck, .rates = dpll_bypass_rates },
482 { .parent = &dpll3_m2_ck, .rates = dpll_locked_rates }, 482 { .parent = &dpll3_m2_ck, .rates = dpll_locked_rates },
483 { .parent = NULL } 483 { .parent = NULL }
484}; 484};
@@ -495,7 +495,7 @@ static struct clk core_ck = {
495}; 495};
496 496
497static const struct clksel dpll3_m2x2_ck_clksel[] = { 497static const struct clksel dpll3_m2x2_ck_clksel[] = {
498 { .parent = &sys_ck, .rates = dpll_bypass_rates }, 498 { .parent = &sys_ck, .rates = dpll_bypass_rates },
499 { .parent = &dpll3_x2_ck, .rates = dpll_locked_rates }, 499 { .parent = &dpll3_x2_ck, .rates = dpll_locked_rates },
500 { .parent = NULL } 500 { .parent = NULL }
501}; 501};
@@ -541,7 +541,7 @@ static struct clk dpll3_m3x2_ck = {
541}; 541};
542 542
543static const struct clksel emu_core_alwon_ck_clksel[] = { 543static const struct clksel emu_core_alwon_ck_clksel[] = {
544 { .parent = &sys_ck, .rates = dpll_bypass_rates }, 544 { .parent = &sys_ck, .rates = dpll_bypass_rates },
545 { .parent = &dpll3_m3x2_ck, .rates = dpll_locked_rates }, 545 { .parent = &dpll3_m3x2_ck, .rates = dpll_locked_rates },
546 { .parent = NULL } 546 { .parent = NULL }
547}; 547};
@@ -633,7 +633,7 @@ static struct clk dpll4_m2x2_ck = {
633}; 633};
634 634
635static const struct clksel omap_96m_alwon_fck_clksel[] = { 635static const struct clksel omap_96m_alwon_fck_clksel[] = {
636 { .parent = &sys_ck, .rates = dpll_bypass_rates }, 636 { .parent = &sys_ck, .rates = dpll_bypass_rates },
637 { .parent = &dpll4_m2x2_ck, .rates = dpll_locked_rates }, 637 { .parent = &dpll4_m2x2_ck, .rates = dpll_locked_rates },
638 { .parent = NULL } 638 { .parent = NULL }
639}; 639};
@@ -659,7 +659,7 @@ static struct clk omap_96m_fck = {
659}; 659};
660 660
661static const struct clksel cm_96m_fck_clksel[] = { 661static const struct clksel cm_96m_fck_clksel[] = {
662 { .parent = &sys_ck, .rates = dpll_bypass_rates }, 662 { .parent = &sys_ck, .rates = dpll_bypass_rates },
663 { .parent = &dpll4_m2x2_ck, .rates = dpll_locked_rates }, 663 { .parent = &dpll4_m2x2_ck, .rates = dpll_locked_rates },
664 { .parent = NULL } 664 { .parent = NULL }
665}; 665};
@@ -701,7 +701,7 @@ static struct clk dpll4_m3x2_ck = {
701}; 701};
702 702
703static const struct clksel virt_omap_54m_fck_clksel[] = { 703static const struct clksel virt_omap_54m_fck_clksel[] = {
704 { .parent = &sys_ck, .rates = dpll_bypass_rates }, 704 { .parent = &sys_ck, .rates = dpll_bypass_rates },
705 { .parent = &dpll4_m3x2_ck, .rates = dpll_locked_rates }, 705 { .parent = &dpll4_m3x2_ck, .rates = dpll_locked_rates },
706 { .parent = NULL } 706 { .parent = NULL }
707}; 707};
@@ -911,7 +911,7 @@ static struct clk dpll5_m2_ck = {
911}; 911};
912 912
913static const struct clksel omap_120m_fck_clksel[] = { 913static const struct clksel omap_120m_fck_clksel[] = {
914 { .parent = &sys_ck, .rates = dpll_bypass_rates }, 914 { .parent = &sys_ck, .rates = dpll_bypass_rates },
915 { .parent = &dpll5_m2_ck, .rates = dpll_locked_rates }, 915 { .parent = &dpll5_m2_ck, .rates = dpll_locked_rates },
916 { .parent = NULL } 916 { .parent = NULL }
917}; 917};
@@ -919,13 +919,13 @@ static const struct clksel omap_120m_fck_clksel[] = {
919static struct clk omap_120m_fck = { 919static struct clk omap_120m_fck = {
920 .name = "omap_120m_fck", 920 .name = "omap_120m_fck",
921 .parent = &dpll5_m2_ck, 921 .parent = &dpll5_m2_ck,
922 .init = &omap2_init_clksel_parent, 922 .init = &omap2_init_clksel_parent,
923 .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST2), 923 .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST2),
924 .clksel_mask = OMAP3430ES2_ST_PERIPH2_CLK_MASK, 924 .clksel_mask = OMAP3430ES2_ST_PERIPH2_CLK_MASK,
925 .clksel = omap_120m_fck_clksel, 925 .clksel = omap_120m_fck_clksel,
926 .flags = CLOCK_IN_OMAP3430ES2 | RATE_PROPAGATES | 926 .flags = CLOCK_IN_OMAP3430ES2 | RATE_PROPAGATES |
927 PARENT_CONTROLS_CLOCK, 927 PARENT_CONTROLS_CLOCK,
928 .recalc = &omap2_clksel_recalc, 928 .recalc = &omap2_clksel_recalc,
929}; 929};
930 930
931/* CM EXTERNAL CLOCK OUTPUTS */ 931/* CM EXTERNAL CLOCK OUTPUTS */
@@ -1034,7 +1034,7 @@ static struct clk dpll1_fck = {
1034 * called 'dpll1_fck' 1034 * called 'dpll1_fck'
1035 */ 1035 */
1036static const struct clksel mpu_clksel[] = { 1036static const struct clksel mpu_clksel[] = {
1037 { .parent = &dpll1_fck, .rates = dpll_bypass_rates }, 1037 { .parent = &dpll1_fck, .rates = dpll_bypass_rates },
1038 { .parent = &dpll1_x2m2_ck, .rates = dpll_locked_rates }, 1038 { .parent = &dpll1_x2m2_ck, .rates = dpll_locked_rates },
1039 { .parent = NULL } 1039 { .parent = NULL }
1040}; 1040};
@@ -1048,6 +1048,7 @@ static struct clk mpu_ck = {
1048 .clksel = mpu_clksel, 1048 .clksel = mpu_clksel,
1049 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | 1049 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
1050 PARENT_CONTROLS_CLOCK, 1050 PARENT_CONTROLS_CLOCK,
1051 .clkdm_name = "mpu_clkdm",
1051 .recalc = &omap2_clksel_recalc, 1052 .recalc = &omap2_clksel_recalc,
1052}; 1053};
1053 1054
@@ -1075,6 +1076,8 @@ static struct clk arm_fck = {
1075 .recalc = &omap2_clksel_recalc, 1076 .recalc = &omap2_clksel_recalc,
1076}; 1077};
1077 1078
1079/* XXX What about neon_clkdm ? */
1080
1078/* 1081/*
1079 * REVISIT: This clock is never specifically defined in the 3430 TRM, 1082 * REVISIT: This clock is never specifically defined in the 3430 TRM,
1080 * although it is referenced - so this is a guess 1083 * although it is referenced - so this is a guess
@@ -1107,7 +1110,7 @@ static struct clk dpll2_fck = {
1107 */ 1110 */
1108 1111
1109static const struct clksel iva2_clksel[] = { 1112static const struct clksel iva2_clksel[] = {
1110 { .parent = &dpll2_fck, .rates = dpll_bypass_rates }, 1113 { .parent = &dpll2_fck, .rates = dpll_bypass_rates },
1111 { .parent = &dpll2_m2_ck, .rates = dpll_locked_rates }, 1114 { .parent = &dpll2_m2_ck, .rates = dpll_locked_rates },
1112 { .parent = NULL } 1115 { .parent = NULL }
1113}; 1116};
@@ -1123,6 +1126,7 @@ static struct clk iva2_ck = {
1123 .clksel_mask = OMAP3430_ST_IVA2_CLK_MASK, 1126 .clksel_mask = OMAP3430_ST_IVA2_CLK_MASK,
1124 .clksel = iva2_clksel, 1127 .clksel = iva2_clksel,
1125 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES, 1128 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES,
1129 .clkdm_name = "iva2_clkdm",
1126 .recalc = &omap2_clksel_recalc, 1130 .recalc = &omap2_clksel_recalc,
1127}; 1131};
1128 1132
@@ -1137,6 +1141,7 @@ static struct clk l3_ick = {
1137 .clksel = div2_core_clksel, 1141 .clksel = div2_core_clksel,
1138 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | 1142 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
1139 PARENT_CONTROLS_CLOCK, 1143 PARENT_CONTROLS_CLOCK,
1144 .clkdm_name = "core_l3_clkdm",
1140 .recalc = &omap2_clksel_recalc, 1145 .recalc = &omap2_clksel_recalc,
1141}; 1146};
1142 1147
@@ -1154,6 +1159,7 @@ static struct clk l4_ick = {
1154 .clksel = div2_l3_clksel, 1159 .clksel = div2_l3_clksel,
1155 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | 1160 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
1156 PARENT_CONTROLS_CLOCK, 1161 PARENT_CONTROLS_CLOCK,
1162 .clkdm_name = "core_l4_clkdm",
1157 .recalc = &omap2_clksel_recalc, 1163 .recalc = &omap2_clksel_recalc,
1158 1164
1159}; 1165};
@@ -1183,43 +1189,57 @@ static const struct clksel gfx_l3_clksel[] = {
1183 { .parent = NULL } 1189 { .parent = NULL }
1184}; 1190};
1185 1191
1186static struct clk gfx_l3_fck = { 1192/* Virtual parent clock for gfx_l3_ick and gfx_l3_fck */
1187 .name = "gfx_l3_fck", 1193static struct clk gfx_l3_ck = {
1194 .name = "gfx_l3_ck",
1188 .parent = &l3_ick, 1195 .parent = &l3_ick,
1189 .init = &omap2_init_clksel_parent, 1196 .init = &omap2_init_clksel_parent,
1190 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN), 1197 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN),
1191 .enable_bit = OMAP_EN_GFX_SHIFT, 1198 .enable_bit = OMAP_EN_GFX_SHIFT,
1199 .flags = CLOCK_IN_OMAP3430ES1,
1200 .recalc = &followparent_recalc,
1201};
1202
1203static struct clk gfx_l3_fck = {
1204 .name = "gfx_l3_fck",
1205 .parent = &gfx_l3_ck,
1206 .init = &omap2_init_clksel_parent,
1192 .clksel_reg = OMAP_CM_REGADDR(GFX_MOD, CM_CLKSEL), 1207 .clksel_reg = OMAP_CM_REGADDR(GFX_MOD, CM_CLKSEL),
1193 .clksel_mask = OMAP_CLKSEL_GFX_MASK, 1208 .clksel_mask = OMAP_CLKSEL_GFX_MASK,
1194 .clksel = gfx_l3_clksel, 1209 .clksel = gfx_l3_clksel,
1195 .flags = CLOCK_IN_OMAP3430ES1 | RATE_PROPAGATES, 1210 .flags = CLOCK_IN_OMAP3430ES1 | RATE_PROPAGATES |
1211 PARENT_CONTROLS_CLOCK,
1212 .clkdm_name = "gfx_3430es1_clkdm",
1196 .recalc = &omap2_clksel_recalc, 1213 .recalc = &omap2_clksel_recalc,
1197}; 1214};
1198 1215
1199static struct clk gfx_l3_ick = { 1216static struct clk gfx_l3_ick = {
1200 .name = "gfx_l3_ick", 1217 .name = "gfx_l3_ick",
1201 .parent = &l3_ick, 1218 .parent = &gfx_l3_ck,
1202 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN), 1219 .flags = CLOCK_IN_OMAP3430ES1 | PARENT_CONTROLS_CLOCK,
1203 .enable_bit = OMAP_EN_GFX_SHIFT, 1220 .clkdm_name = "gfx_3430es1_clkdm",
1204 .flags = CLOCK_IN_OMAP3430ES1,
1205 .recalc = &followparent_recalc, 1221 .recalc = &followparent_recalc,
1206}; 1222};
1207 1223
1208static struct clk gfx_cg1_ck = { 1224static struct clk gfx_cg1_ck = {
1209 .name = "gfx_cg1_ck", 1225 .name = "gfx_cg1_ck",
1210 .parent = &gfx_l3_fck, /* REVISIT: correct? */ 1226 .parent = &gfx_l3_fck, /* REVISIT: correct? */
1227 .init = &omap2_init_clk_clkdm,
1211 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN), 1228 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN),
1212 .enable_bit = OMAP3430ES1_EN_2D_SHIFT, 1229 .enable_bit = OMAP3430ES1_EN_2D_SHIFT,
1213 .flags = CLOCK_IN_OMAP3430ES1, 1230 .flags = CLOCK_IN_OMAP3430ES1,
1231 .clkdm_name = "gfx_3430es1_clkdm",
1214 .recalc = &followparent_recalc, 1232 .recalc = &followparent_recalc,
1215}; 1233};
1216 1234
1217static struct clk gfx_cg2_ck = { 1235static struct clk gfx_cg2_ck = {
1218 .name = "gfx_cg2_ck", 1236 .name = "gfx_cg2_ck",
1219 .parent = &gfx_l3_fck, /* REVISIT: correct? */ 1237 .parent = &gfx_l3_fck, /* REVISIT: correct? */
1238 .init = &omap2_init_clk_clkdm,
1220 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN), 1239 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN),
1221 .enable_bit = OMAP3430ES1_EN_3D_SHIFT, 1240 .enable_bit = OMAP3430ES1_EN_3D_SHIFT,
1222 .flags = CLOCK_IN_OMAP3430ES1, 1241 .flags = CLOCK_IN_OMAP3430ES1,
1242 .clkdm_name = "gfx_3430es1_clkdm",
1223 .recalc = &followparent_recalc, 1243 .recalc = &followparent_recalc,
1224}; 1244};
1225 1245
@@ -1252,15 +1272,18 @@ static struct clk sgx_fck = {
1252 .clksel_mask = OMAP3430ES2_CLKSEL_SGX_MASK, 1272 .clksel_mask = OMAP3430ES2_CLKSEL_SGX_MASK,
1253 .clksel = sgx_clksel, 1273 .clksel = sgx_clksel,
1254 .flags = CLOCK_IN_OMAP3430ES2, 1274 .flags = CLOCK_IN_OMAP3430ES2,
1275 .clkdm_name = "sgx_clkdm",
1255 .recalc = &omap2_clksel_recalc, 1276 .recalc = &omap2_clksel_recalc,
1256}; 1277};
1257 1278
1258static struct clk sgx_ick = { 1279static struct clk sgx_ick = {
1259 .name = "sgx_ick", 1280 .name = "sgx_ick",
1260 .parent = &l3_ick, 1281 .parent = &l3_ick,
1282 .init = &omap2_init_clk_clkdm,
1261 .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_ICLKEN), 1283 .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_ICLKEN),
1262 .enable_bit = OMAP3430ES2_EN_SGX_SHIFT, 1284 .enable_bit = OMAP3430ES2_EN_SGX_SHIFT,
1263 .flags = CLOCK_IN_OMAP3430ES2, 1285 .flags = CLOCK_IN_OMAP3430ES2,
1286 .clkdm_name = "sgx_clkdm",
1264 .recalc = &followparent_recalc, 1287 .recalc = &followparent_recalc,
1265}; 1288};
1266 1289
@@ -1269,9 +1292,11 @@ static struct clk sgx_ick = {
1269static struct clk d2d_26m_fck = { 1292static struct clk d2d_26m_fck = {
1270 .name = "d2d_26m_fck", 1293 .name = "d2d_26m_fck",
1271 .parent = &sys_ck, 1294 .parent = &sys_ck,
1295 .init = &omap2_init_clk_clkdm,
1272 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1296 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1273 .enable_bit = OMAP3430ES1_EN_D2D_SHIFT, 1297 .enable_bit = OMAP3430ES1_EN_D2D_SHIFT,
1274 .flags = CLOCK_IN_OMAP3430ES1, 1298 .flags = CLOCK_IN_OMAP3430ES1,
1299 .clkdm_name = "d2d_clkdm",
1275 .recalc = &followparent_recalc, 1300 .recalc = &followparent_recalc,
1276}; 1301};
1277 1302
@@ -1291,6 +1316,7 @@ static struct clk gpt10_fck = {
1291 .clksel_mask = OMAP3430_CLKSEL_GPT10_MASK, 1316 .clksel_mask = OMAP3430_CLKSEL_GPT10_MASK,
1292 .clksel = omap343x_gpt_clksel, 1317 .clksel = omap343x_gpt_clksel,
1293 .flags = CLOCK_IN_OMAP343X, 1318 .flags = CLOCK_IN_OMAP343X,
1319 .clkdm_name = "core_l4_clkdm",
1294 .recalc = &omap2_clksel_recalc, 1320 .recalc = &omap2_clksel_recalc,
1295}; 1321};
1296 1322
@@ -1304,6 +1330,7 @@ static struct clk gpt11_fck = {
1304 .clksel_mask = OMAP3430_CLKSEL_GPT11_MASK, 1330 .clksel_mask = OMAP3430_CLKSEL_GPT11_MASK,
1305 .clksel = omap343x_gpt_clksel, 1331 .clksel = omap343x_gpt_clksel,
1306 .flags = CLOCK_IN_OMAP343X, 1332 .flags = CLOCK_IN_OMAP343X,
1333 .clkdm_name = "core_l4_clkdm",
1307 .recalc = &omap2_clksel_recalc, 1334 .recalc = &omap2_clksel_recalc,
1308}; 1335};
1309 1336
@@ -1341,6 +1368,7 @@ static struct clk core_96m_fck = {
1341 .parent = &omap_96m_fck, 1368 .parent = &omap_96m_fck,
1342 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | 1369 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
1343 PARENT_CONTROLS_CLOCK, 1370 PARENT_CONTROLS_CLOCK,
1371 .clkdm_name = "core_l4_clkdm",
1344 .recalc = &followparent_recalc, 1372 .recalc = &followparent_recalc,
1345}; 1373};
1346 1374
@@ -1351,6 +1379,7 @@ static struct clk mmchs3_fck = {
1351 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1379 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1352 .enable_bit = OMAP3430ES2_EN_MMC3_SHIFT, 1380 .enable_bit = OMAP3430ES2_EN_MMC3_SHIFT,
1353 .flags = CLOCK_IN_OMAP3430ES2, 1381 .flags = CLOCK_IN_OMAP3430ES2,
1382 .clkdm_name = "core_l4_clkdm",
1354 .recalc = &followparent_recalc, 1383 .recalc = &followparent_recalc,
1355}; 1384};
1356 1385
@@ -1361,6 +1390,7 @@ static struct clk mmchs2_fck = {
1361 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1390 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1362 .enable_bit = OMAP3430_EN_MMC2_SHIFT, 1391 .enable_bit = OMAP3430_EN_MMC2_SHIFT,
1363 .flags = CLOCK_IN_OMAP343X, 1392 .flags = CLOCK_IN_OMAP343X,
1393 .clkdm_name = "core_l4_clkdm",
1364 .recalc = &followparent_recalc, 1394 .recalc = &followparent_recalc,
1365}; 1395};
1366 1396
@@ -1370,6 +1400,7 @@ static struct clk mspro_fck = {
1370 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1400 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1371 .enable_bit = OMAP3430_EN_MSPRO_SHIFT, 1401 .enable_bit = OMAP3430_EN_MSPRO_SHIFT,
1372 .flags = CLOCK_IN_OMAP343X, 1402 .flags = CLOCK_IN_OMAP343X,
1403 .clkdm_name = "core_l4_clkdm",
1373 .recalc = &followparent_recalc, 1404 .recalc = &followparent_recalc,
1374}; 1405};
1375 1406
@@ -1380,6 +1411,7 @@ static struct clk mmchs1_fck = {
1380 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1411 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1381 .enable_bit = OMAP3430_EN_MMC1_SHIFT, 1412 .enable_bit = OMAP3430_EN_MMC1_SHIFT,
1382 .flags = CLOCK_IN_OMAP343X, 1413 .flags = CLOCK_IN_OMAP343X,
1414 .clkdm_name = "core_l4_clkdm",
1383 .recalc = &followparent_recalc, 1415 .recalc = &followparent_recalc,
1384}; 1416};
1385 1417
@@ -1390,16 +1422,18 @@ static struct clk i2c3_fck = {
1390 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1422 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1391 .enable_bit = OMAP3430_EN_I2C3_SHIFT, 1423 .enable_bit = OMAP3430_EN_I2C3_SHIFT,
1392 .flags = CLOCK_IN_OMAP343X, 1424 .flags = CLOCK_IN_OMAP343X,
1425 .clkdm_name = "core_l4_clkdm",
1393 .recalc = &followparent_recalc, 1426 .recalc = &followparent_recalc,
1394}; 1427};
1395 1428
1396static struct clk i2c2_fck = { 1429static struct clk i2c2_fck = {
1397 .name = "i2c_fck", 1430 .name = "i2c_fck",
1398 .id = 2, 1431 .id = 2,
1399 .parent = &core_96m_fck, 1432 .parent = &core_96m_fck,
1400 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1433 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1401 .enable_bit = OMAP3430_EN_I2C2_SHIFT, 1434 .enable_bit = OMAP3430_EN_I2C2_SHIFT,
1402 .flags = CLOCK_IN_OMAP343X, 1435 .flags = CLOCK_IN_OMAP343X,
1436 .clkdm_name = "core_l4_clkdm",
1403 .recalc = &followparent_recalc, 1437 .recalc = &followparent_recalc,
1404}; 1438};
1405 1439
@@ -1410,6 +1444,7 @@ static struct clk i2c1_fck = {
1410 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), 1444 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1411 .enable_bit = OMAP3430_EN_I2C1_SHIFT, 1445 .enable_bit = OMAP3430_EN_I2C1_SHIFT,
1412 .flags = CLOCK_IN_OMAP343X, 1446 .flags = CLOCK_IN_OMAP343X,
1447 .clkdm_name = "core_l4_clkdm",
1413 .recalc = &followparent_recalc, 1448 .recalc = &followparent_recalc,
1414}; 1449};
1415 1450
@@ -1443,6 +1478,7 @@ static struct clk mcbsp5_fck = {
1443 .clksel_mask = OMAP2_MCBSP5_CLKS_MASK, 1478 .clksel_mask = OMAP2_MCBSP5_CLKS_MASK,
1444 .clksel = mcbsp_15_clksel, 1479 .clksel = mcbsp_15_clksel,
1445 .flags = CLOCK_IN_OMAP343X, 1480 .flags = CLOCK_IN_OMAP343X,
1481 .clkdm_name = "core_l4_clkdm",
1446 .recalc = &omap2_clksel_recalc, 1482 .recalc = &omap2_clksel_recalc,
1447}; 1483};
1448 1484
@@ -1456,6 +1492,7 @@ static struct clk mcbsp1_fck = {
1456 .clksel_mask = OMAP2_MCBSP1_CLKS_MASK, 1492 .clksel_mask = OMAP2_MCBSP1_CLKS_MASK,
1457 .clksel = mcbsp_15_clksel, 1493 .clksel = mcbsp_15_clksel,
1458 .flags = CLOCK_IN_OMAP343X, 1494 .flags = CLOCK_IN_OMAP343X,
1495 .clkdm_name = "core_l4_clkdm",
1459 .recalc = &omap2_clksel_recalc, 1496 .recalc = &omap2_clksel_recalc,
1460}; 1497};
1461 1498
@@ -1466,6 +1503,7 @@ static struct clk core_48m_fck = {
1466 .parent = &omap_48m_fck, 1503 .parent = &omap_48m_fck,
1467 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | 1504 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
1468 PARENT_CONTROLS_CLOCK, 1505 PARENT_CONTROLS_CLOCK,
1506 .clkdm_name = "core_l4_clkdm",
1469 .recalc = &followparent_recalc, 1507 .recalc = &followparent_recalc,
1470}; 1508};
1471 1509
@@ -1543,6 +1581,7 @@ static struct clk core_12m_fck = {
1543 .parent = &omap_12m_fck, 1581 .parent = &omap_12m_fck,
1544 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | 1582 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
1545 PARENT_CONTROLS_CLOCK, 1583 PARENT_CONTROLS_CLOCK,
1584 .clkdm_name = "core_l4_clkdm",
1546 .recalc = &followparent_recalc, 1585 .recalc = &followparent_recalc,
1547}; 1586};
1548 1587
@@ -1581,6 +1620,7 @@ static struct clk ssi_ssr_fck = {
1581 .clksel_mask = OMAP3430_CLKSEL_SSI_MASK, 1620 .clksel_mask = OMAP3430_CLKSEL_SSI_MASK,
1582 .clksel = ssi_ssr_clksel, 1621 .clksel = ssi_ssr_clksel,
1583 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES, 1622 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES,
1623 .clkdm_name = "core_l4_clkdm",
1584 .recalc = &omap2_clksel_recalc, 1624 .recalc = &omap2_clksel_recalc,
1585}; 1625};
1586 1626
@@ -1596,11 +1636,17 @@ static struct clk ssi_sst_fck = {
1596 1636
1597/* CORE_L3_ICK based clocks */ 1637/* CORE_L3_ICK based clocks */
1598 1638
1639/*
1640 * XXX must add clk_enable/clk_disable for these if standard code won't
1641 * handle it
1642 */
1599static struct clk core_l3_ick = { 1643static struct clk core_l3_ick = {
1600 .name = "core_l3_ick", 1644 .name = "core_l3_ick",
1601 .parent = &l3_ick, 1645 .parent = &l3_ick,
1646 .init = &omap2_init_clk_clkdm,
1602 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | 1647 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
1603 PARENT_CONTROLS_CLOCK, 1648 PARENT_CONTROLS_CLOCK,
1649 .clkdm_name = "core_l3_clkdm",
1604 .recalc = &followparent_recalc, 1650 .recalc = &followparent_recalc,
1605}; 1651};
1606 1652
@@ -1610,6 +1656,7 @@ static struct clk hsotgusb_ick = {
1610 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1656 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1611 .enable_bit = OMAP3430_EN_HSOTGUSB_SHIFT, 1657 .enable_bit = OMAP3430_EN_HSOTGUSB_SHIFT,
1612 .flags = CLOCK_IN_OMAP343X, 1658 .flags = CLOCK_IN_OMAP343X,
1659 .clkdm_name = "core_l3_clkdm",
1613 .recalc = &followparent_recalc, 1660 .recalc = &followparent_recalc,
1614}; 1661};
1615 1662
@@ -1619,6 +1666,7 @@ static struct clk sdrc_ick = {
1619 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1666 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1620 .enable_bit = OMAP3430_EN_SDRC_SHIFT, 1667 .enable_bit = OMAP3430_EN_SDRC_SHIFT,
1621 .flags = CLOCK_IN_OMAP343X | ENABLE_ON_INIT, 1668 .flags = CLOCK_IN_OMAP343X | ENABLE_ON_INIT,
1669 .clkdm_name = "core_l3_clkdm",
1622 .recalc = &followparent_recalc, 1670 .recalc = &followparent_recalc,
1623}; 1671};
1624 1672
@@ -1627,6 +1675,7 @@ static struct clk gpmc_fck = {
1627 .parent = &core_l3_ick, 1675 .parent = &core_l3_ick,
1628 .flags = CLOCK_IN_OMAP343X | PARENT_CONTROLS_CLOCK | 1676 .flags = CLOCK_IN_OMAP343X | PARENT_CONTROLS_CLOCK |
1629 ENABLE_ON_INIT, 1677 ENABLE_ON_INIT,
1678 .clkdm_name = "core_l3_clkdm",
1630 .recalc = &followparent_recalc, 1679 .recalc = &followparent_recalc,
1631}; 1680};
1632 1681
@@ -1654,8 +1703,10 @@ static struct clk pka_ick = {
1654static struct clk core_l4_ick = { 1703static struct clk core_l4_ick = {
1655 .name = "core_l4_ick", 1704 .name = "core_l4_ick",
1656 .parent = &l4_ick, 1705 .parent = &l4_ick,
1706 .init = &omap2_init_clk_clkdm,
1657 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | 1707 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
1658 PARENT_CONTROLS_CLOCK, 1708 PARENT_CONTROLS_CLOCK,
1709 .clkdm_name = "core_l4_clkdm",
1659 .recalc = &followparent_recalc, 1710 .recalc = &followparent_recalc,
1660}; 1711};
1661 1712
@@ -1665,6 +1716,7 @@ static struct clk usbtll_ick = {
1665 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN3), 1716 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN3),
1666 .enable_bit = OMAP3430ES2_EN_USBTLL_SHIFT, 1717 .enable_bit = OMAP3430ES2_EN_USBTLL_SHIFT,
1667 .flags = CLOCK_IN_OMAP3430ES2, 1718 .flags = CLOCK_IN_OMAP3430ES2,
1719 .clkdm_name = "core_l4_clkdm",
1668 .recalc = &followparent_recalc, 1720 .recalc = &followparent_recalc,
1669}; 1721};
1670 1722
@@ -1675,6 +1727,7 @@ static struct clk mmchs3_ick = {
1675 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1727 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1676 .enable_bit = OMAP3430ES2_EN_MMC3_SHIFT, 1728 .enable_bit = OMAP3430ES2_EN_MMC3_SHIFT,
1677 .flags = CLOCK_IN_OMAP3430ES2, 1729 .flags = CLOCK_IN_OMAP3430ES2,
1730 .clkdm_name = "core_l4_clkdm",
1678 .recalc = &followparent_recalc, 1731 .recalc = &followparent_recalc,
1679}; 1732};
1680 1733
@@ -1685,6 +1738,7 @@ static struct clk icr_ick = {
1685 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1738 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1686 .enable_bit = OMAP3430_EN_ICR_SHIFT, 1739 .enable_bit = OMAP3430_EN_ICR_SHIFT,
1687 .flags = CLOCK_IN_OMAP343X, 1740 .flags = CLOCK_IN_OMAP343X,
1741 .clkdm_name = "core_l4_clkdm",
1688 .recalc = &followparent_recalc, 1742 .recalc = &followparent_recalc,
1689}; 1743};
1690 1744
@@ -1694,6 +1748,7 @@ static struct clk aes2_ick = {
1694 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1748 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1695 .enable_bit = OMAP3430_EN_AES2_SHIFT, 1749 .enable_bit = OMAP3430_EN_AES2_SHIFT,
1696 .flags = CLOCK_IN_OMAP343X, 1750 .flags = CLOCK_IN_OMAP343X,
1751 .clkdm_name = "core_l4_clkdm",
1697 .recalc = &followparent_recalc, 1752 .recalc = &followparent_recalc,
1698}; 1753};
1699 1754
@@ -1703,6 +1758,7 @@ static struct clk sha12_ick = {
1703 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1758 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1704 .enable_bit = OMAP3430_EN_SHA12_SHIFT, 1759 .enable_bit = OMAP3430_EN_SHA12_SHIFT,
1705 .flags = CLOCK_IN_OMAP343X, 1760 .flags = CLOCK_IN_OMAP343X,
1761 .clkdm_name = "core_l4_clkdm",
1706 .recalc = &followparent_recalc, 1762 .recalc = &followparent_recalc,
1707}; 1763};
1708 1764
@@ -1712,6 +1768,7 @@ static struct clk des2_ick = {
1712 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1768 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1713 .enable_bit = OMAP3430_EN_DES2_SHIFT, 1769 .enable_bit = OMAP3430_EN_DES2_SHIFT,
1714 .flags = CLOCK_IN_OMAP343X, 1770 .flags = CLOCK_IN_OMAP343X,
1771 .clkdm_name = "core_l4_clkdm",
1715 .recalc = &followparent_recalc, 1772 .recalc = &followparent_recalc,
1716}; 1773};
1717 1774
@@ -1722,6 +1779,7 @@ static struct clk mmchs2_ick = {
1722 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1779 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1723 .enable_bit = OMAP3430_EN_MMC2_SHIFT, 1780 .enable_bit = OMAP3430_EN_MMC2_SHIFT,
1724 .flags = CLOCK_IN_OMAP343X, 1781 .flags = CLOCK_IN_OMAP343X,
1782 .clkdm_name = "core_l4_clkdm",
1725 .recalc = &followparent_recalc, 1783 .recalc = &followparent_recalc,
1726}; 1784};
1727 1785
@@ -1732,6 +1790,7 @@ static struct clk mmchs1_ick = {
1732 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1790 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1733 .enable_bit = OMAP3430_EN_MMC1_SHIFT, 1791 .enable_bit = OMAP3430_EN_MMC1_SHIFT,
1734 .flags = CLOCK_IN_OMAP343X, 1792 .flags = CLOCK_IN_OMAP343X,
1793 .clkdm_name = "core_l4_clkdm",
1735 .recalc = &followparent_recalc, 1794 .recalc = &followparent_recalc,
1736}; 1795};
1737 1796
@@ -1741,6 +1800,7 @@ static struct clk mspro_ick = {
1741 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1800 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1742 .enable_bit = OMAP3430_EN_MSPRO_SHIFT, 1801 .enable_bit = OMAP3430_EN_MSPRO_SHIFT,
1743 .flags = CLOCK_IN_OMAP343X, 1802 .flags = CLOCK_IN_OMAP343X,
1803 .clkdm_name = "core_l4_clkdm",
1744 .recalc = &followparent_recalc, 1804 .recalc = &followparent_recalc,
1745}; 1805};
1746 1806
@@ -1750,6 +1810,7 @@ static struct clk hdq_ick = {
1750 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1810 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1751 .enable_bit = OMAP3430_EN_HDQ_SHIFT, 1811 .enable_bit = OMAP3430_EN_HDQ_SHIFT,
1752 .flags = CLOCK_IN_OMAP343X, 1812 .flags = CLOCK_IN_OMAP343X,
1813 .clkdm_name = "core_l4_clkdm",
1753 .recalc = &followparent_recalc, 1814 .recalc = &followparent_recalc,
1754}; 1815};
1755 1816
@@ -1760,6 +1821,7 @@ static struct clk mcspi4_ick = {
1760 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1821 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1761 .enable_bit = OMAP3430_EN_MCSPI4_SHIFT, 1822 .enable_bit = OMAP3430_EN_MCSPI4_SHIFT,
1762 .flags = CLOCK_IN_OMAP343X, 1823 .flags = CLOCK_IN_OMAP343X,
1824 .clkdm_name = "core_l4_clkdm",
1763 .recalc = &followparent_recalc, 1825 .recalc = &followparent_recalc,
1764}; 1826};
1765 1827
@@ -1770,6 +1832,7 @@ static struct clk mcspi3_ick = {
1770 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1832 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1771 .enable_bit = OMAP3430_EN_MCSPI3_SHIFT, 1833 .enable_bit = OMAP3430_EN_MCSPI3_SHIFT,
1772 .flags = CLOCK_IN_OMAP343X, 1834 .flags = CLOCK_IN_OMAP343X,
1835 .clkdm_name = "core_l4_clkdm",
1773 .recalc = &followparent_recalc, 1836 .recalc = &followparent_recalc,
1774}; 1837};
1775 1838
@@ -1780,6 +1843,7 @@ static struct clk mcspi2_ick = {
1780 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1843 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1781 .enable_bit = OMAP3430_EN_MCSPI2_SHIFT, 1844 .enable_bit = OMAP3430_EN_MCSPI2_SHIFT,
1782 .flags = CLOCK_IN_OMAP343X, 1845 .flags = CLOCK_IN_OMAP343X,
1846 .clkdm_name = "core_l4_clkdm",
1783 .recalc = &followparent_recalc, 1847 .recalc = &followparent_recalc,
1784}; 1848};
1785 1849
@@ -1790,6 +1854,7 @@ static struct clk mcspi1_ick = {
1790 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1854 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1791 .enable_bit = OMAP3430_EN_MCSPI1_SHIFT, 1855 .enable_bit = OMAP3430_EN_MCSPI1_SHIFT,
1792 .flags = CLOCK_IN_OMAP343X, 1856 .flags = CLOCK_IN_OMAP343X,
1857 .clkdm_name = "core_l4_clkdm",
1793 .recalc = &followparent_recalc, 1858 .recalc = &followparent_recalc,
1794}; 1859};
1795 1860
@@ -1800,6 +1865,7 @@ static struct clk i2c3_ick = {
1800 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1865 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1801 .enable_bit = OMAP3430_EN_I2C3_SHIFT, 1866 .enable_bit = OMAP3430_EN_I2C3_SHIFT,
1802 .flags = CLOCK_IN_OMAP343X, 1867 .flags = CLOCK_IN_OMAP343X,
1868 .clkdm_name = "core_l4_clkdm",
1803 .recalc = &followparent_recalc, 1869 .recalc = &followparent_recalc,
1804}; 1870};
1805 1871
@@ -1810,6 +1876,7 @@ static struct clk i2c2_ick = {
1810 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1876 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1811 .enable_bit = OMAP3430_EN_I2C2_SHIFT, 1877 .enable_bit = OMAP3430_EN_I2C2_SHIFT,
1812 .flags = CLOCK_IN_OMAP343X, 1878 .flags = CLOCK_IN_OMAP343X,
1879 .clkdm_name = "core_l4_clkdm",
1813 .recalc = &followparent_recalc, 1880 .recalc = &followparent_recalc,
1814}; 1881};
1815 1882
@@ -1820,6 +1887,7 @@ static struct clk i2c1_ick = {
1820 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1887 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1821 .enable_bit = OMAP3430_EN_I2C1_SHIFT, 1888 .enable_bit = OMAP3430_EN_I2C1_SHIFT,
1822 .flags = CLOCK_IN_OMAP343X, 1889 .flags = CLOCK_IN_OMAP343X,
1890 .clkdm_name = "core_l4_clkdm",
1823 .recalc = &followparent_recalc, 1891 .recalc = &followparent_recalc,
1824}; 1892};
1825 1893
@@ -1829,6 +1897,7 @@ static struct clk uart2_ick = {
1829 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1897 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1830 .enable_bit = OMAP3430_EN_UART2_SHIFT, 1898 .enable_bit = OMAP3430_EN_UART2_SHIFT,
1831 .flags = CLOCK_IN_OMAP343X, 1899 .flags = CLOCK_IN_OMAP343X,
1900 .clkdm_name = "core_l4_clkdm",
1832 .recalc = &followparent_recalc, 1901 .recalc = &followparent_recalc,
1833}; 1902};
1834 1903
@@ -1838,6 +1907,7 @@ static struct clk uart1_ick = {
1838 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1907 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1839 .enable_bit = OMAP3430_EN_UART1_SHIFT, 1908 .enable_bit = OMAP3430_EN_UART1_SHIFT,
1840 .flags = CLOCK_IN_OMAP343X, 1909 .flags = CLOCK_IN_OMAP343X,
1910 .clkdm_name = "core_l4_clkdm",
1841 .recalc = &followparent_recalc, 1911 .recalc = &followparent_recalc,
1842}; 1912};
1843 1913
@@ -1847,6 +1917,7 @@ static struct clk gpt11_ick = {
1847 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1917 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1848 .enable_bit = OMAP3430_EN_GPT11_SHIFT, 1918 .enable_bit = OMAP3430_EN_GPT11_SHIFT,
1849 .flags = CLOCK_IN_OMAP343X, 1919 .flags = CLOCK_IN_OMAP343X,
1920 .clkdm_name = "core_l4_clkdm",
1850 .recalc = &followparent_recalc, 1921 .recalc = &followparent_recalc,
1851}; 1922};
1852 1923
@@ -1856,6 +1927,7 @@ static struct clk gpt10_ick = {
1856 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1927 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1857 .enable_bit = OMAP3430_EN_GPT10_SHIFT, 1928 .enable_bit = OMAP3430_EN_GPT10_SHIFT,
1858 .flags = CLOCK_IN_OMAP343X, 1929 .flags = CLOCK_IN_OMAP343X,
1930 .clkdm_name = "core_l4_clkdm",
1859 .recalc = &followparent_recalc, 1931 .recalc = &followparent_recalc,
1860}; 1932};
1861 1933
@@ -1866,6 +1938,7 @@ static struct clk mcbsp5_ick = {
1866 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1938 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1867 .enable_bit = OMAP3430_EN_MCBSP5_SHIFT, 1939 .enable_bit = OMAP3430_EN_MCBSP5_SHIFT,
1868 .flags = CLOCK_IN_OMAP343X, 1940 .flags = CLOCK_IN_OMAP343X,
1941 .clkdm_name = "core_l4_clkdm",
1869 .recalc = &followparent_recalc, 1942 .recalc = &followparent_recalc,
1870}; 1943};
1871 1944
@@ -1876,6 +1949,7 @@ static struct clk mcbsp1_ick = {
1876 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1949 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1877 .enable_bit = OMAP3430_EN_MCBSP1_SHIFT, 1950 .enable_bit = OMAP3430_EN_MCBSP1_SHIFT,
1878 .flags = CLOCK_IN_OMAP343X, 1951 .flags = CLOCK_IN_OMAP343X,
1952 .clkdm_name = "core_l4_clkdm",
1879 .recalc = &followparent_recalc, 1953 .recalc = &followparent_recalc,
1880}; 1954};
1881 1955
@@ -1885,6 +1959,7 @@ static struct clk fac_ick = {
1885 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1959 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1886 .enable_bit = OMAP3430ES1_EN_FAC_SHIFT, 1960 .enable_bit = OMAP3430ES1_EN_FAC_SHIFT,
1887 .flags = CLOCK_IN_OMAP3430ES1, 1961 .flags = CLOCK_IN_OMAP3430ES1,
1962 .clkdm_name = "core_l4_clkdm",
1888 .recalc = &followparent_recalc, 1963 .recalc = &followparent_recalc,
1889}; 1964};
1890 1965
@@ -1894,6 +1969,7 @@ static struct clk mailboxes_ick = {
1894 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1969 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1895 .enable_bit = OMAP3430_EN_MAILBOXES_SHIFT, 1970 .enable_bit = OMAP3430_EN_MAILBOXES_SHIFT,
1896 .flags = CLOCK_IN_OMAP343X, 1971 .flags = CLOCK_IN_OMAP343X,
1972 .clkdm_name = "core_l4_clkdm",
1897 .recalc = &followparent_recalc, 1973 .recalc = &followparent_recalc,
1898}; 1974};
1899 1975
@@ -1913,6 +1989,7 @@ static struct clk ssi_l4_ick = {
1913 .parent = &l4_ick, 1989 .parent = &l4_ick,
1914 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | 1990 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
1915 PARENT_CONTROLS_CLOCK, 1991 PARENT_CONTROLS_CLOCK,
1992 .clkdm_name = "core_l4_clkdm",
1916 .recalc = &followparent_recalc, 1993 .recalc = &followparent_recalc,
1917}; 1994};
1918 1995
@@ -1922,6 +1999,7 @@ static struct clk ssi_ick = {
1922 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), 1999 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1923 .enable_bit = OMAP3430_EN_SSI_SHIFT, 2000 .enable_bit = OMAP3430_EN_SSI_SHIFT,
1924 .flags = CLOCK_IN_OMAP343X, 2001 .flags = CLOCK_IN_OMAP343X,
2002 .clkdm_name = "core_l4_clkdm",
1925 .recalc = &followparent_recalc, 2003 .recalc = &followparent_recalc,
1926}; 2004};
1927 2005
@@ -1996,7 +2074,7 @@ static struct clk des1_ick = {
1996 2074
1997/* DSS */ 2075/* DSS */
1998static const struct clksel dss1_alwon_fck_clksel[] = { 2076static const struct clksel dss1_alwon_fck_clksel[] = {
1999 { .parent = &sys_ck, .rates = dpll_bypass_rates }, 2077 { .parent = &sys_ck, .rates = dpll_bypass_rates },
2000 { .parent = &dpll4_m4x2_ck, .rates = dpll_locked_rates }, 2078 { .parent = &dpll4_m4x2_ck, .rates = dpll_locked_rates },
2001 { .parent = NULL } 2079 { .parent = NULL }
2002}; 2080};
@@ -2011,33 +2089,40 @@ static struct clk dss1_alwon_fck = {
2011 .clksel_mask = OMAP3430_ST_PERIPH_CLK_MASK, 2089 .clksel_mask = OMAP3430_ST_PERIPH_CLK_MASK,
2012 .clksel = dss1_alwon_fck_clksel, 2090 .clksel = dss1_alwon_fck_clksel,
2013 .flags = CLOCK_IN_OMAP343X, 2091 .flags = CLOCK_IN_OMAP343X,
2092 .clkdm_name = "dss_clkdm",
2014 .recalc = &omap2_clksel_recalc, 2093 .recalc = &omap2_clksel_recalc,
2015}; 2094};
2016 2095
2017static struct clk dss_tv_fck = { 2096static struct clk dss_tv_fck = {
2018 .name = "dss_tv_fck", 2097 .name = "dss_tv_fck",
2019 .parent = &omap_54m_fck, 2098 .parent = &omap_54m_fck,
2099 .init = &omap2_init_clk_clkdm,
2020 .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN), 2100 .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN),
2021 .enable_bit = OMAP3430_EN_TV_SHIFT, 2101 .enable_bit = OMAP3430_EN_TV_SHIFT,
2022 .flags = CLOCK_IN_OMAP343X, 2102 .flags = CLOCK_IN_OMAP343X,
2103 .clkdm_name = "dss_clkdm",
2023 .recalc = &followparent_recalc, 2104 .recalc = &followparent_recalc,
2024}; 2105};
2025 2106
2026static struct clk dss_96m_fck = { 2107static struct clk dss_96m_fck = {
2027 .name = "dss_96m_fck", 2108 .name = "dss_96m_fck",
2028 .parent = &omap_96m_fck, 2109 .parent = &omap_96m_fck,
2110 .init = &omap2_init_clk_clkdm,
2029 .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN), 2111 .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN),
2030 .enable_bit = OMAP3430_EN_TV_SHIFT, 2112 .enable_bit = OMAP3430_EN_TV_SHIFT,
2031 .flags = CLOCK_IN_OMAP343X, 2113 .flags = CLOCK_IN_OMAP343X,
2114 .clkdm_name = "dss_clkdm",
2032 .recalc = &followparent_recalc, 2115 .recalc = &followparent_recalc,
2033}; 2116};
2034 2117
2035static struct clk dss2_alwon_fck = { 2118static struct clk dss2_alwon_fck = {
2036 .name = "dss2_alwon_fck", 2119 .name = "dss2_alwon_fck",
2037 .parent = &sys_ck, 2120 .parent = &sys_ck,
2121 .init = &omap2_init_clk_clkdm,
2038 .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN), 2122 .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN),
2039 .enable_bit = OMAP3430_EN_DSS2_SHIFT, 2123 .enable_bit = OMAP3430_EN_DSS2_SHIFT,
2040 .flags = CLOCK_IN_OMAP343X, 2124 .flags = CLOCK_IN_OMAP343X,
2125 .clkdm_name = "dss_clkdm",
2041 .recalc = &followparent_recalc, 2126 .recalc = &followparent_recalc,
2042}; 2127};
2043 2128
@@ -2045,16 +2130,18 @@ static struct clk dss_ick = {
2045 /* Handles both L3 and L4 clocks */ 2130 /* Handles both L3 and L4 clocks */
2046 .name = "dss_ick", 2131 .name = "dss_ick",
2047 .parent = &l4_ick, 2132 .parent = &l4_ick,
2133 .init = &omap2_init_clk_clkdm,
2048 .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_ICLKEN), 2134 .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_ICLKEN),
2049 .enable_bit = OMAP3430_CM_ICLKEN_DSS_EN_DSS_SHIFT, 2135 .enable_bit = OMAP3430_CM_ICLKEN_DSS_EN_DSS_SHIFT,
2050 .flags = CLOCK_IN_OMAP343X, 2136 .flags = CLOCK_IN_OMAP343X,
2137 .clkdm_name = "dss_clkdm",
2051 .recalc = &followparent_recalc, 2138 .recalc = &followparent_recalc,
2052}; 2139};
2053 2140
2054/* CAM */ 2141/* CAM */
2055 2142
2056static const struct clksel cam_mclk_clksel[] = { 2143static const struct clksel cam_mclk_clksel[] = {
2057 { .parent = &sys_ck, .rates = dpll_bypass_rates }, 2144 { .parent = &sys_ck, .rates = dpll_bypass_rates },
2058 { .parent = &dpll4_m5x2_ck, .rates = dpll_locked_rates }, 2145 { .parent = &dpll4_m5x2_ck, .rates = dpll_locked_rates },
2059 { .parent = NULL } 2146 { .parent = NULL }
2060}; 2147};
@@ -2069,24 +2156,19 @@ static struct clk cam_mclk = {
2069 .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN), 2156 .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN),
2070 .enable_bit = OMAP3430_EN_CAM_SHIFT, 2157 .enable_bit = OMAP3430_EN_CAM_SHIFT,
2071 .flags = CLOCK_IN_OMAP343X, 2158 .flags = CLOCK_IN_OMAP343X,
2159 .clkdm_name = "cam_clkdm",
2072 .recalc = &omap2_clksel_recalc, 2160 .recalc = &omap2_clksel_recalc,
2073}; 2161};
2074 2162
2075static struct clk cam_l3_ick = { 2163static struct clk cam_ick = {
2076 .name = "cam_l3_ick", 2164 /* Handles both L3 and L4 clocks */
2077 .parent = &l3_ick, 2165 .name = "cam_ick",
2078 .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_ICLKEN),
2079 .enable_bit = OMAP3430_EN_CAM_SHIFT,
2080 .flags = CLOCK_IN_OMAP343X,
2081 .recalc = &followparent_recalc,
2082};
2083
2084static struct clk cam_l4_ick = {
2085 .name = "cam_l4_ick",
2086 .parent = &l4_ick, 2166 .parent = &l4_ick,
2167 .init = &omap2_init_clk_clkdm,
2087 .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_ICLKEN), 2168 .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_ICLKEN),
2088 .enable_bit = OMAP3430_EN_CAM_SHIFT, 2169 .enable_bit = OMAP3430_EN_CAM_SHIFT,
2089 .flags = CLOCK_IN_OMAP343X, 2170 .flags = CLOCK_IN_OMAP343X,
2171 .clkdm_name = "cam_clkdm",
2090 .recalc = &followparent_recalc, 2172 .recalc = &followparent_recalc,
2091}; 2173};
2092 2174
@@ -2095,45 +2177,45 @@ static struct clk cam_l4_ick = {
2095static struct clk usbhost_120m_fck = { 2177static struct clk usbhost_120m_fck = {
2096 .name = "usbhost_120m_fck", 2178 .name = "usbhost_120m_fck",
2097 .parent = &omap_120m_fck, 2179 .parent = &omap_120m_fck,
2180 .init = &omap2_init_clk_clkdm,
2098 .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN), 2181 .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN),
2099 .enable_bit = OMAP3430ES2_EN_USBHOST2_SHIFT, 2182 .enable_bit = OMAP3430ES2_EN_USBHOST2_SHIFT,
2100 .flags = CLOCK_IN_OMAP3430ES2, 2183 .flags = CLOCK_IN_OMAP3430ES2,
2184 .clkdm_name = "usbhost_clkdm",
2101 .recalc = &followparent_recalc, 2185 .recalc = &followparent_recalc,
2102}; 2186};
2103 2187
2104static struct clk usbhost_48m_fck = { 2188static struct clk usbhost_48m_fck = {
2105 .name = "usbhost_48m_fck", 2189 .name = "usbhost_48m_fck",
2106 .parent = &omap_48m_fck, 2190 .parent = &omap_48m_fck,
2191 .init = &omap2_init_clk_clkdm,
2107 .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN), 2192 .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN),
2108 .enable_bit = OMAP3430ES2_EN_USBHOST1_SHIFT, 2193 .enable_bit = OMAP3430ES2_EN_USBHOST1_SHIFT,
2109 .flags = CLOCK_IN_OMAP3430ES2, 2194 .flags = CLOCK_IN_OMAP3430ES2,
2195 .clkdm_name = "usbhost_clkdm",
2110 .recalc = &followparent_recalc, 2196 .recalc = &followparent_recalc,
2111}; 2197};
2112 2198
2113static struct clk usbhost_l3_ick = { 2199static struct clk usbhost_ick = {
2114 .name = "usbhost_l3_ick", 2200 /* Handles both L3 and L4 clocks */
2115 .parent = &l3_ick, 2201 .name = "usbhost_ick",
2116 .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_ICLKEN),
2117 .enable_bit = OMAP3430ES2_EN_USBHOST_SHIFT,
2118 .flags = CLOCK_IN_OMAP3430ES2,
2119 .recalc = &followparent_recalc,
2120};
2121
2122static struct clk usbhost_l4_ick = {
2123 .name = "usbhost_l4_ick",
2124 .parent = &l4_ick, 2202 .parent = &l4_ick,
2203 .init = &omap2_init_clk_clkdm,
2125 .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_ICLKEN), 2204 .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_ICLKEN),
2126 .enable_bit = OMAP3430ES2_EN_USBHOST_SHIFT, 2205 .enable_bit = OMAP3430ES2_EN_USBHOST_SHIFT,
2127 .flags = CLOCK_IN_OMAP3430ES2, 2206 .flags = CLOCK_IN_OMAP3430ES2,
2207 .clkdm_name = "usbhost_clkdm",
2128 .recalc = &followparent_recalc, 2208 .recalc = &followparent_recalc,
2129}; 2209};
2130 2210
2131static struct clk usbhost_sar_fck = { 2211static struct clk usbhost_sar_fck = {
2132 .name = "usbhost_sar_fck", 2212 .name = "usbhost_sar_fck",
2133 .parent = &osc_sys_ck, 2213 .parent = &osc_sys_ck,
2214 .init = &omap2_init_clk_clkdm,
2134 .enable_reg = OMAP_PRM_REGADDR(OMAP3430ES2_USBHOST_MOD, PM_PWSTCTRL), 2215 .enable_reg = OMAP_PRM_REGADDR(OMAP3430ES2_USBHOST_MOD, PM_PWSTCTRL),
2135 .enable_bit = OMAP3430ES2_SAVEANDRESTORE_SHIFT, 2216 .enable_bit = OMAP3430ES2_SAVEANDRESTORE_SHIFT,
2136 .flags = CLOCK_IN_OMAP3430ES2, 2217 .flags = CLOCK_IN_OMAP3430ES2,
2218 .clkdm_name = "usbhost_clkdm",
2137 .recalc = &followparent_recalc, 2219 .recalc = &followparent_recalc,
2138}; 2220};
2139 2221
@@ -2175,6 +2257,7 @@ static struct clk usim_fck = {
2175 .recalc = &omap2_clksel_recalc, 2257 .recalc = &omap2_clksel_recalc,
2176}; 2258};
2177 2259
2260/* XXX should gpt1's clksel have wkup_32k_fck as the 32k opt? */
2178static struct clk gpt1_fck = { 2261static struct clk gpt1_fck = {
2179 .name = "gpt1_fck", 2262 .name = "gpt1_fck",
2180 .init = &omap2_init_clksel_parent, 2263 .init = &omap2_init_clksel_parent,
@@ -2184,13 +2267,16 @@ static struct clk gpt1_fck = {
2184 .clksel_mask = OMAP3430_CLKSEL_GPT1_MASK, 2267 .clksel_mask = OMAP3430_CLKSEL_GPT1_MASK,
2185 .clksel = omap343x_gpt_clksel, 2268 .clksel = omap343x_gpt_clksel,
2186 .flags = CLOCK_IN_OMAP343X, 2269 .flags = CLOCK_IN_OMAP343X,
2270 .clkdm_name = "wkup_clkdm",
2187 .recalc = &omap2_clksel_recalc, 2271 .recalc = &omap2_clksel_recalc,
2188}; 2272};
2189 2273
2190static struct clk wkup_32k_fck = { 2274static struct clk wkup_32k_fck = {
2191 .name = "wkup_32k_fck", 2275 .name = "wkup_32k_fck",
2276 .init = &omap2_init_clk_clkdm,
2192 .parent = &omap_32k_fck, 2277 .parent = &omap_32k_fck,
2193 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, 2278 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED,
2279 .clkdm_name = "wkup_clkdm",
2194 .recalc = &followparent_recalc, 2280 .recalc = &followparent_recalc,
2195}; 2281};
2196 2282
@@ -2200,6 +2286,7 @@ static struct clk gpio1_fck = {
2200 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), 2286 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
2201 .enable_bit = OMAP3430_EN_GPIO1_SHIFT, 2287 .enable_bit = OMAP3430_EN_GPIO1_SHIFT,
2202 .flags = CLOCK_IN_OMAP343X, 2288 .flags = CLOCK_IN_OMAP343X,
2289 .clkdm_name = "wkup_clkdm",
2203 .recalc = &followparent_recalc, 2290 .recalc = &followparent_recalc,
2204}; 2291};
2205 2292
@@ -2209,6 +2296,7 @@ static struct clk wdt2_fck = {
2209 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), 2296 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
2210 .enable_bit = OMAP3430_EN_WDT2_SHIFT, 2297 .enable_bit = OMAP3430_EN_WDT2_SHIFT,
2211 .flags = CLOCK_IN_OMAP343X, 2298 .flags = CLOCK_IN_OMAP343X,
2299 .clkdm_name = "wkup_clkdm",
2212 .recalc = &followparent_recalc, 2300 .recalc = &followparent_recalc,
2213}; 2301};
2214 2302
@@ -2216,6 +2304,7 @@ static struct clk wkup_l4_ick = {
2216 .name = "wkup_l4_ick", 2304 .name = "wkup_l4_ick",
2217 .parent = &sys_ck, 2305 .parent = &sys_ck,
2218 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, 2306 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED,
2307 .clkdm_name = "wkup_clkdm",
2219 .recalc = &followparent_recalc, 2308 .recalc = &followparent_recalc,
2220}; 2309};
2221 2310
@@ -2227,6 +2316,7 @@ static struct clk usim_ick = {
2227 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), 2316 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN),
2228 .enable_bit = OMAP3430ES2_EN_USIMOCP_SHIFT, 2317 .enable_bit = OMAP3430ES2_EN_USIMOCP_SHIFT,
2229 .flags = CLOCK_IN_OMAP3430ES2, 2318 .flags = CLOCK_IN_OMAP3430ES2,
2319 .clkdm_name = "wkup_clkdm",
2230 .recalc = &followparent_recalc, 2320 .recalc = &followparent_recalc,
2231}; 2321};
2232 2322
@@ -2236,6 +2326,7 @@ static struct clk wdt2_ick = {
2236 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), 2326 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN),
2237 .enable_bit = OMAP3430_EN_WDT2_SHIFT, 2327 .enable_bit = OMAP3430_EN_WDT2_SHIFT,
2238 .flags = CLOCK_IN_OMAP343X, 2328 .flags = CLOCK_IN_OMAP343X,
2329 .clkdm_name = "wkup_clkdm",
2239 .recalc = &followparent_recalc, 2330 .recalc = &followparent_recalc,
2240}; 2331};
2241 2332
@@ -2245,6 +2336,7 @@ static struct clk wdt1_ick = {
2245 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), 2336 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN),
2246 .enable_bit = OMAP3430_EN_WDT1_SHIFT, 2337 .enable_bit = OMAP3430_EN_WDT1_SHIFT,
2247 .flags = CLOCK_IN_OMAP343X, 2338 .flags = CLOCK_IN_OMAP343X,
2339 .clkdm_name = "wkup_clkdm",
2248 .recalc = &followparent_recalc, 2340 .recalc = &followparent_recalc,
2249}; 2341};
2250 2342
@@ -2254,6 +2346,7 @@ static struct clk gpio1_ick = {
2254 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), 2346 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN),
2255 .enable_bit = OMAP3430_EN_GPIO1_SHIFT, 2347 .enable_bit = OMAP3430_EN_GPIO1_SHIFT,
2256 .flags = CLOCK_IN_OMAP343X, 2348 .flags = CLOCK_IN_OMAP343X,
2349 .clkdm_name = "wkup_clkdm",
2257 .recalc = &followparent_recalc, 2350 .recalc = &followparent_recalc,
2258}; 2351};
2259 2352
@@ -2263,15 +2356,18 @@ static struct clk omap_32ksync_ick = {
2263 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), 2356 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN),
2264 .enable_bit = OMAP3430_EN_32KSYNC_SHIFT, 2357 .enable_bit = OMAP3430_EN_32KSYNC_SHIFT,
2265 .flags = CLOCK_IN_OMAP343X, 2358 .flags = CLOCK_IN_OMAP343X,
2359 .clkdm_name = "wkup_clkdm",
2266 .recalc = &followparent_recalc, 2360 .recalc = &followparent_recalc,
2267}; 2361};
2268 2362
2363/* XXX This clock no longer exists in 3430 TRM rev F */
2269static struct clk gpt12_ick = { 2364static struct clk gpt12_ick = {
2270 .name = "gpt12_ick", 2365 .name = "gpt12_ick",
2271 .parent = &wkup_l4_ick, 2366 .parent = &wkup_l4_ick,
2272 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), 2367 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN),
2273 .enable_bit = OMAP3430_EN_GPT12_SHIFT, 2368 .enable_bit = OMAP3430_EN_GPT12_SHIFT,
2274 .flags = CLOCK_IN_OMAP343X, 2369 .flags = CLOCK_IN_OMAP343X,
2370 .clkdm_name = "wkup_clkdm",
2275 .recalc = &followparent_recalc, 2371 .recalc = &followparent_recalc,
2276}; 2372};
2277 2373
@@ -2281,6 +2377,7 @@ static struct clk gpt1_ick = {
2281 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), 2377 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN),
2282 .enable_bit = OMAP3430_EN_GPT1_SHIFT, 2378 .enable_bit = OMAP3430_EN_GPT1_SHIFT,
2283 .flags = CLOCK_IN_OMAP343X, 2379 .flags = CLOCK_IN_OMAP343X,
2380 .clkdm_name = "wkup_clkdm",
2284 .recalc = &followparent_recalc, 2381 .recalc = &followparent_recalc,
2285}; 2382};
2286 2383
@@ -2291,16 +2388,20 @@ static struct clk gpt1_ick = {
2291static struct clk per_96m_fck = { 2388static struct clk per_96m_fck = {
2292 .name = "per_96m_fck", 2389 .name = "per_96m_fck",
2293 .parent = &omap_96m_alwon_fck, 2390 .parent = &omap_96m_alwon_fck,
2391 .init = &omap2_init_clk_clkdm,
2294 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | 2392 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
2295 PARENT_CONTROLS_CLOCK, 2393 PARENT_CONTROLS_CLOCK,
2394 .clkdm_name = "per_clkdm",
2296 .recalc = &followparent_recalc, 2395 .recalc = &followparent_recalc,
2297}; 2396};
2298 2397
2299static struct clk per_48m_fck = { 2398static struct clk per_48m_fck = {
2300 .name = "per_48m_fck", 2399 .name = "per_48m_fck",
2301 .parent = &omap_48m_fck, 2400 .parent = &omap_48m_fck,
2401 .init = &omap2_init_clk_clkdm,
2302 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | 2402 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
2303 PARENT_CONTROLS_CLOCK, 2403 PARENT_CONTROLS_CLOCK,
2404 .clkdm_name = "per_clkdm",
2304 .recalc = &followparent_recalc, 2405 .recalc = &followparent_recalc,
2305}; 2406};
2306 2407
@@ -2310,6 +2411,7 @@ static struct clk uart3_fck = {
2310 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), 2411 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
2311 .enable_bit = OMAP3430_EN_UART3_SHIFT, 2412 .enable_bit = OMAP3430_EN_UART3_SHIFT,
2312 .flags = CLOCK_IN_OMAP343X, 2413 .flags = CLOCK_IN_OMAP343X,
2414 .clkdm_name = "per_clkdm",
2313 .recalc = &followparent_recalc, 2415 .recalc = &followparent_recalc,
2314}; 2416};
2315 2417
@@ -2322,6 +2424,7 @@ static struct clk gpt2_fck = {
2322 .clksel_mask = OMAP3430_CLKSEL_GPT2_MASK, 2424 .clksel_mask = OMAP3430_CLKSEL_GPT2_MASK,
2323 .clksel = omap343x_gpt_clksel, 2425 .clksel = omap343x_gpt_clksel,
2324 .flags = CLOCK_IN_OMAP343X, 2426 .flags = CLOCK_IN_OMAP343X,
2427 .clkdm_name = "per_clkdm",
2325 .recalc = &omap2_clksel_recalc, 2428 .recalc = &omap2_clksel_recalc,
2326}; 2429};
2327 2430
@@ -2334,6 +2437,7 @@ static struct clk gpt3_fck = {
2334 .clksel_mask = OMAP3430_CLKSEL_GPT3_MASK, 2437 .clksel_mask = OMAP3430_CLKSEL_GPT3_MASK,
2335 .clksel = omap343x_gpt_clksel, 2438 .clksel = omap343x_gpt_clksel,
2336 .flags = CLOCK_IN_OMAP343X, 2439 .flags = CLOCK_IN_OMAP343X,
2440 .clkdm_name = "per_clkdm",
2337 .recalc = &omap2_clksel_recalc, 2441 .recalc = &omap2_clksel_recalc,
2338}; 2442};
2339 2443
@@ -2346,6 +2450,7 @@ static struct clk gpt4_fck = {
2346 .clksel_mask = OMAP3430_CLKSEL_GPT4_MASK, 2450 .clksel_mask = OMAP3430_CLKSEL_GPT4_MASK,
2347 .clksel = omap343x_gpt_clksel, 2451 .clksel = omap343x_gpt_clksel,
2348 .flags = CLOCK_IN_OMAP343X, 2452 .flags = CLOCK_IN_OMAP343X,
2453 .clkdm_name = "per_clkdm",
2349 .recalc = &omap2_clksel_recalc, 2454 .recalc = &omap2_clksel_recalc,
2350}; 2455};
2351 2456
@@ -2358,6 +2463,7 @@ static struct clk gpt5_fck = {
2358 .clksel_mask = OMAP3430_CLKSEL_GPT5_MASK, 2463 .clksel_mask = OMAP3430_CLKSEL_GPT5_MASK,
2359 .clksel = omap343x_gpt_clksel, 2464 .clksel = omap343x_gpt_clksel,
2360 .flags = CLOCK_IN_OMAP343X, 2465 .flags = CLOCK_IN_OMAP343X,
2466 .clkdm_name = "per_clkdm",
2361 .recalc = &omap2_clksel_recalc, 2467 .recalc = &omap2_clksel_recalc,
2362}; 2468};
2363 2469
@@ -2370,6 +2476,7 @@ static struct clk gpt6_fck = {
2370 .clksel_mask = OMAP3430_CLKSEL_GPT6_MASK, 2476 .clksel_mask = OMAP3430_CLKSEL_GPT6_MASK,
2371 .clksel = omap343x_gpt_clksel, 2477 .clksel = omap343x_gpt_clksel,
2372 .flags = CLOCK_IN_OMAP343X, 2478 .flags = CLOCK_IN_OMAP343X,
2479 .clkdm_name = "per_clkdm",
2373 .recalc = &omap2_clksel_recalc, 2480 .recalc = &omap2_clksel_recalc,
2374}; 2481};
2375 2482
@@ -2382,6 +2489,7 @@ static struct clk gpt7_fck = {
2382 .clksel_mask = OMAP3430_CLKSEL_GPT7_MASK, 2489 .clksel_mask = OMAP3430_CLKSEL_GPT7_MASK,
2383 .clksel = omap343x_gpt_clksel, 2490 .clksel = omap343x_gpt_clksel,
2384 .flags = CLOCK_IN_OMAP343X, 2491 .flags = CLOCK_IN_OMAP343X,
2492 .clkdm_name = "per_clkdm",
2385 .recalc = &omap2_clksel_recalc, 2493 .recalc = &omap2_clksel_recalc,
2386}; 2494};
2387 2495
@@ -2394,6 +2502,7 @@ static struct clk gpt8_fck = {
2394 .clksel_mask = OMAP3430_CLKSEL_GPT8_MASK, 2502 .clksel_mask = OMAP3430_CLKSEL_GPT8_MASK,
2395 .clksel = omap343x_gpt_clksel, 2503 .clksel = omap343x_gpt_clksel,
2396 .flags = CLOCK_IN_OMAP343X, 2504 .flags = CLOCK_IN_OMAP343X,
2505 .clkdm_name = "per_clkdm",
2397 .recalc = &omap2_clksel_recalc, 2506 .recalc = &omap2_clksel_recalc,
2398}; 2507};
2399 2508
@@ -2406,12 +2515,14 @@ static struct clk gpt9_fck = {
2406 .clksel_mask = OMAP3430_CLKSEL_GPT9_MASK, 2515 .clksel_mask = OMAP3430_CLKSEL_GPT9_MASK,
2407 .clksel = omap343x_gpt_clksel, 2516 .clksel = omap343x_gpt_clksel,
2408 .flags = CLOCK_IN_OMAP343X, 2517 .flags = CLOCK_IN_OMAP343X,
2518 .clkdm_name = "per_clkdm",
2409 .recalc = &omap2_clksel_recalc, 2519 .recalc = &omap2_clksel_recalc,
2410}; 2520};
2411 2521
2412static struct clk per_32k_alwon_fck = { 2522static struct clk per_32k_alwon_fck = {
2413 .name = "per_32k_alwon_fck", 2523 .name = "per_32k_alwon_fck",
2414 .parent = &omap_32k_fck, 2524 .parent = &omap_32k_fck,
2525 .clkdm_name = "per_clkdm",
2415 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, 2526 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED,
2416 .recalc = &followparent_recalc, 2527 .recalc = &followparent_recalc,
2417}; 2528};
@@ -2422,6 +2533,7 @@ static struct clk gpio6_fck = {
2422 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), 2533 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
2423 .enable_bit = OMAP3430_EN_GPIO6_SHIFT, 2534 .enable_bit = OMAP3430_EN_GPIO6_SHIFT,
2424 .flags = CLOCK_IN_OMAP343X, 2535 .flags = CLOCK_IN_OMAP343X,
2536 .clkdm_name = "per_clkdm",
2425 .recalc = &followparent_recalc, 2537 .recalc = &followparent_recalc,
2426}; 2538};
2427 2539
@@ -2431,6 +2543,7 @@ static struct clk gpio5_fck = {
2431 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), 2543 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
2432 .enable_bit = OMAP3430_EN_GPIO5_SHIFT, 2544 .enable_bit = OMAP3430_EN_GPIO5_SHIFT,
2433 .flags = CLOCK_IN_OMAP343X, 2545 .flags = CLOCK_IN_OMAP343X,
2546 .clkdm_name = "per_clkdm",
2434 .recalc = &followparent_recalc, 2547 .recalc = &followparent_recalc,
2435}; 2548};
2436 2549
@@ -2440,6 +2553,7 @@ static struct clk gpio4_fck = {
2440 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), 2553 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
2441 .enable_bit = OMAP3430_EN_GPIO4_SHIFT, 2554 .enable_bit = OMAP3430_EN_GPIO4_SHIFT,
2442 .flags = CLOCK_IN_OMAP343X, 2555 .flags = CLOCK_IN_OMAP343X,
2556 .clkdm_name = "per_clkdm",
2443 .recalc = &followparent_recalc, 2557 .recalc = &followparent_recalc,
2444}; 2558};
2445 2559
@@ -2449,6 +2563,7 @@ static struct clk gpio3_fck = {
2449 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), 2563 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
2450 .enable_bit = OMAP3430_EN_GPIO3_SHIFT, 2564 .enable_bit = OMAP3430_EN_GPIO3_SHIFT,
2451 .flags = CLOCK_IN_OMAP343X, 2565 .flags = CLOCK_IN_OMAP343X,
2566 .clkdm_name = "per_clkdm",
2452 .recalc = &followparent_recalc, 2567 .recalc = &followparent_recalc,
2453}; 2568};
2454 2569
@@ -2458,6 +2573,7 @@ static struct clk gpio2_fck = {
2458 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), 2573 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
2459 .enable_bit = OMAP3430_EN_GPIO2_SHIFT, 2574 .enable_bit = OMAP3430_EN_GPIO2_SHIFT,
2460 .flags = CLOCK_IN_OMAP343X, 2575 .flags = CLOCK_IN_OMAP343X,
2576 .clkdm_name = "per_clkdm",
2461 .recalc = &followparent_recalc, 2577 .recalc = &followparent_recalc,
2462}; 2578};
2463 2579
@@ -2467,6 +2583,7 @@ static struct clk wdt3_fck = {
2467 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), 2583 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
2468 .enable_bit = OMAP3430_EN_WDT3_SHIFT, 2584 .enable_bit = OMAP3430_EN_WDT3_SHIFT,
2469 .flags = CLOCK_IN_OMAP343X, 2585 .flags = CLOCK_IN_OMAP343X,
2586 .clkdm_name = "per_clkdm",
2470 .recalc = &followparent_recalc, 2587 .recalc = &followparent_recalc,
2471}; 2588};
2472 2589
@@ -2475,6 +2592,7 @@ static struct clk per_l4_ick = {
2475 .parent = &l4_ick, 2592 .parent = &l4_ick,
2476 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | 2593 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
2477 PARENT_CONTROLS_CLOCK, 2594 PARENT_CONTROLS_CLOCK,
2595 .clkdm_name = "per_clkdm",
2478 .recalc = &followparent_recalc, 2596 .recalc = &followparent_recalc,
2479}; 2597};
2480 2598
@@ -2484,6 +2602,7 @@ static struct clk gpio6_ick = {
2484 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), 2602 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
2485 .enable_bit = OMAP3430_EN_GPIO6_SHIFT, 2603 .enable_bit = OMAP3430_EN_GPIO6_SHIFT,
2486 .flags = CLOCK_IN_OMAP343X, 2604 .flags = CLOCK_IN_OMAP343X,
2605 .clkdm_name = "per_clkdm",
2487 .recalc = &followparent_recalc, 2606 .recalc = &followparent_recalc,
2488}; 2607};
2489 2608
@@ -2493,6 +2612,7 @@ static struct clk gpio5_ick = {
2493 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), 2612 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
2494 .enable_bit = OMAP3430_EN_GPIO5_SHIFT, 2613 .enable_bit = OMAP3430_EN_GPIO5_SHIFT,
2495 .flags = CLOCK_IN_OMAP343X, 2614 .flags = CLOCK_IN_OMAP343X,
2615 .clkdm_name = "per_clkdm",
2496 .recalc = &followparent_recalc, 2616 .recalc = &followparent_recalc,
2497}; 2617};
2498 2618
@@ -2502,6 +2622,7 @@ static struct clk gpio4_ick = {
2502 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), 2622 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
2503 .enable_bit = OMAP3430_EN_GPIO4_SHIFT, 2623 .enable_bit = OMAP3430_EN_GPIO4_SHIFT,
2504 .flags = CLOCK_IN_OMAP343X, 2624 .flags = CLOCK_IN_OMAP343X,
2625 .clkdm_name = "per_clkdm",
2505 .recalc = &followparent_recalc, 2626 .recalc = &followparent_recalc,
2506}; 2627};
2507 2628
@@ -2511,6 +2632,7 @@ static struct clk gpio3_ick = {
2511 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), 2632 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
2512 .enable_bit = OMAP3430_EN_GPIO3_SHIFT, 2633 .enable_bit = OMAP3430_EN_GPIO3_SHIFT,
2513 .flags = CLOCK_IN_OMAP343X, 2634 .flags = CLOCK_IN_OMAP343X,
2635 .clkdm_name = "per_clkdm",
2514 .recalc = &followparent_recalc, 2636 .recalc = &followparent_recalc,
2515}; 2637};
2516 2638
@@ -2520,6 +2642,7 @@ static struct clk gpio2_ick = {
2520 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), 2642 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
2521 .enable_bit = OMAP3430_EN_GPIO2_SHIFT, 2643 .enable_bit = OMAP3430_EN_GPIO2_SHIFT,
2522 .flags = CLOCK_IN_OMAP343X, 2644 .flags = CLOCK_IN_OMAP343X,
2645 .clkdm_name = "per_clkdm",
2523 .recalc = &followparent_recalc, 2646 .recalc = &followparent_recalc,
2524}; 2647};
2525 2648
@@ -2529,6 +2652,7 @@ static struct clk wdt3_ick = {
2529 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), 2652 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
2530 .enable_bit = OMAP3430_EN_WDT3_SHIFT, 2653 .enable_bit = OMAP3430_EN_WDT3_SHIFT,
2531 .flags = CLOCK_IN_OMAP343X, 2654 .flags = CLOCK_IN_OMAP343X,
2655 .clkdm_name = "per_clkdm",
2532 .recalc = &followparent_recalc, 2656 .recalc = &followparent_recalc,
2533}; 2657};
2534 2658
@@ -2538,6 +2662,7 @@ static struct clk uart3_ick = {
2538 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), 2662 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
2539 .enable_bit = OMAP3430_EN_UART3_SHIFT, 2663 .enable_bit = OMAP3430_EN_UART3_SHIFT,
2540 .flags = CLOCK_IN_OMAP343X, 2664 .flags = CLOCK_IN_OMAP343X,
2665 .clkdm_name = "per_clkdm",
2541 .recalc = &followparent_recalc, 2666 .recalc = &followparent_recalc,
2542}; 2667};
2543 2668
@@ -2547,6 +2672,7 @@ static struct clk gpt9_ick = {
2547 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), 2672 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
2548 .enable_bit = OMAP3430_EN_GPT9_SHIFT, 2673 .enable_bit = OMAP3430_EN_GPT9_SHIFT,
2549 .flags = CLOCK_IN_OMAP343X, 2674 .flags = CLOCK_IN_OMAP343X,
2675 .clkdm_name = "per_clkdm",
2550 .recalc = &followparent_recalc, 2676 .recalc = &followparent_recalc,
2551}; 2677};
2552 2678
@@ -2556,6 +2682,7 @@ static struct clk gpt8_ick = {
2556 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), 2682 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
2557 .enable_bit = OMAP3430_EN_GPT8_SHIFT, 2683 .enable_bit = OMAP3430_EN_GPT8_SHIFT,
2558 .flags = CLOCK_IN_OMAP343X, 2684 .flags = CLOCK_IN_OMAP343X,
2685 .clkdm_name = "per_clkdm",
2559 .recalc = &followparent_recalc, 2686 .recalc = &followparent_recalc,
2560}; 2687};
2561 2688
@@ -2565,6 +2692,7 @@ static struct clk gpt7_ick = {
2565 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), 2692 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
2566 .enable_bit = OMAP3430_EN_GPT7_SHIFT, 2693 .enable_bit = OMAP3430_EN_GPT7_SHIFT,
2567 .flags = CLOCK_IN_OMAP343X, 2694 .flags = CLOCK_IN_OMAP343X,
2695 .clkdm_name = "per_clkdm",
2568 .recalc = &followparent_recalc, 2696 .recalc = &followparent_recalc,
2569}; 2697};
2570 2698
@@ -2574,6 +2702,7 @@ static struct clk gpt6_ick = {
2574 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), 2702 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
2575 .enable_bit = OMAP3430_EN_GPT6_SHIFT, 2703 .enable_bit = OMAP3430_EN_GPT6_SHIFT,
2576 .flags = CLOCK_IN_OMAP343X, 2704 .flags = CLOCK_IN_OMAP343X,
2705 .clkdm_name = "per_clkdm",
2577 .recalc = &followparent_recalc, 2706 .recalc = &followparent_recalc,
2578}; 2707};
2579 2708
@@ -2583,6 +2712,7 @@ static struct clk gpt5_ick = {
2583 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), 2712 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
2584 .enable_bit = OMAP3430_EN_GPT5_SHIFT, 2713 .enable_bit = OMAP3430_EN_GPT5_SHIFT,
2585 .flags = CLOCK_IN_OMAP343X, 2714 .flags = CLOCK_IN_OMAP343X,
2715 .clkdm_name = "per_clkdm",
2586 .recalc = &followparent_recalc, 2716 .recalc = &followparent_recalc,
2587}; 2717};
2588 2718
@@ -2592,6 +2722,7 @@ static struct clk gpt4_ick = {
2592 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), 2722 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
2593 .enable_bit = OMAP3430_EN_GPT4_SHIFT, 2723 .enable_bit = OMAP3430_EN_GPT4_SHIFT,
2594 .flags = CLOCK_IN_OMAP343X, 2724 .flags = CLOCK_IN_OMAP343X,
2725 .clkdm_name = "per_clkdm",
2595 .recalc = &followparent_recalc, 2726 .recalc = &followparent_recalc,
2596}; 2727};
2597 2728
@@ -2601,6 +2732,7 @@ static struct clk gpt3_ick = {
2601 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), 2732 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
2602 .enable_bit = OMAP3430_EN_GPT3_SHIFT, 2733 .enable_bit = OMAP3430_EN_GPT3_SHIFT,
2603 .flags = CLOCK_IN_OMAP343X, 2734 .flags = CLOCK_IN_OMAP343X,
2735 .clkdm_name = "per_clkdm",
2604 .recalc = &followparent_recalc, 2736 .recalc = &followparent_recalc,
2605}; 2737};
2606 2738
@@ -2610,6 +2742,7 @@ static struct clk gpt2_ick = {
2610 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), 2742 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
2611 .enable_bit = OMAP3430_EN_GPT2_SHIFT, 2743 .enable_bit = OMAP3430_EN_GPT2_SHIFT,
2612 .flags = CLOCK_IN_OMAP343X, 2744 .flags = CLOCK_IN_OMAP343X,
2745 .clkdm_name = "per_clkdm",
2613 .recalc = &followparent_recalc, 2746 .recalc = &followparent_recalc,
2614}; 2747};
2615 2748
@@ -2620,6 +2753,7 @@ static struct clk mcbsp2_ick = {
2620 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), 2753 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
2621 .enable_bit = OMAP3430_EN_MCBSP2_SHIFT, 2754 .enable_bit = OMAP3430_EN_MCBSP2_SHIFT,
2622 .flags = CLOCK_IN_OMAP343X, 2755 .flags = CLOCK_IN_OMAP343X,
2756 .clkdm_name = "per_clkdm",
2623 .recalc = &followparent_recalc, 2757 .recalc = &followparent_recalc,
2624}; 2758};
2625 2759
@@ -2630,6 +2764,7 @@ static struct clk mcbsp3_ick = {
2630 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), 2764 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
2631 .enable_bit = OMAP3430_EN_MCBSP3_SHIFT, 2765 .enable_bit = OMAP3430_EN_MCBSP3_SHIFT,
2632 .flags = CLOCK_IN_OMAP343X, 2766 .flags = CLOCK_IN_OMAP343X,
2767 .clkdm_name = "per_clkdm",
2633 .recalc = &followparent_recalc, 2768 .recalc = &followparent_recalc,
2634}; 2769};
2635 2770
@@ -2640,12 +2775,13 @@ static struct clk mcbsp4_ick = {
2640 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), 2775 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
2641 .enable_bit = OMAP3430_EN_MCBSP4_SHIFT, 2776 .enable_bit = OMAP3430_EN_MCBSP4_SHIFT,
2642 .flags = CLOCK_IN_OMAP343X, 2777 .flags = CLOCK_IN_OMAP343X,
2778 .clkdm_name = "per_clkdm",
2643 .recalc = &followparent_recalc, 2779 .recalc = &followparent_recalc,
2644}; 2780};
2645 2781
2646static const struct clksel mcbsp_234_clksel[] = { 2782static const struct clksel mcbsp_234_clksel[] = {
2647 { .parent = &per_96m_fck, .rates = common_mcbsp_96m_rates }, 2783 { .parent = &per_96m_fck, .rates = common_mcbsp_96m_rates },
2648 { .parent = &mcbsp_clks, .rates = common_mcbsp_mcbsp_rates }, 2784 { .parent = &mcbsp_clks, .rates = common_mcbsp_mcbsp_rates },
2649 { .parent = NULL } 2785 { .parent = NULL }
2650}; 2786};
2651 2787
@@ -2659,6 +2795,7 @@ static struct clk mcbsp2_fck = {
2659 .clksel_mask = OMAP2_MCBSP2_CLKS_MASK, 2795 .clksel_mask = OMAP2_MCBSP2_CLKS_MASK,
2660 .clksel = mcbsp_234_clksel, 2796 .clksel = mcbsp_234_clksel,
2661 .flags = CLOCK_IN_OMAP343X, 2797 .flags = CLOCK_IN_OMAP343X,
2798 .clkdm_name = "per_clkdm",
2662 .recalc = &omap2_clksel_recalc, 2799 .recalc = &omap2_clksel_recalc,
2663}; 2800};
2664 2801
@@ -2672,6 +2809,7 @@ static struct clk mcbsp3_fck = {
2672 .clksel_mask = OMAP2_MCBSP3_CLKS_MASK, 2809 .clksel_mask = OMAP2_MCBSP3_CLKS_MASK,
2673 .clksel = mcbsp_234_clksel, 2810 .clksel = mcbsp_234_clksel,
2674 .flags = CLOCK_IN_OMAP343X, 2811 .flags = CLOCK_IN_OMAP343X,
2812 .clkdm_name = "per_clkdm",
2675 .recalc = &omap2_clksel_recalc, 2813 .recalc = &omap2_clksel_recalc,
2676}; 2814};
2677 2815
@@ -2685,6 +2823,7 @@ static struct clk mcbsp4_fck = {
2685 .clksel_mask = OMAP2_MCBSP4_CLKS_MASK, 2823 .clksel_mask = OMAP2_MCBSP4_CLKS_MASK,
2686 .clksel = mcbsp_234_clksel, 2824 .clksel = mcbsp_234_clksel,
2687 .flags = CLOCK_IN_OMAP343X, 2825 .flags = CLOCK_IN_OMAP343X,
2826 .clkdm_name = "per_clkdm",
2688 .recalc = &omap2_clksel_recalc, 2827 .recalc = &omap2_clksel_recalc,
2689}; 2828};
2690 2829
@@ -2732,6 +2871,7 @@ static struct clk emu_src_ck = {
2732 .clksel_mask = OMAP3430_MUX_CTRL_MASK, 2871 .clksel_mask = OMAP3430_MUX_CTRL_MASK,
2733 .clksel = emu_src_clksel, 2872 .clksel = emu_src_clksel,
2734 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, 2873 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED,
2874 .clkdm_name = "emu_clkdm",
2735 .recalc = &omap2_clksel_recalc, 2875 .recalc = &omap2_clksel_recalc,
2736}; 2876};
2737 2877
@@ -2755,6 +2895,7 @@ static struct clk pclk_fck = {
2755 .clksel_mask = OMAP3430_CLKSEL_PCLK_MASK, 2895 .clksel_mask = OMAP3430_CLKSEL_PCLK_MASK,
2756 .clksel = pclk_emu_clksel, 2896 .clksel = pclk_emu_clksel,
2757 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, 2897 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED,
2898 .clkdm_name = "emu_clkdm",
2758 .recalc = &omap2_clksel_recalc, 2899 .recalc = &omap2_clksel_recalc,
2759}; 2900};
2760 2901
@@ -2777,6 +2918,7 @@ static struct clk pclkx2_fck = {
2777 .clksel_mask = OMAP3430_CLKSEL_PCLKX2_MASK, 2918 .clksel_mask = OMAP3430_CLKSEL_PCLKX2_MASK,
2778 .clksel = pclkx2_emu_clksel, 2919 .clksel = pclkx2_emu_clksel,
2779 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, 2920 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED,
2921 .clkdm_name = "emu_clkdm",
2780 .recalc = &omap2_clksel_recalc, 2922 .recalc = &omap2_clksel_recalc,
2781}; 2923};
2782 2924
@@ -2792,6 +2934,7 @@ static struct clk atclk_fck = {
2792 .clksel_mask = OMAP3430_CLKSEL_ATCLK_MASK, 2934 .clksel_mask = OMAP3430_CLKSEL_ATCLK_MASK,
2793 .clksel = atclk_emu_clksel, 2935 .clksel = atclk_emu_clksel,
2794 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, 2936 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED,
2937 .clkdm_name = "emu_clkdm",
2795 .recalc = &omap2_clksel_recalc, 2938 .recalc = &omap2_clksel_recalc,
2796}; 2939};
2797 2940
@@ -2802,6 +2945,7 @@ static struct clk traceclk_src_fck = {
2802 .clksel_mask = OMAP3430_TRACE_MUX_CTRL_MASK, 2945 .clksel_mask = OMAP3430_TRACE_MUX_CTRL_MASK,
2803 .clksel = emu_src_clksel, 2946 .clksel = emu_src_clksel,
2804 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, 2947 .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED,
2948 .clkdm_name = "emu_clkdm",
2805 .recalc = &omap2_clksel_recalc, 2949 .recalc = &omap2_clksel_recalc,
2806}; 2950};
2807 2951
@@ -2824,6 +2968,7 @@ static struct clk traceclk_fck = {
2824 .clksel_mask = OMAP3430_CLKSEL_TRACECLK_MASK, 2968 .clksel_mask = OMAP3430_CLKSEL_TRACECLK_MASK,
2825 .clksel = traceclk_clksel, 2969 .clksel = traceclk_clksel,
2826 .flags = CLOCK_IN_OMAP343X | ALWAYS_ENABLED, 2970 .flags = CLOCK_IN_OMAP343X | ALWAYS_ENABLED,
2971 .clkdm_name = "emu_clkdm",
2827 .recalc = &omap2_clksel_recalc, 2972 .recalc = &omap2_clksel_recalc,
2828}; 2973};
2829 2974
@@ -2853,11 +2998,13 @@ static struct clk sr_l4_ick = {
2853 .name = "sr_l4_ick", 2998 .name = "sr_l4_ick",
2854 .parent = &l4_ick, 2999 .parent = &l4_ick,
2855 .flags = CLOCK_IN_OMAP343X, 3000 .flags = CLOCK_IN_OMAP343X,
3001 .clkdm_name = "core_l4_clkdm",
2856 .recalc = &followparent_recalc, 3002 .recalc = &followparent_recalc,
2857}; 3003};
2858 3004
2859/* SECURE_32K_FCK clocks */ 3005/* SECURE_32K_FCK clocks */
2860 3006
3007/* XXX This clock no longer exists in 3430 TRM rev F */
2861static struct clk gpt12_fck = { 3008static struct clk gpt12_fck = {
2862 .name = "gpt12_fck", 3009 .name = "gpt12_fck",
2863 .parent = &secure_32k_fck, 3010 .parent = &secure_32k_fck,
@@ -2933,6 +3080,7 @@ static struct clk *onchip_34xx_clks[] __initdata = {
2933 &l3_ick, 3080 &l3_ick,
2934 &l4_ick, 3081 &l4_ick,
2935 &rm_ick, 3082 &rm_ick,
3083 &gfx_l3_ck,
2936 &gfx_l3_fck, 3084 &gfx_l3_fck,
2937 &gfx_l3_ick, 3085 &gfx_l3_ick,
2938 &gfx_cg1_ck, 3086 &gfx_cg1_ck,
@@ -3014,12 +3162,10 @@ static struct clk *onchip_34xx_clks[] __initdata = {
3014 &dss2_alwon_fck, 3162 &dss2_alwon_fck,
3015 &dss_ick, 3163 &dss_ick,
3016 &cam_mclk, 3164 &cam_mclk,
3017 &cam_l3_ick, 3165 &cam_ick,
3018 &cam_l4_ick,
3019 &usbhost_120m_fck, 3166 &usbhost_120m_fck,
3020 &usbhost_48m_fck, 3167 &usbhost_48m_fck,
3021 &usbhost_l3_ick, 3168 &usbhost_ick,
3022 &usbhost_l4_ick,
3023 &usbhost_sar_fck, 3169 &usbhost_sar_fck,
3024 &usim_fck, 3170 &usim_fck,
3025 &gpt1_fck, 3171 &gpt1_fck,
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
new file mode 100644
index 000000000000..4c3ce9cfd948
--- /dev/null
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -0,0 +1,623 @@
1/*
2 * OMAP2/3 clockdomain framework functions
3 *
4 * Copyright (C) 2008 Texas Instruments, Inc.
5 * Copyright (C) 2008 Nokia Corporation
6 *
7 * Written by Paul Walmsley and Jouni Högander
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13#ifdef CONFIG_OMAP_DEBUG_CLOCKDOMAIN
14# define DEBUG
15#endif
16
17#include <linux/module.h>
18#include <linux/kernel.h>
19#include <linux/device.h>
20#include <linux/list.h>
21#include <linux/errno.h>
22#include <linux/delay.h>
23#include <linux/clk.h>
24#include <linux/limits.h>
25
26#include <linux/io.h>
27
28#include <linux/bitops.h>
29
30#include <mach/clock.h>
31
32#include "prm.h"
33#include "prm-regbits-24xx.h"
34#include "cm.h"
35
36#include <mach/powerdomain.h>
37#include <mach/clockdomain.h>
38
39/* clkdm_list contains all registered struct clockdomains */
40static LIST_HEAD(clkdm_list);
41
42/* clkdm_mutex protects clkdm_list add and del ops */
43static DEFINE_MUTEX(clkdm_mutex);
44
45/* array of powerdomain deps to be added/removed when clkdm in hwsup mode */
46static struct clkdm_pwrdm_autodep *autodeps;
47
48
49/* Private functions */
50
51/*
52 * _autodep_lookup - resolve autodep pwrdm names to pwrdm pointers; store
53 * @autodep: struct clkdm_pwrdm_autodep * to resolve
54 *
55 * Resolve autodep powerdomain names to powerdomain pointers via
56 * pwrdm_lookup() and store the pointers in the autodep structure. An
57 * "autodep" is a powerdomain sleep/wakeup dependency that is
58 * automatically added and removed whenever clocks in the associated
59 * clockdomain are enabled or disabled (respectively) when the
60 * clockdomain is in hardware-supervised mode. Meant to be called
61 * once at clockdomain layer initialization, since these should remain
62 * fixed for a particular architecture. No return value.
63 */
64static void _autodep_lookup(struct clkdm_pwrdm_autodep *autodep)
65{
66 struct powerdomain *pwrdm;
67
68 if (!autodep)
69 return;
70
71 if (!omap_chip_is(autodep->omap_chip))
72 return;
73
74 pwrdm = pwrdm_lookup(autodep->pwrdm_name);
75 if (!pwrdm) {
76 pr_debug("clockdomain: _autodep_lookup: powerdomain %s "
77 "does not exist\n", autodep->pwrdm_name);
78 WARN_ON(1);
79 return;
80 }
81 autodep->pwrdm = pwrdm;
82
83 return;
84}
85
86/*
87 * _clkdm_add_autodeps - add auto sleepdeps/wkdeps to clkdm upon clock enable
88 * @clkdm: struct clockdomain *
89 *
90 * Add the "autodep" sleep & wakeup dependencies to clockdomain 'clkdm'
91 * in hardware-supervised mode. Meant to be called from clock framework
92 * when a clock inside clockdomain 'clkdm' is enabled. No return value.
93 */
94static void _clkdm_add_autodeps(struct clockdomain *clkdm)
95{
96 struct clkdm_pwrdm_autodep *autodep;
97
98 for (autodep = autodeps; autodep->pwrdm_name; autodep++) {
99 if (!autodep->pwrdm)
100 continue;
101
102 pr_debug("clockdomain: adding %s sleepdep/wkdep for "
103 "pwrdm %s\n", autodep->pwrdm_name,
104 clkdm->pwrdm->name);
105
106 pwrdm_add_sleepdep(clkdm->pwrdm, autodep->pwrdm);
107 pwrdm_add_wkdep(clkdm->pwrdm, autodep->pwrdm);
108 }
109}
110
111/*
112 * _clkdm_add_autodeps - remove auto sleepdeps/wkdeps from clkdm
113 * @clkdm: struct clockdomain *
114 *
115 * Remove the "autodep" sleep & wakeup dependencies from clockdomain 'clkdm'
116 * in hardware-supervised mode. Meant to be called from clock framework
117 * when a clock inside clockdomain 'clkdm' is disabled. No return value.
118 */
119static void _clkdm_del_autodeps(struct clockdomain *clkdm)
120{
121 struct clkdm_pwrdm_autodep *autodep;
122
123 for (autodep = autodeps; autodep->pwrdm_name; autodep++) {
124 if (!autodep->pwrdm)
125 continue;
126
127 pr_debug("clockdomain: removing %s sleepdep/wkdep for "
128 "pwrdm %s\n", autodep->pwrdm_name,
129 clkdm->pwrdm->name);
130
131 pwrdm_del_sleepdep(clkdm->pwrdm, autodep->pwrdm);
132 pwrdm_del_wkdep(clkdm->pwrdm, autodep->pwrdm);
133 }
134}
135
136
137static struct clockdomain *_clkdm_lookup(const char *name)
138{
139 struct clockdomain *clkdm, *temp_clkdm;
140
141 if (!name)
142 return NULL;
143
144 clkdm = NULL;
145
146 list_for_each_entry(temp_clkdm, &clkdm_list, node) {
147 if (!strcmp(name, temp_clkdm->name)) {
148 clkdm = temp_clkdm;
149 break;
150 }
151 }
152
153 return clkdm;
154}
155
156
157/* Public functions */
158
159/**
160 * clkdm_init - set up the clockdomain layer
161 * @clkdms: optional pointer to an array of clockdomains to register
162 * @init_autodeps: optional pointer to an array of autodeps to register
163 *
164 * Set up internal state. If a pointer to an array of clockdomains
165 * was supplied, loop through the list of clockdomains, register all
166 * that are available on the current platform. Similarly, if a
167 * pointer to an array of clockdomain-powerdomain autodependencies was
168 * provided, register those. No return value.
169 */
170void clkdm_init(struct clockdomain **clkdms,
171 struct clkdm_pwrdm_autodep *init_autodeps)
172{
173 struct clockdomain **c = NULL;
174 struct clkdm_pwrdm_autodep *autodep = NULL;
175
176 if (clkdms)
177 for (c = clkdms; *c; c++)
178 clkdm_register(*c);
179
180 autodeps = init_autodeps;
181 if (autodeps)
182 for (autodep = autodeps; autodep->pwrdm_name; autodep++)
183 _autodep_lookup(autodep);
184}
185
186/**
187 * clkdm_register - register a clockdomain
188 * @clkdm: struct clockdomain * to register
189 *
190 * Adds a clockdomain to the internal clockdomain list.
191 * Returns -EINVAL if given a null pointer, -EEXIST if a clockdomain is
192 * already registered by the provided name, or 0 upon success.
193 */
194int clkdm_register(struct clockdomain *clkdm)
195{
196 int ret = -EINVAL;
197 struct powerdomain *pwrdm;
198
199 if (!clkdm || !clkdm->name)
200 return -EINVAL;
201
202 if (!omap_chip_is(clkdm->omap_chip))
203 return -EINVAL;
204
205 pwrdm = pwrdm_lookup(clkdm->pwrdm_name);
206 if (!pwrdm) {
207 pr_debug("clockdomain: clkdm_register %s: powerdomain %s "
208 "does not exist\n", clkdm->name, clkdm->pwrdm_name);
209 return -EINVAL;
210 }
211 clkdm->pwrdm = pwrdm;
212
213 mutex_lock(&clkdm_mutex);
214 /* Verify that the clockdomain is not already registered */
215 if (_clkdm_lookup(clkdm->name)) {
216 ret = -EEXIST;
217 goto cr_unlock;
218 };
219
220 list_add(&clkdm->node, &clkdm_list);
221
222 pwrdm_add_clkdm(pwrdm, clkdm);
223
224 pr_debug("clockdomain: registered %s\n", clkdm->name);
225 ret = 0;
226
227cr_unlock:
228 mutex_unlock(&clkdm_mutex);
229
230 return ret;
231}
232
233/**
234 * clkdm_unregister - unregister a clockdomain
235 * @clkdm: struct clockdomain * to unregister
236 *
237 * Removes a clockdomain from the internal clockdomain list. Returns
238 * -EINVAL if clkdm argument is NULL.
239 */
240int clkdm_unregister(struct clockdomain *clkdm)
241{
242 if (!clkdm)
243 return -EINVAL;
244
245 pwrdm_del_clkdm(clkdm->pwrdm, clkdm);
246
247 mutex_lock(&clkdm_mutex);
248 list_del(&clkdm->node);
249 mutex_unlock(&clkdm_mutex);
250
251 pr_debug("clockdomain: unregistered %s\n", clkdm->name);
252
253 return 0;
254}
255
256/**
257 * clkdm_lookup - look up a clockdomain by name, return a pointer
258 * @name: name of clockdomain
259 *
260 * Find a registered clockdomain by its name. Returns a pointer to the
261 * struct clockdomain if found, or NULL otherwise.
262 */
263struct clockdomain *clkdm_lookup(const char *name)
264{
265 struct clockdomain *clkdm, *temp_clkdm;
266
267 if (!name)
268 return NULL;
269
270 clkdm = NULL;
271
272 mutex_lock(&clkdm_mutex);
273 list_for_each_entry(temp_clkdm, &clkdm_list, node) {
274 if (!strcmp(name, temp_clkdm->name)) {
275 clkdm = temp_clkdm;
276 break;
277 }
278 }
279 mutex_unlock(&clkdm_mutex);
280
281 return clkdm;
282}
283
284/**
285 * clkdm_for_each - call function on each registered clockdomain
286 * @fn: callback function *
287 *
288 * Call the supplied function for each registered clockdomain.
289 * The callback function can return anything but 0 to bail
290 * out early from the iterator. The callback function is called with
291 * the clkdm_mutex held, so no clockdomain structure manipulation
292 * functions should be called from the callback, although hardware
293 * clockdomain control functions are fine. Returns the last return
294 * value of the callback function, which should be 0 for success or
295 * anything else to indicate failure; or -EINVAL if the function pointer
296 * is null.
297 */
298int clkdm_for_each(int (*fn)(struct clockdomain *clkdm))
299{
300 struct clockdomain *clkdm;
301 int ret = 0;
302
303 if (!fn)
304 return -EINVAL;
305
306 mutex_lock(&clkdm_mutex);
307 list_for_each_entry(clkdm, &clkdm_list, node) {
308 ret = (*fn)(clkdm);
309 if (ret)
310 break;
311 }
312 mutex_unlock(&clkdm_mutex);
313
314 return ret;
315}
316
317
318/**
319 * clkdm_get_pwrdm - return a ptr to the pwrdm that this clkdm resides in
320 * @clkdm: struct clockdomain *
321 *
322 * Return a pointer to the struct powerdomain that the specified clockdomain
323 * 'clkdm' exists in, or returns NULL if clkdm argument is NULL.
324 */
325struct powerdomain *clkdm_get_pwrdm(struct clockdomain *clkdm)
326{
327 if (!clkdm)
328 return NULL;
329
330 return clkdm->pwrdm;
331}
332
333
334/* Hardware clockdomain control */
335
336/**
337 * omap2_clkdm_clktrctrl_read - read the clkdm's current state transition mode
338 * @clk: struct clk * of a clockdomain
339 *
340 * Return the clockdomain's current state transition mode from the
341 * corresponding domain CM_CLKSTCTRL register. Returns -EINVAL if clk
342 * is NULL or the current mode upon success.
343 */
344static int omap2_clkdm_clktrctrl_read(struct clockdomain *clkdm)
345{
346 u32 v;
347
348 if (!clkdm)
349 return -EINVAL;
350
351 v = cm_read_mod_reg(clkdm->pwrdm->prcm_offs, CM_CLKSTCTRL);
352 v &= clkdm->clktrctrl_mask;
353 v >>= __ffs(clkdm->clktrctrl_mask);
354
355 return v;
356}
357
358/**
359 * omap2_clkdm_sleep - force clockdomain sleep transition
360 * @clkdm: struct clockdomain *
361 *
362 * Instruct the CM to force a sleep transition on the specified
363 * clockdomain 'clkdm'. Returns -EINVAL if clk is NULL or if
364 * clockdomain does not support software-initiated sleep; 0 upon
365 * success.
366 */
367int omap2_clkdm_sleep(struct clockdomain *clkdm)
368{
369 if (!clkdm)
370 return -EINVAL;
371
372 if (!(clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) {
373 pr_debug("clockdomain: %s does not support forcing "
374 "sleep via software\n", clkdm->name);
375 return -EINVAL;
376 }
377
378 pr_debug("clockdomain: forcing sleep on %s\n", clkdm->name);
379
380 if (cpu_is_omap24xx()) {
381
382 cm_set_mod_reg_bits(OMAP24XX_FORCESTATE,
383 clkdm->pwrdm->prcm_offs, PM_PWSTCTRL);
384
385 } else if (cpu_is_omap34xx()) {
386
387 u32 v = (OMAP34XX_CLKSTCTRL_FORCE_SLEEP <<
388 __ffs(clkdm->clktrctrl_mask));
389
390 cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, v,
391 clkdm->pwrdm->prcm_offs, CM_CLKSTCTRL);
392
393 } else {
394 BUG();
395 };
396
397 return 0;
398}
399
400/**
401 * omap2_clkdm_wakeup - force clockdomain wakeup transition
402 * @clkdm: struct clockdomain *
403 *
404 * Instruct the CM to force a wakeup transition on the specified
405 * clockdomain 'clkdm'. Returns -EINVAL if clkdm is NULL or if the
406 * clockdomain does not support software-controlled wakeup; 0 upon
407 * success.
408 */
409int omap2_clkdm_wakeup(struct clockdomain *clkdm)
410{
411 if (!clkdm)
412 return -EINVAL;
413
414 if (!(clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)) {
415 pr_debug("clockdomain: %s does not support forcing "
416 "wakeup via software\n", clkdm->name);
417 return -EINVAL;
418 }
419
420 pr_debug("clockdomain: forcing wakeup on %s\n", clkdm->name);
421
422 if (cpu_is_omap24xx()) {
423
424 cm_clear_mod_reg_bits(OMAP24XX_FORCESTATE,
425 clkdm->pwrdm->prcm_offs, PM_PWSTCTRL);
426
427 } else if (cpu_is_omap34xx()) {
428
429 u32 v = (OMAP34XX_CLKSTCTRL_FORCE_WAKEUP <<
430 __ffs(clkdm->clktrctrl_mask));
431
432 cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, v,
433 clkdm->pwrdm->prcm_offs, CM_CLKSTCTRL);
434
435 } else {
436 BUG();
437 };
438
439 return 0;
440}
441
442/**
443 * omap2_clkdm_allow_idle - enable hwsup idle transitions for clkdm
444 * @clkdm: struct clockdomain *
445 *
446 * Allow the hardware to automatically switch the clockdomain into
447 * active or idle states, as needed by downstream clocks. If the
448 * clockdomain has any downstream clocks enabled in the clock
449 * framework, wkdep/sleepdep autodependencies are added; this is so
450 * device drivers can read and write to the device. No return value.
451 */
452void omap2_clkdm_allow_idle(struct clockdomain *clkdm)
453{
454 u32 v;
455
456 if (!clkdm)
457 return;
458
459 if (!(clkdm->flags & CLKDM_CAN_ENABLE_AUTO)) {
460 pr_debug("clock: automatic idle transitions cannot be enabled "
461 "on clockdomain %s\n", clkdm->name);
462 return;
463 }
464
465 pr_debug("clockdomain: enabling automatic idle transitions for %s\n",
466 clkdm->name);
467
468 if (atomic_read(&clkdm->usecount) > 0)
469 _clkdm_add_autodeps(clkdm);
470
471 if (cpu_is_omap24xx())
472 v = OMAP24XX_CLKSTCTRL_ENABLE_AUTO;
473 else if (cpu_is_omap34xx())
474 v = OMAP34XX_CLKSTCTRL_ENABLE_AUTO;
475 else
476 BUG();
477
478
479 cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask,
480 v << __ffs(clkdm->clktrctrl_mask),
481 clkdm->pwrdm->prcm_offs,
482 CM_CLKSTCTRL);
483}
484
485/**
486 * omap2_clkdm_deny_idle - disable hwsup idle transitions for clkdm
487 * @clkdm: struct clockdomain *
488 *
489 * Prevent the hardware from automatically switching the clockdomain
490 * into inactive or idle states. If the clockdomain has downstream
491 * clocks enabled in the clock framework, wkdep/sleepdep
492 * autodependencies are removed. No return value.
493 */
494void omap2_clkdm_deny_idle(struct clockdomain *clkdm)
495{
496 u32 v;
497
498 if (!clkdm)
499 return;
500
501 if (!(clkdm->flags & CLKDM_CAN_DISABLE_AUTO)) {
502 pr_debug("clockdomain: automatic idle transitions cannot be "
503 "disabled on %s\n", clkdm->name);
504 return;
505 }
506
507 pr_debug("clockdomain: disabling automatic idle transitions for %s\n",
508 clkdm->name);
509
510 if (cpu_is_omap24xx())
511 v = OMAP24XX_CLKSTCTRL_DISABLE_AUTO;
512 else if (cpu_is_omap34xx())
513 v = OMAP34XX_CLKSTCTRL_DISABLE_AUTO;
514 else
515 BUG();
516
517 cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask,
518 v << __ffs(clkdm->clktrctrl_mask),
519 clkdm->pwrdm->prcm_offs, CM_CLKSTCTRL);
520
521 if (atomic_read(&clkdm->usecount) > 0)
522 _clkdm_del_autodeps(clkdm);
523}
524
525
526/* Clockdomain-to-clock framework interface code */
527
528/**
529 * omap2_clkdm_clk_enable - add an enabled downstream clock to this clkdm
530 * @clkdm: struct clockdomain *
531 * @clk: struct clk * of the enabled downstream clock
532 *
533 * Increment the usecount of this clockdomain 'clkdm' and ensure that
534 * it is awake. Intended to be called by clk_enable() code. If the
535 * clockdomain is in software-supervised idle mode, force the
536 * clockdomain to wake. If the clockdomain is in hardware-supervised
537 * idle mode, add clkdm-pwrdm autodependencies, to ensure that devices
538 * in the clockdomain can be read from/written to by on-chip processors.
539 * Returns -EINVAL if passed null pointers; returns 0 upon success or
540 * if the clockdomain is in hwsup idle mode.
541 */
542int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
543{
544 int v;
545
546 /*
547 * XXX Rewrite this code to maintain a list of enabled
548 * downstream clocks for debugging purposes?
549 */
550
551 if (!clkdm || !clk)
552 return -EINVAL;
553
554 if (atomic_inc_return(&clkdm->usecount) > 1)
555 return 0;
556
557 /* Clockdomain now has one enabled downstream clock */
558
559 pr_debug("clockdomain: clkdm %s: clk %s now enabled\n", clkdm->name,
560 clk->name);
561
562 v = omap2_clkdm_clktrctrl_read(clkdm);
563
564 if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ||
565 (cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO))
566 _clkdm_add_autodeps(clkdm);
567 else
568 omap2_clkdm_wakeup(clkdm);
569
570 return 0;
571}
572
573/**
574 * omap2_clkdm_clk_disable - remove an enabled downstream clock from this clkdm
575 * @clkdm: struct clockdomain *
576 * @clk: struct clk * of the disabled downstream clock
577 *
578 * Decrement the usecount of this clockdomain 'clkdm'. Intended to be
579 * called by clk_disable() code. If the usecount goes to 0, put the
580 * clockdomain to sleep (software-supervised mode) or remove the
581 * clkdm-pwrdm autodependencies (hardware-supervised mode). Returns
582 * -EINVAL if passed null pointers; -ERANGE if the clkdm usecount
583 * underflows and debugging is enabled; or returns 0 upon success or
584 * if the clockdomain is in hwsup idle mode.
585 */
586int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk)
587{
588 int v;
589
590 /*
591 * XXX Rewrite this code to maintain a list of enabled
592 * downstream clocks for debugging purposes?
593 */
594
595 if (!clkdm || !clk)
596 return -EINVAL;
597
598#ifdef DEBUG
599 if (atomic_read(&clkdm->usecount) == 0) {
600 WARN_ON(1); /* underflow */
601 return -ERANGE;
602 }
603#endif
604
605 if (atomic_dec_return(&clkdm->usecount) > 0)
606 return 0;
607
608 /* All downstream clocks of this clockdomain are now disabled */
609
610 pr_debug("clockdomain: clkdm %s: clk %s now disabled\n", clkdm->name,
611 clk->name);
612
613 v = omap2_clkdm_clktrctrl_read(clkdm);
614
615 if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ||
616 (cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO))
617 _clkdm_del_autodeps(clkdm);
618 else
619 omap2_clkdm_sleep(clkdm);
620
621 return 0;
622}
623
diff --git a/arch/arm/mach-omap2/clockdomains.h b/arch/arm/mach-omap2/clockdomains.h
new file mode 100644
index 000000000000..cd86dcc7b424
--- /dev/null
+++ b/arch/arm/mach-omap2/clockdomains.h
@@ -0,0 +1,305 @@
1/*
2 * OMAP2/3 clockdomains
3 *
4 * Copyright (C) 2008 Texas Instruments, Inc.
5 * Copyright (C) 2008 Nokia Corporation
6 *
7 * Written by Paul Walmsley
8 */
9
10#ifndef __ARCH_ARM_MACH_OMAP2_CLOCKDOMAINS_H
11#define __ARCH_ARM_MACH_OMAP2_CLOCKDOMAINS_H
12
13#include <mach/clockdomain.h>
14
15/*
16 * OMAP2/3-common clockdomains
17 */
18
19/* This is an implicit clockdomain - it is never defined as such in TRM */
20static struct clockdomain wkup_clkdm = {
21 .name = "wkup_clkdm",
22 .pwrdm_name = "wkup_pwrdm",
23 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430),
24};
25
26/*
27 * 2420-only clockdomains
28 */
29
30#if defined(CONFIG_ARCH_OMAP2420)
31
32static struct clockdomain mpu_2420_clkdm = {
33 .name = "mpu_clkdm",
34 .pwrdm_name = "mpu_pwrdm",
35 .flags = CLKDM_CAN_HWSUP,
36 .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK,
37 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
38};
39
40static struct clockdomain iva1_2420_clkdm = {
41 .name = "iva1_clkdm",
42 .pwrdm_name = "dsp_pwrdm",
43 .flags = CLKDM_CAN_HWSUP_SWSUP,
44 .clktrctrl_mask = OMAP2420_AUTOSTATE_IVA_MASK,
45 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
46};
47
48#endif /* CONFIG_ARCH_OMAP2420 */
49
50
51/*
52 * 2430-only clockdomains
53 */
54
55#if defined(CONFIG_ARCH_OMAP2430)
56
57static struct clockdomain mpu_2430_clkdm = {
58 .name = "mpu_clkdm",
59 .pwrdm_name = "mpu_pwrdm",
60 .flags = CLKDM_CAN_HWSUP_SWSUP,
61 .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK,
62 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
63};
64
65static struct clockdomain mdm_clkdm = {
66 .name = "mdm_clkdm",
67 .pwrdm_name = "mdm_pwrdm",
68 .flags = CLKDM_CAN_HWSUP_SWSUP,
69 .clktrctrl_mask = OMAP2430_AUTOSTATE_MDM_MASK,
70 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
71};
72
73#endif /* CONFIG_ARCH_OMAP2430 */
74
75
76/*
77 * 24XX-only clockdomains
78 */
79
80#if defined(CONFIG_ARCH_OMAP24XX)
81
82static struct clockdomain dsp_clkdm = {
83 .name = "dsp_clkdm",
84 .pwrdm_name = "dsp_pwrdm",
85 .flags = CLKDM_CAN_HWSUP_SWSUP,
86 .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSP_MASK,
87 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX),
88};
89
90static struct clockdomain gfx_24xx_clkdm = {
91 .name = "gfx_clkdm",
92 .pwrdm_name = "gfx_pwrdm",
93 .flags = CLKDM_CAN_HWSUP_SWSUP,
94 .clktrctrl_mask = OMAP24XX_AUTOSTATE_GFX_MASK,
95 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX),
96};
97
98static struct clockdomain core_l3_24xx_clkdm = {
99 .name = "core_l3_clkdm",
100 .pwrdm_name = "core_pwrdm",
101 .flags = CLKDM_CAN_HWSUP,
102 .clktrctrl_mask = OMAP24XX_AUTOSTATE_L3_MASK,
103 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX),
104};
105
106static struct clockdomain core_l4_24xx_clkdm = {
107 .name = "core_l4_clkdm",
108 .pwrdm_name = "core_pwrdm",
109 .flags = CLKDM_CAN_HWSUP,
110 .clktrctrl_mask = OMAP24XX_AUTOSTATE_L4_MASK,
111 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX),
112};
113
114static struct clockdomain dss_24xx_clkdm = {
115 .name = "dss_clkdm",
116 .pwrdm_name = "core_pwrdm",
117 .flags = CLKDM_CAN_HWSUP,
118 .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSS_MASK,
119 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX),
120};
121
122#endif /* CONFIG_ARCH_OMAP24XX */
123
124
125/*
126 * 34xx clockdomains
127 */
128
129#if defined(CONFIG_ARCH_OMAP34XX)
130
131static struct clockdomain mpu_34xx_clkdm = {
132 .name = "mpu_clkdm",
133 .pwrdm_name = "mpu_pwrdm",
134 .flags = CLKDM_CAN_HWSUP | CLKDM_CAN_FORCE_WAKEUP,
135 .clktrctrl_mask = OMAP3430_CLKTRCTRL_MPU_MASK,
136 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
137};
138
139static struct clockdomain neon_clkdm = {
140 .name = "neon_clkdm",
141 .pwrdm_name = "neon_pwrdm",
142 .flags = CLKDM_CAN_HWSUP_SWSUP,
143 .clktrctrl_mask = OMAP3430_CLKTRCTRL_NEON_MASK,
144 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
145};
146
147static struct clockdomain iva2_clkdm = {
148 .name = "iva2_clkdm",
149 .pwrdm_name = "iva2_pwrdm",
150 .flags = CLKDM_CAN_HWSUP_SWSUP,
151 .clktrctrl_mask = OMAP3430_CLKTRCTRL_IVA2_MASK,
152 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
153};
154
155static struct clockdomain gfx_3430es1_clkdm = {
156 .name = "gfx_clkdm",
157 .pwrdm_name = "gfx_pwrdm",
158 .flags = CLKDM_CAN_HWSUP_SWSUP,
159 .clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_GFX_MASK,
160 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1),
161};
162
163static struct clockdomain sgx_clkdm = {
164 .name = "sgx_clkdm",
165 .pwrdm_name = "sgx_pwrdm",
166 .flags = CLKDM_CAN_HWSUP_SWSUP,
167 .clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_SGX_MASK,
168 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2),
169};
170
171/*
172 * The die-to-die clockdomain was documented in the 34xx ES1 TRM, but
173 * then that information was removed from the 34xx ES2+ TRM. It is
174 * unclear whether the core is still there, but the clockdomain logic
175 * is there, and must be programmed to an appropriate state if the
176 * CORE clockdomain is to become inactive.
177 */
178static struct clockdomain d2d_clkdm = {
179 .name = "d2d_clkdm",
180 .pwrdm_name = "core_pwrdm",
181 .flags = CLKDM_CAN_HWSUP,
182 .clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_D2D_MASK,
183 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
184};
185
186static struct clockdomain core_l3_34xx_clkdm = {
187 .name = "core_l3_clkdm",
188 .pwrdm_name = "core_pwrdm",
189 .flags = CLKDM_CAN_HWSUP,
190 .clktrctrl_mask = OMAP3430_CLKTRCTRL_L3_MASK,
191 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
192};
193
194static struct clockdomain core_l4_34xx_clkdm = {
195 .name = "core_l4_clkdm",
196 .pwrdm_name = "core_pwrdm",
197 .flags = CLKDM_CAN_HWSUP,
198 .clktrctrl_mask = OMAP3430_CLKTRCTRL_L4_MASK,
199 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
200};
201
202static struct clockdomain dss_34xx_clkdm = {
203 .name = "dss_clkdm",
204 .pwrdm_name = "dss_pwrdm",
205 .flags = CLKDM_CAN_HWSUP_SWSUP,
206 .clktrctrl_mask = OMAP3430_CLKTRCTRL_DSS_MASK,
207 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
208};
209
210static struct clockdomain cam_clkdm = {
211 .name = "cam_clkdm",
212 .pwrdm_name = "cam_pwrdm",
213 .flags = CLKDM_CAN_HWSUP_SWSUP,
214 .clktrctrl_mask = OMAP3430_CLKTRCTRL_CAM_MASK,
215 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
216};
217
218static struct clockdomain usbhost_clkdm = {
219 .name = "usbhost_clkdm",
220 .pwrdm_name = "usbhost_pwrdm",
221 .flags = CLKDM_CAN_HWSUP_SWSUP,
222 .clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_USBHOST_MASK,
223 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2),
224};
225
226static struct clockdomain per_clkdm = {
227 .name = "per_clkdm",
228 .pwrdm_name = "per_pwrdm",
229 .flags = CLKDM_CAN_HWSUP_SWSUP,
230 .clktrctrl_mask = OMAP3430_CLKTRCTRL_PER_MASK,
231 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
232};
233
234static struct clockdomain emu_clkdm = {
235 .name = "emu_clkdm",
236 .pwrdm_name = "emu_pwrdm",
237 .flags = CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_SWSUP,
238 .clktrctrl_mask = OMAP3430_CLKTRCTRL_EMU_MASK,
239 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
240};
241
242#endif /* CONFIG_ARCH_OMAP34XX */
243
244/*
245 * Clockdomain-powerdomain hwsup dependencies (34XX only)
246 */
247
248static struct clkdm_pwrdm_autodep clkdm_pwrdm_autodeps[] = {
249 {
250 .pwrdm_name = "mpu_pwrdm",
251 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
252 },
253 {
254 .pwrdm_name = "iva2_pwrdm",
255 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
256 },
257 { NULL }
258};
259
260/*
261 *
262 */
263
264static struct clockdomain *clockdomains_omap[] = {
265
266 &wkup_clkdm,
267
268#ifdef CONFIG_ARCH_OMAP2420
269 &mpu_2420_clkdm,
270 &iva1_2420_clkdm,
271#endif
272
273#ifdef CONFIG_ARCH_OMAP2430
274 &mpu_2430_clkdm,
275 &mdm_clkdm,
276#endif
277
278#ifdef CONFIG_ARCH_OMAP24XX
279 &dsp_clkdm,
280 &gfx_24xx_clkdm,
281 &core_l3_24xx_clkdm,
282 &core_l4_24xx_clkdm,
283 &dss_24xx_clkdm,
284#endif
285
286#ifdef CONFIG_ARCH_OMAP34XX
287 &mpu_34xx_clkdm,
288 &neon_clkdm,
289 &iva2_clkdm,
290 &gfx_3430es1_clkdm,
291 &sgx_clkdm,
292 &d2d_clkdm,
293 &core_l3_34xx_clkdm,
294 &core_l4_34xx_clkdm,
295 &dss_34xx_clkdm,
296 &cam_clkdm,
297 &usbhost_clkdm,
298 &per_clkdm,
299 &emu_clkdm,
300#endif
301
302 NULL,
303};
304
305#endif
diff --git a/arch/arm/mach-omap2/cm-regbits-24xx.h b/arch/arm/mach-omap2/cm-regbits-24xx.h
index 20ac38100678..1098ecfab861 100644
--- a/arch/arm/mach-omap2/cm-regbits-24xx.h
+++ b/arch/arm/mach-omap2/cm-regbits-24xx.h
@@ -63,7 +63,8 @@
63#define OMAP24XX_CLKSEL_MPU_MASK (0x1f << 0) 63#define OMAP24XX_CLKSEL_MPU_MASK (0x1f << 0)
64 64
65/* CM_CLKSTCTRL_MPU */ 65/* CM_CLKSTCTRL_MPU */
66#define OMAP24XX_AUTOSTATE_MPU (1 << 0) 66#define OMAP24XX_AUTOSTATE_MPU_SHIFT 0
67#define OMAP24XX_AUTOSTATE_MPU_MASK (1 << 0)
67 68
68/* CM_FCLKEN1_CORE specific bits*/ 69/* CM_FCLKEN1_CORE specific bits*/
69#define OMAP24XX_EN_TV_SHIFT 2 70#define OMAP24XX_EN_TV_SHIFT 2
@@ -238,9 +239,12 @@
238#define OMAP24XX_CLKSEL_GPT2_MASK (0x3 << 2) 239#define OMAP24XX_CLKSEL_GPT2_MASK (0x3 << 2)
239 240
240/* CM_CLKSTCTRL_CORE */ 241/* CM_CLKSTCTRL_CORE */
241#define OMAP24XX_AUTOSTATE_DSS (1 << 2) 242#define OMAP24XX_AUTOSTATE_DSS_SHIFT 2
242#define OMAP24XX_AUTOSTATE_L4 (1 << 1) 243#define OMAP24XX_AUTOSTATE_DSS_MASK (1 << 2)
243#define OMAP24XX_AUTOSTATE_L3 (1 << 0) 244#define OMAP24XX_AUTOSTATE_L4_SHIFT 1
245#define OMAP24XX_AUTOSTATE_L4_MASK (1 << 1)
246#define OMAP24XX_AUTOSTATE_L3_SHIFT 0
247#define OMAP24XX_AUTOSTATE_L3_MASK (1 << 0)
244 248
245/* CM_FCLKEN_GFX */ 249/* CM_FCLKEN_GFX */
246#define OMAP24XX_EN_3D_SHIFT 2 250#define OMAP24XX_EN_3D_SHIFT 2
@@ -255,7 +259,8 @@
255/* CM_CLKSEL_GFX specific bits */ 259/* CM_CLKSEL_GFX specific bits */
256 260
257/* CM_CLKSTCTRL_GFX */ 261/* CM_CLKSTCTRL_GFX */
258#define OMAP24XX_AUTOSTATE_GFX (1 << 0) 262#define OMAP24XX_AUTOSTATE_GFX_SHIFT 0
263#define OMAP24XX_AUTOSTATE_GFX_MASK (1 << 0)
259 264
260/* CM_FCLKEN_WKUP specific bits */ 265/* CM_FCLKEN_WKUP specific bits */
261 266
@@ -367,8 +372,10 @@
367#define OMAP24XX_CLKSEL_DSP_MASK (0x1f << 0) 372#define OMAP24XX_CLKSEL_DSP_MASK (0x1f << 0)
368 373
369/* CM_CLKSTCTRL_DSP */ 374/* CM_CLKSTCTRL_DSP */
370#define OMAP2420_AUTOSTATE_IVA (1 << 8) 375#define OMAP2420_AUTOSTATE_IVA_SHIFT 8
371#define OMAP24XX_AUTOSTATE_DSP (1 << 0) 376#define OMAP2420_AUTOSTATE_IVA_MASK (1 << 8)
377#define OMAP24XX_AUTOSTATE_DSP_SHIFT 0
378#define OMAP24XX_AUTOSTATE_DSP_MASK (1 << 0)
372 379
373/* CM_FCLKEN_MDM */ 380/* CM_FCLKEN_MDM */
374/* 2430 only */ 381/* 2430 only */
@@ -396,6 +403,7 @@
396 403
397/* CM_CLKSTCTRL_MDM */ 404/* CM_CLKSTCTRL_MDM */
398/* 2430 only */ 405/* 2430 only */
399#define OMAP2430_AUTOSTATE_MDM (1 << 0) 406#define OMAP2430_AUTOSTATE_MDM_SHIFT 0
407#define OMAP2430_AUTOSTATE_MDM_MASK (1 << 0)
400 408
401#endif 409#endif
diff --git a/arch/arm/mach-omap2/cm-regbits-34xx.h b/arch/arm/mach-omap2/cm-regbits-34xx.h
index ee4c0ca1a708..219f5c8d9659 100644
--- a/arch/arm/mach-omap2/cm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/cm-regbits-34xx.h
@@ -96,7 +96,8 @@
96#define OMAP3430_CLKTRCTRL_IVA2_MASK (0x3 << 0) 96#define OMAP3430_CLKTRCTRL_IVA2_MASK (0x3 << 0)
97 97
98/* CM_CLKSTST_IVA2 */ 98/* CM_CLKSTST_IVA2 */
99#define OMAP3430_CLKACTIVITY_IVA2 (1 << 0) 99#define OMAP3430_CLKACTIVITY_IVA2_SHIFT 0
100#define OMAP3430_CLKACTIVITY_IVA2_MASK (1 << 0)
100 101
101/* CM_REVISION specific bits */ 102/* CM_REVISION specific bits */
102 103
@@ -140,7 +141,8 @@
140#define OMAP3430_CLKTRCTRL_MPU_MASK (0x3 << 0) 141#define OMAP3430_CLKTRCTRL_MPU_MASK (0x3 << 0)
141 142
142/* CM_CLKSTST_MPU */ 143/* CM_CLKSTST_MPU */
143#define OMAP3430_CLKACTIVITY_MPU (1 << 0) 144#define OMAP3430_CLKACTIVITY_MPU_SHIFT 0
145#define OMAP3430_CLKACTIVITY_MPU_MASK (1 << 0)
144 146
145/* CM_FCLKEN1_CORE specific bits */ 147/* CM_FCLKEN1_CORE specific bits */
146 148
@@ -300,9 +302,12 @@
300#define OMAP3430_CLKTRCTRL_L3_MASK (0x3 << 0) 302#define OMAP3430_CLKTRCTRL_L3_MASK (0x3 << 0)
301 303
302/* CM_CLKSTST_CORE */ 304/* CM_CLKSTST_CORE */
303#define OMAP3430ES1_CLKACTIVITY_D2D (1 << 2) 305#define OMAP3430ES1_CLKACTIVITY_D2D_SHIFT 2
304#define OMAP3430_CLKACTIVITY_L4 (1 << 1) 306#define OMAP3430ES1_CLKACTIVITY_D2D_MASK (1 << 2)
305#define OMAP3430_CLKACTIVITY_L3 (1 << 0) 307#define OMAP3430_CLKACTIVITY_L4_SHIFT 1
308#define OMAP3430_CLKACTIVITY_L4_MASK (1 << 1)
309#define OMAP3430_CLKACTIVITY_L3_SHIFT 0
310#define OMAP3430_CLKACTIVITY_L3_MASK (1 << 0)
306 311
307/* CM_FCLKEN_GFX */ 312/* CM_FCLKEN_GFX */
308#define OMAP3430ES1_EN_3D (1 << 2) 313#define OMAP3430ES1_EN_3D (1 << 2)
@@ -323,7 +328,8 @@
323#define OMAP3430ES1_CLKTRCTRL_GFX_MASK (0x3 << 0) 328#define OMAP3430ES1_CLKTRCTRL_GFX_MASK (0x3 << 0)
324 329
325/* CM_CLKSTST_GFX */ 330/* CM_CLKSTST_GFX */
326#define OMAP3430ES1_CLKACTIVITY_GFX (1 << 0) 331#define OMAP3430ES1_CLKACTIVITY_GFX_SHIFT 0
332#define OMAP3430ES1_CLKACTIVITY_GFX_MASK (1 << 0)
327 333
328/* CM_FCLKEN_SGX */ 334/* CM_FCLKEN_SGX */
329#define OMAP3430ES2_EN_SGX_SHIFT 1 335#define OMAP3430ES2_EN_SGX_SHIFT 1
@@ -333,6 +339,14 @@
333#define OMAP3430ES2_CLKSEL_SGX_SHIFT 0 339#define OMAP3430ES2_CLKSEL_SGX_SHIFT 0
334#define OMAP3430ES2_CLKSEL_SGX_MASK (0x7 << 0) 340#define OMAP3430ES2_CLKSEL_SGX_MASK (0x7 << 0)
335 341
342/* CM_CLKSTCTRL_SGX */
343#define OMAP3430ES2_CLKTRCTRL_SGX_SHIFT 0
344#define OMAP3430ES2_CLKTRCTRL_SGX_MASK (0x3 << 0)
345
346/* CM_CLKSTST_SGX */
347#define OMAP3430ES2_CLKACTIVITY_SGX_SHIFT 0
348#define OMAP3430ES2_CLKACTIVITY_SGX_MASK (1 << 0)
349
336/* CM_FCLKEN_WKUP specific bits */ 350/* CM_FCLKEN_WKUP specific bits */
337#define OMAP3430ES2_EN_USIMOCP_SHIFT 9 351#define OMAP3430ES2_EN_USIMOCP_SHIFT 9
338 352
@@ -498,7 +512,8 @@
498#define OMAP3430_CLKTRCTRL_DSS_MASK (0x3 << 0) 512#define OMAP3430_CLKTRCTRL_DSS_MASK (0x3 << 0)
499 513
500/* CM_CLKSTST_DSS */ 514/* CM_CLKSTST_DSS */
501#define OMAP3430_CLKACTIVITY_DSS (1 << 0) 515#define OMAP3430_CLKACTIVITY_DSS_SHIFT 0
516#define OMAP3430_CLKACTIVITY_DSS_MASK (1 << 0)
502 517
503/* CM_FCLKEN_CAM specific bits */ 518/* CM_FCLKEN_CAM specific bits */
504 519
@@ -522,7 +537,8 @@
522#define OMAP3430_CLKTRCTRL_CAM_MASK (0x3 << 0) 537#define OMAP3430_CLKTRCTRL_CAM_MASK (0x3 << 0)
523 538
524/* CM_CLKSTST_CAM */ 539/* CM_CLKSTST_CAM */
525#define OMAP3430_CLKACTIVITY_CAM (1 << 0) 540#define OMAP3430_CLKACTIVITY_CAM_SHIFT 0
541#define OMAP3430_CLKACTIVITY_CAM_MASK (1 << 0)
526 542
527/* CM_FCLKEN_PER specific bits */ 543/* CM_FCLKEN_PER specific bits */
528 544
@@ -598,7 +614,8 @@
598#define OMAP3430_CLKTRCTRL_PER_MASK (0x3 << 0) 614#define OMAP3430_CLKTRCTRL_PER_MASK (0x3 << 0)
599 615
600/* CM_CLKSTST_PER */ 616/* CM_CLKSTST_PER */
601#define OMAP3430_CLKACTIVITY_PER (1 << 0) 617#define OMAP3430_CLKACTIVITY_PER_SHIFT 0
618#define OMAP3430_CLKACTIVITY_PER_MASK (1 << 0)
602 619
603/* CM_CLKSEL1_EMU */ 620/* CM_CLKSEL1_EMU */
604#define OMAP3430_DIV_DPLL4_SHIFT 24 621#define OMAP3430_DIV_DPLL4_SHIFT 24
@@ -623,7 +640,8 @@
623#define OMAP3430_CLKTRCTRL_EMU_MASK (0x3 << 0) 640#define OMAP3430_CLKTRCTRL_EMU_MASK (0x3 << 0)
624 641
625/* CM_CLKSTST_EMU */ 642/* CM_CLKSTST_EMU */
626#define OMAP3430_CLKACTIVITY_EMU (1 << 0) 643#define OMAP3430_CLKACTIVITY_EMU_SHIFT 0
644#define OMAP3430_CLKACTIVITY_EMU_MASK (1 << 0)
627 645
628/* CM_CLKSEL2_EMU specific bits */ 646/* CM_CLKSEL2_EMU specific bits */
629#define OMAP3430_CORE_DPLL_EMU_MULT_SHIFT 8 647#define OMAP3430_CORE_DPLL_EMU_MULT_SHIFT 8
@@ -673,6 +691,8 @@
673#define OMAP3430ES2_CLKTRCTRL_USBHOST_SHIFT 0 691#define OMAP3430ES2_CLKTRCTRL_USBHOST_SHIFT 0
674#define OMAP3430ES2_CLKTRCTRL_USBHOST_MASK (3 << 0) 692#define OMAP3430ES2_CLKTRCTRL_USBHOST_MASK (3 << 0)
675 693
676 694/* CM_CLKSTST_USBHOST */
695#define OMAP3430ES2_CLKACTIVITY_USBHOST_SHIFT 0
696#define OMAP3430ES2_CLKACTIVITY_USBHOST_MASK (1 << 0)
677 697
678#endif 698#endif
diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index 87a44c715aa4..65fdf78c91e1 100644
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -18,7 +18,7 @@
18 18
19#ifndef __ASSEMBLER__ 19#ifndef __ASSEMBLER__
20#define OMAP_CM_REGADDR(module, reg) \ 20#define OMAP_CM_REGADDR(module, reg) \
21 (void __iomem *)IO_ADDRESS(OMAP2_CM_BASE + (module) + (reg)) 21 IO_ADDRESS(OMAP2_CM_BASE + (module) + (reg))
22#else 22#else
23#define OMAP2420_CM_REGADDR(module, reg) \ 23#define OMAP2420_CM_REGADDR(module, reg) \
24 IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg)) 24 IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg))
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 2ee954a0bc7c..90af2ac469aa 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -23,50 +23,7 @@
23#include <mach/board.h> 23#include <mach/board.h>
24#include <mach/mux.h> 24#include <mach/mux.h>
25#include <mach/gpio.h> 25#include <mach/gpio.h>
26 26#include <mach/eac.h>
27#if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE)
28
29#define OMAP2_I2C_BASE2 0x48072000
30#define OMAP2_I2C_INT2 57
31
32static struct resource i2c_resources2[] = {
33 {
34 .start = OMAP2_I2C_BASE2,
35 .end = OMAP2_I2C_BASE2 + 0x3f,
36 .flags = IORESOURCE_MEM,
37 },
38 {
39 .start = OMAP2_I2C_INT2,
40 .flags = IORESOURCE_IRQ,
41 },
42};
43
44static struct platform_device omap_i2c_device2 = {
45 .name = "i2c_omap",
46 .id = 2,
47 .num_resources = ARRAY_SIZE(i2c_resources2),
48 .resource = i2c_resources2,
49};
50
51/* See also arch/arm/plat-omap/devices.c for first I2C on 24xx */
52static void omap_init_i2c(void)
53{
54 /* REVISIT: Second I2C not in use on H4? */
55 if (machine_is_omap_h4())
56 return;
57
58 if (!cpu_is_omap2430()) {
59 omap_cfg_reg(J15_24XX_I2C2_SCL);
60 omap_cfg_reg(H19_24XX_I2C2_SDA);
61 }
62 (void) platform_device_register(&omap_i2c_device2);
63}
64
65#else
66
67static void omap_init_i2c(void) {}
68
69#endif
70 27
71#if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE) 28#if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE)
72#define OMAP2_MBOX_BASE IO_ADDRESS(OMAP24XX_MAILBOX_BASE) 29#define OMAP2_MBOX_BASE IO_ADDRESS(OMAP24XX_MAILBOX_BASE)
@@ -104,7 +61,9 @@ static inline void omap_init_mbox(void) { }
104 61
105#if defined(CONFIG_OMAP_STI) 62#if defined(CONFIG_OMAP_STI)
106 63
107#define OMAP2_STI_BASE IO_ADDRESS(0x48068000) 64#if defined(CONFIG_ARCH_OMAP2)
65
66#define OMAP2_STI_BASE 0x48068000
108#define OMAP2_STI_CHANNEL_BASE 0x54000000 67#define OMAP2_STI_CHANNEL_BASE 0x54000000
109#define OMAP2_STI_IRQ 4 68#define OMAP2_STI_IRQ 4
110 69
@@ -124,6 +83,25 @@ static struct resource sti_resources[] = {
124 .flags = IORESOURCE_IRQ, 83 .flags = IORESOURCE_IRQ,
125 } 84 }
126}; 85};
86#elif defined(CONFIG_ARCH_OMAP3)
87
88#define OMAP3_SDTI_BASE 0x54500000
89#define OMAP3_SDTI_CHANNEL_BASE 0x54600000
90
91static struct resource sti_resources[] = {
92 {
93 .start = OMAP3_SDTI_BASE,
94 .end = OMAP3_SDTI_BASE + 0xFFF,
95 .flags = IORESOURCE_MEM,
96 },
97 {
98 .start = OMAP3_SDTI_CHANNEL_BASE,
99 .end = OMAP3_SDTI_CHANNEL_BASE + SZ_1M - 1,
100 .flags = IORESOURCE_MEM,
101 }
102};
103
104#endif
127 105
128static struct platform_device sti_device = { 106static struct platform_device sti_device = {
129 .name = "sti", 107 .name = "sti",
@@ -140,12 +118,14 @@ static inline void omap_init_sti(void)
140static inline void omap_init_sti(void) {} 118static inline void omap_init_sti(void) {}
141#endif 119#endif
142 120
143#if defined(CONFIG_SPI_OMAP24XX) 121#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
144 122
145#include <mach/mcspi.h> 123#include <mach/mcspi.h>
146 124
147#define OMAP2_MCSPI1_BASE 0x48098000 125#define OMAP2_MCSPI1_BASE 0x48098000
148#define OMAP2_MCSPI2_BASE 0x4809a000 126#define OMAP2_MCSPI2_BASE 0x4809a000
127#define OMAP2_MCSPI3_BASE 0x480b8000
128#define OMAP2_MCSPI4_BASE 0x480ba000
149 129
150static struct omap2_mcspi_platform_config omap2_mcspi1_config = { 130static struct omap2_mcspi_platform_config omap2_mcspi1_config = {
151 .num_cs = 4, 131 .num_cs = 4,
@@ -159,7 +139,7 @@ static struct resource omap2_mcspi1_resources[] = {
159 }, 139 },
160}; 140};
161 141
162struct platform_device omap2_mcspi1 = { 142static struct platform_device omap2_mcspi1 = {
163 .name = "omap2_mcspi", 143 .name = "omap2_mcspi",
164 .id = 1, 144 .id = 1,
165 .num_resources = ARRAY_SIZE(omap2_mcspi1_resources), 145 .num_resources = ARRAY_SIZE(omap2_mcspi1_resources),
@@ -181,7 +161,7 @@ static struct resource omap2_mcspi2_resources[] = {
181 }, 161 },
182}; 162};
183 163
184struct platform_device omap2_mcspi2 = { 164static struct platform_device omap2_mcspi2 = {
185 .name = "omap2_mcspi", 165 .name = "omap2_mcspi",
186 .id = 2, 166 .id = 2,
187 .num_resources = ARRAY_SIZE(omap2_mcspi2_resources), 167 .num_resources = ARRAY_SIZE(omap2_mcspi2_resources),
@@ -191,16 +171,162 @@ struct platform_device omap2_mcspi2 = {
191 }, 171 },
192}; 172};
193 173
174#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3)
175static struct omap2_mcspi_platform_config omap2_mcspi3_config = {
176 .num_cs = 2,
177};
178
179static struct resource omap2_mcspi3_resources[] = {
180 {
181 .start = OMAP2_MCSPI3_BASE,
182 .end = OMAP2_MCSPI3_BASE + 0xff,
183 .flags = IORESOURCE_MEM,
184 },
185};
186
187static struct platform_device omap2_mcspi3 = {
188 .name = "omap2_mcspi",
189 .id = 3,
190 .num_resources = ARRAY_SIZE(omap2_mcspi3_resources),
191 .resource = omap2_mcspi3_resources,
192 .dev = {
193 .platform_data = &omap2_mcspi3_config,
194 },
195};
196#endif
197
198#ifdef CONFIG_ARCH_OMAP3
199static struct omap2_mcspi_platform_config omap2_mcspi4_config = {
200 .num_cs = 1,
201};
202
203static struct resource omap2_mcspi4_resources[] = {
204 {
205 .start = OMAP2_MCSPI4_BASE,
206 .end = OMAP2_MCSPI4_BASE + 0xff,
207 .flags = IORESOURCE_MEM,
208 },
209};
210
211static struct platform_device omap2_mcspi4 = {
212 .name = "omap2_mcspi",
213 .id = 4,
214 .num_resources = ARRAY_SIZE(omap2_mcspi4_resources),
215 .resource = omap2_mcspi4_resources,
216 .dev = {
217 .platform_data = &omap2_mcspi4_config,
218 },
219};
220#endif
221
194static void omap_init_mcspi(void) 222static void omap_init_mcspi(void)
195{ 223{
196 platform_device_register(&omap2_mcspi1); 224 platform_device_register(&omap2_mcspi1);
197 platform_device_register(&omap2_mcspi2); 225 platform_device_register(&omap2_mcspi2);
226#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3)
227 platform_device_register(&omap2_mcspi3);
228#endif
229#ifdef CONFIG_ARCH_OMAP3
230 platform_device_register(&omap2_mcspi4);
231#endif
198} 232}
199 233
200#else 234#else
201static inline void omap_init_mcspi(void) {} 235static inline void omap_init_mcspi(void) {}
202#endif 236#endif
203 237
238#ifdef CONFIG_SND_OMAP24XX_EAC
239
240#define OMAP2_EAC_BASE 0x48090000
241
242static struct resource omap2_eac_resources[] = {
243 {
244 .start = OMAP2_EAC_BASE,
245 .end = OMAP2_EAC_BASE + 0x109,
246 .flags = IORESOURCE_MEM,
247 },
248};
249
250static struct platform_device omap2_eac_device = {
251 .name = "omap24xx-eac",
252 .id = -1,
253 .num_resources = ARRAY_SIZE(omap2_eac_resources),
254 .resource = omap2_eac_resources,
255 .dev = {
256 .platform_data = NULL,
257 },
258};
259
260void omap_init_eac(struct eac_platform_data *pdata)
261{
262 omap2_eac_device.dev.platform_data = pdata;
263 platform_device_register(&omap2_eac_device);
264}
265
266#else
267void omap_init_eac(struct eac_platform_data *pdata) {}
268#endif
269
270#ifdef CONFIG_OMAP_SHA1_MD5
271static struct resource sha1_md5_resources[] = {
272 {
273 .start = OMAP24XX_SEC_SHA1MD5_BASE,
274 .end = OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
275 .flags = IORESOURCE_MEM,
276 },
277 {
278 .start = INT_24XX_SHA1MD5,
279 .flags = IORESOURCE_IRQ,
280 }
281};
282
283static struct platform_device sha1_md5_device = {
284 .name = "OMAP SHA1/MD5",
285 .id = -1,
286 .num_resources = ARRAY_SIZE(sha1_md5_resources),
287 .resource = sha1_md5_resources,
288};
289
290static void omap_init_sha1_md5(void)
291{
292 platform_device_register(&sha1_md5_device);
293}
294#else
295static inline void omap_init_sha1_md5(void) { }
296#endif
297
298#if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
299#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430)
300#define OMAP_HDQ_BASE 0x480B2000
301#endif
302static struct resource omap_hdq_resources[] = {
303 {
304 .start = OMAP_HDQ_BASE,
305 .end = OMAP_HDQ_BASE + 0x1C,
306 .flags = IORESOURCE_MEM,
307 },
308 {
309 .start = INT_24XX_HDQ_IRQ,
310 .flags = IORESOURCE_IRQ,
311 },
312};
313static struct platform_device omap_hdq_dev = {
314 .name = "omap_hdq",
315 .id = 0,
316 .dev = {
317 .platform_data = NULL,
318 },
319 .num_resources = ARRAY_SIZE(omap_hdq_resources),
320 .resource = omap_hdq_resources,
321};
322static inline void omap_hdq_init(void)
323{
324 (void) platform_device_register(&omap_hdq_dev);
325}
326#else
327static inline void omap_hdq_init(void) {}
328#endif
329
204/*-------------------------------------------------------------------------*/ 330/*-------------------------------------------------------------------------*/
205 331
206static int __init omap2_init_devices(void) 332static int __init omap2_init_devices(void)
@@ -208,10 +334,11 @@ static int __init omap2_init_devices(void)
208 /* please keep these calls, and their implementations above, 334 /* please keep these calls, and their implementations above,
209 * in alphabetical order so they're easier to sort through. 335 * in alphabetical order so they're easier to sort through.
210 */ 336 */
211 omap_init_i2c();
212 omap_init_mbox(); 337 omap_init_mbox();
213 omap_init_mcspi(); 338 omap_init_mcspi();
339 omap_hdq_init();
214 omap_init_sti(); 340 omap_init_sti();
341 omap_init_sha1_md5();
215 342
216 return 0; 343 return 0;
217} 344}
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index af1081a0b27c..763bdbeaf681 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -9,6 +9,8 @@
9 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11 */ 11 */
12#undef DEBUG
13
12#include <linux/kernel.h> 14#include <linux/kernel.h>
13#include <linux/init.h> 15#include <linux/init.h>
14#include <linux/err.h> 16#include <linux/err.h>
@@ -16,20 +18,14 @@
16#include <linux/ioport.h> 18#include <linux/ioport.h>
17#include <linux/spinlock.h> 19#include <linux/spinlock.h>
18#include <linux/io.h> 20#include <linux/io.h>
21#include <linux/module.h>
19 22
20#include <asm/mach-types.h> 23#include <asm/mach-types.h>
21#include <mach/gpmc.h> 24#include <mach/gpmc.h>
22 25
23#undef DEBUG 26#include <mach/sdrc.h>
24
25#ifdef CONFIG_ARCH_OMAP2420
26#define GPMC_BASE 0x6800a000
27#endif
28
29#ifdef CONFIG_ARCH_OMAP2430
30#define GPMC_BASE 0x6E000000
31#endif
32 27
28/* GPMC register offsets */
33#define GPMC_REVISION 0x00 29#define GPMC_REVISION 0x00
34#define GPMC_SYSCONFIG 0x10 30#define GPMC_SYSCONFIG 0x10
35#define GPMC_SYSSTATUS 0x14 31#define GPMC_SYSSTATUS 0x14
@@ -51,7 +47,6 @@
51#define GPMC_CS0 0x60 47#define GPMC_CS0 0x60
52#define GPMC_CS_SIZE 0x30 48#define GPMC_CS_SIZE 0x30
53 49
54#define GPMC_CS_NUM 8
55#define GPMC_MEM_START 0x00000000 50#define GPMC_MEM_START 0x00000000
56#define GPMC_MEM_END 0x3FFFFFFF 51#define GPMC_MEM_END 0x3FFFFFFF
57#define BOOT_ROM_SPACE 0x100000 /* 1MB */ 52#define BOOT_ROM_SPACE 0x100000 /* 1MB */
@@ -64,12 +59,9 @@ static struct resource gpmc_cs_mem[GPMC_CS_NUM];
64static DEFINE_SPINLOCK(gpmc_mem_lock); 59static DEFINE_SPINLOCK(gpmc_mem_lock);
65static unsigned gpmc_cs_map; 60static unsigned gpmc_cs_map;
66 61
67static void __iomem *gpmc_base = 62static void __iomem *gpmc_base;
68 (void __iomem *) IO_ADDRESS(GPMC_BASE);
69static void __iomem *gpmc_cs_base =
70 (void __iomem *) IO_ADDRESS(GPMC_BASE) + GPMC_CS0;
71 63
72static struct clk *gpmc_fck; 64static struct clk *gpmc_l3_clk;
73 65
74static void gpmc_write_reg(int idx, u32 val) 66static void gpmc_write_reg(int idx, u32 val)
75{ 67{
@@ -85,19 +77,32 @@ void gpmc_cs_write_reg(int cs, int idx, u32 val)
85{ 77{
86 void __iomem *reg_addr; 78 void __iomem *reg_addr;
87 79
88 reg_addr = gpmc_cs_base + (cs * GPMC_CS_SIZE) + idx; 80 reg_addr = gpmc_base + GPMC_CS0 + (cs * GPMC_CS_SIZE) + idx;
89 __raw_writel(val, reg_addr); 81 __raw_writel(val, reg_addr);
90} 82}
91 83
92u32 gpmc_cs_read_reg(int cs, int idx) 84u32 gpmc_cs_read_reg(int cs, int idx)
93{ 85{
94 return __raw_readl(gpmc_cs_base + (cs * GPMC_CS_SIZE) + idx); 86 void __iomem *reg_addr;
87
88 reg_addr = gpmc_base + GPMC_CS0 + (cs * GPMC_CS_SIZE) + idx;
89 return __raw_readl(reg_addr);
95} 90}
96 91
92/* TODO: Add support for gpmc_fck to clock framework and use it */
97unsigned long gpmc_get_fclk_period(void) 93unsigned long gpmc_get_fclk_period(void)
98{ 94{
99 /* In picoseconds */ 95 unsigned long rate = clk_get_rate(gpmc_l3_clk);
100 return 1000000000 / ((clk_get_rate(gpmc_fck)) / 1000); 96
97 if (rate == 0) {
98 printk(KERN_WARNING "gpmc_l3_clk not enabled\n");
99 return 0;
100 }
101
102 rate /= 1000;
103 rate = 1000000000 / rate; /* In picoseconds */
104
105 return rate;
101} 106}
102 107
103unsigned int gpmc_ns_to_ticks(unsigned int time_ns) 108unsigned int gpmc_ns_to_ticks(unsigned int time_ns)
@@ -110,6 +115,11 @@ unsigned int gpmc_ns_to_ticks(unsigned int time_ns)
110 return (time_ns * 1000 + tick_ps - 1) / tick_ps; 115 return (time_ns * 1000 + tick_ps - 1) / tick_ps;
111} 116}
112 117
118unsigned int gpmc_ticks_to_ns(unsigned int ticks)
119{
120 return ticks * gpmc_get_fclk_period() / 1000;
121}
122
113unsigned int gpmc_round_ns_to_ticks(unsigned int time_ns) 123unsigned int gpmc_round_ns_to_ticks(unsigned int time_ns)
114{ 124{
115 unsigned long ticks = gpmc_ns_to_ticks(time_ns); 125 unsigned long ticks = gpmc_ns_to_ticks(time_ns);
@@ -210,6 +220,11 @@ int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t)
210 220
211 GPMC_SET_ONE(GPMC_CS_CONFIG5, 24, 27, page_burst_access); 221 GPMC_SET_ONE(GPMC_CS_CONFIG5, 24, 27, page_burst_access);
212 222
223 if (cpu_is_omap34xx()) {
224 GPMC_SET_ONE(GPMC_CS_CONFIG6, 16, 19, wr_data_mux_bus);
225 GPMC_SET_ONE(GPMC_CS_CONFIG6, 24, 28, wr_access);
226 }
227
213 /* caller is expected to have initialized CONFIG1 to cover 228 /* caller is expected to have initialized CONFIG1 to cover
214 * at least sync vs async 229 * at least sync vs async
215 */ 230 */
@@ -350,6 +365,7 @@ out:
350 spin_unlock(&gpmc_mem_lock); 365 spin_unlock(&gpmc_mem_lock);
351 return r; 366 return r;
352} 367}
368EXPORT_SYMBOL(gpmc_cs_request);
353 369
354void gpmc_cs_free(int cs) 370void gpmc_cs_free(int cs)
355{ 371{
@@ -365,8 +381,9 @@ void gpmc_cs_free(int cs)
365 gpmc_cs_set_reserved(cs, 0); 381 gpmc_cs_set_reserved(cs, 0);
366 spin_unlock(&gpmc_mem_lock); 382 spin_unlock(&gpmc_mem_lock);
367} 383}
384EXPORT_SYMBOL(gpmc_cs_free);
368 385
369void __init gpmc_mem_init(void) 386static void __init gpmc_mem_init(void)
370{ 387{
371 int cs; 388 int cs;
372 unsigned long boot_rom_space = 0; 389 unsigned long boot_rom_space = 0;
@@ -396,12 +413,33 @@ void __init gpmc_mem_init(void)
396void __init gpmc_init(void) 413void __init gpmc_init(void)
397{ 414{
398 u32 l; 415 u32 l;
416 char *ck;
417
418 if (cpu_is_omap24xx()) {
419 ck = "core_l3_ck";
420 if (cpu_is_omap2420())
421 l = OMAP2420_GPMC_BASE;
422 else
423 l = OMAP34XX_GPMC_BASE;
424 } else if (cpu_is_omap34xx()) {
425 ck = "gpmc_fck";
426 l = OMAP34XX_GPMC_BASE;
427 }
399 428
400 gpmc_fck = clk_get(NULL, "gpmc_fck"); /* Always on ENABLE_ON_INIT */ 429 gpmc_l3_clk = clk_get(NULL, ck);
401 if (IS_ERR(gpmc_fck)) 430 if (IS_ERR(gpmc_l3_clk)) {
402 WARN_ON(1); 431 printk(KERN_ERR "Could not get GPMC clock %s\n", ck);
403 else 432 return -ENODEV;
404 clk_enable(gpmc_fck); 433 }
434
435 gpmc_base = ioremap(l, SZ_4K);
436 if (!gpmc_base) {
437 clk_put(gpmc_l3_clk);
438 printk(KERN_ERR "Could not get GPMC register memory\n");
439 return -ENOMEM;
440 }
441
442 BUG_ON(IS_ERR(gpmc_l3_clk));
405 443
406 l = gpmc_read_reg(GPMC_REVISION); 444 l = gpmc_read_reg(GPMC_REVISION);
407 printk(KERN_INFO "GPMC revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f); 445 printk(KERN_INFO "GPMC revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f);
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 209177c7f22f..bf45ff39a7b5 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -18,24 +18,15 @@
18 18
19#include <asm/cputype.h> 19#include <asm/cputype.h>
20 20
21#include <mach/common.h>
21#include <mach/control.h> 22#include <mach/control.h>
22#include <mach/cpu.h> 23#include <mach/cpu.h>
23 24
24#if defined(CONFIG_ARCH_OMAP2420) 25static u32 class;
25#define TAP_BASE io_p2v(0x48014000) 26static void __iomem *tap_base;
26#elif defined(CONFIG_ARCH_OMAP2430) 27static u16 tap_prod_id;
27#define TAP_BASE io_p2v(0x4900A000)
28#elif defined(CONFIG_ARCH_OMAP34XX)
29#define TAP_BASE io_p2v(0x4830A000)
30#endif
31 28
32#define OMAP_TAP_IDCODE 0x0204 29#define OMAP_TAP_IDCODE 0x0204
33#if defined(CONFIG_ARCH_OMAP34XX)
34#define OMAP_TAP_PROD_ID 0x0210
35#else
36#define OMAP_TAP_PROD_ID 0x0208
37#endif
38
39#define OMAP_TAP_DIE_ID_0 0x0218 30#define OMAP_TAP_DIE_ID_0 0x0218
40#define OMAP_TAP_DIE_ID_1 0x021C 31#define OMAP_TAP_DIE_ID_1 0x021C
41#define OMAP_TAP_DIE_ID_2 0x0220 32#define OMAP_TAP_DIE_ID_2 0x0220
@@ -94,18 +85,24 @@ static u32 __init read_tap_reg(int reg)
94 * it means its Cortex r0p0 which is 3430 ES1 85 * it means its Cortex r0p0 which is 3430 ES1
95 */ 86 */
96 if ((((cpuid >> 4) & 0xFFF) == 0xC08) && ((cpuid & 0xF) == 0x0)) { 87 if ((((cpuid >> 4) & 0xFFF) == 0xC08) && ((cpuid & 0xF) == 0x0)) {
88
89 if (reg == tap_prod_id) {
90 regval = 0x000F00F0;
91 goto out;
92 }
93
97 switch (reg) { 94 switch (reg) {
98 case OMAP_TAP_IDCODE : regval = 0x0B7AE02F; break; 95 case OMAP_TAP_IDCODE : regval = 0x0B7AE02F; break;
99 /* Making DevType as 0xF in ES1 to differ from ES2 */ 96 /* Making DevType as 0xF in ES1 to differ from ES2 */
100 case OMAP_TAP_PROD_ID : regval = 0x000F00F0; break;
101 case OMAP_TAP_DIE_ID_0: regval = 0x01000000; break; 97 case OMAP_TAP_DIE_ID_0: regval = 0x01000000; break;
102 case OMAP_TAP_DIE_ID_1: regval = 0x1012d687; break; 98 case OMAP_TAP_DIE_ID_1: regval = 0x1012d687; break;
103 case OMAP_TAP_DIE_ID_2: regval = 0x00000000; break; 99 case OMAP_TAP_DIE_ID_2: regval = 0x00000000; break;
104 case OMAP_TAP_DIE_ID_3: regval = 0x2d2c0000; break; 100 case OMAP_TAP_DIE_ID_3: regval = 0x2d2c0000; break;
105 } 101 }
106 } else 102 } else
107 regval = __raw_readl(TAP_BASE + reg); 103 regval = __raw_readl(tap_base + reg);
108 104
105out:
109 return regval; 106 return regval;
110 107
111} 108}
@@ -204,7 +201,7 @@ void __init omap2_check_revision(void)
204 u8 rev; 201 u8 rev;
205 202
206 idcode = read_tap_reg(OMAP_TAP_IDCODE); 203 idcode = read_tap_reg(OMAP_TAP_IDCODE);
207 prod_id = read_tap_reg(OMAP_TAP_PROD_ID); 204 prod_id = read_tap_reg(tap_prod_id);
208 hawkeye = (idcode >> 12) & 0xffff; 205 hawkeye = (idcode >> 12) & 0xffff;
209 rev = (idcode >> 28) & 0x0f; 206 rev = (idcode >> 28) & 0x0f;
210 dev_type = (prod_id >> 16) & 0x0f; 207 dev_type = (prod_id >> 16) & 0x0f;
@@ -269,3 +266,13 @@ void __init omap2_check_revision(void)
269 266
270} 267}
271 268
269void __init omap2_set_globals_tap(struct omap_globals *omap2_globals)
270{
271 class = omap2_globals->class;
272 tap_base = omap2_globals->tap;
273
274 if (class == 0x3430)
275 tap_prod_id = 0x0210;
276 else
277 tap_prod_id = 0x0208;
278}
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 7c3d6289c05f..5ea64f926ed5 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -4,8 +4,11 @@
4 * OMAP2 I/O mapping code 4 * OMAP2 I/O mapping code
5 * 5 *
6 * Copyright (C) 2005 Nokia Corporation 6 * Copyright (C) 2005 Nokia Corporation
7 * Author: Juha Yrjölä <juha.yrjola@nokia.com> 7 * Copyright (C) 2007 Texas Instruments
8 * Updated map desc to add 2430 support : <x0khasim@ti.com> 8 *
9 * Author:
10 * Juha Yrjola <juha.yrjola@nokia.com>
11 * Syed Khasim <x0khasim@ti.com>
9 * 12 *
10 * This program is free software; you can redistribute it and/or modify 13 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as 14 * it under the terms of the GNU General Public License version 2 as
@@ -23,19 +26,26 @@
23 26
24#include <mach/mux.h> 27#include <mach/mux.h>
25#include <mach/omapfb.h> 28#include <mach/omapfb.h>
29#include <mach/sram.h>
30
31#include "memory.h"
32
33#include "clock.h"
34
35#include <mach/powerdomain.h>
36
37#include "powerdomains.h"
26 38
27extern void omap_sram_init(void); 39#include <mach/clockdomain.h>
28extern int omap2_clk_init(void); 40#include "clockdomains.h"
29extern void omap2_check_revision(void);
30extern void omap2_init_memory(void);
31extern void gpmc_init(void);
32extern void omapfb_reserve_sdram(void);
33 41
34/* 42/*
35 * The machine specific code may provide the extra mapping besides the 43 * The machine specific code may provide the extra mapping besides the
36 * default mapping provided here. 44 * default mapping provided here.
37 */ 45 */
38static struct map_desc omap2_io_desc[] __initdata = { 46
47#ifdef CONFIG_ARCH_OMAP24XX
48static struct map_desc omap24xx_io_desc[] __initdata = {
39 { 49 {
40 .virtual = L3_24XX_VIRT, 50 .virtual = L3_24XX_VIRT,
41 .pfn = __phys_to_pfn(L3_24XX_PHYS), 51 .pfn = __phys_to_pfn(L3_24XX_PHYS),
@@ -43,12 +53,39 @@ static struct map_desc omap2_io_desc[] __initdata = {
43 .type = MT_DEVICE 53 .type = MT_DEVICE
44 }, 54 },
45 { 55 {
46 .virtual = L4_24XX_VIRT, 56 .virtual = L4_24XX_VIRT,
47 .pfn = __phys_to_pfn(L4_24XX_PHYS), 57 .pfn = __phys_to_pfn(L4_24XX_PHYS),
48 .length = L4_24XX_SIZE, 58 .length = L4_24XX_SIZE,
49 .type = MT_DEVICE 59 .type = MT_DEVICE
50 }, 60 },
61};
62
63#ifdef CONFIG_ARCH_OMAP2420
64static struct map_desc omap242x_io_desc[] __initdata = {
65 {
66 .virtual = DSP_MEM_24XX_VIRT,
67 .pfn = __phys_to_pfn(DSP_MEM_24XX_PHYS),
68 .length = DSP_MEM_24XX_SIZE,
69 .type = MT_DEVICE
70 },
71 {
72 .virtual = DSP_IPI_24XX_VIRT,
73 .pfn = __phys_to_pfn(DSP_IPI_24XX_PHYS),
74 .length = DSP_IPI_24XX_SIZE,
75 .type = MT_DEVICE
76 },
77 {
78 .virtual = DSP_MMU_24XX_VIRT,
79 .pfn = __phys_to_pfn(DSP_MMU_24XX_PHYS),
80 .length = DSP_MMU_24XX_SIZE,
81 .type = MT_DEVICE
82 },
83};
84
85#endif
86
51#ifdef CONFIG_ARCH_OMAP2430 87#ifdef CONFIG_ARCH_OMAP2430
88static struct map_desc omap243x_io_desc[] __initdata = {
52 { 89 {
53 .virtual = L4_WK_243X_VIRT, 90 .virtual = L4_WK_243X_VIRT,
54 .pfn = __phys_to_pfn(L4_WK_243X_PHYS), 91 .pfn = __phys_to_pfn(L4_WK_243X_PHYS),
@@ -61,30 +98,90 @@ static struct map_desc omap2_io_desc[] __initdata = {
61 .length = OMAP243X_GPMC_SIZE, 98 .length = OMAP243X_GPMC_SIZE,
62 .type = MT_DEVICE 99 .type = MT_DEVICE
63 }, 100 },
101 {
102 .virtual = OMAP243X_SDRC_VIRT,
103 .pfn = __phys_to_pfn(OMAP243X_SDRC_PHYS),
104 .length = OMAP243X_SDRC_SIZE,
105 .type = MT_DEVICE
106 },
107 {
108 .virtual = OMAP243X_SMS_VIRT,
109 .pfn = __phys_to_pfn(OMAP243X_SMS_PHYS),
110 .length = OMAP243X_SMS_SIZE,
111 .type = MT_DEVICE
112 },
113};
114#endif
64#endif 115#endif
116
117#ifdef CONFIG_ARCH_OMAP34XX
118static struct map_desc omap34xx_io_desc[] __initdata = {
65 { 119 {
66 .virtual = DSP_MEM_24XX_VIRT, 120 .virtual = L3_34XX_VIRT,
67 .pfn = __phys_to_pfn(DSP_MEM_24XX_PHYS), 121 .pfn = __phys_to_pfn(L3_34XX_PHYS),
68 .length = DSP_MEM_24XX_SIZE, 122 .length = L3_34XX_SIZE,
69 .type = MT_DEVICE 123 .type = MT_DEVICE
70 }, 124 },
71 { 125 {
72 .virtual = DSP_IPI_24XX_VIRT, 126 .virtual = L4_34XX_VIRT,
73 .pfn = __phys_to_pfn(DSP_IPI_24XX_PHYS), 127 .pfn = __phys_to_pfn(L4_34XX_PHYS),
74 .length = DSP_IPI_24XX_SIZE, 128 .length = L4_34XX_SIZE,
75 .type = MT_DEVICE 129 .type = MT_DEVICE
76 }, 130 },
77 { 131 {
78 .virtual = DSP_MMU_24XX_VIRT, 132 .virtual = L4_WK_34XX_VIRT,
79 .pfn = __phys_to_pfn(DSP_MMU_24XX_PHYS), 133 .pfn = __phys_to_pfn(L4_WK_34XX_PHYS),
80 .length = DSP_MMU_24XX_SIZE, 134 .length = L4_WK_34XX_SIZE,
135 .type = MT_DEVICE
136 },
137 {
138 .virtual = OMAP34XX_GPMC_VIRT,
139 .pfn = __phys_to_pfn(OMAP34XX_GPMC_PHYS),
140 .length = OMAP34XX_GPMC_SIZE,
81 .type = MT_DEVICE 141 .type = MT_DEVICE
82 } 142 },
143 {
144 .virtual = OMAP343X_SMS_VIRT,
145 .pfn = __phys_to_pfn(OMAP343X_SMS_PHYS),
146 .length = OMAP343X_SMS_SIZE,
147 .type = MT_DEVICE
148 },
149 {
150 .virtual = OMAP343X_SDRC_VIRT,
151 .pfn = __phys_to_pfn(OMAP343X_SDRC_PHYS),
152 .length = OMAP343X_SDRC_SIZE,
153 .type = MT_DEVICE
154 },
155 {
156 .virtual = L4_PER_34XX_VIRT,
157 .pfn = __phys_to_pfn(L4_PER_34XX_PHYS),
158 .length = L4_PER_34XX_SIZE,
159 .type = MT_DEVICE
160 },
161 {
162 .virtual = L4_EMU_34XX_VIRT,
163 .pfn = __phys_to_pfn(L4_EMU_34XX_PHYS),
164 .length = L4_EMU_34XX_SIZE,
165 .type = MT_DEVICE
166 },
83}; 167};
168#endif
84 169
85void __init omap2_map_common_io(void) 170void __init omap2_map_common_io(void)
86{ 171{
87 iotable_init(omap2_io_desc, ARRAY_SIZE(omap2_io_desc)); 172#if defined(CONFIG_ARCH_OMAP2420)
173 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
174 iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc));
175#endif
176
177#if defined(CONFIG_ARCH_OMAP2430)
178 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
179 iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc));
180#endif
181
182#if defined(CONFIG_ARCH_OMAP34XX)
183 iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
184#endif
88 185
89 /* Normally devicemaps_init() would flush caches and tlb after 186 /* Normally devicemaps_init() would flush caches and tlb after
90 * mdesc->map_io(), but we must also do it here because of the CPU 187 * mdesc->map_io(), but we must also do it here because of the CPU
@@ -101,12 +198,9 @@ void __init omap2_map_common_io(void)
101void __init omap2_init_common_hw(void) 198void __init omap2_init_common_hw(void)
102{ 199{
103 omap2_mux_init(); 200 omap2_mux_init();
201 pwrdm_init(powerdomains_omap);
202 clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps);
104 omap2_clk_init(); 203 omap2_clk_init();
105/*
106 * Need to Fix this for 2430
107 */
108#ifndef CONFIG_ARCH_OMAP2430
109 omap2_init_memory(); 204 omap2_init_memory();
110#endif
111 gpmc_init(); 205 gpmc_init();
112} 206}
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 196a9565a8dc..d354e0fe4477 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -16,14 +16,20 @@
16#include <linux/io.h> 16#include <linux/io.h>
17#include <mach/hardware.h> 17#include <mach/hardware.h>
18#include <asm/mach/irq.h> 18#include <asm/mach/irq.h>
19#include <asm/irq.h>
20 19
21#define INTC_REVISION 0x0000 20
22#define INTC_SYSCONFIG 0x0010 21/* selected INTC register offsets */
23#define INTC_SYSSTATUS 0x0014 22
24#define INTC_CONTROL 0x0048 23#define INTC_REVISION 0x0000
25#define INTC_MIR_CLEAR0 0x0088 24#define INTC_SYSCONFIG 0x0010
26#define INTC_MIR_SET0 0x008c 25#define INTC_SYSSTATUS 0x0014
26#define INTC_CONTROL 0x0048
27#define INTC_MIR_CLEAR0 0x0088
28#define INTC_MIR_SET0 0x008c
29#define INTC_PENDING_IRQ0 0x0098
30
31/* Number of IRQ state bits in each MIR register */
32#define IRQ_BITS_PER_REG 32
27 33
28/* 34/*
29 * OMAP2 has a number of different interrupt controllers, each interrupt 35 * OMAP2 has a number of different interrupt controllers, each interrupt
@@ -32,48 +38,50 @@
32 * for each bank.. when in doubt, consult the TRM. 38 * for each bank.. when in doubt, consult the TRM.
33 */ 39 */
34static struct omap_irq_bank { 40static struct omap_irq_bank {
35 unsigned long base_reg; 41 void __iomem *base_reg;
36 unsigned int nr_irqs; 42 unsigned int nr_irqs;
37} __attribute__ ((aligned(4))) irq_banks[] = { 43} __attribute__ ((aligned(4))) irq_banks[] = {
38 { 44 {
39 /* MPU INTC */ 45 /* MPU INTC */
40 .base_reg = IO_ADDRESS(OMAP24XX_IC_BASE), 46 .base_reg = 0,
41 .nr_irqs = 96, 47 .nr_irqs = 96,
42 }, { 48 },
43 /* XXX: DSP INTC */
44 }
45}; 49};
46 50
51/* INTC bank register get/set */
52
53static void intc_bank_write_reg(u32 val, struct omap_irq_bank *bank, u16 reg)
54{
55 __raw_writel(val, bank->base_reg + reg);
56}
57
58static u32 intc_bank_read_reg(struct omap_irq_bank *bank, u16 reg)
59{
60 return __raw_readl(bank->base_reg + reg);
61}
62
47/* XXX: FIQ and additional INTC support (only MPU at the moment) */ 63/* XXX: FIQ and additional INTC support (only MPU at the moment) */
48static void omap_ack_irq(unsigned int irq) 64static void omap_ack_irq(unsigned int irq)
49{ 65{
50 __raw_writel(0x1, irq_banks[0].base_reg + INTC_CONTROL); 66 intc_bank_write_reg(0x1, &irq_banks[0], INTC_CONTROL);
51} 67}
52 68
53static void omap_mask_irq(unsigned int irq) 69static void omap_mask_irq(unsigned int irq)
54{ 70{
55 int offset = (irq >> 5) << 5; 71 int offset = irq & (~(IRQ_BITS_PER_REG - 1));
56 72
57 if (irq >= 64) { 73 irq &= (IRQ_BITS_PER_REG - 1);
58 irq %= 64;
59 } else if (irq >= 32) {
60 irq %= 32;
61 }
62 74
63 __raw_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_SET0 + offset); 75 intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_SET0 + offset);
64} 76}
65 77
66static void omap_unmask_irq(unsigned int irq) 78static void omap_unmask_irq(unsigned int irq)
67{ 79{
68 int offset = (irq >> 5) << 5; 80 int offset = irq & (~(IRQ_BITS_PER_REG - 1));
69 81
70 if (irq >= 64) { 82 irq &= (IRQ_BITS_PER_REG - 1);
71 irq %= 64;
72 } else if (irq >= 32) {
73 irq %= 32;
74 }
75 83
76 __raw_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_CLEAR0 + offset); 84 intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_CLEAR0 + offset);
77} 85}
78 86
79static void omap_mask_ack_irq(unsigned int irq) 87static void omap_mask_ack_irq(unsigned int irq)
@@ -93,20 +101,20 @@ static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank)
93{ 101{
94 unsigned long tmp; 102 unsigned long tmp;
95 103
96 tmp = __raw_readl(bank->base_reg + INTC_REVISION) & 0xff; 104 tmp = intc_bank_read_reg(bank, INTC_REVISION) & 0xff;
97 printk(KERN_INFO "IRQ: Found an INTC at 0x%08lx " 105 printk(KERN_INFO "IRQ: Found an INTC at 0x%p "
98 "(revision %ld.%ld) with %d interrupts\n", 106 "(revision %ld.%ld) with %d interrupts\n",
99 bank->base_reg, tmp >> 4, tmp & 0xf, bank->nr_irqs); 107 bank->base_reg, tmp >> 4, tmp & 0xf, bank->nr_irqs);
100 108
101 tmp = __raw_readl(bank->base_reg + INTC_SYSCONFIG); 109 tmp = intc_bank_read_reg(bank, INTC_SYSCONFIG);
102 tmp |= 1 << 1; /* soft reset */ 110 tmp |= 1 << 1; /* soft reset */
103 __raw_writel(tmp, bank->base_reg + INTC_SYSCONFIG); 111 intc_bank_write_reg(tmp, bank, INTC_SYSCONFIG);
104 112
105 while (!(__raw_readl(bank->base_reg + INTC_SYSSTATUS) & 0x1)) 113 while (!(intc_bank_read_reg(bank, INTC_SYSSTATUS) & 0x1))
106 /* Wait for reset to complete */; 114 /* Wait for reset to complete */;
107 115
108 /* Enable autoidle */ 116 /* Enable autoidle */
109 __raw_writel(1 << 0, bank->base_reg + INTC_SYSCONFIG); 117 intc_bank_write_reg(1 << 0, bank, INTC_SYSCONFIG);
110} 118}
111 119
112void __init omap_init_irq(void) 120void __init omap_init_irq(void)
@@ -118,9 +126,10 @@ void __init omap_init_irq(void)
118 for (i = 0; i < ARRAY_SIZE(irq_banks); i++) { 126 for (i = 0; i < ARRAY_SIZE(irq_banks); i++) {
119 struct omap_irq_bank *bank = irq_banks + i; 127 struct omap_irq_bank *bank = irq_banks + i;
120 128
121 /* XXX */ 129 if (cpu_is_omap24xx())
122 if (!bank->base_reg) 130 bank->base_reg = OMAP2_IO_ADDRESS(OMAP24XX_IC_BASE);
123 continue; 131 else if (cpu_is_omap34xx())
132 bank->base_reg = OMAP2_IO_ADDRESS(OMAP34XX_IC_BASE);
124 133
125 omap_irq_bank_init_one(bank); 134 omap_irq_bank_init_one(bank);
126 135
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index b261f1f80b5e..cae3ebe249b3 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -89,6 +89,30 @@ static struct mcbsp_internal_clk omap_mcbsp_clks[] = {
89 .disable = omap_mcbsp_clk_disable, 89 .disable = omap_mcbsp_clk_disable,
90 }, 90 },
91 }, 91 },
92 {
93 .clk = {
94 .name = "mcbsp_clk",
95 .id = 3,
96 .enable = omap_mcbsp_clk_enable,
97 .disable = omap_mcbsp_clk_disable,
98 },
99 },
100 {
101 .clk = {
102 .name = "mcbsp_clk",
103 .id = 4,
104 .enable = omap_mcbsp_clk_enable,
105 .disable = omap_mcbsp_clk_disable,
106 },
107 },
108 {
109 .clk = {
110 .name = "mcbsp_clk",
111 .id = 5,
112 .enable = omap_mcbsp_clk_enable,
113 .disable = omap_mcbsp_clk_disable,
114 },
115 },
92}; 116};
93 117
94#define omap_mcbsp_clks_size ARRAY_SIZE(omap_mcbsp_clks) 118#define omap_mcbsp_clks_size ARRAY_SIZE(omap_mcbsp_clks)
@@ -117,25 +141,14 @@ static void omap2_mcbsp_request(unsigned int id)
117 omap2_mcbsp2_mux_setup(); 141 omap2_mcbsp2_mux_setup();
118} 142}
119 143
120static int omap2_mcbsp_check(unsigned int id)
121{
122 if (id > OMAP_MAX_MCBSP_COUNT - 1) {
123 printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n", id + 1);
124 return -ENODEV;
125 }
126 return 0;
127}
128
129static struct omap_mcbsp_ops omap2_mcbsp_ops = { 144static struct omap_mcbsp_ops omap2_mcbsp_ops = {
130 .request = omap2_mcbsp_request, 145 .request = omap2_mcbsp_request,
131 .check = omap2_mcbsp_check,
132}; 146};
133 147
134#ifdef CONFIG_ARCH_OMAP24XX 148#ifdef CONFIG_ARCH_OMAP2420
135static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = { 149static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
136 { 150 {
137 .phys_base = OMAP24XX_MCBSP1_BASE, 151 .phys_base = OMAP24XX_MCBSP1_BASE,
138 .virt_base = IO_ADDRESS(OMAP24XX_MCBSP1_BASE),
139 .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, 152 .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX,
140 .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, 153 .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX,
141 .rx_irq = INT_24XX_MCBSP1_IRQ_RX, 154 .rx_irq = INT_24XX_MCBSP1_IRQ_RX,
@@ -145,7 +158,6 @@ static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = {
145 }, 158 },
146 { 159 {
147 .phys_base = OMAP24XX_MCBSP2_BASE, 160 .phys_base = OMAP24XX_MCBSP2_BASE,
148 .virt_base = IO_ADDRESS(OMAP24XX_MCBSP2_BASE),
149 .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, 161 .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX,
150 .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, 162 .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX,
151 .rx_irq = INT_24XX_MCBSP2_IRQ_RX, 163 .rx_irq = INT_24XX_MCBSP2_IRQ_RX,
@@ -154,17 +166,70 @@ static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = {
154 .clk_name = "mcbsp_clk", 166 .clk_name = "mcbsp_clk",
155 }, 167 },
156}; 168};
157#define OMAP24XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap24xx_mcbsp_pdata) 169#define OMAP2420_MCBSP_PDATA_SZ ARRAY_SIZE(omap2420_mcbsp_pdata)
158#else 170#else
159#define omap24xx_mcbsp_pdata NULL 171#define omap2420_mcbsp_pdata NULL
160#define OMAP24XX_MCBSP_PDATA_SZ 0 172#define OMAP2420_MCBSP_PDATA_SZ 0
173#endif
174
175#ifdef CONFIG_ARCH_OMAP2430
176static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
177 {
178 .phys_base = OMAP24XX_MCBSP1_BASE,
179 .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX,
180 .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX,
181 .rx_irq = INT_24XX_MCBSP1_IRQ_RX,
182 .tx_irq = INT_24XX_MCBSP1_IRQ_TX,
183 .ops = &omap2_mcbsp_ops,
184 .clk_name = "mcbsp_clk",
185 },
186 {
187 .phys_base = OMAP24XX_MCBSP2_BASE,
188 .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX,
189 .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX,
190 .rx_irq = INT_24XX_MCBSP2_IRQ_RX,
191 .tx_irq = INT_24XX_MCBSP2_IRQ_TX,
192 .ops = &omap2_mcbsp_ops,
193 .clk_name = "mcbsp_clk",
194 },
195 {
196 .phys_base = OMAP2430_MCBSP3_BASE,
197 .dma_rx_sync = OMAP24XX_DMA_MCBSP3_RX,
198 .dma_tx_sync = OMAP24XX_DMA_MCBSP3_TX,
199 .rx_irq = INT_24XX_MCBSP3_IRQ_RX,
200 .tx_irq = INT_24XX_MCBSP3_IRQ_TX,
201 .ops = &omap2_mcbsp_ops,
202 .clk_name = "mcbsp_clk",
203 },
204 {
205 .phys_base = OMAP2430_MCBSP4_BASE,
206 .dma_rx_sync = OMAP24XX_DMA_MCBSP4_RX,
207 .dma_tx_sync = OMAP24XX_DMA_MCBSP4_TX,
208 .rx_irq = INT_24XX_MCBSP4_IRQ_RX,
209 .tx_irq = INT_24XX_MCBSP4_IRQ_TX,
210 .ops = &omap2_mcbsp_ops,
211 .clk_name = "mcbsp_clk",
212 },
213 {
214 .phys_base = OMAP2430_MCBSP5_BASE,
215 .dma_rx_sync = OMAP24XX_DMA_MCBSP5_RX,
216 .dma_tx_sync = OMAP24XX_DMA_MCBSP5_TX,
217 .rx_irq = INT_24XX_MCBSP5_IRQ_RX,
218 .tx_irq = INT_24XX_MCBSP5_IRQ_TX,
219 .ops = &omap2_mcbsp_ops,
220 .clk_name = "mcbsp_clk",
221 },
222};
223#define OMAP2430_MCBSP_PDATA_SZ ARRAY_SIZE(omap2430_mcbsp_pdata)
224#else
225#define omap2430_mcbsp_pdata NULL
226#define OMAP2430_MCBSP_PDATA_SZ 0
161#endif 227#endif
162 228
163#ifdef CONFIG_ARCH_OMAP34XX 229#ifdef CONFIG_ARCH_OMAP34XX
164static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { 230static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
165 { 231 {
166 .phys_base = OMAP34XX_MCBSP1_BASE, 232 .phys_base = OMAP34XX_MCBSP1_BASE,
167 .virt_base = IO_ADDRESS(OMAP34XX_MCBSP1_BASE),
168 .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, 233 .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX,
169 .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, 234 .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX,
170 .rx_irq = INT_24XX_MCBSP1_IRQ_RX, 235 .rx_irq = INT_24XX_MCBSP1_IRQ_RX,
@@ -174,7 +239,6 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
174 }, 239 },
175 { 240 {
176 .phys_base = OMAP34XX_MCBSP2_BASE, 241 .phys_base = OMAP34XX_MCBSP2_BASE,
177 .virt_base = IO_ADDRESS(OMAP34XX_MCBSP2_BASE),
178 .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, 242 .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX,
179 .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, 243 .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX,
180 .rx_irq = INT_24XX_MCBSP2_IRQ_RX, 244 .rx_irq = INT_24XX_MCBSP2_IRQ_RX,
@@ -182,6 +246,33 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
182 .ops = &omap2_mcbsp_ops, 246 .ops = &omap2_mcbsp_ops,
183 .clk_name = "mcbsp_clk", 247 .clk_name = "mcbsp_clk",
184 }, 248 },
249 {
250 .phys_base = OMAP34XX_MCBSP3_BASE,
251 .dma_rx_sync = OMAP24XX_DMA_MCBSP3_RX,
252 .dma_tx_sync = OMAP24XX_DMA_MCBSP3_TX,
253 .rx_irq = INT_24XX_MCBSP3_IRQ_RX,
254 .tx_irq = INT_24XX_MCBSP3_IRQ_TX,
255 .ops = &omap2_mcbsp_ops,
256 .clk_name = "mcbsp_clk",
257 },
258 {
259 .phys_base = OMAP34XX_MCBSP4_BASE,
260 .dma_rx_sync = OMAP24XX_DMA_MCBSP4_RX,
261 .dma_tx_sync = OMAP24XX_DMA_MCBSP4_TX,
262 .rx_irq = INT_24XX_MCBSP4_IRQ_RX,
263 .tx_irq = INT_24XX_MCBSP4_IRQ_TX,
264 .ops = &omap2_mcbsp_ops,
265 .clk_name = "mcbsp_clk",
266 },
267 {
268 .phys_base = OMAP34XX_MCBSP5_BASE,
269 .dma_rx_sync = OMAP24XX_DMA_MCBSP5_RX,
270 .dma_tx_sync = OMAP24XX_DMA_MCBSP5_TX,
271 .rx_irq = INT_24XX_MCBSP5_IRQ_RX,
272 .tx_irq = INT_24XX_MCBSP5_IRQ_TX,
273 .ops = &omap2_mcbsp_ops,
274 .clk_name = "mcbsp_clk",
275 },
185}; 276};
186#define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata) 277#define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata)
187#else 278#else
@@ -189,7 +280,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
189#define OMAP34XX_MCBSP_PDATA_SZ 0 280#define OMAP34XX_MCBSP_PDATA_SZ 0
190#endif 281#endif
191 282
192int __init omap2_mcbsp_init(void) 283static int __init omap2_mcbsp_init(void)
193{ 284{
194 int i; 285 int i;
195 286
@@ -199,10 +290,24 @@ int __init omap2_mcbsp_init(void)
199 clk_register(&omap_mcbsp_clks[i].clk); 290 clk_register(&omap_mcbsp_clks[i].clk);
200 } 291 }
201 292
202 if (cpu_is_omap24xx()) 293 if (cpu_is_omap2420())
203 omap_mcbsp_register_board_cfg(omap24xx_mcbsp_pdata, 294 omap_mcbsp_count = OMAP2420_MCBSP_PDATA_SZ;
204 OMAP24XX_MCBSP_PDATA_SZ); 295 if (cpu_is_omap2430())
296 omap_mcbsp_count = OMAP2430_MCBSP_PDATA_SZ;
297 if (cpu_is_omap34xx())
298 omap_mcbsp_count = OMAP34XX_MCBSP_PDATA_SZ;
299
300 mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *),
301 GFP_KERNEL);
302 if (!mcbsp_ptr)
303 return -ENOMEM;
205 304
305 if (cpu_is_omap2420())
306 omap_mcbsp_register_board_cfg(omap2420_mcbsp_pdata,
307 OMAP2420_MCBSP_PDATA_SZ);
308 if (cpu_is_omap2430())
309 omap_mcbsp_register_board_cfg(omap2430_mcbsp_pdata,
310 OMAP2430_MCBSP_PDATA_SZ);
206 if (cpu_is_omap34xx()) 311 if (cpu_is_omap34xx())
207 omap_mcbsp_register_board_cfg(omap34xx_mcbsp_pdata, 312 omap_mcbsp_register_board_cfg(omap34xx_mcbsp_pdata,
208 OMAP34XX_MCBSP_PDATA_SZ); 313 OMAP34XX_MCBSP_PDATA_SZ);
diff --git a/arch/arm/mach-omap2/memory.c b/arch/arm/mach-omap2/memory.c
index ab1462b02e6e..882c70224292 100644
--- a/arch/arm/mach-omap2/memory.c
+++ b/arch/arm/mach-omap2/memory.c
@@ -101,6 +101,17 @@ u32 omap2_reprogram_sdrc(u32 level, u32 force)
101 return prev; 101 return prev;
102} 102}
103 103
104#if !defined(CONFIG_ARCH_OMAP2)
105void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
106 u32 base_cs, u32 force_unlock)
107{
108}
109void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
110 u32 mem_type)
111{
112}
113#endif
114
104void omap2_init_memory_params(u32 force_lock_to_unlock_mode) 115void omap2_init_memory_params(u32 force_lock_to_unlock_mode)
105{ 116{
106 unsigned long dll_cnt; 117 unsigned long dll_cnt;
@@ -165,6 +176,9 @@ void __init omap2_init_memory(void)
165{ 176{
166 u32 l; 177 u32 l;
167 178
179 if (!cpu_is_omap2420())
180 return;
181
168 l = sms_read_reg(SMS_SYSCONFIG); 182 l = sms_read_reg(SMS_SYSCONFIG);
169 l &= ~(0x3 << 3); 183 l &= ~(0x3 << 3);
170 l |= (0x2 << 3); 184 l |= (0x2 << 3);
diff --git a/arch/arm/mach-omap2/memory.h b/arch/arm/mach-omap2/memory.h
index 9a280b50a893..bb3db80a7c46 100644
--- a/arch/arm/mach-omap2/memory.h
+++ b/arch/arm/mach-omap2/memory.h
@@ -14,6 +14,9 @@
14 * published by the Free Software Foundation. 14 * published by the Free Software Foundation.
15 */ 15 */
16 16
17#ifndef ARCH_ARM_MACH_OMAP2_MEMORY_H
18#define ARCH_ARM_MACH_OMAP2_MEMORY_H
19
17/* Memory timings */ 20/* Memory timings */
18#define M_DDR 1 21#define M_DDR 1
19#define M_LOCK_CTRL (1 << 2) 22#define M_LOCK_CTRL (1 << 2)
@@ -34,3 +37,7 @@ extern u32 omap2_memory_get_fast_dll_ctrl(void);
34extern u32 omap2_memory_get_type(void); 37extern u32 omap2_memory_get_type(void);
35u32 omap2_dll_force_needed(void); 38u32 omap2_dll_force_needed(void);
36u32 omap2_reprogram_sdrc(u32 level, u32 force); 39u32 omap2_reprogram_sdrc(u32 level, u32 force);
40void __init omap2_init_memory(void);
41void __init gpmc_init(void);
42
43#endif
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 6b7d672058b9..b1393673d95d 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * linux/arch/arm/mach-omap2/mux.c 2 * linux/arch/arm/mach-omap2/mux.c
3 * 3 *
4 * OMAP2 pin multiplexing configurations 4 * OMAP2 and OMAP3 pin multiplexing configurations
5 * 5 *
6 * Copyright (C) 2004 - 2008 Texas Instruments Inc. 6 * Copyright (C) 2004 - 2008 Texas Instruments Inc.
7 * Copyright (C) 2003 - 2008 Nokia Corporation 7 * Copyright (C) 2003 - 2008 Nokia Corporation
@@ -220,16 +220,222 @@ MUX_CFG_24XX("AD13_2430_MCBSP2_DR_OFF", 0x0131, 0, 0, 0, 1)
220#define OMAP24XX_PINS_SZ 0 220#define OMAP24XX_PINS_SZ 0
221#endif /* CONFIG_ARCH_OMAP24XX */ 221#endif /* CONFIG_ARCH_OMAP24XX */
222 222
223#define OMAP24XX_PULL_ENA (1 << 3) 223#ifdef CONFIG_ARCH_OMAP34XX
224#define OMAP24XX_PULL_UP (1 << 4) 224static struct pin_config __initdata_or_module omap34xx_pins[] = {
225/*
226 * Name, reg-offset,
227 * mux-mode | [active-mode | off-mode]
228 */
229
230/* 34xx I2C */
231MUX_CFG_34XX("K21_34XX_I2C1_SCL", 0x1ba,
232 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
233MUX_CFG_34XX("J21_34XX_I2C1_SDA", 0x1bc,
234 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
235MUX_CFG_34XX("AF15_34XX_I2C2_SCL", 0x1be,
236 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
237MUX_CFG_34XX("AE15_34XX_I2C2_SDA", 0x1c0,
238 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
239MUX_CFG_34XX("AF14_34XX_I2C3_SCL", 0x1c2,
240 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
241MUX_CFG_34XX("AG14_34XX_I2C3_SDA", 0x1c4,
242 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
243MUX_CFG_34XX("AD26_34XX_I2C4_SCL", 0xa00,
244 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
245MUX_CFG_34XX("AE26_34XX_I2C4_SDA", 0xa02,
246 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
247
248/* PHY - HSUSB: 12-pin ULPI PHY: Port 1*/
249MUX_CFG_34XX("Y8_3430_USB1HS_PHY_CLK", 0x5da,
250 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT)
251MUX_CFG_34XX("Y9_3430_USB1HS_PHY_STP", 0x5d8,
252 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT)
253MUX_CFG_34XX("AA14_3430_USB1HS_PHY_DIR", 0x5ec,
254 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
255MUX_CFG_34XX("AA11_3430_USB1HS_PHY_NXT", 0x5ee,
256 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
257MUX_CFG_34XX("W13_3430_USB1HS_PHY_D0", 0x5dc,
258 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
259MUX_CFG_34XX("W12_3430_USB1HS_PHY_D1", 0x5de,
260 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
261MUX_CFG_34XX("W11_3430_USB1HS_PHY_D2", 0x5e0,
262 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
263MUX_CFG_34XX("Y11_3430_USB1HS_PHY_D3", 0x5ea,
264 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
265MUX_CFG_34XX("W9_3430_USB1HS_PHY_D4", 0x5e4,
266 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
267MUX_CFG_34XX("Y12_3430_USB1HS_PHY_D5", 0x5e6,
268 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
269MUX_CFG_34XX("W8_3430_USB1HS_PHY_D6", 0x5e8,
270 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
271MUX_CFG_34XX("Y13_3430_USB1HS_PHY_D7", 0x5e2,
272 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
273
274/* PHY - HSUSB: 12-pin ULPI PHY: Port 2*/
275MUX_CFG_34XX("AA8_3430_USB2HS_PHY_CLK", 0x5f0,
276 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT)
277MUX_CFG_34XX("AA10_3430_USB2HS_PHY_STP", 0x5f2,
278 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT)
279MUX_CFG_34XX("AA9_3430_USB2HS_PHY_DIR", 0x5f4,
280 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
281MUX_CFG_34XX("AB11_3430_USB2HS_PHY_NXT", 0x5f6,
282 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
283MUX_CFG_34XX("AB10_3430_USB2HS_PHY_D0", 0x5f8,
284 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
285MUX_CFG_34XX("AB9_3430_USB2HS_PHY_D1", 0x5fa,
286 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
287MUX_CFG_34XX("W3_3430_USB2HS_PHY_D2", 0x1d4,
288 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
289MUX_CFG_34XX("T4_3430_USB2HS_PHY_D3", 0x1de,
290 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
291MUX_CFG_34XX("T3_3430_USB2HS_PHY_D4", 0x1d8,
292 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
293MUX_CFG_34XX("R3_3430_USB2HS_PHY_D5", 0x1da,
294 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
295MUX_CFG_34XX("R4_3430_USB2HS_PHY_D6", 0x1dc,
296 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
297MUX_CFG_34XX("T2_3430_USB2HS_PHY_D7", 0x1d6,
298 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
299
300/* TLL - HSUSB: 12-pin TLL Port 1*/
301MUX_CFG_34XX("Y8_3430_USB1HS_TLL_CLK", 0x5da,
302 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
303MUX_CFG_34XX("Y9_3430_USB1HS_TLL_STP", 0x5d8,
304 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLUP)
305MUX_CFG_34XX("AA14_3430_USB1HS_TLL_DIR", 0x5ec,
306 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
307MUX_CFG_34XX("AA11_3430_USB1HS_TLL_NXT", 0x5ee,
308 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
309MUX_CFG_34XX("W13_3430_USB1HS_TLL_D0", 0x5dc,
310 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
311MUX_CFG_34XX("W12_3430_USB1HS_TLL_D1", 0x5de,
312 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
313MUX_CFG_34XX("W11_3430_USB1HS_TLL_D2", 0x5e0,
314 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
315MUX_CFG_34XX("Y11_3430_USB1HS_TLL_D3", 0x5ea,
316 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
317MUX_CFG_34XX("W9_3430_USB1HS_TLL_D4", 0x5e4,
318 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
319MUX_CFG_34XX("Y12_3430_USB1HS_TLL_D5", 0x5e6,
320 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
321MUX_CFG_34XX("W8_3430_USB1HS_TLL_D6", 0x5e8,
322 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
323MUX_CFG_34XX("Y13_3430_USB1HS_TLL_D7", 0x5e2,
324 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
325
326/* TLL - HSUSB: 12-pin TLL Port 2*/
327MUX_CFG_34XX("AA8_3430_USB2HS_TLL_CLK", 0x5f0,
328 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
329MUX_CFG_34XX("AA10_3430_USB2HS_TLL_STP", 0x5f2,
330 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLUP)
331MUX_CFG_34XX("AA9_3430_USB2HS_TLL_DIR", 0x5f4,
332 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
333MUX_CFG_34XX("AB11_3430_USB2HS_TLL_NXT", 0x5f6,
334 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
335MUX_CFG_34XX("AB10_3430_USB2HS_TLL_D0", 0x5f8,
336 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
337MUX_CFG_34XX("AB9_3430_USB2HS_TLL_D1", 0x5fa,
338 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
339MUX_CFG_34XX("W3_3430_USB2HS_TLL_D2", 0x1d4,
340 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
341MUX_CFG_34XX("T4_3430_USB2HS_TLL_D3", 0x1de,
342 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
343MUX_CFG_34XX("T3_3430_USB2HS_TLL_D4", 0x1d8,
344 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
345MUX_CFG_34XX("R3_3430_USB2HS_TLL_D5", 0x1da,
346 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
347MUX_CFG_34XX("R4_3430_USB2HS_TLL_D6", 0x1dc,
348 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
349MUX_CFG_34XX("T2_3430_USB2HS_TLL_D7", 0x1d6,
350 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
351
352/* TLL - HSUSB: 12-pin TLL Port 3*/
353MUX_CFG_34XX("AA6_3430_USB3HS_TLL_CLK", 0x180,
354 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
355MUX_CFG_34XX("AB3_3430_USB3HS_TLL_STP", 0x166,
356 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLUP)
357MUX_CFG_34XX("AA3_3430_USB3HS_TLL_DIR", 0x168,
358 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
359MUX_CFG_34XX("Y3_3430_USB3HS_TLL_NXT", 0x16a,
360 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
361MUX_CFG_34XX("AA5_3430_USB3HS_TLL_D0", 0x186,
362 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
363MUX_CFG_34XX("Y4_3430_USB3HS_TLL_D1", 0x184,
364 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
365MUX_CFG_34XX("Y5_3430_USB3HS_TLL_D2", 0x188,
366 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
367MUX_CFG_34XX("W5_3430_USB3HS_TLL_D3", 0x18a,
368 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
369MUX_CFG_34XX("AB12_3430_USB3HS_TLL_D4", 0x16c,
370 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
371MUX_CFG_34XX("AB13_3430_USB3HS_TLL_D5", 0x16e,
372 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
373MUX_CFG_34XX("AA13_3430_USB3HS_TLL_D6", 0x170,
374 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
375MUX_CFG_34XX("AA12_3430_USB3HS_TLL_D7", 0x172,
376 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
377
378/* PHY FSUSB: FS Serial for Port 1 (multiple PHY modes supported) */
379MUX_CFG_34XX("AF10_3430_USB1FS_PHY_MM1_RXDP", 0x5d8,
380 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
381MUX_CFG_34XX("AG9_3430_USB1FS_PHY_MM1_RXDM", 0x5ee,
382 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
383MUX_CFG_34XX("W13_3430_USB1FS_PHY_MM1_RXRCV", 0x5dc,
384 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
385MUX_CFG_34XX("W12_3430_USB1FS_PHY_MM1_TXSE0", 0x5de,
386 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
387MUX_CFG_34XX("W11_3430_USB1FS_PHY_MM1_TXDAT", 0x5e0,
388 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
389MUX_CFG_34XX("Y11_3430_USB1FS_PHY_MM1_TXEN_N", 0x5ea,
390 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_OUTPUT)
391
392/* PHY FSUSB: FS Serial for Port 2 (multiple PHY modes supported) */
393MUX_CFG_34XX("AF7_3430_USB2FS_PHY_MM2_RXDP", 0x5f2,
394 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
395MUX_CFG_34XX("AH7_3430_USB2FS_PHY_MM2_RXDM", 0x5f6,
396 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
397MUX_CFG_34XX("AB10_3430_USB2FS_PHY_MM2_RXRCV", 0x5f8,
398 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
399MUX_CFG_34XX("AB9_3430_USB2FS_PHY_MM2_TXSE0", 0x5fa,
400 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
401MUX_CFG_34XX("W3_3430_USB2FS_PHY_MM2_TXDAT", 0x1d4,
402 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
403MUX_CFG_34XX("T4_3430_USB2FS_PHY_MM2_TXEN_N", 0x1de,
404 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_OUTPUT)
405
406/* PHY FSUSB: FS Serial for Port 3 (multiple PHY modes supported) */
407MUX_CFG_34XX("AH3_3430_USB3FS_PHY_MM3_RXDP", 0x166,
408 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
409MUX_CFG_34XX("AE3_3430_USB3FS_PHY_MM3_RXDM", 0x16a,
410 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
411MUX_CFG_34XX("AD1_3430_USB3FS_PHY_MM3_RXRCV", 0x186,
412 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
413MUX_CFG_34XX("AE1_3430_USB3FS_PHY_MM3_TXSE0", 0x184,
414 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
415MUX_CFG_34XX("AD2_3430_USB3FS_PHY_MM3_TXDAT", 0x188,
416 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
417MUX_CFG_34XX("AC1_3430_USB3FS_PHY_MM3_TXEN_N", 0x18a,
418 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_OUTPUT)
419
420};
421
422#define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins)
423
424#else
425#define omap34xx_pins NULL
426#define OMAP34XX_PINS_SZ 0
427#endif /* CONFIG_ARCH_OMAP34XX */
225 428
226#if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS) 429#if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
227void __init_or_module omap2_cfg_debug(const struct pin_config *cfg, u8 reg) 430static void __init_or_module omap2_cfg_debug(const struct pin_config *cfg, u16 reg)
228{ 431{
229 u16 orig; 432 u16 orig;
230 u8 warn = 0, debug = 0; 433 u8 warn = 0, debug = 0;
231 434
232 orig = omap_ctrl_readb(cfg->mux_reg); 435 if (cpu_is_omap24xx())
436 orig = omap_ctrl_readb(cfg->mux_reg);
437 else
438 orig = omap_ctrl_readw(cfg->mux_reg);
233 439
234#ifdef CONFIG_OMAP_MUX_DEBUG 440#ifdef CONFIG_OMAP_MUX_DEBUG
235 debug = cfg->debug; 441 debug = cfg->debug;
@@ -255,9 +461,9 @@ int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg)
255 spin_lock_irqsave(&mux_spin_lock, flags); 461 spin_lock_irqsave(&mux_spin_lock, flags);
256 reg |= cfg->mask & 0x7; 462 reg |= cfg->mask & 0x7;
257 if (cfg->pull_val) 463 if (cfg->pull_val)
258 reg |= OMAP24XX_PULL_ENA; 464 reg |= OMAP2_PULL_ENA;
259 if (cfg->pu_pd_val) 465 if (cfg->pu_pd_val)
260 reg |= OMAP24XX_PULL_UP; 466 reg |= OMAP2_PULL_UP;
261 omap2_cfg_debug(cfg, reg); 467 omap2_cfg_debug(cfg, reg);
262 omap_ctrl_writeb(reg, cfg->mux_reg); 468 omap_ctrl_writeb(reg, cfg->mux_reg);
263 spin_unlock_irqrestore(&mux_spin_lock, flags); 469 spin_unlock_irqrestore(&mux_spin_lock, flags);
@@ -265,7 +471,26 @@ int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg)
265 return 0; 471 return 0;
266} 472}
267#else 473#else
268#define omap24xx_cfg_reg 0 474#define omap24xx_cfg_reg NULL
475#endif
476
477#ifdef CONFIG_ARCH_OMAP34XX
478static int __init_or_module omap34xx_cfg_reg(const struct pin_config *cfg)
479{
480 static DEFINE_SPINLOCK(mux_spin_lock);
481 unsigned long flags;
482 u16 reg = 0;
483
484 spin_lock_irqsave(&mux_spin_lock, flags);
485 reg |= cfg->mux_val;
486 omap2_cfg_debug(cfg, reg);
487 omap_ctrl_writew(reg, cfg->mux_reg);
488 spin_unlock_irqrestore(&mux_spin_lock, flags);
489
490 return 0;
491}
492#else
493#define omap34xx_cfg_reg NULL
269#endif 494#endif
270 495
271int __init omap2_mux_init(void) 496int __init omap2_mux_init(void)
@@ -274,6 +499,10 @@ int __init omap2_mux_init(void)
274 arch_mux_cfg.pins = omap24xx_pins; 499 arch_mux_cfg.pins = omap24xx_pins;
275 arch_mux_cfg.size = OMAP24XX_PINS_SZ; 500 arch_mux_cfg.size = OMAP24XX_PINS_SZ;
276 arch_mux_cfg.cfg_reg = omap24xx_cfg_reg; 501 arch_mux_cfg.cfg_reg = omap24xx_cfg_reg;
502 } else if (cpu_is_omap34xx()) {
503 arch_mux_cfg.pins = omap34xx_pins;
504 arch_mux_cfg.size = OMAP34XX_PINS_SZ;
505 arch_mux_cfg.cfg_reg = omap34xx_cfg_reg;
277 } 506 }
278 507
279 return omap_mux_register(&arch_mux_cfg); 508 return omap_mux_register(&arch_mux_cfg);
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
new file mode 100644
index 000000000000..73e2971b1757
--- /dev/null
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -0,0 +1,1113 @@
1/*
2 * OMAP powerdomain control
3 *
4 * Copyright (C) 2007-2008 Texas Instruments, Inc.
5 * Copyright (C) 2007-2008 Nokia Corporation
6 *
7 * Written by Paul Walmsley
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13#ifdef CONFIG_OMAP_DEBUG_POWERDOMAIN
14# define DEBUG
15#endif
16
17#include <linux/kernel.h>
18#include <linux/module.h>
19#include <linux/types.h>
20#include <linux/delay.h>
21#include <linux/spinlock.h>
22#include <linux/list.h>
23#include <linux/errno.h>
24#include <linux/err.h>
25#include <linux/io.h>
26
27#include <asm/atomic.h>
28
29#include "cm.h"
30#include "cm-regbits-34xx.h"
31#include "prm.h"
32#include "prm-regbits-34xx.h"
33
34#include <mach/cpu.h>
35#include <mach/powerdomain.h>
36#include <mach/clockdomain.h>
37
38/* pwrdm_list contains all registered struct powerdomains */
39static LIST_HEAD(pwrdm_list);
40
41/*
42 * pwrdm_rwlock protects pwrdm_list add and del ops - also reused to
43 * protect pwrdm_clkdms[] during clkdm add/del ops
44 */
45static DEFINE_RWLOCK(pwrdm_rwlock);
46
47
48/* Private functions */
49
50static u32 prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask)
51{
52 u32 v;
53
54 v = prm_read_mod_reg(domain, idx);
55 v &= mask;
56 v >>= __ffs(mask);
57
58 return v;
59}
60
61static struct powerdomain *_pwrdm_lookup(const char *name)
62{
63 struct powerdomain *pwrdm, *temp_pwrdm;
64
65 pwrdm = NULL;
66
67 list_for_each_entry(temp_pwrdm, &pwrdm_list, node) {
68 if (!strcmp(name, temp_pwrdm->name)) {
69 pwrdm = temp_pwrdm;
70 break;
71 }
72 }
73
74 return pwrdm;
75}
76
77/* _pwrdm_deps_lookup - look up the specified powerdomain in a pwrdm list */
78static struct powerdomain *_pwrdm_deps_lookup(struct powerdomain *pwrdm,
79 struct pwrdm_dep *deps)
80{
81 struct pwrdm_dep *pd;
82
83 if (!pwrdm || !deps || !omap_chip_is(pwrdm->omap_chip))
84 return ERR_PTR(-EINVAL);
85
86 for (pd = deps; pd; pd++) {
87
88 if (!omap_chip_is(pd->omap_chip))
89 continue;
90
91 if (!pd->pwrdm && pd->pwrdm_name)
92 pd->pwrdm = pwrdm_lookup(pd->pwrdm_name);
93
94 if (pd->pwrdm == pwrdm)
95 break;
96
97 }
98
99 if (!pd)
100 return ERR_PTR(-ENOENT);
101
102 return pd->pwrdm;
103}
104
105
106/* Public functions */
107
108/**
109 * pwrdm_init - set up the powerdomain layer
110 *
111 * Loop through the list of powerdomains, registering all that are
112 * available on the current CPU. If pwrdm_list is supplied and not
113 * null, all of the referenced powerdomains will be registered. No
114 * return value.
115 */
116void pwrdm_init(struct powerdomain **pwrdm_list)
117{
118 struct powerdomain **p = NULL;
119
120 if (pwrdm_list)
121 for (p = pwrdm_list; *p; p++)
122 pwrdm_register(*p);
123}
124
125/**
126 * pwrdm_register - register a powerdomain
127 * @pwrdm: struct powerdomain * to register
128 *
129 * Adds a powerdomain to the internal powerdomain list. Returns
130 * -EINVAL if given a null pointer, -EEXIST if a powerdomain is
131 * already registered by the provided name, or 0 upon success.
132 */
133int pwrdm_register(struct powerdomain *pwrdm)
134{
135 unsigned long flags;
136 int ret = -EINVAL;
137
138 if (!pwrdm)
139 return -EINVAL;
140
141 if (!omap_chip_is(pwrdm->omap_chip))
142 return -EINVAL;
143
144 write_lock_irqsave(&pwrdm_rwlock, flags);
145 if (_pwrdm_lookup(pwrdm->name)) {
146 ret = -EEXIST;
147 goto pr_unlock;
148 }
149
150 list_add(&pwrdm->node, &pwrdm_list);
151
152 pr_debug("powerdomain: registered %s\n", pwrdm->name);
153 ret = 0;
154
155pr_unlock:
156 write_unlock_irqrestore(&pwrdm_rwlock, flags);
157
158 return ret;
159}
160
161/**
162 * pwrdm_unregister - unregister a powerdomain
163 * @pwrdm: struct powerdomain * to unregister
164 *
165 * Removes a powerdomain from the internal powerdomain list. Returns
166 * -EINVAL if pwrdm argument is NULL.
167 */
168int pwrdm_unregister(struct powerdomain *pwrdm)
169{
170 unsigned long flags;
171
172 if (!pwrdm)
173 return -EINVAL;
174
175 write_lock_irqsave(&pwrdm_rwlock, flags);
176 list_del(&pwrdm->node);
177 write_unlock_irqrestore(&pwrdm_rwlock, flags);
178
179 pr_debug("powerdomain: unregistered %s\n", pwrdm->name);
180
181 return 0;
182}
183
184/**
185 * pwrdm_lookup - look up a powerdomain by name, return a pointer
186 * @name: name of powerdomain
187 *
188 * Find a registered powerdomain by its name. Returns a pointer to the
189 * struct powerdomain if found, or NULL otherwise.
190 */
191struct powerdomain *pwrdm_lookup(const char *name)
192{
193 struct powerdomain *pwrdm;
194 unsigned long flags;
195
196 if (!name)
197 return NULL;
198
199 read_lock_irqsave(&pwrdm_rwlock, flags);
200 pwrdm = _pwrdm_lookup(name);
201 read_unlock_irqrestore(&pwrdm_rwlock, flags);
202
203 return pwrdm;
204}
205
206/**
207 * pwrdm_for_each - call function on each registered clockdomain
208 * @fn: callback function *
209 *
210 * Call the supplied function for each registered powerdomain. The
211 * callback function can return anything but 0 to bail out early from
212 * the iterator. The callback function is called with the pwrdm_rwlock
213 * held for reading, so no powerdomain structure manipulation
214 * functions should be called from the callback, although hardware
215 * powerdomain control functions are fine. Returns the last return
216 * value of the callback function, which should be 0 for success or
217 * anything else to indicate failure; or -EINVAL if the function
218 * pointer is null.
219 */
220int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm))
221{
222 struct powerdomain *temp_pwrdm;
223 unsigned long flags;
224 int ret = 0;
225
226 if (!fn)
227 return -EINVAL;
228
229 read_lock_irqsave(&pwrdm_rwlock, flags);
230 list_for_each_entry(temp_pwrdm, &pwrdm_list, node) {
231 ret = (*fn)(temp_pwrdm);
232 if (ret)
233 break;
234 }
235 read_unlock_irqrestore(&pwrdm_rwlock, flags);
236
237 return ret;
238}
239
240/**
241 * pwrdm_add_clkdm - add a clockdomain to a powerdomain
242 * @pwrdm: struct powerdomain * to add the clockdomain to
243 * @clkdm: struct clockdomain * to associate with a powerdomain
244 *
245 * Associate the clockdomain 'clkdm' with a powerdomain 'pwrdm'. This
246 * enables the use of pwrdm_for_each_clkdm(). Returns -EINVAL if
247 * presented with invalid pointers; -ENOMEM if memory could not be allocated;
248 * or 0 upon success.
249 */
250int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm)
251{
252 unsigned long flags;
253 int i;
254 int ret = -EINVAL;
255
256 if (!pwrdm || !clkdm)
257 return -EINVAL;
258
259 pr_debug("powerdomain: associating clockdomain %s with powerdomain "
260 "%s\n", clkdm->name, pwrdm->name);
261
262 write_lock_irqsave(&pwrdm_rwlock, flags);
263
264 for (i = 0; i < PWRDM_MAX_CLKDMS; i++) {
265 if (!pwrdm->pwrdm_clkdms[i])
266 break;
267#ifdef DEBUG
268 if (pwrdm->pwrdm_clkdms[i] == clkdm) {
269 ret = -EINVAL;
270 goto pac_exit;
271 }
272#endif
273 }
274
275 if (i == PWRDM_MAX_CLKDMS) {
276 pr_debug("powerdomain: increase PWRDM_MAX_CLKDMS for "
277 "pwrdm %s clkdm %s\n", pwrdm->name, clkdm->name);
278 WARN_ON(1);
279 ret = -ENOMEM;
280 goto pac_exit;
281 }
282
283 pwrdm->pwrdm_clkdms[i] = clkdm;
284
285 ret = 0;
286
287pac_exit:
288 write_unlock_irqrestore(&pwrdm_rwlock, flags);
289
290 return ret;
291}
292
293/**
294 * pwrdm_del_clkdm - remove a clockdomain from a powerdomain
295 * @pwrdm: struct powerdomain * to add the clockdomain to
296 * @clkdm: struct clockdomain * to associate with a powerdomain
297 *
298 * Dissociate the clockdomain 'clkdm' from the powerdomain
299 * 'pwrdm'. Returns -EINVAL if presented with invalid pointers;
300 * -ENOENT if the clkdm was not associated with the powerdomain, or 0
301 * upon success.
302 */
303int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm)
304{
305 unsigned long flags;
306 int ret = -EINVAL;
307 int i;
308
309 if (!pwrdm || !clkdm)
310 return -EINVAL;
311
312 pr_debug("powerdomain: dissociating clockdomain %s from powerdomain "
313 "%s\n", clkdm->name, pwrdm->name);
314
315 write_lock_irqsave(&pwrdm_rwlock, flags);
316
317 for (i = 0; i < PWRDM_MAX_CLKDMS; i++)
318 if (pwrdm->pwrdm_clkdms[i] == clkdm)
319 break;
320
321 if (i == PWRDM_MAX_CLKDMS) {
322 pr_debug("powerdomain: clkdm %s not associated with pwrdm "
323 "%s ?!\n", clkdm->name, pwrdm->name);
324 ret = -ENOENT;
325 goto pdc_exit;
326 }
327
328 pwrdm->pwrdm_clkdms[i] = NULL;
329
330 ret = 0;
331
332pdc_exit:
333 write_unlock_irqrestore(&pwrdm_rwlock, flags);
334
335 return ret;
336}
337
338/**
339 * pwrdm_for_each_clkdm - call function on each clkdm in a pwrdm
340 * @pwrdm: struct powerdomain * to iterate over
341 * @fn: callback function *
342 *
343 * Call the supplied function for each clockdomain in the powerdomain
344 * 'pwrdm'. The callback function can return anything but 0 to bail
345 * out early from the iterator. The callback function is called with
346 * the pwrdm_rwlock held for reading, so no powerdomain structure
347 * manipulation functions should be called from the callback, although
348 * hardware powerdomain control functions are fine. Returns -EINVAL
349 * if presented with invalid pointers; or passes along the last return
350 * value of the callback function, which should be 0 for success or
351 * anything else to indicate failure.
352 */
353int pwrdm_for_each_clkdm(struct powerdomain *pwrdm,
354 int (*fn)(struct powerdomain *pwrdm,
355 struct clockdomain *clkdm))
356{
357 unsigned long flags;
358 int ret = 0;
359 int i;
360
361 if (!fn)
362 return -EINVAL;
363
364 read_lock_irqsave(&pwrdm_rwlock, flags);
365
366 for (i = 0; i < PWRDM_MAX_CLKDMS && !ret; i++)
367 ret = (*fn)(pwrdm, pwrdm->pwrdm_clkdms[i]);
368
369 read_unlock_irqrestore(&pwrdm_rwlock, flags);
370
371 return ret;
372}
373
374
375/**
376 * pwrdm_add_wkdep - add a wakeup dependency from pwrdm2 to pwrdm1
377 * @pwrdm1: wake this struct powerdomain * up (dependent)
378 * @pwrdm2: when this struct powerdomain * wakes up (source)
379 *
380 * When the powerdomain represented by pwrdm2 wakes up (due to an
381 * interrupt), wake up pwrdm1. Implemented in hardware on the OMAP,
382 * this feature is designed to reduce wakeup latency of the dependent
383 * powerdomain. Returns -EINVAL if presented with invalid powerdomain
384 * pointers, -ENOENT if pwrdm2 cannot wake up pwrdm1 in hardware, or
385 * 0 upon success.
386 */
387int pwrdm_add_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2)
388{
389 struct powerdomain *p;
390
391 if (!pwrdm1)
392 return -EINVAL;
393
394 p = _pwrdm_deps_lookup(pwrdm2, pwrdm1->wkdep_srcs);
395 if (IS_ERR(p)) {
396 pr_debug("powerdomain: hardware cannot set/clear wake up of "
397 "%s when %s wakes up\n", pwrdm1->name, pwrdm2->name);
398 return IS_ERR(p);
399 }
400
401 pr_debug("powerdomain: hardware will wake up %s when %s wakes up\n",
402 pwrdm1->name, pwrdm2->name);
403
404 prm_set_mod_reg_bits((1 << pwrdm2->dep_bit),
405 pwrdm1->prcm_offs, PM_WKDEP);
406
407 return 0;
408}
409
410/**
411 * pwrdm_del_wkdep - remove a wakeup dependency from pwrdm2 to pwrdm1
412 * @pwrdm1: wake this struct powerdomain * up (dependent)
413 * @pwrdm2: when this struct powerdomain * wakes up (source)
414 *
415 * Remove a wakeup dependency that causes pwrdm1 to wake up when pwrdm2
416 * wakes up. Returns -EINVAL if presented with invalid powerdomain
417 * pointers, -ENOENT if pwrdm2 cannot wake up pwrdm1 in hardware, or
418 * 0 upon success.
419 */
420int pwrdm_del_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2)
421{
422 struct powerdomain *p;
423
424 if (!pwrdm1)
425 return -EINVAL;
426
427 p = _pwrdm_deps_lookup(pwrdm2, pwrdm1->wkdep_srcs);
428 if (IS_ERR(p)) {
429 pr_debug("powerdomain: hardware cannot set/clear wake up of "
430 "%s when %s wakes up\n", pwrdm1->name, pwrdm2->name);
431 return IS_ERR(p);
432 }
433
434 pr_debug("powerdomain: hardware will no longer wake up %s after %s "
435 "wakes up\n", pwrdm1->name, pwrdm2->name);
436
437 prm_clear_mod_reg_bits((1 << pwrdm2->dep_bit),
438 pwrdm1->prcm_offs, PM_WKDEP);
439
440 return 0;
441}
442
443/**
444 * pwrdm_read_wkdep - read wakeup dependency state from pwrdm2 to pwrdm1
445 * @pwrdm1: wake this struct powerdomain * up (dependent)
446 * @pwrdm2: when this struct powerdomain * wakes up (source)
447 *
448 * Return 1 if a hardware wakeup dependency exists wherein pwrdm1 will be
449 * awoken when pwrdm2 wakes up; 0 if dependency is not set; -EINVAL
450 * if either powerdomain pointer is invalid; or -ENOENT if the hardware
451 * is incapable.
452 *
453 * REVISIT: Currently this function only represents software-controllable
454 * wakeup dependencies. Wakeup dependencies fixed in hardware are not
455 * yet handled here.
456 */
457int pwrdm_read_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2)
458{
459 struct powerdomain *p;
460
461 if (!pwrdm1)
462 return -EINVAL;
463
464 p = _pwrdm_deps_lookup(pwrdm2, pwrdm1->wkdep_srcs);
465 if (IS_ERR(p)) {
466 pr_debug("powerdomain: hardware cannot set/clear wake up of "
467 "%s when %s wakes up\n", pwrdm1->name, pwrdm2->name);
468 return IS_ERR(p);
469 }
470
471 return prm_read_mod_bits_shift(pwrdm1->prcm_offs, PM_WKDEP,
472 (1 << pwrdm2->dep_bit));
473}
474
475/**
476 * pwrdm_add_sleepdep - add a sleep dependency from pwrdm2 to pwrdm1
477 * @pwrdm1: prevent this struct powerdomain * from sleeping (dependent)
478 * @pwrdm2: when this struct powerdomain * is active (source)
479 *
480 * Prevent pwrdm1 from automatically going inactive (and then to
481 * retention or off) if pwrdm2 is still active. Returns -EINVAL if
482 * presented with invalid powerdomain pointers or called on a machine
483 * that does not support software-configurable hardware sleep dependencies,
484 * -ENOENT if the specified dependency cannot be set in hardware, or
485 * 0 upon success.
486 */
487int pwrdm_add_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2)
488{
489 struct powerdomain *p;
490
491 if (!pwrdm1)
492 return -EINVAL;
493
494 if (!cpu_is_omap34xx())
495 return -EINVAL;
496
497 p = _pwrdm_deps_lookup(pwrdm2, pwrdm1->sleepdep_srcs);
498 if (IS_ERR(p)) {
499 pr_debug("powerdomain: hardware cannot set/clear sleep "
500 "dependency affecting %s from %s\n", pwrdm1->name,
501 pwrdm2->name);
502 return IS_ERR(p);
503 }
504
505 pr_debug("powerdomain: will prevent %s from sleeping if %s is active\n",
506 pwrdm1->name, pwrdm2->name);
507
508 cm_set_mod_reg_bits((1 << pwrdm2->dep_bit),
509 pwrdm1->prcm_offs, OMAP3430_CM_SLEEPDEP);
510
511 return 0;
512}
513
514/**
515 * pwrdm_del_sleepdep - remove a sleep dependency from pwrdm2 to pwrdm1
516 * @pwrdm1: prevent this struct powerdomain * from sleeping (dependent)
517 * @pwrdm2: when this struct powerdomain * is active (source)
518 *
519 * Allow pwrdm1 to automatically go inactive (and then to retention or
520 * off), independent of the activity state of pwrdm2. Returns -EINVAL
521 * if presented with invalid powerdomain pointers or called on a machine
522 * that does not support software-configurable hardware sleep dependencies,
523 * -ENOENT if the specified dependency cannot be cleared in hardware, or
524 * 0 upon success.
525 */
526int pwrdm_del_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2)
527{
528 struct powerdomain *p;
529
530 if (!pwrdm1)
531 return -EINVAL;
532
533 if (!cpu_is_omap34xx())
534 return -EINVAL;
535
536 p = _pwrdm_deps_lookup(pwrdm2, pwrdm1->sleepdep_srcs);
537 if (IS_ERR(p)) {
538 pr_debug("powerdomain: hardware cannot set/clear sleep "
539 "dependency affecting %s from %s\n", pwrdm1->name,
540 pwrdm2->name);
541 return IS_ERR(p);
542 }
543
544 pr_debug("powerdomain: will no longer prevent %s from sleeping if "
545 "%s is active\n", pwrdm1->name, pwrdm2->name);
546
547 cm_clear_mod_reg_bits((1 << pwrdm2->dep_bit),
548 pwrdm1->prcm_offs, OMAP3430_CM_SLEEPDEP);
549
550 return 0;
551}
552
553/**
554 * pwrdm_read_sleepdep - read sleep dependency state from pwrdm2 to pwrdm1
555 * @pwrdm1: prevent this struct powerdomain * from sleeping (dependent)
556 * @pwrdm2: when this struct powerdomain * is active (source)
557 *
558 * Return 1 if a hardware sleep dependency exists wherein pwrdm1 will
559 * not be allowed to automatically go inactive if pwrdm2 is active;
560 * 0 if pwrdm1's automatic power state inactivity transition is independent
561 * of pwrdm2's; -EINVAL if either powerdomain pointer is invalid or called
562 * on a machine that does not support software-configurable hardware sleep
563 * dependencies; or -ENOENT if the hardware is incapable.
564 *
565 * REVISIT: Currently this function only represents software-controllable
566 * sleep dependencies. Sleep dependencies fixed in hardware are not
567 * yet handled here.
568 */
569int pwrdm_read_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2)
570{
571 struct powerdomain *p;
572
573 if (!pwrdm1)
574 return -EINVAL;
575
576 if (!cpu_is_omap34xx())
577 return -EINVAL;
578
579 p = _pwrdm_deps_lookup(pwrdm2, pwrdm1->sleepdep_srcs);
580 if (IS_ERR(p)) {
581 pr_debug("powerdomain: hardware cannot set/clear sleep "
582 "dependency affecting %s from %s\n", pwrdm1->name,
583 pwrdm2->name);
584 return IS_ERR(p);
585 }
586
587 return prm_read_mod_bits_shift(pwrdm1->prcm_offs, OMAP3430_CM_SLEEPDEP,
588 (1 << pwrdm2->dep_bit));
589}
590
591/**
592 * pwrdm_get_mem_bank_count - get number of memory banks in this powerdomain
593 * @pwrdm: struct powerdomain *
594 *
595 * Return the number of controllable memory banks in powerdomain pwrdm,
596 * starting with 1. Returns -EINVAL if the powerdomain pointer is null.
597 */
598int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm)
599{
600 if (!pwrdm)
601 return -EINVAL;
602
603 return pwrdm->banks;
604}
605
606/**
607 * pwrdm_set_next_pwrst - set next powerdomain power state
608 * @pwrdm: struct powerdomain * to set
609 * @pwrst: one of the PWRDM_POWER_* macros
610 *
611 * Set the powerdomain pwrdm's next power state to pwrst. The powerdomain
612 * may not enter this state immediately if the preconditions for this state
613 * have not been satisfied. Returns -EINVAL if the powerdomain pointer is
614 * null or if the power state is invalid for the powerdomin, or returns 0
615 * upon success.
616 */
617int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
618{
619 if (!pwrdm)
620 return -EINVAL;
621
622 if (!(pwrdm->pwrsts & (1 << pwrst)))
623 return -EINVAL;
624
625 pr_debug("powerdomain: setting next powerstate for %s to %0x\n",
626 pwrdm->name, pwrst);
627
628 prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
629 (pwrst << OMAP_POWERSTATE_SHIFT),
630 pwrdm->prcm_offs, PM_PWSTCTRL);
631
632 return 0;
633}
634
635/**
636 * pwrdm_read_next_pwrst - get next powerdomain power state
637 * @pwrdm: struct powerdomain * to get power state
638 *
639 * Return the powerdomain pwrdm's next power state. Returns -EINVAL
640 * if the powerdomain pointer is null or returns the next power state
641 * upon success.
642 */
643int pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
644{
645 if (!pwrdm)
646 return -EINVAL;
647
648 return prm_read_mod_bits_shift(pwrdm->prcm_offs, PM_PWSTCTRL,
649 OMAP_POWERSTATE_MASK);
650}
651
652/**
653 * pwrdm_read_pwrst - get current powerdomain power state
654 * @pwrdm: struct powerdomain * to get power state
655 *
656 * Return the powerdomain pwrdm's current power state. Returns -EINVAL
657 * if the powerdomain pointer is null or returns the current power state
658 * upon success.
659 */
660int pwrdm_read_pwrst(struct powerdomain *pwrdm)
661{
662 if (!pwrdm)
663 return -EINVAL;
664
665 return prm_read_mod_bits_shift(pwrdm->prcm_offs, PM_PWSTST,
666 OMAP_POWERSTATEST_MASK);
667}
668
669/**
670 * pwrdm_read_prev_pwrst - get previous powerdomain power state
671 * @pwrdm: struct powerdomain * to get previous power state
672 *
673 * Return the powerdomain pwrdm's previous power state. Returns -EINVAL
674 * if the powerdomain pointer is null or returns the previous power state
675 * upon success.
676 */
677int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
678{
679 if (!pwrdm)
680 return -EINVAL;
681
682 return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST,
683 OMAP3430_LASTPOWERSTATEENTERED_MASK);
684}
685
686/**
687 * pwrdm_set_logic_retst - set powerdomain logic power state upon retention
688 * @pwrdm: struct powerdomain * to set
689 * @pwrst: one of the PWRDM_POWER_* macros
690 *
691 * Set the next power state that the logic portion of the powerdomain
692 * pwrdm will enter when the powerdomain enters retention. This will
693 * be either RETENTION or OFF, if supported. Returns -EINVAL if the
694 * powerdomain pointer is null or the target power state is not not
695 * supported, or returns 0 upon success.
696 */
697int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst)
698{
699 if (!pwrdm)
700 return -EINVAL;
701
702 if (!(pwrdm->pwrsts_logic_ret & (1 << pwrst)))
703 return -EINVAL;
704
705 pr_debug("powerdomain: setting next logic powerstate for %s to %0x\n",
706 pwrdm->name, pwrst);
707
708 /*
709 * The register bit names below may not correspond to the
710 * actual names of the bits in each powerdomain's register,
711 * but the type of value returned is the same for each
712 * powerdomain.
713 */
714 prm_rmw_mod_reg_bits(OMAP3430_LOGICL1CACHERETSTATE,
715 (pwrst << __ffs(OMAP3430_LOGICL1CACHERETSTATE)),
716 pwrdm->prcm_offs, PM_PWSTCTRL);
717
718 return 0;
719}
720
721/**
722 * pwrdm_set_mem_onst - set memory power state while powerdomain ON
723 * @pwrdm: struct powerdomain * to set
724 * @bank: memory bank number to set (0-3)
725 * @pwrst: one of the PWRDM_POWER_* macros
726 *
727 * Set the next power state that memory bank x of the powerdomain
728 * pwrdm will enter when the powerdomain enters the ON state. Bank
729 * will be a number from 0 to 3, and represents different types of
730 * memory, depending on the powerdomain. Returns -EINVAL if the
731 * powerdomain pointer is null or the target power state is not not
732 * supported for this memory bank, -EEXIST if the target memory bank
733 * does not exist or is not controllable, or returns 0 upon success.
734 */
735int pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, u8 pwrst)
736{
737 u32 m;
738
739 if (!pwrdm)
740 return -EINVAL;
741
742 if (pwrdm->banks < (bank + 1))
743 return -EEXIST;
744
745 if (!(pwrdm->pwrsts_mem_on[bank] & (1 << pwrst)))
746 return -EINVAL;
747
748 pr_debug("powerdomain: setting next memory powerstate for domain %s "
749 "bank %0x while pwrdm-ON to %0x\n", pwrdm->name, bank, pwrst);
750
751 /*
752 * The register bit names below may not correspond to the
753 * actual names of the bits in each powerdomain's register,
754 * but the type of value returned is the same for each
755 * powerdomain.
756 */
757 switch (bank) {
758 case 0:
759 m = OMAP3430_SHAREDL1CACHEFLATONSTATE_MASK;
760 break;
761 case 1:
762 m = OMAP3430_L1FLATMEMONSTATE_MASK;
763 break;
764 case 2:
765 m = OMAP3430_SHAREDL2CACHEFLATONSTATE_MASK;
766 break;
767 case 3:
768 m = OMAP3430_L2FLATMEMONSTATE_MASK;
769 break;
770 default:
771 WARN_ON(1); /* should never happen */
772 return -EEXIST;
773 }
774
775 prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)),
776 pwrdm->prcm_offs, PM_PWSTCTRL);
777
778 return 0;
779}
780
781/**
782 * pwrdm_set_mem_retst - set memory power state while powerdomain in RET
783 * @pwrdm: struct powerdomain * to set
784 * @bank: memory bank number to set (0-3)
785 * @pwrst: one of the PWRDM_POWER_* macros
786 *
787 * Set the next power state that memory bank x of the powerdomain
788 * pwrdm will enter when the powerdomain enters the RETENTION state.
789 * Bank will be a number from 0 to 3, and represents different types
790 * of memory, depending on the powerdomain. pwrst will be either
791 * RETENTION or OFF, if supported. Returns -EINVAL if the powerdomain
792 * pointer is null or the target power state is not not supported for
793 * this memory bank, -EEXIST if the target memory bank does not exist
794 * or is not controllable, or returns 0 upon success.
795 */
796int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, u8 pwrst)
797{
798 u32 m;
799
800 if (!pwrdm)
801 return -EINVAL;
802
803 if (pwrdm->banks < (bank + 1))
804 return -EEXIST;
805
806 if (!(pwrdm->pwrsts_mem_ret[bank] & (1 << pwrst)))
807 return -EINVAL;
808
809 pr_debug("powerdomain: setting next memory powerstate for domain %s "
810 "bank %0x while pwrdm-RET to %0x\n", pwrdm->name, bank, pwrst);
811
812 /*
813 * The register bit names below may not correspond to the
814 * actual names of the bits in each powerdomain's register,
815 * but the type of value returned is the same for each
816 * powerdomain.
817 */
818 switch (bank) {
819 case 0:
820 m = OMAP3430_SHAREDL1CACHEFLATRETSTATE;
821 break;
822 case 1:
823 m = OMAP3430_L1FLATMEMRETSTATE;
824 break;
825 case 2:
826 m = OMAP3430_SHAREDL2CACHEFLATRETSTATE;
827 break;
828 case 3:
829 m = OMAP3430_L2FLATMEMRETSTATE;
830 break;
831 default:
832 WARN_ON(1); /* should never happen */
833 return -EEXIST;
834 }
835
836 prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs,
837 PM_PWSTCTRL);
838
839 return 0;
840}
841
842/**
843 * pwrdm_read_logic_pwrst - get current powerdomain logic retention power state
844 * @pwrdm: struct powerdomain * to get current logic retention power state
845 *
846 * Return the current power state that the logic portion of
847 * powerdomain pwrdm will enter
848 * Returns -EINVAL if the powerdomain pointer is null or returns the
849 * current logic retention power state upon success.
850 */
851int pwrdm_read_logic_pwrst(struct powerdomain *pwrdm)
852{
853 if (!pwrdm)
854 return -EINVAL;
855
856 return prm_read_mod_bits_shift(pwrdm->prcm_offs, PM_PWSTST,
857 OMAP3430_LOGICSTATEST);
858}
859
860/**
861 * pwrdm_read_prev_logic_pwrst - get previous powerdomain logic power state
862 * @pwrdm: struct powerdomain * to get previous logic power state
863 *
864 * Return the powerdomain pwrdm's logic power state. Returns -EINVAL
865 * if the powerdomain pointer is null or returns the previous logic
866 * power state upon success.
867 */
868int pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm)
869{
870 if (!pwrdm)
871 return -EINVAL;
872
873 /*
874 * The register bit names below may not correspond to the
875 * actual names of the bits in each powerdomain's register,
876 * but the type of value returned is the same for each
877 * powerdomain.
878 */
879 return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST,
880 OMAP3430_LASTLOGICSTATEENTERED);
881}
882
883/**
884 * pwrdm_read_mem_pwrst - get current memory bank power state
885 * @pwrdm: struct powerdomain * to get current memory bank power state
886 * @bank: memory bank number (0-3)
887 *
888 * Return the powerdomain pwrdm's current memory power state for bank
889 * x. Returns -EINVAL if the powerdomain pointer is null, -EEXIST if
890 * the target memory bank does not exist or is not controllable, or
891 * returns the current memory power state upon success.
892 */
893int pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
894{
895 u32 m;
896
897 if (!pwrdm)
898 return -EINVAL;
899
900 if (pwrdm->banks < (bank + 1))
901 return -EEXIST;
902
903 /*
904 * The register bit names below may not correspond to the
905 * actual names of the bits in each powerdomain's register,
906 * but the type of value returned is the same for each
907 * powerdomain.
908 */
909 switch (bank) {
910 case 0:
911 m = OMAP3430_SHAREDL1CACHEFLATSTATEST_MASK;
912 break;
913 case 1:
914 m = OMAP3430_L1FLATMEMSTATEST_MASK;
915 break;
916 case 2:
917 m = OMAP3430_SHAREDL2CACHEFLATSTATEST_MASK;
918 break;
919 case 3:
920 m = OMAP3430_L2FLATMEMSTATEST_MASK;
921 break;
922 default:
923 WARN_ON(1); /* should never happen */
924 return -EEXIST;
925 }
926
927 return prm_read_mod_bits_shift(pwrdm->prcm_offs, PM_PWSTST, m);
928}
929
930/**
931 * pwrdm_read_prev_mem_pwrst - get previous memory bank power state
932 * @pwrdm: struct powerdomain * to get previous memory bank power state
933 * @bank: memory bank number (0-3)
934 *
935 * Return the powerdomain pwrdm's previous memory power state for bank
936 * x. Returns -EINVAL if the powerdomain pointer is null, -EEXIST if
937 * the target memory bank does not exist or is not controllable, or
938 * returns the previous memory power state upon success.
939 */
940int pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
941{
942 u32 m;
943
944 if (!pwrdm)
945 return -EINVAL;
946
947 if (pwrdm->banks < (bank + 1))
948 return -EEXIST;
949
950 /*
951 * The register bit names below may not correspond to the
952 * actual names of the bits in each powerdomain's register,
953 * but the type of value returned is the same for each
954 * powerdomain.
955 */
956 switch (bank) {
957 case 0:
958 m = OMAP3430_LASTMEM1STATEENTERED_MASK;
959 break;
960 case 1:
961 m = OMAP3430_LASTMEM2STATEENTERED_MASK;
962 break;
963 case 2:
964 m = OMAP3430_LASTSHAREDL2CACHEFLATSTATEENTERED_MASK;
965 break;
966 case 3:
967 m = OMAP3430_LASTL2FLATMEMSTATEENTERED_MASK;
968 break;
969 default:
970 WARN_ON(1); /* should never happen */
971 return -EEXIST;
972 }
973
974 return prm_read_mod_bits_shift(pwrdm->prcm_offs,
975 OMAP3430_PM_PREPWSTST, m);
976}
977
978/**
979 * pwrdm_clear_all_prev_pwrst - clear previous powerstate register for a pwrdm
980 * @pwrdm: struct powerdomain * to clear
981 *
982 * Clear the powerdomain's previous power state register. Clears the
983 * entire register, including logic and memory bank previous power states.
984 * Returns -EINVAL if the powerdomain pointer is null, or returns 0 upon
985 * success.
986 */
987int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm)
988{
989 if (!pwrdm)
990 return -EINVAL;
991
992 /*
993 * XXX should get the powerdomain's current state here;
994 * warn & fail if it is not ON.
995 */
996
997 pr_debug("powerdomain: clearing previous power state reg for %s\n",
998 pwrdm->name);
999
1000 prm_write_mod_reg(0, pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST);
1001
1002 return 0;
1003}
1004
1005/**
1006 * pwrdm_enable_hdwr_sar - enable automatic hardware SAR for a pwrdm
1007 * @pwrdm: struct powerdomain *
1008 *
1009 * Enable automatic context save-and-restore upon power state change
1010 * for some devices in a powerdomain. Warning: this only affects a
1011 * subset of devices in a powerdomain; check the TRM closely. Returns
1012 * -EINVAL if the powerdomain pointer is null or if the powerdomain
1013 * does not support automatic save-and-restore, or returns 0 upon
1014 * success.
1015 */
1016int pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm)
1017{
1018 if (!pwrdm)
1019 return -EINVAL;
1020
1021 if (!(pwrdm->flags & PWRDM_HAS_HDWR_SAR))
1022 return -EINVAL;
1023
1024 pr_debug("powerdomain: %s: setting SAVEANDRESTORE bit\n",
1025 pwrdm->name);
1026
1027 prm_rmw_mod_reg_bits(0, 1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT,
1028 pwrdm->prcm_offs, PM_PWSTCTRL);
1029
1030 return 0;
1031}
1032
1033/**
1034 * pwrdm_disable_hdwr_sar - disable automatic hardware SAR for a pwrdm
1035 * @pwrdm: struct powerdomain *
1036 *
1037 * Disable automatic context save-and-restore upon power state change
1038 * for some devices in a powerdomain. Warning: this only affects a
1039 * subset of devices in a powerdomain; check the TRM closely. Returns
1040 * -EINVAL if the powerdomain pointer is null or if the powerdomain
1041 * does not support automatic save-and-restore, or returns 0 upon
1042 * success.
1043 */
1044int pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm)
1045{
1046 if (!pwrdm)
1047 return -EINVAL;
1048
1049 if (!(pwrdm->flags & PWRDM_HAS_HDWR_SAR))
1050 return -EINVAL;
1051
1052 pr_debug("powerdomain: %s: clearing SAVEANDRESTORE bit\n",
1053 pwrdm->name);
1054
1055 prm_rmw_mod_reg_bits(1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT, 0,
1056 pwrdm->prcm_offs, PM_PWSTCTRL);
1057
1058 return 0;
1059}
1060
1061/**
1062 * pwrdm_has_hdwr_sar - test whether powerdomain supports hardware SAR
1063 * @pwrdm: struct powerdomain *
1064 *
1065 * Returns 1 if powerdomain 'pwrdm' supports hardware save-and-restore
1066 * for some devices, or 0 if it does not.
1067 */
1068bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm)
1069{
1070 return (pwrdm && pwrdm->flags & PWRDM_HAS_HDWR_SAR) ? 1 : 0;
1071}
1072
1073/**
1074 * pwrdm_wait_transition - wait for powerdomain power transition to finish
1075 * @pwrdm: struct powerdomain * to wait for
1076 *
1077 * If the powerdomain pwrdm is in the process of a state transition,
1078 * spin until it completes the power transition, or until an iteration
1079 * bailout value is reached. Returns -EINVAL if the powerdomain
1080 * pointer is null, -EAGAIN if the bailout value was reached, or
1081 * returns 0 upon success.
1082 */
1083int pwrdm_wait_transition(struct powerdomain *pwrdm)
1084{
1085 u32 c = 0;
1086
1087 if (!pwrdm)
1088 return -EINVAL;
1089
1090 /*
1091 * REVISIT: pwrdm_wait_transition() may be better implemented
1092 * via a callback and a periodic timer check -- how long do we expect
1093 * powerdomain transitions to take?
1094 */
1095
1096 /* XXX Is this udelay() value meaningful? */
1097 while ((prm_read_mod_reg(pwrdm->prcm_offs, PM_PWSTST) &
1098 OMAP_INTRANSITION) &&
1099 (c++ < PWRDM_TRANSITION_BAILOUT))
1100 udelay(1);
1101
1102 if (c >= PWRDM_TRANSITION_BAILOUT) {
1103 printk(KERN_ERR "powerdomain: waited too long for "
1104 "powerdomain %s to complete transition\n", pwrdm->name);
1105 return -EAGAIN;
1106 }
1107
1108 pr_debug("powerdomain: completed transition in %d loops\n", c);
1109
1110 return 0;
1111}
1112
1113
diff --git a/arch/arm/mach-omap2/powerdomains.h b/arch/arm/mach-omap2/powerdomains.h
new file mode 100644
index 000000000000..1e151faebbd3
--- /dev/null
+++ b/arch/arm/mach-omap2/powerdomains.h
@@ -0,0 +1,187 @@
1/*
2 * OMAP2/3 common powerdomain definitions
3 *
4 * Copyright (C) 2007-8 Texas Instruments, Inc.
5 * Copyright (C) 2007-8 Nokia Corporation
6 *
7 * Written by Paul Walmsley
8 * Debugging and integration fixes by Jouni Högander
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#ifndef ARCH_ARM_MACH_OMAP2_POWERDOMAINS
16#define ARCH_ARM_MACH_OMAP2_POWERDOMAINS
17
18/*
19 * This file contains all of the powerdomains that have some element
20 * of software control for the OMAP24xx and OMAP34XX chips.
21 *
22 * A few notes:
23 *
24 * This is not an exhaustive listing of powerdomains on the chips; only
25 * powerdomains that can be controlled in software.
26 *
27 * A useful validation rule for struct powerdomain:
28 * Any powerdomain referenced by a wkdep_srcs or sleepdep_srcs array
29 * must have a dep_bit assigned. So wkdep_srcs/sleepdep_srcs are really
30 * just software-controllable dependencies. Non-software-controllable
31 * dependencies do exist, but they are not encoded below (yet).
32 *
33 * 24xx does not support programmable sleep dependencies (SLEEPDEP)
34 *
35 */
36
37/*
38 * The names for the DSP/IVA2 powerdomains are confusing.
39 *
40 * Most OMAP chips have an on-board DSP.
41 *
42 * On the 2420, this is a 'C55 DSP called, simply, the DSP. Its
43 * powerdomain is called the "DSP power domain." On the 2430, the
44 * on-board DSP is a 'C64 DSP, now called the IVA2 or IVA2.1. Its
45 * powerdomain is still called the "DSP power domain." On the 3430,
46 * the DSP is a 'C64 DSP like the 2430, also known as the IVA2; but
47 * its powerdomain is now called the "IVA2 power domain."
48 *
49 * The 2420 also has something called the IVA, which is a separate ARM
50 * core, and has nothing to do with the DSP/IVA2.
51 *
52 * Ideally the DSP/IVA2 could just be the same powerdomain, but the PRCM
53 * address offset is different between the C55 and C64 DSPs.
54 *
55 * The overly-specific dep_bit names are due to a bit name collision
56 * with CM_FCLKEN_{DSP,IVA2}. The DSP/IVA2 PM_WKDEP and CM_SLEEPDEP shift
57 * value are the same for all powerdomains: 2
58 */
59
60/*
61 * XXX should dep_bit be a mask, so we can test to see if it is 0 as a
62 * sanity check?
63 * XXX encode hardware fixed wakeup dependencies -- esp. for 3430 CORE
64 */
65
66#include <mach/powerdomain.h>
67
68#include "prcm-common.h"
69#include "prm.h"
70#include "cm.h"
71
72/* OMAP2/3-common powerdomains and wakeup dependencies */
73
74/*
75 * 2420/2430 PM_WKDEP_GFX: CORE, MPU, WKUP
76 * 3430ES1 PM_WKDEP_GFX: adds IVA2, removes CORE
77 * 3430ES2 PM_WKDEP_SGX: adds IVA2, removes CORE
78 */
79static struct pwrdm_dep gfx_sgx_wkdeps[] = {
80 {
81 .pwrdm_name = "core_pwrdm",
82 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
83 },
84 {
85 .pwrdm_name = "iva2_pwrdm",
86 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
87 },
88 {
89 .pwrdm_name = "mpu_pwrdm",
90 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX |
91 CHIP_IS_OMAP3430)
92 },
93 {
94 .pwrdm_name = "wkup_pwrdm",
95 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX |
96 CHIP_IS_OMAP3430)
97 },
98 { NULL },
99};
100
101/*
102 * 3430: CM_SLEEPDEP_CAM: MPU
103 * 3430ES1: CM_SLEEPDEP_GFX: MPU
104 * 3430ES2: CM_SLEEPDEP_SGX: MPU
105 */
106static struct pwrdm_dep cam_gfx_sleepdeps[] = {
107 {
108 .pwrdm_name = "mpu_pwrdm",
109 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
110 },
111 { NULL },
112};
113
114
115#include "powerdomains24xx.h"
116#include "powerdomains34xx.h"
117
118
119/*
120 * OMAP2/3 common powerdomains
121 */
122
123/*
124 * The GFX powerdomain is not present on 3430ES2, but currently we do not
125 * have a macro to filter it out at compile-time.
126 */
127static struct powerdomain gfx_pwrdm = {
128 .name = "gfx_pwrdm",
129 .prcm_offs = GFX_MOD,
130 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX |
131 CHIP_IS_OMAP3430ES1),
132 .wkdep_srcs = gfx_sgx_wkdeps,
133 .sleepdep_srcs = cam_gfx_sleepdeps,
134 .pwrsts = PWRSTS_OFF_RET_ON,
135 .pwrsts_logic_ret = PWRDM_POWER_RET,
136 .banks = 1,
137 .pwrsts_mem_ret = {
138 [0] = PWRDM_POWER_RET, /* MEMRETSTATE */
139 },
140 .pwrsts_mem_on = {
141 [0] = PWRDM_POWER_ON, /* MEMONSTATE */
142 },
143};
144
145static struct powerdomain wkup_pwrdm = {
146 .name = "wkup_pwrdm",
147 .prcm_offs = WKUP_MOD,
148 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430),
149 .dep_bit = OMAP_EN_WKUP_SHIFT,
150};
151
152
153
154/* As powerdomains are added or removed above, this list must also be changed */
155static struct powerdomain *powerdomains_omap[] __initdata = {
156
157 &gfx_pwrdm,
158 &wkup_pwrdm,
159
160#ifdef CONFIG_ARCH_OMAP24XX
161 &dsp_pwrdm,
162 &mpu_24xx_pwrdm,
163 &core_24xx_pwrdm,
164#endif
165
166#ifdef CONFIG_ARCH_OMAP2430
167 &mdm_pwrdm,
168#endif
169
170#ifdef CONFIG_ARCH_OMAP34XX
171 &iva2_pwrdm,
172 &mpu_34xx_pwrdm,
173 &neon_pwrdm,
174 &core_34xx_pwrdm,
175 &cam_pwrdm,
176 &dss_pwrdm,
177 &per_pwrdm,
178 &emu_pwrdm,
179 &sgx_pwrdm,
180 &usbhost_pwrdm,
181#endif
182
183 NULL
184};
185
186
187#endif
diff --git a/arch/arm/mach-omap2/powerdomains24xx.h b/arch/arm/mach-omap2/powerdomains24xx.h
new file mode 100644
index 000000000000..9f08dc3f7fd2
--- /dev/null
+++ b/arch/arm/mach-omap2/powerdomains24xx.h
@@ -0,0 +1,200 @@
1/*
2 * OMAP24XX powerdomain definitions
3 *
4 * Copyright (C) 2007-2008 Texas Instruments, Inc.
5 * Copyright (C) 2007-2008 Nokia Corporation
6 *
7 * Written by Paul Walmsley
8 * Debugging and integration fixes by Jouni Högander
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#ifndef ARCH_ARM_MACH_OMAP2_POWERDOMAINS24XX
16#define ARCH_ARM_MACH_OMAP2_POWERDOMAINS24XX
17
18/*
19 * N.B. If powerdomains are added or removed from this file, update
20 * the array in mach-omap2/powerdomains.h.
21 */
22
23#include <mach/powerdomain.h>
24
25#include "prcm-common.h"
26#include "prm.h"
27#include "prm-regbits-24xx.h"
28#include "cm.h"
29#include "cm-regbits-24xx.h"
30
31/* 24XX powerdomains and dependencies */
32
33#ifdef CONFIG_ARCH_OMAP24XX
34
35
36/* Wakeup dependency source arrays */
37
38/*
39 * 2420/2430 PM_WKDEP_DSP: CORE, MPU, WKUP
40 * 2430 PM_WKDEP_MDM: same as above
41 */
42static struct pwrdm_dep dsp_mdm_24xx_wkdeps[] = {
43 {
44 .pwrdm_name = "core_pwrdm",
45 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
46 },
47 {
48 .pwrdm_name = "mpu_pwrdm",
49 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
50 },
51 {
52 .pwrdm_name = "wkup_pwrdm",
53 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
54 },
55 { NULL },
56};
57
58/*
59 * 2420 PM_WKDEP_MPU: CORE, DSP, WKUP
60 * 2430 adds MDM
61 */
62static struct pwrdm_dep mpu_24xx_wkdeps[] = {
63 {
64 .pwrdm_name = "core_pwrdm",
65 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
66 },
67 {
68 .pwrdm_name = "dsp_pwrdm",
69 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
70 },
71 {
72 .pwrdm_name = "wkup_pwrdm",
73 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
74 },
75 {
76 .pwrdm_name = "mdm_pwrdm",
77 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
78 },
79 { NULL },
80};
81
82/*
83 * 2420 PM_WKDEP_CORE: DSP, GFX, MPU, WKUP
84 * 2430 adds MDM
85 */
86static struct pwrdm_dep core_24xx_wkdeps[] = {
87 {
88 .pwrdm_name = "dsp_pwrdm",
89 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
90 },
91 {
92 .pwrdm_name = "gfx_pwrdm",
93 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
94 },
95 {
96 .pwrdm_name = "mpu_pwrdm",
97 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
98 },
99 {
100 .pwrdm_name = "wkup_pwrdm",
101 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
102 },
103 {
104 .pwrdm_name = "mdm_pwrdm",
105 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
106 },
107 { NULL },
108};
109
110
111/* Powerdomains */
112
113static struct powerdomain dsp_pwrdm = {
114 .name = "dsp_pwrdm",
115 .prcm_offs = OMAP24XX_DSP_MOD,
116 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX),
117 .dep_bit = OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT,
118 .wkdep_srcs = dsp_mdm_24xx_wkdeps,
119 .pwrsts = PWRSTS_OFF_RET_ON,
120 .pwrsts_logic_ret = PWRDM_POWER_RET,
121 .banks = 1,
122 .pwrsts_mem_ret = {
123 [0] = PWRDM_POWER_RET,
124 },
125 .pwrsts_mem_on = {
126 [0] = PWRDM_POWER_ON,
127 },
128};
129
130static struct powerdomain mpu_24xx_pwrdm = {
131 .name = "mpu_pwrdm",
132 .prcm_offs = MPU_MOD,
133 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX),
134 .dep_bit = OMAP24XX_EN_MPU_SHIFT,
135 .wkdep_srcs = mpu_24xx_wkdeps,
136 .pwrsts = PWRSTS_OFF_RET_ON,
137 .pwrsts_logic_ret = PWRSTS_OFF_RET,
138 .banks = 1,
139 .pwrsts_mem_ret = {
140 [0] = PWRDM_POWER_RET,
141 },
142 .pwrsts_mem_on = {
143 [0] = PWRDM_POWER_ON,
144 },
145};
146
147static struct powerdomain core_24xx_pwrdm = {
148 .name = "core_pwrdm",
149 .prcm_offs = CORE_MOD,
150 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX),
151 .wkdep_srcs = core_24xx_wkdeps,
152 .pwrsts = PWRSTS_OFF_RET_ON,
153 .dep_bit = OMAP24XX_EN_CORE_SHIFT,
154 .banks = 3,
155 .pwrsts_mem_ret = {
156 [0] = PWRSTS_OFF_RET, /* MEM1RETSTATE */
157 [1] = PWRSTS_OFF_RET, /* MEM2RETSTATE */
158 [2] = PWRSTS_OFF_RET, /* MEM3RETSTATE */
159 },
160 .pwrsts_mem_on = {
161 [0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */
162 [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */
163 [2] = PWRSTS_OFF_RET_ON, /* MEM3ONSTATE */
164 },
165};
166
167#endif /* CONFIG_ARCH_OMAP24XX */
168
169
170
171/*
172 * 2430-specific powerdomains
173 */
174
175#ifdef CONFIG_ARCH_OMAP2430
176
177/* XXX 2430 KILLDOMAINWKUP bit? No current users apparently */
178
179/* Another case of bit name collisions between several registers: EN_MDM */
180static struct powerdomain mdm_pwrdm = {
181 .name = "mdm_pwrdm",
182 .prcm_offs = OMAP2430_MDM_MOD,
183 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
184 .dep_bit = OMAP2430_PM_WKDEP_MPU_EN_MDM_SHIFT,
185 .wkdep_srcs = dsp_mdm_24xx_wkdeps,
186 .pwrsts = PWRSTS_OFF_RET_ON,
187 .pwrsts_logic_ret = PWRDM_POWER_RET,
188 .banks = 1,
189 .pwrsts_mem_ret = {
190 [0] = PWRDM_POWER_RET, /* MEMRETSTATE */
191 },
192 .pwrsts_mem_on = {
193 [0] = PWRDM_POWER_ON, /* MEMONSTATE */
194 },
195};
196
197#endif /* CONFIG_ARCH_OMAP2430 */
198
199
200#endif
diff --git a/arch/arm/mach-omap2/powerdomains34xx.h b/arch/arm/mach-omap2/powerdomains34xx.h
new file mode 100644
index 000000000000..f573f7108398
--- /dev/null
+++ b/arch/arm/mach-omap2/powerdomains34xx.h
@@ -0,0 +1,327 @@
1/*
2 * OMAP34XX powerdomain definitions
3 *
4 * Copyright (C) 2007-2008 Texas Instruments, Inc.
5 * Copyright (C) 2007-2008 Nokia Corporation
6 *
7 * Written by Paul Walmsley
8 * Debugging and integration fixes by Jouni Högander
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#ifndef ARCH_ARM_MACH_OMAP2_POWERDOMAINS34XX
16#define ARCH_ARM_MACH_OMAP2_POWERDOMAINS34XX
17
18/*
19 * N.B. If powerdomains are added or removed from this file, update
20 * the array in mach-omap2/powerdomains.h.
21 */
22
23#include <mach/powerdomain.h>
24
25#include "prcm-common.h"
26#include "prm.h"
27#include "prm-regbits-34xx.h"
28#include "cm.h"
29#include "cm-regbits-34xx.h"
30
31/*
32 * 34XX-specific powerdomains, dependencies
33 */
34
35#ifdef CONFIG_ARCH_OMAP34XX
36
37/*
38 * 3430: PM_WKDEP_{PER,USBHOST}: CORE, IVA2, MPU, WKUP
39 * (USBHOST is ES2 only)
40 */
41static struct pwrdm_dep per_usbhost_wkdeps[] = {
42 {
43 .pwrdm_name = "core_pwrdm",
44 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
45 },
46 {
47 .pwrdm_name = "iva2_pwrdm",
48 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
49 },
50 {
51 .pwrdm_name = "mpu_pwrdm",
52 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
53 },
54 {
55 .pwrdm_name = "wkup_pwrdm",
56 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
57 },
58 { NULL },
59};
60
61/*
62 * 3430 PM_WKDEP_MPU: CORE, IVA2, DSS, PER
63 */
64static struct pwrdm_dep mpu_34xx_wkdeps[] = {
65 {
66 .pwrdm_name = "core_pwrdm",
67 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
68 },
69 {
70 .pwrdm_name = "iva2_pwrdm",
71 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
72 },
73 {
74 .pwrdm_name = "dss_pwrdm",
75 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
76 },
77 {
78 .pwrdm_name = "per_pwrdm",
79 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
80 },
81 { NULL },
82};
83
84/*
85 * 3430 PM_WKDEP_IVA2: CORE, MPU, WKUP, DSS, PER
86 */
87static struct pwrdm_dep iva2_wkdeps[] = {
88 {
89 .pwrdm_name = "core_pwrdm",
90 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
91 },
92 {
93 .pwrdm_name = "mpu_pwrdm",
94 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
95 },
96 {
97 .pwrdm_name = "wkup_pwrdm",
98 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
99 },
100 {
101 .pwrdm_name = "dss_pwrdm",
102 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
103 },
104 {
105 .pwrdm_name = "per_pwrdm",
106 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
107 },
108 { NULL },
109};
110
111
112/* 3430 PM_WKDEP_{CAM,DSS}: IVA2, MPU, WKUP */
113static struct pwrdm_dep cam_dss_wkdeps[] = {
114 {
115 .pwrdm_name = "iva2_pwrdm",
116 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
117 },
118 {
119 .pwrdm_name = "mpu_pwrdm",
120 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
121 },
122 {
123 .pwrdm_name = "wkup_pwrdm",
124 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
125 },
126 { NULL },
127};
128
129/* 3430: PM_WKDEP_NEON: MPU */
130static struct pwrdm_dep neon_wkdeps[] = {
131 {
132 .pwrdm_name = "mpu_pwrdm",
133 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
134 },
135 { NULL },
136};
137
138
139/* Sleep dependency source arrays for 34xx-specific pwrdms - 34XX only */
140
141/*
142 * 3430: CM_SLEEPDEP_{DSS,PER}: MPU, IVA
143 * 3430ES2: CM_SLEEPDEP_USBHOST: MPU, IVA
144 */
145static struct pwrdm_dep dss_per_usbhost_sleepdeps[] = {
146 {
147 .pwrdm_name = "mpu_pwrdm",
148 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
149 },
150 {
151 .pwrdm_name = "iva2_pwrdm",
152 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
153 },
154 { NULL },
155};
156
157
158/*
159 * Powerdomains
160 */
161
162static struct powerdomain iva2_pwrdm = {
163 .name = "iva2_pwrdm",
164 .prcm_offs = OMAP3430_IVA2_MOD,
165 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
166 .dep_bit = OMAP3430_PM_WKDEP_MPU_EN_IVA2_SHIFT,
167 .wkdep_srcs = iva2_wkdeps,
168 .pwrsts = PWRSTS_OFF_RET_ON,
169 .pwrsts_logic_ret = PWRSTS_OFF_RET,
170 .banks = 4,
171 .pwrsts_mem_ret = {
172 [0] = PWRSTS_OFF_RET,
173 [1] = PWRSTS_OFF_RET,
174 [2] = PWRSTS_OFF_RET,
175 [3] = PWRSTS_OFF_RET,
176 },
177 .pwrsts_mem_on = {
178 [0] = PWRDM_POWER_ON,
179 [1] = PWRDM_POWER_ON,
180 [2] = PWRSTS_OFF_ON,
181 [3] = PWRDM_POWER_ON,
182 },
183};
184
185static struct powerdomain mpu_34xx_pwrdm = {
186 .name = "mpu_pwrdm",
187 .prcm_offs = MPU_MOD,
188 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
189 .dep_bit = OMAP3430_EN_MPU_SHIFT,
190 .wkdep_srcs = mpu_34xx_wkdeps,
191 .pwrsts = PWRSTS_OFF_RET_ON,
192 .pwrsts_logic_ret = PWRSTS_OFF_RET,
193 .banks = 1,
194 .pwrsts_mem_ret = {
195 [0] = PWRSTS_OFF_RET,
196 },
197 .pwrsts_mem_on = {
198 [0] = PWRSTS_OFF_ON,
199 },
200};
201
202/* No wkdeps or sleepdeps for 34xx core apparently */
203static struct powerdomain core_34xx_pwrdm = {
204 .name = "core_pwrdm",
205 .prcm_offs = CORE_MOD,
206 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
207 .pwrsts = PWRSTS_OFF_RET_ON,
208 .dep_bit = OMAP3430_EN_CORE_SHIFT,
209 .banks = 2,
210 .pwrsts_mem_ret = {
211 [0] = PWRSTS_OFF_RET, /* MEM1RETSTATE */
212 [1] = PWRSTS_OFF_RET, /* MEM2RETSTATE */
213 },
214 .pwrsts_mem_on = {
215 [0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */
216 [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */
217 },
218};
219
220/* Another case of bit name collisions between several registers: EN_DSS */
221static struct powerdomain dss_pwrdm = {
222 .name = "dss_pwrdm",
223 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
224 .prcm_offs = OMAP3430_DSS_MOD,
225 .dep_bit = OMAP3430_PM_WKDEP_MPU_EN_DSS_SHIFT,
226 .wkdep_srcs = cam_dss_wkdeps,
227 .sleepdep_srcs = dss_per_usbhost_sleepdeps,
228 .pwrsts = PWRSTS_OFF_RET_ON,
229 .pwrsts_logic_ret = PWRDM_POWER_RET,
230 .banks = 1,
231 .pwrsts_mem_ret = {
232 [0] = PWRDM_POWER_RET, /* MEMRETSTATE */
233 },
234 .pwrsts_mem_on = {
235 [0] = PWRDM_POWER_ON, /* MEMONSTATE */
236 },
237};
238
239static struct powerdomain sgx_pwrdm = {
240 .name = "sgx_pwrdm",
241 .prcm_offs = OMAP3430ES2_SGX_MOD,
242 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2),
243 .wkdep_srcs = gfx_sgx_wkdeps,
244 .sleepdep_srcs = cam_gfx_sleepdeps,
245 /* XXX This is accurate for 3430 SGX, but what about GFX? */
246 .pwrsts = PWRSTS_OFF_RET_ON,
247 .pwrsts_logic_ret = PWRDM_POWER_RET,
248 .banks = 1,
249 .pwrsts_mem_ret = {
250 [0] = PWRDM_POWER_RET, /* MEMRETSTATE */
251 },
252 .pwrsts_mem_on = {
253 [0] = PWRDM_POWER_ON, /* MEMONSTATE */
254 },
255};
256
257static struct powerdomain cam_pwrdm = {
258 .name = "cam_pwrdm",
259 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
260 .prcm_offs = OMAP3430_CAM_MOD,
261 .wkdep_srcs = cam_dss_wkdeps,
262 .sleepdep_srcs = cam_gfx_sleepdeps,
263 .pwrsts = PWRSTS_OFF_RET_ON,
264 .pwrsts_logic_ret = PWRDM_POWER_RET,
265 .banks = 1,
266 .pwrsts_mem_ret = {
267 [0] = PWRDM_POWER_RET, /* MEMRETSTATE */
268 },
269 .pwrsts_mem_on = {
270 [0] = PWRDM_POWER_ON, /* MEMONSTATE */
271 },
272};
273
274static struct powerdomain per_pwrdm = {
275 .name = "per_pwrdm",
276 .prcm_offs = OMAP3430_PER_MOD,
277 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
278 .dep_bit = OMAP3430_EN_PER_SHIFT,
279 .wkdep_srcs = per_usbhost_wkdeps,
280 .sleepdep_srcs = dss_per_usbhost_sleepdeps,
281 .pwrsts = PWRSTS_OFF_RET_ON,
282 .pwrsts_logic_ret = PWRSTS_OFF_RET,
283 .banks = 1,
284 .pwrsts_mem_ret = {
285 [0] = PWRDM_POWER_RET, /* MEMRETSTATE */
286 },
287 .pwrsts_mem_on = {
288 [0] = PWRDM_POWER_ON, /* MEMONSTATE */
289 },
290};
291
292static struct powerdomain emu_pwrdm = {
293 .name = "emu_pwrdm",
294 .prcm_offs = OMAP3430_EMU_MOD,
295 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
296};
297
298static struct powerdomain neon_pwrdm = {
299 .name = "neon_pwrdm",
300 .prcm_offs = OMAP3430_NEON_MOD,
301 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
302 .wkdep_srcs = neon_wkdeps,
303 .pwrsts = PWRSTS_OFF_RET_ON,
304 .pwrsts_logic_ret = PWRDM_POWER_RET,
305};
306
307static struct powerdomain usbhost_pwrdm = {
308 .name = "usbhost_pwrdm",
309 .prcm_offs = OMAP3430ES2_USBHOST_MOD,
310 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2),
311 .wkdep_srcs = per_usbhost_wkdeps,
312 .sleepdep_srcs = dss_per_usbhost_sleepdeps,
313 .pwrsts = PWRSTS_OFF_RET_ON,
314 .pwrsts_logic_ret = PWRDM_POWER_RET,
315 .banks = 1,
316 .pwrsts_mem_ret = {
317 [0] = PWRDM_POWER_RET, /* MEMRETSTATE */
318 },
319 .pwrsts_mem_on = {
320 [0] = PWRDM_POWER_ON, /* MEMONSTATE */
321 },
322};
323
324#endif /* CONFIG_ARCH_OMAP34XX */
325
326
327#endif
diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h
index 54c32f482131..4a32822ff3fc 100644
--- a/arch/arm/mach-omap2/prcm-common.h
+++ b/arch/arm/mach-omap2/prcm-common.h
@@ -312,7 +312,8 @@
312#define OMAP3430_ST_GPT2 (1 << 3) 312#define OMAP3430_ST_GPT2 (1 << 3)
313 313
314/* CM_SLEEPDEP_PER, PM_WKDEP_IVA2, PM_WKDEP_MPU, PM_WKDEP_PER shared bits */ 314/* CM_SLEEPDEP_PER, PM_WKDEP_IVA2, PM_WKDEP_MPU, PM_WKDEP_PER shared bits */
315#define OMAP3430_EN_CORE (1 << 0) 315#define OMAP3430_EN_CORE_SHIFT 0
316#define OMAP3430_EN_CORE_MASK (1 << 0)
316 317
317#endif 318#endif
318 319
diff --git a/arch/arm/mach-omap2/prm-regbits-24xx.h b/arch/arm/mach-omap2/prm-regbits-24xx.h
index c6d17a3378ec..4002051c20b9 100644
--- a/arch/arm/mach-omap2/prm-regbits-24xx.h
+++ b/arch/arm/mach-omap2/prm-regbits-24xx.h
@@ -29,8 +29,10 @@
29#define OMAP24XX_WKUP1_EN (1 << 0) 29#define OMAP24XX_WKUP1_EN (1 << 0)
30 30
31/* PM_WKDEP_GFX, PM_WKDEP_MPU, PM_WKDEP_DSP, PM_WKDEP_MDM shared bits */ 31/* PM_WKDEP_GFX, PM_WKDEP_MPU, PM_WKDEP_DSP, PM_WKDEP_MDM shared bits */
32#define OMAP24XX_EN_MPU (1 << 1) 32#define OMAP24XX_EN_MPU_SHIFT 1
33#define OMAP24XX_EN_CORE (1 << 0) 33#define OMAP24XX_EN_MPU_MASK (1 << 1)
34#define OMAP24XX_EN_CORE_SHIFT 0
35#define OMAP24XX_EN_CORE_MASK (1 << 0)
34 36
35/* 37/*
36 * PM_PWSTCTRL_MPU, PM_PWSTCTRL_GFX, PM_PWSTCTRL_DSP, PM_PWSTCTRL_MDM 38 * PM_PWSTCTRL_MPU, PM_PWSTCTRL_GFX, PM_PWSTCTRL_DSP, PM_PWSTCTRL_MDM
@@ -140,8 +142,10 @@
140/* 2430 calls GLOBALWMPU_RST "GLOBALWARM_RST" instead */ 142/* 2430 calls GLOBALWMPU_RST "GLOBALWARM_RST" instead */
141 143
142/* PM_WKDEP_MPU specific bits */ 144/* PM_WKDEP_MPU specific bits */
143#define OMAP2430_PM_WKDEP_MPU_EN_MDM (1 << 5) 145#define OMAP2430_PM_WKDEP_MPU_EN_MDM_SHIFT 5
144#define OMAP24XX_PM_WKDEP_MPU_EN_DSP (1 << 2) 146#define OMAP2430_PM_WKDEP_MPU_EN_MDM_MASK (1 << 5)
147#define OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT 2
148#define OMAP24XX_PM_WKDEP_MPU_EN_DSP_MASK (1 << 2)
145 149
146/* PM_EVGENCTRL_MPU specific bits */ 150/* PM_EVGENCTRL_MPU specific bits */
147 151
diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach-omap2/prm-regbits-34xx.h
index b4686bc345ca..5b5ecfe6c999 100644
--- a/arch/arm/mach-omap2/prm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/prm-regbits-34xx.h
@@ -68,7 +68,8 @@
68#define OMAP3430_VPINIDLE (1 << 0) 68#define OMAP3430_VPINIDLE (1 << 0)
69 69
70/* PM_WKDEP_IVA2, PM_WKDEP_MPU shared bits */ 70/* PM_WKDEP_IVA2, PM_WKDEP_MPU shared bits */
71#define OMAP3430_EN_PER (1 << 7) 71#define OMAP3430_EN_PER_SHIFT 7
72#define OMAP3430_EN_PER_MASK (1 << 7)
72 73
73/* PM_PWSTCTRL_IVA2, PM_PWSTCTRL_MPU, PM_PWSTCTRL_CORE shared bits */ 74/* PM_PWSTCTRL_IVA2, PM_PWSTCTRL_MPU, PM_PWSTCTRL_CORE shared bits */
74#define OMAP3430_MEMORYCHANGE (1 << 3) 75#define OMAP3430_MEMORYCHANGE (1 << 3)
@@ -77,7 +78,7 @@
77#define OMAP3430_LOGICSTATEST (1 << 2) 78#define OMAP3430_LOGICSTATEST (1 << 2)
78 79
79/* PM_PREPWSTST_IVA2, PM_PREPWSTST_CORE shared bits */ 80/* PM_PREPWSTST_IVA2, PM_PREPWSTST_CORE shared bits */
80#define OMAP3430_LASTLOGICSTATEENTERED (1 << 2) 81#define OMAP3430_LASTLOGICSTATEENTERED (1 << 2)
81 82
82/* 83/*
83 * PM_PREPWSTST_IVA2, PM_PREPWSTST_MPU, PM_PREPWSTST_CORE, 84 * PM_PREPWSTST_IVA2, PM_PREPWSTST_MPU, PM_PREPWSTST_CORE,
@@ -278,8 +279,10 @@
278#define OMAP3430_EMULATION_MPU_RST (1 << 11) 279#define OMAP3430_EMULATION_MPU_RST (1 << 11)
279 280
280/* PM_WKDEP_MPU specific bits */ 281/* PM_WKDEP_MPU specific bits */
281#define OMAP3430_PM_WKDEP_MPU_EN_DSS (1 << 5) 282#define OMAP3430_PM_WKDEP_MPU_EN_DSS_SHIFT 5
282#define OMAP3430_PM_WKDEP_MPU_EN_IVA2 (1 << 2) 283#define OMAP3430_PM_WKDEP_MPU_EN_DSS_MASK (1 << 5)
284#define OMAP3430_PM_WKDEP_MPU_EN_IVA2_SHIFT 2
285#define OMAP3430_PM_WKDEP_MPU_EN_IVA2_MASK (1 << 2)
283 286
284/* PM_EVGENCTRL_MPU */ 287/* PM_EVGENCTRL_MPU */
285#define OMAP3430_OFFLOADMODE_SHIFT 3 288#define OMAP3430_OFFLOADMODE_SHIFT 3
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index bbf41fc8e9a9..e4dc4b17881d 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -18,7 +18,7 @@
18 18
19#ifndef __ASSEMBLER__ 19#ifndef __ASSEMBLER__
20#define OMAP_PRM_REGADDR(module, reg) \ 20#define OMAP_PRM_REGADDR(module, reg) \
21 (void __iomem *)IO_ADDRESS(OMAP2_PRM_BASE + (module) + (reg)) 21 IO_ADDRESS(OMAP2_PRM_BASE + (module) + (reg))
22#else 22#else
23#define OMAP2420_PRM_REGADDR(module, reg) \ 23#define OMAP2420_PRM_REGADDR(module, reg) \
24 IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg)) 24 IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg))
@@ -305,7 +305,8 @@ static inline u32 prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
305 * 3430: PM_WKDEP_IVA2, PM_WKDEP_GFX, PM_WKDEP_DSS, PM_WKDEP_CAM, 305 * 3430: PM_WKDEP_IVA2, PM_WKDEP_GFX, PM_WKDEP_DSS, PM_WKDEP_CAM,
306 * PM_WKDEP_PER 306 * PM_WKDEP_PER
307 */ 307 */
308#define OMAP_EN_WKUP (1 << 4) 308#define OMAP_EN_WKUP_SHIFT 4
309#define OMAP_EN_WKUP_MASK (1 << 4)
309 310
310/* 311/*
311 * 24XX: PM_PWSTCTRL_MPU, PM_PWSTCTRL_CORE, PM_PWSTCTRL_GFX, 312 * 24XX: PM_PWSTCTRL_MPU, PM_PWSTCTRL_CORE, PM_PWSTCTRL_GFX,
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 7d9444adc5df..4dcf39c285b9 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * OMAP2 serial support. 4 * OMAP2 serial support.
5 * 5 *
6 * Copyright (C) 2005 Nokia Corporation 6 * Copyright (C) 2005-2008 Nokia Corporation
7 * Author: Paul Mundt <paul.mundt@nokia.com> 7 * Author: Paul Mundt <paul.mundt@nokia.com>
8 * 8 *
9 * Based off of arch/arm/mach-omap/omap1/serial.c 9 * Based off of arch/arm/mach-omap/omap1/serial.c
@@ -22,38 +22,34 @@
22#include <mach/common.h> 22#include <mach/common.h>
23#include <mach/board.h> 23#include <mach/board.h>
24 24
25static struct clk * uart1_ick = NULL; 25static struct clk *uart_ick[OMAP_MAX_NR_PORTS];
26static struct clk * uart1_fck = NULL; 26static struct clk *uart_fck[OMAP_MAX_NR_PORTS];
27static struct clk * uart2_ick = NULL;
28static struct clk * uart2_fck = NULL;
29static struct clk * uart3_ick = NULL;
30static struct clk * uart3_fck = NULL;
31 27
32static struct plat_serial8250_port serial_platform_data[] = { 28static struct plat_serial8250_port serial_platform_data[] = {
33 { 29 {
34 .membase = (char *)IO_ADDRESS(OMAP_UART1_BASE), 30 .membase = IO_ADDRESS(OMAP_UART1_BASE),
35 .mapbase = (unsigned long)OMAP_UART1_BASE, 31 .mapbase = OMAP_UART1_BASE,
36 .irq = 72, 32 .irq = 72,
37 .flags = UPF_BOOT_AUTOCONF, 33 .flags = UPF_BOOT_AUTOCONF,
38 .iotype = UPIO_MEM, 34 .iotype = UPIO_MEM,
39 .regshift = 2, 35 .regshift = 2,
40 .uartclk = OMAP16XX_BASE_BAUD * 16, 36 .uartclk = OMAP24XX_BASE_BAUD * 16,
41 }, { 37 }, {
42 .membase = (char *)IO_ADDRESS(OMAP_UART2_BASE), 38 .membase = IO_ADDRESS(OMAP_UART2_BASE),
43 .mapbase = (unsigned long)OMAP_UART2_BASE, 39 .mapbase = OMAP_UART2_BASE,
44 .irq = 73, 40 .irq = 73,
45 .flags = UPF_BOOT_AUTOCONF, 41 .flags = UPF_BOOT_AUTOCONF,
46 .iotype = UPIO_MEM, 42 .iotype = UPIO_MEM,
47 .regshift = 2, 43 .regshift = 2,
48 .uartclk = OMAP16XX_BASE_BAUD * 16, 44 .uartclk = OMAP24XX_BASE_BAUD * 16,
49 }, { 45 }, {
50 .membase = (char *)IO_ADDRESS(OMAP_UART3_BASE), 46 .membase = IO_ADDRESS(OMAP_UART3_BASE),
51 .mapbase = (unsigned long)OMAP_UART3_BASE, 47 .mapbase = OMAP_UART3_BASE,
52 .irq = 74, 48 .irq = 74,
53 .flags = UPF_BOOT_AUTOCONF, 49 .flags = UPF_BOOT_AUTOCONF,
54 .iotype = UPIO_MEM, 50 .iotype = UPIO_MEM,
55 .regshift = 2, 51 .regshift = 2,
56 .uartclk = OMAP16XX_BASE_BAUD * 16, 52 .uartclk = OMAP24XX_BASE_BAUD * 16,
57 }, { 53 }, {
58 .flags = 0 54 .flags = 0
59 } 55 }
@@ -70,7 +66,7 @@ static inline void serial_write_reg(struct plat_serial8250_port *p, int offset,
70 int value) 66 int value)
71{ 67{
72 offset <<= p->regshift; 68 offset <<= p->regshift;
73 __raw_writeb(value, (unsigned long)(p->membase + offset)); 69 __raw_writeb(value, p->membase + offset);
74} 70}
75 71
76/* 72/*
@@ -86,10 +82,27 @@ static inline void __init omap_serial_reset(struct plat_serial8250_port *p)
86 serial_write_reg(p, UART_OMAP_SYSC, (0x02 << 3) | (1 << 2) | (1 << 0)); 82 serial_write_reg(p, UART_OMAP_SYSC, (0x02 << 3) | (1 << 2) | (1 << 0));
87} 83}
88 84
89void __init omap_serial_init() 85void omap_serial_enable_clocks(int enable)
86{
87 int i;
88 for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
89 if (uart_ick[i] && uart_fck[i]) {
90 if (enable) {
91 clk_enable(uart_ick[i]);
92 clk_enable(uart_fck[i]);
93 } else {
94 clk_disable(uart_ick[i]);
95 clk_disable(uart_fck[i]);
96 }
97 }
98 }
99}
100
101void __init omap_serial_init(void)
90{ 102{
91 int i; 103 int i;
92 const struct omap_uart_config *info; 104 const struct omap_uart_config *info;
105 char name[16];
93 106
94 /* 107 /*
95 * Make sure the serial ports are muxed on at this point. 108 * Make sure the serial ports are muxed on at this point.
@@ -97,8 +110,7 @@ void __init omap_serial_init()
97 * if not needed. 110 * if not needed.
98 */ 111 */
99 112
100 info = omap_get_config(OMAP_TAG_UART, 113 info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config);
101 struct omap_uart_config);
102 114
103 if (info == NULL) 115 if (info == NULL)
104 return; 116 return;
@@ -107,58 +119,26 @@ void __init omap_serial_init()
107 struct plat_serial8250_port *p = serial_platform_data + i; 119 struct plat_serial8250_port *p = serial_platform_data + i;
108 120
109 if (!(info->enabled_uarts & (1 << i))) { 121 if (!(info->enabled_uarts & (1 << i))) {
110 p->membase = 0; 122 p->membase = NULL;
111 p->mapbase = 0; 123 p->mapbase = 0;
112 continue; 124 continue;
113 } 125 }
114 126
115 switch (i) { 127 sprintf(name, "uart%d_ick", i+1);
116 case 0: 128 uart_ick[i] = clk_get(NULL, name);
117 uart1_ick = clk_get(NULL, "uart1_ick"); 129 if (IS_ERR(uart_ick[i])) {
118 if (IS_ERR(uart1_ick)) 130 printk(KERN_ERR "Could not get uart%d_ick\n", i+1);
119 printk("Could not get uart1_ick\n"); 131 uart_ick[i] = NULL;
120 else { 132 } else
121 clk_enable(uart1_ick); 133 clk_enable(uart_ick[i]);
122 } 134
123 135 sprintf(name, "uart%d_fck", i+1);
124 uart1_fck = clk_get(NULL, "uart1_fck"); 136 uart_fck[i] = clk_get(NULL, name);
125 if (IS_ERR(uart1_fck)) 137 if (IS_ERR(uart_fck[i])) {
126 printk("Could not get uart1_fck\n"); 138 printk(KERN_ERR "Could not get uart%d_fck\n", i+1);
127 else { 139 uart_fck[i] = NULL;
128 clk_enable(uart1_fck); 140 } else
129 } 141 clk_enable(uart_fck[i]);
130 break;
131 case 1:
132 uart2_ick = clk_get(NULL, "uart2_ick");
133 if (IS_ERR(uart2_ick))
134 printk("Could not get uart2_ick\n");
135 else {
136 clk_enable(uart2_ick);
137 }
138
139 uart2_fck = clk_get(NULL, "uart2_fck");
140 if (IS_ERR(uart2_fck))
141 printk("Could not get uart2_fck\n");
142 else {
143 clk_enable(uart2_fck);
144 }
145 break;
146 case 2:
147 uart3_ick = clk_get(NULL, "uart3_ick");
148 if (IS_ERR(uart3_ick))
149 printk("Could not get uart3_ick\n");
150 else {
151 clk_enable(uart3_ick);
152 }
153
154 uart3_fck = clk_get(NULL, "uart3_fck");
155 if (IS_ERR(uart3_fck))
156 printk("Could not get uart3_fck\n");
157 else {
158 clk_enable(uart3_fck);
159 }
160 break;
161 }
162 142
163 omap_serial_reset(p); 143 omap_serial_reset(p);
164 } 144 }
diff --git a/arch/arm/mach-omap2/sleep.S b/arch/arm/mach-omap2/sleep24xx.S
index 87a706fd5f82..43336b93b21c 100644
--- a/arch/arm/mach-omap2/sleep.S
+++ b/arch/arm/mach-omap2/sleep24xx.S
@@ -5,6 +5,10 @@
5 * Texas Instruments, <www.ti.com> 5 * Texas Instruments, <www.ti.com>
6 * Richard Woodruff <r-woodruff2@ti.com> 6 * Richard Woodruff <r-woodruff2@ti.com>
7 * 7 *
8 * (C) Copyright 2006 Nokia Corporation
9 * Fixed idle loop sleep
10 * Igor Stoppa <igor.stoppa@nokia.com>
11 *
8 * This program is free software; you can redistribute it and/or 12 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as 13 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of 14 * published by the Free Software Foundation; either version 2 of
@@ -26,6 +30,8 @@
26#include <mach/io.h> 30#include <mach/io.h>
27#include <mach/pm.h> 31#include <mach/pm.h>
28 32
33#include <mach/omap24xx.h>
34
29#include "sdrc.h" 35#include "sdrc.h"
30 36
31/* First address of reserved address space? apparently valid for OMAP2 & 3 */ 37/* First address of reserved address space? apparently valid for OMAP2 & 3 */
@@ -52,15 +58,14 @@ ENTRY(omap24xx_idle_loop_suspend_sz)
52 .word . - omap24xx_idle_loop_suspend 58 .word . - omap24xx_idle_loop_suspend
53 59
54/* 60/*
55 * omap242x_cpu_suspend() - Forces OMAP into deep sleep state by completing 61 * omap24xx_cpu_suspend() - Forces OMAP into deep sleep state by completing
56 * SDRC shutdown then ARM shutdown. Upon wake MPU is back on so just restore 62 * SDRC shutdown then ARM shutdown. Upon wake MPU is back on so just restore
57 * SDRC. 63 * SDRC.
58 * 64 *
59 * Input: 65 * Input:
60 * R0 : DLL ctrl value pre-Sleep 66 * R0 : DLL ctrl value pre-Sleep
61 * R1 : Processor+Revision 67 * R1 : SDRC_DLLA_CTRL
62 * 2420: 0x21 = 242xES1, 0x26 = 242xES2.2 68 * R2 : SDRC_POWER
63 * 2430: 0x31 = 2430ES1, 0x32 = 2430ES2
64 * 69 *
65 * The if the DPLL is going to AutoIdle. It seems like the DPLL may be back on 70 * The if the DPLL is going to AutoIdle. It seems like the DPLL may be back on
66 * when we get called, but the DLL probably isn't. We will wait a bit more in 71 * when we get called, but the DLL probably isn't. We will wait a bit more in
@@ -80,15 +85,14 @@ ENTRY(omap24xx_idle_loop_suspend_sz)
80 */ 85 */
81ENTRY(omap24xx_cpu_suspend) 86ENTRY(omap24xx_cpu_suspend)
82 stmfd sp!, {r0 - r12, lr} @ save registers on stack 87 stmfd sp!, {r0 - r12, lr} @ save registers on stack
83 mov r3, #0x0 @ clear for mrc call 88 mov r3, #0x0 @ clear for mcr call
84 mcr p15, 0, r3, c7, c10, 4 @ memory barrier, hope SDR/DDR finished 89 mcr p15, 0, r3, c7, c10, 4 @ memory barrier, hope SDR/DDR finished
85 nop 90 nop
86 nop 91 nop
87 ldr r3, A_SDRC_POWER @ addr of sdrc power 92 ldr r4, [r2] @ read SDRC_POWER
88 ldr r4, [r3] @ value of sdrc power
89 orr r4, r4, #0x40 @ enable self refresh on idle req 93 orr r4, r4, #0x40 @ enable self refresh on idle req
90 mov r5, #0x2000 @ set delay (DPLL relock + DLL relock) 94 mov r5, #0x2000 @ set delay (DPLL relock + DLL relock)
91 str r4, [r3] @ make it so 95 str r4, [r2] @ make it so
92 mov r2, #0 96 mov r2, #0
93 nop 97 nop
94 mcr p15, 0, r2, c7, c0, 4 @ wait for interrupt 98 mcr p15, 0, r2, c7, c0, 4 @ wait for interrupt
@@ -97,14 +101,13 @@ loop:
97 subs r5, r5, #0x1 @ awake, wait just a bit 101 subs r5, r5, #0x1 @ awake, wait just a bit
98 bne loop 102 bne loop
99 103
100 /* The DPLL has on before we take the DDR out of self refresh */ 104 /* The DPLL has to be on before we take the DDR out of self refresh */
101 bic r4, r4, #0x40 @ now clear self refresh bit. 105 bic r4, r4, #0x40 @ now clear self refresh bit.
102 str r4, [r3] @ put vlaue back. 106 str r4, [r2] @ write to SDRC_POWER
103 ldr r4, A_SDRC0 @ make a clock happen 107 ldr r4, A_SDRC0 @ make a clock happen
104 ldr r4, [r4] 108 ldr r4, [r4] @ read A_SDRC0
105 nop @ start auto refresh only after clk ok 109 nop @ start auto refresh only after clk ok
106 movs r0, r0 @ see if DDR or SDR 110 movs r0, r0 @ see if DDR or SDR
107 ldrne r1, A_SDRC_DLLA_CTRL_S @ get addr of DLL ctrl
108 strne r0, [r1] @ rewrite DLLA to force DLL reload 111 strne r0, [r1] @ rewrite DLLA to force DLL reload
109 addne r1, r1, #0x8 @ move to DLLB 112 addne r1, r1, #0x8 @ move to DLLB
110 strne r0, [r1] @ rewrite DLLB to force DLL reload 113 strne r0, [r1] @ rewrite DLLB to force DLL reload
@@ -116,13 +119,8 @@ loop2:
116 /* resume*/ 119 /* resume*/
117 ldmfd sp!, {r0 - r12, pc} @ restore regs and return 120 ldmfd sp!, {r0 - r12, pc} @ restore regs and return
118 121
119A_SDRC_POWER:
120 .word OMAP242X_SDRC_REGADDR(SDRC_POWER)
121A_SDRC0: 122A_SDRC0:
122 .word A_SDRC0_V 123 .word A_SDRC0_V
123A_SDRC_DLLA_CTRL_S:
124 .word OMAP242X_SDRC_REGADDR(SDRC_DLLA_CTRL)
125 124
126ENTRY(omap24xx_cpu_suspend_sz) 125ENTRY(omap24xx_cpu_suspend_sz)
127 .word . - omap24xx_cpu_suspend 126 .word . - omap24xx_cpu_suspend
128
diff --git a/arch/arm/mach-omap2/sram34xx.S b/arch/arm/mach-omap2/sram34xx.S
new file mode 100644
index 000000000000..2c7146136342
--- /dev/null
+++ b/arch/arm/mach-omap2/sram34xx.S
@@ -0,0 +1,179 @@
1/*
2 * linux/arch/arm/mach-omap3/sram.S
3 *
4 * Omap3 specific functions that need to be run in internal SRAM
5 *
6 * (C) Copyright 2007
7 * Texas Instruments Inc.
8 * Rajendra Nayak <rnayak@ti.com>
9 *
10 * (C) Copyright 2004
11 * Texas Instruments, <www.ti.com>
12 * Richard Woodruff <r-woodruff2@ti.com>
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of
17 * the License, or (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 * MA 02111-1307 USA
28 */
29#include <linux/linkage.h>
30#include <asm/assembler.h>
31#include <mach/hardware.h>
32
33#include <mach/io.h>
34
35#include "sdrc.h"
36#include "cm.h"
37
38 .text
39
40/*
41 * Change frequency of core dpll
42 * r0 = sdrc_rfr_ctrl r1 = sdrc_actim_ctrla r2 = sdrc_actim_ctrlb r3 = M2
43 */
44ENTRY(omap3_sram_configure_core_dpll)
45 stmfd sp!, {r1-r12, lr} @ store regs to stack
46 cmp r3, #0x2
47 blne configure_sdrc
48 cmp r3, #0x2
49 blne lock_dll
50 cmp r3, #0x1
51 blne unlock_dll
52 bl sdram_in_selfrefresh @ put the SDRAM in self refresh
53 bl configure_core_dpll
54 bl enable_sdrc
55 cmp r3, #0x1
56 blne wait_dll_unlock
57 cmp r3, #0x2
58 blne wait_dll_lock
59 cmp r3, #0x1
60 blne configure_sdrc
61 mov r0, #0 @ return value
62 ldmfd sp!, {r1-r12, pc} @ restore regs and return
63unlock_dll:
64 ldr r4, omap3_sdrc_dlla_ctrl
65 ldr r5, [r4]
66 orr r5, r5, #0x4
67 str r5, [r4]
68 bx lr
69lock_dll:
70 ldr r4, omap3_sdrc_dlla_ctrl
71 ldr r5, [r4]
72 bic r5, r5, #0x4
73 str r5, [r4]
74 bx lr
75sdram_in_selfrefresh:
76 mov r5, #0x0 @ Move 0 to R5
77 mcr p15, 0, r5, c7, c10, 5 @ memory barrier
78 ldr r4, omap3_sdrc_power @ read the SDRC_POWER register
79 ldr r5, [r4] @ read the contents of SDRC_POWER
80 orr r5, r5, #0x40 @ enable self refresh on idle req
81 str r5, [r4] @ write back to SDRC_POWER register
82 ldr r4, omap3_cm_iclken1_core @ read the CM_ICLKEN1_CORE reg
83 ldr r5, [r4]
84 bic r5, r5, #0x2 @ disable iclk bit for SRDC
85 str r5, [r4]
86wait_sdrc_idle:
87 ldr r4, omap3_cm_idlest1_core
88 ldr r5, [r4]
89 and r5, r5, #0x2 @ check for SDRC idle
90 cmp r5, #2
91 bne wait_sdrc_idle
92 bx lr
93configure_core_dpll:
94 ldr r4, omap3_cm_clksel1_pll
95 ldr r5, [r4]
96 ldr r6, core_m2_mask_val @ modify m2 for core dpll
97 and r5, r5, r6
98 orr r5, r5, r3, lsl #0x1B @ r3 contains the M2 val
99 str r5, [r4]
100 mov r5, #0x800 @ wait for the clock to stabilise
101 cmp r3, #2
102 bne wait_clk_stable
103 bx lr
104wait_clk_stable:
105 subs r5, r5, #1
106 bne wait_clk_stable
107 nop
108 nop
109 nop
110 nop
111 nop
112 nop
113 nop
114 nop
115 nop
116 nop
117 bx lr
118enable_sdrc:
119 ldr r4, omap3_cm_iclken1_core
120 ldr r5, [r4]
121 orr r5, r5, #0x2 @ enable iclk bit for SDRC
122 str r5, [r4]
123wait_sdrc_idle1:
124 ldr r4, omap3_cm_idlest1_core
125 ldr r5, [r4]
126 and r5, r5, #0x2
127 cmp r5, #0
128 bne wait_sdrc_idle1
129 ldr r4, omap3_sdrc_power
130 ldr r5, [r4]
131 bic r5, r5, #0x40
132 str r5, [r4]
133 bx lr
134wait_dll_lock:
135 ldr r4, omap3_sdrc_dlla_status
136 ldr r5, [r4]
137 and r5, r5, #0x4
138 cmp r5, #0x4
139 bne wait_dll_lock
140 bx lr
141wait_dll_unlock:
142 ldr r4, omap3_sdrc_dlla_status
143 ldr r5, [r4]
144 and r5, r5, #0x4
145 cmp r5, #0x0
146 bne wait_dll_unlock
147 bx lr
148configure_sdrc:
149 ldr r4, omap3_sdrc_rfr_ctrl
150 str r0, [r4]
151 ldr r4, omap3_sdrc_actim_ctrla
152 str r1, [r4]
153 ldr r4, omap3_sdrc_actim_ctrlb
154 str r2, [r4]
155 bx lr
156
157omap3_sdrc_power:
158 .word OMAP34XX_SDRC_REGADDR(SDRC_POWER)
159omap3_cm_clksel1_pll:
160 .word OMAP34XX_CM_REGADDR(PLL_MOD, CM_CLKSEL1)
161omap3_cm_idlest1_core:
162 .word OMAP34XX_CM_REGADDR(CORE_MOD, CM_IDLEST)
163omap3_cm_iclken1_core:
164 .word OMAP34XX_CM_REGADDR(CORE_MOD, CM_ICLKEN1)
165omap3_sdrc_rfr_ctrl:
166 .word OMAP34XX_SDRC_REGADDR(SDRC_RFR_CTRL_0)
167omap3_sdrc_actim_ctrla:
168 .word OMAP34XX_SDRC_REGADDR(SDRC_ACTIM_CTRL_A_0)
169omap3_sdrc_actim_ctrlb:
170 .word OMAP34XX_SDRC_REGADDR(SDRC_ACTIM_CTRL_B_0)
171omap3_sdrc_dlla_status:
172 .word OMAP34XX_SDRC_REGADDR(SDRC_DLLA_STATUS)
173omap3_sdrc_dlla_ctrl:
174 .word OMAP34XX_SDRC_REGADDR(SDRC_DLLA_CTRL)
175core_m2_mask_val:
176 .word 0x07FFFFFF
177
178ENTRY(omap3_sram_configure_core_dpll_sz)
179 .word . - omap3_sram_configure_core_dpll
diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c
index a82dad1a8cc8..df83b97f303f 100644
--- a/arch/arm/mach-pxa/cm-x270.c
+++ b/arch/arm/mach-pxa/cm-x270.c
@@ -162,7 +162,7 @@ static void __init cmx270_init_rtc(void)
162 platform_device_register(&cmx270_rtc_device); 162 platform_device_register(&cmx270_rtc_device);
163} 163}
164#else 164#else
165static inline void cmx2xx_init_rtc(void) {} 165static inline void cmx270_init_rtc(void) {}
166#endif 166#endif
167 167
168/* 2700G graphics */ 168/* 2700G graphics */
diff --git a/arch/arm/mach-pxa/cpufreq-pxa2xx.c b/arch/arm/mach-pxa/cpufreq-pxa2xx.c
index d82528e74bd0..1f272ea83f36 100644
--- a/arch/arm/mach-pxa/cpufreq-pxa2xx.c
+++ b/arch/arm/mach-pxa/cpufreq-pxa2xx.c
@@ -335,9 +335,6 @@ static __init int pxa_cpufreq_init(struct cpufreq_policy *policy)
335 pxa27x_guess_max_freq(); 335 pxa27x_guess_max_freq();
336 336
337 /* set default policy and cpuinfo */ 337 /* set default policy and cpuinfo */
338 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
339 if (cpu_is_pxa25x())
340 policy->policy = CPUFREQ_POLICY_PERFORMANCE;
341 policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */ 338 policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */
342 policy->cur = get_clk_frequency_khz(0); /* current freq */ 339 policy->cur = get_clk_frequency_khz(0); /* current freq */
343 policy->min = policy->max = policy->cur; 340 policy->min = policy->max = policy->cur;
diff --git a/arch/arm/mach-pxa/cpufreq-pxa3xx.c b/arch/arm/mach-pxa/cpufreq-pxa3xx.c
index 1ea0c9c0adaf..968c8309ec37 100644
--- a/arch/arm/mach-pxa/cpufreq-pxa3xx.c
+++ b/arch/arm/mach-pxa/cpufreq-pxa3xx.c
@@ -210,7 +210,6 @@ static __init int pxa3xx_cpufreq_init(struct cpufreq_policy *policy)
210 int ret = -EINVAL; 210 int ret = -EINVAL;
211 211
212 /* set default policy and cpuinfo */ 212 /* set default policy and cpuinfo */
213 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
214 policy->cpuinfo.min_freq = 104000; 213 policy->cpuinfo.min_freq = 104000;
215 policy->cpuinfo.max_freq = (cpu_is_pxa320()) ? 806000 : 624000; 214 policy->cpuinfo.max_freq = (cpu_is_pxa320()) ? 806000 : 624000;
216 policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */ 215 policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */
diff --git a/arch/arm/mach-pxa/include/mach/camera.h b/arch/arm/mach-pxa/include/mach/camera.h
index 39516ced8b1f..31abe6d514b8 100644
--- a/arch/arm/mach-pxa/include/mach/camera.h
+++ b/arch/arm/mach-pxa/include/mach/camera.h
@@ -36,8 +36,6 @@
36 36
37struct pxacamera_platform_data { 37struct pxacamera_platform_data {
38 int (*init)(struct device *); 38 int (*init)(struct device *);
39 int (*power)(struct device *, int);
40 int (*reset)(struct device *, int);
41 39
42 unsigned long flags; 40 unsigned long flags;
43 unsigned long mclk_10khz; 41 unsigned long mclk_10khz;
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index d7632f63603c..4b3120dbc049 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -204,25 +204,54 @@ static void viper_set_core_cpu_voltage(unsigned long khz, int force)
204 204
205/* Interrupt handling */ 205/* Interrupt handling */
206static unsigned long viper_irq_enabled_mask; 206static unsigned long viper_irq_enabled_mask;
207static const int viper_isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, 9, 14, 15 };
208static const int viper_isa_irq_map[] = {
209 0, /* ISA irq #0, invalid */
210 0, /* ISA irq #1, invalid */
211 0, /* ISA irq #2, invalid */
212 1 << 0, /* ISA irq #3 */
213 1 << 1, /* ISA irq #4 */
214 1 << 2, /* ISA irq #5 */
215 1 << 3, /* ISA irq #6 */
216 1 << 4, /* ISA irq #7 */
217 0, /* ISA irq #8, invalid */
218 1 << 8, /* ISA irq #9 */
219 1 << 5, /* ISA irq #10 */
220 1 << 6, /* ISA irq #11 */
221 1 << 7, /* ISA irq #12 */
222 0, /* ISA irq #13, invalid */
223 1 << 9, /* ISA irq #14 */
224 1 << 10, /* ISA irq #15 */
225};
226
227static inline int viper_irq_to_bitmask(unsigned int irq)
228{
229 return viper_isa_irq_map[irq - PXA_ISA_IRQ(0)];
230}
231
232static inline int viper_bit_to_irq(int bit)
233{
234 return viper_isa_irqs[bit] + PXA_ISA_IRQ(0);
235}
207 236
208static void viper_ack_irq(unsigned int irq) 237static void viper_ack_irq(unsigned int irq)
209{ 238{
210 int viper_irq = irq - PXA_ISA_IRQ(0); 239 int viper_irq = viper_irq_to_bitmask(irq);
211 240
212 if (viper_irq < 8) 241 if (viper_irq & 0xff)
213 VIPER_LO_IRQ_STATUS = 1 << viper_irq; 242 VIPER_LO_IRQ_STATUS = viper_irq;
214 else 243 else
215 VIPER_HI_IRQ_STATUS = 1 << (viper_irq - 8); 244 VIPER_HI_IRQ_STATUS = (viper_irq >> 8);
216} 245}
217 246
218static void viper_mask_irq(unsigned int irq) 247static void viper_mask_irq(unsigned int irq)
219{ 248{
220 viper_irq_enabled_mask &= ~(1 << (irq - PXA_ISA_IRQ(0))); 249 viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(irq));
221} 250}
222 251
223static void viper_unmask_irq(unsigned int irq) 252static void viper_unmask_irq(unsigned int irq)
224{ 253{
225 viper_irq_enabled_mask |= (1 << (irq - PXA_ISA_IRQ(0))); 254 viper_irq_enabled_mask |= viper_irq_to_bitmask(irq);
226} 255}
227 256
228static inline unsigned long viper_irq_pending(void) 257static inline unsigned long viper_irq_pending(void)
@@ -237,8 +266,12 @@ static void viper_irq_handler(unsigned int irq, struct irq_desc *desc)
237 266
238 pending = viper_irq_pending(); 267 pending = viper_irq_pending();
239 do { 268 do {
269 /* we're in a chained irq handler,
270 * so ack the interrupt by hand */
271 GEDR(VIPER_CPLD_GPIO) = GPIO_bit(VIPER_CPLD_GPIO);
272
240 if (likely(pending)) { 273 if (likely(pending)) {
241 irq = PXA_ISA_IRQ(0) + __ffs(pending); 274 irq = viper_bit_to_irq(__ffs(pending));
242 generic_handle_irq(irq); 275 generic_handle_irq(irq);
243 } 276 }
244 pending = viper_irq_pending(); 277 pending = viper_irq_pending();
@@ -254,15 +287,14 @@ static struct irq_chip viper_irq_chip = {
254 287
255static void __init viper_init_irq(void) 288static void __init viper_init_irq(void)
256{ 289{
257 const int isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, 9, 14, 15 }; 290 int level;
258 int irq;
259 int isa_irq; 291 int isa_irq;
260 292
261 pxa25x_init_irq(); 293 pxa25x_init_irq();
262 294
263 /* setup ISA IRQs */ 295 /* setup ISA IRQs */
264 for (irq = 0; irq < ARRAY_SIZE(isa_irqs); irq++) { 296 for (level = 0; level < ARRAY_SIZE(viper_isa_irqs); level++) {
265 isa_irq = isa_irqs[irq]; 297 isa_irq = viper_bit_to_irq(level);
266 set_irq_chip(isa_irq, &viper_irq_chip); 298 set_irq_chip(isa_irq, &viper_irq_chip);
267 set_irq_handler(isa_irq, handle_edge_irq); 299 set_irq_handler(isa_irq, handle_edge_irq);
268 set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE); 300 set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE);
diff --git a/arch/arm/mach-s3c2410/bast-irq.c b/arch/arm/mach-s3c2410/bast-irq.c
index 75738000272b..9a37c87152b0 100644
--- a/arch/arm/mach-s3c2410/bast-irq.c
+++ b/arch/arm/mach-s3c2410/bast-irq.c
@@ -38,7 +38,7 @@
38#include <mach/bast-map.h> 38#include <mach/bast-map.h>
39#include <mach/bast-irq.h> 39#include <mach/bast-irq.h>
40 40
41#include <asm/plat-s3c24xx/irq.h> 41#include <plat/irq.h>
42 42
43#if 0 43#if 0
44#include <asm/debug-ll.h> 44#include <asm/debug-ll.h>
diff --git a/arch/arm/mach-s3c2410/clock.c b/arch/arm/mach-s3c2410/clock.c
index fef646c36b54..4e07943c1e29 100644
--- a/arch/arm/mach-s3c2410/clock.c
+++ b/arch/arm/mach-s3c2410/clock.c
@@ -37,13 +37,13 @@
37 37
38#include <mach/hardware.h> 38#include <mach/hardware.h>
39 39
40#include <asm/plat-s3c/regs-serial.h> 40#include <plat/regs-serial.h>
41#include <mach/regs-clock.h> 41#include <mach/regs-clock.h>
42#include <mach/regs-gpio.h> 42#include <mach/regs-gpio.h>
43 43
44#include <asm/plat-s3c24xx/s3c2410.h> 44#include <plat/s3c2410.h>
45#include <asm/plat-s3c24xx/clock.h> 45#include <plat/clock.h>
46#include <asm/plat-s3c24xx/cpu.h> 46#include <plat/cpu.h>
47 47
48int s3c2410_clkcon_enable(struct clk *clk, int enable) 48int s3c2410_clkcon_enable(struct clk *clk, int enable)
49{ 49{
diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c
index 8730797749e3..7d914a470b6c 100644
--- a/arch/arm/mach-s3c2410/dma.c
+++ b/arch/arm/mach-s3c2410/dma.c
@@ -20,10 +20,10 @@
20#include <asm/dma.h> 20#include <asm/dma.h>
21#include <mach/dma.h> 21#include <mach/dma.h>
22 22
23#include <asm/plat-s3c24xx/cpu.h> 23#include <plat/cpu.h>
24#include <asm/plat-s3c24xx/dma.h> 24#include <plat/dma.h>
25 25
26#include <asm/plat-s3c/regs-serial.h> 26#include <plat/regs-serial.h>
27#include <mach/regs-gpio.h> 27#include <mach/regs-gpio.h>
28#include <asm/plat-s3c/regs-ac97.h> 28#include <asm/plat-s3c/regs-ac97.h>
29#include <mach/regs-mem.h> 29#include <mach/regs-mem.h>
diff --git a/arch/arm/mach-s3c2410/include/mach/debug-macro.S b/arch/arm/mach-s3c2410/include/mach/debug-macro.S
index 682df23087ab..4c29a89ad077 100644
--- a/arch/arm/mach-s3c2410/include/mach/debug-macro.S
+++ b/arch/arm/mach-s3c2410/include/mach/debug-macro.S
@@ -14,7 +14,7 @@
14 14
15#include <mach/map.h> 15#include <mach/map.h>
16#include <mach/regs-gpio.h> 16#include <mach/regs-gpio.h>
17#include <asm/plat-s3c/regs-serial.h> 17#include <plat/regs-serial.h>
18 18
19#define S3C2410_UART1_OFF (0x4000) 19#define S3C2410_UART1_OFF (0x4000)
20#define SHIFT_2440TXF (14-9) 20#define SHIFT_2440TXF (14-9)
@@ -99,4 +99,4 @@
99 99
100/* include the reset of the code which will do the work */ 100/* include the reset of the code which will do the work */
101 101
102#include <asm/plat-s3c/debug-macro.S> 102#include <plat/debug-macro.S>
diff --git a/arch/arm/mach-s3c2410/include/mach/map.h b/arch/arm/mach-s3c2410/include/mach/map.h
index 64bf7e94a5bf..23c470c2e5b1 100644
--- a/arch/arm/mach-s3c2410/include/mach/map.h
+++ b/arch/arm/mach-s3c2410/include/mach/map.h
@@ -13,7 +13,7 @@
13#ifndef __ASM_ARCH_MAP_H 13#ifndef __ASM_ARCH_MAP_H
14#define __ASM_ARCH_MAP_H 14#define __ASM_ARCH_MAP_H
15 15
16#include <asm/plat-s3c/map.h> 16#include <plat/map.h>
17 17
18#define S3C2410_ADDR(x) S3C_ADDR(x) 18#define S3C2410_ADDR(x) S3C_ADDR(x)
19 19
diff --git a/arch/arm/mach-s3c2410/include/mach/spi.h b/arch/arm/mach-s3c2410/include/mach/spi.h
index 921b13b4f0a0..46d46f5b99f2 100644
--- a/arch/arm/mach-s3c2410/include/mach/spi.h
+++ b/arch/arm/mach-s3c2410/include/mach/spi.h
@@ -18,6 +18,7 @@ struct s3c2410_spi_info {
18 unsigned int num_cs; /* total chipselects */ 18 unsigned int num_cs; /* total chipselects */
19 int bus_num; /* bus number to use. */ 19 int bus_num; /* bus number to use. */
20 20
21 void (*gpio_setup)(struct s3c2410_spi_info *spi, int enable);
21 void (*set_cs)(struct s3c2410_spi_info *spi, int cs, int pol); 22 void (*set_cs)(struct s3c2410_spi_info *spi, int cs, int pol);
22}; 23};
23 24
diff --git a/arch/arm/mach-s3c2410/include/mach/uncompress.h b/arch/arm/mach-s3c2410/include/mach/uncompress.h
index 708e47459ffc..ab39491beee2 100644
--- a/arch/arm/mach-s3c2410/include/mach/uncompress.h
+++ b/arch/arm/mach-s3c2410/include/mach/uncompress.h
@@ -21,7 +21,7 @@
21#undef S3C2410_GPIOREG 21#undef S3C2410_GPIOREG
22#define S3C2410_GPIOREG(x) ((S3C24XX_PA_GPIO + (x))) 22#define S3C2410_GPIOREG(x) ((S3C24XX_PA_GPIO + (x)))
23 23
24#include <asm/plat-s3c/uncompress.h> 24#include <plat/uncompress.h>
25 25
26static inline int is_arm926(void) 26static inline int is_arm926(void)
27{ 27{
diff --git a/arch/arm/mach-s3c2410/irq.c b/arch/arm/mach-s3c2410/irq.c
index f5c5c53e1cc1..92150399563b 100644
--- a/arch/arm/mach-s3c2410/irq.c
+++ b/arch/arm/mach-s3c2410/irq.c
@@ -25,8 +25,8 @@
25#include <linux/ioport.h> 25#include <linux/ioport.h>
26#include <linux/sysdev.h> 26#include <linux/sysdev.h>
27 27
28#include <asm/plat-s3c24xx/cpu.h> 28#include <plat/cpu.h>
29#include <asm/plat-s3c24xx/pm.h> 29#include <plat/pm.h>
30 30
31static int s3c2410_irq_add(struct sys_device *sysdev) 31static int s3c2410_irq_add(struct sys_device *sysdev)
32{ 32{
diff --git a/arch/arm/mach-s3c2410/mach-amlm5900.c b/arch/arm/mach-s3c2410/mach-amlm5900.c
index 527f88a288ec..d061fea01900 100644
--- a/arch/arm/mach-s3c2410/mach-amlm5900.c
+++ b/arch/arm/mach-s3c2410/mach-amlm5900.c
@@ -48,12 +48,12 @@
48#include <asm/mach-types.h> 48#include <asm/mach-types.h>
49#include <mach/fb.h> 49#include <mach/fb.h>
50 50
51#include <asm/plat-s3c/regs-serial.h> 51#include <plat/regs-serial.h>
52#include <mach/regs-lcd.h> 52#include <mach/regs-lcd.h>
53#include <mach/regs-gpio.h> 53#include <mach/regs-gpio.h>
54 54
55#include <asm/plat-s3c24xx/devs.h> 55#include <plat/devs.h>
56#include <asm/plat-s3c24xx/cpu.h> 56#include <plat/cpu.h>
57 57
58#ifdef CONFIG_MTD_PARTITIONS 58#ifdef CONFIG_MTD_PARTITIONS
59 59
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index e4368e6e7e6c..8db9c700e3c2 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -39,7 +39,7 @@
39#include <asm/mach-types.h> 39#include <asm/mach-types.h>
40 40
41//#include <asm/debug-ll.h> 41//#include <asm/debug-ll.h>
42#include <asm/plat-s3c/regs-serial.h> 42#include <plat/regs-serial.h>
43#include <mach/regs-gpio.h> 43#include <mach/regs-gpio.h>
44#include <mach/regs-mem.h> 44#include <mach/regs-mem.h>
45#include <mach/regs-lcd.h> 45#include <mach/regs-lcd.h>
@@ -55,9 +55,9 @@
55 55
56#include <linux/serial_8250.h> 56#include <linux/serial_8250.h>
57 57
58#include <asm/plat-s3c24xx/clock.h> 58#include <plat/clock.h>
59#include <asm/plat-s3c24xx/devs.h> 59#include <plat/devs.h>
60#include <asm/plat-s3c24xx/cpu.h> 60#include <plat/cpu.h>
61 61
62#include "usb-simtec.h" 62#include "usb-simtec.h"
63#include "nor-simtec.h" 63#include "nor-simtec.h"
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c
index 85e710f2863b..98716d0108e9 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -30,7 +30,7 @@
30#include <asm/irq.h> 30#include <asm/irq.h>
31#include <asm/mach-types.h> 31#include <asm/mach-types.h>
32 32
33#include <asm/plat-s3c/regs-serial.h> 33#include <plat/regs-serial.h>
34#include <mach/regs-lcd.h> 34#include <mach/regs-lcd.h>
35#include <mach/regs-gpio.h> 35#include <mach/regs-gpio.h>
36#include <mach/regs-clock.h> 36#include <mach/regs-clock.h>
@@ -40,10 +40,10 @@
40#include <mach/fb.h> 40#include <mach/fb.h>
41#include <asm/plat-s3c24xx/udc.h> 41#include <asm/plat-s3c24xx/udc.h>
42 42
43#include <asm/plat-s3c24xx/clock.h> 43#include <plat/clock.h>
44#include <asm/plat-s3c24xx/devs.h> 44#include <plat/devs.h>
45#include <asm/plat-s3c24xx/cpu.h> 45#include <plat/cpu.h>
46#include <asm/plat-s3c24xx/pm.h> 46#include <plat/pm.h>
47 47
48static struct map_desc h1940_iodesc[] __initdata = { 48static struct map_desc h1940_iodesc[] __initdata = {
49 [0] = { 49 [0] = {
diff --git a/arch/arm/mach-s3c2410/mach-n30.c b/arch/arm/mach-s3c2410/mach-n30.c
index 3ece2d04934e..82505517846c 100644
--- a/arch/arm/mach-s3c2410/mach-n30.c
+++ b/arch/arm/mach-s3c2410/mach-n30.c
@@ -41,12 +41,12 @@
41#include <asm/mach/map.h> 41#include <asm/mach/map.h>
42 42
43#include <asm/plat-s3c/iic.h> 43#include <asm/plat-s3c/iic.h>
44#include <asm/plat-s3c/regs-serial.h> 44#include <plat/regs-serial.h>
45 45
46#include <asm/plat-s3c24xx/clock.h> 46#include <plat/clock.h>
47#include <asm/plat-s3c24xx/cpu.h> 47#include <plat/cpu.h>
48#include <asm/plat-s3c24xx/devs.h> 48#include <plat/devs.h>
49#include <asm/plat-s3c24xx/s3c2410.h> 49#include <plat/s3c2410.h>
50#include <asm/plat-s3c24xx/udc.h> 50#include <asm/plat-s3c24xx/udc.h>
51 51
52static struct map_desc n30_iodesc[] __initdata = { 52static struct map_desc n30_iodesc[] __initdata = {
diff --git a/arch/arm/mach-s3c2410/mach-otom.c b/arch/arm/mach-s3c2410/mach-otom.c
index c4dfe3eabe1d..d8255cf87e44 100644
--- a/arch/arm/mach-s3c2410/mach-otom.c
+++ b/arch/arm/mach-s3c2410/mach-otom.c
@@ -29,13 +29,13 @@
29#include <asm/irq.h> 29#include <asm/irq.h>
30#include <asm/mach-types.h> 30#include <asm/mach-types.h>
31 31
32#include <asm/plat-s3c/regs-serial.h> 32#include <plat/regs-serial.h>
33#include <mach/regs-gpio.h> 33#include <mach/regs-gpio.h>
34 34
35#include <asm/plat-s3c24xx/s3c2410.h> 35#include <plat/s3c2410.h>
36#include <asm/plat-s3c24xx/clock.h> 36#include <plat/clock.h>
37#include <asm/plat-s3c24xx/devs.h> 37#include <plat/devs.h>
38#include <asm/plat-s3c24xx/cpu.h> 38#include <plat/cpu.h>
39 39
40static struct map_desc otom11_iodesc[] __initdata = { 40static struct map_desc otom11_iodesc[] __initdata = {
41 /* Device area */ 41 /* Device area */
diff --git a/arch/arm/mach-s3c2410/mach-qt2410.c b/arch/arm/mach-s3c2410/mach-qt2410.c
index 97c13192315b..661807e14e8a 100644
--- a/arch/arm/mach-s3c2410/mach-qt2410.c
+++ b/arch/arm/mach-s3c2410/mach-qt2410.c
@@ -48,17 +48,17 @@
48 48
49#include <mach/regs-gpio.h> 49#include <mach/regs-gpio.h>
50#include <mach/leds-gpio.h> 50#include <mach/leds-gpio.h>
51#include <asm/plat-s3c/regs-serial.h> 51#include <plat/regs-serial.h>
52#include <mach/fb.h> 52#include <mach/fb.h>
53#include <asm/plat-s3c/nand.h> 53#include <asm/plat-s3c/nand.h>
54#include <asm/plat-s3c24xx/udc.h> 54#include <asm/plat-s3c24xx/udc.h>
55#include <mach/spi.h> 55#include <mach/spi.h>
56#include <mach/spi-gpio.h> 56#include <mach/spi-gpio.h>
57 57
58#include <asm/plat-s3c24xx/common-smdk.h> 58#include <plat/common-smdk.h>
59#include <asm/plat-s3c24xx/devs.h> 59#include <plat/devs.h>
60#include <asm/plat-s3c24xx/cpu.h> 60#include <plat/cpu.h>
61#include <asm/plat-s3c24xx/pm.h> 61#include <plat/pm.h>
62 62
63static struct map_desc qt2410_iodesc[] __initdata = { 63static struct map_desc qt2410_iodesc[] __initdata = {
64 { 0xe0000000, __phys_to_pfn(S3C2410_CS3+0x01000000), SZ_1M, MT_DEVICE } 64 { 0xe0000000, __phys_to_pfn(S3C2410_CS3+0x01000000), SZ_1M, MT_DEVICE }
diff --git a/arch/arm/mach-s3c2410/mach-smdk2410.c b/arch/arm/mach-s3c2410/mach-smdk2410.c
index d49e58acb03b..152527bb2872 100644
--- a/arch/arm/mach-s3c2410/mach-smdk2410.c
+++ b/arch/arm/mach-s3c2410/mach-smdk2410.c
@@ -46,12 +46,12 @@
46#include <asm/irq.h> 46#include <asm/irq.h>
47#include <asm/mach-types.h> 47#include <asm/mach-types.h>
48 48
49#include <asm/plat-s3c/regs-serial.h> 49#include <plat/regs-serial.h>
50 50
51#include <asm/plat-s3c24xx/devs.h> 51#include <plat/devs.h>
52#include <asm/plat-s3c24xx/cpu.h> 52#include <plat/cpu.h>
53 53
54#include <asm/plat-s3c24xx/common-smdk.h> 54#include <plat/common-smdk.h>
55 55
56static struct map_desc smdk2410_iodesc[] __initdata = { 56static struct map_desc smdk2410_iodesc[] __initdata = {
57 /* nothing here yet */ 57 /* nothing here yet */
diff --git a/arch/arm/mach-s3c2410/mach-tct_hammer.c b/arch/arm/mach-s3c2410/mach-tct_hammer.c
index cc2e79fe4f9f..309dcf4c870a 100644
--- a/arch/arm/mach-s3c2410/mach-tct_hammer.c
+++ b/arch/arm/mach-s3c2410/mach-tct_hammer.c
@@ -44,9 +44,9 @@
44#include <asm/irq.h> 44#include <asm/irq.h>
45#include <asm/mach-types.h> 45#include <asm/mach-types.h>
46 46
47#include <asm/plat-s3c/regs-serial.h> 47#include <plat/regs-serial.h>
48#include <asm/plat-s3c24xx/devs.h> 48#include <plat/devs.h>
49#include <asm/plat-s3c24xx/cpu.h> 49#include <plat/cpu.h>
50 50
51#ifdef CONFIG_MTD_PARTITIONS 51#ifdef CONFIG_MTD_PARTITIONS
52 52
diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c
index ed3acb05c855..941353af16dc 100644
--- a/arch/arm/mach-s3c2410/mach-vr1000.c
+++ b/arch/arm/mach-s3c2410/mach-vr1000.c
@@ -40,13 +40,13 @@
40#include <asm/irq.h> 40#include <asm/irq.h>
41#include <asm/mach-types.h> 41#include <asm/mach-types.h>
42 42
43#include <asm/plat-s3c/regs-serial.h> 43#include <plat/regs-serial.h>
44#include <mach/regs-gpio.h> 44#include <mach/regs-gpio.h>
45#include <mach/leds-gpio.h> 45#include <mach/leds-gpio.h>
46 46
47#include <asm/plat-s3c24xx/clock.h> 47#include <plat/clock.h>
48#include <asm/plat-s3c24xx/devs.h> 48#include <plat/devs.h>
49#include <asm/plat-s3c24xx/cpu.h> 49#include <plat/cpu.h>
50 50
51#include "usb-simtec.h" 51#include "usb-simtec.h"
52#include "nor-simtec.h" 52#include "nor-simtec.h"
diff --git a/arch/arm/mach-s3c2410/pm.c b/arch/arm/mach-s3c2410/pm.c
index 733f8a227775..a6970f613192 100644
--- a/arch/arm/mach-s3c2410/pm.c
+++ b/arch/arm/mach-s3c2410/pm.c
@@ -34,8 +34,8 @@
34#include <mach/regs-gpio.h> 34#include <mach/regs-gpio.h>
35#include <mach/h1940.h> 35#include <mach/h1940.h>
36 36
37#include <asm/plat-s3c24xx/cpu.h> 37#include <plat/cpu.h>
38#include <asm/plat-s3c24xx/pm.h> 38#include <plat/pm.h>
39 39
40#ifdef CONFIG_S3C2410_PM_DEBUG 40#ifdef CONFIG_S3C2410_PM_DEBUG
41extern void pm_dbg(const char *fmt, ...); 41extern void pm_dbg(const char *fmt, ...);
diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c
index b1e658c917a0..ac79b536c4c3 100644
--- a/arch/arm/mach-s3c2410/s3c2410.c
+++ b/arch/arm/mach-s3c2410/s3c2410.c
@@ -29,12 +29,12 @@
29#include <asm/irq.h> 29#include <asm/irq.h>
30 30
31#include <mach/regs-clock.h> 31#include <mach/regs-clock.h>
32#include <asm/plat-s3c/regs-serial.h> 32#include <plat/regs-serial.h>
33 33
34#include <asm/plat-s3c24xx/s3c2410.h> 34#include <plat/s3c2410.h>
35#include <asm/plat-s3c24xx/cpu.h> 35#include <plat/cpu.h>
36#include <asm/plat-s3c24xx/devs.h> 36#include <plat/devs.h>
37#include <asm/plat-s3c24xx/clock.h> 37#include <plat/clock.h>
38 38
39/* Initial IO mappings */ 39/* Initial IO mappings */
40 40
diff --git a/arch/arm/mach-s3c2410/sleep.S b/arch/arm/mach-s3c2410/sleep.S
index be37f221a177..dd5b6388a5a5 100644
--- a/arch/arm/mach-s3c2410/sleep.S
+++ b/arch/arm/mach-s3c2410/sleep.S
@@ -32,7 +32,7 @@
32#include <mach/regs-gpio.h> 32#include <mach/regs-gpio.h>
33#include <mach/regs-clock.h> 33#include <mach/regs-clock.h>
34#include <mach/regs-mem.h> 34#include <mach/regs-mem.h>
35#include <asm/plat-s3c/regs-serial.h> 35#include <plat/regs-serial.h>
36 36
37 /* s3c2410_cpu_suspend 37 /* s3c2410_cpu_suspend
38 * 38 *
diff --git a/arch/arm/mach-s3c2410/usb-simtec.c b/arch/arm/mach-s3c2410/usb-simtec.c
index eb6fc0bfd47e..6078f09b7df5 100644
--- a/arch/arm/mach-s3c2410/usb-simtec.c
+++ b/arch/arm/mach-s3c2410/usb-simtec.c
@@ -35,7 +35,7 @@
35#include <mach/hardware.h> 35#include <mach/hardware.h>
36#include <asm/irq.h> 36#include <asm/irq.h>
37 37
38#include <asm/plat-s3c24xx/devs.h> 38#include <plat/devs.h>
39#include "usb-simtec.h" 39#include "usb-simtec.h"
40 40
41/* control power and monitor over-current events on various Simtec 41/* control power and monitor over-current events on various Simtec
diff --git a/arch/arm/mach-s3c2412/clock.c b/arch/arm/mach-s3c2412/clock.c
index 5fbaac6054f8..96d9eb15424f 100644
--- a/arch/arm/mach-s3c2412/clock.c
+++ b/arch/arm/mach-s3c2412/clock.c
@@ -37,13 +37,13 @@
37 37
38#include <mach/hardware.h> 38#include <mach/hardware.h>
39 39
40#include <asm/plat-s3c/regs-serial.h> 40#include <plat/regs-serial.h>
41#include <mach/regs-clock.h> 41#include <mach/regs-clock.h>
42#include <mach/regs-gpio.h> 42#include <mach/regs-gpio.h>
43 43
44#include <asm/plat-s3c24xx/s3c2412.h> 44#include <plat/s3c2412.h>
45#include <asm/plat-s3c24xx/clock.h> 45#include <plat/clock.h>
46#include <asm/plat-s3c24xx/cpu.h> 46#include <plat/cpu.h>
47 47
48/* We currently have to assume that the system is running 48/* We currently have to assume that the system is running
49 * from the XTPll input, and that all ***REFCLKs are being 49 * from the XTPll input, and that all ***REFCLKs are being
diff --git a/arch/arm/mach-s3c2412/dma.c b/arch/arm/mach-s3c2412/dma.c
index dcfff6b8b958..ba0591e71f32 100644
--- a/arch/arm/mach-s3c2412/dma.c
+++ b/arch/arm/mach-s3c2412/dma.c
@@ -21,10 +21,10 @@
21#include <asm/dma.h> 21#include <asm/dma.h>
22#include <mach/dma.h> 22#include <mach/dma.h>
23 23
24#include <asm/plat-s3c24xx/dma.h> 24#include <plat/dma.h>
25#include <asm/plat-s3c24xx/cpu.h> 25#include <plat/cpu.h>
26 26
27#include <asm/plat-s3c/regs-serial.h> 27#include <plat/regs-serial.h>
28#include <mach/regs-gpio.h> 28#include <mach/regs-gpio.h>
29#include <asm/plat-s3c/regs-ac97.h> 29#include <asm/plat-s3c/regs-ac97.h>
30#include <mach/regs-mem.h> 30#include <mach/regs-mem.h>
diff --git a/arch/arm/mach-s3c2412/irq.c b/arch/arm/mach-s3c2412/irq.c
index 41720f2c1fea..6000ca9d1815 100644
--- a/arch/arm/mach-s3c2412/irq.c
+++ b/arch/arm/mach-s3c2412/irq.c
@@ -35,9 +35,9 @@
35#include <mach/regs-gpio.h> 35#include <mach/regs-gpio.h>
36#include <mach/regs-power.h> 36#include <mach/regs-power.h>
37 37
38#include <asm/plat-s3c24xx/cpu.h> 38#include <plat/cpu.h>
39#include <asm/plat-s3c24xx/irq.h> 39#include <plat/irq.h>
40#include <asm/plat-s3c24xx/pm.h> 40#include <plat/pm.h>
41 41
42#define INTMSK(start, end) ((1 << ((end) + 1 - (start))) - 1) 42#define INTMSK(start, end) ((1 << ((end) + 1 - (start))) - 1)
43#define INTMSK_SUB(start, end) (INTMSK(start, end) << ((start - S3C2410_IRQSUB(0)))) 43#define INTMSK_SUB(start, end) (INTMSK(start, end) << ((start - S3C2410_IRQSUB(0))))
diff --git a/arch/arm/mach-s3c2412/mach-jive.c b/arch/arm/mach-s3c2412/mach-jive.c
index ad980a1690c2..b08f18c8c47a 100644
--- a/arch/arm/mach-s3c2412/mach-jive.c
+++ b/arch/arm/mach-s3c2412/mach-jive.c
@@ -30,7 +30,7 @@
30#include <asm/mach/map.h> 30#include <asm/mach/map.h>
31#include <asm/mach/irq.h> 31#include <asm/mach/irq.h>
32 32
33#include <asm/plat-s3c/regs-serial.h> 33#include <plat/regs-serial.h>
34#include <asm/plat-s3c/nand.h> 34#include <asm/plat-s3c/nand.h>
35#include <asm/plat-s3c/iic.h> 35#include <asm/plat-s3c/iic.h>
36 36
@@ -48,10 +48,10 @@
48#include <linux/mtd/nand_ecc.h> 48#include <linux/mtd/nand_ecc.h>
49#include <linux/mtd/partitions.h> 49#include <linux/mtd/partitions.h>
50 50
51#include <asm/plat-s3c24xx/clock.h> 51#include <plat/clock.h>
52#include <asm/plat-s3c24xx/devs.h> 52#include <plat/devs.h>
53#include <asm/plat-s3c24xx/cpu.h> 53#include <plat/cpu.h>
54#include <asm/plat-s3c24xx/pm.h> 54#include <plat/pm.h>
55#include <asm/plat-s3c24xx/udc.h> 55#include <asm/plat-s3c24xx/udc.h>
56 56
57static struct map_desc jive_iodesc[] __initdata = { 57static struct map_desc jive_iodesc[] __initdata = {
diff --git a/arch/arm/mach-s3c2412/mach-smdk2413.c b/arch/arm/mach-s3c2412/mach-smdk2413.c
index 8f8d9117b968..c719b5a740a9 100644
--- a/arch/arm/mach-s3c2412/mach-smdk2413.c
+++ b/arch/arm/mach-s3c2412/mach-smdk2413.c
@@ -32,7 +32,7 @@
32#include <asm/mach-types.h> 32#include <asm/mach-types.h>
33 33
34//#include <asm/debug-ll.h> 34//#include <asm/debug-ll.h>
35#include <asm/plat-s3c/regs-serial.h> 35#include <plat/regs-serial.h>
36#include <mach/regs-gpio.h> 36#include <mach/regs-gpio.h>
37#include <mach/regs-lcd.h> 37#include <mach/regs-lcd.h>
38 38
@@ -40,13 +40,13 @@
40#include <asm/plat-s3c24xx/udc.h> 40#include <asm/plat-s3c24xx/udc.h>
41#include <mach/fb.h> 41#include <mach/fb.h>
42 42
43#include <asm/plat-s3c24xx/s3c2410.h> 43#include <plat/s3c2410.h>
44#include <asm/plat-s3c24xx/s3c2412.h> 44#include <plat/s3c2412.h>
45#include <asm/plat-s3c24xx/clock.h> 45#include <plat/clock.h>
46#include <asm/plat-s3c24xx/devs.h> 46#include <plat/devs.h>
47#include <asm/plat-s3c24xx/cpu.h> 47#include <plat/cpu.h>
48 48
49#include <asm/plat-s3c24xx/common-smdk.h> 49#include <plat/common-smdk.h>
50 50
51static struct map_desc smdk2413_iodesc[] __initdata = { 51static struct map_desc smdk2413_iodesc[] __initdata = {
52}; 52};
diff --git a/arch/arm/mach-s3c2412/mach-vstms.c b/arch/arm/mach-s3c2412/mach-vstms.c
index bb9bf63b2e02..4cfa19ad9be0 100644
--- a/arch/arm/mach-s3c2412/mach-vstms.c
+++ b/arch/arm/mach-s3c2412/mach-vstms.c
@@ -32,7 +32,7 @@
32#include <asm/irq.h> 32#include <asm/irq.h>
33#include <asm/mach-types.h> 33#include <asm/mach-types.h>
34 34
35#include <asm/plat-s3c/regs-serial.h> 35#include <plat/regs-serial.h>
36#include <mach/regs-gpio.h> 36#include <mach/regs-gpio.h>
37#include <mach/regs-lcd.h> 37#include <mach/regs-lcd.h>
38 38
@@ -41,11 +41,11 @@
41 41
42#include <asm/plat-s3c/nand.h> 42#include <asm/plat-s3c/nand.h>
43 43
44#include <asm/plat-s3c24xx/s3c2410.h> 44#include <plat/s3c2410.h>
45#include <asm/plat-s3c24xx/s3c2412.h> 45#include <plat/s3c2412.h>
46#include <asm/plat-s3c24xx/clock.h> 46#include <plat/clock.h>
47#include <asm/plat-s3c24xx/devs.h> 47#include <plat/devs.h>
48#include <asm/plat-s3c24xx/cpu.h> 48#include <plat/cpu.h>
49 49
50 50
51static struct map_desc vstms_iodesc[] __initdata = { 51static struct map_desc vstms_iodesc[] __initdata = {
diff --git a/arch/arm/mach-s3c2412/pm.c b/arch/arm/mach-s3c2412/pm.c
index 9540ef752f73..217e9e4ed45f 100644
--- a/arch/arm/mach-s3c2412/pm.c
+++ b/arch/arm/mach-s3c2412/pm.c
@@ -28,10 +28,10 @@
28#include <mach/regs-gpio.h> 28#include <mach/regs-gpio.h>
29#include <mach/regs-dsc.h> 29#include <mach/regs-dsc.h>
30 30
31#include <asm/plat-s3c24xx/cpu.h> 31#include <plat/cpu.h>
32#include <asm/plat-s3c24xx/pm.h> 32#include <plat/pm.h>
33 33
34#include <asm/plat-s3c24xx/s3c2412.h> 34#include <plat/s3c2412.h>
35 35
36extern void s3c2412_sleep_enter(void); 36extern void s3c2412_sleep_enter(void);
37 37
diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c
index 42440fc55681..313759c3da69 100644
--- a/arch/arm/mach-s3c2412/s3c2412.c
+++ b/arch/arm/mach-s3c2412/s3c2412.c
@@ -34,7 +34,7 @@
34#include <mach/idle.h> 34#include <mach/idle.h>
35 35
36#include <mach/regs-clock.h> 36#include <mach/regs-clock.h>
37#include <asm/plat-s3c/regs-serial.h> 37#include <plat/regs-serial.h>
38#include <mach/regs-power.h> 38#include <mach/regs-power.h>
39#include <mach/regs-gpio.h> 39#include <mach/regs-gpio.h>
40#include <mach/regs-gpioj.h> 40#include <mach/regs-gpioj.h>
@@ -42,11 +42,11 @@
42#include <asm/plat-s3c24xx/regs-spi.h> 42#include <asm/plat-s3c24xx/regs-spi.h>
43#include <mach/regs-s3c2412.h> 43#include <mach/regs-s3c2412.h>
44 44
45#include <asm/plat-s3c24xx/s3c2412.h> 45#include <plat/s3c2412.h>
46#include <asm/plat-s3c24xx/cpu.h> 46#include <plat/cpu.h>
47#include <asm/plat-s3c24xx/devs.h> 47#include <plat/devs.h>
48#include <asm/plat-s3c24xx/clock.h> 48#include <plat/clock.h>
49#include <asm/plat-s3c24xx/pm.h> 49#include <plat/pm.h>
50 50
51#ifndef CONFIG_CPU_S3C2412_ONLY 51#ifndef CONFIG_CPU_S3C2412_ONLY
52void __iomem *s3c24xx_va_gpio2 = S3C24XX_VA_GPIO; 52void __iomem *s3c24xx_va_gpio2 = S3C24XX_VA_GPIO;
diff --git a/arch/arm/mach-s3c2440/clock.c b/arch/arm/mach-s3c2440/clock.c
index 40503a65bacf..d1c29b2537cd 100644
--- a/arch/arm/mach-s3c2440/clock.c
+++ b/arch/arm/mach-s3c2440/clock.c
@@ -41,8 +41,8 @@
41 41
42#include <mach/regs-clock.h> 42#include <mach/regs-clock.h>
43 43
44#include <asm/plat-s3c24xx/clock.h> 44#include <plat/clock.h>
45#include <asm/plat-s3c24xx/cpu.h> 45#include <plat/cpu.h>
46 46
47/* S3C2440 extended clock support */ 47/* S3C2440 extended clock support */
48 48
diff --git a/arch/arm/mach-s3c2440/dma.c b/arch/arm/mach-s3c2440/dma.c
index cdd4e6e79ac0..32303f6a8321 100644
--- a/arch/arm/mach-s3c2440/dma.c
+++ b/arch/arm/mach-s3c2440/dma.c
@@ -20,10 +20,10 @@
20#include <asm/dma.h> 20#include <asm/dma.h>
21#include <mach/dma.h> 21#include <mach/dma.h>
22 22
23#include <asm/plat-s3c24xx/dma.h> 23#include <plat/dma.h>
24#include <asm/plat-s3c24xx/cpu.h> 24#include <plat/cpu.h>
25 25
26#include <asm/plat-s3c/regs-serial.h> 26#include <plat/regs-serial.h>
27#include <mach/regs-gpio.h> 27#include <mach/regs-gpio.h>
28#include <asm/plat-s3c/regs-ac97.h> 28#include <asm/plat-s3c/regs-ac97.h>
29#include <mach/regs-mem.h> 29#include <mach/regs-mem.h>
diff --git a/arch/arm/mach-s3c2440/dsc.c b/arch/arm/mach-s3c2440/dsc.c
index 4f7d06baf0d3..554044272771 100644
--- a/arch/arm/mach-s3c2440/dsc.c
+++ b/arch/arm/mach-s3c2440/dsc.c
@@ -27,8 +27,8 @@
27#include <mach/regs-gpio.h> 27#include <mach/regs-gpio.h>
28#include <mach/regs-dsc.h> 28#include <mach/regs-dsc.h>
29 29
30#include <asm/plat-s3c24xx/cpu.h> 30#include <plat/cpu.h>
31#include <asm/plat-s3c24xx/s3c2440.h> 31#include <plat/s3c2440.h>
32 32
33int s3c2440_set_dsc(unsigned int pin, unsigned int value) 33int s3c2440_set_dsc(unsigned int pin, unsigned int value)
34{ 34{
diff --git a/arch/arm/mach-s3c2440/irq.c b/arch/arm/mach-s3c2440/irq.c
index 33e3ede0a2b3..63c5ab65727f 100644
--- a/arch/arm/mach-s3c2440/irq.c
+++ b/arch/arm/mach-s3c2440/irq.c
@@ -34,9 +34,9 @@
34#include <mach/regs-irq.h> 34#include <mach/regs-irq.h>
35#include <mach/regs-gpio.h> 35#include <mach/regs-gpio.h>
36 36
37#include <asm/plat-s3c24xx/cpu.h> 37#include <plat/cpu.h>
38#include <asm/plat-s3c24xx/pm.h> 38#include <plat/pm.h>
39#include <asm/plat-s3c24xx/irq.h> 39#include <plat/irq.h>
40 40
41/* WDT/AC97 */ 41/* WDT/AC97 */
42 42
diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c
index 19eb0e5269ac..e2beca470484 100644
--- a/arch/arm/mach-s3c2440/mach-anubis.c
+++ b/arch/arm/mach-s3c2440/mach-anubis.c
@@ -35,7 +35,7 @@
35#include <asm/irq.h> 35#include <asm/irq.h>
36#include <asm/mach-types.h> 36#include <asm/mach-types.h>
37 37
38#include <asm/plat-s3c/regs-serial.h> 38#include <plat/regs-serial.h>
39#include <mach/regs-gpio.h> 39#include <mach/regs-gpio.h>
40#include <mach/regs-mem.h> 40#include <mach/regs-mem.h>
41#include <mach/regs-lcd.h> 41#include <mach/regs-lcd.h>
@@ -48,9 +48,9 @@
48 48
49#include <net/ax88796.h> 49#include <net/ax88796.h>
50 50
51#include <asm/plat-s3c24xx/clock.h> 51#include <plat/clock.h>
52#include <asm/plat-s3c24xx/devs.h> 52#include <plat/devs.h>
53#include <asm/plat-s3c24xx/cpu.h> 53#include <plat/cpu.h>
54 54
55#define COPYRIGHT ", (c) 2005 Simtec Electronics" 55#define COPYRIGHT ", (c) 2005 Simtec Electronics"
56 56
diff --git a/arch/arm/mach-s3c2440/mach-at2440evb.c b/arch/arm/mach-s3c2440/mach-at2440evb.c
index f0f0cc6afcf4..66876c6f2f1c 100644
--- a/arch/arm/mach-s3c2440/mach-at2440evb.c
+++ b/arch/arm/mach-s3c2440/mach-at2440evb.c
@@ -31,7 +31,7 @@
31#include <asm/irq.h> 31#include <asm/irq.h>
32#include <asm/mach-types.h> 32#include <asm/mach-types.h>
33 33
34#include <asm/plat-s3c/regs-serial.h> 34#include <plat/regs-serial.h>
35#include <mach/regs-gpio.h> 35#include <mach/regs-gpio.h>
36#include <mach/regs-mem.h> 36#include <mach/regs-mem.h>
37#include <mach/regs-lcd.h> 37#include <mach/regs-lcd.h>
@@ -42,9 +42,9 @@
42#include <linux/mtd/nand_ecc.h> 42#include <linux/mtd/nand_ecc.h>
43#include <linux/mtd/partitions.h> 43#include <linux/mtd/partitions.h>
44 44
45#include <asm/plat-s3c24xx/clock.h> 45#include <plat/clock.h>
46#include <asm/plat-s3c24xx/devs.h> 46#include <plat/devs.h>
47#include <asm/plat-s3c24xx/cpu.h> 47#include <plat/cpu.h>
48 48
49static struct map_desc at2440evb_iodesc[] __initdata = { 49static struct map_desc at2440evb_iodesc[] __initdata = {
50 /* Nothing here */ 50 /* Nothing here */
diff --git a/arch/arm/mach-s3c2440/mach-nexcoder.c b/arch/arm/mach-s3c2440/mach-nexcoder.c
index 49e828d1d4d8..a546307fd53d 100644
--- a/arch/arm/mach-s3c2440/mach-nexcoder.c
+++ b/arch/arm/mach-s3c2440/mach-nexcoder.c
@@ -36,13 +36,13 @@
36 36
37//#include <asm/debug-ll.h> 37//#include <asm/debug-ll.h>
38#include <mach/regs-gpio.h> 38#include <mach/regs-gpio.h>
39#include <asm/plat-s3c/regs-serial.h> 39#include <plat/regs-serial.h>
40 40
41#include <asm/plat-s3c24xx/s3c2410.h> 41#include <plat/s3c2410.h>
42#include <asm/plat-s3c24xx/s3c2440.h> 42#include <plat/s3c2440.h>
43#include <asm/plat-s3c24xx/clock.h> 43#include <plat/clock.h>
44#include <asm/plat-s3c24xx/devs.h> 44#include <plat/devs.h>
45#include <asm/plat-s3c24xx/cpu.h> 45#include <plat/cpu.h>
46 46
47static struct map_desc nexcoder_iodesc[] __initdata = { 47static struct map_desc nexcoder_iodesc[] __initdata = {
48 /* nothing here yet */ 48 /* nothing here yet */
diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c
index 85144aa52c27..2361d606abc5 100644
--- a/arch/arm/mach-s3c2440/mach-osiris.c
+++ b/arch/arm/mach-s3c2440/mach-osiris.c
@@ -33,7 +33,7 @@
33#include <asm/irq.h> 33#include <asm/irq.h>
34#include <asm/mach-types.h> 34#include <asm/mach-types.h>
35 35
36#include <asm/plat-s3c/regs-serial.h> 36#include <plat/regs-serial.h>
37#include <mach/regs-gpio.h> 37#include <mach/regs-gpio.h>
38#include <mach/regs-mem.h> 38#include <mach/regs-mem.h>
39#include <mach/regs-lcd.h> 39#include <mach/regs-lcd.h>
@@ -44,9 +44,9 @@
44#include <linux/mtd/nand_ecc.h> 44#include <linux/mtd/nand_ecc.h>
45#include <linux/mtd/partitions.h> 45#include <linux/mtd/partitions.h>
46 46
47#include <asm/plat-s3c24xx/clock.h> 47#include <plat/clock.h>
48#include <asm/plat-s3c24xx/devs.h> 48#include <plat/devs.h>
49#include <asm/plat-s3c24xx/cpu.h> 49#include <plat/cpu.h>
50 50
51/* onboard perihperal map */ 51/* onboard perihperal map */
52 52
diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c
index a4c690456d19..4d14c7cff892 100644
--- a/arch/arm/mach-s3c2440/mach-rx3715.c
+++ b/arch/arm/mach-s3c2440/mach-rx3715.c
@@ -37,7 +37,7 @@
37#include <asm/irq.h> 37#include <asm/irq.h>
38#include <asm/mach-types.h> 38#include <asm/mach-types.h>
39 39
40#include <asm/plat-s3c/regs-serial.h> 40#include <plat/regs-serial.h>
41#include <mach/regs-gpio.h> 41#include <mach/regs-gpio.h>
42#include <mach/regs-lcd.h> 42#include <mach/regs-lcd.h>
43 43
@@ -45,10 +45,10 @@
45#include <asm/plat-s3c/nand.h> 45#include <asm/plat-s3c/nand.h>
46#include <mach/fb.h> 46#include <mach/fb.h>
47 47
48#include <asm/plat-s3c24xx/clock.h> 48#include <plat/clock.h>
49#include <asm/plat-s3c24xx/devs.h> 49#include <plat/devs.h>
50#include <asm/plat-s3c24xx/cpu.h> 50#include <plat/cpu.h>
51#include <asm/plat-s3c24xx/pm.h> 51#include <plat/pm.h>
52 52
53static struct map_desc rx3715_iodesc[] __initdata = { 53static struct map_desc rx3715_iodesc[] __initdata = {
54 /* dump ISA space somewhere unused */ 54 /* dump ISA space somewhere unused */
diff --git a/arch/arm/mach-s3c2440/mach-smdk2440.c b/arch/arm/mach-s3c2440/mach-smdk2440.c
index 7ac60b869e7f..fefeaaa4155f 100644
--- a/arch/arm/mach-s3c2440/mach-smdk2440.c
+++ b/arch/arm/mach-s3c2440/mach-smdk2440.c
@@ -31,20 +31,20 @@
31#include <asm/irq.h> 31#include <asm/irq.h>
32#include <asm/mach-types.h> 32#include <asm/mach-types.h>
33 33
34#include <asm/plat-s3c/regs-serial.h> 34#include <plat/regs-serial.h>
35#include <mach/regs-gpio.h> 35#include <mach/regs-gpio.h>
36#include <mach/regs-lcd.h> 36#include <mach/regs-lcd.h>
37 37
38#include <mach/idle.h> 38#include <mach/idle.h>
39#include <mach/fb.h> 39#include <mach/fb.h>
40 40
41#include <asm/plat-s3c24xx/s3c2410.h> 41#include <plat/s3c2410.h>
42#include <asm/plat-s3c24xx/s3c2440.h> 42#include <plat/s3c2440.h>
43#include <asm/plat-s3c24xx/clock.h> 43#include <plat/clock.h>
44#include <asm/plat-s3c24xx/devs.h> 44#include <plat/devs.h>
45#include <asm/plat-s3c24xx/cpu.h> 45#include <plat/cpu.h>
46 46
47#include <asm/plat-s3c24xx/common-smdk.h> 47#include <plat/common-smdk.h>
48 48
49static struct map_desc smdk2440_iodesc[] __initdata = { 49static struct map_desc smdk2440_iodesc[] __initdata = {
50 /* ISA IO Space map (memory space selected by A24) */ 50 /* ISA IO Space map (memory space selected by A24) */
diff --git a/arch/arm/mach-s3c2440/s3c2440.c b/arch/arm/mach-s3c2440/s3c2440.c
index c81cdb330712..ac1f7ea5f405 100644
--- a/arch/arm/mach-s3c2440/s3c2440.c
+++ b/arch/arm/mach-s3c2440/s3c2440.c
@@ -29,9 +29,9 @@
29#include <mach/hardware.h> 29#include <mach/hardware.h>
30#include <asm/irq.h> 30#include <asm/irq.h>
31 31
32#include <asm/plat-s3c24xx/s3c2440.h> 32#include <plat/s3c2440.h>
33#include <asm/plat-s3c24xx/devs.h> 33#include <plat/devs.h>
34#include <asm/plat-s3c24xx/cpu.h> 34#include <plat/cpu.h>
35 35
36static struct sys_device s3c2440_sysdev = { 36static struct sys_device s3c2440_sysdev = {
37 .cls = &s3c2440_sysclass, 37 .cls = &s3c2440_sysclass,
diff --git a/arch/arm/mach-s3c2442/clock.c b/arch/arm/mach-s3c2442/clock.c
index 18f2ce4d7b23..ea1aa1f5157a 100644
--- a/arch/arm/mach-s3c2442/clock.c
+++ b/arch/arm/mach-s3c2442/clock.c
@@ -41,8 +41,8 @@
41 41
42#include <mach/regs-clock.h> 42#include <mach/regs-clock.h>
43 43
44#include <asm/plat-s3c24xx/clock.h> 44#include <plat/clock.h>
45#include <asm/plat-s3c24xx/cpu.h> 45#include <plat/cpu.h>
46 46
47/* S3C2442 extended clock support */ 47/* S3C2442 extended clock support */
48 48
diff --git a/arch/arm/mach-s3c2442/s3c2442.c b/arch/arm/mach-s3c2442/s3c2442.c
index fbf8264249da..4663bdc7fff6 100644
--- a/arch/arm/mach-s3c2442/s3c2442.c
+++ b/arch/arm/mach-s3c2442/s3c2442.c
@@ -19,8 +19,8 @@
19#include <linux/serial_core.h> 19#include <linux/serial_core.h>
20#include <linux/sysdev.h> 20#include <linux/sysdev.h>
21 21
22#include <asm/plat-s3c24xx/s3c2442.h> 22#include <plat/s3c2442.h>
23#include <asm/plat-s3c24xx/cpu.h> 23#include <plat/cpu.h>
24 24
25static struct sys_device s3c2442_sysdev = { 25static struct sys_device s3c2442_sysdev = {
26 .cls = &s3c2442_sysclass, 26 .cls = &s3c2442_sysclass,
diff --git a/arch/arm/mach-s3c2443/clock.c b/arch/arm/mach-s3c2443/clock.c
index 603b5ea1deab..2f60bf6b8d43 100644
--- a/arch/arm/mach-s3c2443/clock.c
+++ b/arch/arm/mach-s3c2443/clock.c
@@ -39,9 +39,9 @@
39 39
40#include <mach/regs-s3c2443-clock.h> 40#include <mach/regs-s3c2443-clock.h>
41 41
42#include <asm/plat-s3c24xx/s3c2443.h> 42#include <plat/s3c2443.h>
43#include <asm/plat-s3c24xx/clock.h> 43#include <plat/clock.h>
44#include <asm/plat-s3c24xx/cpu.h> 44#include <plat/cpu.h>
45 45
46/* We currently have to assume that the system is running 46/* We currently have to assume that the system is running
47 * from the XTPll input, and that all ***REFCLKs are being 47 * from the XTPll input, and that all ***REFCLKs are being
diff --git a/arch/arm/mach-s3c2443/dma.c b/arch/arm/mach-s3c2443/dma.c
index 5d9ee772659b..f73ccb25ff94 100644
--- a/arch/arm/mach-s3c2443/dma.c
+++ b/arch/arm/mach-s3c2443/dma.c
@@ -21,10 +21,10 @@
21#include <asm/dma.h> 21#include <asm/dma.h>
22#include <mach/dma.h> 22#include <mach/dma.h>
23 23
24#include <asm/plat-s3c24xx/dma.h> 24#include <plat/dma.h>
25#include <asm/plat-s3c24xx/cpu.h> 25#include <plat/cpu.h>
26 26
27#include <asm/plat-s3c/regs-serial.h> 27#include <plat/regs-serial.h>
28#include <mach/regs-gpio.h> 28#include <mach/regs-gpio.h>
29#include <asm/plat-s3c/regs-ac97.h> 29#include <asm/plat-s3c/regs-ac97.h>
30#include <mach/regs-mem.h> 30#include <mach/regs-mem.h>
diff --git a/arch/arm/mach-s3c2443/irq.c b/arch/arm/mach-s3c2443/irq.c
index e44341d7dfef..0e0d693f3974 100644
--- a/arch/arm/mach-s3c2443/irq.c
+++ b/arch/arm/mach-s3c2443/irq.c
@@ -34,9 +34,9 @@
34#include <mach/regs-irq.h> 34#include <mach/regs-irq.h>
35#include <mach/regs-gpio.h> 35#include <mach/regs-gpio.h>
36 36
37#include <asm/plat-s3c24xx/cpu.h> 37#include <plat/cpu.h>
38#include <asm/plat-s3c24xx/pm.h> 38#include <plat/pm.h>
39#include <asm/plat-s3c24xx/irq.h> 39#include <plat/irq.h>
40 40
41#define INTMSK(start, end) ((1 << ((end) + 1 - (start))) - 1) 41#define INTMSK(start, end) ((1 << ((end) + 1 - (start))) - 1)
42 42
diff --git a/arch/arm/mach-s3c2443/mach-smdk2443.c b/arch/arm/mach-s3c2443/mach-smdk2443.c
index f0d119dc0409..a7fe65f3dcc1 100644
--- a/arch/arm/mach-s3c2443/mach-smdk2443.c
+++ b/arch/arm/mach-s3c2443/mach-smdk2443.c
@@ -31,20 +31,20 @@
31#include <asm/irq.h> 31#include <asm/irq.h>
32#include <asm/mach-types.h> 32#include <asm/mach-types.h>
33 33
34#include <asm/plat-s3c/regs-serial.h> 34#include <plat/regs-serial.h>
35#include <mach/regs-gpio.h> 35#include <mach/regs-gpio.h>
36#include <mach/regs-lcd.h> 36#include <mach/regs-lcd.h>
37 37
38#include <mach/idle.h> 38#include <mach/idle.h>
39#include <mach/fb.h> 39#include <mach/fb.h>
40 40
41#include <asm/plat-s3c24xx/s3c2410.h> 41#include <plat/s3c2410.h>
42#include <asm/plat-s3c24xx/s3c2440.h> 42#include <plat/s3c2440.h>
43#include <asm/plat-s3c24xx/clock.h> 43#include <plat/clock.h>
44#include <asm/plat-s3c24xx/devs.h> 44#include <plat/devs.h>
45#include <asm/plat-s3c24xx/cpu.h> 45#include <plat/cpu.h>
46 46
47#include <asm/plat-s3c24xx/common-smdk.h> 47#include <plat/common-smdk.h>
48 48
49static struct map_desc smdk2443_iodesc[] __initdata = { 49static struct map_desc smdk2443_iodesc[] __initdata = {
50 /* ISA IO Space map (memory space selected by A24) */ 50 /* ISA IO Space map (memory space selected by A24) */
diff --git a/arch/arm/mach-s3c2443/s3c2443.c b/arch/arm/mach-s3c2443/s3c2443.c
index c973b68cc735..bbeddf9ddcb1 100644
--- a/arch/arm/mach-s3c2443/s3c2443.c
+++ b/arch/arm/mach-s3c2443/s3c2443.c
@@ -32,9 +32,9 @@
32#include <mach/regs-s3c2443-clock.h> 32#include <mach/regs-s3c2443-clock.h>
33#include <mach/reset.h> 33#include <mach/reset.h>
34 34
35#include <asm/plat-s3c24xx/s3c2443.h> 35#include <plat/s3c2443.h>
36#include <asm/plat-s3c24xx/devs.h> 36#include <plat/devs.h>
37#include <asm/plat-s3c24xx/cpu.h> 37#include <plat/cpu.h>
38 38
39static struct map_desc s3c2443_iodesc[] __initdata = { 39static struct map_desc s3c2443_iodesc[] __initdata = {
40 IODESC_ENT(WATCHDOG), 40 IODESC_ENT(WATCHDOG),
diff --git a/arch/arm/mach-sa1100/cpu-sa1100.c b/arch/arm/mach-sa1100/cpu-sa1100.c
index f7fa03478efd..244d5956312c 100644
--- a/arch/arm/mach-sa1100/cpu-sa1100.c
+++ b/arch/arm/mach-sa1100/cpu-sa1100.c
@@ -224,7 +224,6 @@ static int __init sa1100_cpu_init(struct cpufreq_policy *policy)
224 if (policy->cpu != 0) 224 if (policy->cpu != 0)
225 return -EINVAL; 225 return -EINVAL;
226 policy->cur = policy->min = policy->max = sa11x0_getspeed(0); 226 policy->cur = policy->min = policy->max = sa11x0_getspeed(0);
227 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
228 policy->cpuinfo.min_freq = 59000; 227 policy->cpuinfo.min_freq = 59000;
229 policy->cpuinfo.max_freq = 287000; 228 policy->cpuinfo.max_freq = 287000;
230 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; 229 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 330814d1ee25..d1193884d76d 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -428,7 +428,7 @@ config CPU_32v6K
428# ARMv7 428# ARMv7
429config CPU_V7 429config CPU_V7
430 bool "Support ARM V7 processor" 430 bool "Support ARM V7 processor"
431 depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB 431 depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB || ARCH_OMAP3
432 select CPU_32v6K 432 select CPU_32v6K
433 select CPU_32v7 433 select CPU_32v7
434 select CPU_ABRT_EV7 434 select CPU_ABRT_EV7
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index b917206ee906..a94f0c44ebc8 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -15,6 +15,9 @@ config ARCH_OMAP1
15config ARCH_OMAP2 15config ARCH_OMAP2
16 bool "TI OMAP2" 16 bool "TI OMAP2"
17 17
18config ARCH_OMAP3
19 bool "TI OMAP3"
20
18endchoice 21endchoice
19 22
20comment "OMAP Feature Selections" 23comment "OMAP Feature Selections"
@@ -29,6 +32,30 @@ config OMAP_DEBUG_LEDS
29 depends on OMAP_DEBUG_DEVICES 32 depends on OMAP_DEBUG_DEVICES
30 default y if LEDS || LEDS_OMAP_DEBUG 33 default y if LEDS || LEDS_OMAP_DEBUG
31 34
35config OMAP_DEBUG_POWERDOMAIN
36 bool "Emit debug messages from powerdomain layer"
37 depends on ARCH_OMAP2 || ARCH_OMAP3
38 default n
39 help
40 Say Y here if you want to compile in powerdomain layer
41 debugging messages for OMAP2/3. These messages can
42 provide more detail as to why some powerdomain calls
43 may be failing, and will also emit a descriptive message
44 for every powerdomain register write. However, the
45 extra detail costs some memory.
46
47config OMAP_DEBUG_CLOCKDOMAIN
48 bool "Emit debug messages from clockdomain layer"
49 depends on ARCH_OMAP2 || ARCH_OMAP3
50 default n
51 help
52 Say Y here if you want to compile in clockdomain layer
53 debugging messages for OMAP2/3. These messages can
54 provide more detail as to why some clockdomain calls
55 may be failing, and will also emit a descriptive message
56 for every clockdomain register write. However, the
57 extra detail costs some memory.
58
32config OMAP_RESET_CLOCKS 59config OMAP_RESET_CLOCKS
33 bool "Reset unused clocks during boot" 60 bool "Reset unused clocks during boot"
34 depends on ARCH_OMAP 61 depends on ARCH_OMAP
@@ -88,13 +115,13 @@ config OMAP_MPU_TIMER
88 115
89config OMAP_32K_TIMER 116config OMAP_32K_TIMER
90 bool "Use 32KHz timer" 117 bool "Use 32KHz timer"
91 depends on ARCH_OMAP16XX || ARCH_OMAP24XX 118 depends on ARCH_OMAP16XX || ARCH_OMAP24XX || ARCH_OMAP34XX
92 help 119 help
93 Select this option if you want to enable the OMAP 32KHz timer. 120 Select this option if you want to enable the OMAP 32KHz timer.
94 This timer saves power compared to the OMAP_MPU_TIMER, and has 121 This timer saves power compared to the OMAP_MPU_TIMER, and has
95 support for no tick during idle. The 32KHz timer provides less 122 support for no tick during idle. The 32KHz timer provides less
96 intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is 123 intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is
97 currently only available for OMAP16XX and 24XX. 124 currently only available for OMAP16XX, 24XX and 34XX.
98 125
99endchoice 126endchoice
100 127
@@ -109,7 +136,7 @@ config OMAP_32K_TIMER_HZ
109 136
110config OMAP_DM_TIMER 137config OMAP_DM_TIMER
111 bool "Use dual-mode timer" 138 bool "Use dual-mode timer"
112 depends on ARCH_OMAP16XX || ARCH_OMAP24XX 139 depends on ARCH_OMAP16XX || ARCH_OMAP24XX || ARCH_OMAP34XX
113 help 140 help
114 Select this option if you want to use OMAP Dual-Mode timers. 141 Select this option if you want to use OMAP Dual-Mode timers.
115 142
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index 2c4051cc79a1..deaff58878a2 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -4,7 +4,7 @@
4 4
5# Common support 5# Common support
6obj-y := common.o sram.o clock.o devices.o dma.o mux.o gpio.o \ 6obj-y := common.o sram.o clock.o devices.o dma.o mux.o gpio.o \
7 usb.o fb.o 7 usb.o fb.o io.o
8obj-m := 8obj-m :=
9obj-n := 9obj-n :=
10obj- := 10obj- :=
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index 8bdf0ead0cf3..0843b8882f93 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -248,6 +248,7 @@ static struct omap_globals *omap2_globals;
248 248
249static void __init __omap2_set_globals(void) 249static void __init __omap2_set_globals(void)
250{ 250{
251 omap2_set_globals_tap(omap2_globals);
251 omap2_set_globals_memory(omap2_globals); 252 omap2_set_globals_memory(omap2_globals);
252 omap2_set_globals_control(omap2_globals); 253 omap2_set_globals_control(omap2_globals);
253 omap2_set_globals_prcm(omap2_globals); 254 omap2_set_globals_prcm(omap2_globals);
@@ -258,12 +259,13 @@ static void __init __omap2_set_globals(void)
258#if defined(CONFIG_ARCH_OMAP2420) 259#if defined(CONFIG_ARCH_OMAP2420)
259 260
260static struct omap_globals omap242x_globals = { 261static struct omap_globals omap242x_globals = {
261 .tap = (__force void __iomem *)OMAP2_IO_ADDRESS(0x48014000), 262 .class = OMAP242X_CLASS,
262 .sdrc = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_SDRC_BASE), 263 .tap = OMAP2_IO_ADDRESS(0x48014000),
263 .sms = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_SMS_BASE), 264 .sdrc = OMAP2_IO_ADDRESS(OMAP2420_SDRC_BASE),
264 .ctrl = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_CTRL_BASE), 265 .sms = OMAP2_IO_ADDRESS(OMAP2420_SMS_BASE),
265 .prm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_PRM_BASE), 266 .ctrl = OMAP2_IO_ADDRESS(OMAP2420_CTRL_BASE),
266 .cm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_CM_BASE), 267 .prm = OMAP2_IO_ADDRESS(OMAP2420_PRM_BASE),
268 .cm = OMAP2_IO_ADDRESS(OMAP2420_CM_BASE),
267}; 269};
268 270
269void __init omap2_set_globals_242x(void) 271void __init omap2_set_globals_242x(void)
@@ -276,12 +278,13 @@ void __init omap2_set_globals_242x(void)
276#if defined(CONFIG_ARCH_OMAP2430) 278#if defined(CONFIG_ARCH_OMAP2430)
277 279
278static struct omap_globals omap243x_globals = { 280static struct omap_globals omap243x_globals = {
279 .tap = (__force void __iomem *)OMAP2_IO_ADDRESS(0x4900a000), 281 .class = OMAP243X_CLASS,
280 .sdrc = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_SDRC_BASE), 282 .tap = OMAP2_IO_ADDRESS(0x4900a000),
281 .sms = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_SMS_BASE), 283 .sdrc = OMAP2_IO_ADDRESS(OMAP243X_SDRC_BASE),
282 .ctrl = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE), 284 .sms = OMAP2_IO_ADDRESS(OMAP243X_SMS_BASE),
283 .prm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2430_PRM_BASE), 285 .ctrl = OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE),
284 .cm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2430_CM_BASE), 286 .prm = OMAP2_IO_ADDRESS(OMAP2430_PRM_BASE),
287 .cm = OMAP2_IO_ADDRESS(OMAP2430_CM_BASE),
285}; 288};
286 289
287void __init omap2_set_globals_243x(void) 290void __init omap2_set_globals_243x(void)
@@ -294,12 +297,13 @@ void __init omap2_set_globals_243x(void)
294#if defined(CONFIG_ARCH_OMAP3430) 297#if defined(CONFIG_ARCH_OMAP3430)
295 298
296static struct omap_globals omap343x_globals = { 299static struct omap_globals omap343x_globals = {
297 .tap = (__force void __iomem *)OMAP2_IO_ADDRESS(0x4830A000), 300 .class = OMAP343X_CLASS,
298 .sdrc = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_SDRC_BASE), 301 .tap = OMAP2_IO_ADDRESS(0x4830A000),
299 .sms = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_SMS_BASE), 302 .sdrc = OMAP2_IO_ADDRESS(OMAP343X_SDRC_BASE),
300 .ctrl = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE), 303 .sms = OMAP2_IO_ADDRESS(OMAP343X_SMS_BASE),
301 .prm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP3430_PRM_BASE), 304 .ctrl = OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE),
302 .cm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP3430_CM_BASE), 305 .prm = OMAP2_IO_ADDRESS(OMAP3430_PRM_BASE),
306 .cm = OMAP2_IO_ADDRESS(OMAP3430_CM_BASE),
303}; 307};
304 308
305void __init omap2_set_globals_343x(void) 309void __init omap2_set_globals_343x(void)
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index 97187fa0ae52..0cb2b22388e9 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -20,17 +20,17 @@
20#include <asm/mach/map.h> 20#include <asm/mach/map.h>
21 21
22#include <mach/tc.h> 22#include <mach/tc.h>
23#include <mach/control.h>
23#include <mach/board.h> 24#include <mach/board.h>
24#include <mach/mmc.h> 25#include <mach/mmc.h>
25#include <mach/mux.h> 26#include <mach/mux.h>
26#include <mach/gpio.h> 27#include <mach/gpio.h>
27#include <mach/menelaus.h> 28#include <mach/menelaus.h>
28#include <mach/mcbsp.h> 29#include <mach/mcbsp.h>
30#include <mach/dsp_common.h>
29 31
30#if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE) 32#if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE)
31 33
32#include "../plat-omap/dsp/dsp_common.h"
33
34static struct dsp_platform_data dsp_pdata = { 34static struct dsp_platform_data dsp_pdata = {
35 .kdev_list = LIST_HEAD_INIT(dsp_pdata.kdev_list), 35 .kdev_list = LIST_HEAD_INIT(dsp_pdata.kdev_list),
36}; 36};
@@ -76,7 +76,7 @@ int dsp_kfunc_device_register(struct dsp_kfunc_device *kdev)
76{ 76{
77 static DEFINE_MUTEX(dsp_pdata_lock); 77 static DEFINE_MUTEX(dsp_pdata_lock);
78 78
79 mutex_init(&kdev->lock); 79 spin_lock_init(&kdev->lock);
80 80
81 mutex_lock(&dsp_pdata_lock); 81 mutex_lock(&dsp_pdata_lock);
82 list_add_tail(&kdev->entry, &dsp_pdata.kdev_list); 82 list_add_tail(&kdev->entry, &dsp_pdata.kdev_list);
@@ -95,6 +95,10 @@ static inline void omap_init_dsp(void) { }
95 95
96static void omap_init_kp(void) 96static void omap_init_kp(void)
97{ 97{
98 /* 2430 and 34xx keypad is on TWL4030 */
99 if (cpu_is_omap2430() || cpu_is_omap34xx())
100 return;
101
98 if (machine_is_omap_h2() || machine_is_omap_h3()) { 102 if (machine_is_omap_h2() || machine_is_omap_h3()) {
99 omap_cfg_reg(F18_1610_KBC0); 103 omap_cfg_reg(F18_1610_KBC0);
100 omap_cfg_reg(D20_1610_KBC1); 104 omap_cfg_reg(D20_1610_KBC1);
@@ -156,13 +160,6 @@ void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
156{ 160{
157 int i; 161 int i;
158 162
159 if (size > OMAP_MAX_MCBSP_COUNT) {
160 printk(KERN_WARNING "Registered too many McBSPs platform_data."
161 " Using maximum (%d) available.\n",
162 OMAP_MAX_MCBSP_COUNT);
163 size = OMAP_MAX_MCBSP_COUNT;
164 }
165
166 omap_mcbsp_devices = kzalloc(size * sizeof(struct platform_device *), 163 omap_mcbsp_devices = kzalloc(size * sizeof(struct platform_device *),
167 GFP_KERNEL); 164 GFP_KERNEL);
168 if (!omap_mcbsp_devices) { 165 if (!omap_mcbsp_devices) {
@@ -530,10 +527,6 @@ static inline void omap_init_rng(void) {}
530 */ 527 */
531static int __init omap_init_devices(void) 528static int __init omap_init_devices(void)
532{ 529{
533/*
534 * Need to enable relevant once for 2430 SDP
535 */
536#ifndef CONFIG_MACH_OMAP_2430SDP
537 /* please keep these calls, and their implementations above, 530 /* please keep these calls, and their implementations above,
538 * in alphabetical order so they're easier to sort through. 531 * in alphabetical order so they're easier to sort through.
539 */ 532 */
@@ -543,7 +536,6 @@ static int __init omap_init_devices(void)
543 omap_init_uwire(); 536 omap_init_uwire();
544 omap_init_wdt(); 537 omap_init_wdt();
545 omap_init_rng(); 538 omap_init_rng();
546#endif
547 return 0; 539 return 0;
548} 540}
549arch_initcall(omap_init_devices); 541arch_initcall(omap_init_devices);
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index a63b644ad305..50f8b4ad9a09 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -1233,7 +1233,7 @@ int omap_request_dma_chain(int dev_id, const char *dev_name,
1233 /* request and reserve DMA channels for the chain */ 1233 /* request and reserve DMA channels for the chain */
1234 for (i = 0; i < no_of_chans; i++) { 1234 for (i = 0; i < no_of_chans; i++) {
1235 err = omap_request_dma(dev_id, dev_name, 1235 err = omap_request_dma(dev_id, dev_name,
1236 callback, 0, &channels[i]); 1236 callback, NULL, &channels[i]);
1237 if (err < 0) { 1237 if (err < 0) {
1238 int j; 1238 int j;
1239 for (j = 0; j < i; j++) 1239 for (j = 0; j < i; j++)
@@ -2297,13 +2297,13 @@ static int __init omap_init_dma(void)
2297 int ch, r; 2297 int ch, r;
2298 2298
2299 if (cpu_class_is_omap1()) { 2299 if (cpu_class_is_omap1()) {
2300 omap_dma_base = (void __iomem *)IO_ADDRESS(OMAP1_DMA_BASE); 2300 omap_dma_base = IO_ADDRESS(OMAP1_DMA_BASE);
2301 dma_lch_count = OMAP1_LOGICAL_DMA_CH_COUNT; 2301 dma_lch_count = OMAP1_LOGICAL_DMA_CH_COUNT;
2302 } else if (cpu_is_omap24xx()) { 2302 } else if (cpu_is_omap24xx()) {
2303 omap_dma_base = (void __iomem *)IO_ADDRESS(OMAP24XX_DMA4_BASE); 2303 omap_dma_base = IO_ADDRESS(OMAP24XX_DMA4_BASE);
2304 dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT; 2304 dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
2305 } else if (cpu_is_omap34xx()) { 2305 } else if (cpu_is_omap34xx()) {
2306 omap_dma_base = (void __iomem *)IO_ADDRESS(OMAP34XX_DMA4_BASE); 2306 omap_dma_base = IO_ADDRESS(OMAP34XX_DMA4_BASE);
2307 dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT; 2307 dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
2308 } else { 2308 } else {
2309 pr_err("DMA init failed for unsupported omap\n"); 2309 pr_err("DMA init failed for unsupported omap\n");
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 606fcffdcefc..963c31cd1541 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -693,7 +693,7 @@ int __init omap_dm_timer_init(void)
693 693
694 for (i = 0; i < dm_timer_count; i++) { 694 for (i = 0; i < dm_timer_count; i++) {
695 timer = &dm_timers[i]; 695 timer = &dm_timers[i];
696 timer->io_base = (void __iomem *)io_p2v(timer->phys_base); 696 timer->io_base = IO_ADDRESS(timer->phys_base);
697#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 697#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
698 if (cpu_class_is_omap2()) { 698 if (cpu_class_is_omap2()) {
699 char clk_name[16]; 699 char clk_name[16];
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 5935ae4e550b..8679fbca6bbe 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -28,7 +28,7 @@
28/* 28/*
29 * OMAP1510 GPIO registers 29 * OMAP1510 GPIO registers
30 */ 30 */
31#define OMAP1510_GPIO_BASE (void __iomem *)0xfffce000 31#define OMAP1510_GPIO_BASE IO_ADDRESS(0xfffce000)
32#define OMAP1510_GPIO_DATA_INPUT 0x00 32#define OMAP1510_GPIO_DATA_INPUT 0x00
33#define OMAP1510_GPIO_DATA_OUTPUT 0x04 33#define OMAP1510_GPIO_DATA_OUTPUT 0x04
34#define OMAP1510_GPIO_DIR_CONTROL 0x08 34#define OMAP1510_GPIO_DIR_CONTROL 0x08
@@ -42,10 +42,10 @@
42/* 42/*
43 * OMAP1610 specific GPIO registers 43 * OMAP1610 specific GPIO registers
44 */ 44 */
45#define OMAP1610_GPIO1_BASE (void __iomem *)0xfffbe400 45#define OMAP1610_GPIO1_BASE IO_ADDRESS(0xfffbe400)
46#define OMAP1610_GPIO2_BASE (void __iomem *)0xfffbec00 46#define OMAP1610_GPIO2_BASE IO_ADDRESS(0xfffbec00)
47#define OMAP1610_GPIO3_BASE (void __iomem *)0xfffbb400 47#define OMAP1610_GPIO3_BASE IO_ADDRESS(0xfffbb400)
48#define OMAP1610_GPIO4_BASE (void __iomem *)0xfffbbc00 48#define OMAP1610_GPIO4_BASE IO_ADDRESS(0xfffbbc00)
49#define OMAP1610_GPIO_REVISION 0x0000 49#define OMAP1610_GPIO_REVISION 0x0000
50#define OMAP1610_GPIO_SYSCONFIG 0x0010 50#define OMAP1610_GPIO_SYSCONFIG 0x0010
51#define OMAP1610_GPIO_SYSSTATUS 0x0014 51#define OMAP1610_GPIO_SYSSTATUS 0x0014
@@ -67,12 +67,12 @@
67/* 67/*
68 * OMAP730 specific GPIO registers 68 * OMAP730 specific GPIO registers
69 */ 69 */
70#define OMAP730_GPIO1_BASE (void __iomem *)0xfffbc000 70#define OMAP730_GPIO1_BASE IO_ADDRESS(0xfffbc000)
71#define OMAP730_GPIO2_BASE (void __iomem *)0xfffbc800 71#define OMAP730_GPIO2_BASE IO_ADDRESS(0xfffbc800)
72#define OMAP730_GPIO3_BASE (void __iomem *)0xfffbd000 72#define OMAP730_GPIO3_BASE IO_ADDRESS(0xfffbd000)
73#define OMAP730_GPIO4_BASE (void __iomem *)0xfffbd800 73#define OMAP730_GPIO4_BASE IO_ADDRESS(0xfffbd800)
74#define OMAP730_GPIO5_BASE (void __iomem *)0xfffbe000 74#define OMAP730_GPIO5_BASE IO_ADDRESS(0xfffbe000)
75#define OMAP730_GPIO6_BASE (void __iomem *)0xfffbe800 75#define OMAP730_GPIO6_BASE IO_ADDRESS(0xfffbe800)
76#define OMAP730_GPIO_DATA_INPUT 0x00 76#define OMAP730_GPIO_DATA_INPUT 0x00
77#define OMAP730_GPIO_DATA_OUTPUT 0x04 77#define OMAP730_GPIO_DATA_OUTPUT 0x04
78#define OMAP730_GPIO_DIR_CONTROL 0x08 78#define OMAP730_GPIO_DIR_CONTROL 0x08
@@ -83,16 +83,16 @@
83/* 83/*
84 * omap24xx specific GPIO registers 84 * omap24xx specific GPIO registers
85 */ 85 */
86#define OMAP242X_GPIO1_BASE (void __iomem *)0x48018000 86#define OMAP242X_GPIO1_BASE IO_ADDRESS(0x48018000)
87#define OMAP242X_GPIO2_BASE (void __iomem *)0x4801a000 87#define OMAP242X_GPIO2_BASE IO_ADDRESS(0x4801a000)
88#define OMAP242X_GPIO3_BASE (void __iomem *)0x4801c000 88#define OMAP242X_GPIO3_BASE IO_ADDRESS(0x4801c000)
89#define OMAP242X_GPIO4_BASE (void __iomem *)0x4801e000 89#define OMAP242X_GPIO4_BASE IO_ADDRESS(0x4801e000)
90 90
91#define OMAP243X_GPIO1_BASE (void __iomem *)0x4900C000 91#define OMAP243X_GPIO1_BASE IO_ADDRESS(0x4900C000)
92#define OMAP243X_GPIO2_BASE (void __iomem *)0x4900E000 92#define OMAP243X_GPIO2_BASE IO_ADDRESS(0x4900E000)
93#define OMAP243X_GPIO3_BASE (void __iomem *)0x49010000 93#define OMAP243X_GPIO3_BASE IO_ADDRESS(0x49010000)
94#define OMAP243X_GPIO4_BASE (void __iomem *)0x49012000 94#define OMAP243X_GPIO4_BASE IO_ADDRESS(0x49012000)
95#define OMAP243X_GPIO5_BASE (void __iomem *)0x480B6000 95#define OMAP243X_GPIO5_BASE IO_ADDRESS(0x480B6000)
96 96
97#define OMAP24XX_GPIO_REVISION 0x0000 97#define OMAP24XX_GPIO_REVISION 0x0000
98#define OMAP24XX_GPIO_SYSCONFIG 0x0010 98#define OMAP24XX_GPIO_SYSCONFIG 0x0010
@@ -122,13 +122,14 @@
122 * omap34xx specific GPIO registers 122 * omap34xx specific GPIO registers
123 */ 123 */
124 124
125#define OMAP34XX_GPIO1_BASE (void __iomem *)0x48310000 125#define OMAP34XX_GPIO1_BASE IO_ADDRESS(0x48310000)
126#define OMAP34XX_GPIO2_BASE (void __iomem *)0x49050000 126#define OMAP34XX_GPIO2_BASE IO_ADDRESS(0x49050000)
127#define OMAP34XX_GPIO3_BASE (void __iomem *)0x49052000 127#define OMAP34XX_GPIO3_BASE IO_ADDRESS(0x49052000)
128#define OMAP34XX_GPIO4_BASE (void __iomem *)0x49054000 128#define OMAP34XX_GPIO4_BASE IO_ADDRESS(0x49054000)
129#define OMAP34XX_GPIO5_BASE (void __iomem *)0x49056000 129#define OMAP34XX_GPIO5_BASE IO_ADDRESS(0x49056000)
130#define OMAP34XX_GPIO6_BASE (void __iomem *)0x49058000 130#define OMAP34XX_GPIO6_BASE IO_ADDRESS(0x49058000)
131 131
132#define OMAP_MPUIO_VBASE IO_ADDRESS(OMAP_MPUIO_BASE)
132 133
133struct gpio_bank { 134struct gpio_bank {
134 void __iomem *base; 135 void __iomem *base;
@@ -160,7 +161,7 @@ struct gpio_bank {
160 161
161#ifdef CONFIG_ARCH_OMAP16XX 162#ifdef CONFIG_ARCH_OMAP16XX
162static struct gpio_bank gpio_bank_1610[5] = { 163static struct gpio_bank gpio_bank_1610[5] = {
163 { OMAP_MPUIO_BASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO}, 164 { OMAP_MPUIO_VBASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO},
164 { OMAP1610_GPIO1_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1610 }, 165 { OMAP1610_GPIO1_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1610 },
165 { OMAP1610_GPIO2_BASE, INT_1610_GPIO_BANK2, IH_GPIO_BASE + 16, METHOD_GPIO_1610 }, 166 { OMAP1610_GPIO2_BASE, INT_1610_GPIO_BANK2, IH_GPIO_BASE + 16, METHOD_GPIO_1610 },
166 { OMAP1610_GPIO3_BASE, INT_1610_GPIO_BANK3, IH_GPIO_BASE + 32, METHOD_GPIO_1610 }, 167 { OMAP1610_GPIO3_BASE, INT_1610_GPIO_BANK3, IH_GPIO_BASE + 32, METHOD_GPIO_1610 },
@@ -170,14 +171,14 @@ static struct gpio_bank gpio_bank_1610[5] = {
170 171
171#ifdef CONFIG_ARCH_OMAP15XX 172#ifdef CONFIG_ARCH_OMAP15XX
172static struct gpio_bank gpio_bank_1510[2] = { 173static struct gpio_bank gpio_bank_1510[2] = {
173 { OMAP_MPUIO_BASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, 174 { OMAP_MPUIO_VBASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO },
174 { OMAP1510_GPIO_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1510 } 175 { OMAP1510_GPIO_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1510 }
175}; 176};
176#endif 177#endif
177 178
178#ifdef CONFIG_ARCH_OMAP730 179#ifdef CONFIG_ARCH_OMAP730
179static struct gpio_bank gpio_bank_730[7] = { 180static struct gpio_bank gpio_bank_730[7] = {
180 { OMAP_MPUIO_BASE, INT_730_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, 181 { OMAP_MPUIO_VBASE, INT_730_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO },
181 { OMAP730_GPIO1_BASE, INT_730_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_730 }, 182 { OMAP730_GPIO1_BASE, INT_730_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_730 },
182 { OMAP730_GPIO2_BASE, INT_730_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_730 }, 183 { OMAP730_GPIO2_BASE, INT_730_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_730 },
183 { OMAP730_GPIO3_BASE, INT_730_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_730 }, 184 { OMAP730_GPIO3_BASE, INT_730_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_730 },
@@ -1389,7 +1390,7 @@ static int __init _omap_gpio_init(void)
1389 1390
1390 gpio_bank_count = 5; 1391 gpio_bank_count = 5;
1391 gpio_bank = gpio_bank_1610; 1392 gpio_bank = gpio_bank_1610;
1392 rev = omap_readw(gpio_bank[1].base + OMAP1610_GPIO_REVISION); 1393 rev = __raw_readw(gpio_bank[1].base + OMAP1610_GPIO_REVISION);
1393 printk(KERN_INFO "OMAP GPIO hardware version %d.%d\n", 1394 printk(KERN_INFO "OMAP GPIO hardware version %d.%d\n",
1394 (rev >> 4) & 0x0f, rev & 0x0f); 1395 (rev >> 4) & 0x0f, rev & 0x0f);
1395 } 1396 }
@@ -1408,7 +1409,7 @@ static int __init _omap_gpio_init(void)
1408 1409
1409 gpio_bank_count = 4; 1410 gpio_bank_count = 4;
1410 gpio_bank = gpio_bank_242x; 1411 gpio_bank = gpio_bank_242x;
1411 rev = omap_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); 1412 rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION);
1412 printk(KERN_INFO "OMAP242x GPIO hardware version %d.%d\n", 1413 printk(KERN_INFO "OMAP242x GPIO hardware version %d.%d\n",
1413 (rev >> 4) & 0x0f, rev & 0x0f); 1414 (rev >> 4) & 0x0f, rev & 0x0f);
1414 } 1415 }
@@ -1417,7 +1418,7 @@ static int __init _omap_gpio_init(void)
1417 1418
1418 gpio_bank_count = 5; 1419 gpio_bank_count = 5;
1419 gpio_bank = gpio_bank_243x; 1420 gpio_bank = gpio_bank_243x;
1420 rev = omap_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); 1421 rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION);
1421 printk(KERN_INFO "OMAP243x GPIO hardware version %d.%d\n", 1422 printk(KERN_INFO "OMAP243x GPIO hardware version %d.%d\n",
1422 (rev >> 4) & 0x0f, rev & 0x0f); 1423 (rev >> 4) & 0x0f, rev & 0x0f);
1423 } 1424 }
@@ -1428,7 +1429,7 @@ static int __init _omap_gpio_init(void)
1428 1429
1429 gpio_bank_count = OMAP34XX_NR_GPIOS; 1430 gpio_bank_count = OMAP34XX_NR_GPIOS;
1430 gpio_bank = gpio_bank_34xx; 1431 gpio_bank = gpio_bank_34xx;
1431 rev = omap_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); 1432 rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION);
1432 printk(KERN_INFO "OMAP34xx GPIO hardware version %d.%d\n", 1433 printk(KERN_INFO "OMAP34xx GPIO hardware version %d.%d\n",
1433 (rev >> 4) & 0x0f, rev & 0x0f); 1434 (rev >> 4) & 0x0f, rev & 0x0f);
1434 } 1435 }
@@ -1437,10 +1438,9 @@ static int __init _omap_gpio_init(void)
1437 int j, gpio_count = 16; 1438 int j, gpio_count = 16;
1438 1439
1439 bank = &gpio_bank[i]; 1440 bank = &gpio_bank[i];
1440 bank->base = IO_ADDRESS(bank->base);
1441 spin_lock_init(&bank->lock); 1441 spin_lock_init(&bank->lock);
1442 if (bank_is_mpuio(bank)) 1442 if (bank_is_mpuio(bank))
1443 omap_writew(0xFFFF, OMAP_MPUIO_BASE + OMAP_MPUIO_GPIO_MASKIT); 1443 __raw_writew(0xffff, bank->base + OMAP_MPUIO_GPIO_MASKIT);
1444 if (cpu_is_omap15xx() && bank->method == METHOD_GPIO_1510) { 1444 if (cpu_is_omap15xx() && bank->method == METHOD_GPIO_1510) {
1445 __raw_writew(0xffff, bank->base + OMAP1510_GPIO_INT_MASK); 1445 __raw_writew(0xffff, bank->base + OMAP1510_GPIO_INT_MASK);
1446 __raw_writew(0x0000, bank->base + OMAP1510_GPIO_INT_STATUS); 1446 __raw_writew(0x0000, bank->base + OMAP1510_GPIO_INT_STATUS);
diff --git a/arch/arm/plat-omap/include/mach/board-2430sdp.h b/arch/arm/plat-omap/include/mach/board-2430sdp.h
index cf1dc0223949..10d449ea7ed0 100644
--- a/arch/arm/plat-omap/include/mach/board-2430sdp.h
+++ b/arch/arm/plat-omap/include/mach/board-2430sdp.h
@@ -30,10 +30,12 @@
30#define __ASM_ARCH_OMAP_2430SDP_H 30#define __ASM_ARCH_OMAP_2430SDP_H
31 31
32/* Placeholder for 2430SDP specific defines */ 32/* Placeholder for 2430SDP specific defines */
33#define OMAP24XX_ETHR_START 0x08000300 33#define OMAP24XX_ETHR_START 0x08000300
34#define OMAP24XX_ETHR_GPIO_IRQ 149 34#define OMAP24XX_ETHR_GPIO_IRQ 149
35#define SDP2430_CS0_BASE 0x04000000 35#define SDP2430_CS0_BASE 0x04000000
36 36
37#define TWL4030_IRQNUM INT_24XX_SYS_NIRQ 37/* Function prototypes */
38extern void sdp2430_flash_init(void);
39extern void sdp2430_usb_init(void);
38 40
39#endif /* __ASM_ARCH_OMAP_2430SDP_H */ 41#endif /* __ASM_ARCH_OMAP_2430SDP_H */
diff --git a/arch/arm/plat-omap/include/mach/board-apollon.h b/arch/arm/plat-omap/include/mach/board-apollon.h
index d6f2a8e963d5..731c858cf3fe 100644
--- a/arch/arm/plat-omap/include/mach/board-apollon.h
+++ b/arch/arm/plat-omap/include/mach/board-apollon.h
@@ -31,6 +31,12 @@
31 31
32extern void apollon_mmc_init(void); 32extern void apollon_mmc_init(void);
33 33
34static inline int apollon_plus(void)
35{
36 /* The apollon plus has IDCODE revision 5 */
37 return system_rev & 0xc0;
38}
39
34/* Placeholder for APOLLON specific defines */ 40/* Placeholder for APOLLON specific defines */
35#define APOLLON_ETHR_GPIO_IRQ 74 41#define APOLLON_ETHR_GPIO_IRQ 74
36 42
diff --git a/arch/arm/plat-omap/include/mach/board-h4.h b/arch/arm/plat-omap/include/mach/board-h4.h
index 1470cd3e519b..7c3fa0f0a65e 100644
--- a/arch/arm/plat-omap/include/mach/board-h4.h
+++ b/arch/arm/plat-omap/include/mach/board-h4.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * arch/arm/plat-omap/include/mach/board-h4.h 2 * arch/arm/plat-omap/include/mach/board-h4.h
3 * 3 *
4 * Hardware definitions for TI OMAP1610 H4 board. 4 * Hardware definitions for TI OMAP2420 H4 board.
5 * 5 *
6 * Initial creation by Dirk Behme <dirk.behme@de.bosch.com> 6 * Initial creation by Dirk Behme <dirk.behme@de.bosch.com>
7 * 7 *
@@ -29,6 +29,9 @@
29#ifndef __ASM_ARCH_OMAP_H4_H 29#ifndef __ASM_ARCH_OMAP_H4_H
30#define __ASM_ARCH_OMAP_H4_H 30#define __ASM_ARCH_OMAP_H4_H
31 31
32/* MMC Prototypes */
33extern void h4_mmc_init(void);
34
32/* Placeholder for H4 specific defines */ 35/* Placeholder for H4 specific defines */
33#define OMAP24XX_ETHR_GPIO_IRQ 92 36#define OMAP24XX_ETHR_GPIO_IRQ 92
34#endif /* __ASM_ARCH_OMAP_H4_H */ 37#endif /* __ASM_ARCH_OMAP_H4_H */
diff --git a/arch/arm/plat-omap/include/mach/board-ldp.h b/arch/arm/plat-omap/include/mach/board-ldp.h
new file mode 100644
index 000000000000..66e2746c04ca
--- /dev/null
+++ b/arch/arm/plat-omap/include/mach/board-ldp.h
@@ -0,0 +1,36 @@
1/*
2 * arch/arm/plat-omap/include/mach/board-ldp.h
3 *
4 * Hardware definitions for TI OMAP3 LDP.
5 *
6 * Copyright (C) 2008 Texas Instruments Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28
29#ifndef __ASM_ARCH_OMAP_LDP_H
30#define __ASM_ARCH_OMAP_LDP_H
31
32extern void twl4030_bci_battery_init(void);
33
34#define TWL4030_IRQNUM INT_34XX_SYS_NIRQ
35
36#endif /* __ASM_ARCH_OMAP_LDP_H */
diff --git a/arch/arm/plat-omap/include/mach/board-omap3beagle.h b/arch/arm/plat-omap/include/mach/board-omap3beagle.h
new file mode 100644
index 000000000000..3080d52d877a
--- /dev/null
+++ b/arch/arm/plat-omap/include/mach/board-omap3beagle.h
@@ -0,0 +1,33 @@
1/*
2 * arch/arm/plat-omap/include/mach/board-omap3beagle.h
3 *
4 * Hardware definitions for TI OMAP3 BEAGLE.
5 *
6 * Initial creation by Syed Mohammed Khasim <khasim@ti.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28
29#ifndef __ASM_ARCH_OMAP3_BEAGLE_H
30#define __ASM_ARCH_OMAP3_BEAGLE_H
31
32#endif /* __ASM_ARCH_OMAP3_BEAGLE_H */
33
diff --git a/arch/arm/plat-omap/include/mach/board-overo.h b/arch/arm/plat-omap/include/mach/board-overo.h
new file mode 100644
index 000000000000..7ecae66966d1
--- /dev/null
+++ b/arch/arm/plat-omap/include/mach/board-overo.h
@@ -0,0 +1,26 @@
1/*
2 * board-overo.h (Gumstix Overo)
3 *
4 * Initial code: Steve Sakoman <steve@sakoman.com>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * You should have received a copy of the GNU General Public License along
12 * with this program; if not, write to the Free Software Foundation, Inc.,
13 * 675 Mass Ave, Cambridge, MA 02139, USA.
14 */
15
16#ifndef __ASM_ARCH_OVERO_H
17#define __ASM_ARCH_OVERO_H
18
19#define OVERO_GPIO_BT_XGATE 15
20#define OVERO_GPIO_W2W_NRESET 16
21#define OVERO_GPIO_BT_NRESET 164
22#define OVERO_GPIO_USBH_CPEN 168
23#define OVERO_GPIO_USBH_NRESET 183
24
25#endif /* ____ASM_ARCH_OVERO_H */
26
diff --git a/arch/arm/plat-omap/include/mach/board.h b/arch/arm/plat-omap/include/mach/board.h
index 54445642f35d..c23c12ccb353 100644
--- a/arch/arm/plat-omap/include/mach/board.h
+++ b/arch/arm/plat-omap/include/mach/board.h
@@ -45,6 +45,8 @@ struct omap_mmc_conf {
45 unsigned cover:1; 45 unsigned cover:1;
46 /* 4 wire signaling is optional, and is only used for SD/SDIO */ 46 /* 4 wire signaling is optional, and is only used for SD/SDIO */
47 unsigned wire4:1; 47 unsigned wire4:1;
48 /* use the internal clock */
49 unsigned internal_clock:1;
48 s16 power_pin; 50 s16 power_pin;
49 s16 switch_pin; 51 s16 switch_pin;
50 s16 wp_pin; 52 s16 wp_pin;
diff --git a/arch/arm/plat-omap/include/mach/clock.h b/arch/arm/plat-omap/include/mach/clock.h
index 92f7c7238fcd..719298554ed7 100644
--- a/arch/arm/plat-omap/include/mach/clock.h
+++ b/arch/arm/plat-omap/include/mach/clock.h
@@ -15,6 +15,7 @@
15 15
16struct module; 16struct module;
17struct clk; 17struct clk;
18struct clockdomain;
18 19
19#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 20#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
20 21
@@ -79,6 +80,8 @@ struct clk {
79 u32 clksel_mask; 80 u32 clksel_mask;
80 const struct clksel *clksel; 81 const struct clksel *clksel;
81 struct dpll_data *dpll_data; 82 struct dpll_data *dpll_data;
83 const char *clkdm_name;
84 struct clockdomain *clkdm;
82#else 85#else
83 __u8 rate_offset; 86 __u8 rate_offset;
84 __u8 src_offset; 87 __u8 src_offset;
diff --git a/arch/arm/plat-omap/include/mach/clockdomain.h b/arch/arm/plat-omap/include/mach/clockdomain.h
new file mode 100644
index 000000000000..1f51f0173784
--- /dev/null
+++ b/arch/arm/plat-omap/include/mach/clockdomain.h
@@ -0,0 +1,106 @@
1/*
2 * linux/include/asm-arm/arch-omap/clockdomain.h
3 *
4 * OMAP2/3 clockdomain framework functions
5 *
6 * Copyright (C) 2008 Texas Instruments, Inc.
7 * Copyright (C) 2008 Nokia Corporation
8 *
9 * Written by Paul Walmsley
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#ifndef __ASM_ARM_ARCH_OMAP_CLOCKDOMAIN_H
17#define __ASM_ARM_ARCH_OMAP_CLOCKDOMAIN_H
18
19#include <mach/powerdomain.h>
20#include <mach/clock.h>
21#include <mach/cpu.h>
22
23/* Clockdomain capability flags */
24#define CLKDM_CAN_FORCE_SLEEP (1 << 0)
25#define CLKDM_CAN_FORCE_WAKEUP (1 << 1)
26#define CLKDM_CAN_ENABLE_AUTO (1 << 2)
27#define CLKDM_CAN_DISABLE_AUTO (1 << 3)
28
29#define CLKDM_CAN_HWSUP (CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_DISABLE_AUTO)
30#define CLKDM_CAN_SWSUP (CLKDM_CAN_FORCE_SLEEP | CLKDM_CAN_FORCE_WAKEUP)
31#define CLKDM_CAN_HWSUP_SWSUP (CLKDM_CAN_SWSUP | CLKDM_CAN_HWSUP)
32
33/* OMAP24XX CM_CLKSTCTRL_*.AUTOSTATE_* register bit values */
34#define OMAP24XX_CLKSTCTRL_DISABLE_AUTO 0x0
35#define OMAP24XX_CLKSTCTRL_ENABLE_AUTO 0x1
36
37/* OMAP3XXX CM_CLKSTCTRL_*.CLKTRCTRL_* register bit values */
38#define OMAP34XX_CLKSTCTRL_DISABLE_AUTO 0x0
39#define OMAP34XX_CLKSTCTRL_FORCE_SLEEP 0x1
40#define OMAP34XX_CLKSTCTRL_FORCE_WAKEUP 0x2
41#define OMAP34XX_CLKSTCTRL_ENABLE_AUTO 0x3
42
43/*
44 * struct clkdm_pwrdm_autodep - a powerdomain that should have wkdeps
45 * and sleepdeps added when a powerdomain should stay active in hwsup mode;
46 * and conversely, removed when the powerdomain should be allowed to go
47 * inactive in hwsup mode.
48 */
49struct clkdm_pwrdm_autodep {
50
51 /* Name of the powerdomain to add a wkdep/sleepdep on */
52 const char *pwrdm_name;
53
54 /* Powerdomain pointer (looked up at clkdm_init() time) */
55 struct powerdomain *pwrdm;
56
57 /* OMAP chip types that this clockdomain dep is valid on */
58 const struct omap_chip_id omap_chip;
59
60};
61
62struct clockdomain {
63
64 /* Clockdomain name */
65 const char *name;
66
67 /* Powerdomain enclosing this clockdomain */
68 const char *pwrdm_name;
69
70 /* CLKTRCTRL/AUTOSTATE field mask in CM_CLKSTCTRL reg */
71 const u16 clktrctrl_mask;
72
73 /* Clockdomain capability flags */
74 const u8 flags;
75
76 /* OMAP chip types that this clockdomain is valid on */
77 const struct omap_chip_id omap_chip;
78
79 /* Usecount tracking */
80 atomic_t usecount;
81
82 /* Powerdomain pointer assigned at clkdm_register() */
83 struct powerdomain *pwrdm;
84
85 struct list_head node;
86
87};
88
89void clkdm_init(struct clockdomain **clkdms, struct clkdm_pwrdm_autodep *autodeps);
90int clkdm_register(struct clockdomain *clkdm);
91int clkdm_unregister(struct clockdomain *clkdm);
92struct clockdomain *clkdm_lookup(const char *name);
93
94int clkdm_for_each(int (*fn)(struct clockdomain *clkdm));
95struct powerdomain *clkdm_get_pwrdm(struct clockdomain *clkdm);
96
97void omap2_clkdm_allow_idle(struct clockdomain *clkdm);
98void omap2_clkdm_deny_idle(struct clockdomain *clkdm);
99
100int omap2_clkdm_wakeup(struct clockdomain *clkdm);
101int omap2_clkdm_sleep(struct clockdomain *clkdm);
102
103int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk);
104int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk);
105
106#endif
diff --git a/arch/arm/plat-omap/include/mach/common.h b/arch/arm/plat-omap/include/mach/common.h
index 06093112b665..ef70e2b0f054 100644
--- a/arch/arm/plat-omap/include/mach/common.h
+++ b/arch/arm/plat-omap/include/mach/common.h
@@ -34,6 +34,7 @@ struct sys_timer;
34extern void omap_map_common_io(void); 34extern void omap_map_common_io(void);
35extern struct sys_timer omap_timer; 35extern struct sys_timer omap_timer;
36extern void omap_serial_init(void); 36extern void omap_serial_init(void);
37extern void omap_serial_enable_clocks(int enable);
37#ifdef CONFIG_I2C_OMAP 38#ifdef CONFIG_I2C_OMAP
38extern int omap_register_i2c_bus(int bus_id, u32 clkrate, 39extern int omap_register_i2c_bus(int bus_id, u32 clkrate,
39 struct i2c_board_info const *info, 40 struct i2c_board_info const *info,
@@ -49,6 +50,7 @@ static inline int omap_register_i2c_bus(int bus_id, u32 clkrate,
49 50
50/* IO bases for various OMAP processors */ 51/* IO bases for various OMAP processors */
51struct omap_globals { 52struct omap_globals {
53 u32 class; /* OMAP class to detect */
52 void __iomem *tap; /* Control module ID code */ 54 void __iomem *tap; /* Control module ID code */
53 void __iomem *sdrc; /* SDRAM Controller */ 55 void __iomem *sdrc; /* SDRAM Controller */
54 void __iomem *sms; /* SDRAM Memory Scheduler */ 56 void __iomem *sms; /* SDRAM Memory Scheduler */
@@ -62,6 +64,7 @@ void omap2_set_globals_243x(void);
62void omap2_set_globals_343x(void); 64void omap2_set_globals_343x(void);
63 65
64/* These get called from omap2_set_globals_xxxx(), do not call these */ 66/* These get called from omap2_set_globals_xxxx(), do not call these */
67void omap2_set_globals_tap(struct omap_globals *);
65void omap2_set_globals_memory(struct omap_globals *); 68void omap2_set_globals_memory(struct omap_globals *);
66void omap2_set_globals_control(struct omap_globals *); 69void omap2_set_globals_control(struct omap_globals *);
67void omap2_set_globals_prcm(struct omap_globals *); 70void omap2_set_globals_prcm(struct omap_globals *);
diff --git a/arch/arm/plat-omap/include/mach/control.h b/arch/arm/plat-omap/include/mach/control.h
index e3fd62d9a995..dc9886760577 100644
--- a/arch/arm/plat-omap/include/mach/control.h
+++ b/arch/arm/plat-omap/include/mach/control.h
@@ -1,13 +1,10 @@
1#ifndef __ASM_ARCH_CONTROL_H
2#define __ASM_ARCH_CONTROL_H
3
4/* 1/*
5 * arch/arm/plat-omap/include/mach/control.h 2 * arch/arm/plat-omap/include/mach/control.h
6 * 3 *
7 * OMAP2/3 System Control Module definitions 4 * OMAP2/3 System Control Module definitions
8 * 5 *
9 * Copyright (C) 2007 Texas Instruments, Inc. 6 * Copyright (C) 2007-2008 Texas Instruments, Inc.
10 * Copyright (C) 2007 Nokia Corporation 7 * Copyright (C) 2007-2008 Nokia Corporation
11 * 8 *
12 * Written by Paul Walmsley 9 * Written by Paul Walmsley
13 * 10 *
@@ -16,14 +13,23 @@
16 * the Free Software Foundation. 13 * the Free Software Foundation.
17 */ 14 */
18 15
16#ifndef __ASM_ARCH_CONTROL_H
17#define __ASM_ARCH_CONTROL_H
18
19#include <mach/io.h> 19#include <mach/io.h>
20 20
21#ifndef __ASSEMBLY__
21#define OMAP242X_CTRL_REGADDR(reg) \ 22#define OMAP242X_CTRL_REGADDR(reg) \
22 (void __iomem *)IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) 23 IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
23#define OMAP243X_CTRL_REGADDR(reg) \ 24#define OMAP243X_CTRL_REGADDR(reg) \
24 (void __iomem *)IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) 25 IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
25#define OMAP343X_CTRL_REGADDR(reg) \ 26#define OMAP343X_CTRL_REGADDR(reg) \
26 (void __iomem *)IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) 27 IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
28#else
29#define OMAP242X_CTRL_REGADDR(reg) IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
30#define OMAP243X_CTRL_REGADDR(reg) IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
31#define OMAP343X_CTRL_REGADDR(reg) IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
32#endif /* __ASSEMBLY__ */
27 33
28/* 34/*
29 * As elsewhere, the "OMAP2_" prefix indicates that the macro is valid for 35 * As elsewhere, the "OMAP2_" prefix indicates that the macro is valid for
@@ -134,6 +140,7 @@
134#define OMAP343X_CONTROL_TEST_KEY_13 (OMAP2_CONTROL_GENERAL + 0x00fc) 140#define OMAP343X_CONTROL_TEST_KEY_13 (OMAP2_CONTROL_GENERAL + 0x00fc)
135#define OMAP343X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) 141#define OMAP343X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190)
136#define OMAP343X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) 142#define OMAP343X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194)
143#define OMAP343X_CONTROL_TEMP_SENSOR (OMAP2_CONTROL_GENERAL + 0x02b4)
137 144
138/* 145/*
139 * REVISIT: This list of registers is not comprehensive - there are more 146 * REVISIT: This list of registers is not comprehensive - there are more
diff --git a/arch/arm/plat-omap/include/mach/cpu.h b/arch/arm/plat-omap/include/mach/cpu.h
index 05aee0eda34f..e0464187209d 100644
--- a/arch/arm/plat-omap/include/mach/cpu.h
+++ b/arch/arm/plat-omap/include/mach/cpu.h
@@ -346,9 +346,14 @@ IS_OMAP_TYPE(3430, 0x3430)
346 get_sil_revision(system_rev) 346 get_sil_revision(system_rev)
347 347
348/* Various silicon macros defined here */ 348/* Various silicon macros defined here */
349#define OMAP242X_CLASS 0x24200000
349#define OMAP2420_REV_ES1_0 0x24200000 350#define OMAP2420_REV_ES1_0 0x24200000
350#define OMAP2420_REV_ES2_0 0x24201000 351#define OMAP2420_REV_ES2_0 0x24201000
352
353#define OMAP243X_CLASS 0x24300000
351#define OMAP2430_REV_ES1_0 0x24300000 354#define OMAP2430_REV_ES1_0 0x24300000
355
356#define OMAP343X_CLASS 0x34300000
352#define OMAP3430_REV_ES1_0 0x34300000 357#define OMAP3430_REV_ES1_0 0x34300000
353#define OMAP3430_REV_ES2_0 0x34301000 358#define OMAP3430_REV_ES2_0 0x34301000
354#define OMAP3430_REV_ES2_1 0x34302000 359#define OMAP3430_REV_ES2_1 0x34302000
diff --git a/arch/arm/plat-omap/include/mach/debug-macro.S b/arch/arm/plat-omap/include/mach/debug-macro.S
index 1b0039bdeb4e..1b11f5c6a2d9 100644
--- a/arch/arm/plat-omap/include/mach/debug-macro.S
+++ b/arch/arm/plat-omap/include/mach/debug-macro.S
@@ -35,6 +35,18 @@
35#ifdef CONFIG_OMAP_LL_DEBUG_UART3 35#ifdef CONFIG_OMAP_LL_DEBUG_UART3
36 add \rx, \rx, #0x00004000 @ UART 3 36 add \rx, \rx, #0x00004000 @ UART 3
37#endif 37#endif
38
39#elif CONFIG_ARCH_OMAP3
40 moveq \rx, #0x48000000 @ physical base address
41 movne \rx, #0xd8000000 @ virtual base
42 orr \rx, \rx, #0x0006a000
43#ifdef CONFIG_OMAP_LL_DEBUG_UART2
44 add \rx, \rx, #0x00002000 @ UART 2
45#endif
46#ifdef CONFIG_OMAP_LL_DEBUG_UART3
47 add \rx, \rx, #0x00fb0000 @ UART 3
48 add \rx, \rx, #0x00006000
49#endif
38#endif 50#endif
39 .endm 51 .endm
40 52
diff --git a/arch/arm/plat-omap/include/mach/entry-macro.S b/arch/arm/plat-omap/include/mach/entry-macro.S
index d4e9043bf201..030118ee204a 100644
--- a/arch/arm/plat-omap/include/mach/entry-macro.S
+++ b/arch/arm/plat-omap/include/mach/entry-macro.S
@@ -55,9 +55,17 @@
551510: 551510:
56 .endm 56 .endm
57 57
58#elif defined(CONFIG_ARCH_OMAP24XX) 58#endif
59#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
59 60
61#if defined(CONFIG_ARCH_OMAP24XX)
60#include <mach/omap24xx.h> 62#include <mach/omap24xx.h>
63#endif
64#if defined(CONFIG_ARCH_OMAP34XX)
65#include <mach/omap34xx.h>
66#endif
67
68#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt number */
61 69
62 .macro disable_fiq 70 .macro disable_fiq
63 .endm 71 .endm
@@ -79,7 +87,7 @@
79 ldr \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */ 87 ldr \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */
80 cmp \irqnr, #0x0 88 cmp \irqnr, #0x0
812222: 892222:
82 ldrne \irqnr, [\base, #IRQ_SIR_IRQ] 90 ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET]
83 91
84 .endm 92 .endm
85 93
diff --git a/arch/arm/plat-omap/include/mach/fpga.h b/arch/arm/plat-omap/include/mach/fpga.h
index c92e4b42b289..f1864a652f7a 100644
--- a/arch/arm/plat-omap/include/mach/fpga.h
+++ b/arch/arm/plat-omap/include/mach/fpga.h
@@ -34,9 +34,9 @@ extern void omap1510_fpga_init_irq(void);
34 * --------------------------------------------------------------------------- 34 * ---------------------------------------------------------------------------
35 */ 35 */
36/* maps in the FPGA registers and the ETHR registers */ 36/* maps in the FPGA registers and the ETHR registers */
37#define H2P2_DBG_FPGA_BASE 0xE8000000 /* VA */ 37#define H2P2_DBG_FPGA_BASE IOMEM(0xE8000000) /* VA */
38#define H2P2_DBG_FPGA_SIZE SZ_4K /* SIZE */ 38#define H2P2_DBG_FPGA_SIZE SZ_4K /* SIZE */
39#define H2P2_DBG_FPGA_START 0x04000000 /* PA */ 39#define H2P2_DBG_FPGA_START 0x04000000 /* PA */
40 40
41#define H2P2_DBG_FPGA_ETHR_START (H2P2_DBG_FPGA_START + 0x300) 41#define H2P2_DBG_FPGA_ETHR_START (H2P2_DBG_FPGA_START + 0x300)
42#define H2P2_DBG_FPGA_FPGA_REV (H2P2_DBG_FPGA_BASE + 0x10) /* FPGA Revision */ 42#define H2P2_DBG_FPGA_FPGA_REV (H2P2_DBG_FPGA_BASE + 0x10) /* FPGA Revision */
@@ -85,9 +85,9 @@ struct h2p2_dbg_fpga {
85 * OMAP-1510 FPGA 85 * OMAP-1510 FPGA
86 * --------------------------------------------------------------------------- 86 * ---------------------------------------------------------------------------
87 */ 87 */
88#define OMAP1510_FPGA_BASE 0xE8000000 /* Virtual */ 88#define OMAP1510_FPGA_BASE IOMEM(0xE8000000) /* VA */
89#define OMAP1510_FPGA_SIZE SZ_4K 89#define OMAP1510_FPGA_SIZE SZ_4K
90#define OMAP1510_FPGA_START 0x08000000 /* Physical */ 90#define OMAP1510_FPGA_START 0x08000000 /* PA */
91 91
92/* Revision */ 92/* Revision */
93#define OMAP1510_FPGA_REV_LOW (OMAP1510_FPGA_BASE + 0x0) 93#define OMAP1510_FPGA_REV_LOW (OMAP1510_FPGA_BASE + 0x0)
diff --git a/arch/arm/plat-omap/include/mach/gpio.h b/arch/arm/plat-omap/include/mach/gpio.h
index 8c71e288860f..98e9008b7e9d 100644
--- a/arch/arm/plat-omap/include/mach/gpio.h
+++ b/arch/arm/plat-omap/include/mach/gpio.h
@@ -29,7 +29,7 @@
29#include <linux/io.h> 29#include <linux/io.h>
30#include <mach/irqs.h> 30#include <mach/irqs.h>
31 31
32#define OMAP_MPUIO_BASE (void __iomem *)0xfffb5000 32#define OMAP_MPUIO_BASE 0xfffb5000
33 33
34#ifdef CONFIG_ARCH_OMAP730 34#ifdef CONFIG_ARCH_OMAP730
35#define OMAP_MPUIO_INPUT_LATCH 0x00 35#define OMAP_MPUIO_INPUT_LATCH 0x00
@@ -76,6 +76,8 @@ extern void omap_free_gpio(int gpio);
76extern void omap_set_gpio_direction(int gpio, int is_input); 76extern void omap_set_gpio_direction(int gpio, int is_input);
77extern void omap_set_gpio_dataout(int gpio, int enable); 77extern void omap_set_gpio_dataout(int gpio, int enable);
78extern int omap_get_gpio_datain(int gpio); 78extern int omap_get_gpio_datain(int gpio);
79extern void omap2_gpio_prepare_for_retention(void);
80extern void omap2_gpio_resume_after_retention(void);
79extern void omap_set_gpio_debounce(int gpio, int enable); 81extern void omap_set_gpio_debounce(int gpio, int enable);
80extern void omap_set_gpio_debounce_time(int gpio, int enable); 82extern void omap_set_gpio_debounce_time(int gpio, int enable);
81 83
diff --git a/arch/arm/plat-omap/include/mach/gpmc.h b/arch/arm/plat-omap/include/mach/gpmc.h
index 6a8e07ffc2d0..45b678439bb7 100644
--- a/arch/arm/plat-omap/include/mach/gpmc.h
+++ b/arch/arm/plat-omap/include/mach/gpmc.h
@@ -11,6 +11,9 @@
11#ifndef __OMAP2_GPMC_H 11#ifndef __OMAP2_GPMC_H
12#define __OMAP2_GPMC_H 12#define __OMAP2_GPMC_H
13 13
14/* Maximum Number of Chip Selects */
15#define GPMC_CS_NUM 8
16
14#define GPMC_CS_CONFIG1 0x00 17#define GPMC_CS_CONFIG1 0x00
15#define GPMC_CS_CONFIG2 0x04 18#define GPMC_CS_CONFIG2 0x04
16#define GPMC_CS_CONFIG3 0x08 19#define GPMC_CS_CONFIG3 0x08
@@ -22,6 +25,9 @@
22#define GPMC_CS_NAND_ADDRESS 0x20 25#define GPMC_CS_NAND_ADDRESS 0x20
23#define GPMC_CS_NAND_DATA 0x24 26#define GPMC_CS_NAND_DATA 0x24
24 27
28#define GPMC_CONFIG 0x50
29#define GPMC_STATUS 0x54
30
25#define GPMC_CONFIG1_WRAPBURST_SUPP (1 << 31) 31#define GPMC_CONFIG1_WRAPBURST_SUPP (1 << 31)
26#define GPMC_CONFIG1_READMULTIPLE_SUPP (1 << 30) 32#define GPMC_CONFIG1_READMULTIPLE_SUPP (1 << 30)
27#define GPMC_CONFIG1_READTYPE_ASYNC (0 << 29) 33#define GPMC_CONFIG1_READTYPE_ASYNC (0 << 29)
@@ -78,9 +84,14 @@ struct gpmc_timings {
78 u16 access; /* Start-cycle to first data valid delay */ 84 u16 access; /* Start-cycle to first data valid delay */
79 u16 rd_cycle; /* Total read cycle time */ 85 u16 rd_cycle; /* Total read cycle time */
80 u16 wr_cycle; /* Total write cycle time */ 86 u16 wr_cycle; /* Total write cycle time */
87
88 /* The following are only on OMAP3430 */
89 u16 wr_access; /* WRACCESSTIME */
90 u16 wr_data_mux_bus; /* WRDATAONADMUXBUS */
81}; 91};
82 92
83extern unsigned int gpmc_ns_to_ticks(unsigned int time_ns); 93extern unsigned int gpmc_ns_to_ticks(unsigned int time_ns);
94extern unsigned int gpmc_ticks_to_ns(unsigned int ticks);
84extern unsigned int gpmc_round_ns_to_ticks(unsigned int time_ns); 95extern unsigned int gpmc_round_ns_to_ticks(unsigned int time_ns);
85extern unsigned long gpmc_get_fclk_period(void); 96extern unsigned long gpmc_get_fclk_period(void);
86 97
@@ -92,5 +103,6 @@ extern int gpmc_cs_request(int cs, unsigned long size, unsigned long *base);
92extern void gpmc_cs_free(int cs); 103extern void gpmc_cs_free(int cs);
93extern int gpmc_cs_set_reserved(int cs, int reserved); 104extern int gpmc_cs_set_reserved(int cs, int reserved);
94extern int gpmc_cs_reserved(int cs); 105extern int gpmc_cs_reserved(int cs);
106extern void gpmc_init(void);
95 107
96#endif 108#endif
diff --git a/arch/arm/plat-omap/include/mach/hardware.h b/arch/arm/plat-omap/include/mach/hardware.h
index 07f5d7f21528..6589ddbb63b2 100644
--- a/arch/arm/plat-omap/include/mach/hardware.h
+++ b/arch/arm/plat-omap/include/mach/hardware.h
@@ -89,7 +89,7 @@
89#define DPLL_CTL (0xfffecf00) 89#define DPLL_CTL (0xfffecf00)
90 90
91/* DSP clock control. Must use __raw_readw() and __raw_writew() with these */ 91/* DSP clock control. Must use __raw_readw() and __raw_writew() with these */
92#define DSP_CONFIG_REG_BASE (0xe1008000) 92#define DSP_CONFIG_REG_BASE IOMEM(0xe1008000)
93#define DSP_CKCTL (DSP_CONFIG_REG_BASE + 0x0) 93#define DSP_CKCTL (DSP_CONFIG_REG_BASE + 0x0)
94#define DSP_IDLECT1 (DSP_CONFIG_REG_BASE + 0x4) 94#define DSP_IDLECT1 (DSP_CONFIG_REG_BASE + 0x4)
95#define DSP_IDLECT2 (DSP_CONFIG_REG_BASE + 0x8) 95#define DSP_IDLECT2 (DSP_CONFIG_REG_BASE + 0x8)
@@ -282,8 +282,8 @@
282 282
283#include "omap730.h" 283#include "omap730.h"
284#include "omap1510.h" 284#include "omap1510.h"
285#include "omap24xx.h"
286#include "omap16xx.h" 285#include "omap16xx.h"
286#include "omap24xx.h"
287#include "omap34xx.h" 287#include "omap34xx.h"
288 288
289#ifndef __ASSEMBLER__ 289#ifndef __ASSEMBLER__
@@ -322,6 +322,14 @@
322#include "board-2430sdp.h" 322#include "board-2430sdp.h"
323#endif 323#endif
324 324
325#ifdef CONFIG_MACH_OMAP3_BEAGLE
326#include "board-omap3beagle.h"
327#endif
328
329#ifdef CONFIG_MACH_OMAP_LDP
330#include "board-ldp.h"
331#endif
332
325#ifdef CONFIG_MACH_OMAP_APOLLON 333#ifdef CONFIG_MACH_OMAP_APOLLON
326#include "board-apollon.h" 334#include "board-apollon.h"
327#endif 335#endif
diff --git a/arch/arm/plat-omap/include/mach/io.h b/arch/arm/plat-omap/include/mach/io.h
index 2a30b7d88cde..adc83b7b8205 100644
--- a/arch/arm/plat-omap/include/mach/io.h
+++ b/arch/arm/plat-omap/include/mach/io.h
@@ -55,14 +55,13 @@
55 55
56#if defined(CONFIG_ARCH_OMAP1) 56#if defined(CONFIG_ARCH_OMAP1)
57 57
58#define IO_PHYS 0xFFFB0000 58#define IO_PHYS 0xFFFB0000
59#define IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */ 59#define IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */
60#define IO_SIZE 0x40000 60#define IO_SIZE 0x40000
61#define IO_VIRT (IO_PHYS - IO_OFFSET) 61#define IO_VIRT (IO_PHYS - IO_OFFSET)
62#define IO_ADDRESS(pa) ((pa) - IO_OFFSET) 62#define __IO_ADDRESS(pa) ((pa) - IO_OFFSET)
63#define OMAP1_IO_ADDRESS(pa) ((pa) - IO_OFFSET) 63#define __OMAP1_IO_ADDRESS(pa) ((pa) - IO_OFFSET)
64#define io_p2v(pa) ((pa) - IO_OFFSET) 64#define io_v2p(va) ((va) + IO_OFFSET)
65#define io_v2p(va) ((va) + IO_OFFSET)
66 65
67#elif defined(CONFIG_ARCH_OMAP2) 66#elif defined(CONFIG_ARCH_OMAP2)
68 67
@@ -74,7 +73,6 @@
74#define L4_24XX_VIRT 0xd8000000 73#define L4_24XX_VIRT 0xd8000000
75#define L4_24XX_SIZE SZ_1M /* 1MB of 128MB used, want 1MB sect */ 74#define L4_24XX_SIZE SZ_1M /* 1MB of 128MB used, want 1MB sect */
76 75
77#ifdef CONFIG_ARCH_OMAP2430
78#define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 */ 76#define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 */
79#define L4_WK_243X_VIRT 0xd9000000 77#define L4_WK_243X_VIRT 0xd9000000
80#define L4_WK_243X_SIZE SZ_1M 78#define L4_WK_243X_SIZE SZ_1M
@@ -88,13 +86,10 @@
88#define OMAP243X_SMS_VIRT 0xFC000000 86#define OMAP243X_SMS_VIRT 0xFC000000
89#define OMAP243X_SMS_SIZE SZ_1M 87#define OMAP243X_SMS_SIZE SZ_1M
90 88
91#endif 89#define IO_OFFSET 0x90000000
92 90#define __IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */
93#define IO_OFFSET 0x90000000 91#define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */
94#define IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ 92#define io_v2p(va) ((va) - IO_OFFSET) /* Works for L3 and L4 */
95#define OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */
96#define io_p2v(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */
97#define io_v2p(va) ((va) - IO_OFFSET) /* Works for L3 and L4 */
98 93
99/* DSP */ 94/* DSP */
100#define DSP_MEM_24XX_PHYS OMAP2420_DSP_MEM_BASE /* 0x58000000 */ 95#define DSP_MEM_24XX_PHYS OMAP2420_DSP_MEM_BASE /* 0x58000000 */
@@ -149,9 +144,8 @@
149 144
150 145
151#define IO_OFFSET 0x90000000 146#define IO_OFFSET 0x90000000
152#define IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ 147#define __IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */
153#define OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ 148#define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */
154#define io_p2v(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */
155#define io_v2p(va) ((va) - IO_OFFSET)/* Works for L3 and L4 */ 149#define io_v2p(va) ((va) - IO_OFFSET)/* Works for L3 and L4 */
156 150
157/* DSP */ 151/* DSP */
@@ -167,7 +161,14 @@
167 161
168#endif 162#endif
169 163
170#ifndef __ASSEMBLER__ 164#define IO_ADDRESS(pa) IOMEM(__IO_ADDRESS(pa))
165#define OMAP1_IO_ADDRESS(pa) IOMEM(__OMAP1_IO_ADDRESS(pa))
166#define OMAP2_IO_ADDRESS(pa) IOMEM(__OMAP2_IO_ADDRESS(pa))
167
168#ifdef __ASSEMBLER__
169#define IOMEM(x) x
170#else
171#define IOMEM(x) ((void __force __iomem *)(x))
171 172
172/* 173/*
173 * Functions to access the OMAP IO region 174 * Functions to access the OMAP IO region
@@ -178,13 +179,13 @@
178 * - DO NOT use hardcoded virtual addresses to allow changing the 179 * - DO NOT use hardcoded virtual addresses to allow changing the
179 * IO address space again if needed 180 * IO address space again if needed
180 */ 181 */
181#define omap_readb(a) (*(volatile unsigned char *)IO_ADDRESS(a)) 182#define omap_readb(a) __raw_readb(IO_ADDRESS(a))
182#define omap_readw(a) (*(volatile unsigned short *)IO_ADDRESS(a)) 183#define omap_readw(a) __raw_readw(IO_ADDRESS(a))
183#define omap_readl(a) (*(volatile unsigned int *)IO_ADDRESS(a)) 184#define omap_readl(a) __raw_readl(IO_ADDRESS(a))
184 185
185#define omap_writeb(v,a) (*(volatile unsigned char *)IO_ADDRESS(a) = (v)) 186#define omap_writeb(v,a) __raw_writeb(v, IO_ADDRESS(a))
186#define omap_writew(v,a) (*(volatile unsigned short *)IO_ADDRESS(a) = (v)) 187#define omap_writew(v,a) __raw_writew(v, IO_ADDRESS(a))
187#define omap_writel(v,a) (*(volatile unsigned int *)IO_ADDRESS(a) = (v)) 188#define omap_writel(v,a) __raw_writel(v, IO_ADDRESS(a))
188 189
189extern void omap1_map_common_io(void); 190extern void omap1_map_common_io(void);
190extern void omap1_init_common_hw(void); 191extern void omap1_init_common_hw(void);
@@ -192,6 +193,12 @@ extern void omap1_init_common_hw(void);
192extern void omap2_map_common_io(void); 193extern void omap2_map_common_io(void);
193extern void omap2_init_common_hw(void); 194extern void omap2_init_common_hw(void);
194 195
196#define __arch_ioremap(p,s,t) omap_ioremap(p,s,t)
197#define __arch_iounmap(v) omap_iounmap(v)
198
199void __iomem *omap_ioremap(unsigned long phys, size_t size, unsigned int type);
200void omap_iounmap(volatile void __iomem *addr);
201
195#endif 202#endif
196 203
197#endif 204#endif
diff --git a/arch/arm/plat-omap/include/mach/irqs.h b/arch/arm/plat-omap/include/mach/irqs.h
index 62aa7dfb9464..a2929ac8c687 100644
--- a/arch/arm/plat-omap/include/mach/irqs.h
+++ b/arch/arm/plat-omap/include/mach/irqs.h
@@ -125,6 +125,7 @@
125#define INT_UART2 (15 + IH2_BASE) 125#define INT_UART2 (15 + IH2_BASE)
126#define INT_BT_MCSI1TX (16 + IH2_BASE) 126#define INT_BT_MCSI1TX (16 + IH2_BASE)
127#define INT_BT_MCSI1RX (17 + IH2_BASE) 127#define INT_BT_MCSI1RX (17 + IH2_BASE)
128#define INT_SOSSI_MATCH (19 + IH2_BASE)
128#define INT_USB_W2FC (20 + IH2_BASE) 129#define INT_USB_W2FC (20 + IH2_BASE)
129#define INT_1WIRE (21 + IH2_BASE) 130#define INT_1WIRE (21 + IH2_BASE)
130#define INT_OS_TIMER (22 + IH2_BASE) 131#define INT_OS_TIMER (22 + IH2_BASE)
@@ -176,6 +177,7 @@
176#define INT_1610_DMA_CH14 (61 + IH2_BASE) 177#define INT_1610_DMA_CH14 (61 + IH2_BASE)
177#define INT_1610_DMA_CH15 (62 + IH2_BASE) 178#define INT_1610_DMA_CH15 (62 + IH2_BASE)
178#define INT_1610_NAND (63 + IH2_BASE) 179#define INT_1610_NAND (63 + IH2_BASE)
180#define INT_1610_SHA1MD5 (91 + IH2_BASE)
179 181
180/* 182/*
181 * OMAP-730 specific IRQ numbers for interrupt handler 2 183 * OMAP-730 specific IRQ numbers for interrupt handler 2
@@ -263,12 +265,18 @@
263#define INT_24XX_GPTIMER10 46 265#define INT_24XX_GPTIMER10 46
264#define INT_24XX_GPTIMER11 47 266#define INT_24XX_GPTIMER11 47
265#define INT_24XX_GPTIMER12 48 267#define INT_24XX_GPTIMER12 48
268#define INT_24XX_SHA1MD5 51
269#define INT_24XX_MCBSP4_IRQ_TX 54
270#define INT_24XX_MCBSP4_IRQ_RX 55
266#define INT_24XX_I2C1_IRQ 56 271#define INT_24XX_I2C1_IRQ 56
267#define INT_24XX_I2C2_IRQ 57 272#define INT_24XX_I2C2_IRQ 57
273#define INT_24XX_HDQ_IRQ 58
268#define INT_24XX_MCBSP1_IRQ_TX 59 274#define INT_24XX_MCBSP1_IRQ_TX 59
269#define INT_24XX_MCBSP1_IRQ_RX 60 275#define INT_24XX_MCBSP1_IRQ_RX 60
270#define INT_24XX_MCBSP2_IRQ_TX 62 276#define INT_24XX_MCBSP2_IRQ_TX 62
271#define INT_24XX_MCBSP2_IRQ_RX 63 277#define INT_24XX_MCBSP2_IRQ_RX 63
278#define INT_24XX_SPI1_IRQ 65
279#define INT_24XX_SPI2_IRQ 66
272#define INT_24XX_UART1_IRQ 72 280#define INT_24XX_UART1_IRQ 72
273#define INT_24XX_UART2_IRQ 73 281#define INT_24XX_UART2_IRQ 73
274#define INT_24XX_UART3_IRQ 74 282#define INT_24XX_UART3_IRQ 74
@@ -278,7 +286,58 @@
278#define INT_24XX_USB_IRQ_HGEN 78 286#define INT_24XX_USB_IRQ_HGEN 78
279#define INT_24XX_USB_IRQ_HSOF 79 287#define INT_24XX_USB_IRQ_HSOF 79
280#define INT_24XX_USB_IRQ_OTG 80 288#define INT_24XX_USB_IRQ_OTG 80
289#define INT_24XX_MCBSP5_IRQ_TX 81
290#define INT_24XX_MCBSP5_IRQ_RX 82
281#define INT_24XX_MMC_IRQ 83 291#define INT_24XX_MMC_IRQ 83
292#define INT_24XX_MMC2_IRQ 86
293#define INT_24XX_MCBSP3_IRQ_TX 89
294#define INT_24XX_MCBSP3_IRQ_RX 90
295#define INT_24XX_SPI3_IRQ 91
296
297#define INT_243X_MCBSP2_IRQ 16
298#define INT_243X_MCBSP3_IRQ 17
299#define INT_243X_MCBSP4_IRQ 18
300#define INT_243X_MCBSP5_IRQ 19
301#define INT_243X_MCBSP1_IRQ 64
302#define INT_243X_HS_USB_MC 92
303#define INT_243X_HS_USB_DMA 93
304#define INT_243X_CARKIT_IRQ 94
305
306#define INT_34XX_BENCH_MPU_EMUL 3
307#define INT_34XX_ST_MCBSP2_IRQ 4
308#define INT_34XX_ST_MCBSP3_IRQ 5
309#define INT_34XX_SSM_ABORT_IRQ 6
310#define INT_34XX_SYS_NIRQ 7
311#define INT_34XX_D2D_FW_IRQ 8
312#define INT_34XX_PRCM_MPU_IRQ 11
313#define INT_34XX_MCBSP1_IRQ 16
314#define INT_34XX_MCBSP2_IRQ 17
315#define INT_34XX_MCBSP3_IRQ 22
316#define INT_34XX_MCBSP4_IRQ 23
317#define INT_34XX_CAM_IRQ 24
318#define INT_34XX_MCBSP5_IRQ 27
319#define INT_34XX_GPIO_BANK1 29
320#define INT_34XX_GPIO_BANK2 30
321#define INT_34XX_GPIO_BANK3 31
322#define INT_34XX_GPIO_BANK4 32
323#define INT_34XX_GPIO_BANK5 33
324#define INT_34XX_GPIO_BANK6 34
325#define INT_34XX_USIM_IRQ 35
326#define INT_34XX_WDT3_IRQ 36
327#define INT_34XX_SPI4_IRQ 48
328#define INT_34XX_SHA1MD52_IRQ 49
329#define INT_34XX_FPKA_READY_IRQ 50
330#define INT_34XX_SHA1MD51_IRQ 51
331#define INT_34XX_RNG_IRQ 52
332#define INT_34XX_I2C3_IRQ 61
333#define INT_34XX_FPKA_ERROR_IRQ 64
334#define INT_34XX_PBIAS_IRQ 75
335#define INT_34XX_OHCI_IRQ 76
336#define INT_34XX_EHCI_IRQ 77
337#define INT_34XX_TLL_IRQ 78
338#define INT_34XX_PARTHASH_IRQ 79
339#define INT_34XX_MMC3_IRQ 94
340#define INT_34XX_GPT12_IRQ 95
282 341
283#define INT_34XX_BENCH_MPU_EMUL 3 342#define INT_34XX_BENCH_MPU_EMUL 3
284 343
diff --git a/arch/arm/plat-omap/include/mach/mcbsp.h b/arch/arm/plat-omap/include/mach/mcbsp.h
index 8fdb95e26fcd..6a0d1a0a24a7 100644
--- a/arch/arm/plat-omap/include/mach/mcbsp.h
+++ b/arch/arm/plat-omap/include/mach/mcbsp.h
@@ -43,9 +43,15 @@
43 43
44#define OMAP24XX_MCBSP1_BASE 0x48074000 44#define OMAP24XX_MCBSP1_BASE 0x48074000
45#define OMAP24XX_MCBSP2_BASE 0x48076000 45#define OMAP24XX_MCBSP2_BASE 0x48076000
46#define OMAP2430_MCBSP3_BASE 0x4808c000
47#define OMAP2430_MCBSP4_BASE 0x4808e000
48#define OMAP2430_MCBSP5_BASE 0x48096000
46 49
47#define OMAP34XX_MCBSP1_BASE 0x48074000 50#define OMAP34XX_MCBSP1_BASE 0x48074000
48#define OMAP34XX_MCBSP2_BASE 0x49022000 51#define OMAP34XX_MCBSP2_BASE 0x49022000
52#define OMAP34XX_MCBSP3_BASE 0x49024000
53#define OMAP34XX_MCBSP4_BASE 0x49026000
54#define OMAP34XX_MCBSP5_BASE 0x48096000
49 55
50#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP730) 56#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP730)
51 57
@@ -81,9 +87,6 @@
81#define OMAP_MCBSP_REG_XCERG 0x3A 87#define OMAP_MCBSP_REG_XCERG 0x3A
82#define OMAP_MCBSP_REG_XCERH 0x3C 88#define OMAP_MCBSP_REG_XCERH 0x3C
83 89
84#define OMAP_MAX_MCBSP_COUNT 3
85#define MAX_MCBSP_CLOCKS 3
86
87#define AUDIO_MCBSP_DATAWRITE (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1) 90#define AUDIO_MCBSP_DATAWRITE (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1)
88#define AUDIO_MCBSP_DATAREAD (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DRR1) 91#define AUDIO_MCBSP_DATAREAD (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DRR1)
89 92
@@ -91,12 +94,14 @@
91#define AUDIO_DMA_TX OMAP_DMA_MCBSP1_TX 94#define AUDIO_DMA_TX OMAP_DMA_MCBSP1_TX
92#define AUDIO_DMA_RX OMAP_DMA_MCBSP1_RX 95#define AUDIO_DMA_RX OMAP_DMA_MCBSP1_RX
93 96
94#elif defined(CONFIG_ARCH_OMAP24XX) 97#elif defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
95 98
96#define OMAP_MCBSP_REG_DRR2 0x00 99#define OMAP_MCBSP_REG_DRR2 0x00
97#define OMAP_MCBSP_REG_DRR1 0x04 100#define OMAP_MCBSP_REG_DRR1 0x04
98#define OMAP_MCBSP_REG_DXR2 0x08 101#define OMAP_MCBSP_REG_DXR2 0x08
99#define OMAP_MCBSP_REG_DXR1 0x0C 102#define OMAP_MCBSP_REG_DXR1 0x0C
103#define OMAP_MCBSP_REG_DRR 0x00
104#define OMAP_MCBSP_REG_DXR 0x08
100#define OMAP_MCBSP_REG_SPCR2 0x10 105#define OMAP_MCBSP_REG_SPCR2 0x10
101#define OMAP_MCBSP_REG_SPCR1 0x14 106#define OMAP_MCBSP_REG_SPCR1 0x14
102#define OMAP_MCBSP_REG_RCR2 0x18 107#define OMAP_MCBSP_REG_RCR2 0x18
@@ -124,9 +129,9 @@
124#define OMAP_MCBSP_REG_RCERH 0x70 129#define OMAP_MCBSP_REG_RCERH 0x70
125#define OMAP_MCBSP_REG_XCERG 0x74 130#define OMAP_MCBSP_REG_XCERG 0x74
126#define OMAP_MCBSP_REG_XCERH 0x78 131#define OMAP_MCBSP_REG_XCERH 0x78
127 132#define OMAP_MCBSP_REG_SYSCON 0x8C
128#define OMAP_MAX_MCBSP_COUNT 2 133#define OMAP_MCBSP_REG_XCCR 0xAC
129#define MAX_MCBSP_CLOCKS 2 134#define OMAP_MCBSP_REG_RCCR 0xB0
130 135
131#define AUDIO_MCBSP_DATAWRITE (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR1) 136#define AUDIO_MCBSP_DATAWRITE (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR1)
132#define AUDIO_MCBSP_DATAREAD (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR1) 137#define AUDIO_MCBSP_DATAREAD (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR1)
@@ -137,10 +142,6 @@
137 142
138#endif 143#endif
139 144
140#define OMAP_MCBSP_READ(base, reg) __raw_readw((base) + OMAP_MCBSP_REG_##reg)
141#define OMAP_MCBSP_WRITE(base, reg, val) __raw_writew((val), (base) + OMAP_MCBSP_REG_##reg)
142
143
144/************************** McBSP SPCR1 bit definitions ***********************/ 145/************************** McBSP SPCR1 bit definitions ***********************/
145#define RRST 0x0001 146#define RRST 0x0001
146#define RRDY 0x0002 147#define RRDY 0x0002
@@ -151,6 +152,7 @@
151#define DXENA 0x0080 152#define DXENA 0x0080
152#define CLKSTP(value) ((value)<<11) /* bits 11:12 */ 153#define CLKSTP(value) ((value)<<11) /* bits 11:12 */
153#define RJUST(value) ((value)<<13) /* bits 13:14 */ 154#define RJUST(value) ((value)<<13) /* bits 13:14 */
155#define ALB 0x8000
154#define DLB 0x8000 156#define DLB 0x8000
155 157
156/************************** McBSP SPCR2 bit definitions ***********************/ 158/************************** McBSP SPCR2 bit definitions ***********************/
@@ -228,6 +230,17 @@
228#define XPABLK(value) ((value)<<5) /* Bits 5:6 */ 230#define XPABLK(value) ((value)<<5) /* Bits 5:6 */
229#define XPBBLK(value) ((value)<<7) /* Bits 7:8 */ 231#define XPBBLK(value) ((value)<<7) /* Bits 7:8 */
230 232
233/*********************** McBSP XCCR bit definitions *************************/
234#define DILB 0x0020
235#define XDMAEN 0x0008
236#define XDISABLE 0x0001
237
238/********************** McBSP RCCR bit definitions *************************/
239#define RDMAEN 0x0008
240#define RDISABLE 0x0001
241
242/********************** McBSP SYSCONFIG bit definitions ********************/
243#define SOFTRST 0x0002
231 244
232/* we don't do multichannel for now */ 245/* we don't do multichannel for now */
233struct omap_mcbsp_reg_cfg { 246struct omap_mcbsp_reg_cfg {
@@ -260,6 +273,8 @@ typedef enum {
260 OMAP_MCBSP1 = 0, 273 OMAP_MCBSP1 = 0,
261 OMAP_MCBSP2, 274 OMAP_MCBSP2,
262 OMAP_MCBSP3, 275 OMAP_MCBSP3,
276 OMAP_MCBSP4,
277 OMAP_MCBSP5
263} omap_mcbsp_id; 278} omap_mcbsp_id;
264 279
265typedef int __bitwise omap_mcbsp_io_type_t; 280typedef int __bitwise omap_mcbsp_io_type_t;
@@ -311,12 +326,10 @@ struct omap_mcbsp_spi_cfg {
311struct omap_mcbsp_ops { 326struct omap_mcbsp_ops {
312 void (*request)(unsigned int); 327 void (*request)(unsigned int);
313 void (*free)(unsigned int); 328 void (*free)(unsigned int);
314 int (*check)(unsigned int);
315}; 329};
316 330
317struct omap_mcbsp_platform_data { 331struct omap_mcbsp_platform_data {
318 unsigned long phys_base; 332 unsigned long phys_base;
319 u32 virt_base;
320 u8 dma_rx_sync, dma_tx_sync; 333 u8 dma_rx_sync, dma_tx_sync;
321 u16 rx_irq, tx_irq; 334 u16 rx_irq, tx_irq;
322 struct omap_mcbsp_ops *ops; 335 struct omap_mcbsp_ops *ops;
@@ -326,7 +339,7 @@ struct omap_mcbsp_platform_data {
326struct omap_mcbsp { 339struct omap_mcbsp {
327 struct device *dev; 340 struct device *dev;
328 unsigned long phys_base; 341 unsigned long phys_base;
329 u32 io_base; 342 void __iomem *io_base;
330 u8 id; 343 u8 id;
331 u8 free; 344 u8 free;
332 omap_mcbsp_word_length rx_word_length; 345 omap_mcbsp_word_length rx_word_length;
@@ -354,6 +367,8 @@ struct omap_mcbsp {
354 struct omap_mcbsp_platform_data *pdata; 367 struct omap_mcbsp_platform_data *pdata;
355 struct clk *clk; 368 struct clk *clk;
356}; 369};
370extern struct omap_mcbsp **mcbsp_ptr;
371extern int omap_mcbsp_count;
357 372
358int omap_mcbsp_init(void); 373int omap_mcbsp_init(void);
359void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config, 374void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
@@ -378,5 +393,6 @@ void omap_mcbsp_set_spi_mode(unsigned int id, const struct omap_mcbsp_spi_cfg *
378/* Polled read/write functions */ 393/* Polled read/write functions */
379int omap_mcbsp_pollread(unsigned int id, u16 * buf); 394int omap_mcbsp_pollread(unsigned int id, u16 * buf);
380int omap_mcbsp_pollwrite(unsigned int id, u16 buf); 395int omap_mcbsp_pollwrite(unsigned int id, u16 buf);
396int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type);
381 397
382#endif 398#endif
diff --git a/arch/arm/plat-omap/include/mach/memory.h b/arch/arm/plat-omap/include/mach/memory.h
index a325caf80d04..d40cac60b959 100644
--- a/arch/arm/plat-omap/include/mach/memory.h
+++ b/arch/arm/plat-omap/include/mach/memory.h
@@ -38,7 +38,7 @@
38 */ 38 */
39#if defined(CONFIG_ARCH_OMAP1) 39#if defined(CONFIG_ARCH_OMAP1)
40#define PHYS_OFFSET UL(0x10000000) 40#define PHYS_OFFSET UL(0x10000000)
41#elif defined(CONFIG_ARCH_OMAP2) 41#elif defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
42#define PHYS_OFFSET UL(0x80000000) 42#define PHYS_OFFSET UL(0x80000000)
43#endif 43#endif
44 44
diff --git a/arch/arm/plat-omap/include/mach/mux.h b/arch/arm/plat-omap/include/mach/mux.h
index 614b2c1327c7..6bbf1789bed5 100644
--- a/arch/arm/plat-omap/include/mach/mux.h
+++ b/arch/arm/plat-omap/include/mach/mux.h
@@ -125,20 +125,64 @@
125 .pu_pd_val = pull_mode, \ 125 .pu_pd_val = pull_mode, \
126}, 126},
127 127
128 128/* 24xx/34xx mux bit defines */
129#define PULL_DISABLED 0 129#define OMAP2_PULL_ENA (1 << 3)
130#define PULL_ENABLED 1 130#define OMAP2_PULL_UP (1 << 4)
131 131#define OMAP2_ALTELECTRICALSEL (1 << 5)
132#define PULL_DOWN 0 132
133#define PULL_UP 1 133/* 34xx specific mux bit defines */
134#define OMAP3_INPUT_EN (1 << 8)
135#define OMAP3_OFF_EN (1 << 9)
136#define OMAP3_OFFOUT_EN (1 << 10)
137#define OMAP3_OFFOUT_VAL (1 << 11)
138#define OMAP3_OFF_PULL_EN (1 << 12)
139#define OMAP3_OFF_PULL_UP (1 << 13)
140#define OMAP3_WAKEUP_EN (1 << 14)
141
142/* 34xx mux mode options for each pin. See TRM for options */
143#define OMAP34XX_MUX_MODE0 0
144#define OMAP34XX_MUX_MODE1 1
145#define OMAP34XX_MUX_MODE2 2
146#define OMAP34XX_MUX_MODE3 3
147#define OMAP34XX_MUX_MODE4 4
148#define OMAP34XX_MUX_MODE5 5
149#define OMAP34XX_MUX_MODE6 6
150#define OMAP34XX_MUX_MODE7 7
151
152/* 34xx active pin states */
153#define OMAP34XX_PIN_OUTPUT 0
154#define OMAP34XX_PIN_INPUT OMAP3_INPUT_EN
155#define OMAP34XX_PIN_INPUT_PULLUP (OMAP2_PULL_ENA | OMAP3_INPUT_EN \
156 | OMAP2_PULL_UP)
157#define OMAP34XX_PIN_INPUT_PULLDOWN (OMAP2_PULL_ENA | OMAP3_INPUT_EN)
158
159/* 34xx off mode states */
160#define OMAP34XX_PIN_OFF_NONE 0
161#define OMAP34XX_PIN_OFF_OUTPUT_HIGH (OMAP3_OFF_EN | OMAP3_OFFOUT_EN \
162 | OMAP3_OFFOUT_VAL)
163#define OMAP34XX_PIN_OFF_OUTPUT_LOW (OMAP3_OFF_EN | OMAP3_OFFOUT_EN)
164#define OMAP34XX_PIN_OFF_INPUT_PULLUP (OMAP3_OFF_EN | OMAP3_OFF_PULL_EN \
165 | OMAP3_OFF_PULL_UP)
166#define OMAP34XX_PIN_OFF_INPUT_PULLDOWN (OMAP3_OFF_EN | OMAP3_OFF_PULL_EN)
167#define OMAP34XX_PIN_OFF_WAKEUPENABLE OMAP3_WAKEUP_EN
168
169#define MUX_CFG_34XX(desc, reg_offset, mux_value) { \
170 .name = desc, \
171 .debug = 0, \
172 .mux_reg = reg_offset, \
173 .mux_val = mux_value \
174},
134 175
135struct pin_config { 176struct pin_config {
136 char *name; 177 char *name;
137 unsigned char busy; 178 const unsigned int mux_reg;
138 unsigned char debug; 179 unsigned char debug;
139 180
140 const char *mux_reg_name; 181#if defined(CONFIG_ARCH_OMAP34XX)
141 const unsigned int mux_reg; 182 u16 mux_val; /* Wake-up, off mode, pull, mux mode */
183#endif
184
185#if defined(CONFIG_ARCH_OMAP1) || defined(CONFIG_ARCH_OMAP24XX)
142 const unsigned char mask_offset; 186 const unsigned char mask_offset;
143 const unsigned char mask; 187 const unsigned char mask;
144 188
@@ -150,6 +194,12 @@ struct pin_config {
150 const char *pu_pd_name; 194 const char *pu_pd_name;
151 const unsigned int pu_pd_reg; 195 const unsigned int pu_pd_reg;
152 const unsigned char pu_pd_val; 196 const unsigned char pu_pd_val;
197#endif
198
199#if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
200 const char *mux_reg_name;
201#endif
202
153}; 203};
154 204
155enum omap730_index { 205enum omap730_index {
@@ -593,6 +643,114 @@ enum omap24xx_index {
593 643
594}; 644};
595 645
646enum omap34xx_index {
647 /* 34xx I2C */
648 K21_34XX_I2C1_SCL,
649 J21_34XX_I2C1_SDA,
650 AF15_34XX_I2C2_SCL,
651 AE15_34XX_I2C2_SDA,
652 AF14_34XX_I2C3_SCL,
653 AG14_34XX_I2C3_SDA,
654 AD26_34XX_I2C4_SCL,
655 AE26_34XX_I2C4_SDA,
656
657 /* PHY - HSUSB: 12-pin ULPI PHY: Port 1*/
658 Y8_3430_USB1HS_PHY_CLK,
659 Y9_3430_USB1HS_PHY_STP,
660 AA14_3430_USB1HS_PHY_DIR,
661 AA11_3430_USB1HS_PHY_NXT,
662 W13_3430_USB1HS_PHY_DATA0,
663 W12_3430_USB1HS_PHY_DATA1,
664 W11_3430_USB1HS_PHY_DATA2,
665 Y11_3430_USB1HS_PHY_DATA3,
666 W9_3430_USB1HS_PHY_DATA4,
667 Y12_3430_USB1HS_PHY_DATA5,
668 W8_3430_USB1HS_PHY_DATA6,
669 Y13_3430_USB1HS_PHY_DATA7,
670
671 /* PHY - HSUSB: 12-pin ULPI PHY: Port 2*/
672 AA8_3430_USB2HS_PHY_CLK,
673 AA10_3430_USB2HS_PHY_STP,
674 AA9_3430_USB2HS_PHY_DIR,
675 AB11_3430_USB2HS_PHY_NXT,
676 AB10_3430_USB2HS_PHY_DATA0,
677 AB9_3430_USB2HS_PHY_DATA1,
678 W3_3430_USB2HS_PHY_DATA2,
679 T4_3430_USB2HS_PHY_DATA3,
680 T3_3430_USB2HS_PHY_DATA4,
681 R3_3430_USB2HS_PHY_DATA5,
682 R4_3430_USB2HS_PHY_DATA6,
683 T2_3430_USB2HS_PHY_DATA7,
684
685
686 /* TLL - HSUSB: 12-pin TLL Port 1*/
687 Y8_3430_USB1HS_TLL_CLK,
688 Y9_3430_USB1HS_TLL_STP,
689 AA14_3430_USB1HS_TLL_DIR,
690 AA11_3430_USB1HS_TLL_NXT,
691 W13_3430_USB1HS_TLL_DATA0,
692 W12_3430_USB1HS_TLL_DATA1,
693 W11_3430_USB1HS_TLL_DATA2,
694 Y11_3430_USB1HS_TLL_DATA3,
695 W9_3430_USB1HS_TLL_DATA4,
696 Y12_3430_USB1HS_TLL_DATA5,
697 W8_3430_USB1HS_TLL_DATA6,
698 Y13_3430_USB1HS_TLL_DATA7,
699
700 /* TLL - HSUSB: 12-pin TLL Port 2*/
701 AA8_3430_USB2HS_TLL_CLK,
702 AA10_3430_USB2HS_TLL_STP,
703 AA9_3430_USB2HS_TLL_DIR,
704 AB11_3430_USB2HS_TLL_NXT,
705 AB10_3430_USB2HS_TLL_DATA0,
706 AB9_3430_USB2HS_TLL_DATA1,
707 W3_3430_USB2HS_TLL_DATA2,
708 T4_3430_USB2HS_TLL_DATA3,
709 T3_3430_USB2HS_TLL_DATA4,
710 R3_3430_USB2HS_TLL_DATA5,
711 R4_3430_USB2HS_TLL_DATA6,
712 T2_3430_USB2HS_TLL_DATA7,
713
714 /* TLL - HSUSB: 12-pin TLL Port 3*/
715 AA6_3430_USB3HS_TLL_CLK,
716 AB3_3430_USB3HS_TLL_STP,
717 AA3_3430_USB3HS_TLL_DIR,
718 Y3_3430_USB3HS_TLL_NXT,
719 AA5_3430_USB3HS_TLL_DATA0,
720 Y4_3430_USB3HS_TLL_DATA1,
721 Y5_3430_USB3HS_TLL_DATA2,
722 W5_3430_USB3HS_TLL_DATA3,
723 AB12_3430_USB3HS_TLL_DATA4,
724 AB13_3430_USB3HS_TLL_DATA5,
725 AA13_3430_USB3HS_TLL_DATA6,
726 AA12_3430_USB3HS_TLL_DATA7,
727
728 /* PHY FSUSB: FS Serial for Port 1 (multiple PHY modes supported) */
729 AF10_3430_USB1FS_PHY_MM1_RXDP,
730 AG9_3430_USB1FS_PHY_MM1_RXDM,
731 W13_3430_USB1FS_PHY_MM1_RXRCV,
732 W12_3430_USB1FS_PHY_MM1_TXSE0,
733 W11_3430_USB1FS_PHY_MM1_TXDAT,
734 Y11_3430_USB1FS_PHY_MM1_TXEN_N,
735
736 /* PHY FSUSB: FS Serial for Port 2 (multiple PHY modes supported) */
737 AF7_3430_USB2FS_PHY_MM2_RXDP,
738 AH7_3430_USB2FS_PHY_MM2_RXDM,
739 AB10_3430_USB2FS_PHY_MM2_RXRCV,
740 AB9_3430_USB2FS_PHY_MM2_TXSE0,
741 W3_3430_USB2FS_PHY_MM2_TXDAT,
742 T4_3430_USB2FS_PHY_MM2_TXEN_N,
743
744 /* PHY FSUSB: FS Serial for Port 3 (multiple PHY modes supported) */
745 AH3_3430_USB3FS_PHY_MM3_RXDP,
746 AE3_3430_USB3FS_PHY_MM3_RXDM,
747 AD1_3430_USB3FS_PHY_MM3_RXRCV,
748 AE1_3430_USB3FS_PHY_MM3_TXSE0,
749 AD2_3430_USB3FS_PHY_MM3_TXDAT,
750 AC1_3430_USB3FS_PHY_MM3_TXEN_N,
751
752};
753
596struct omap_mux_cfg { 754struct omap_mux_cfg {
597 struct pin_config *pins; 755 struct pin_config *pins;
598 unsigned long size; 756 unsigned long size;
diff --git a/arch/arm/plat-omap/include/mach/omap1510.h b/arch/arm/plat-omap/include/mach/omap1510.h
index 505a38af8b22..d24004668138 100644
--- a/arch/arm/plat-omap/include/mach/omap1510.h
+++ b/arch/arm/plat-omap/include/mach/omap1510.h
@@ -44,5 +44,7 @@
44#define OMAP1510_DSPREG_SIZE SZ_128K 44#define OMAP1510_DSPREG_SIZE SZ_128K
45#define OMAP1510_DSPREG_START 0xE1000000 45#define OMAP1510_DSPREG_START 0xE1000000
46 46
47#define OMAP1510_DSP_MMU_BASE (0xfffed200)
48
47#endif /* __ASM_ARCH_OMAP15XX_H */ 49#endif /* __ASM_ARCH_OMAP15XX_H */
48 50
diff --git a/arch/arm/plat-omap/include/mach/omap16xx.h b/arch/arm/plat-omap/include/mach/omap16xx.h
index c6c93afb2788..0e69b504c25f 100644
--- a/arch/arm/plat-omap/include/mach/omap16xx.h
+++ b/arch/arm/plat-omap/include/mach/omap16xx.h
@@ -44,6 +44,11 @@
44#define OMAP16XX_DSPREG_SIZE SZ_128K 44#define OMAP16XX_DSPREG_SIZE SZ_128K
45#define OMAP16XX_DSPREG_START 0xE1000000 45#define OMAP16XX_DSPREG_START 0xE1000000
46 46
47#define OMAP16XX_SEC_BASE 0xFFFE4000
48#define OMAP16XX_SEC_DES (OMAP16XX_SEC_BASE + 0x0000)
49#define OMAP16XX_SEC_SHA1MD5 (OMAP16XX_SEC_BASE + 0x0800)
50#define OMAP16XX_SEC_RNG (OMAP16XX_SEC_BASE + 0x1000)
51
47/* 52/*
48 * --------------------------------------------------------------------------- 53 * ---------------------------------------------------------------------------
49 * Interrupts 54 * Interrupts
@@ -190,7 +195,7 @@
190#define WSPR_DISABLE_0 (0x0000aaaa) 195#define WSPR_DISABLE_0 (0x0000aaaa)
191#define WSPR_DISABLE_1 (0x00005555) 196#define WSPR_DISABLE_1 (0x00005555)
192 197
193/* Mailbox */ 198#define OMAP16XX_DSP_MMU_BASE (0xfffed200)
194#define OMAP16XX_MAILBOX_BASE (0xfffcf000) 199#define OMAP16XX_MAILBOX_BASE (0xfffcf000)
195 200
196#endif /* __ASM_ARCH_OMAP16XX_H */ 201#endif /* __ASM_ARCH_OMAP16XX_H */
diff --git a/arch/arm/plat-omap/include/mach/omap24xx.h b/arch/arm/plat-omap/include/mach/omap24xx.h
index bb8319d66e9f..24335d4932f5 100644
--- a/arch/arm/plat-omap/include/mach/omap24xx.h
+++ b/arch/arm/plat-omap/include/mach/omap24xx.h
@@ -39,7 +39,6 @@
39/* interrupt controller */ 39/* interrupt controller */
40#define OMAP24XX_IC_BASE (L4_24XX_BASE + 0xfe000) 40#define OMAP24XX_IC_BASE (L4_24XX_BASE + 0xfe000)
41#define OMAP24XX_IVA_INTC_BASE 0x40000000 41#define OMAP24XX_IVA_INTC_BASE 0x40000000
42#define IRQ_SIR_IRQ 0x0040
43 42
44#define OMAP2420_CTRL_BASE L4_24XX_BASE 43#define OMAP2420_CTRL_BASE L4_24XX_BASE
45#define OMAP2420_32KSYNCT_BASE (L4_24XX_BASE + 0x4000) 44#define OMAP2420_32KSYNCT_BASE (L4_24XX_BASE + 0x4000)
@@ -48,6 +47,7 @@
48#define OMAP2420_PRM_BASE OMAP2420_CM_BASE 47#define OMAP2420_PRM_BASE OMAP2420_CM_BASE
49#define OMAP2420_SDRC_BASE (L3_24XX_BASE + 0x9000) 48#define OMAP2420_SDRC_BASE (L3_24XX_BASE + 0x9000)
50#define OMAP2420_SMS_BASE 0x68008000 49#define OMAP2420_SMS_BASE 0x68008000
50#define OMAP2420_GPMC_BASE 0x6800a000
51 51
52#define OMAP2430_32KSYNCT_BASE (L4_WK_243X_BASE + 0x20000) 52#define OMAP2430_32KSYNCT_BASE (L4_WK_243X_BASE + 0x20000)
53#define OMAP2430_PRCM_BASE (L4_WK_243X_BASE + 0x6000) 53#define OMAP2430_PRCM_BASE (L4_WK_243X_BASE + 0x6000)
diff --git a/arch/arm/plat-omap/include/mach/omapfb.h b/arch/arm/plat-omap/include/mach/omapfb.h
index cae037d13079..ec67fb428607 100644
--- a/arch/arm/plat-omap/include/mach/omapfb.h
+++ b/arch/arm/plat-omap/include/mach/omapfb.h
@@ -62,6 +62,7 @@
62#define OMAPFB_CAPS_WINDOW_PIXEL_DOUBLE 0x00010000 62#define OMAPFB_CAPS_WINDOW_PIXEL_DOUBLE 0x00010000
63#define OMAPFB_CAPS_WINDOW_SCALE 0x00020000 63#define OMAPFB_CAPS_WINDOW_SCALE 0x00020000
64#define OMAPFB_CAPS_WINDOW_OVERLAY 0x00040000 64#define OMAPFB_CAPS_WINDOW_OVERLAY 0x00040000
65#define OMAPFB_CAPS_WINDOW_ROTATE 0x00080000
65#define OMAPFB_CAPS_SET_BACKLIGHT 0x01000000 66#define OMAPFB_CAPS_SET_BACKLIGHT 0x01000000
66 67
67/* Values from DSP must map to lower 16-bits */ 68/* Values from DSP must map to lower 16-bits */
@@ -305,6 +306,7 @@ struct lcd_ctrl {
305 int screen_width, 306 int screen_width,
306 int pos_x, int pos_y, int width, 307 int pos_x, int pos_y, int width,
307 int height, int color_mode); 308 int height, int color_mode);
309 int (*set_rotate) (int angle);
308 int (*setup_mem) (int plane, size_t size, 310 int (*setup_mem) (int plane, size_t size,
309 int mem_type, unsigned long *paddr); 311 int mem_type, unsigned long *paddr);
310 int (*mmap) (struct fb_info *info, 312 int (*mmap) (struct fb_info *info,
@@ -374,6 +376,7 @@ extern struct lcd_ctrl omap1_lcd_ctrl;
374extern struct lcd_ctrl omap2_disp_ctrl; 376extern struct lcd_ctrl omap2_disp_ctrl;
375#endif 377#endif
376 378
379extern void omapfb_reserve_sdram(void);
377extern void omapfb_register_panel(struct lcd_panel *panel); 380extern void omapfb_register_panel(struct lcd_panel *panel);
378extern void omapfb_write_first_pixel(struct omapfb_device *fbdev, u16 pixval); 381extern void omapfb_write_first_pixel(struct omapfb_device *fbdev, u16 pixval);
379extern void omapfb_notify_clients(struct omapfb_device *fbdev, 382extern void omapfb_notify_clients(struct omapfb_device *fbdev,
diff --git a/arch/arm/plat-omap/include/mach/pm.h b/arch/arm/plat-omap/include/mach/pm.h
index bfa09325a5ff..768eb6e7abcf 100644
--- a/arch/arm/plat-omap/include/mach/pm.h
+++ b/arch/arm/plat-omap/include/mach/pm.h
@@ -39,11 +39,11 @@
39 * Register and offset definitions to be used in PM assembler code 39 * Register and offset definitions to be used in PM assembler code
40 * ---------------------------------------------------------------------------- 40 * ----------------------------------------------------------------------------
41 */ 41 */
42#define CLKGEN_REG_ASM_BASE io_p2v(0xfffece00) 42#define CLKGEN_REG_ASM_BASE IO_ADDRESS(0xfffece00)
43#define ARM_IDLECT1_ASM_OFFSET 0x04 43#define ARM_IDLECT1_ASM_OFFSET 0x04
44#define ARM_IDLECT2_ASM_OFFSET 0x08 44#define ARM_IDLECT2_ASM_OFFSET 0x08
45 45
46#define TCMIF_ASM_BASE io_p2v(0xfffecc00) 46#define TCMIF_ASM_BASE IO_ADDRESS(0xfffecc00)
47#define EMIFS_CONFIG_ASM_OFFSET 0x0c 47#define EMIFS_CONFIG_ASM_OFFSET 0x0c
48#define EMIFF_SDRAM_CONFIG_ASM_OFFSET 0x20 48#define EMIFF_SDRAM_CONFIG_ASM_OFFSET 0x20
49 49
@@ -135,7 +135,8 @@ extern void omap_pm_suspend(void);
135extern void omap730_cpu_suspend(unsigned short, unsigned short); 135extern void omap730_cpu_suspend(unsigned short, unsigned short);
136extern void omap1510_cpu_suspend(unsigned short, unsigned short); 136extern void omap1510_cpu_suspend(unsigned short, unsigned short);
137extern void omap1610_cpu_suspend(unsigned short, unsigned short); 137extern void omap1610_cpu_suspend(unsigned short, unsigned short);
138extern void omap24xx_cpu_suspend(u32 dll_ctrl, u32 cpu_revision); 138extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl,
139 void __iomem *sdrc_power);
139extern void omap730_idle_loop_suspend(void); 140extern void omap730_idle_loop_suspend(void);
140extern void omap1510_idle_loop_suspend(void); 141extern void omap1510_idle_loop_suspend(void);
141extern void omap1610_idle_loop_suspend(void); 142extern void omap1610_idle_loop_suspend(void);
diff --git a/arch/arm/plat-omap/include/mach/powerdomain.h b/arch/arm/plat-omap/include/mach/powerdomain.h
new file mode 100644
index 000000000000..2806a9c8e4d7
--- /dev/null
+++ b/arch/arm/plat-omap/include/mach/powerdomain.h
@@ -0,0 +1,166 @@
1/*
2 * OMAP2/3 powerdomain control
3 *
4 * Copyright (C) 2007-8 Texas Instruments, Inc.
5 * Copyright (C) 2007-8 Nokia Corporation
6 *
7 * Written by Paul Walmsley
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#ifndef ASM_ARM_ARCH_OMAP_POWERDOMAIN
15#define ASM_ARM_ARCH_OMAP_POWERDOMAIN
16
17#include <linux/types.h>
18#include <linux/list.h>
19
20#include <asm/atomic.h>
21
22#include <mach/cpu.h>
23
24
25/* Powerdomain basic power states */
26#define PWRDM_POWER_OFF 0x0
27#define PWRDM_POWER_RET 0x1
28#define PWRDM_POWER_INACTIVE 0x2
29#define PWRDM_POWER_ON 0x3
30
31/* Powerdomain allowable state bitfields */
32#define PWRSTS_OFF_ON ((1 << PWRDM_POWER_OFF) | \
33 (1 << PWRDM_POWER_ON))
34
35#define PWRSTS_OFF_RET ((1 << PWRDM_POWER_OFF) | \
36 (1 << PWRDM_POWER_RET))
37
38#define PWRSTS_OFF_RET_ON (PWRSTS_OFF_RET | (1 << PWRDM_POWER_ON))
39
40
41/* Powerdomain flags */
42#define PWRDM_HAS_HDWR_SAR (1 << 0) /* hardware save-and-restore support */
43
44
45/*
46 * Number of memory banks that are power-controllable. On OMAP3430, the
47 * maximum is 4.
48 */
49#define PWRDM_MAX_MEM_BANKS 4
50
51/*
52 * Maximum number of clockdomains that can be associated with a powerdomain.
53 * CORE powerdomain is probably the worst case.
54 */
55#define PWRDM_MAX_CLKDMS 3
56
57/* XXX A completely arbitrary number. What is reasonable here? */
58#define PWRDM_TRANSITION_BAILOUT 100000
59
60struct clockdomain;
61struct powerdomain;
62
63/* Encodes dependencies between powerdomains - statically defined */
64struct pwrdm_dep {
65
66 /* Powerdomain name */
67 const char *pwrdm_name;
68
69 /* Powerdomain pointer - resolved by the powerdomain code */
70 struct powerdomain *pwrdm;
71
72 /* Flags to mark OMAP chip restrictions, etc. */
73 const struct omap_chip_id omap_chip;
74
75};
76
77struct powerdomain {
78
79 /* Powerdomain name */
80 const char *name;
81
82 /* the address offset from CM_BASE/PRM_BASE */
83 const s16 prcm_offs;
84
85 /* Used to represent the OMAP chip types containing this pwrdm */
86 const struct omap_chip_id omap_chip;
87
88 /* Bit shift of this powerdomain's PM_WKDEP/CM_SLEEPDEP bit */
89 const u8 dep_bit;
90
91 /* Powerdomains that can be told to wake this powerdomain up */
92 struct pwrdm_dep *wkdep_srcs;
93
94 /* Powerdomains that can be told to keep this pwrdm from inactivity */
95 struct pwrdm_dep *sleepdep_srcs;
96
97 /* Possible powerdomain power states */
98 const u8 pwrsts;
99
100 /* Possible logic power states when pwrdm in RETENTION */
101 const u8 pwrsts_logic_ret;
102
103 /* Powerdomain flags */
104 const u8 flags;
105
106 /* Number of software-controllable memory banks in this powerdomain */
107 const u8 banks;
108
109 /* Possible memory bank pwrstates when pwrdm in RETENTION */
110 const u8 pwrsts_mem_ret[PWRDM_MAX_MEM_BANKS];
111
112 /* Possible memory bank pwrstates when pwrdm is ON */
113 const u8 pwrsts_mem_on[PWRDM_MAX_MEM_BANKS];
114
115 /* Clockdomains in this powerdomain */
116 struct clockdomain *pwrdm_clkdms[PWRDM_MAX_CLKDMS];
117
118 struct list_head node;
119
120};
121
122
123void pwrdm_init(struct powerdomain **pwrdm_list);
124
125int pwrdm_register(struct powerdomain *pwrdm);
126int pwrdm_unregister(struct powerdomain *pwrdm);
127struct powerdomain *pwrdm_lookup(const char *name);
128
129int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm));
130
131int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
132int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
133int pwrdm_for_each_clkdm(struct powerdomain *pwrdm,
134 int (*fn)(struct powerdomain *pwrdm,
135 struct clockdomain *clkdm));
136
137int pwrdm_add_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2);
138int pwrdm_del_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2);
139int pwrdm_read_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2);
140int pwrdm_add_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2);
141int pwrdm_del_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2);
142int pwrdm_read_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2);
143
144int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm);
145
146int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst);
147int pwrdm_read_next_pwrst(struct powerdomain *pwrdm);
148int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm);
149int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm);
150
151int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst);
152int pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
153int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
154
155int pwrdm_read_logic_pwrst(struct powerdomain *pwrdm);
156int pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm);
157int pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank);
158int pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank);
159
160int pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm);
161int pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm);
162bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm);
163
164int pwrdm_wait_transition(struct powerdomain *pwrdm);
165
166#endif
diff --git a/arch/arm/plat-omap/include/mach/sdrc.h b/arch/arm/plat-omap/include/mach/sdrc.h
index 787b7acec546..a98c6c3beb2c 100644
--- a/arch/arm/plat-omap/include/mach/sdrc.h
+++ b/arch/arm/plat-omap/include/mach/sdrc.h
@@ -25,6 +25,8 @@
25#define SDRC_DLLB_STATUS 0x06C 25#define SDRC_DLLB_STATUS 0x06C
26#define SDRC_POWER 0x070 26#define SDRC_POWER 0x070
27#define SDRC_MR_0 0x084 27#define SDRC_MR_0 0x084
28#define SDRC_ACTIM_CTRL_A_0 0x09c
29#define SDRC_ACTIM_CTRL_B_0 0x0a0
28#define SDRC_RFR_CTRL_0 0x0a4 30#define SDRC_RFR_CTRL_0 0x0a4
29 31
30/* 32/*
@@ -63,9 +65,9 @@
63 */ 65 */
64 66
65 67
66#define OMAP242X_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(OMAP2420_SMS_BASE + reg) 68#define OMAP242X_SMS_REGADDR(reg) IO_ADDRESS(OMAP2420_SMS_BASE + reg)
67#define OMAP243X_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(OMAP243X_SMS_BASE + reg) 69#define OMAP243X_SMS_REGADDR(reg) IO_ADDRESS(OMAP243X_SMS_BASE + reg)
68#define OMAP343X_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(OMAP343X_SMS_BASE + reg) 70#define OMAP343X_SMS_REGADDR(reg) IO_ADDRESS(OMAP343X_SMS_BASE + reg)
69 71
70/* SMS register offsets - read/write with sms_{read,write}_reg() */ 72/* SMS register offsets - read/write with sms_{read,write}_reg() */
71 73
diff --git a/arch/arm/plat-omap/include/mach/serial.h b/arch/arm/plat-omap/include/mach/serial.h
index cc6bfa51ccb5..8a676a04be48 100644
--- a/arch/arm/plat-omap/include/mach/serial.h
+++ b/arch/arm/plat-omap/include/mach/serial.h
@@ -20,18 +20,24 @@
20#define OMAP_UART1_BASE 0x4806a000 20#define OMAP_UART1_BASE 0x4806a000
21#define OMAP_UART2_BASE 0x4806c000 21#define OMAP_UART2_BASE 0x4806c000
22#define OMAP_UART3_BASE 0x4806e000 22#define OMAP_UART3_BASE 0x4806e000
23#elif defined(CONFIG_ARCH_OMAP3)
24/* OMAP3 serial ports */
25#define OMAP_UART1_BASE 0x4806a000
26#define OMAP_UART2_BASE 0x4806c000
27#define OMAP_UART3_BASE 0x49020000
23#endif 28#endif
24 29
25#define OMAP_MAX_NR_PORTS 3 30#define OMAP_MAX_NR_PORTS 3
26#define OMAP1510_BASE_BAUD (12000000/16) 31#define OMAP1510_BASE_BAUD (12000000/16)
27#define OMAP16XX_BASE_BAUD (48000000/16) 32#define OMAP16XX_BASE_BAUD (48000000/16)
33#define OMAP24XX_BASE_BAUD (48000000/16)
28 34
29#define is_omap_port(p) ({int __ret = 0; \ 35#define is_omap_port(pt) ({int __ret = 0; \
30 if (p == IO_ADDRESS(OMAP_UART1_BASE) || \ 36 if ((pt)->port.mapbase == OMAP_UART1_BASE || \
31 p == IO_ADDRESS(OMAP_UART2_BASE) || \ 37 (pt)->port.mapbase == OMAP_UART2_BASE || \
32 p == IO_ADDRESS(OMAP_UART3_BASE)) \ 38 (pt)->port.mapbase == OMAP_UART3_BASE) \
33 __ret = 1; \ 39 __ret = 1; \
34 __ret; \ 40 __ret; \
35 }) 41 })
36 42
37#endif 43#endif
diff --git a/arch/arm/plat-omap/include/mach/sram.h b/arch/arm/plat-omap/include/mach/sram.h
index e09323449981..ab35d622dcf5 100644
--- a/arch/arm/plat-omap/include/mach/sram.h
+++ b/arch/arm/plat-omap/include/mach/sram.h
@@ -21,6 +21,10 @@ extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
21 u32 mem_type); 21 u32 mem_type);
22extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); 22extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
23 23
24extern u32 omap3_configure_core_dpll(u32 sdrc_rfr_ctrl,
25 u32 sdrc_actim_ctrla,
26 u32 sdrc_actim_ctrlb, u32 m2);
27
24/* Do not use these */ 28/* Do not use these */
25extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl); 29extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
26extern unsigned long omap1_sram_reprogram_clock_sz; 30extern unsigned long omap1_sram_reprogram_clock_sz;
@@ -53,4 +57,10 @@ extern void omap243x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
53 u32 mem_type); 57 u32 mem_type);
54extern unsigned long omap243x_sram_reprogram_sdrc_sz; 58extern unsigned long omap243x_sram_reprogram_sdrc_sz;
55 59
60
61extern u32 omap3_sram_configure_core_dpll(u32 sdrc_rfr_ctrl,
62 u32 sdrc_actim_ctrla,
63 u32 sdrc_actim_ctrlb, u32 m2);
64extern unsigned long omap3_sram_configure_core_dpll_sz;
65
56#endif 66#endif
diff --git a/arch/arm/plat-omap/include/mach/system.h b/arch/arm/plat-omap/include/mach/system.h
index 06a28c7b98de..06923f261545 100644
--- a/arch/arm/plat-omap/include/mach/system.h
+++ b/arch/arm/plat-omap/include/mach/system.h
@@ -40,7 +40,7 @@ static inline void omap1_arch_reset(char mode)
40 40
41static inline void arch_reset(char mode) 41static inline void arch_reset(char mode)
42{ 42{
43 if (!cpu_is_omap24xx()) 43 if (!cpu_class_is_omap2())
44 omap1_arch_reset(mode); 44 omap1_arch_reset(mode);
45 else 45 else
46 omap_prcm_arch_reset(mode); 46 omap_prcm_arch_reset(mode);
diff --git a/arch/arm/plat-omap/io.c b/arch/arm/plat-omap/io.c
new file mode 100644
index 000000000000..af326efc1ad3
--- /dev/null
+++ b/arch/arm/plat-omap/io.c
@@ -0,0 +1,107 @@
1#include <linux/module.h>
2#include <linux/io.h>
3#include <linux/mm.h>
4
5#include <mach/omap730.h>
6#include <mach/omap1510.h>
7#include <mach/omap16xx.h>
8#include <mach/omap24xx.h>
9#include <mach/omap34xx.h>
10
11#define BETWEEN(p,st,sz) ((p) >= (st) && (p) < ((st) + (sz)))
12#define XLATE(p,pst,vst) ((void __iomem *)((p) - (pst) + (vst)))
13
14/*
15 * Intercept ioremap() requests for addresses in our fixed mapping regions.
16 */
17void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type)
18{
19#ifdef CONFIG_ARCH_OMAP1
20 if (cpu_class_is_omap1()) {
21 if (BETWEEN(p, IO_PHYS, IO_SIZE))
22 return XLATE(p, IO_PHYS, IO_VIRT);
23 }
24 if (cpu_is_omap730()) {
25 if (BETWEEN(p, OMAP730_DSP_BASE, OMAP730_DSP_SIZE))
26 return XLATE(p, OMAP730_DSP_BASE, OMAP730_DSP_START);
27
28 if (BETWEEN(p, OMAP730_DSPREG_BASE, OMAP730_DSPREG_SIZE))
29 return XLATE(p, OMAP730_DSPREG_BASE,
30 OMAP730_DSPREG_START);
31 }
32 if (cpu_is_omap15xx()) {
33 if (BETWEEN(p, OMAP1510_DSP_BASE, OMAP1510_DSP_SIZE))
34 return XLATE(p, OMAP1510_DSP_BASE, OMAP1510_DSP_START);
35
36 if (BETWEEN(p, OMAP1510_DSPREG_BASE, OMAP1510_DSPREG_SIZE))
37 return XLATE(p, OMAP1510_DSPREG_BASE,
38 OMAP1510_DSPREG_START);
39 }
40 if (cpu_is_omap16xx()) {
41 if (BETWEEN(p, OMAP16XX_DSP_BASE, OMAP16XX_DSP_SIZE))
42 return XLATE(p, OMAP16XX_DSP_BASE, OMAP16XX_DSP_START);
43
44 if (BETWEEN(p, OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_SIZE))
45 return XLATE(p, OMAP16XX_DSPREG_BASE,
46 OMAP16XX_DSPREG_START);
47 }
48#endif
49#ifdef CONFIG_ARCH_OMAP2
50 if (cpu_is_omap24xx()) {
51 if (BETWEEN(p, L3_24XX_PHYS, L3_24XX_SIZE))
52 return XLATE(p, L3_24XX_PHYS, L3_24XX_VIRT);
53 if (BETWEEN(p, L4_24XX_PHYS, L4_24XX_SIZE))
54 return XLATE(p, L4_24XX_PHYS, L4_24XX_VIRT);
55 }
56 if (cpu_is_omap2420()) {
57 if (BETWEEN(p, DSP_MEM_24XX_PHYS, DSP_MEM_24XX_SIZE))
58 return XLATE(p, DSP_MEM_24XX_PHYS, DSP_MEM_24XX_VIRT);
59 if (BETWEEN(p, DSP_IPI_24XX_PHYS, DSP_IPI_24XX_SIZE))
60 return XLATE(p, DSP_IPI_24XX_PHYS, DSP_IPI_24XX_SIZE);
61 if (BETWEEN(p, DSP_MMU_24XX_PHYS, DSP_MMU_24XX_SIZE))
62 return XLATE(p, DSP_MMU_24XX_PHYS, DSP_MMU_24XX_VIRT);
63 }
64 if (cpu_is_omap2430()) {
65 if (BETWEEN(p, L4_WK_243X_PHYS, L4_WK_243X_SIZE))
66 return XLATE(p, L4_WK_243X_PHYS, L4_WK_243X_VIRT);
67 if (BETWEEN(p, OMAP243X_GPMC_PHYS, OMAP243X_GPMC_SIZE))
68 return XLATE(p, OMAP243X_GPMC_PHYS, OMAP243X_GPMC_VIRT);
69 if (BETWEEN(p, OMAP243X_SDRC_PHYS, OMAP243X_SDRC_SIZE))
70 return XLATE(p, OMAP243X_SDRC_PHYS, OMAP243X_SDRC_VIRT);
71 if (BETWEEN(p, OMAP243X_SMS_PHYS, OMAP243X_SMS_SIZE))
72 return XLATE(p, OMAP243X_SMS_PHYS, OMAP243X_SMS_VIRT);
73 }
74#endif
75#ifdef CONFIG_ARCH_OMAP3
76 if (cpu_is_omap34xx()) {
77 if (BETWEEN(p, L3_34XX_PHYS, L3_34XX_SIZE))
78 return XLATE(p, L3_34XX_PHYS, L3_34XX_VIRT);
79 if (BETWEEN(p, L4_34XX_PHYS, L4_34XX_SIZE))
80 return XLATE(p, L4_34XX_PHYS, L4_34XX_VIRT);
81 if (BETWEEN(p, L4_WK_34XX_PHYS, L4_WK_34XX_SIZE))
82 return XLATE(p, L4_WK_34XX_PHYS, L4_WK_34XX_VIRT);
83 if (BETWEEN(p, OMAP34XX_GPMC_PHYS, OMAP34XX_GPMC_SIZE))
84 return XLATE(p, OMAP34XX_GPMC_PHYS, OMAP34XX_GPMC_VIRT);
85 if (BETWEEN(p, OMAP343X_SMS_PHYS, OMAP343X_SMS_SIZE))
86 return XLATE(p, OMAP343X_SMS_PHYS, OMAP343X_SMS_VIRT);
87 if (BETWEEN(p, OMAP343X_SDRC_PHYS, OMAP343X_SDRC_SIZE))
88 return XLATE(p, OMAP343X_SDRC_PHYS, OMAP343X_SDRC_VIRT);
89 if (BETWEEN(p, L4_PER_34XX_PHYS, L4_PER_34XX_SIZE))
90 return XLATE(p, L4_PER_34XX_PHYS, L4_PER_34XX_VIRT);
91 if (BETWEEN(p, L4_EMU_34XX_PHYS, L4_EMU_34XX_SIZE))
92 return XLATE(p, L4_EMU_34XX_PHYS, L4_EMU_34XX_VIRT);
93 }
94#endif
95
96 return __arm_ioremap(p, size, type);
97}
98EXPORT_SYMBOL(omap_ioremap);
99
100void omap_iounmap(volatile void __iomem *addr)
101{
102 unsigned long virt = (unsigned long)addr;
103
104 if (virt >= VMALLOC_START && virt < VMALLOC_END)
105 __iounmap(addr);
106}
107EXPORT_SYMBOL(omap_iounmap);
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 014d26574bb6..af33fc713e1a 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -27,43 +27,65 @@
27#include <mach/dma.h> 27#include <mach/dma.h>
28#include <mach/mcbsp.h> 28#include <mach/mcbsp.h>
29 29
30static struct omap_mcbsp mcbsp[OMAP_MAX_MCBSP_COUNT]; 30struct omap_mcbsp **mcbsp_ptr;
31int omap_mcbsp_count;
31 32
32#define omap_mcbsp_check_valid_id(id) (mcbsp[id].pdata && \ 33void omap_mcbsp_write(void __iomem *io_base, u16 reg, u32 val)
33 mcbsp[id].pdata->ops && \ 34{
34 mcbsp[id].pdata->ops->check && \ 35 if (cpu_class_is_omap1() || cpu_is_omap2420())
35 (mcbsp[id].pdata->ops->check(id) == 0)) 36 __raw_writew((u16)val, io_base + reg);
37 else
38 __raw_writel(val, io_base + reg);
39}
40
41int omap_mcbsp_read(void __iomem *io_base, u16 reg)
42{
43 if (cpu_class_is_omap1() || cpu_is_omap2420())
44 return __raw_readw(io_base + reg);
45 else
46 return __raw_readl(io_base + reg);
47}
48
49#define OMAP_MCBSP_READ(base, reg) \
50 omap_mcbsp_read(base, OMAP_MCBSP_REG_##reg)
51#define OMAP_MCBSP_WRITE(base, reg, val) \
52 omap_mcbsp_write(base, OMAP_MCBSP_REG_##reg, val)
53
54#define omap_mcbsp_check_valid_id(id) (id < omap_mcbsp_count)
55#define id_to_mcbsp_ptr(id) mcbsp_ptr[id];
36 56
37static void omap_mcbsp_dump_reg(u8 id) 57static void omap_mcbsp_dump_reg(u8 id)
38{ 58{
39 dev_dbg(mcbsp[id].dev, "**** McBSP%d regs ****\n", mcbsp[id].id); 59 struct omap_mcbsp *mcbsp = id_to_mcbsp_ptr(id);
40 dev_dbg(mcbsp[id].dev, "DRR2: 0x%04x\n", 60
41 OMAP_MCBSP_READ(mcbsp[id].io_base, DRR2)); 61 dev_dbg(mcbsp->dev, "**** McBSP%d regs ****\n", mcbsp->id);
42 dev_dbg(mcbsp[id].dev, "DRR1: 0x%04x\n", 62 dev_dbg(mcbsp->dev, "DRR2: 0x%04x\n",
43 OMAP_MCBSP_READ(mcbsp[id].io_base, DRR1)); 63 OMAP_MCBSP_READ(mcbsp->io_base, DRR2));
44 dev_dbg(mcbsp[id].dev, "DXR2: 0x%04x\n", 64 dev_dbg(mcbsp->dev, "DRR1: 0x%04x\n",
45 OMAP_MCBSP_READ(mcbsp[id].io_base, DXR2)); 65 OMAP_MCBSP_READ(mcbsp->io_base, DRR1));
46 dev_dbg(mcbsp[id].dev, "DXR1: 0x%04x\n", 66 dev_dbg(mcbsp->dev, "DXR2: 0x%04x\n",
47 OMAP_MCBSP_READ(mcbsp[id].io_base, DXR1)); 67 OMAP_MCBSP_READ(mcbsp->io_base, DXR2));
48 dev_dbg(mcbsp[id].dev, "SPCR2: 0x%04x\n", 68 dev_dbg(mcbsp->dev, "DXR1: 0x%04x\n",
49 OMAP_MCBSP_READ(mcbsp[id].io_base, SPCR2)); 69 OMAP_MCBSP_READ(mcbsp->io_base, DXR1));
50 dev_dbg(mcbsp[id].dev, "SPCR1: 0x%04x\n", 70 dev_dbg(mcbsp->dev, "SPCR2: 0x%04x\n",
51 OMAP_MCBSP_READ(mcbsp[id].io_base, SPCR1)); 71 OMAP_MCBSP_READ(mcbsp->io_base, SPCR2));
52 dev_dbg(mcbsp[id].dev, "RCR2: 0x%04x\n", 72 dev_dbg(mcbsp->dev, "SPCR1: 0x%04x\n",
53 OMAP_MCBSP_READ(mcbsp[id].io_base, RCR2)); 73 OMAP_MCBSP_READ(mcbsp->io_base, SPCR1));
54 dev_dbg(mcbsp[id].dev, "RCR1: 0x%04x\n", 74 dev_dbg(mcbsp->dev, "RCR2: 0x%04x\n",
55 OMAP_MCBSP_READ(mcbsp[id].io_base, RCR1)); 75 OMAP_MCBSP_READ(mcbsp->io_base, RCR2));
56 dev_dbg(mcbsp[id].dev, "XCR2: 0x%04x\n", 76 dev_dbg(mcbsp->dev, "RCR1: 0x%04x\n",
57 OMAP_MCBSP_READ(mcbsp[id].io_base, XCR2)); 77 OMAP_MCBSP_READ(mcbsp->io_base, RCR1));
58 dev_dbg(mcbsp[id].dev, "XCR1: 0x%04x\n", 78 dev_dbg(mcbsp->dev, "XCR2: 0x%04x\n",
59 OMAP_MCBSP_READ(mcbsp[id].io_base, XCR1)); 79 OMAP_MCBSP_READ(mcbsp->io_base, XCR2));
60 dev_dbg(mcbsp[id].dev, "SRGR2: 0x%04x\n", 80 dev_dbg(mcbsp->dev, "XCR1: 0x%04x\n",
61 OMAP_MCBSP_READ(mcbsp[id].io_base, SRGR2)); 81 OMAP_MCBSP_READ(mcbsp->io_base, XCR1));
62 dev_dbg(mcbsp[id].dev, "SRGR1: 0x%04x\n", 82 dev_dbg(mcbsp->dev, "SRGR2: 0x%04x\n",
63 OMAP_MCBSP_READ(mcbsp[id].io_base, SRGR1)); 83 OMAP_MCBSP_READ(mcbsp->io_base, SRGR2));
64 dev_dbg(mcbsp[id].dev, "PCR0: 0x%04x\n", 84 dev_dbg(mcbsp->dev, "SRGR1: 0x%04x\n",
65 OMAP_MCBSP_READ(mcbsp[id].io_base, PCR0)); 85 OMAP_MCBSP_READ(mcbsp->io_base, SRGR1));
66 dev_dbg(mcbsp[id].dev, "***********************\n"); 86 dev_dbg(mcbsp->dev, "PCR0: 0x%04x\n",
87 OMAP_MCBSP_READ(mcbsp->io_base, PCR0));
88 dev_dbg(mcbsp->dev, "***********************\n");
67} 89}
68 90
69static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id) 91static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id)
@@ -126,16 +148,18 @@ static void omap_mcbsp_rx_dma_callback(int lch, u16 ch_status, void *data)
126 */ 148 */
127void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config) 149void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config)
128{ 150{
129 u32 io_base; 151 struct omap_mcbsp *mcbsp;
152 void __iomem *io_base;
130 153
131 if (!omap_mcbsp_check_valid_id(id)) { 154 if (!omap_mcbsp_check_valid_id(id)) {
132 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); 155 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
133 return; 156 return;
134 } 157 }
158 mcbsp = id_to_mcbsp_ptr(id);
135 159
136 io_base = mcbsp[id].io_base; 160 io_base = mcbsp->io_base;
137 dev_dbg(mcbsp[id].dev, "Configuring McBSP%d io_base: 0x%8x\n", 161 dev_dbg(mcbsp->dev, "Configuring McBSP%d phys_base: 0x%08lx\n",
138 mcbsp[id].id, io_base); 162 mcbsp->id, mcbsp->phys_base);
139 163
140 /* We write the given config */ 164 /* We write the given config */
141 OMAP_MCBSP_WRITE(io_base, SPCR2, config->spcr2); 165 OMAP_MCBSP_WRITE(io_base, SPCR2, config->spcr2);
@@ -158,23 +182,26 @@ EXPORT_SYMBOL(omap_mcbsp_config);
158 */ 182 */
159int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type) 183int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type)
160{ 184{
185 struct omap_mcbsp *mcbsp;
186
161 if (!omap_mcbsp_check_valid_id(id)) { 187 if (!omap_mcbsp_check_valid_id(id)) {
162 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); 188 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
163 return -ENODEV; 189 return -ENODEV;
164 } 190 }
191 mcbsp = id_to_mcbsp_ptr(id);
165 192
166 spin_lock(&mcbsp[id].lock); 193 spin_lock(&mcbsp->lock);
167 194
168 if (!mcbsp[id].free) { 195 if (!mcbsp->free) {
169 dev_err(mcbsp[id].dev, "McBSP%d is currently in use\n", 196 dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
170 mcbsp[id].id); 197 mcbsp->id);
171 spin_unlock(&mcbsp[id].lock); 198 spin_unlock(&mcbsp->lock);
172 return -EINVAL; 199 return -EINVAL;
173 } 200 }
174 201
175 mcbsp[id].io_type = io_type; 202 mcbsp->io_type = io_type;
176 203
177 spin_unlock(&mcbsp[id].lock); 204 spin_unlock(&mcbsp->lock);
178 205
179 return 0; 206 return 0;
180} 207}
@@ -182,53 +209,60 @@ EXPORT_SYMBOL(omap_mcbsp_set_io_type);
182 209
183int omap_mcbsp_request(unsigned int id) 210int omap_mcbsp_request(unsigned int id)
184{ 211{
212 struct omap_mcbsp *mcbsp;
185 int err; 213 int err;
186 214
187 if (!omap_mcbsp_check_valid_id(id)) { 215 if (!omap_mcbsp_check_valid_id(id)) {
188 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); 216 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
189 return -ENODEV; 217 return -ENODEV;
190 } 218 }
219 mcbsp = id_to_mcbsp_ptr(id);
191 220
192 if (mcbsp[id].pdata->ops->request) 221 if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request)
193 mcbsp[id].pdata->ops->request(id); 222 mcbsp->pdata->ops->request(id);
194 223
195 clk_enable(mcbsp[id].clk); 224 clk_enable(mcbsp->clk);
196 225
197 spin_lock(&mcbsp[id].lock); 226 spin_lock(&mcbsp->lock);
198 if (!mcbsp[id].free) { 227 if (!mcbsp->free) {
199 dev_err(mcbsp[id].dev, "McBSP%d is currently in use\n", 228 dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
200 mcbsp[id].id); 229 mcbsp->id);
201 spin_unlock(&mcbsp[id].lock); 230 spin_unlock(&mcbsp->lock);
202 return -1; 231 return -1;
203 } 232 }
204 233
205 mcbsp[id].free = 0; 234 mcbsp->free = 0;
206 spin_unlock(&mcbsp[id].lock); 235 spin_unlock(&mcbsp->lock);
236
237 /*
238 * Make sure that transmitter, receiver and sample-rate generator are
239 * not running before activating IRQs.
240 */
241 OMAP_MCBSP_WRITE(mcbsp->io_base, SPCR1, 0);
242 OMAP_MCBSP_WRITE(mcbsp->io_base, SPCR2, 0);
207 243
208 if (mcbsp[id].io_type == OMAP_MCBSP_IRQ_IO) { 244 if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
209 /* We need to get IRQs here */ 245 /* We need to get IRQs here */
210 err = request_irq(mcbsp[id].tx_irq, omap_mcbsp_tx_irq_handler, 246 init_completion(&mcbsp->tx_irq_completion);
211 0, "McBSP", (void *) (&mcbsp[id])); 247 err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler,
248 0, "McBSP", (void *)mcbsp);
212 if (err != 0) { 249 if (err != 0) {
213 dev_err(mcbsp[id].dev, "Unable to request TX IRQ %d " 250 dev_err(mcbsp->dev, "Unable to request TX IRQ %d "
214 "for McBSP%d\n", mcbsp[id].tx_irq, 251 "for McBSP%d\n", mcbsp->tx_irq,
215 mcbsp[id].id); 252 mcbsp->id);
216 return err; 253 return err;
217 } 254 }
218 255
219 init_completion(&(mcbsp[id].tx_irq_completion)); 256 init_completion(&mcbsp->rx_irq_completion);
220 257 err = request_irq(mcbsp->rx_irq, omap_mcbsp_rx_irq_handler,
221 err = request_irq(mcbsp[id].rx_irq, omap_mcbsp_rx_irq_handler, 258 0, "McBSP", (void *)mcbsp);
222 0, "McBSP", (void *) (&mcbsp[id]));
223 if (err != 0) { 259 if (err != 0) {
224 dev_err(mcbsp[id].dev, "Unable to request RX IRQ %d " 260 dev_err(mcbsp->dev, "Unable to request RX IRQ %d "
225 "for McBSP%d\n", mcbsp[id].rx_irq, 261 "for McBSP%d\n", mcbsp->rx_irq,
226 mcbsp[id].id); 262 mcbsp->id);
227 free_irq(mcbsp[id].tx_irq, (void *) (&mcbsp[id])); 263 free_irq(mcbsp->tx_irq, (void *)mcbsp);
228 return err; 264 return err;
229 } 265 }
230
231 init_completion(&(mcbsp[id].rx_irq_completion));
232 } 266 }
233 267
234 return 0; 268 return 0;
@@ -237,31 +271,34 @@ EXPORT_SYMBOL(omap_mcbsp_request);
237 271
238void omap_mcbsp_free(unsigned int id) 272void omap_mcbsp_free(unsigned int id)
239{ 273{
274 struct omap_mcbsp *mcbsp;
275
240 if (!omap_mcbsp_check_valid_id(id)) { 276 if (!omap_mcbsp_check_valid_id(id)) {
241 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); 277 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
242 return; 278 return;
243 } 279 }
280 mcbsp = id_to_mcbsp_ptr(id);
244 281
245 if (mcbsp[id].pdata->ops->free) 282 if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
246 mcbsp[id].pdata->ops->free(id); 283 mcbsp->pdata->ops->free(id);
247 284
248 clk_disable(mcbsp[id].clk); 285 clk_disable(mcbsp->clk);
249 286
250 spin_lock(&mcbsp[id].lock); 287 spin_lock(&mcbsp->lock);
251 if (mcbsp[id].free) { 288 if (mcbsp->free) {
252 dev_err(mcbsp[id].dev, "McBSP%d was not reserved\n", 289 dev_err(mcbsp->dev, "McBSP%d was not reserved\n",
253 mcbsp[id].id); 290 mcbsp->id);
254 spin_unlock(&mcbsp[id].lock); 291 spin_unlock(&mcbsp->lock);
255 return; 292 return;
256 } 293 }
257 294
258 mcbsp[id].free = 1; 295 mcbsp->free = 1;
259 spin_unlock(&mcbsp[id].lock); 296 spin_unlock(&mcbsp->lock);
260 297
261 if (mcbsp[id].io_type == OMAP_MCBSP_IRQ_IO) { 298 if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
262 /* Free IRQs */ 299 /* Free IRQs */
263 free_irq(mcbsp[id].rx_irq, (void *) (&mcbsp[id])); 300 free_irq(mcbsp->rx_irq, (void *)mcbsp);
264 free_irq(mcbsp[id].tx_irq, (void *) (&mcbsp[id])); 301 free_irq(mcbsp->tx_irq, (void *)mcbsp);
265 } 302 }
266} 303}
267EXPORT_SYMBOL(omap_mcbsp_free); 304EXPORT_SYMBOL(omap_mcbsp_free);
@@ -273,18 +310,19 @@ EXPORT_SYMBOL(omap_mcbsp_free);
273 */ 310 */
274void omap_mcbsp_start(unsigned int id) 311void omap_mcbsp_start(unsigned int id)
275{ 312{
276 u32 io_base; 313 struct omap_mcbsp *mcbsp;
314 void __iomem *io_base;
277 u16 w; 315 u16 w;
278 316
279 if (!omap_mcbsp_check_valid_id(id)) { 317 if (!omap_mcbsp_check_valid_id(id)) {
280 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); 318 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
281 return; 319 return;
282 } 320 }
321 mcbsp = id_to_mcbsp_ptr(id);
322 io_base = mcbsp->io_base;
283 323
284 io_base = mcbsp[id].io_base; 324 mcbsp->rx_word_length = (OMAP_MCBSP_READ(io_base, RCR1) >> 5) & 0x7;
285 325 mcbsp->tx_word_length = (OMAP_MCBSP_READ(io_base, XCR1) >> 5) & 0x7;
286 mcbsp[id].rx_word_length = (OMAP_MCBSP_READ(io_base, RCR1) >> 5) & 0x7;
287 mcbsp[id].tx_word_length = (OMAP_MCBSP_READ(io_base, XCR1) >> 5) & 0x7;
288 326
289 /* Start the sample generator */ 327 /* Start the sample generator */
290 w = OMAP_MCBSP_READ(io_base, SPCR2); 328 w = OMAP_MCBSP_READ(io_base, SPCR2);
@@ -310,7 +348,8 @@ EXPORT_SYMBOL(omap_mcbsp_start);
310 348
311void omap_mcbsp_stop(unsigned int id) 349void omap_mcbsp_stop(unsigned int id)
312{ 350{
313 u32 io_base; 351 struct omap_mcbsp *mcbsp;
352 void __iomem *io_base;
314 u16 w; 353 u16 w;
315 354
316 if (!omap_mcbsp_check_valid_id(id)) { 355 if (!omap_mcbsp_check_valid_id(id)) {
@@ -318,7 +357,8 @@ void omap_mcbsp_stop(unsigned int id)
318 return; 357 return;
319 } 358 }
320 359
321 io_base = mcbsp[id].io_base; 360 mcbsp = id_to_mcbsp_ptr(id);
361 io_base = mcbsp->io_base;
322 362
323 /* Reset transmitter */ 363 /* Reset transmitter */
324 w = OMAP_MCBSP_READ(io_base, SPCR2); 364 w = OMAP_MCBSP_READ(io_base, SPCR2);
@@ -337,14 +377,17 @@ EXPORT_SYMBOL(omap_mcbsp_stop);
337/* polled mcbsp i/o operations */ 377/* polled mcbsp i/o operations */
338int omap_mcbsp_pollwrite(unsigned int id, u16 buf) 378int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
339{ 379{
340 u32 base; 380 struct omap_mcbsp *mcbsp;
381 void __iomem *base;
341 382
342 if (!omap_mcbsp_check_valid_id(id)) { 383 if (!omap_mcbsp_check_valid_id(id)) {
343 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); 384 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
344 return -ENODEV; 385 return -ENODEV;
345 } 386 }
346 387
347 base = mcbsp[id].io_base; 388 mcbsp = id_to_mcbsp_ptr(id);
389 base = mcbsp->io_base;
390
348 writew(buf, base + OMAP_MCBSP_REG_DXR1); 391 writew(buf, base + OMAP_MCBSP_REG_DXR1);
349 /* if frame sync error - clear the error */ 392 /* if frame sync error - clear the error */
350 if (readw(base + OMAP_MCBSP_REG_SPCR2) & XSYNC_ERR) { 393 if (readw(base + OMAP_MCBSP_REG_SPCR2) & XSYNC_ERR) {
@@ -366,8 +409,8 @@ int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
366 (XRST), 409 (XRST),
367 base + OMAP_MCBSP_REG_SPCR2); 410 base + OMAP_MCBSP_REG_SPCR2);
368 udelay(10); 411 udelay(10);
369 dev_err(mcbsp[id].dev, "Could not write to" 412 dev_err(mcbsp->dev, "Could not write to"
370 " McBSP%d Register\n", mcbsp[id].id); 413 " McBSP%d Register\n", mcbsp->id);
371 return -2; 414 return -2;
372 } 415 }
373 } 416 }
@@ -379,14 +422,16 @@ EXPORT_SYMBOL(omap_mcbsp_pollwrite);
379 422
380int omap_mcbsp_pollread(unsigned int id, u16 *buf) 423int omap_mcbsp_pollread(unsigned int id, u16 *buf)
381{ 424{
382 u32 base; 425 struct omap_mcbsp *mcbsp;
426 void __iomem *base;
383 427
384 if (!omap_mcbsp_check_valid_id(id)) { 428 if (!omap_mcbsp_check_valid_id(id)) {
385 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); 429 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
386 return -ENODEV; 430 return -ENODEV;
387 } 431 }
432 mcbsp = id_to_mcbsp_ptr(id);
388 433
389 base = mcbsp[id].io_base; 434 base = mcbsp->io_base;
390 /* if frame sync error - clear the error */ 435 /* if frame sync error - clear the error */
391 if (readw(base + OMAP_MCBSP_REG_SPCR1) & RSYNC_ERR) { 436 if (readw(base + OMAP_MCBSP_REG_SPCR1) & RSYNC_ERR) {
392 /* clear error */ 437 /* clear error */
@@ -407,8 +452,8 @@ int omap_mcbsp_pollread(unsigned int id, u16 *buf)
407 (RRST), 452 (RRST),
408 base + OMAP_MCBSP_REG_SPCR1); 453 base + OMAP_MCBSP_REG_SPCR1);
409 udelay(10); 454 udelay(10);
410 dev_err(mcbsp[id].dev, "Could not read from" 455 dev_err(mcbsp->dev, "Could not read from"
411 " McBSP%d Register\n", mcbsp[id].id); 456 " McBSP%d Register\n", mcbsp->id);
412 return -2; 457 return -2;
413 } 458 }
414 } 459 }
@@ -424,7 +469,8 @@ EXPORT_SYMBOL(omap_mcbsp_pollread);
424 */ 469 */
425void omap_mcbsp_xmit_word(unsigned int id, u32 word) 470void omap_mcbsp_xmit_word(unsigned int id, u32 word)
426{ 471{
427 u32 io_base; 472 struct omap_mcbsp *mcbsp;
473 void __iomem *io_base;
428 omap_mcbsp_word_length word_length; 474 omap_mcbsp_word_length word_length;
429 475
430 if (!omap_mcbsp_check_valid_id(id)) { 476 if (!omap_mcbsp_check_valid_id(id)) {
@@ -432,10 +478,11 @@ void omap_mcbsp_xmit_word(unsigned int id, u32 word)
432 return; 478 return;
433 } 479 }
434 480
435 io_base = mcbsp[id].io_base; 481 mcbsp = id_to_mcbsp_ptr(id);
436 word_length = mcbsp[id].tx_word_length; 482 io_base = mcbsp->io_base;
483 word_length = mcbsp->tx_word_length;
437 484
438 wait_for_completion(&(mcbsp[id].tx_irq_completion)); 485 wait_for_completion(&mcbsp->tx_irq_completion);
439 486
440 if (word_length > OMAP_MCBSP_WORD_16) 487 if (word_length > OMAP_MCBSP_WORD_16)
441 OMAP_MCBSP_WRITE(io_base, DXR2, word >> 16); 488 OMAP_MCBSP_WRITE(io_base, DXR2, word >> 16);
@@ -445,7 +492,8 @@ EXPORT_SYMBOL(omap_mcbsp_xmit_word);
445 492
446u32 omap_mcbsp_recv_word(unsigned int id) 493u32 omap_mcbsp_recv_word(unsigned int id)
447{ 494{
448 u32 io_base; 495 struct omap_mcbsp *mcbsp;
496 void __iomem *io_base;
449 u16 word_lsb, word_msb = 0; 497 u16 word_lsb, word_msb = 0;
450 omap_mcbsp_word_length word_length; 498 omap_mcbsp_word_length word_length;
451 499
@@ -453,11 +501,12 @@ u32 omap_mcbsp_recv_word(unsigned int id)
453 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); 501 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
454 return -ENODEV; 502 return -ENODEV;
455 } 503 }
504 mcbsp = id_to_mcbsp_ptr(id);
456 505
457 word_length = mcbsp[id].rx_word_length; 506 word_length = mcbsp->rx_word_length;
458 io_base = mcbsp[id].io_base; 507 io_base = mcbsp->io_base;
459 508
460 wait_for_completion(&(mcbsp[id].rx_irq_completion)); 509 wait_for_completion(&mcbsp->rx_irq_completion);
461 510
462 if (word_length > OMAP_MCBSP_WORD_16) 511 if (word_length > OMAP_MCBSP_WORD_16)
463 word_msb = OMAP_MCBSP_READ(io_base, DRR2); 512 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
@@ -469,7 +518,8 @@ EXPORT_SYMBOL(omap_mcbsp_recv_word);
469 518
470int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word) 519int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word)
471{ 520{
472 u32 io_base; 521 struct omap_mcbsp *mcbsp;
522 void __iomem *io_base;
473 omap_mcbsp_word_length tx_word_length; 523 omap_mcbsp_word_length tx_word_length;
474 omap_mcbsp_word_length rx_word_length; 524 omap_mcbsp_word_length rx_word_length;
475 u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0; 525 u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
@@ -478,10 +528,10 @@ int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word)
478 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); 528 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
479 return -ENODEV; 529 return -ENODEV;
480 } 530 }
481 531 mcbsp = id_to_mcbsp_ptr(id);
482 io_base = mcbsp[id].io_base; 532 io_base = mcbsp->io_base;
483 tx_word_length = mcbsp[id].tx_word_length; 533 tx_word_length = mcbsp->tx_word_length;
484 rx_word_length = mcbsp[id].rx_word_length; 534 rx_word_length = mcbsp->rx_word_length;
485 535
486 if (tx_word_length != rx_word_length) 536 if (tx_word_length != rx_word_length)
487 return -EINVAL; 537 return -EINVAL;
@@ -496,8 +546,8 @@ int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word)
496 udelay(10); 546 udelay(10);
497 OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST); 547 OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST);
498 udelay(10); 548 udelay(10);
499 dev_err(mcbsp[id].dev, "McBSP%d transmitter not " 549 dev_err(mcbsp->dev, "McBSP%d transmitter not "
500 "ready\n", mcbsp[id].id); 550 "ready\n", mcbsp->id);
501 return -EAGAIN; 551 return -EAGAIN;
502 } 552 }
503 } 553 }
@@ -517,8 +567,8 @@ int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word)
517 udelay(10); 567 udelay(10);
518 OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST); 568 OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST);
519 udelay(10); 569 udelay(10);
520 dev_err(mcbsp[id].dev, "McBSP%d receiver not " 570 dev_err(mcbsp->dev, "McBSP%d receiver not "
521 "ready\n", mcbsp[id].id); 571 "ready\n", mcbsp->id);
522 return -EAGAIN; 572 return -EAGAIN;
523 } 573 }
524 } 574 }
@@ -534,7 +584,9 @@ EXPORT_SYMBOL(omap_mcbsp_spi_master_xmit_word_poll);
534 584
535int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word) 585int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word)
536{ 586{
537 u32 io_base, clock_word = 0; 587 struct omap_mcbsp *mcbsp;
588 u32 clock_word = 0;
589 void __iomem *io_base;
538 omap_mcbsp_word_length tx_word_length; 590 omap_mcbsp_word_length tx_word_length;
539 omap_mcbsp_word_length rx_word_length; 591 omap_mcbsp_word_length rx_word_length;
540 u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0; 592 u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
@@ -544,9 +596,11 @@ int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word)
544 return -ENODEV; 596 return -ENODEV;
545 } 597 }
546 598
547 io_base = mcbsp[id].io_base; 599 mcbsp = id_to_mcbsp_ptr(id);
548 tx_word_length = mcbsp[id].tx_word_length; 600 io_base = mcbsp->io_base;
549 rx_word_length = mcbsp[id].rx_word_length; 601
602 tx_word_length = mcbsp->tx_word_length;
603 rx_word_length = mcbsp->rx_word_length;
550 604
551 if (tx_word_length != rx_word_length) 605 if (tx_word_length != rx_word_length)
552 return -EINVAL; 606 return -EINVAL;
@@ -561,8 +615,8 @@ int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word)
561 udelay(10); 615 udelay(10);
562 OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST); 616 OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST);
563 udelay(10); 617 udelay(10);
564 dev_err(mcbsp[id].dev, "McBSP%d transmitter not " 618 dev_err(mcbsp->dev, "McBSP%d transmitter not "
565 "ready\n", mcbsp[id].id); 619 "ready\n", mcbsp->id);
566 return -EAGAIN; 620 return -EAGAIN;
567 } 621 }
568 } 622 }
@@ -582,8 +636,8 @@ int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word)
582 udelay(10); 636 udelay(10);
583 OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST); 637 OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST);
584 udelay(10); 638 udelay(10);
585 dev_err(mcbsp[id].dev, "McBSP%d receiver not " 639 dev_err(mcbsp->dev, "McBSP%d receiver not "
586 "ready\n", mcbsp[id].id); 640 "ready\n", mcbsp->id);
587 return -EAGAIN; 641 return -EAGAIN;
588 } 642 }
589 } 643 }
@@ -609,6 +663,7 @@ EXPORT_SYMBOL(omap_mcbsp_spi_master_recv_word_poll);
609int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, 663int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer,
610 unsigned int length) 664 unsigned int length)
611{ 665{
666 struct omap_mcbsp *mcbsp;
612 int dma_tx_ch; 667 int dma_tx_ch;
613 int src_port = 0; 668 int src_port = 0;
614 int dest_port = 0; 669 int dest_port = 0;
@@ -618,50 +673,51 @@ int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer,
618 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); 673 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
619 return -ENODEV; 674 return -ENODEV;
620 } 675 }
676 mcbsp = id_to_mcbsp_ptr(id);
621 677
622 if (omap_request_dma(mcbsp[id].dma_tx_sync, "McBSP TX", 678 if (omap_request_dma(mcbsp->dma_tx_sync, "McBSP TX",
623 omap_mcbsp_tx_dma_callback, 679 omap_mcbsp_tx_dma_callback,
624 &mcbsp[id], 680 mcbsp,
625 &dma_tx_ch)) { 681 &dma_tx_ch)) {
626 dev_err(mcbsp[id].dev, " Unable to request DMA channel for " 682 dev_err(mcbsp->dev, " Unable to request DMA channel for "
627 "McBSP%d TX. Trying IRQ based TX\n", 683 "McBSP%d TX. Trying IRQ based TX\n",
628 mcbsp[id].id); 684 mcbsp->id);
629 return -EAGAIN; 685 return -EAGAIN;
630 } 686 }
631 mcbsp[id].dma_tx_lch = dma_tx_ch; 687 mcbsp->dma_tx_lch = dma_tx_ch;
632 688
633 dev_err(mcbsp[id].dev, "McBSP%d TX DMA on channel %d\n", mcbsp[id].id, 689 dev_err(mcbsp->dev, "McBSP%d TX DMA on channel %d\n", mcbsp->id,
634 dma_tx_ch); 690 dma_tx_ch);
635 691
636 init_completion(&(mcbsp[id].tx_dma_completion)); 692 init_completion(&mcbsp->tx_dma_completion);
637 693
638 if (cpu_class_is_omap1()) { 694 if (cpu_class_is_omap1()) {
639 src_port = OMAP_DMA_PORT_TIPB; 695 src_port = OMAP_DMA_PORT_TIPB;
640 dest_port = OMAP_DMA_PORT_EMIFF; 696 dest_port = OMAP_DMA_PORT_EMIFF;
641 } 697 }
642 if (cpu_class_is_omap2()) 698 if (cpu_class_is_omap2())
643 sync_dev = mcbsp[id].dma_tx_sync; 699 sync_dev = mcbsp->dma_tx_sync;
644 700
645 omap_set_dma_transfer_params(mcbsp[id].dma_tx_lch, 701 omap_set_dma_transfer_params(mcbsp->dma_tx_lch,
646 OMAP_DMA_DATA_TYPE_S16, 702 OMAP_DMA_DATA_TYPE_S16,
647 length >> 1, 1, 703 length >> 1, 1,
648 OMAP_DMA_SYNC_ELEMENT, 704 OMAP_DMA_SYNC_ELEMENT,
649 sync_dev, 0); 705 sync_dev, 0);
650 706
651 omap_set_dma_dest_params(mcbsp[id].dma_tx_lch, 707 omap_set_dma_dest_params(mcbsp->dma_tx_lch,
652 src_port, 708 src_port,
653 OMAP_DMA_AMODE_CONSTANT, 709 OMAP_DMA_AMODE_CONSTANT,
654 mcbsp[id].phys_base + OMAP_MCBSP_REG_DXR1, 710 mcbsp->phys_base + OMAP_MCBSP_REG_DXR1,
655 0, 0); 711 0, 0);
656 712
657 omap_set_dma_src_params(mcbsp[id].dma_tx_lch, 713 omap_set_dma_src_params(mcbsp->dma_tx_lch,
658 dest_port, 714 dest_port,
659 OMAP_DMA_AMODE_POST_INC, 715 OMAP_DMA_AMODE_POST_INC,
660 buffer, 716 buffer,
661 0, 0); 717 0, 0);
662 718
663 omap_start_dma(mcbsp[id].dma_tx_lch); 719 omap_start_dma(mcbsp->dma_tx_lch);
664 wait_for_completion(&(mcbsp[id].tx_dma_completion)); 720 wait_for_completion(&mcbsp->tx_dma_completion);
665 721
666 return 0; 722 return 0;
667} 723}
@@ -670,6 +726,7 @@ EXPORT_SYMBOL(omap_mcbsp_xmit_buffer);
670int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, 726int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer,
671 unsigned int length) 727 unsigned int length)
672{ 728{
729 struct omap_mcbsp *mcbsp;
673 int dma_rx_ch; 730 int dma_rx_ch;
674 int src_port = 0; 731 int src_port = 0;
675 int dest_port = 0; 732 int dest_port = 0;
@@ -679,50 +736,51 @@ int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer,
679 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); 736 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
680 return -ENODEV; 737 return -ENODEV;
681 } 738 }
739 mcbsp = id_to_mcbsp_ptr(id);
682 740
683 if (omap_request_dma(mcbsp[id].dma_rx_sync, "McBSP RX", 741 if (omap_request_dma(mcbsp->dma_rx_sync, "McBSP RX",
684 omap_mcbsp_rx_dma_callback, 742 omap_mcbsp_rx_dma_callback,
685 &mcbsp[id], 743 mcbsp,
686 &dma_rx_ch)) { 744 &dma_rx_ch)) {
687 dev_err(mcbsp[id].dev, "Unable to request DMA channel for " 745 dev_err(mcbsp->dev, "Unable to request DMA channel for "
688 "McBSP%d RX. Trying IRQ based RX\n", 746 "McBSP%d RX. Trying IRQ based RX\n",
689 mcbsp[id].id); 747 mcbsp->id);
690 return -EAGAIN; 748 return -EAGAIN;
691 } 749 }
692 mcbsp[id].dma_rx_lch = dma_rx_ch; 750 mcbsp->dma_rx_lch = dma_rx_ch;
693 751
694 dev_err(mcbsp[id].dev, "McBSP%d RX DMA on channel %d\n", mcbsp[id].id, 752 dev_err(mcbsp->dev, "McBSP%d RX DMA on channel %d\n", mcbsp->id,
695 dma_rx_ch); 753 dma_rx_ch);
696 754
697 init_completion(&(mcbsp[id].rx_dma_completion)); 755 init_completion(&mcbsp->rx_dma_completion);
698 756
699 if (cpu_class_is_omap1()) { 757 if (cpu_class_is_omap1()) {
700 src_port = OMAP_DMA_PORT_TIPB; 758 src_port = OMAP_DMA_PORT_TIPB;
701 dest_port = OMAP_DMA_PORT_EMIFF; 759 dest_port = OMAP_DMA_PORT_EMIFF;
702 } 760 }
703 if (cpu_class_is_omap2()) 761 if (cpu_class_is_omap2())
704 sync_dev = mcbsp[id].dma_rx_sync; 762 sync_dev = mcbsp->dma_rx_sync;
705 763
706 omap_set_dma_transfer_params(mcbsp[id].dma_rx_lch, 764 omap_set_dma_transfer_params(mcbsp->dma_rx_lch,
707 OMAP_DMA_DATA_TYPE_S16, 765 OMAP_DMA_DATA_TYPE_S16,
708 length >> 1, 1, 766 length >> 1, 1,
709 OMAP_DMA_SYNC_ELEMENT, 767 OMAP_DMA_SYNC_ELEMENT,
710 sync_dev, 0); 768 sync_dev, 0);
711 769
712 omap_set_dma_src_params(mcbsp[id].dma_rx_lch, 770 omap_set_dma_src_params(mcbsp->dma_rx_lch,
713 src_port, 771 src_port,
714 OMAP_DMA_AMODE_CONSTANT, 772 OMAP_DMA_AMODE_CONSTANT,
715 mcbsp[id].phys_base + OMAP_MCBSP_REG_DRR1, 773 mcbsp->phys_base + OMAP_MCBSP_REG_DRR1,
716 0, 0); 774 0, 0);
717 775
718 omap_set_dma_dest_params(mcbsp[id].dma_rx_lch, 776 omap_set_dma_dest_params(mcbsp->dma_rx_lch,
719 dest_port, 777 dest_port,
720 OMAP_DMA_AMODE_POST_INC, 778 OMAP_DMA_AMODE_POST_INC,
721 buffer, 779 buffer,
722 0, 0); 780 0, 0);
723 781
724 omap_start_dma(mcbsp[id].dma_rx_lch); 782 omap_start_dma(mcbsp->dma_rx_lch);
725 wait_for_completion(&(mcbsp[id].rx_dma_completion)); 783 wait_for_completion(&mcbsp->rx_dma_completion);
726 784
727 return 0; 785 return 0;
728} 786}
@@ -737,12 +795,14 @@ EXPORT_SYMBOL(omap_mcbsp_recv_buffer);
737void omap_mcbsp_set_spi_mode(unsigned int id, 795void omap_mcbsp_set_spi_mode(unsigned int id,
738 const struct omap_mcbsp_spi_cfg *spi_cfg) 796 const struct omap_mcbsp_spi_cfg *spi_cfg)
739{ 797{
798 struct omap_mcbsp *mcbsp;
740 struct omap_mcbsp_reg_cfg mcbsp_cfg; 799 struct omap_mcbsp_reg_cfg mcbsp_cfg;
741 800
742 if (!omap_mcbsp_check_valid_id(id)) { 801 if (!omap_mcbsp_check_valid_id(id)) {
743 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); 802 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
744 return; 803 return;
745 } 804 }
805 mcbsp = id_to_mcbsp_ptr(id);
746 806
747 memset(&mcbsp_cfg, 0, sizeof(struct omap_mcbsp_reg_cfg)); 807 memset(&mcbsp_cfg, 0, sizeof(struct omap_mcbsp_reg_cfg));
748 808
@@ -803,9 +863,10 @@ EXPORT_SYMBOL(omap_mcbsp_set_spi_mode);
803 * McBSP1 and McBSP3 are directly mapped on 1610 and 1510. 863 * McBSP1 and McBSP3 are directly mapped on 1610 and 1510.
804 * 730 has only 2 McBSP, and both of them are MPU peripherals. 864 * 730 has only 2 McBSP, and both of them are MPU peripherals.
805 */ 865 */
806static int __init omap_mcbsp_probe(struct platform_device *pdev) 866static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
807{ 867{
808 struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data; 868 struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data;
869 struct omap_mcbsp *mcbsp;
809 int id = pdev->id - 1; 870 int id = pdev->id - 1;
810 int ret = 0; 871 int ret = 0;
811 872
@@ -818,47 +879,63 @@ static int __init omap_mcbsp_probe(struct platform_device *pdev)
818 879
819 dev_dbg(&pdev->dev, "Initializing OMAP McBSP (%d).\n", pdev->id); 880 dev_dbg(&pdev->dev, "Initializing OMAP McBSP (%d).\n", pdev->id);
820 881
821 if (id >= OMAP_MAX_MCBSP_COUNT) { 882 if (id >= omap_mcbsp_count) {
822 dev_err(&pdev->dev, "Invalid McBSP device id (%d)\n", id); 883 dev_err(&pdev->dev, "Invalid McBSP device id (%d)\n", id);
823 ret = -EINVAL; 884 ret = -EINVAL;
824 goto exit; 885 goto exit;
825 } 886 }
826 887
827 spin_lock_init(&mcbsp[id].lock); 888 mcbsp = kzalloc(sizeof(struct omap_mcbsp), GFP_KERNEL);
828 mcbsp[id].id = id + 1; 889 if (!mcbsp) {
829 mcbsp[id].free = 1; 890 ret = -ENOMEM;
830 mcbsp[id].dma_tx_lch = -1; 891 goto exit;
831 mcbsp[id].dma_rx_lch = -1; 892 }
893 mcbsp_ptr[id] = mcbsp;
894
895 spin_lock_init(&mcbsp->lock);
896 mcbsp->id = id + 1;
897 mcbsp->free = 1;
898 mcbsp->dma_tx_lch = -1;
899 mcbsp->dma_rx_lch = -1;
900
901 mcbsp->phys_base = pdata->phys_base;
902 mcbsp->io_base = ioremap(pdata->phys_base, SZ_4K);
903 if (!mcbsp->io_base) {
904 ret = -ENOMEM;
905 goto err_ioremap;
906 }
832 907
833 mcbsp[id].phys_base = pdata->phys_base;
834 mcbsp[id].io_base = pdata->virt_base;
835 /* Default I/O is IRQ based */ 908 /* Default I/O is IRQ based */
836 mcbsp[id].io_type = OMAP_MCBSP_IRQ_IO; 909 mcbsp->io_type = OMAP_MCBSP_IRQ_IO;
837 mcbsp[id].tx_irq = pdata->tx_irq; 910 mcbsp->tx_irq = pdata->tx_irq;
838 mcbsp[id].rx_irq = pdata->rx_irq; 911 mcbsp->rx_irq = pdata->rx_irq;
839 mcbsp[id].dma_rx_sync = pdata->dma_rx_sync; 912 mcbsp->dma_rx_sync = pdata->dma_rx_sync;
840 mcbsp[id].dma_tx_sync = pdata->dma_tx_sync; 913 mcbsp->dma_tx_sync = pdata->dma_tx_sync;
841 914
842 if (pdata->clk_name) 915 if (pdata->clk_name)
843 mcbsp[id].clk = clk_get(&pdev->dev, pdata->clk_name); 916 mcbsp->clk = clk_get(&pdev->dev, pdata->clk_name);
844 if (IS_ERR(mcbsp[id].clk)) { 917 if (IS_ERR(mcbsp->clk)) {
845 mcbsp[id].free = 0;
846 dev_err(&pdev->dev, 918 dev_err(&pdev->dev,
847 "Invalid clock configuration for McBSP%d.\n", 919 "Invalid clock configuration for McBSP%d.\n",
848 mcbsp[id].id); 920 mcbsp->id);
849 ret = -EINVAL; 921 ret = PTR_ERR(mcbsp->clk);
850 goto exit; 922 goto err_clk;
851 } 923 }
852 924
853 mcbsp[id].pdata = pdata; 925 mcbsp->pdata = pdata;
854 mcbsp[id].dev = &pdev->dev; 926 mcbsp->dev = &pdev->dev;
855 platform_set_drvdata(pdev, &mcbsp[id]); 927 platform_set_drvdata(pdev, mcbsp);
928 return 0;
856 929
930err_clk:
931 iounmap(mcbsp->io_base);
932err_ioremap:
933 mcbsp->free = 0;
857exit: 934exit:
858 return ret; 935 return ret;
859} 936}
860 937
861static int omap_mcbsp_remove(struct platform_device *pdev) 938static int __devexit omap_mcbsp_remove(struct platform_device *pdev)
862{ 939{
863 struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev); 940 struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev);
864 941
@@ -872,6 +949,8 @@ static int omap_mcbsp_remove(struct platform_device *pdev)
872 clk_disable(mcbsp->clk); 949 clk_disable(mcbsp->clk);
873 clk_put(mcbsp->clk); 950 clk_put(mcbsp->clk);
874 951
952 iounmap(mcbsp->io_base);
953
875 mcbsp->clk = NULL; 954 mcbsp->clk = NULL;
876 mcbsp->free = 0; 955 mcbsp->free = 0;
877 mcbsp->dev = NULL; 956 mcbsp->dev = NULL;
@@ -882,7 +961,7 @@ static int omap_mcbsp_remove(struct platform_device *pdev)
882 961
883static struct platform_driver omap_mcbsp_driver = { 962static struct platform_driver omap_mcbsp_driver = {
884 .probe = omap_mcbsp_probe, 963 .probe = omap_mcbsp_probe,
885 .remove = omap_mcbsp_remove, 964 .remove = __devexit_p(omap_mcbsp_remove),
886 .driver = { 965 .driver = {
887 .name = "omap-mcbsp", 966 .name = "omap-mcbsp",
888 }, 967 },
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index e0003e0746e7..9f9a921829c0 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -271,7 +271,7 @@ int __init omap1_sram_init(void)
271#define omap1_sram_init() do {} while (0) 271#define omap1_sram_init() do {} while (0)
272#endif 272#endif
273 273
274#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 274#if defined(CONFIG_ARCH_OMAP2)
275 275
276static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, 276static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
277 u32 base_cs, u32 force_unlock); 277 u32 base_cs, u32 force_unlock);
@@ -352,23 +352,19 @@ static inline int omap243x_sram_init(void)
352 352
353#ifdef CONFIG_ARCH_OMAP3 353#ifdef CONFIG_ARCH_OMAP3
354 354
355static u32 (*_omap2_sram_reprogram_gpmc)(u32 perf_level); 355static u32 (*_omap3_sram_configure_core_dpll)(u32 sdrc_rfr_ctrl,
356u32 omap2_sram_reprogram_gpmc(u32 perf_level) 356 u32 sdrc_actim_ctrla,
357{ 357 u32 sdrc_actim_ctrlb,
358 if (!_omap2_sram_reprogram_gpmc) 358 u32 m2);
359 omap_sram_error(); 359u32 omap3_configure_core_dpll(u32 sdrc_rfr_ctrl, u32 sdrc_actim_ctrla,
360 360 u32 sdrc_actim_ctrlb, u32 m2)
361 return _omap2_sram_reprogram_gpmc(perf_level);
362}
363
364static u32 (*_omap2_sram_configure_core_dpll)(u32 m, u32 n,
365 u32 freqsel, u32 m2);
366u32 omap2_sram_configure_core_dpll(u32 m, u32 n, u32 freqsel, u32 m2)
367{ 361{
368 if (!_omap2_sram_configure_core_dpll) 362 if (!_omap3_sram_configure_core_dpll)
369 omap_sram_error(); 363 omap_sram_error();
370 364
371 return _omap2_sram_configure_core_dpll(m, n, freqsel, m2); 365 return _omap3_sram_configure_core_dpll(sdrc_rfr_ctrl,
366 sdrc_actim_ctrla,
367 sdrc_actim_ctrlb, m2);
372} 368}
373 369
374/* REVISIT: Should this be same as omap34xx_sram_init() after off-idle? */ 370/* REVISIT: Should this be same as omap34xx_sram_init() after off-idle? */
@@ -376,31 +372,16 @@ void restore_sram_functions(void)
376{ 372{
377 omap_sram_ceil = omap_sram_base + omap_sram_size; 373 omap_sram_ceil = omap_sram_base + omap_sram_size;
378 374
379 _omap2_sram_reprogram_gpmc = omap_sram_push(omap34xx_sram_reprogram_gpmc, 375 _omap3_sram_configure_core_dpll =
380 omap34xx_sram_reprogram_gpmc_sz); 376 omap_sram_push(omap3_sram_configure_core_dpll,
381 377 omap3_sram_configure_core_dpll_sz);
382 _omap2_sram_configure_core_dpll =
383 omap_sram_push(omap34xx_sram_configure_core_dpll,
384 omap34xx_sram_configure_core_dpll_sz);
385} 378}
386 379
387int __init omap34xx_sram_init(void) 380int __init omap34xx_sram_init(void)
388{ 381{
389 _omap2_sram_ddr_init = omap_sram_push(omap34xx_sram_ddr_init, 382 _omap3_sram_configure_core_dpll =
390 omap34xx_sram_ddr_init_sz); 383 omap_sram_push(omap3_sram_configure_core_dpll,
391 384 omap3_sram_configure_core_dpll_sz);
392 _omap2_sram_reprogram_sdrc = omap_sram_push(omap34xx_sram_reprogram_sdrc,
393 omap34xx_sram_reprogram_sdrc_sz);
394
395 _omap2_set_prcm = omap_sram_push(omap34xx_sram_set_prcm,
396 omap34xx_sram_set_prcm_sz);
397
398 _omap2_sram_reprogram_gpmc = omap_sram_push(omap34xx_sram_reprogram_gpmc,
399 omap34xx_sram_reprogram_gpmc_sz);
400
401 _omap2_sram_configure_core_dpll =
402 omap_sram_push(omap34xx_sram_configure_core_dpll,
403 omap34xx_sram_configure_core_dpll_sz);
404 385
405 return 0; 386 return 0;
406} 387}
diff --git a/arch/arm/plat-s3c/Makefile b/arch/arm/plat-s3c/Makefile
new file mode 100644
index 000000000000..f03d7b35ba37
--- /dev/null
+++ b/arch/arm/plat-s3c/Makefile
@@ -0,0 +1,3 @@
1# dummy makefile, currently just including asm/arm/plat-s3c/include/plat
2
3obj-n := dummy.o
diff --git a/arch/arm/plat-s3c/include/plat/debug-macro.S b/arch/arm/plat-s3c/include/plat/debug-macro.S
new file mode 100644
index 000000000000..4aa7e2e6c001
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/debug-macro.S
@@ -0,0 +1,75 @@
1/* linux/include/asm-arm/plat-s3c/debug-macro.S
2 *
3 * Copyright 2005, 2007 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <plat/regs-serial.h>
13
14/* The S3C2440 implementations are used by default as they are the
15 * most widely re-used */
16
17 .macro fifo_level_s3c2440 rd, rx
18 ldr \rd, [ \rx, # S3C2410_UFSTAT ]
19 and \rd, \rd, #S3C2440_UFSTAT_TXMASK
20 .endm
21
22#ifndef fifo_level
23#define fifo_level fifo_level_s3c2410
24#endif
25
26 .macro fifo_full_s3c2440 rd, rx
27 ldr \rd, [ \rx, # S3C2410_UFSTAT ]
28 tst \rd, #S3C2440_UFSTAT_TXFULL
29 .endm
30
31#ifndef fifo_full
32#define fifo_full fifo_full_s3c2440
33#endif
34
35 .macro senduart,rd,rx
36 strb \rd, [\rx, # S3C2410_UTXH ]
37 .endm
38
39 .macro busyuart, rd, rx
40 ldr \rd, [ \rx, # S3C2410_UFCON ]
41 tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled?
42 beq 1001f @
43 @ FIFO enabled...
441003:
45 fifo_full \rd, \rx
46 bne 1003b
47 b 1002f
48
491001:
50 @ busy waiting for non fifo
51 ldr \rd, [ \rx, # S3C2410_UTRSTAT ]
52 tst \rd, #S3C2410_UTRSTAT_TXFE
53 beq 1001b
54
551002: @ exit busyuart
56 .endm
57
58 .macro waituart,rd,rx
59 ldr \rd, [ \rx, # S3C2410_UFCON ]
60 tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled?
61 beq 1001f @
62 @ FIFO enabled...
631003:
64 fifo_level \rd, \rx
65 teq \rd, #0
66 bne 1003b
67 b 1002f
681001:
69 @ idle waiting for non fifo
70 ldr \rd, [ \rx, # S3C2410_UTRSTAT ]
71 tst \rd, #S3C2410_UTRSTAT_TXFE
72 beq 1001b
73
741002: @ exit busyuart
75 .endm
diff --git a/arch/arm/plat-s3c/include/plat/map.h b/arch/arm/plat-s3c/include/plat/map.h
new file mode 100644
index 000000000000..b84289d32a54
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/map.h
@@ -0,0 +1,40 @@
1/* linux/include/asm-arm/plat-s3c/map.h
2 *
3 * Copyright 2003, 2007 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * S3C - Memory map definitions (virtual addresses)
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#ifndef __ASM_PLAT_MAP_H
15#define __ASM_PLAT_MAP_H __FILE__
16
17/* Fit all our registers in at 0xF4000000 upwards, trying to use as
18 * little of the VA space as possible so vmalloc and friends have a
19 * better chance of getting memory.
20 *
21 * we try to ensure stuff like the IRQ registers are available for
22 * an single MOVS instruction (ie, only 8 bits of set data)
23 */
24
25#define S3C_ADDR_BASE (0xF4000000)
26
27#ifndef __ASSEMBLY__
28#define S3C_ADDR(x) ((void __iomem __force *)S3C_ADDR_BASE + (x))
29#else
30#define S3C_ADDR(x) (S3C_ADDR_BASE + (x))
31#endif
32
33#define S3C_VA_IRQ S3C_ADDR(0x00000000) /* irq controller(s) */
34#define S3C_VA_SYS S3C_ADDR(0x00100000) /* system control */
35#define S3C_VA_MEM S3C_ADDR(0x00200000) /* system control */
36#define S3C_VA_TIMER S3C_ADDR(0x00300000) /* timer block */
37#define S3C_VA_WATCHDOG S3C_ADDR(0x00400000) /* watchdog */
38#define S3C_VA_UART S3C_ADDR(0x01000000) /* UART */
39
40#endif /* __ASM_PLAT_MAP_H */
diff --git a/arch/arm/plat-s3c/include/plat/regs-adc.h b/arch/arm/plat-s3c/include/plat/regs-adc.h
new file mode 100644
index 000000000000..4323cccc86cd
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/regs-adc.h
@@ -0,0 +1,60 @@
1/* arch/arm/mach-s3c2410/include/mach/regs-adc.h
2 *
3 * Copyright (c) 2004 Shannon Holland <holland@loser.net>
4 *
5 * This program is free software; yosu can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * S3C2410 ADC registers
10*/
11
12#ifndef __ASM_ARCH_REGS_ADC_H
13#define __ASM_ARCH_REGS_ADC_H "regs-adc.h"
14
15#define S3C2410_ADCREG(x) (x)
16
17#define S3C2410_ADCCON S3C2410_ADCREG(0x00)
18#define S3C2410_ADCTSC S3C2410_ADCREG(0x04)
19#define S3C2410_ADCDLY S3C2410_ADCREG(0x08)
20#define S3C2410_ADCDAT0 S3C2410_ADCREG(0x0C)
21#define S3C2410_ADCDAT1 S3C2410_ADCREG(0x10)
22
23
24/* ADCCON Register Bits */
25#define S3C2410_ADCCON_ECFLG (1<<15)
26#define S3C2410_ADCCON_PRSCEN (1<<14)
27#define S3C2410_ADCCON_PRSCVL(x) (((x)&0xFF)<<6)
28#define S3C2410_ADCCON_PRSCVLMASK (0xFF<<6)
29#define S3C2410_ADCCON_SELMUX(x) (((x)&0x7)<<3)
30#define S3C2410_ADCCON_MUXMASK (0x7<<3)
31#define S3C2410_ADCCON_STDBM (1<<2)
32#define S3C2410_ADCCON_READ_START (1<<1)
33#define S3C2410_ADCCON_ENABLE_START (1<<0)
34#define S3C2410_ADCCON_STARTMASK (0x3<<0)
35
36
37/* ADCTSC Register Bits */
38#define S3C2410_ADCTSC_YM_SEN (1<<7)
39#define S3C2410_ADCTSC_YP_SEN (1<<6)
40#define S3C2410_ADCTSC_XM_SEN (1<<5)
41#define S3C2410_ADCTSC_XP_SEN (1<<4)
42#define S3C2410_ADCTSC_PULL_UP_DISABLE (1<<3)
43#define S3C2410_ADCTSC_AUTO_PST (1<<2)
44#define S3C2410_ADCTSC_XY_PST(x) (((x)&0x3)<<0)
45
46/* ADCDAT0 Bits */
47#define S3C2410_ADCDAT0_UPDOWN (1<<15)
48#define S3C2410_ADCDAT0_AUTO_PST (1<<14)
49#define S3C2410_ADCDAT0_XY_PST (0x3<<12)
50#define S3C2410_ADCDAT0_XPDATA_MASK (0x03FF)
51
52/* ADCDAT1 Bits */
53#define S3C2410_ADCDAT1_UPDOWN (1<<15)
54#define S3C2410_ADCDAT1_AUTO_PST (1<<14)
55#define S3C2410_ADCDAT1_XY_PST (0x3<<12)
56#define S3C2410_ADCDAT1_YPDATA_MASK (0x03FF)
57
58#endif /* __ASM_ARCH_REGS_ADC_H */
59
60
diff --git a/arch/arm/plat-s3c/include/plat/regs-serial.h b/arch/arm/plat-s3c/include/plat/regs-serial.h
new file mode 100644
index 000000000000..a0daa647b92c
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/regs-serial.h
@@ -0,0 +1,232 @@
1/* arch/arm/mach-s3c2410/include/mach/regs-serial.h
2 *
3 * From linux/include/asm-arm/hardware/serial_s3c2410.h
4 *
5 * Internal header file for Samsung S3C2410 serial ports (UART0-2)
6 *
7 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
8 *
9 * Additional defines, (c) 2003 Simtec Electronics (linux@simtec.co.uk)
10 *
11 * Adapted from:
12 *
13 * Internal header file for MX1ADS serial ports (UART1 & 2)
14 *
15 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License as published by
19 * the Free Software Foundation; either version 2 of the License, or
20 * (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
30*/
31
32#ifndef __ASM_ARM_REGS_SERIAL_H
33#define __ASM_ARM_REGS_SERIAL_H
34
35#define S3C24XX_VA_UART0 (S3C_VA_UART)
36#define S3C24XX_VA_UART1 (S3C_VA_UART + 0x4000 )
37#define S3C24XX_VA_UART2 (S3C_VA_UART + 0x8000 )
38#define S3C24XX_VA_UART3 (S3C_VA_UART + 0xC000 )
39
40#define S3C2410_PA_UART0 (S3C24XX_PA_UART)
41#define S3C2410_PA_UART1 (S3C24XX_PA_UART + 0x4000 )
42#define S3C2410_PA_UART2 (S3C24XX_PA_UART + 0x8000 )
43#define S3C2443_PA_UART3 (S3C24XX_PA_UART + 0xC000 )
44
45#define S3C2410_URXH (0x24)
46#define S3C2410_UTXH (0x20)
47#define S3C2410_ULCON (0x00)
48#define S3C2410_UCON (0x04)
49#define S3C2410_UFCON (0x08)
50#define S3C2410_UMCON (0x0C)
51#define S3C2410_UBRDIV (0x28)
52#define S3C2410_UTRSTAT (0x10)
53#define S3C2410_UERSTAT (0x14)
54#define S3C2410_UFSTAT (0x18)
55#define S3C2410_UMSTAT (0x1C)
56
57#define S3C2410_LCON_CFGMASK ((0xF<<3)|(0x3))
58
59#define S3C2410_LCON_CS5 (0x0)
60#define S3C2410_LCON_CS6 (0x1)
61#define S3C2410_LCON_CS7 (0x2)
62#define S3C2410_LCON_CS8 (0x3)
63#define S3C2410_LCON_CSMASK (0x3)
64
65#define S3C2410_LCON_PNONE (0x0)
66#define S3C2410_LCON_PEVEN (0x5 << 3)
67#define S3C2410_LCON_PODD (0x4 << 3)
68#define S3C2410_LCON_PMASK (0x7 << 3)
69
70#define S3C2410_LCON_STOPB (1<<2)
71#define S3C2410_LCON_IRM (1<<6)
72
73#define S3C2440_UCON_CLKMASK (3<<10)
74#define S3C2440_UCON_PCLK (0<<10)
75#define S3C2440_UCON_UCLK (1<<10)
76#define S3C2440_UCON_PCLK2 (2<<10)
77#define S3C2440_UCON_FCLK (3<<10)
78#define S3C2443_UCON_EPLL (3<<10)
79
80#define S3C2440_UCON2_FCLK_EN (1<<15)
81#define S3C2440_UCON0_DIVMASK (15 << 12)
82#define S3C2440_UCON1_DIVMASK (15 << 12)
83#define S3C2440_UCON2_DIVMASK (7 << 12)
84#define S3C2440_UCON_DIVSHIFT (12)
85
86#define S3C2412_UCON_CLKMASK (3<<10)
87#define S3C2412_UCON_UCLK (1<<10)
88#define S3C2412_UCON_USYSCLK (3<<10)
89#define S3C2412_UCON_PCLK (0<<10)
90#define S3C2412_UCON_PCLK2 (2<<10)
91
92#define S3C2410_UCON_UCLK (1<<10)
93#define S3C2410_UCON_SBREAK (1<<4)
94
95#define S3C2410_UCON_TXILEVEL (1<<9)
96#define S3C2410_UCON_RXILEVEL (1<<8)
97#define S3C2410_UCON_TXIRQMODE (1<<2)
98#define S3C2410_UCON_RXIRQMODE (1<<0)
99#define S3C2410_UCON_RXFIFO_TOI (1<<7)
100#define S3C2443_UCON_RXERR_IRQEN (1<<6)
101#define S3C2443_UCON_LOOPBACK (1<<5)
102
103#define S3C2410_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
104 S3C2410_UCON_RXILEVEL | \
105 S3C2410_UCON_TXIRQMODE | \
106 S3C2410_UCON_RXIRQMODE | \
107 S3C2410_UCON_RXFIFO_TOI)
108
109#define S3C2410_UFCON_FIFOMODE (1<<0)
110#define S3C2410_UFCON_TXTRIG0 (0<<6)
111#define S3C2410_UFCON_RXTRIG8 (1<<4)
112#define S3C2410_UFCON_RXTRIG12 (2<<4)
113
114/* S3C2440 FIFO trigger levels */
115#define S3C2440_UFCON_RXTRIG1 (0<<4)
116#define S3C2440_UFCON_RXTRIG8 (1<<4)
117#define S3C2440_UFCON_RXTRIG16 (2<<4)
118#define S3C2440_UFCON_RXTRIG32 (3<<4)
119
120#define S3C2440_UFCON_TXTRIG0 (0<<6)
121#define S3C2440_UFCON_TXTRIG16 (1<<6)
122#define S3C2440_UFCON_TXTRIG32 (2<<6)
123#define S3C2440_UFCON_TXTRIG48 (3<<6)
124
125#define S3C2410_UFCON_RESETBOTH (3<<1)
126#define S3C2410_UFCON_RESETTX (1<<2)
127#define S3C2410_UFCON_RESETRX (1<<1)
128
129#define S3C2410_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
130 S3C2410_UFCON_TXTRIG0 | \
131 S3C2410_UFCON_RXTRIG8 )
132
133#define S3C2410_UMCOM_AFC (1<<4)
134#define S3C2410_UMCOM_RTS_LOW (1<<0)
135
136#define S3C2412_UMCON_AFC_63 (0<<5) /* same as s3c2443 */
137#define S3C2412_UMCON_AFC_56 (1<<5)
138#define S3C2412_UMCON_AFC_48 (2<<5)
139#define S3C2412_UMCON_AFC_40 (3<<5)
140#define S3C2412_UMCON_AFC_32 (4<<5)
141#define S3C2412_UMCON_AFC_24 (5<<5)
142#define S3C2412_UMCON_AFC_16 (6<<5)
143#define S3C2412_UMCON_AFC_8 (7<<5)
144
145#define S3C2410_UFSTAT_TXFULL (1<<9)
146#define S3C2410_UFSTAT_RXFULL (1<<8)
147#define S3C2410_UFSTAT_TXMASK (15<<4)
148#define S3C2410_UFSTAT_TXSHIFT (4)
149#define S3C2410_UFSTAT_RXMASK (15<<0)
150#define S3C2410_UFSTAT_RXSHIFT (0)
151
152/* UFSTAT S3C2443 same as S3C2440 */
153#define S3C2440_UFSTAT_TXFULL (1<<14)
154#define S3C2440_UFSTAT_RXFULL (1<<6)
155#define S3C2440_UFSTAT_TXSHIFT (8)
156#define S3C2440_UFSTAT_RXSHIFT (0)
157#define S3C2440_UFSTAT_TXMASK (63<<8)
158#define S3C2440_UFSTAT_RXMASK (63)
159
160#define S3C2410_UTRSTAT_TXE (1<<2)
161#define S3C2410_UTRSTAT_TXFE (1<<1)
162#define S3C2410_UTRSTAT_RXDR (1<<0)
163
164#define S3C2410_UERSTAT_OVERRUN (1<<0)
165#define S3C2410_UERSTAT_FRAME (1<<2)
166#define S3C2410_UERSTAT_BREAK (1<<3)
167#define S3C2443_UERSTAT_PARITY (1<<1)
168
169#define S3C2410_UERSTAT_ANY (S3C2410_UERSTAT_OVERRUN | \
170 S3C2410_UERSTAT_FRAME | \
171 S3C2410_UERSTAT_BREAK)
172
173#define S3C2410_UMSTAT_CTS (1<<0)
174#define S3C2410_UMSTAT_DeltaCTS (1<<2)
175
176#define S3C2443_DIVSLOT (0x2C)
177
178#ifndef __ASSEMBLY__
179
180/* struct s3c24xx_uart_clksrc
181 *
182 * this structure defines a named clock source that can be used for the
183 * uart, so that the best clock can be selected for the requested baud
184 * rate.
185 *
186 * min_baud and max_baud define the range of baud-rates this clock is
187 * acceptable for, if they are both zero, it is assumed any baud rate that
188 * can be generated from this clock will be used.
189 *
190 * divisor gives the divisor from the clock to the one seen by the uart
191*/
192
193struct s3c24xx_uart_clksrc {
194 const char *name;
195 unsigned int divisor;
196 unsigned int min_baud;
197 unsigned int max_baud;
198};
199
200/* configuration structure for per-machine configurations for the
201 * serial port
202 *
203 * the pointer is setup by the machine specific initialisation from the
204 * arch/arm/mach-s3c2410/ directory.
205*/
206
207struct s3c2410_uartcfg {
208 unsigned char hwport; /* hardware port number */
209 unsigned char unused;
210 unsigned short flags;
211 upf_t uart_flags; /* default uart flags */
212
213 unsigned long ucon; /* value of ucon for port */
214 unsigned long ulcon; /* value of ulcon for port */
215 unsigned long ufcon; /* value of ufcon for port */
216
217 struct s3c24xx_uart_clksrc *clocks;
218 unsigned int clocks_size;
219};
220
221/* s3c24xx_uart_devs
222 *
223 * this is exported from the core as we cannot use driver_register(),
224 * or platform_add_device() before the console_initcall()
225*/
226
227extern struct platform_device *s3c24xx_uart_devs[3];
228
229#endif /* __ASSEMBLY__ */
230
231#endif /* __ASM_ARM_REGS_SERIAL_H */
232
diff --git a/arch/arm/plat-s3c/include/plat/regs-timer.h b/arch/arm/plat-s3c/include/plat/regs-timer.h
new file mode 100644
index 000000000000..cc0eedd53e38
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/regs-timer.h
@@ -0,0 +1,115 @@
1/* arch/arm/mach-s3c2410/include/mach/regs-timer.h
2 *
3 * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
4 * http://www.simtec.co.uk/products/SWLINUX/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * S3C2410 Timer configuration
11*/
12
13
14#ifndef __ASM_ARCH_REGS_TIMER_H
15#define __ASM_ARCH_REGS_TIMER_H
16
17#define S3C_TIMERREG(x) (S3C_VA_TIMER + (x))
18#define S3C_TIMERREG2(tmr,reg) S3C_TIMERREG((reg)+0x0c+((tmr)*0x0c))
19
20#define S3C2410_TCFG0 S3C_TIMERREG(0x00)
21#define S3C2410_TCFG1 S3C_TIMERREG(0x04)
22#define S3C2410_TCON S3C_TIMERREG(0x08)
23
24#define S3C2410_TCFG_PRESCALER0_MASK (255<<0)
25#define S3C2410_TCFG_PRESCALER1_MASK (255<<8)
26#define S3C2410_TCFG_PRESCALER1_SHIFT (8)
27#define S3C2410_TCFG_DEADZONE_MASK (255<<16)
28#define S3C2410_TCFG_DEADZONE_SHIFT (16)
29
30#define S3C2410_TCFG1_MUX4_DIV2 (0<<16)
31#define S3C2410_TCFG1_MUX4_DIV4 (1<<16)
32#define S3C2410_TCFG1_MUX4_DIV8 (2<<16)
33#define S3C2410_TCFG1_MUX4_DIV16 (3<<16)
34#define S3C2410_TCFG1_MUX4_TCLK1 (4<<16)
35#define S3C2410_TCFG1_MUX4_MASK (15<<16)
36#define S3C2410_TCFG1_MUX4_SHIFT (16)
37
38#define S3C2410_TCFG1_MUX3_DIV2 (0<<12)
39#define S3C2410_TCFG1_MUX3_DIV4 (1<<12)
40#define S3C2410_TCFG1_MUX3_DIV8 (2<<12)
41#define S3C2410_TCFG1_MUX3_DIV16 (3<<12)
42#define S3C2410_TCFG1_MUX3_TCLK1 (4<<12)
43#define S3C2410_TCFG1_MUX3_MASK (15<<12)
44
45
46#define S3C2410_TCFG1_MUX2_DIV2 (0<<8)
47#define S3C2410_TCFG1_MUX2_DIV4 (1<<8)
48#define S3C2410_TCFG1_MUX2_DIV8 (2<<8)
49#define S3C2410_TCFG1_MUX2_DIV16 (3<<8)
50#define S3C2410_TCFG1_MUX2_TCLK1 (4<<8)
51#define S3C2410_TCFG1_MUX2_MASK (15<<8)
52
53
54#define S3C2410_TCFG1_MUX1_DIV2 (0<<4)
55#define S3C2410_TCFG1_MUX1_DIV4 (1<<4)
56#define S3C2410_TCFG1_MUX1_DIV8 (2<<4)
57#define S3C2410_TCFG1_MUX1_DIV16 (3<<4)
58#define S3C2410_TCFG1_MUX1_TCLK0 (4<<4)
59#define S3C2410_TCFG1_MUX1_MASK (15<<4)
60
61#define S3C2410_TCFG1_MUX0_DIV2 (0<<0)
62#define S3C2410_TCFG1_MUX0_DIV4 (1<<0)
63#define S3C2410_TCFG1_MUX0_DIV8 (2<<0)
64#define S3C2410_TCFG1_MUX0_DIV16 (3<<0)
65#define S3C2410_TCFG1_MUX0_TCLK0 (4<<0)
66#define S3C2410_TCFG1_MUX0_MASK (15<<0)
67
68#define S3C2410_TCFG1_MUX_DIV2 (0<<0)
69#define S3C2410_TCFG1_MUX_DIV4 (1<<0)
70#define S3C2410_TCFG1_MUX_DIV8 (2<<0)
71#define S3C2410_TCFG1_MUX_DIV16 (3<<0)
72#define S3C2410_TCFG1_MUX_TCLK (4<<0)
73#define S3C2410_TCFG1_MUX_MASK (15<<0)
74
75#define S3C2410_TCFG1_SHIFT(x) ((x) * 4)
76
77/* for each timer, we have an count buffer, an compare buffer and
78 * an observation buffer
79*/
80
81/* WARNING - timer 4 has no buffer reg, and it's observation is at +4 */
82
83#define S3C2410_TCNTB(tmr) S3C_TIMERREG2(tmr, 0x00)
84#define S3C2410_TCMPB(tmr) S3C_TIMERREG2(tmr, 0x04)
85#define S3C2410_TCNTO(tmr) S3C_TIMERREG2(tmr, (((tmr) == 4) ? 0x04 : 0x08))
86
87#define S3C2410_TCON_T4RELOAD (1<<22)
88#define S3C2410_TCON_T4MANUALUPD (1<<21)
89#define S3C2410_TCON_T4START (1<<20)
90
91#define S3C2410_TCON_T3RELOAD (1<<19)
92#define S3C2410_TCON_T3INVERT (1<<18)
93#define S3C2410_TCON_T3MANUALUPD (1<<17)
94#define S3C2410_TCON_T3START (1<<16)
95
96#define S3C2410_TCON_T2RELOAD (1<<15)
97#define S3C2410_TCON_T2INVERT (1<<14)
98#define S3C2410_TCON_T2MANUALUPD (1<<13)
99#define S3C2410_TCON_T2START (1<<12)
100
101#define S3C2410_TCON_T1RELOAD (1<<11)
102#define S3C2410_TCON_T1INVERT (1<<10)
103#define S3C2410_TCON_T1MANUALUPD (1<<9)
104#define S3C2410_TCON_T1START (1<<8)
105
106#define S3C2410_TCON_T0DEADZONE (1<<4)
107#define S3C2410_TCON_T0RELOAD (1<<3)
108#define S3C2410_TCON_T0INVERT (1<<2)
109#define S3C2410_TCON_T0MANUALUPD (1<<1)
110#define S3C2410_TCON_T0START (1<<0)
111
112#endif /* __ASM_ARCH_REGS_TIMER_H */
113
114
115
diff --git a/arch/arm/plat-s3c/include/plat/uncompress.h b/arch/arm/plat-s3c/include/plat/uncompress.h
new file mode 100644
index 000000000000..4df006b9cc10
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/uncompress.h
@@ -0,0 +1,155 @@
1/* linux/include/asm-arm/plat-s3c/uncompress.h
2 *
3 * Copyright 2003, 2007 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * S3C - uncompress code
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#ifndef __ASM_PLAT_UNCOMPRESS_H
15#define __ASM_PLAT_UNCOMPRESS_H
16
17typedef unsigned int upf_t; /* cannot include linux/serial_core.h */
18
19/* uart setup */
20
21static unsigned int fifo_mask;
22static unsigned int fifo_max;
23
24/* forward declerations */
25
26static void arch_detect_cpu(void);
27
28/* defines for UART registers */
29
30#include <plat/regs-serial.h>
31#include <asm/plat-s3c/regs-watchdog.h>
32
33/* working in physical space... */
34#undef S3C2410_WDOGREG
35#define S3C2410_WDOGREG(x) ((S3C24XX_PA_WATCHDOG + (x)))
36
37/* how many bytes we allow into the FIFO at a time in FIFO mode */
38#define FIFO_MAX (14)
39
40#define uart_base S3C24XX_PA_UART + (0x4000*CONFIG_S3C_LOWLEVEL_UART_PORT)
41
42static __inline__ void
43uart_wr(unsigned int reg, unsigned int val)
44{
45 volatile unsigned int *ptr;
46
47 ptr = (volatile unsigned int *)(reg + uart_base);
48 *ptr = val;
49}
50
51static __inline__ unsigned int
52uart_rd(unsigned int reg)
53{
54 volatile unsigned int *ptr;
55
56 ptr = (volatile unsigned int *)(reg + uart_base);
57 return *ptr;
58}
59
60/* we can deal with the case the UARTs are being run
61 * in FIFO mode, so that we don't hold up our execution
62 * waiting for tx to happen...
63*/
64
65static void putc(int ch)
66{
67 if (uart_rd(S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE) {
68 int level;
69
70 while (1) {
71 level = uart_rd(S3C2410_UFSTAT);
72 level &= fifo_mask;
73
74 if (level < fifo_max)
75 break;
76 }
77
78 } else {
79 /* not using fifos */
80
81 while ((uart_rd(S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE) != S3C2410_UTRSTAT_TXE)
82 barrier();
83 }
84
85 /* write byte to transmission register */
86 uart_wr(S3C2410_UTXH, ch);
87}
88
89static inline void flush(void)
90{
91}
92
93#define __raw_writel(d,ad) do { *((volatile unsigned int *)(ad)) = (d); } while(0)
94
95/* CONFIG_S3C_BOOT_WATCHDOG
96 *
97 * Simple boot-time watchdog setup, to reboot the system if there is
98 * any problem with the boot process
99*/
100
101#ifdef CONFIG_S3C_BOOT_WATCHDOG
102
103#define WDOG_COUNT (0xff00)
104
105static inline void arch_decomp_wdog(void)
106{
107 __raw_writel(WDOG_COUNT, S3C2410_WTCNT);
108}
109
110static void arch_decomp_wdog_start(void)
111{
112 __raw_writel(WDOG_COUNT, S3C2410_WTDAT);
113 __raw_writel(WDOG_COUNT, S3C2410_WTCNT);
114 __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x80), S3C2410_WTCON);
115}
116
117#else
118#define arch_decomp_wdog_start()
119#define arch_decomp_wdog()
120#endif
121
122#ifdef CONFIG_S3C_BOOT_ERROR_RESET
123
124static void arch_decomp_error(const char *x)
125{
126 putstr("\n\n");
127 putstr(x);
128 putstr("\n\n -- System resetting\n");
129
130 __raw_writel(0x4000, S3C2410_WTDAT);
131 __raw_writel(0x4000, S3C2410_WTCNT);
132 __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x40), S3C2410_WTCON);
133
134 while(1);
135}
136
137#define arch_error arch_decomp_error
138#endif
139
140static void error(char *err);
141
142static void
143arch_decomp_setup(void)
144{
145 /* we may need to setup the uart(s) here if we are not running
146 * on an BAST... the BAST will have left the uarts configured
147 * after calling linux.
148 */
149
150 arch_detect_cpu();
151 arch_decomp_wdog_start();
152}
153
154
155#endif /* __ASM_PLAT_UNCOMPRESS_H */
diff --git a/arch/arm/plat-s3c24xx/clock.c b/arch/arm/plat-s3c24xx/clock.c
index 400541359bfb..a005ddbd9ef3 100644
--- a/arch/arm/plat-s3c24xx/clock.c
+++ b/arch/arm/plat-s3c24xx/clock.c
@@ -47,8 +47,8 @@
47#include <mach/regs-clock.h> 47#include <mach/regs-clock.h>
48#include <mach/regs-gpio.h> 48#include <mach/regs-gpio.h>
49 49
50#include <asm/plat-s3c24xx/clock.h> 50#include <plat/clock.h>
51#include <asm/plat-s3c24xx/cpu.h> 51#include <plat/cpu.h>
52 52
53/* clock information */ 53/* clock information */
54 54
diff --git a/arch/arm/plat-s3c24xx/common-smdk.c b/arch/arm/plat-s3c24xx/common-smdk.c
index d528f460f6bc..3098736c65d9 100644
--- a/arch/arm/plat-s3c24xx/common-smdk.c
+++ b/arch/arm/plat-s3c24xx/common-smdk.c
@@ -40,9 +40,9 @@
40 40
41#include <asm/plat-s3c/nand.h> 41#include <asm/plat-s3c/nand.h>
42 42
43#include <asm/plat-s3c24xx/common-smdk.h> 43#include <plat/common-smdk.h>
44#include <asm/plat-s3c24xx/devs.h> 44#include <plat/devs.h>
45#include <asm/plat-s3c24xx/pm.h> 45#include <plat/pm.h>
46 46
47/* LED devices */ 47/* LED devices */
48 48
diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c
index 9c607bbc9343..22a329513c0f 100644
--- a/arch/arm/plat-s3c24xx/cpu.c
+++ b/arch/arm/plat-s3c24xx/cpu.c
@@ -42,18 +42,18 @@
42#include <mach/system-reset.h> 42#include <mach/system-reset.h>
43 43
44#include <mach/regs-gpio.h> 44#include <mach/regs-gpio.h>
45#include <asm/plat-s3c/regs-serial.h> 45#include <plat/regs-serial.h>
46 46
47#include <asm/plat-s3c24xx/cpu.h> 47#include <plat/cpu.h>
48#include <asm/plat-s3c24xx/devs.h> 48#include <plat/devs.h>
49#include <asm/plat-s3c24xx/clock.h> 49#include <plat/clock.h>
50#include <asm/plat-s3c24xx/s3c2400.h> 50#include <plat/s3c2400.h>
51#include <asm/plat-s3c24xx/s3c2410.h> 51#include <plat/s3c2410.h>
52#include <asm/plat-s3c24xx/s3c2412.h> 52#include <plat/s3c2412.h>
53#include "s3c244x.h" 53#include "s3c244x.h"
54#include <asm/plat-s3c24xx/s3c2440.h> 54#include <plat/s3c2440.h>
55#include <asm/plat-s3c24xx/s3c2442.h> 55#include <plat/s3c2442.h>
56#include <asm/plat-s3c24xx/s3c2443.h> 56#include <plat/s3c2443.h>
57 57
58struct cpu_table { 58struct cpu_table {
59 unsigned long idcode; 59 unsigned long idcode;
diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c
index 6b13b5455dfc..e93f8bf6d338 100644
--- a/arch/arm/plat-s3c24xx/devs.c
+++ b/arch/arm/plat-s3c24xx/devs.c
@@ -28,11 +28,11 @@
28#include <mach/hardware.h> 28#include <mach/hardware.h>
29#include <asm/irq.h> 29#include <asm/irq.h>
30 30
31#include <asm/plat-s3c/regs-serial.h> 31#include <plat/regs-serial.h>
32#include <asm/plat-s3c24xx/udc.h> 32#include <asm/plat-s3c24xx/udc.h>
33 33
34#include <asm/plat-s3c24xx/devs.h> 34#include <plat/devs.h>
35#include <asm/plat-s3c24xx/cpu.h> 35#include <plat/cpu.h>
36#include <asm/plat-s3c24xx/regs-spi.h> 36#include <asm/plat-s3c24xx/regs-spi.h>
37 37
38/* Serial port registrations */ 38/* Serial port registrations */
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index d6344461a83b..1baf941d1930 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -36,7 +36,7 @@
36#include <asm/mach/dma.h> 36#include <asm/mach/dma.h>
37#include <mach/map.h> 37#include <mach/map.h>
38 38
39#include <asm/plat-s3c24xx/dma.h> 39#include <plat/dma.h>
40 40
41/* io map for dma */ 41/* io map for dma */
42static void __iomem *dma_base; 42static void __iomem *dma_base;
diff --git a/arch/arm/plat-s3c24xx/include/plat/clock.h b/arch/arm/plat-s3c24xx/include/plat/clock.h
new file mode 100644
index 000000000000..235b753cd877
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/include/plat/clock.h
@@ -0,0 +1,64 @@
1/* linux/include/asm-arm/plat-s3c24xx/clock.h
2 * linux/arch/arm/mach-s3c2410/clock.h
3 *
4 * Copyright (c) 2004-2005 Simtec Electronics
5 * http://www.simtec.co.uk/products/SWLINUX/
6 * Written by Ben Dooks, <ben@simtec.co.uk>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13struct clk {
14 struct list_head list;
15 struct module *owner;
16 struct clk *parent;
17 const char *name;
18 int id;
19 int usage;
20 unsigned long rate;
21 unsigned long ctrlbit;
22
23 int (*enable)(struct clk *, int enable);
24 int (*set_rate)(struct clk *c, unsigned long rate);
25 unsigned long (*get_rate)(struct clk *c);
26 unsigned long (*round_rate)(struct clk *c, unsigned long rate);
27 int (*set_parent)(struct clk *c, struct clk *parent);
28};
29
30/* other clocks which may be registered by board support */
31
32extern struct clk s3c24xx_dclk0;
33extern struct clk s3c24xx_dclk1;
34extern struct clk s3c24xx_clkout0;
35extern struct clk s3c24xx_clkout1;
36extern struct clk s3c24xx_uclk;
37
38extern struct clk clk_usb_bus;
39
40/* core clock support */
41
42extern struct clk clk_f;
43extern struct clk clk_h;
44extern struct clk clk_p;
45extern struct clk clk_mpll;
46extern struct clk clk_upll;
47extern struct clk clk_xtal;
48
49/* exports for arch/arm/mach-s3c2410
50 *
51 * Please DO NOT use these outside of arch/arm/mach-s3c2410
52*/
53
54extern struct mutex clocks_mutex;
55
56extern int s3c2410_clkcon_enable(struct clk *clk, int enable);
57
58extern int s3c24xx_register_clock(struct clk *clk);
59extern int s3c24xx_register_clocks(struct clk **clk, int nr_clks);
60
61extern int s3c24xx_setup_clocks(unsigned long xtal,
62 unsigned long fclk,
63 unsigned long hclk,
64 unsigned long pclk);
diff --git a/arch/arm/plat-s3c24xx/include/plat/common-smdk.h b/arch/arm/plat-s3c24xx/include/plat/common-smdk.h
new file mode 100644
index 000000000000..58d9094c935c
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/include/plat/common-smdk.h
@@ -0,0 +1,15 @@
1/* linux/include/asm-arm/plat-s3c24xx/common-smdk.h
2 *
3 * Copyright (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Common code for SMDK2410 and SMDK2440 boards
7 *
8 * http://www.fluff.org/ben/smdk2440/
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15extern void smdk_machine_init(void);
diff --git a/arch/arm/plat-s3c24xx/include/plat/cpu.h b/arch/arm/plat-s3c24xx/include/plat/cpu.h
new file mode 100644
index 000000000000..23e420e8bd5b
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/include/plat/cpu.h
@@ -0,0 +1,54 @@
1/* linux/include/asm-arm/plat-s3c24xx/cpu.h
2 *
3 * Copyright (c) 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for S3C24XX CPU support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13/* todo - fix when rmk changes iodescs to use `void __iomem *` */
14
15#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE }
16
17#ifndef MHZ
18#define MHZ (1000*1000)
19#endif
20
21#define print_mhz(m) ((m) / MHZ), ((m / 1000) % 1000)
22
23/* forward declaration */
24struct s3c24xx_uart_resources;
25struct platform_device;
26struct s3c2410_uartcfg;
27struct map_desc;
28
29/* core initialisation functions */
30
31extern void s3c24xx_init_irq(void);
32
33extern void s3c24xx_init_io(struct map_desc *mach_desc, int size);
34
35extern void s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no);
36
37extern void s3c24xx_init_clocks(int xtal);
38
39extern void s3c24xx_init_uartdevs(char *name,
40 struct s3c24xx_uart_resources *res,
41 struct s3c2410_uartcfg *cfg, int no);
42
43/* timer for 2410/2440 */
44
45struct sys_timer;
46extern struct sys_timer s3c24xx_timer;
47
48/* system device classes */
49
50extern struct sysdev_class s3c2410_sysclass;
51extern struct sysdev_class s3c2412_sysclass;
52extern struct sysdev_class s3c2440_sysclass;
53extern struct sysdev_class s3c2442_sysclass;
54extern struct sysdev_class s3c2443_sysclass;
diff --git a/arch/arm/plat-s3c24xx/include/plat/devs.h b/arch/arm/plat-s3c24xx/include/plat/devs.h
new file mode 100644
index 000000000000..badaac9d64a8
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/include/plat/devs.h
@@ -0,0 +1,49 @@
1/* linux/include/asm-arm/plat-s3c24xx/devs.h
2 *
3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for s3c2410 standard platform devices
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12#include <linux/platform_device.h>
13
14struct s3c24xx_uart_resources {
15 struct resource *resources;
16 unsigned long nr_resources;
17};
18
19extern struct s3c24xx_uart_resources s3c2410_uart_resources[];
20
21extern struct platform_device *s3c24xx_uart_devs[];
22extern struct platform_device *s3c24xx_uart_src[];
23
24extern struct platform_device s3c_device_timer[];
25
26extern struct platform_device s3c_device_usb;
27extern struct platform_device s3c_device_lcd;
28extern struct platform_device s3c_device_wdt;
29extern struct platform_device s3c_device_i2c;
30extern struct platform_device s3c_device_iis;
31extern struct platform_device s3c_device_rtc;
32extern struct platform_device s3c_device_adc;
33extern struct platform_device s3c_device_sdi;
34extern struct platform_device s3c_device_hsmmc;
35
36extern struct platform_device s3c_device_spi0;
37extern struct platform_device s3c_device_spi1;
38
39extern struct platform_device s3c_device_nand;
40
41extern struct platform_device s3c_device_usbgadget;
42
43/* s3c2440 specific devices */
44
45#ifdef CONFIG_CPU_S3C2440
46
47extern struct platform_device s3c_device_camif;
48
49#endif
diff --git a/arch/arm/plat-s3c24xx/include/plat/dma.h b/arch/arm/plat-s3c24xx/include/plat/dma.h
new file mode 100644
index 000000000000..c78efe316fc8
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/include/plat/dma.h
@@ -0,0 +1,82 @@
1/* linux/include/asm-arm/plat-s3c24xx/dma.h
2 *
3 * Copyright (C) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Samsung S3C24XX DMA support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13extern struct sysdev_class dma_sysclass;
14extern struct s3c2410_dma_chan s3c2410_chans[S3C2410_DMA_CHANNELS];
15
16#define DMA_CH_VALID (1<<31)
17#define DMA_CH_NEVER (1<<30)
18
19struct s3c24xx_dma_addr {
20 unsigned long from;
21 unsigned long to;
22};
23
24/* struct s3c24xx_dma_map
25 *
26 * this holds the mapping information for the channel selected
27 * to be connected to the specified device
28*/
29
30struct s3c24xx_dma_map {
31 const char *name;
32 struct s3c24xx_dma_addr hw_addr;
33
34 unsigned long channels[S3C2410_DMA_CHANNELS];
35 unsigned long channels_rx[S3C2410_DMA_CHANNELS];
36};
37
38struct s3c24xx_dma_selection {
39 struct s3c24xx_dma_map *map;
40 unsigned long map_size;
41 unsigned long dcon_mask;
42
43 void (*select)(struct s3c2410_dma_chan *chan,
44 struct s3c24xx_dma_map *map);
45
46 void (*direction)(struct s3c2410_dma_chan *chan,
47 struct s3c24xx_dma_map *map,
48 enum s3c2410_dmasrc dir);
49};
50
51extern int s3c24xx_dma_init_map(struct s3c24xx_dma_selection *sel);
52
53/* struct s3c24xx_dma_order_ch
54 *
55 * channel map for one of the `enum dma_ch` dma channels. the list
56 * entry contains a set of low-level channel numbers, orred with
57 * DMA_CH_VALID, which are checked in the order in the array.
58*/
59
60struct s3c24xx_dma_order_ch {
61 unsigned int list[S3C2410_DMA_CHANNELS]; /* list of channels */
62 unsigned int flags; /* flags */
63};
64
65/* struct s3c24xx_dma_order
66 *
67 * information provided by either the core or the board to give the
68 * dma system a hint on how to allocate channels
69*/
70
71struct s3c24xx_dma_order {
72 struct s3c24xx_dma_order_ch channels[DMACH_MAX];
73};
74
75extern int s3c24xx_dma_order_set(struct s3c24xx_dma_order *map);
76
77/* DMA init code, called from the cpu support code */
78
79extern int s3c2410_dma_init(void);
80
81extern int s3c24xx_dma_init(unsigned int channels, unsigned int irq,
82 unsigned int stride);
diff --git a/arch/arm/plat-s3c24xx/include/plat/irq.h b/arch/arm/plat-s3c24xx/include/plat/irq.h
new file mode 100644
index 000000000000..45746a995343
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/include/plat/irq.h
@@ -0,0 +1,109 @@
1/* linux/include/asm-arm/plat-s3c24xx/irq.h
2 *
3 * Copyright (c) 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for S3C24XX CPU IRQ support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#define irqdbf(x...)
14#define irqdbf2(x...)
15
16#define EXTINT_OFF (IRQ_EINT4 - 4)
17
18/* these are exported for arch/arm/mach-* usage */
19extern struct irq_chip s3c_irq_level_chip;
20extern struct irq_chip s3c_irq_chip;
21
22static inline void
23s3c_irqsub_mask(unsigned int irqno, unsigned int parentbit,
24 int subcheck)
25{
26 unsigned long mask;
27 unsigned long submask;
28
29 submask = __raw_readl(S3C2410_INTSUBMSK);
30 mask = __raw_readl(S3C2410_INTMSK);
31
32 submask |= (1UL << (irqno - IRQ_S3CUART_RX0));
33
34 /* check to see if we need to mask the parent IRQ */
35
36 if ((submask & subcheck) == subcheck) {
37 __raw_writel(mask | parentbit, S3C2410_INTMSK);
38 }
39
40 /* write back masks */
41 __raw_writel(submask, S3C2410_INTSUBMSK);
42
43}
44
45static inline void
46s3c_irqsub_unmask(unsigned int irqno, unsigned int parentbit)
47{
48 unsigned long mask;
49 unsigned long submask;
50
51 submask = __raw_readl(S3C2410_INTSUBMSK);
52 mask = __raw_readl(S3C2410_INTMSK);
53
54 submask &= ~(1UL << (irqno - IRQ_S3CUART_RX0));
55 mask &= ~parentbit;
56
57 /* write back masks */
58 __raw_writel(submask, S3C2410_INTSUBMSK);
59 __raw_writel(mask, S3C2410_INTMSK);
60}
61
62
63static inline void
64s3c_irqsub_maskack(unsigned int irqno, unsigned int parentmask, unsigned int group)
65{
66 unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
67
68 s3c_irqsub_mask(irqno, parentmask, group);
69
70 __raw_writel(bit, S3C2410_SUBSRCPND);
71
72 /* only ack parent if we've got all the irqs (seems we must
73 * ack, all and hope that the irq system retriggers ok when
74 * the interrupt goes off again)
75 */
76
77 if (1) {
78 __raw_writel(parentmask, S3C2410_SRCPND);
79 __raw_writel(parentmask, S3C2410_INTPND);
80 }
81}
82
83static inline void
84s3c_irqsub_ack(unsigned int irqno, unsigned int parentmask, unsigned int group)
85{
86 unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
87
88 __raw_writel(bit, S3C2410_SUBSRCPND);
89
90 /* only ack parent if we've got all the irqs (seems we must
91 * ack, all and hope that the irq system retriggers ok when
92 * the interrupt goes off again)
93 */
94
95 if (1) {
96 __raw_writel(parentmask, S3C2410_SRCPND);
97 __raw_writel(parentmask, S3C2410_INTPND);
98 }
99}
100
101/* exported for use in arch/arm/mach-s3c2410 */
102
103#ifdef CONFIG_PM
104extern int s3c_irq_wake(unsigned int irqno, unsigned int state);
105#else
106#define s3c_irq_wake NULL
107#endif
108
109extern int s3c_irqext_type(unsigned int irq, unsigned int type);
diff --git a/arch/arm/plat-s3c24xx/include/plat/pm.h b/arch/arm/plat-s3c24xx/include/plat/pm.h
new file mode 100644
index 000000000000..cc623667e48a
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/include/plat/pm.h
@@ -0,0 +1,73 @@
1/* linux/include/asm-arm/plat-s3c24xx/pm.h
2 *
3 * Copyright (c) 2004 Simtec Electronics
4 * Written by Ben Dooks, <ben@simtec.co.uk>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11/* s3c2410_pm_init
12 *
13 * called from board at initialisation time to setup the power
14 * management
15*/
16
17#ifdef CONFIG_PM
18
19extern __init int s3c2410_pm_init(void);
20
21#else
22
23static inline int s3c2410_pm_init(void)
24{
25 return 0;
26}
27#endif
28
29/* configuration for the IRQ mask over sleep */
30extern unsigned long s3c_irqwake_intmask;
31extern unsigned long s3c_irqwake_eintmask;
32
33/* IRQ masks for IRQs allowed to go to sleep (see irq.c) */
34extern unsigned long s3c_irqwake_intallow;
35extern unsigned long s3c_irqwake_eintallow;
36
37/* per-cpu sleep functions */
38
39extern void (*pm_cpu_prep)(void);
40extern void (*pm_cpu_sleep)(void);
41
42/* Flags for PM Control */
43
44extern unsigned long s3c_pm_flags;
45
46/* from sleep.S */
47
48extern int s3c2410_cpu_save(unsigned long *saveblk);
49extern void s3c2410_cpu_suspend(void);
50extern void s3c2410_cpu_resume(void);
51
52extern unsigned long s3c2410_sleep_save_phys;
53
54/* sleep save info */
55
56struct sleep_save {
57 void __iomem *reg;
58 unsigned long val;
59};
60
61#define SAVE_ITEM(x) \
62 { .reg = (x) }
63
64extern void s3c2410_pm_do_save(struct sleep_save *ptr, int count);
65extern void s3c2410_pm_do_restore(struct sleep_save *ptr, int count);
66
67#ifdef CONFIG_PM
68extern int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state);
69extern int s3c24xx_irq_resume(struct sys_device *dev);
70#else
71#define s3c24xx_irq_suspend NULL
72#define s3c24xx_irq_resume NULL
73#endif
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2400.h b/arch/arm/plat-s3c24xx/include/plat/s3c2400.h
new file mode 100644
index 000000000000..3a5a16821af8
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/include/plat/s3c2400.h
@@ -0,0 +1,31 @@
1/* linux/include/asm-arm/plat-s3c24xx/s3c2400.h
2 *
3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for S3C2400 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * Modifications:
13 * 09-Fev-2006 LCVR First version, based on s3c2410.h
14*/
15
16#ifdef CONFIG_CPU_S3C2400
17
18extern int s3c2400_init(void);
19
20extern void s3c2400_map_io(struct map_desc *mach_desc, int size);
21
22extern void s3c2400_init_uarts(struct s3c2410_uartcfg *cfg, int no);
23
24extern void s3c2400_init_clocks(int xtal);
25
26#else
27#define s3c2400_init_clocks NULL
28#define s3c2400_init_uarts NULL
29#define s3c2400_map_io NULL
30#define s3c2400_init NULL
31#endif
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2410.h b/arch/arm/plat-s3c24xx/include/plat/s3c2410.h
new file mode 100644
index 000000000000..3cd1ec677b3f
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/include/plat/s3c2410.h
@@ -0,0 +1,31 @@
1/* linux/include/asm-arm/plat-s3c24xx/s3c2410.h
2 *
3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for s3c2410 machine directory
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12*/
13
14#ifdef CONFIG_CPU_S3C2410
15
16extern int s3c2410_init(void);
17
18extern void s3c2410_map_io(struct map_desc *mach_desc, int size);
19
20extern void s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no);
21
22extern void s3c2410_init_clocks(int xtal);
23
24#else
25#define s3c2410_init_clocks NULL
26#define s3c2410_init_uarts NULL
27#define s3c2410_map_io NULL
28#define s3c2410_init NULL
29#endif
30
31extern int s3c2410_baseclk_add(void);
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2412.h b/arch/arm/plat-s3c24xx/include/plat/s3c2412.h
new file mode 100644
index 000000000000..3ec97685e781
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/include/plat/s3c2412.h
@@ -0,0 +1,29 @@
1/* linux/include/asm-arm/plat-s3c24xx/s3c2412.h
2 *
3 * Copyright (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for s3c2412 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifdef CONFIG_CPU_S3C2412
14
15extern int s3c2412_init(void);
16
17extern void s3c2412_map_io(struct map_desc *mach_desc, int size);
18
19extern void s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no);
20
21extern void s3c2412_init_clocks(int xtal);
22
23extern int s3c2412_baseclk_add(void);
24#else
25#define s3c2412_init_clocks NULL
26#define s3c2412_init_uarts NULL
27#define s3c2412_map_io NULL
28#define s3c2412_init NULL
29#endif
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2440.h b/arch/arm/plat-s3c24xx/include/plat/s3c2440.h
new file mode 100644
index 000000000000..107853bf9481
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/include/plat/s3c2440.h
@@ -0,0 +1,17 @@
1/* linux/include/asm-arm/plat-s3c24xx/s3c2440.h
2 *
3 * Copyright (c) 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for s3c2440 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifdef CONFIG_CPU_S3C2440
14extern int s3c2440_init(void);
15#else
16#define s3c2440_init NULL
17#endif
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2442.h b/arch/arm/plat-s3c24xx/include/plat/s3c2442.h
new file mode 100644
index 000000000000..451a23a2092a
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/include/plat/s3c2442.h
@@ -0,0 +1,17 @@
1/* linux/include/asm-arm/plat-s3c24xx/s3c2442.h
2 *
3 * Copyright (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for s3c2442 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifdef CONFIG_CPU_S3C2442
14extern int s3c2442_init(void);
15#else
16#define s3c2442_init NULL
17#endif
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2443.h b/arch/arm/plat-s3c24xx/include/plat/s3c2443.h
new file mode 100644
index 000000000000..11d83b5c84e6
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/include/plat/s3c2443.h
@@ -0,0 +1,32 @@
1/* linux/include/asm-arm/plat-s3c24xx/s3c2443.h
2 *
3 * Copyright (c) 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for s3c2443 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifdef CONFIG_CPU_S3C2443
14
15struct s3c2410_uartcfg;
16
17extern int s3c2443_init(void);
18
19extern void s3c2443_map_io(struct map_desc *mach_desc, int size);
20
21extern void s3c2443_init_uarts(struct s3c2410_uartcfg *cfg, int no);
22
23extern void s3c2443_init_clocks(int xtal);
24
25extern int s3c2443_baseclk_add(void);
26
27#else
28#define s3c2443_init_clocks NULL
29#define s3c2443_init_uarts NULL
30#define s3c2443_map_io NULL
31#define s3c2443_init NULL
32#endif
diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c
index 590fc5a3ab06..963f7a4f26f2 100644
--- a/arch/arm/plat-s3c24xx/irq.c
+++ b/arch/arm/plat-s3c24xx/irq.c
@@ -65,9 +65,9 @@
65#include <mach/regs-irq.h> 65#include <mach/regs-irq.h>
66#include <mach/regs-gpio.h> 66#include <mach/regs-gpio.h>
67 67
68#include <asm/plat-s3c24xx/cpu.h> 68#include <plat/cpu.h>
69#include <asm/plat-s3c24xx/pm.h> 69#include <plat/pm.h>
70#include <asm/plat-s3c24xx/irq.h> 70#include <plat/irq.h>
71 71
72/* wakeup irq control */ 72/* wakeup irq control */
73 73
diff --git a/arch/arm/plat-s3c24xx/pm-simtec.c b/arch/arm/plat-s3c24xx/pm-simtec.c
index 0a074d35890a..21dfa74773d1 100644
--- a/arch/arm/plat-s3c24xx/pm-simtec.c
+++ b/arch/arm/plat-s3c24xx/pm-simtec.c
@@ -33,7 +33,7 @@
33 33
34#include <asm/mach-types.h> 34#include <asm/mach-types.h>
35 35
36#include <asm/plat-s3c24xx/pm.h> 36#include <plat/pm.h>
37 37
38#define COPYRIGHT ", (c) 2005 Simtec Electronics" 38#define COPYRIGHT ", (c) 2005 Simtec Electronics"
39 39
diff --git a/arch/arm/plat-s3c24xx/pm.c b/arch/arm/plat-s3c24xx/pm.c
index d3934b1119a9..8efb57ad5019 100644
--- a/arch/arm/plat-s3c24xx/pm.c
+++ b/arch/arm/plat-s3c24xx/pm.c
@@ -40,7 +40,7 @@
40#include <asm/cacheflush.h> 40#include <asm/cacheflush.h>
41#include <mach/hardware.h> 41#include <mach/hardware.h>
42 42
43#include <asm/plat-s3c/regs-serial.h> 43#include <plat/regs-serial.h>
44#include <mach/regs-clock.h> 44#include <mach/regs-clock.h>
45#include <mach/regs-gpio.h> 45#include <mach/regs-gpio.h>
46#include <mach/regs-mem.h> 46#include <mach/regs-mem.h>
@@ -48,7 +48,7 @@
48 48
49#include <asm/mach/time.h> 49#include <asm/mach/time.h>
50 50
51#include <asm/plat-s3c24xx/pm.h> 51#include <plat/pm.h>
52 52
53/* for external use */ 53/* for external use */
54 54
diff --git a/arch/arm/plat-s3c24xx/pwm-clock.c b/arch/arm/plat-s3c24xx/pwm-clock.c
index 306cc9c6f9ef..b8e854f1b1d5 100644
--- a/arch/arm/plat-s3c24xx/pwm-clock.c
+++ b/arch/arm/plat-s3c24xx/pwm-clock.c
@@ -24,10 +24,10 @@
24#include <mach/regs-clock.h> 24#include <mach/regs-clock.h>
25#include <mach/regs-gpio.h> 25#include <mach/regs-gpio.h>
26 26
27#include <asm/plat-s3c24xx/clock.h> 27#include <plat/clock.h>
28#include <asm/plat-s3c24xx/cpu.h> 28#include <plat/cpu.h>
29 29
30#include <asm/plat-s3c/regs-timer.h> 30#include <plat/regs-timer.h>
31 31
32/* Each of the timers 0 through 5 go through the following 32/* Each of the timers 0 through 5 go through the following
33 * clock tree, with the inputs depending on the timers. 33 * clock tree, with the inputs depending on the timers.
diff --git a/arch/arm/plat-s3c24xx/pwm.c b/arch/arm/plat-s3c24xx/pwm.c
index 7a92c938542a..feb770f2e84e 100644
--- a/arch/arm/plat-s3c24xx/pwm.c
+++ b/arch/arm/plat-s3c24xx/pwm.c
@@ -19,8 +19,8 @@
19#include <linux/io.h> 19#include <linux/io.h>
20#include <linux/pwm.h> 20#include <linux/pwm.h>
21 21
22#include <asm/plat-s3c24xx/devs.h> 22#include <plat/devs.h>
23#include <asm/plat-s3c/regs-timer.h> 23#include <plat/regs-timer.h>
24 24
25struct pwm_device { 25struct pwm_device {
26 struct list_head list; 26 struct list_head list;
diff --git a/arch/arm/plat-s3c24xx/s3c244x-clock.c b/arch/arm/plat-s3c24xx/s3c244x-clock.c
index 119647a5eaa6..7c09773ff9fc 100644
--- a/arch/arm/plat-s3c24xx/s3c244x-clock.c
+++ b/arch/arm/plat-s3c24xx/s3c244x-clock.c
@@ -41,8 +41,8 @@
41 41
42#include <mach/regs-clock.h> 42#include <mach/regs-clock.h>
43 43
44#include <asm/plat-s3c24xx/clock.h> 44#include <plat/clock.h>
45#include <asm/plat-s3c24xx/cpu.h> 45#include <plat/cpu.h>
46 46
47static int s3c2440_setparent_armclk(struct clk *clk, struct clk *parent) 47static int s3c2440_setparent_armclk(struct clk *clk, struct clk *parent)
48{ 48{
diff --git a/arch/arm/plat-s3c24xx/s3c244x-irq.c b/arch/arm/plat-s3c24xx/s3c244x-irq.c
index 0601c5f3230b..0902afd227ca 100644
--- a/arch/arm/plat-s3c24xx/s3c244x-irq.c
+++ b/arch/arm/plat-s3c24xx/s3c244x-irq.c
@@ -34,9 +34,9 @@
34#include <mach/regs-irq.h> 34#include <mach/regs-irq.h>
35#include <mach/regs-gpio.h> 35#include <mach/regs-gpio.h>
36 36
37#include <asm/plat-s3c24xx/cpu.h> 37#include <plat/cpu.h>
38#include <asm/plat-s3c24xx/pm.h> 38#include <plat/pm.h>
39#include <asm/plat-s3c24xx/irq.h> 39#include <plat/irq.h>
40 40
41/* camera irq */ 41/* camera irq */
42 42
diff --git a/arch/arm/plat-s3c24xx/s3c244x.c b/arch/arm/plat-s3c24xx/s3c244x.c
index 146863a69aeb..c0344fac4a94 100644
--- a/arch/arm/plat-s3c24xx/s3c244x.c
+++ b/arch/arm/plat-s3c24xx/s3c244x.c
@@ -30,18 +30,18 @@
30#include <asm/irq.h> 30#include <asm/irq.h>
31 31
32#include <mach/regs-clock.h> 32#include <mach/regs-clock.h>
33#include <asm/plat-s3c/regs-serial.h> 33#include <plat/regs-serial.h>
34#include <mach/regs-gpio.h> 34#include <mach/regs-gpio.h>
35#include <mach/regs-gpioj.h> 35#include <mach/regs-gpioj.h>
36#include <mach/regs-dsc.h> 36#include <mach/regs-dsc.h>
37 37
38#include <asm/plat-s3c24xx/s3c2410.h> 38#include <plat/s3c2410.h>
39#include <asm/plat-s3c24xx/s3c2440.h> 39#include <plat/s3c2440.h>
40#include "s3c244x.h" 40#include "s3c244x.h"
41#include <asm/plat-s3c24xx/clock.h> 41#include <plat/clock.h>
42#include <asm/plat-s3c24xx/devs.h> 42#include <plat/devs.h>
43#include <asm/plat-s3c24xx/cpu.h> 43#include <plat/cpu.h>
44#include <asm/plat-s3c24xx/pm.h> 44#include <plat/pm.h>
45 45
46static struct map_desc s3c244x_iodesc[] __initdata = { 46static struct map_desc s3c244x_iodesc[] __initdata = {
47 IODESC_ENT(CLKPWR), 47 IODESC_ENT(CLKPWR),
diff --git a/arch/arm/plat-s3c24xx/sleep.S b/arch/arm/plat-s3c24xx/sleep.S
index 4981a08b6ebb..76594b212802 100644
--- a/arch/arm/plat-s3c24xx/sleep.S
+++ b/arch/arm/plat-s3c24xx/sleep.S
@@ -32,7 +32,7 @@
32#include <mach/regs-gpio.h> 32#include <mach/regs-gpio.h>
33#include <mach/regs-clock.h> 33#include <mach/regs-clock.h>
34#include <mach/regs-mem.h> 34#include <mach/regs-mem.h>
35#include <asm/plat-s3c/regs-serial.h> 35#include <plat/regs-serial.h>
36 36
37/* CONFIG_DEBUG_RESUME is dangerous if your bootloader does not 37/* CONFIG_DEBUG_RESUME is dangerous if your bootloader does not
38 * reset the UART configuration, only enable if you really need this! 38 * reset the UART configuration, only enable if you really need this!
diff --git a/arch/arm/plat-s3c24xx/time.c b/arch/arm/plat-s3c24xx/time.c
index 64bfa19ae951..c51916236ac0 100644
--- a/arch/arm/plat-s3c24xx/time.c
+++ b/arch/arm/plat-s3c24xx/time.c
@@ -33,12 +33,12 @@
33 33
34#include <asm/irq.h> 34#include <asm/irq.h>
35#include <mach/map.h> 35#include <mach/map.h>
36#include <asm/plat-s3c/regs-timer.h> 36#include <plat/regs-timer.h>
37#include <mach/regs-irq.h> 37#include <mach/regs-irq.h>
38#include <asm/mach/time.h> 38#include <asm/mach/time.h>
39 39
40#include <asm/plat-s3c24xx/clock.h> 40#include <plat/clock.h>
41#include <asm/plat-s3c24xx/cpu.h> 41#include <plat/cpu.h>
42 42
43static unsigned long timer_startval; 43static unsigned long timer_startval;
44static unsigned long timer_usec_ticks; 44static unsigned long timer_usec_ticks;
diff --git a/arch/avr32/include/asm/a.out.h b/arch/avr32/include/asm/a.out.h
deleted file mode 100644
index e46375a34a72..000000000000
--- a/arch/avr32/include/asm/a.out.h
+++ /dev/null
@@ -1,20 +0,0 @@
1#ifndef __ASM_AVR32_A_OUT_H
2#define __ASM_AVR32_A_OUT_H
3
4struct exec
5{
6 unsigned long a_info; /* Use macros N_MAGIC, etc for access */
7 unsigned a_text; /* length of text, in bytes */
8 unsigned a_data; /* length of data, in bytes */
9 unsigned a_bss; /* length of uninitialized data area for file, in bytes */
10 unsigned a_syms; /* length of symbol table data in file, in bytes */
11 unsigned a_entry; /* start address */
12 unsigned a_trsize; /* length of relocation info for text, in bytes */
13 unsigned a_drsize; /* length of relocation info for data, in bytes */
14};
15
16#define N_TRSIZE(a) ((a).a_trsize)
17#define N_DRSIZE(a) ((a).a_drsize)
18#define N_SYMSIZE(a) ((a).a_syms)
19
20#endif /* __ASM_AVR32_A_OUT_H */
diff --git a/arch/avr32/include/asm/elf.h b/arch/avr32/include/asm/elf.h
index 64ce40ee1d58..d5d1d41c600a 100644
--- a/arch/avr32/include/asm/elf.h
+++ b/arch/avr32/include/asm/elf.h
@@ -103,6 +103,6 @@ typedef struct user_fpu_struct elf_fpregset_t;
103 103
104#define ELF_PLATFORM (NULL) 104#define ELF_PLATFORM (NULL)
105 105
106#define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX_32BIT) 106#define SET_PERSONALITY(ex) set_personality(PER_LINUX_32BIT)
107 107
108#endif /* __ASM_AVR32_ELF_H */ 108#endif /* __ASM_AVR32_ELF_H */
diff --git a/arch/avr32/mach-at32ap/cpufreq.c b/arch/avr32/mach-at32ap/cpufreq.c
index 5dd8d25428bf..d84efe4984ab 100644
--- a/arch/avr32/mach-at32ap/cpufreq.c
+++ b/arch/avr32/mach-at32ap/cpufreq.c
@@ -87,7 +87,6 @@ static int __init at32_cpufreq_driver_init(struct cpufreq_policy *policy)
87 policy->cur = at32_get_speed(0); 87 policy->cur = at32_get_speed(0);
88 policy->min = policy->cpuinfo.min_freq; 88 policy->min = policy->cpuinfo.min_freq;
89 policy->max = policy->cpuinfo.max_freq; 89 policy->max = policy->cpuinfo.max_freq;
90 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
91 90
92 printk("cpufreq: AT32AP CPU frequency driver\n"); 91 printk("cpufreq: AT32AP CPU frequency driver\n");
93 92
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 4154ff1101fa..8102c79aaa94 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -162,16 +162,28 @@ config BF549
162config BF561 162config BF561
163 bool "BF561" 163 bool "BF561"
164 help 164 help
165 Not Supported Yet - Work in progress - BF561 Processor Support. 165 BF561 Processor Support.
166 166
167endchoice 167endchoice
168 168
169config BF_REV_MIN
170 int
171 default 0 if (BF52x || BF54x)
172 default 2 if (BF537 || BF536 || BF534)
173 default 3 if (BF561 ||BF533 || BF532 || BF531)
174
175config BF_REV_MAX
176 int
177 default 2 if (BF52x || BF54x)
178 default 3 if (BF537 || BF536 || BF534)
179 default 5 if (BF561)
180 default 6 if (BF533 || BF532 || BF531)
181
169choice 182choice
170 prompt "Silicon Rev" 183 prompt "Silicon Rev"
171 default BF_REV_0_1 if BF527 184 default BF_REV_0_1 if (BF52x || BF54x)
172 default BF_REV_0_2 if BF537 185 default BF_REV_0_2 if (BF534 || BF536 || BF537)
173 default BF_REV_0_3 if BF533 186 default BF_REV_0_3 if (BF531 || BF532 || BF533 || BF561)
174 default BF_REV_0_0 if BF549
175 187
176config BF_REV_0_0 188config BF_REV_0_0
177 bool "0.0" 189 bool "0.0"
@@ -183,7 +195,7 @@ config BF_REV_0_1
183 195
184config BF_REV_0_2 196config BF_REV_0_2
185 bool "0.2" 197 bool "0.2"
186 depends on (BF537 || BF536 || BF534) 198 depends on (BF52x || BF537 || BF536 || BF534 || BF54x)
187 199
188config BF_REV_0_3 200config BF_REV_0_3
189 bool "0.3" 201 bool "0.3"
@@ -197,6 +209,10 @@ config BF_REV_0_5
197 bool "0.5" 209 bool "0.5"
198 depends on (BF561 || BF533 || BF532 || BF531) 210 depends on (BF561 || BF533 || BF532 || BF531)
199 211
212config BF_REV_0_6
213 bool "0.6"
214 depends on (BF533 || BF532 || BF531)
215
200config BF_REV_ANY 216config BF_REV_ANY
201 bool "any" 217 bool "any"
202 218
@@ -249,7 +265,7 @@ config MEM_MT48LC8M32B2B5_7
249 265
250config MEM_MT48LC32M16A2TG_75 266config MEM_MT48LC32M16A2TG_75
251 bool 267 bool
252 depends on (BFIN527_EZKIT || BFIN532_IP0X || BLACKSTAMP) 268 depends on (BFIN527_EZKIT || BFIN532_IP0X || BLACKSTAMP || BFIN526_EZBRD)
253 default y 269 default y
254 270
255source "arch/blackfin/mach-bf527/Kconfig" 271source "arch/blackfin/mach-bf527/Kconfig"
@@ -286,13 +302,20 @@ config BOOT_LOAD
286 memory region is used to capture NULL pointer references as well 302 memory region is used to capture NULL pointer references as well
287 as some core kernel functions. 303 as some core kernel functions.
288 304
305config ROM_BASE
306 hex "Kernel ROM Base"
307 default "0x20040000"
308 range 0x20000000 0x20400000 if !(BF54x || BF561)
309 range 0x20000000 0x30000000 if (BF54x || BF561)
310 help
311
289comment "Clock/PLL Setup" 312comment "Clock/PLL Setup"
290 313
291config CLKIN_HZ 314config CLKIN_HZ
292 int "Frequency of the crystal on the board in Hz" 315 int "Frequency of the crystal on the board in Hz"
293 default "11059200" if BFIN533_STAMP 316 default "11059200" if BFIN533_STAMP
294 default "27000000" if BFIN533_EZKIT 317 default "27000000" if BFIN533_EZKIT
295 default "25000000" if (BFIN537_STAMP || BFIN527_EZKIT || H8606_HVSISTEMAS || BLACKSTAMP) 318 default "25000000" if (BFIN537_STAMP || BFIN527_EZKIT || H8606_HVSISTEMAS || BLACKSTAMP || BFIN526_EZBRD)
296 default "30000000" if BFIN561_EZKIT 319 default "30000000" if BFIN561_EZKIT
297 default "24576000" if PNAV10 320 default "24576000" if PNAV10
298 default "10000000" if BFIN532_IP0X 321 default "10000000" if BFIN532_IP0X
@@ -332,7 +355,7 @@ config VCO_MULT
332 default "22" if BFIN533_BLUETECHNIX_CM 355 default "22" if BFIN533_BLUETECHNIX_CM
333 default "20" if (BFIN537_BLUETECHNIX_CM || BFIN527_BLUETECHNIX_CM || BFIN561_BLUETECHNIX_CM) 356 default "20" if (BFIN537_BLUETECHNIX_CM || BFIN527_BLUETECHNIX_CM || BFIN561_BLUETECHNIX_CM)
334 default "20" if BFIN561_EZKIT 357 default "20" if BFIN561_EZKIT
335 default "16" if (H8606_HVSISTEMAS || BLACKSTAMP) 358 default "16" if (H8606_HVSISTEMAS || BLACKSTAMP || BFIN526_EZBRD)
336 help 359 help
337 This controls the frequency of the on-chip PLL. This can be between 1 and 64. 360 This controls the frequency of the on-chip PLL. This can be between 1 and 64.
338 PLL Frequency = (Crystal Frequency) * (this setting) 361 PLL Frequency = (Crystal Frequency) * (this setting)
@@ -368,14 +391,6 @@ config SCLK_DIV
368 This can be between 1 and 15 391 This can be between 1 and 15
369 System Clock = (PLL frequency) / (this setting) 392 System Clock = (PLL frequency) / (this setting)
370 393
371config MAX_MEM_SIZE
372 int "Max SDRAM Memory Size in MBytes"
373 depends on !MPU
374 default 512
375 help
376 This is the max memory size that the kernel will create CPLB
377 tables for. Your system will not be able to handle any more.
378
379choice 394choice
380 prompt "DDR SDRAM Chip Type" 395 prompt "DDR SDRAM Chip Type"
381 depends on BFIN_KERNEL_CLOCK 396 depends on BFIN_KERNEL_CLOCK
@@ -389,6 +404,14 @@ config MEM_MT46V32M16_5B
389 bool "MT46V32M16_5B" 404 bool "MT46V32M16_5B"
390endchoice 405endchoice
391 406
407config MAX_MEM_SIZE
408 int "Max SDRAM Memory Size in MBytes"
409 depends on !MPU
410 default 512
411 help
412 This is the max memory size that the kernel will create CPLB
413 tables for. Your system will not be able to handle any more.
414
392# 415#
393# Max & Min Speeds for various Chips 416# Max & Min Speeds for various Chips
394# 417#
@@ -455,8 +478,6 @@ config CYCLES_CLOCKSOURCE
455 478
456source kernel/time/Kconfig 479source kernel/time/Kconfig
457 480
458comment "Memory Setup"
459
460comment "Misc" 481comment "Misc"
461 482
462choice 483choice
@@ -622,6 +643,15 @@ config CPLB_SWITCH_TAB_L1
622 If enabled, the CPLB Switch Tables are linked 643 If enabled, the CPLB Switch Tables are linked
623 into L1 data memory. (less latency) 644 into L1 data memory. (less latency)
624 645
646config APP_STACK_L1
647 bool "Support locating application stack in L1 Scratch Memory"
648 default y
649 help
650 If enabled the application stack can be located in L1
651 scratch memory (less latency).
652
653 Currently only works with FLAT binaries.
654
625comment "Speed Optimizations" 655comment "Speed Optimizations"
626config BFIN_INS_LOWOVERHEAD 656config BFIN_INS_LOWOVERHEAD
627 bool "ins[bwl] low overhead, higher interrupt latency" 657 bool "ins[bwl] low overhead, higher interrupt latency"
@@ -755,6 +785,13 @@ config BFIN_WT
755 785
756endchoice 786endchoice
757 787
788config BFIN_L2_CACHEABLE
789 bool "Cache L2 SRAM"
790 depends on (BFIN_DCACHE || BFIN_ICACHE) && (BF54x || BF561)
791 default n
792 help
793 Select to make L2 SRAM cacheable in L1 data and instruction cache.
794
758config MPU 795config MPU
759 bool "Enable the memory protection unit (EXPERIMENTAL)" 796 bool "Enable the memory protection unit (EXPERIMENTAL)"
760 default n 797 default n
diff --git a/arch/blackfin/Kconfig.debug b/arch/blackfin/Kconfig.debug
index c468624d55f0..3ad25983ec97 100644
--- a/arch/blackfin/Kconfig.debug
+++ b/arch/blackfin/Kconfig.debug
@@ -2,6 +2,22 @@ menu "Kernel hacking"
2 2
3source "lib/Kconfig.debug" 3source "lib/Kconfig.debug"
4 4
5config HAVE_ARCH_KGDB
6 def_bool y
7
8config DEBUG_VERBOSE
9 bool "Verbose fault messages"
10 default y
11 select PRINTK
12 help
13 When a program crashes due to an exception, or the kernel detects
14 an internal error, the kernel can print a not so brief message
15 explaining what the problem was. This debugging information is
16 useful to developers and kernel hackers when tracking down problems,
17 but mostly meaningless to other people. This is always helpful for
18 debugging but serves no purpose on a production system.
19 Most people should say N here.
20
5config DEBUG_MMRS 21config DEBUG_MMRS
6 bool "Generate Blackfin MMR tree" 22 bool "Generate Blackfin MMR tree"
7 select DEBUG_FS 23 select DEBUG_FS
@@ -22,6 +38,44 @@ config DEBUG_HWERR
22 hardware error interrupts and need to know where they are coming 38 hardware error interrupts and need to know where they are coming
23 from. 39 from.
24 40
41config DEBUG_DOUBLEFAULT
42 bool "Debug Double Faults"
43 default n
44 help
45 If an exception is caused while executing code within the exception
46 handler, the NMI handler, the reset vector, or in emulator mode,
47 a double fault occurs. On the Blackfin, this is a unrecoverable
48 event. You have two options:
49 - RESET exactly when double fault occurs. The excepting
50 instruction address is stored in RETX, where the next kernel
51 boot will print it out.
52 - Print debug message. This is much more error prone, although
53 easier to handle. It is error prone since:
54 - The excepting instruction is not committed.
55 - All writebacks from the instruction are prevented.
56 - The generated exception is not taken.
57 - The EXCAUSE field is updated with an unrecoverable event
58 The only way to check this is to see if EXCAUSE contains the
59 unrecoverable event value at every exception return. By selecting
60 this option, you are skipping over the faulting instruction, and
61 hoping things stay together enough to print out a debug message.
62
63 This does add a little kernel code, but is the only method to debug
64 double faults - if unsure say "Y"
65
66choice
67 prompt "Double Fault Failure Method"
68 default DEBUG_DOUBLEFAULT_PRINT
69 depends on DEBUG_DOUBLEFAULT
70
71config DEBUG_DOUBLEFAULT_PRINT
72 bool "Print"
73
74config DEBUG_DOUBLEFAULT_RESET
75 bool "Reset"
76
77endchoice
78
25config DEBUG_ICACHE_CHECK 79config DEBUG_ICACHE_CHECK
26 bool "Check Instruction cache coherency" 80 bool "Check Instruction cache coherency"
27 depends on DEBUG_KERNEL 81 depends on DEBUG_KERNEL
@@ -143,6 +197,7 @@ config DEBUG_BFIN_NO_KERN_HWTRACE
143config EARLY_PRINTK 197config EARLY_PRINTK
144 bool "Early printk" 198 bool "Early printk"
145 default n 199 default n
200 select SERIAL_CORE_CONSOLE
146 help 201 help
147 This option enables special console drivers which allow the kernel 202 This option enables special console drivers which allow the kernel
148 to print messages very early in the bootup process. 203 to print messages very early in the bootup process.
diff --git a/arch/blackfin/Makefile b/arch/blackfin/Makefile
index eac0533d6e4f..6bf50977850c 100644
--- a/arch/blackfin/Makefile
+++ b/arch/blackfin/Makefile
@@ -67,6 +67,7 @@ rev-$(CONFIG_BF_REV_0_2) := 0.2
67rev-$(CONFIG_BF_REV_0_3) := 0.3 67rev-$(CONFIG_BF_REV_0_3) := 0.3
68rev-$(CONFIG_BF_REV_0_4) := 0.4 68rev-$(CONFIG_BF_REV_0_4) := 0.4
69rev-$(CONFIG_BF_REV_0_5) := 0.5 69rev-$(CONFIG_BF_REV_0_5) := 0.5
70rev-$(CONFIG_BF_REV_0_6) := 0.6
70rev-$(CONFIG_BF_REV_NONE) := none 71rev-$(CONFIG_BF_REV_NONE) := none
71rev-$(CONFIG_BF_REV_ANY) := any 72rev-$(CONFIG_BF_REV_ANY) := any
72 73
diff --git a/arch/blackfin/configs/BF526-EZBRD_defconfig b/arch/blackfin/configs/BF526-EZBRD_defconfig
new file mode 100644
index 000000000000..4443a47e516f
--- /dev/null
+++ b/arch/blackfin/configs/BF526-EZBRD_defconfig
@@ -0,0 +1,1427 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.26.3
4# Thu Aug 28 16:49:53 2008
5#
6# CONFIG_MMU is not set
7# CONFIG_FPU is not set
8CONFIG_RWSEM_GENERIC_SPINLOCK=y
9# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
10CONFIG_BLACKFIN=y
11CONFIG_ZONE_DMA=y
12CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_IRQ_PROBE=y
16CONFIG_GENERIC_GPIO=y
17CONFIG_FORCE_MAX_ZONEORDER=14
18CONFIG_GENERIC_CALIBRATE_DELAY=y
19CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
20
21#
22# General setup
23#
24CONFIG_EXPERIMENTAL=y
25CONFIG_BROKEN_ON_SMP=y
26CONFIG_INIT_ENV_ARG_LIMIT=32
27CONFIG_LOCALVERSION=""
28CONFIG_LOCALVERSION_AUTO=y
29CONFIG_SYSVIPC=y
30CONFIG_SYSVIPC_SYSCTL=y
31# CONFIG_POSIX_MQUEUE is not set
32# CONFIG_BSD_PROCESS_ACCT is not set
33# CONFIG_TASKSTATS is not set
34# CONFIG_AUDIT is not set
35CONFIG_IKCONFIG=y
36CONFIG_IKCONFIG_PROC=y
37CONFIG_LOG_BUF_SHIFT=14
38# CONFIG_CGROUPS is not set
39# CONFIG_GROUP_SCHED is not set
40CONFIG_SYSFS_DEPRECATED=y
41CONFIG_SYSFS_DEPRECATED_V2=y
42# CONFIG_RELAY is not set
43# CONFIG_NAMESPACES is not set
44CONFIG_BLK_DEV_INITRD=y
45CONFIG_INITRAMFS_SOURCE=""
46# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
47CONFIG_SYSCTL=y
48CONFIG_EMBEDDED=y
49CONFIG_UID16=y
50CONFIG_SYSCTL_SYSCALL=y
51CONFIG_SYSCTL_SYSCALL_CHECK=y
52CONFIG_KALLSYMS=y
53# CONFIG_KALLSYMS_EXTRA_PASS is not set
54CONFIG_HOTPLUG=y
55CONFIG_PRINTK=y
56CONFIG_BUG=y
57CONFIG_ELF_CORE=y
58CONFIG_COMPAT_BRK=y
59CONFIG_BASE_FULL=y
60CONFIG_FUTEX=y
61CONFIG_ANON_INODES=y
62CONFIG_EPOLL=y
63CONFIG_SIGNALFD=y
64CONFIG_TIMERFD=y
65CONFIG_EVENTFD=y
66CONFIG_VM_EVENT_COUNTERS=y
67CONFIG_SLAB=y
68# CONFIG_SLUB is not set
69# CONFIG_SLOB is not set
70# CONFIG_PROFILING is not set
71# CONFIG_MARKERS is not set
72CONFIG_HAVE_OPROFILE=y
73# CONFIG_HAVE_KPROBES is not set
74# CONFIG_HAVE_KRETPROBES is not set
75# CONFIG_HAVE_DMA_ATTRS is not set
76CONFIG_SLABINFO=y
77CONFIG_RT_MUTEXES=y
78CONFIG_TINY_SHMEM=y
79CONFIG_BASE_SMALL=0
80CONFIG_MODULES=y
81# CONFIG_MODULE_FORCE_LOAD is not set
82CONFIG_MODULE_UNLOAD=y
83# CONFIG_MODULE_FORCE_UNLOAD is not set
84# CONFIG_MODVERSIONS is not set
85# CONFIG_MODULE_SRCVERSION_ALL is not set
86CONFIG_KMOD=y
87CONFIG_BLOCK=y
88# CONFIG_LBD is not set
89# CONFIG_BLK_DEV_IO_TRACE is not set
90# CONFIG_LSF is not set
91# CONFIG_BLK_DEV_BSG is not set
92
93#
94# IO Schedulers
95#
96CONFIG_IOSCHED_NOOP=y
97# CONFIG_IOSCHED_AS is not set
98# CONFIG_IOSCHED_DEADLINE is not set
99# CONFIG_IOSCHED_CFQ is not set
100# CONFIG_DEFAULT_AS is not set
101# CONFIG_DEFAULT_DEADLINE is not set
102# CONFIG_DEFAULT_CFQ is not set
103CONFIG_DEFAULT_NOOP=y
104CONFIG_DEFAULT_IOSCHED="noop"
105CONFIG_CLASSIC_RCU=y
106# CONFIG_PREEMPT_NONE is not set
107CONFIG_PREEMPT_VOLUNTARY=y
108# CONFIG_PREEMPT is not set
109
110#
111# Blackfin Processor Options
112#
113
114#
115# Processor and Board Settings
116#
117# CONFIG_BF522 is not set
118# CONFIG_BF523 is not set
119# CONFIG_BF524 is not set
120# CONFIG_BF525 is not set
121CONFIG_BF526=y
122# CONFIG_BF527 is not set
123# CONFIG_BF531 is not set
124# CONFIG_BF532 is not set
125# CONFIG_BF533 is not set
126# CONFIG_BF534 is not set
127# CONFIG_BF536 is not set
128# CONFIG_BF537 is not set
129# CONFIG_BF542 is not set
130# CONFIG_BF544 is not set
131# CONFIG_BF547 is not set
132# CONFIG_BF548 is not set
133# CONFIG_BF549 is not set
134# CONFIG_BF561 is not set
135CONFIG_BF_REV_0_0=y
136# CONFIG_BF_REV_0_1 is not set
137# CONFIG_BF_REV_0_2 is not set
138# CONFIG_BF_REV_0_3 is not set
139# CONFIG_BF_REV_0_4 is not set
140# CONFIG_BF_REV_0_5 is not set
141# CONFIG_BF_REV_ANY is not set
142# CONFIG_BF_REV_NONE is not set
143CONFIG_BF52x=y
144CONFIG_MEM_MT48LC32M16A2TG_75=y
145# CONFIG_BFIN527_EZKIT is not set
146# CONFIG_BFIN527_BLUETECHNIX_CM is not set
147CONFIG_BFIN526_EZBRD=y
148
149#
150# BF527 Specific Configuration
151#
152
153#
154# Alternative Multiplexing Scheme
155#
156# CONFIG_BF527_SPORT0_PORTF is not set
157CONFIG_BF527_SPORT0_PORTG=y
158CONFIG_BF527_SPORT0_TSCLK_PG10=y
159# CONFIG_BF527_SPORT0_TSCLK_PG14 is not set
160CONFIG_BF527_UART1_PORTF=y
161# CONFIG_BF527_UART1_PORTG is not set
162# CONFIG_BF527_NAND_D_PORTF is not set
163CONFIG_BF527_NAND_D_PORTH=y
164
165#
166# Interrupt Priority Assignment
167#
168
169#
170# Priority
171#
172CONFIG_IRQ_PLL_WAKEUP=7
173CONFIG_IRQ_DMA0_ERROR=7
174CONFIG_IRQ_DMAR0_BLK=7
175CONFIG_IRQ_DMAR1_BLK=7
176CONFIG_IRQ_DMAR0_OVR=7
177CONFIG_IRQ_DMAR1_OVR=7
178CONFIG_IRQ_PPI_ERROR=7
179CONFIG_IRQ_MAC_ERROR=7
180CONFIG_IRQ_SPORT0_ERROR=7
181CONFIG_IRQ_SPORT1_ERROR=7
182CONFIG_IRQ_UART0_ERROR=7
183CONFIG_IRQ_UART1_ERROR=7
184CONFIG_IRQ_RTC=8
185CONFIG_IRQ_PPI=8
186CONFIG_IRQ_SPORT0_RX=9
187CONFIG_IRQ_SPORT0_TX=9
188CONFIG_IRQ_SPORT1_RX=9
189CONFIG_IRQ_SPORT1_TX=9
190CONFIG_IRQ_TWI=10
191CONFIG_IRQ_SPI=10
192CONFIG_IRQ_UART0_RX=10
193CONFIG_IRQ_UART0_TX=10
194CONFIG_IRQ_UART1_RX=10
195CONFIG_IRQ_UART1_TX=10
196CONFIG_IRQ_OPTSEC=11
197CONFIG_IRQ_CNT=11
198CONFIG_IRQ_MAC_RX=11
199CONFIG_IRQ_PORTH_INTA=11
200CONFIG_IRQ_MAC_TX=11
201CONFIG_IRQ_PORTH_INTB=11
202CONFIG_IRQ_TMR0=12
203CONFIG_IRQ_TMR1=12
204CONFIG_IRQ_TMR2=12
205CONFIG_IRQ_TMR3=12
206CONFIG_IRQ_TMR4=12
207CONFIG_IRQ_TMR5=12
208CONFIG_IRQ_TMR6=12
209CONFIG_IRQ_TMR7=12
210CONFIG_IRQ_PORTG_INTA=12
211CONFIG_IRQ_PORTG_INTB=12
212CONFIG_IRQ_MEM_DMA0=13
213CONFIG_IRQ_MEM_DMA1=13
214CONFIG_IRQ_WATCH=13
215CONFIG_IRQ_PORTF_INTA=13
216CONFIG_IRQ_PORTF_INTB=13
217CONFIG_IRQ_SPI_ERROR=7
218CONFIG_IRQ_NFC_ERROR=7
219CONFIG_IRQ_HDMA_ERROR=7
220CONFIG_IRQ_HDMA=7
221CONFIG_IRQ_USB_EINT=10
222CONFIG_IRQ_USB_INT0=11
223CONFIG_IRQ_USB_INT1=11
224CONFIG_IRQ_USB_INT2=11
225CONFIG_IRQ_USB_DMA=11
226
227#
228# Board customizations
229#
230# CONFIG_CMDLINE_BOOL is not set
231CONFIG_BOOT_LOAD=0x1000
232
233#
234# Clock/PLL Setup
235#
236CONFIG_CLKIN_HZ=25000000
237# CONFIG_BFIN_KERNEL_CLOCK is not set
238CONFIG_MAX_MEM_SIZE=512
239CONFIG_MAX_VCO_HZ=400000000
240CONFIG_MIN_VCO_HZ=50000000
241CONFIG_MAX_SCLK_HZ=133333333
242CONFIG_MIN_SCLK_HZ=27000000
243
244#
245# Kernel Timer/Scheduler
246#
247# CONFIG_HZ_100 is not set
248CONFIG_HZ_250=y
249# CONFIG_HZ_300 is not set
250# CONFIG_HZ_1000 is not set
251CONFIG_HZ=250
252# CONFIG_SCHED_HRTICK is not set
253CONFIG_GENERIC_TIME=y
254CONFIG_GENERIC_CLOCKEVENTS=y
255# CONFIG_CYCLES_CLOCKSOURCE is not set
256# CONFIG_TICK_ONESHOT is not set
257# CONFIG_NO_HZ is not set
258# CONFIG_HIGH_RES_TIMERS is not set
259CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
260
261#
262# Memory Setup
263#
264
265#
266# Misc
267#
268CONFIG_BFIN_SCRATCH_REG_RETN=y
269# CONFIG_BFIN_SCRATCH_REG_RETE is not set
270# CONFIG_BFIN_SCRATCH_REG_CYCLES is not set
271
272#
273# Blackfin Kernel Optimizations
274#
275
276#
277# Memory Optimizations
278#
279CONFIG_I_ENTRY_L1=y
280CONFIG_EXCPT_IRQ_SYSC_L1=y
281CONFIG_DO_IRQ_L1=y
282CONFIG_CORE_TIMER_IRQ_L1=y
283CONFIG_IDLE_L1=y
284# CONFIG_SCHEDULE_L1 is not set
285CONFIG_ARITHMETIC_OPS_L1=y
286CONFIG_ACCESS_OK_L1=y
287# CONFIG_MEMSET_L1 is not set
288# CONFIG_MEMCPY_L1 is not set
289# CONFIG_SYS_BFIN_SPINLOCK_L1 is not set
290# CONFIG_IP_CHECKSUM_L1 is not set
291CONFIG_CACHELINE_ALIGNED_L1=y
292# CONFIG_SYSCALL_TAB_L1 is not set
293# CONFIG_CPLB_SWITCH_TAB_L1 is not set
294
295#
296# Speed Optimizations
297#
298CONFIG_BFIN_INS_LOWOVERHEAD=y
299CONFIG_RAMKERNEL=y
300# CONFIG_ROMKERNEL is not set
301CONFIG_SELECT_MEMORY_MODEL=y
302CONFIG_FLATMEM_MANUAL=y
303# CONFIG_DISCONTIGMEM_MANUAL is not set
304# CONFIG_SPARSEMEM_MANUAL is not set
305CONFIG_FLATMEM=y
306CONFIG_FLAT_NODE_MEM_MAP=y
307# CONFIG_SPARSEMEM_STATIC is not set
308# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
309CONFIG_PAGEFLAGS_EXTENDED=y
310CONFIG_SPLIT_PTLOCK_CPUS=4
311# CONFIG_RESOURCES_64BIT is not set
312CONFIG_ZONE_DMA_FLAG=1
313CONFIG_VIRT_TO_BUS=y
314CONFIG_BFIN_GPTIMERS=y
315CONFIG_BFIN_DMA_5XX=y
316# CONFIG_DMA_UNCACHED_4M is not set
317# CONFIG_DMA_UNCACHED_2M is not set
318CONFIG_DMA_UNCACHED_1M=y
319# CONFIG_DMA_UNCACHED_NONE is not set
320
321#
322# Cache Support
323#
324CONFIG_BFIN_ICACHE=y
325CONFIG_BFIN_DCACHE=y
326# CONFIG_BFIN_DCACHE_BANKA is not set
327# CONFIG_BFIN_ICACHE_LOCK is not set
328CONFIG_BFIN_WB=y
329# CONFIG_BFIN_WT is not set
330# CONFIG_MPU is not set
331
332#
333# Asynchonous Memory Configuration
334#
335
336#
337# EBIU_AMGCTL Global Control
338#
339CONFIG_C_AMCKEN=y
340CONFIG_C_CDPRIO=y
341# CONFIG_C_AMBEN is not set
342# CONFIG_C_AMBEN_B0 is not set
343# CONFIG_C_AMBEN_B0_B1 is not set
344# CONFIG_C_AMBEN_B0_B1_B2 is not set
345CONFIG_C_AMBEN_ALL=y
346
347#
348# EBIU_AMBCTL Control
349#
350CONFIG_BANK_0=0x7BB0
351CONFIG_BANK_1=0x5554
352CONFIG_BANK_2=0x7BB0
353CONFIG_BANK_3=0xFFC0
354
355#
356# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
357#
358# CONFIG_ARCH_SUPPORTS_MSI is not set
359# CONFIG_PCCARD is not set
360
361#
362# Executable file formats
363#
364CONFIG_BINFMT_ELF_FDPIC=y
365CONFIG_BINFMT_FLAT=y
366CONFIG_BINFMT_ZFLAT=y
367# CONFIG_BINFMT_SHARED_FLAT is not set
368# CONFIG_BINFMT_MISC is not set
369
370#
371# Power management options
372#
373# CONFIG_PM is not set
374CONFIG_ARCH_SUSPEND_POSSIBLE=y
375# CONFIG_PM_WAKEUP_BY_GPIO is not set
376
377#
378# CPU Frequency scaling
379#
380# CONFIG_CPU_FREQ is not set
381
382#
383# Networking
384#
385CONFIG_NET=y
386
387#
388# Networking options
389#
390CONFIG_PACKET=y
391# CONFIG_PACKET_MMAP is not set
392CONFIG_UNIX=y
393CONFIG_XFRM=y
394# CONFIG_XFRM_USER is not set
395# CONFIG_XFRM_SUB_POLICY is not set
396# CONFIG_XFRM_MIGRATE is not set
397# CONFIG_XFRM_STATISTICS is not set
398# CONFIG_NET_KEY is not set
399CONFIG_INET=y
400# CONFIG_IP_MULTICAST is not set
401# CONFIG_IP_ADVANCED_ROUTER is not set
402CONFIG_IP_FIB_HASH=y
403CONFIG_IP_PNP=y
404# CONFIG_IP_PNP_DHCP is not set
405# CONFIG_IP_PNP_BOOTP is not set
406# CONFIG_IP_PNP_RARP is not set
407# CONFIG_NET_IPIP is not set
408# CONFIG_NET_IPGRE is not set
409# CONFIG_ARPD is not set
410CONFIG_SYN_COOKIES=y
411# CONFIG_INET_AH is not set
412# CONFIG_INET_ESP is not set
413# CONFIG_INET_IPCOMP is not set
414# CONFIG_INET_XFRM_TUNNEL is not set
415# CONFIG_INET_TUNNEL is not set
416CONFIG_INET_XFRM_MODE_TRANSPORT=y
417CONFIG_INET_XFRM_MODE_TUNNEL=y
418CONFIG_INET_XFRM_MODE_BEET=y
419# CONFIG_INET_LRO is not set
420CONFIG_INET_DIAG=y
421CONFIG_INET_TCP_DIAG=y
422# CONFIG_TCP_CONG_ADVANCED is not set
423CONFIG_TCP_CONG_CUBIC=y
424CONFIG_DEFAULT_TCP_CONG="cubic"
425# CONFIG_TCP_MD5SIG is not set
426# CONFIG_IPV6 is not set
427# CONFIG_NETLABEL is not set
428# CONFIG_NETWORK_SECMARK is not set
429# CONFIG_NETFILTER is not set
430# CONFIG_IP_DCCP is not set
431# CONFIG_IP_SCTP is not set
432# CONFIG_TIPC is not set
433# CONFIG_ATM is not set
434# CONFIG_BRIDGE is not set
435# CONFIG_VLAN_8021Q is not set
436# CONFIG_DECNET is not set
437# CONFIG_LLC2 is not set
438# CONFIG_IPX is not set
439# CONFIG_ATALK is not set
440# CONFIG_X25 is not set
441# CONFIG_LAPB is not set
442# CONFIG_ECONET is not set
443# CONFIG_WAN_ROUTER is not set
444# CONFIG_NET_SCHED is not set
445
446#
447# Network testing
448#
449# CONFIG_NET_PKTGEN is not set
450# CONFIG_HAMRADIO is not set
451# CONFIG_CAN is not set
452# CONFIG_IRDA is not set
453# CONFIG_BT is not set
454# CONFIG_AF_RXRPC is not set
455
456#
457# Wireless
458#
459# CONFIG_CFG80211 is not set
460# CONFIG_WIRELESS_EXT is not set
461# CONFIG_MAC80211 is not set
462# CONFIG_IEEE80211 is not set
463# CONFIG_RFKILL is not set
464# CONFIG_NET_9P is not set
465
466#
467# Device Drivers
468#
469
470#
471# Generic Driver Options
472#
473CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
474CONFIG_STANDALONE=y
475CONFIG_PREVENT_FIRMWARE_BUILD=y
476# CONFIG_FW_LOADER is not set
477# CONFIG_SYS_HYPERVISOR is not set
478# CONFIG_CONNECTOR is not set
479CONFIG_MTD=y
480# CONFIG_MTD_DEBUG is not set
481# CONFIG_MTD_CONCAT is not set
482CONFIG_MTD_PARTITIONS=y
483# CONFIG_MTD_REDBOOT_PARTS is not set
484# CONFIG_MTD_CMDLINE_PARTS is not set
485# CONFIG_MTD_AR7_PARTS is not set
486
487#
488# User Modules And Translation Layers
489#
490CONFIG_MTD_CHAR=m
491CONFIG_MTD_BLKDEVS=y
492CONFIG_MTD_BLOCK=y
493# CONFIG_FTL is not set
494# CONFIG_NFTL is not set
495# CONFIG_INFTL is not set
496# CONFIG_RFD_FTL is not set
497# CONFIG_SSFDC is not set
498# CONFIG_MTD_OOPS is not set
499
500#
501# RAM/ROM/Flash chip drivers
502#
503# CONFIG_MTD_CFI is not set
504CONFIG_MTD_JEDECPROBE=m
505CONFIG_MTD_GEN_PROBE=m
506# CONFIG_MTD_CFI_ADV_OPTIONS is not set
507CONFIG_MTD_MAP_BANK_WIDTH_1=y
508CONFIG_MTD_MAP_BANK_WIDTH_2=y
509CONFIG_MTD_MAP_BANK_WIDTH_4=y
510# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
511# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
512# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
513CONFIG_MTD_CFI_I1=y
514CONFIG_MTD_CFI_I2=y
515# CONFIG_MTD_CFI_I4 is not set
516# CONFIG_MTD_CFI_I8 is not set
517# CONFIG_MTD_CFI_INTELEXT is not set
518# CONFIG_MTD_CFI_AMDSTD is not set
519# CONFIG_MTD_CFI_STAA is not set
520CONFIG_MTD_RAM=y
521CONFIG_MTD_ROM=m
522# CONFIG_MTD_ABSENT is not set
523
524#
525# Mapping drivers for chip access
526#
527CONFIG_MTD_COMPLEX_MAPPINGS=y
528# CONFIG_MTD_PHYSMAP is not set
529# CONFIG_MTD_GPIO_ADDR is not set
530# CONFIG_MTD_UCLINUX is not set
531# CONFIG_MTD_PLATRAM is not set
532
533#
534# Self-contained MTD device drivers
535#
536# CONFIG_MTD_DATAFLASH is not set
537# CONFIG_MTD_M25P80 is not set
538# CONFIG_MTD_SLRAM is not set
539# CONFIG_MTD_PHRAM is not set
540# CONFIG_MTD_MTDRAM is not set
541# CONFIG_MTD_BLOCK2MTD is not set
542
543#
544# Disk-On-Chip Device Drivers
545#
546# CONFIG_MTD_DOC2000 is not set
547# CONFIG_MTD_DOC2001 is not set
548# CONFIG_MTD_DOC2001PLUS is not set
549CONFIG_MTD_NAND=m
550# CONFIG_MTD_NAND_VERIFY_WRITE is not set
551# CONFIG_MTD_NAND_ECC_SMC is not set
552# CONFIG_MTD_NAND_MUSEUM_IDS is not set
553CONFIG_MTD_NAND_BFIN=m
554CONFIG_BFIN_NAND_BASE=0x20212000
555CONFIG_BFIN_NAND_CLE=2
556CONFIG_BFIN_NAND_ALE=1
557CONFIG_BFIN_NAND_READY=3
558CONFIG_MTD_NAND_IDS=m
559# CONFIG_MTD_NAND_BF5XX is not set
560# CONFIG_MTD_NAND_DISKONCHIP is not set
561# CONFIG_MTD_NAND_NANDSIM is not set
562# CONFIG_MTD_NAND_PLATFORM is not set
563# CONFIG_MTD_ALAUDA is not set
564# CONFIG_MTD_ONENAND is not set
565
566#
567# UBI - Unsorted block images
568#
569# CONFIG_MTD_UBI is not set
570# CONFIG_PARPORT is not set
571CONFIG_BLK_DEV=y
572# CONFIG_BLK_DEV_COW_COMMON is not set
573# CONFIG_BLK_DEV_LOOP is not set
574# CONFIG_BLK_DEV_NBD is not set
575# CONFIG_BLK_DEV_UB is not set
576CONFIG_BLK_DEV_RAM=y
577CONFIG_BLK_DEV_RAM_COUNT=16
578CONFIG_BLK_DEV_RAM_SIZE=4096
579# CONFIG_BLK_DEV_XIP is not set
580# CONFIG_CDROM_PKTCDVD is not set
581# CONFIG_ATA_OVER_ETH is not set
582CONFIG_MISC_DEVICES=y
583# CONFIG_EEPROM_93CX6 is not set
584# CONFIG_ENCLOSURE_SERVICES is not set
585CONFIG_HAVE_IDE=y
586# CONFIG_IDE is not set
587
588#
589# SCSI device support
590#
591# CONFIG_RAID_ATTRS is not set
592# CONFIG_SCSI is not set
593# CONFIG_SCSI_DMA is not set
594# CONFIG_SCSI_NETLINK is not set
595# CONFIG_ATA is not set
596# CONFIG_MD is not set
597CONFIG_NETDEVICES=y
598# CONFIG_NETDEVICES_MULTIQUEUE is not set
599# CONFIG_DUMMY is not set
600# CONFIG_BONDING is not set
601# CONFIG_MACVLAN is not set
602# CONFIG_EQUALIZER is not set
603# CONFIG_TUN is not set
604# CONFIG_VETH is not set
605CONFIG_PHYLIB=y
606
607#
608# MII PHY device drivers
609#
610# CONFIG_MARVELL_PHY is not set
611# CONFIG_DAVICOM_PHY is not set
612# CONFIG_QSEMI_PHY is not set
613# CONFIG_LXT_PHY is not set
614# CONFIG_CICADA_PHY is not set
615# CONFIG_VITESSE_PHY is not set
616# CONFIG_SMSC_PHY is not set
617# CONFIG_BROADCOM_PHY is not set
618# CONFIG_ICPLUS_PHY is not set
619# CONFIG_REALTEK_PHY is not set
620# CONFIG_FIXED_PHY is not set
621# CONFIG_MDIO_BITBANG is not set
622CONFIG_NET_ETHERNET=y
623CONFIG_MII=y
624CONFIG_BFIN_MAC=y
625CONFIG_BFIN_TX_DESC_NUM=10
626CONFIG_BFIN_RX_DESC_NUM=20
627CONFIG_BFIN_MAC_RMII=y
628# CONFIG_SMC91X is not set
629# CONFIG_SMSC911X is not set
630# CONFIG_DM9000 is not set
631# CONFIG_ENC28J60 is not set
632# CONFIG_IBM_NEW_EMAC_ZMII is not set
633# CONFIG_IBM_NEW_EMAC_RGMII is not set
634# CONFIG_IBM_NEW_EMAC_TAH is not set
635# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
636# CONFIG_B44 is not set
637CONFIG_NETDEV_1000=y
638# CONFIG_E1000E_ENABLED is not set
639# CONFIG_AX88180 is not set
640CONFIG_NETDEV_10000=y
641
642#
643# Wireless LAN
644#
645# CONFIG_WLAN_PRE80211 is not set
646# CONFIG_WLAN_80211 is not set
647# CONFIG_IWLWIFI_LEDS is not set
648
649#
650# USB Network Adapters
651#
652# CONFIG_USB_CATC is not set
653# CONFIG_USB_KAWETH is not set
654# CONFIG_USB_PEGASUS is not set
655# CONFIG_USB_RTL8150 is not set
656# CONFIG_USB_USBNET is not set
657# CONFIG_WAN is not set
658# CONFIG_PPP is not set
659# CONFIG_SLIP is not set
660# CONFIG_NETCONSOLE is not set
661# CONFIG_NETPOLL is not set
662# CONFIG_NET_POLL_CONTROLLER is not set
663# CONFIG_ISDN is not set
664# CONFIG_PHONE is not set
665
666#
667# Input device support
668#
669CONFIG_INPUT=y
670# CONFIG_INPUT_FF_MEMLESS is not set
671# CONFIG_INPUT_POLLDEV is not set
672
673#
674# Userland interfaces
675#
676# CONFIG_INPUT_MOUSEDEV is not set
677# CONFIG_INPUT_JOYDEV is not set
678# CONFIG_INPUT_EVDEV is not set
679# CONFIG_INPUT_EVBUG is not set
680
681#
682# Input Device Drivers
683#
684# CONFIG_INPUT_KEYBOARD is not set
685# CONFIG_INPUT_MOUSE is not set
686# CONFIG_INPUT_JOYSTICK is not set
687# CONFIG_INPUT_TABLET is not set
688# CONFIG_INPUT_TOUCHSCREEN is not set
689CONFIG_INPUT_MISC=y
690# CONFIG_INPUT_ATI_REMOTE is not set
691# CONFIG_INPUT_ATI_REMOTE2 is not set
692# CONFIG_INPUT_KEYSPAN_REMOTE is not set
693# CONFIG_INPUT_POWERMATE is not set
694# CONFIG_INPUT_YEALINK is not set
695# CONFIG_INPUT_UINPUT is not set
696# CONFIG_TWI_KEYPAD is not set
697
698#
699# Hardware I/O ports
700#
701# CONFIG_SERIO is not set
702# CONFIG_GAMEPORT is not set
703
704#
705# Character devices
706#
707# CONFIG_AD9960 is not set
708# CONFIG_SPI_ADC_BF533 is not set
709# CONFIG_BF5xx_PPIFCD is not set
710# CONFIG_BFIN_SIMPLE_TIMER is not set
711# CONFIG_BF5xx_PPI is not set
712# CONFIG_BFIN_SPORT is not set
713# CONFIG_BFIN_TIMER_LATENCY is not set
714# CONFIG_TWI_LCD is not set
715CONFIG_SIMPLE_GPIO=m
716CONFIG_VT=y
717CONFIG_VT_CONSOLE=y
718CONFIG_HW_CONSOLE=y
719# CONFIG_VT_HW_CONSOLE_BINDING is not set
720CONFIG_DEVKMEM=y
721# CONFIG_SERIAL_NONSTANDARD is not set
722
723#
724# Serial drivers
725#
726# CONFIG_SERIAL_8250 is not set
727
728#
729# Non-8250 serial port support
730#
731CONFIG_SERIAL_BFIN=y
732CONFIG_SERIAL_BFIN_CONSOLE=y
733CONFIG_SERIAL_BFIN_DMA=y
734# CONFIG_SERIAL_BFIN_PIO is not set
735# CONFIG_SERIAL_BFIN_UART0 is not set
736CONFIG_SERIAL_BFIN_UART1=y
737# CONFIG_BFIN_UART1_CTSRTS is not set
738CONFIG_SERIAL_CORE=y
739CONFIG_SERIAL_CORE_CONSOLE=y
740# CONFIG_SERIAL_BFIN_SPORT is not set
741CONFIG_UNIX98_PTYS=y
742# CONFIG_LEGACY_PTYS is not set
743CONFIG_BFIN_OTP=y
744# CONFIG_BFIN_OTP_WRITE_ENABLE is not set
745
746#
747# CAN, the car bus and industrial fieldbus
748#
749# CONFIG_CAN4LINUX is not set
750# CONFIG_IPMI_HANDLER is not set
751# CONFIG_HW_RANDOM is not set
752# CONFIG_R3964 is not set
753# CONFIG_RAW_DRIVER is not set
754# CONFIG_TCG_TPM is not set
755CONFIG_I2C=y
756CONFIG_I2C_BOARDINFO=y
757CONFIG_I2C_CHARDEV=m
758CONFIG_I2C_HELPER_AUTO=y
759
760#
761# I2C Hardware Bus support
762#
763CONFIG_I2C_BLACKFIN_TWI=y
764CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=50
765# CONFIG_I2C_GPIO is not set
766# CONFIG_I2C_OCORES is not set
767# CONFIG_I2C_PARPORT_LIGHT is not set
768# CONFIG_I2C_SIMTEC is not set
769# CONFIG_I2C_TAOS_EVM is not set
770# CONFIG_I2C_STUB is not set
771# CONFIG_I2C_TINY_USB is not set
772# CONFIG_I2C_PCA_PLATFORM is not set
773
774#
775# Miscellaneous I2C Chip support
776#
777# CONFIG_DS1682 is not set
778# CONFIG_SENSORS_AD5252 is not set
779# CONFIG_SENSORS_EEPROM is not set
780# CONFIG_SENSORS_PCF8574 is not set
781# CONFIG_PCF8575 is not set
782# CONFIG_SENSORS_PCF8591 is not set
783# CONFIG_SENSORS_MAX6875 is not set
784# CONFIG_SENSORS_TSL2550 is not set
785# CONFIG_I2C_DEBUG_CORE is not set
786# CONFIG_I2C_DEBUG_ALGO is not set
787# CONFIG_I2C_DEBUG_BUS is not set
788# CONFIG_I2C_DEBUG_CHIP is not set
789CONFIG_SPI=y
790CONFIG_SPI_MASTER=y
791
792#
793# SPI Master Controller Drivers
794#
795CONFIG_SPI_BFIN=y
796# CONFIG_SPI_BITBANG is not set
797
798#
799# SPI Protocol Masters
800#
801# CONFIG_SPI_AT25 is not set
802# CONFIG_SPI_SPIDEV is not set
803# CONFIG_SPI_TLE62X0 is not set
804# CONFIG_W1 is not set
805# CONFIG_POWER_SUPPLY is not set
806CONFIG_HWMON=y
807# CONFIG_HWMON_VID is not set
808# CONFIG_SENSORS_AD7418 is not set
809# CONFIG_SENSORS_ADM1021 is not set
810# CONFIG_SENSORS_ADM1025 is not set
811# CONFIG_SENSORS_ADM1026 is not set
812# CONFIG_SENSORS_ADM1029 is not set
813# CONFIG_SENSORS_ADM1031 is not set
814# CONFIG_SENSORS_ADM9240 is not set
815# CONFIG_SENSORS_ADT7470 is not set
816# CONFIG_SENSORS_ADT7473 is not set
817# CONFIG_SENSORS_ATXP1 is not set
818# CONFIG_SENSORS_DS1621 is not set
819# CONFIG_SENSORS_F71805F is not set
820# CONFIG_SENSORS_F71882FG is not set
821# CONFIG_SENSORS_F75375S is not set
822# CONFIG_SENSORS_GL518SM is not set
823# CONFIG_SENSORS_GL520SM is not set
824# CONFIG_SENSORS_IT87 is not set
825# CONFIG_SENSORS_LM63 is not set
826# CONFIG_SENSORS_LM70 is not set
827# CONFIG_SENSORS_LM75 is not set
828# CONFIG_SENSORS_LM77 is not set
829# CONFIG_SENSORS_LM78 is not set
830# CONFIG_SENSORS_LM80 is not set
831# CONFIG_SENSORS_LM83 is not set
832# CONFIG_SENSORS_LM85 is not set
833# CONFIG_SENSORS_LM87 is not set
834# CONFIG_SENSORS_LM90 is not set
835# CONFIG_SENSORS_LM92 is not set
836# CONFIG_SENSORS_LM93 is not set
837# CONFIG_SENSORS_MAX1619 is not set
838# CONFIG_SENSORS_MAX6650 is not set
839# CONFIG_SENSORS_PC87360 is not set
840# CONFIG_SENSORS_PC87427 is not set
841# CONFIG_SENSORS_DME1737 is not set
842# CONFIG_SENSORS_SMSC47M1 is not set
843# CONFIG_SENSORS_SMSC47M192 is not set
844# CONFIG_SENSORS_SMSC47B397 is not set
845# CONFIG_SENSORS_ADS7828 is not set
846# CONFIG_SENSORS_THMC50 is not set
847# CONFIG_SENSORS_VT1211 is not set
848# CONFIG_SENSORS_W83781D is not set
849# CONFIG_SENSORS_W83791D is not set
850# CONFIG_SENSORS_W83792D is not set
851# CONFIG_SENSORS_W83793 is not set
852# CONFIG_SENSORS_W83L785TS is not set
853# CONFIG_SENSORS_W83L786NG is not set
854# CONFIG_SENSORS_W83627HF is not set
855# CONFIG_SENSORS_W83627EHF is not set
856# CONFIG_HWMON_DEBUG_CHIP is not set
857# CONFIG_THERMAL is not set
858# CONFIG_THERMAL_HWMON is not set
859CONFIG_WATCHDOG=y
860# CONFIG_WATCHDOG_NOWAYOUT is not set
861
862#
863# Watchdog Device Drivers
864#
865# CONFIG_SOFT_WATCHDOG is not set
866CONFIG_BFIN_WDT=y
867
868#
869# USB-based Watchdog Cards
870#
871# CONFIG_USBPCWATCHDOG is not set
872
873#
874# Sonics Silicon Backplane
875#
876CONFIG_SSB_POSSIBLE=y
877# CONFIG_SSB is not set
878
879#
880# Multifunction device drivers
881#
882# CONFIG_MFD_SM501 is not set
883# CONFIG_HTC_PASIC3 is not set
884
885#
886# Multimedia devices
887#
888
889#
890# Multimedia core support
891#
892# CONFIG_VIDEO_DEV is not set
893# CONFIG_DVB_CORE is not set
894# CONFIG_VIDEO_MEDIA is not set
895
896#
897# Multimedia drivers
898#
899# CONFIG_DAB is not set
900
901#
902# Graphics support
903#
904# CONFIG_VGASTATE is not set
905# CONFIG_VIDEO_OUTPUT_CONTROL is not set
906# CONFIG_FB is not set
907# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
908
909#
910# Display device support
911#
912# CONFIG_DISPLAY_SUPPORT is not set
913
914#
915# Console display driver support
916#
917CONFIG_DUMMY_CONSOLE=y
918
919#
920# Sound
921#
922CONFIG_SOUND=m
923
924#
925# Advanced Linux Sound Architecture
926#
927CONFIG_SND=m
928CONFIG_SND_TIMER=m
929CONFIG_SND_PCM=m
930# CONFIG_SND_SEQUENCER is not set
931CONFIG_SND_OSSEMUL=y
932CONFIG_SND_MIXER_OSS=m
933CONFIG_SND_PCM_OSS=m
934CONFIG_SND_PCM_OSS_PLUGINS=y
935# CONFIG_SND_DYNAMIC_MINORS is not set
936CONFIG_SND_SUPPORT_OLD_API=y
937CONFIG_SND_VERBOSE_PROCFS=y
938# CONFIG_SND_VERBOSE_PRINTK is not set
939# CONFIG_SND_DEBUG is not set
940
941#
942# Generic devices
943#
944# CONFIG_SND_DUMMY is not set
945# CONFIG_SND_MTPAV is not set
946# CONFIG_SND_SERIAL_U16550 is not set
947# CONFIG_SND_MPU401 is not set
948
949#
950# SPI devices
951#
952
953#
954# ALSA Blackfin devices
955#
956# CONFIG_SND_BLACKFIN_AD1836 is not set
957# CONFIG_SND_BFIN_AD73311 is not set
958# CONFIG_SND_BFIN_AD73322 is not set
959
960#
961# USB devices
962#
963# CONFIG_SND_USB_AUDIO is not set
964# CONFIG_SND_USB_CAIAQ is not set
965
966#
967# System on Chip audio support
968#
969CONFIG_SND_SOC=m
970CONFIG_SND_BF5XX_I2S=m
971CONFIG_SND_BF5XX_SOC_SSM2602=m
972# CONFIG_SND_BF5XX_AC97 is not set
973CONFIG_SND_BF5XX_SOC_SPORT=m
974CONFIG_SND_BF5XX_SOC_I2S=m
975CONFIG_SND_BF5XX_SPORT_NUM=0
976
977#
978# ALSA SoC audio for Freescale SOCs
979#
980
981#
982# SoC Audio for the Texas Instruments OMAP
983#
984CONFIG_SND_SOC_SSM2602=m
985
986#
987# Open Sound System
988#
989# CONFIG_SOUND_PRIME is not set
990CONFIG_HID_SUPPORT=y
991CONFIG_HID=y
992# CONFIG_HID_DEBUG is not set
993# CONFIG_HIDRAW is not set
994
995#
996# USB Input Devices
997#
998CONFIG_USB_HID=y
999# CONFIG_USB_HIDINPUT_POWERBOOK is not set
1000# CONFIG_HID_FF is not set
1001# CONFIG_USB_HIDDEV is not set
1002CONFIG_USB_SUPPORT=y
1003CONFIG_USB_ARCH_HAS_HCD=y
1004# CONFIG_USB_ARCH_HAS_OHCI is not set
1005# CONFIG_USB_ARCH_HAS_EHCI is not set
1006CONFIG_USB=y
1007# CONFIG_USB_DEBUG is not set
1008# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
1009
1010#
1011# Miscellaneous USB options
1012#
1013# CONFIG_USB_DEVICEFS is not set
1014CONFIG_USB_DEVICE_CLASS=y
1015# CONFIG_USB_DYNAMIC_MINORS is not set
1016# CONFIG_USB_OTG is not set
1017# CONFIG_USB_OTG_WHITELIST is not set
1018CONFIG_USB_OTG_BLACKLIST_HUB=y
1019
1020#
1021# USB Host Controller Drivers
1022#
1023# CONFIG_USB_C67X00_HCD is not set
1024# CONFIG_USB_ISP116X_HCD is not set
1025# CONFIG_USB_ISP1760_HCD is not set
1026# CONFIG_USB_ISP1362_HCD is not set
1027# CONFIG_USB_SL811_HCD is not set
1028# CONFIG_USB_R8A66597_HCD is not set
1029CONFIG_USB_MUSB_HDRC=y
1030CONFIG_USB_MUSB_SOC=y
1031
1032#
1033# Blackfin high speed USB support
1034#
1035CONFIG_USB_MUSB_HOST=y
1036# CONFIG_USB_MUSB_PERIPHERAL is not set
1037# CONFIG_USB_MUSB_OTG is not set
1038CONFIG_USB_MUSB_HDRC_HCD=y
1039CONFIG_MUSB_PIO_ONLY=y
1040CONFIG_USB_MUSB_LOGLEVEL=0
1041
1042#
1043# USB Device Class drivers
1044#
1045# CONFIG_USB_ACM is not set
1046# CONFIG_USB_PRINTER is not set
1047# CONFIG_USB_WDM is not set
1048
1049#
1050# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
1051#
1052
1053#
1054# may also be needed; see USB_STORAGE Help for more information
1055#
1056# CONFIG_USB_LIBUSUAL is not set
1057
1058#
1059# USB Imaging devices
1060#
1061# CONFIG_USB_MDC800 is not set
1062CONFIG_USB_MON=y
1063
1064#
1065# USB port drivers
1066#
1067# CONFIG_USB_SERIAL is not set
1068
1069#
1070# USB Miscellaneous drivers
1071#
1072# CONFIG_USB_EMI62 is not set
1073# CONFIG_USB_EMI26 is not set
1074# CONFIG_USB_ADUTUX is not set
1075# CONFIG_USB_AUERSWALD is not set
1076# CONFIG_USB_RIO500 is not set
1077# CONFIG_USB_LEGOTOWER is not set
1078# CONFIG_USB_LCD is not set
1079# CONFIG_USB_BERRY_CHARGE is not set
1080# CONFIG_USB_LED is not set
1081# CONFIG_USB_CYPRESS_CY7C63 is not set
1082# CONFIG_USB_CYTHERM is not set
1083# CONFIG_USB_PHIDGET is not set
1084# CONFIG_USB_IDMOUSE is not set
1085# CONFIG_USB_FTDI_ELAN is not set
1086# CONFIG_USB_APPLEDISPLAY is not set
1087# CONFIG_USB_SISUSBVGA is not set
1088# CONFIG_USB_LD is not set
1089# CONFIG_USB_TRANCEVIBRATOR is not set
1090# CONFIG_USB_IOWARRIOR is not set
1091# CONFIG_USB_ISIGHTFW is not set
1092# CONFIG_USB_GADGET is not set
1093# CONFIG_MMC is not set
1094# CONFIG_MEMSTICK is not set
1095# CONFIG_NEW_LEDS is not set
1096# CONFIG_ACCESSIBILITY is not set
1097CONFIG_RTC_LIB=y
1098CONFIG_RTC_CLASS=y
1099CONFIG_RTC_HCTOSYS=y
1100CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1101# CONFIG_RTC_DEBUG is not set
1102
1103#
1104# RTC interfaces
1105#
1106CONFIG_RTC_INTF_SYSFS=y
1107CONFIG_RTC_INTF_PROC=y
1108CONFIG_RTC_INTF_DEV=y
1109# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1110# CONFIG_RTC_DRV_TEST is not set
1111
1112#
1113# I2C RTC drivers
1114#
1115# CONFIG_RTC_DRV_DS1307 is not set
1116# CONFIG_RTC_DRV_DS1374 is not set
1117# CONFIG_RTC_DRV_DS1672 is not set
1118# CONFIG_RTC_DRV_MAX6900 is not set
1119# CONFIG_RTC_DRV_RS5C372 is not set
1120# CONFIG_RTC_DRV_ISL1208 is not set
1121# CONFIG_RTC_DRV_X1205 is not set
1122# CONFIG_RTC_DRV_PCF8563 is not set
1123# CONFIG_RTC_DRV_PCF8583 is not set
1124# CONFIG_RTC_DRV_M41T80 is not set
1125# CONFIG_RTC_DRV_S35390A is not set
1126# CONFIG_RTC_DRV_FM3130 is not set
1127
1128#
1129# SPI RTC drivers
1130#
1131# CONFIG_RTC_DRV_MAX6902 is not set
1132# CONFIG_RTC_DRV_R9701 is not set
1133# CONFIG_RTC_DRV_RS5C348 is not set
1134
1135#
1136# Platform RTC drivers
1137#
1138# CONFIG_RTC_DRV_DS1511 is not set
1139# CONFIG_RTC_DRV_DS1553 is not set
1140# CONFIG_RTC_DRV_DS1742 is not set
1141# CONFIG_RTC_DRV_STK17TA8 is not set
1142# CONFIG_RTC_DRV_M48T86 is not set
1143# CONFIG_RTC_DRV_M48T59 is not set
1144# CONFIG_RTC_DRV_V3020 is not set
1145
1146#
1147# on-CPU RTC drivers
1148#
1149CONFIG_RTC_DRV_BFIN=y
1150# CONFIG_UIO is not set
1151
1152#
1153# File systems
1154#
1155# CONFIG_EXT2_FS is not set
1156# CONFIG_EXT3_FS is not set
1157# CONFIG_EXT4DEV_FS is not set
1158# CONFIG_REISERFS_FS is not set
1159# CONFIG_JFS_FS is not set
1160# CONFIG_FS_POSIX_ACL is not set
1161# CONFIG_XFS_FS is not set
1162# CONFIG_OCFS2_FS is not set
1163# CONFIG_DNOTIFY is not set
1164CONFIG_INOTIFY=y
1165CONFIG_INOTIFY_USER=y
1166# CONFIG_QUOTA is not set
1167# CONFIG_AUTOFS_FS is not set
1168# CONFIG_AUTOFS4_FS is not set
1169# CONFIG_FUSE_FS is not set
1170
1171#
1172# CD-ROM/DVD Filesystems
1173#
1174# CONFIG_ISO9660_FS is not set
1175# CONFIG_UDF_FS is not set
1176
1177#
1178# DOS/FAT/NT Filesystems
1179#
1180# CONFIG_MSDOS_FS is not set
1181# CONFIG_VFAT_FS is not set
1182# CONFIG_NTFS_FS is not set
1183
1184#
1185# Pseudo filesystems
1186#
1187CONFIG_PROC_FS=y
1188CONFIG_PROC_SYSCTL=y
1189CONFIG_SYSFS=y
1190# CONFIG_TMPFS is not set
1191# CONFIG_HUGETLB_PAGE is not set
1192# CONFIG_CONFIGFS_FS is not set
1193
1194#
1195# Miscellaneous filesystems
1196#
1197# CONFIG_ADFS_FS is not set
1198# CONFIG_AFFS_FS is not set
1199# CONFIG_HFS_FS is not set
1200# CONFIG_HFSPLUS_FS is not set
1201# CONFIG_BEFS_FS is not set
1202# CONFIG_BFS_FS is not set
1203# CONFIG_EFS_FS is not set
1204CONFIG_YAFFS_FS=m
1205CONFIG_YAFFS_YAFFS1=y
1206# CONFIG_YAFFS_9BYTE_TAGS is not set
1207# CONFIG_YAFFS_DOES_ECC is not set
1208CONFIG_YAFFS_YAFFS2=y
1209CONFIG_YAFFS_AUTO_YAFFS2=y
1210# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
1211# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
1212# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
1213CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
1214CONFIG_JFFS2_FS=m
1215CONFIG_JFFS2_FS_DEBUG=0
1216CONFIG_JFFS2_FS_WRITEBUFFER=y
1217# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
1218# CONFIG_JFFS2_SUMMARY is not set
1219# CONFIG_JFFS2_FS_XATTR is not set
1220# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
1221CONFIG_JFFS2_ZLIB=y
1222# CONFIG_JFFS2_LZO is not set
1223CONFIG_JFFS2_RTIME=y
1224# CONFIG_JFFS2_RUBIN is not set
1225# CONFIG_CRAMFS is not set
1226# CONFIG_VXFS_FS is not set
1227# CONFIG_MINIX_FS is not set
1228# CONFIG_HPFS_FS is not set
1229# CONFIG_QNX4FS_FS is not set
1230# CONFIG_ROMFS_FS is not set
1231# CONFIG_SYSV_FS is not set
1232# CONFIG_UFS_FS is not set
1233CONFIG_NETWORK_FILESYSTEMS=y
1234CONFIG_NFS_FS=m
1235CONFIG_NFS_V3=y
1236# CONFIG_NFS_V3_ACL is not set
1237# CONFIG_NFS_V4 is not set
1238# CONFIG_NFSD is not set
1239CONFIG_LOCKD=m
1240CONFIG_LOCKD_V4=y
1241CONFIG_NFS_COMMON=y
1242CONFIG_SUNRPC=m
1243# CONFIG_SUNRPC_BIND34 is not set
1244# CONFIG_RPCSEC_GSS_KRB5 is not set
1245# CONFIG_RPCSEC_GSS_SPKM3 is not set
1246CONFIG_SMB_FS=m
1247# CONFIG_SMB_NLS_DEFAULT is not set
1248# CONFIG_CIFS is not set
1249# CONFIG_NCP_FS is not set
1250# CONFIG_CODA_FS is not set
1251# CONFIG_AFS_FS is not set
1252
1253#
1254# Partition Types
1255#
1256# CONFIG_PARTITION_ADVANCED is not set
1257CONFIG_MSDOS_PARTITION=y
1258CONFIG_NLS=m
1259CONFIG_NLS_DEFAULT="iso8859-1"
1260# CONFIG_NLS_CODEPAGE_437 is not set
1261# CONFIG_NLS_CODEPAGE_737 is not set
1262# CONFIG_NLS_CODEPAGE_775 is not set
1263# CONFIG_NLS_CODEPAGE_850 is not set
1264# CONFIG_NLS_CODEPAGE_852 is not set
1265# CONFIG_NLS_CODEPAGE_855 is not set
1266# CONFIG_NLS_CODEPAGE_857 is not set
1267# CONFIG_NLS_CODEPAGE_860 is not set
1268# CONFIG_NLS_CODEPAGE_861 is not set
1269# CONFIG_NLS_CODEPAGE_862 is not set
1270# CONFIG_NLS_CODEPAGE_863 is not set
1271# CONFIG_NLS_CODEPAGE_864 is not set
1272# CONFIG_NLS_CODEPAGE_865 is not set
1273# CONFIG_NLS_CODEPAGE_866 is not set
1274# CONFIG_NLS_CODEPAGE_869 is not set
1275# CONFIG_NLS_CODEPAGE_936 is not set
1276# CONFIG_NLS_CODEPAGE_950 is not set
1277# CONFIG_NLS_CODEPAGE_932 is not set
1278# CONFIG_NLS_CODEPAGE_949 is not set
1279# CONFIG_NLS_CODEPAGE_874 is not set
1280# CONFIG_NLS_ISO8859_8 is not set
1281# CONFIG_NLS_CODEPAGE_1250 is not set
1282# CONFIG_NLS_CODEPAGE_1251 is not set
1283# CONFIG_NLS_ASCII is not set
1284# CONFIG_NLS_ISO8859_1 is not set
1285# CONFIG_NLS_ISO8859_2 is not set
1286# CONFIG_NLS_ISO8859_3 is not set
1287# CONFIG_NLS_ISO8859_4 is not set
1288# CONFIG_NLS_ISO8859_5 is not set
1289# CONFIG_NLS_ISO8859_6 is not set
1290# CONFIG_NLS_ISO8859_7 is not set
1291# CONFIG_NLS_ISO8859_9 is not set
1292# CONFIG_NLS_ISO8859_13 is not set
1293# CONFIG_NLS_ISO8859_14 is not set
1294# CONFIG_NLS_ISO8859_15 is not set
1295# CONFIG_NLS_KOI8_R is not set
1296# CONFIG_NLS_KOI8_U is not set
1297# CONFIG_NLS_UTF8 is not set
1298# CONFIG_DLM is not set
1299
1300#
1301# Kernel hacking
1302#
1303# CONFIG_PRINTK_TIME is not set
1304CONFIG_ENABLE_WARN_DEPRECATED=y
1305CONFIG_ENABLE_MUST_CHECK=y
1306CONFIG_FRAME_WARN=1024
1307# CONFIG_MAGIC_SYSRQ is not set
1308# CONFIG_UNUSED_SYMBOLS is not set
1309CONFIG_DEBUG_FS=y
1310# CONFIG_HEADERS_CHECK is not set
1311# CONFIG_DEBUG_KERNEL is not set
1312# CONFIG_DEBUG_BUGVERBOSE is not set
1313# CONFIG_SAMPLES is not set
1314CONFIG_DEBUG_MMRS=y
1315CONFIG_DEBUG_HUNT_FOR_ZERO=y
1316CONFIG_DEBUG_BFIN_HWTRACE_ON=y
1317CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
1318# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE is not set
1319# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set
1320CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
1321# CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
1322# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
1323CONFIG_EARLY_PRINTK=y
1324CONFIG_CPLB_INFO=y
1325CONFIG_ACCESS_CHECK=y
1326
1327#
1328# Security options
1329#
1330# CONFIG_KEYS is not set
1331CONFIG_SECURITY=y
1332# CONFIG_SECURITY_NETWORK is not set
1333# CONFIG_SECURITY_CAPABILITIES is not set
1334# CONFIG_SECURITY_ROOTPLUG is not set
1335CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
1336CONFIG_CRYPTO=y
1337
1338#
1339# Crypto core or helper
1340#
1341# CONFIG_CRYPTO_MANAGER is not set
1342# CONFIG_CRYPTO_GF128MUL is not set
1343# CONFIG_CRYPTO_NULL is not set
1344# CONFIG_CRYPTO_CRYPTD is not set
1345# CONFIG_CRYPTO_AUTHENC is not set
1346# CONFIG_CRYPTO_TEST is not set
1347
1348#
1349# Authenticated Encryption with Associated Data
1350#
1351# CONFIG_CRYPTO_CCM is not set
1352# CONFIG_CRYPTO_GCM is not set
1353# CONFIG_CRYPTO_SEQIV is not set
1354
1355#
1356# Block modes
1357#
1358# CONFIG_CRYPTO_CBC is not set
1359# CONFIG_CRYPTO_CTR is not set
1360# CONFIG_CRYPTO_CTS is not set
1361# CONFIG_CRYPTO_ECB is not set
1362# CONFIG_CRYPTO_LRW is not set
1363# CONFIG_CRYPTO_PCBC is not set
1364# CONFIG_CRYPTO_XTS is not set
1365
1366#
1367# Hash modes
1368#
1369# CONFIG_CRYPTO_HMAC is not set
1370# CONFIG_CRYPTO_XCBC is not set
1371
1372#
1373# Digest
1374#
1375# CONFIG_CRYPTO_CRC32C is not set
1376# CONFIG_CRYPTO_MD4 is not set
1377# CONFIG_CRYPTO_MD5 is not set
1378# CONFIG_CRYPTO_MICHAEL_MIC is not set
1379# CONFIG_CRYPTO_SHA1 is not set
1380# CONFIG_CRYPTO_SHA256 is not set
1381# CONFIG_CRYPTO_SHA512 is not set
1382# CONFIG_CRYPTO_TGR192 is not set
1383# CONFIG_CRYPTO_WP512 is not set
1384
1385#
1386# Ciphers
1387#
1388# CONFIG_CRYPTO_AES is not set
1389# CONFIG_CRYPTO_ANUBIS is not set
1390# CONFIG_CRYPTO_ARC4 is not set
1391# CONFIG_CRYPTO_BLOWFISH is not set
1392# CONFIG_CRYPTO_CAMELLIA is not set
1393# CONFIG_CRYPTO_CAST5 is not set
1394# CONFIG_CRYPTO_CAST6 is not set
1395# CONFIG_CRYPTO_DES is not set
1396# CONFIG_CRYPTO_FCRYPT is not set
1397# CONFIG_CRYPTO_KHAZAD is not set
1398# CONFIG_CRYPTO_SALSA20 is not set
1399# CONFIG_CRYPTO_SEED is not set
1400# CONFIG_CRYPTO_SERPENT is not set
1401# CONFIG_CRYPTO_TEA is not set
1402# CONFIG_CRYPTO_TWOFISH is not set
1403
1404#
1405# Compression
1406#
1407# CONFIG_CRYPTO_DEFLATE is not set
1408# CONFIG_CRYPTO_LZO is not set
1409CONFIG_CRYPTO_HW=y
1410
1411#
1412# Library routines
1413#
1414CONFIG_BITREVERSE=y
1415# CONFIG_GENERIC_FIND_FIRST_BIT is not set
1416CONFIG_CRC_CCITT=m
1417# CONFIG_CRC16 is not set
1418# CONFIG_CRC_ITU_T is not set
1419CONFIG_CRC32=y
1420# CONFIG_CRC7 is not set
1421# CONFIG_LIBCRC32C is not set
1422CONFIG_ZLIB_INFLATE=y
1423CONFIG_ZLIB_DEFLATE=m
1424CONFIG_PLIST=y
1425CONFIG_HAS_IOMEM=y
1426CONFIG_HAS_IOPORT=y
1427CONFIG_HAS_DMA=y
diff --git a/arch/blackfin/configs/BF527-EZKIT_defconfig b/arch/blackfin/configs/BF527-EZKIT_defconfig
index 66854a83c0de..4a2a660a6b35 100644
--- a/arch/blackfin/configs/BF527-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF527-EZKIT_defconfig
@@ -772,7 +772,7 @@ CONFIG_UNIX98_PTYS=y
772# 772#
773# CONFIG_CAN4LINUX is not set 773# CONFIG_CAN4LINUX is not set
774# CONFIG_IPMI_HANDLER is not set 774# CONFIG_IPMI_HANDLER is not set
775CONFIG_HW_RANDOM=y 775# CONFIG_HW_RANDOM is not set
776# CONFIG_GEN_RTC is not set 776# CONFIG_GEN_RTC is not set
777# CONFIG_R3964 is not set 777# CONFIG_R3964 is not set
778# CONFIG_RAW_DRIVER is not set 778# CONFIG_RAW_DRIVER is not set
diff --git a/arch/blackfin/configs/BF533-EZKIT_defconfig b/arch/blackfin/configs/BF533-EZKIT_defconfig
index 6bc11db12690..deeb5e45effb 100644
--- a/arch/blackfin/configs/BF533-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF533-EZKIT_defconfig
@@ -674,7 +674,7 @@ CONFIG_UNIX98_PTYS=y
674# 674#
675# CONFIG_CAN4LINUX is not set 675# CONFIG_CAN4LINUX is not set
676# CONFIG_IPMI_HANDLER is not set 676# CONFIG_IPMI_HANDLER is not set
677CONFIG_HW_RANDOM=y 677# CONFIG_HW_RANDOM is not set
678# CONFIG_GEN_RTC is not set 678# CONFIG_GEN_RTC is not set
679# CONFIG_R3964 is not set 679# CONFIG_R3964 is not set
680# CONFIG_RAW_DRIVER is not set 680# CONFIG_RAW_DRIVER is not set
@@ -740,7 +740,7 @@ CONFIG_SSB_POSSIBLE=y
740# 740#
741# CONFIG_VIDEO_DEV is not set 741# CONFIG_VIDEO_DEV is not set
742# CONFIG_DVB_CORE is not set 742# CONFIG_DVB_CORE is not set
743CONFIG_DAB=y 743# CONFIG_DAB is not set
744 744
745# 745#
746# Graphics support 746# Graphics support
diff --git a/arch/blackfin/configs/BF533-STAMP_defconfig b/arch/blackfin/configs/BF533-STAMP_defconfig
index d77d991a1f61..c23267ed880b 100644
--- a/arch/blackfin/configs/BF533-STAMP_defconfig
+++ b/arch/blackfin/configs/BF533-STAMP_defconfig
@@ -681,7 +681,7 @@ CONFIG_UNIX98_PTYS=y
681# 681#
682# CONFIG_CAN4LINUX is not set 682# CONFIG_CAN4LINUX is not set
683# CONFIG_IPMI_HANDLER is not set 683# CONFIG_IPMI_HANDLER is not set
684CONFIG_HW_RANDOM=y 684# CONFIG_HW_RANDOM is not set
685# CONFIG_GEN_RTC is not set 685# CONFIG_GEN_RTC is not set
686# CONFIG_R3964 is not set 686# CONFIG_R3964 is not set
687# CONFIG_RAW_DRIVER is not set 687# CONFIG_RAW_DRIVER is not set
diff --git a/arch/blackfin/configs/BF537-STAMP_defconfig b/arch/blackfin/configs/BF537-STAMP_defconfig
index 5fd7c4b143df..63a0f854745c 100644
--- a/arch/blackfin/configs/BF537-STAMP_defconfig
+++ b/arch/blackfin/configs/BF537-STAMP_defconfig
@@ -731,7 +731,7 @@ CONFIG_CAN4LINUX=y
731# CONFIG_CAN_UNCTWINCAN is not set 731# CONFIG_CAN_UNCTWINCAN is not set
732CONFIG_CAN_BLACKFIN=m 732CONFIG_CAN_BLACKFIN=m
733# CONFIG_IPMI_HANDLER is not set 733# CONFIG_IPMI_HANDLER is not set
734CONFIG_HW_RANDOM=y 734# CONFIG_HW_RANDOM is not set
735# CONFIG_GEN_RTC is not set 735# CONFIG_GEN_RTC is not set
736# CONFIG_R3964 is not set 736# CONFIG_R3964 is not set
737# CONFIG_RAW_DRIVER is not set 737# CONFIG_RAW_DRIVER is not set
@@ -871,7 +871,7 @@ CONFIG_SSB_POSSIBLE=y
871# 871#
872# CONFIG_VIDEO_DEV is not set 872# CONFIG_VIDEO_DEV is not set
873# CONFIG_DVB_CORE is not set 873# CONFIG_DVB_CORE is not set
874CONFIG_DAB=y 874# CONFIG_DAB is not set
875 875
876# 876#
877# Graphics support 877# Graphics support
diff --git a/arch/blackfin/configs/BF548-EZKIT_defconfig b/arch/blackfin/configs/BF548-EZKIT_defconfig
index 390669e8668e..bf63660815b9 100644
--- a/arch/blackfin/configs/BF548-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF548-EZKIT_defconfig
@@ -855,7 +855,7 @@ CONFIG_UNIX98_PTYS=y
855# 855#
856# CONFIG_CAN4LINUX is not set 856# CONFIG_CAN4LINUX is not set
857# CONFIG_IPMI_HANDLER is not set 857# CONFIG_IPMI_HANDLER is not set
858CONFIG_HW_RANDOM=y 858# CONFIG_HW_RANDOM is not set
859# CONFIG_GEN_RTC is not set 859# CONFIG_GEN_RTC is not set
860# CONFIG_R3964 is not set 860# CONFIG_R3964 is not set
861# CONFIG_RAW_DRIVER is not set 861# CONFIG_RAW_DRIVER is not set
@@ -1001,7 +1001,7 @@ CONFIG_SSB_POSSIBLE=y
1001# 1001#
1002# CONFIG_VIDEO_DEV is not set 1002# CONFIG_VIDEO_DEV is not set
1003# CONFIG_DVB_CORE is not set 1003# CONFIG_DVB_CORE is not set
1004CONFIG_DAB=y 1004# CONFIG_DAB is not set
1005# CONFIG_USB_DABUSB is not set 1005# CONFIG_USB_DABUSB is not set
1006 1006
1007# 1007#
diff --git a/arch/blackfin/configs/BF561-EZKIT_defconfig b/arch/blackfin/configs/BF561-EZKIT_defconfig
index 976a4d7ba175..3c70d6230a12 100644
--- a/arch/blackfin/configs/BF561-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF561-EZKIT_defconfig
@@ -719,7 +719,7 @@ CONFIG_UNIX98_PTYS=y
719# 719#
720# CONFIG_CAN4LINUX is not set 720# CONFIG_CAN4LINUX is not set
721# CONFIG_IPMI_HANDLER is not set 721# CONFIG_IPMI_HANDLER is not set
722CONFIG_HW_RANDOM=y 722# CONFIG_HW_RANDOM is not set
723# CONFIG_GEN_RTC is not set 723# CONFIG_GEN_RTC is not set
724# CONFIG_R3964 is not set 724# CONFIG_R3964 is not set
725# CONFIG_RAW_DRIVER is not set 725# CONFIG_RAW_DRIVER is not set
@@ -785,7 +785,7 @@ CONFIG_SSB_POSSIBLE=y
785# 785#
786# CONFIG_VIDEO_DEV is not set 786# CONFIG_VIDEO_DEV is not set
787# CONFIG_DVB_CORE is not set 787# CONFIG_DVB_CORE is not set
788CONFIG_DAB=y 788# CONFIG_DAB is not set
789 789
790# 790#
791# Graphics support 791# Graphics support
diff --git a/arch/blackfin/configs/CM-BF527_defconfig b/arch/blackfin/configs/CM-BF527_defconfig
index 0799aa9bba9d..b6a14635fb91 100644
--- a/arch/blackfin/configs/CM-BF527_defconfig
+++ b/arch/blackfin/configs/CM-BF527_defconfig
@@ -679,7 +679,7 @@ CONFIG_UNIX98_PTYS=y
679# 679#
680# CONFIG_CAN4LINUX is not set 680# CONFIG_CAN4LINUX is not set
681# CONFIG_IPMI_HANDLER is not set 681# CONFIG_IPMI_HANDLER is not set
682CONFIG_HW_RANDOM=y 682# CONFIG_HW_RANDOM is not set
683# CONFIG_GEN_RTC is not set 683# CONFIG_GEN_RTC is not set
684# CONFIG_R3964 is not set 684# CONFIG_R3964 is not set
685# CONFIG_RAW_DRIVER is not set 685# CONFIG_RAW_DRIVER is not set
diff --git a/arch/blackfin/configs/CM-BF533_defconfig b/arch/blackfin/configs/CM-BF533_defconfig
index 09deea44480b..c3ba9066b935 100644
--- a/arch/blackfin/configs/CM-BF533_defconfig
+++ b/arch/blackfin/configs/CM-BF533_defconfig
@@ -672,7 +672,7 @@ CONFIG_HWMON=y
672# 672#
673# CONFIG_VIDEO_DEV is not set 673# CONFIG_VIDEO_DEV is not set
674# CONFIG_DVB_CORE is not set 674# CONFIG_DVB_CORE is not set
675CONFIG_DAB=y 675# CONFIG_DAB is not set
676 676
677# 677#
678# Graphics support 678# Graphics support
diff --git a/arch/blackfin/configs/CM-BF537E_defconfig b/arch/blackfin/configs/CM-BF537E_defconfig
index 219fc345a5f5..cdc6b7feb59e 100644
--- a/arch/blackfin/configs/CM-BF537E_defconfig
+++ b/arch/blackfin/configs/CM-BF537E_defconfig
@@ -703,7 +703,7 @@ CONFIG_HWMON=y
703# 703#
704# CONFIG_VIDEO_DEV is not set 704# CONFIG_VIDEO_DEV is not set
705# CONFIG_DVB_CORE is not set 705# CONFIG_DVB_CORE is not set
706CONFIG_DAB=y 706# CONFIG_DAB is not set
707 707
708# 708#
709# Graphics support 709# Graphics support
diff --git a/arch/blackfin/configs/CM-BF537U_defconfig b/arch/blackfin/configs/CM-BF537U_defconfig
index 9873d586fc77..f074bdcd1ce5 100644
--- a/arch/blackfin/configs/CM-BF537U_defconfig
+++ b/arch/blackfin/configs/CM-BF537U_defconfig
@@ -683,7 +683,7 @@ CONFIG_HWMON=y
683# 683#
684# CONFIG_VIDEO_DEV is not set 684# CONFIG_VIDEO_DEV is not set
685# CONFIG_DVB_CORE is not set 685# CONFIG_DVB_CORE is not set
686CONFIG_DAB=y 686# CONFIG_DAB is not set
687 687
688# 688#
689# Graphics support 689# Graphics support
diff --git a/arch/blackfin/configs/CM-BF548_defconfig b/arch/blackfin/configs/CM-BF548_defconfig
index 0e3605fdb7b0..5c44fdb8e6e3 100644
--- a/arch/blackfin/configs/CM-BF548_defconfig
+++ b/arch/blackfin/configs/CM-BF548_defconfig
@@ -762,7 +762,7 @@ CONFIG_UNIX98_PTYS=y
762# 762#
763# CONFIG_CAN4LINUX is not set 763# CONFIG_CAN4LINUX is not set
764# CONFIG_IPMI_HANDLER is not set 764# CONFIG_IPMI_HANDLER is not set
765CONFIG_HW_RANDOM=y 765# CONFIG_HW_RANDOM is not set
766# CONFIG_GEN_RTC is not set 766# CONFIG_GEN_RTC is not set
767# CONFIG_R3964 is not set 767# CONFIG_R3964 is not set
768# CONFIG_RAW_DRIVER is not set 768# CONFIG_RAW_DRIVER is not set
@@ -909,7 +909,7 @@ CONFIG_SSB_POSSIBLE=y
909# 909#
910# CONFIG_VIDEO_DEV is not set 910# CONFIG_VIDEO_DEV is not set
911# CONFIG_DVB_CORE is not set 911# CONFIG_DVB_CORE is not set
912CONFIG_DAB=y 912# CONFIG_DAB is not set
913# CONFIG_USB_DABUSB is not set 913# CONFIG_USB_DABUSB is not set
914 914
915# 915#
diff --git a/arch/blackfin/configs/CM-BF561_defconfig b/arch/blackfin/configs/CM-BF561_defconfig
index 59c7cdbee904..086fe5dda495 100644
--- a/arch/blackfin/configs/CM-BF561_defconfig
+++ b/arch/blackfin/configs/CM-BF561_defconfig
@@ -684,7 +684,7 @@ CONFIG_SSB_POSSIBLE=y
684# 684#
685# CONFIG_VIDEO_DEV is not set 685# CONFIG_VIDEO_DEV is not set
686# CONFIG_DVB_CORE is not set 686# CONFIG_DVB_CORE is not set
687CONFIG_DAB=y 687# CONFIG_DAB is not set
688 688
689# 689#
690# Graphics support 690# Graphics support
diff --git a/arch/blackfin/configs/H8606_defconfig b/arch/blackfin/configs/H8606_defconfig
index ba0bee90b7e1..1fc31f1b762b 100644
--- a/arch/blackfin/configs/H8606_defconfig
+++ b/arch/blackfin/configs/H8606_defconfig
@@ -1,6 +1,6 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.22.12 3# Linux kernel version: 2.6.22.14
4# 4#
5# CONFIG_MMU is not set 5# CONFIG_MMU is not set
6# CONFIG_FPU is not set 6# CONFIG_FPU is not set
@@ -192,7 +192,7 @@ CONFIG_CLKIN_HZ=25000000
192# CONFIG_BFIN_KERNEL_CLOCK is not set 192# CONFIG_BFIN_KERNEL_CLOCK is not set
193CONFIG_MAX_VCO_HZ=400000000 193CONFIG_MAX_VCO_HZ=400000000
194CONFIG_MIN_VCO_HZ=50000000 194CONFIG_MIN_VCO_HZ=50000000
195CONFIG_MAX_SCLK_HZ=133000000 195CONFIG_MAX_SCLK_HZ=133333333
196CONFIG_MIN_SCLK_HZ=27000000 196CONFIG_MIN_SCLK_HZ=27000000
197 197
198# 198#
@@ -516,7 +516,7 @@ CONFIG_MTD_COMPLEX_MAPPINGS=y
516# 516#
517# CONFIG_MTD_DATAFLASH is not set 517# CONFIG_MTD_DATAFLASH is not set
518CONFIG_MTD_M25P80=y 518CONFIG_MTD_M25P80=y
519CONFIG_M25PXX_USE_FAST_READ=y 519# CONFIG_M25PXX_USE_FAST_READ is not set
520# CONFIG_MTD_SLRAM is not set 520# CONFIG_MTD_SLRAM is not set
521# CONFIG_MTD_PHRAM is not set 521# CONFIG_MTD_PHRAM is not set
522# CONFIG_MTD_MTDRAM is not set 522# CONFIG_MTD_MTDRAM is not set
@@ -635,25 +635,25 @@ CONFIG_INPUT=y
635# CONFIG_INPUT_MOUSEDEV is not set 635# CONFIG_INPUT_MOUSEDEV is not set
636# CONFIG_INPUT_JOYDEV is not set 636# CONFIG_INPUT_JOYDEV is not set
637# CONFIG_INPUT_TSDEV is not set 637# CONFIG_INPUT_TSDEV is not set
638CONFIG_INPUT_EVDEV=m 638CONFIG_INPUT_EVDEV=y
639# CONFIG_INPUT_EVBUG is not set 639# CONFIG_INPUT_EVBUG is not set
640 640
641# 641#
642# Input Device Drivers 642# Input Device Drivers
643# 643#
644# CONFIG_INPUT_KEYBOARD is not set 644CONFIG_INPUT_KEYBOARD=y
645# CONFIG_KEYBOARD_ATKBD is not set
646# CONFIG_KEYBOARD_SUNKBD is not set
647# CONFIG_KEYBOARD_LKKBD is not set
648# CONFIG_KEYBOARD_XTKBD is not set
649# CONFIG_KEYBOARD_NEWTON is not set
650# CONFIG_KEYBOARD_STOWAWAY is not set
651CONFIG_KEYBOARD_GPIO=y
645# CONFIG_INPUT_MOUSE is not set 652# CONFIG_INPUT_MOUSE is not set
646# CONFIG_INPUT_JOYSTICK is not set 653# CONFIG_INPUT_JOYSTICK is not set
647# CONFIG_INPUT_TABLET is not set 654# CONFIG_INPUT_TABLET is not set
648# CONFIG_INPUT_TOUCHSCREEN is not set 655# CONFIG_INPUT_TOUCHSCREEN is not set
649CONFIG_INPUT_MISC=y 656# CONFIG_INPUT_MISC is not set
650# CONFIG_INPUT_ATI_REMOTE is not set
651# CONFIG_INPUT_ATI_REMOTE2 is not set
652# CONFIG_INPUT_KEYSPAN_REMOTE is not set
653# CONFIG_INPUT_POWERMATE is not set
654# CONFIG_INPUT_YEALINK is not set
655# CONFIG_INPUT_UINPUT is not set
656# CONFIG_BF53X_PFBUTTONS is not set
657 657
658# 658#
659# Hardware I/O ports 659# Hardware I/O ports
@@ -681,7 +681,15 @@ CONFIG_BFIN_TIMER_LATENCY=y
681# 681#
682# Serial drivers 682# Serial drivers
683# 683#
684# CONFIG_SERIAL_8250 is not set 684CONFIG_SERIAL_8250=y
685# CONFIG_SERIAL_8250_CONSOLE is not set
686CONFIG_SERIAL_8250_NR_UARTS=4
687CONFIG_SERIAL_8250_RUNTIME_UARTS=4
688CONFIG_SERIAL_8250_EXTENDED=y
689# CONFIG_SERIAL_8250_MANY_PORTS is not set
690CONFIG_SERIAL_8250_SHARE_IRQ=y
691# CONFIG_SERIAL_8250_DETECT_IRQ is not set
692# CONFIG_SERIAL_8250_RSA is not set
685 693
686# 694#
687# Non-8250 serial port support 695# Non-8250 serial port support
diff --git a/arch/blackfin/include/asm/a.out.h b/arch/blackfin/include/asm/a.out.h
deleted file mode 100644
index 6c3d652ebd33..000000000000
--- a/arch/blackfin/include/asm/a.out.h
+++ /dev/null
@@ -1,19 +0,0 @@
1#ifndef __BFIN_A_OUT_H__
2#define __BFIN_A_OUT_H__
3
4struct exec {
5 unsigned long a_info; /* Use macros N_MAGIC, etc for access */
6 unsigned a_text; /* length of text, in bytes */
7 unsigned a_data; /* length of data, in bytes */
8 unsigned a_bss; /* length of uninitialized data area for file, in bytes */
9 unsigned a_syms; /* length of symbol table data in file, in bytes */
10 unsigned a_entry; /* start address */
11 unsigned a_trsize; /* length of relocation info for text, in bytes */
12 unsigned a_drsize; /* length of relocation info for data, in bytes */
13};
14
15#define N_TRSIZE(a) ((a).a_trsize)
16#define N_DRSIZE(a) ((a).a_drsize)
17#define N_SYMSIZE(a) ((a).a_syms)
18
19#endif /* __BFIN_A_OUT_H__ */
diff --git a/arch/blackfin/include/asm/bfin-global.h b/arch/blackfin/include/asm/bfin-global.h
index 7ba70de66f2b..56dcb0a2d244 100644
--- a/arch/blackfin/include/asm/bfin-global.h
+++ b/arch/blackfin/include/asm/bfin-global.h
@@ -63,7 +63,6 @@ extern void bfin_dcache_init(void);
63extern void init_exception_vectors(void); 63extern void init_exception_vectors(void);
64extern void program_IAR(void); 64extern void program_IAR(void);
65 65
66extern void bfin_reset(void);
67extern asmlinkage void lower_to_irq14(void); 66extern asmlinkage void lower_to_irq14(void);
68extern asmlinkage void bfin_return_from_exception(void); 67extern asmlinkage void bfin_return_from_exception(void);
69extern asmlinkage void evt14_softirq(void); 68extern asmlinkage void evt14_softirq(void);
@@ -92,6 +91,8 @@ extern int sram_free(const void*);
92extern void *sram_alloc_with_lsl(size_t, unsigned long); 91extern void *sram_alloc_with_lsl(size_t, unsigned long);
93extern int sram_free_with_lsl(const void*); 92extern int sram_free_with_lsl(const void*);
94 93
94extern void *isram_memcpy(void *dest, const void *src, size_t n);
95
95extern const char bfin_board_name[]; 96extern const char bfin_board_name[];
96 97
97extern unsigned long bfin_sic_iwr[]; 98extern unsigned long bfin_sic_iwr[];
@@ -104,7 +105,7 @@ extern char _stext_l1[], _etext_l1[], _sdata_l1[], _edata_l1[], _sbss_l1[],
104 _stext_l2[], _etext_l2[], _sdata_l2[], _edata_l2[], _sbss_l2[], 105 _stext_l2[], _etext_l2[], _sdata_l2[], _edata_l2[], _sbss_l2[],
105 _ebss_l2[], _l2_lma_start[]; 106 _ebss_l2[], _l2_lma_start[];
106 107
107/* only used when CONFIG_MTD_UCLINUX */ 108/* only used when MTD_UCLINUX */
108extern unsigned long memory_mtd_start, memory_mtd_end, mtd_size; 109extern unsigned long memory_mtd_start, memory_mtd_end, mtd_size;
109 110
110#ifdef CONFIG_BFIN_ICACHE_LOCK 111#ifdef CONFIG_BFIN_ICACHE_LOCK
diff --git a/arch/blackfin/include/asm/bfrom.h b/arch/blackfin/include/asm/bfrom.h
new file mode 100644
index 000000000000..cfe8024c3b2f
--- /dev/null
+++ b/arch/blackfin/include/asm/bfrom.h
@@ -0,0 +1,85 @@
1/* Blackfin on-chip ROM API
2 *
3 * Copyright 2008 Analog Devices Inc.
4 *
5 * Licensed under the GPL-2 or later.
6 */
7
8#ifndef __BFROM_H__
9#define __BFROM_H__
10
11#include <linux/types.h>
12
13/* Possible syscontrol action flags */
14#define SYSCTRL_READ 0x00000000 /* read registers */
15#define SYSCTRL_WRITE 0x00000001 /* write registers */
16#define SYSCTRL_SYSRESET 0x00000002 /* perform system reset */
17#define SYSCTRL_CORERESET 0x00000004 /* perform core reset */
18#define SYSCTRL_SOFTRESET 0x00000006 /* perform core and system reset */
19#define SYSCTRL_VRCTL 0x00000010 /* read/write VR_CTL register */
20#define SYSCTRL_EXTVOLTAGE 0x00000020 /* VDDINT supplied externally */
21#define SYSCTRL_INTVOLTAGE 0x00000000 /* VDDINT generated by on-chip regulator */
22#define SYSCTRL_OTPVOLTAGE 0x00000040 /* For Factory Purposes Only */
23#define SYSCTRL_PLLCTL 0x00000100 /* read/write PLL_CTL register */
24#define SYSCTRL_PLLDIV 0x00000200 /* read/write PLL_DIV register */
25#define SYSCTRL_LOCKCNT 0x00000400 /* read/write PLL_LOCKCNT register */
26#define SYSCTRL_PLLSTAT 0x00000800 /* read/write PLL_STAT register */
27
28typedef struct ADI_SYSCTRL_VALUES {
29 uint16_t uwVrCtl;
30 uint16_t uwPllCtl;
31 uint16_t uwPllDiv;
32 uint16_t uwPllLockCnt;
33 uint16_t uwPllStat;
34} ADI_SYSCTRL_VALUES;
35
36static uint32_t (* const bfrom_SysControl)(uint32_t action_flags, ADI_SYSCTRL_VALUES *power_settings, void *reserved) = (void *)0xEF000038;
37
38/* We need a dedicated function since we need to screw with the stack pointer
39 * when resetting. The on-chip ROM will save/restore registers on the stack
40 * when doing a system reset, so the stack cannot be outside of the chip.
41 */
42__attribute__((__noreturn__))
43static inline void bfrom_SoftReset(void *new_stack)
44{
45 while (1)
46 __asm__ __volatile__(
47 "sp = %[stack];"
48 "jump (%[bfrom_syscontrol]);"
49 : : [bfrom_syscontrol] "p"(bfrom_SysControl),
50 "q0"(SYSCTRL_SOFTRESET),
51 "q1"(0),
52 "q2"(NULL),
53 [stack] "p"(new_stack)
54 );
55}
56
57/* OTP Functions */
58static uint32_t (* const bfrom_OtpCommand)(uint32_t command, uint32_t value) = (void *)0xEF000018;
59static uint32_t (* const bfrom_OtpRead)(uint32_t page, uint32_t flags, uint64_t *page_content) = (void *)0xEF00001A;
60static uint32_t (* const bfrom_OtpWrite)(uint32_t page, uint32_t flags, uint64_t *page_content) = (void *)0xEF00001C;
61
62/* otp command: defines for "command" */
63#define OTP_INIT 0x00000001
64#define OTP_CLOSE 0x00000002
65
66/* otp read/write: defines for "flags" */
67#define OTP_LOWER_HALF 0x00000000 /* select upper/lower 64-bit half (bit 0) */
68#define OTP_UPPER_HALF 0x00000001
69#define OTP_NO_ECC 0x00000010 /* do not use ECC */
70#define OTP_LOCK 0x00000020 /* sets page protection bit for page */
71#define OTP_CHECK_FOR_PREV_WRITE 0x00000080
72
73/* Return values for all functions */
74#define OTP_SUCCESS 0x00000000
75#define OTP_MASTER_ERROR 0x001
76#define OTP_WRITE_ERROR 0x003
77#define OTP_READ_ERROR 0x005
78#define OTP_ACC_VIO_ERROR 0x009
79#define OTP_DATA_MULT_ERROR 0x011
80#define OTP_ECC_MULT_ERROR 0x021
81#define OTP_PREV_WR_ERROR 0x041
82#define OTP_DATA_SB_WARN 0x100
83#define OTP_ECC_SB_WARN 0x200
84
85#endif
diff --git a/arch/blackfin/include/asm/cacheflush.h b/arch/blackfin/include/asm/cacheflush.h
index d81a77545a04..4403415583fa 100644
--- a/arch/blackfin/include/asm/cacheflush.h
+++ b/arch/blackfin/include/asm/cacheflush.h
@@ -30,13 +30,11 @@
30#ifndef _BLACKFIN_CACHEFLUSH_H 30#ifndef _BLACKFIN_CACHEFLUSH_H
31#define _BLACKFIN_CACHEFLUSH_H 31#define _BLACKFIN_CACHEFLUSH_H
32 32
33#include <asm/cplb.h> 33extern void blackfin_icache_dcache_flush_range(unsigned long start_address, unsigned long end_address);
34 34extern void blackfin_icache_flush_range(unsigned long start_address, unsigned long end_address);
35extern void blackfin_icache_dcache_flush_range(unsigned int, unsigned int); 35extern void blackfin_dcache_flush_range(unsigned long start_address, unsigned long end_address);
36extern void blackfin_icache_flush_range(unsigned int, unsigned int); 36extern void blackfin_dcache_invalidate_range(unsigned long start_address, unsigned long end_address);
37extern void blackfin_dcache_flush_range(unsigned int, unsigned int); 37extern void blackfin_dflush_page(void *page);
38extern void blackfin_dcache_invalidate_range(unsigned int, unsigned int);
39extern void blackfin_dflush_page(void *);
40 38
41#define flush_dcache_mmap_lock(mapping) do { } while (0) 39#define flush_dcache_mmap_lock(mapping) do { } while (0)
42#define flush_dcache_mmap_unlock(mapping) do { } while (0) 40#define flush_dcache_mmap_unlock(mapping) do { } while (0)
@@ -87,4 +85,21 @@ do { memcpy(dst, src, len); \
87# define flush_dcache_page(page) do { } while (0) 85# define flush_dcache_page(page) do { } while (0)
88#endif 86#endif
89 87
88extern unsigned long reserved_mem_dcache_on;
89extern unsigned long reserved_mem_icache_on;
90
91static inline int bfin_addr_dcachable(unsigned long addr)
92{
93#ifdef CONFIG_BFIN_DCACHE
94 if (addr < (_ramend - DMA_UNCACHED_REGION))
95 return 1;
96#endif
97
98 if (reserved_mem_dcache_on &&
99 addr >= _ramend && addr < physical_mem_end)
100 return 1;
101
102 return 0;
103}
104
90#endif /* _BLACKFIN_ICACHEFLUSH_H */ 105#endif /* _BLACKFIN_ICACHEFLUSH_H */
diff --git a/arch/blackfin/include/asm/cplb.h b/arch/blackfin/include/asm/cplb.h
index 05d6f05fb748..9e8b4035fcec 100644
--- a/arch/blackfin/include/asm/cplb.h
+++ b/arch/blackfin/include/asm/cplb.h
@@ -55,7 +55,13 @@
55#endif 55#endif
56 56
57#define L1_DMEMORY (CPLB_LOCK | CPLB_COMMON) 57#define L1_DMEMORY (CPLB_LOCK | CPLB_COMMON)
58#define L2_MEMORY (CPLB_COMMON) 58#ifdef CONFIG_BFIN_L2_CACHEABLE
59#define L2_IMEMORY (SDRAM_IGENERIC)
60#define L2_DMEMORY (SDRAM_DGENERIC)
61#else
62#define L2_IMEMORY (CPLB_COMMON)
63#define L2_DMEMORY (CPLB_COMMON)
64#endif
59#define SDRAM_DNON_CHBL (CPLB_COMMON) 65#define SDRAM_DNON_CHBL (CPLB_COMMON)
60#define SDRAM_EBIU (CPLB_COMMON) 66#define SDRAM_EBIU (CPLB_COMMON)
61#define SDRAM_OOPS (CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_LOCK | CPLB_DIRTY) 67#define SDRAM_OOPS (CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_LOCK | CPLB_DIRTY)
diff --git a/arch/blackfin/include/asm/cplbinit.h b/arch/blackfin/include/asm/cplbinit.h
index 0eb1c1b685a7..f845b41147ba 100644
--- a/arch/blackfin/include/asm/cplbinit.h
+++ b/arch/blackfin/include/asm/cplbinit.h
@@ -87,9 +87,6 @@ extern u_long dpdt_swapcount_table[];
87 87
88#endif /* CONFIG_MPU */ 88#endif /* CONFIG_MPU */
89 89
90extern unsigned long reserved_mem_dcache_on; 90extern void generate_cplb_tables(void);
91extern unsigned long reserved_mem_icache_on;
92
93extern void generate_cpl_tables(void);
94 91
95#endif 92#endif
diff --git a/arch/blackfin/include/asm/cpumask.h b/arch/blackfin/include/asm/cpumask.h
deleted file mode 100644
index b20a8e9012cb..000000000000
--- a/arch/blackfin/include/asm/cpumask.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_BLACKFIN_CPUMASK_H
2#define _ASM_BLACKFIN_CPUMASK_H
3
4#include <asm-generic/cpumask.h>
5
6#endif /* _ASM_BLACKFIN_CPUMASK_H */
diff --git a/arch/blackfin/include/asm/dma-mapping.h b/arch/blackfin/include/asm/dma-mapping.h
index 1a13c2fc3667..ede748d67efd 100644
--- a/arch/blackfin/include/asm/dma-mapping.h
+++ b/arch/blackfin/include/asm/dma-mapping.h
@@ -80,4 +80,15 @@ extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
80extern void dma_unmap_sg(struct device *dev, struct scatterlist *sg, 80extern void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
81 int nhwentries, enum dma_data_direction direction); 81 int nhwentries, enum dma_data_direction direction);
82 82
83static inline void dma_sync_single_for_cpu(struct device *dev,
84 dma_addr_t handle, size_t size,
85 enum dma_data_direction dir)
86{
87}
88
89static inline void dma_sync_single_for_device(struct device *dev,
90 dma_addr_t handle, size_t size,
91 enum dma_data_direction dir)
92{
93}
83#endif /* _BLACKFIN_DMA_MAPPING_H */ 94#endif /* _BLACKFIN_DMA_MAPPING_H */
diff --git a/arch/blackfin/include/asm/elf.h b/arch/blackfin/include/asm/elf.h
index 67a03a8a353e..cdbfcfc30f6a 100644
--- a/arch/blackfin/include/asm/elf.h
+++ b/arch/blackfin/include/asm/elf.h
@@ -122,6 +122,6 @@ do { \
122 122
123#define ELF_PLATFORM (NULL) 123#define ELF_PLATFORM (NULL)
124 124
125#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX) 125#define SET_PERSONALITY(ex) set_personality(PER_LINUX)
126 126
127#endif 127#endif
diff --git a/arch/blackfin/include/asm/io.h b/arch/blackfin/include/asm/io.h
index cbbf7ffdbbff..7dc77a21fdf3 100644
--- a/arch/blackfin/include/asm/io.h
+++ b/arch/blackfin/include/asm/io.h
@@ -134,6 +134,36 @@ extern void dma_insb(unsigned long port, void *addr, unsigned short count);
134extern void dma_insw(unsigned long port, void *addr, unsigned short count); 134extern void dma_insw(unsigned long port, void *addr, unsigned short count);
135extern void dma_insl(unsigned long port, void *addr, unsigned short count); 135extern void dma_insl(unsigned long port, void *addr, unsigned short count);
136 136
137static inline void readsl(const void __iomem *addr, void *buf, int len)
138{
139 insl((unsigned long)addr, buf, len);
140}
141
142static inline void readsw(const void __iomem *addr, void *buf, int len)
143{
144 insw((unsigned long)addr, buf, len);
145}
146
147static inline void readsb(const void __iomem *addr, void *buf, int len)
148{
149 insb((unsigned long)addr, buf, len);
150}
151
152static inline void writesl(const void __iomem *addr, const void *buf, int len)
153{
154 outsl((unsigned long)addr, buf, len);
155}
156
157static inline void writesw(const void __iomem *addr, const void *buf, int len)
158{
159 outsw((unsigned long)addr, buf, len);
160}
161
162static inline void writesb(const void __iomem *addr, const void *buf, int len)
163{
164 outsb((unsigned long)addr, buf, len);
165}
166
137/* 167/*
138 * Map some physical address range into the kernel address space. 168 * Map some physical address range into the kernel address space.
139 */ 169 */
diff --git a/arch/blackfin/include/asm/kgdb.h b/arch/blackfin/include/asm/kgdb.h
index 0f73847fd6bc..26ebac6646d8 100644
--- a/arch/blackfin/include/asm/kgdb.h
+++ b/arch/blackfin/include/asm/kgdb.h
@@ -124,9 +124,16 @@ enum regnames {
124/* Number of bytes of registers. */ 124/* Number of bytes of registers. */
125#define NUMREGBYTES BFIN_NUM_REGS*4 125#define NUMREGBYTES BFIN_NUM_REGS*4
126 126
127#define BREAKPOINT() asm(" EXCPT 2;"); 127static inline void arch_kgdb_breakpoint(void)
128#define BREAK_INSTR_SIZE 2 128{
129#define HW_BREAKPOINT_NUM 6 129 asm(" EXCPT 2;");
130}
131#define BREAK_INSTR_SIZE 2
132#define CACHE_FLUSH_IS_SAFE 1
133#define HW_INST_WATCHPOINT_NUM 6
134#define HW_WATCHPOINT_NUM 8
135#define TYPE_INST_WATCHPOINT 0
136#define TYPE_DATA_WATCHPOINT 1
130 137
131/* Instruction watchpoint address control register bits mask */ 138/* Instruction watchpoint address control register bits mask */
132#define WPPWR 0x1 139#define WPPWR 0x1
@@ -163,10 +170,11 @@ enum regnames {
163#define WPDAEN1 0x8 170#define WPDAEN1 0x8
164#define WPDCNTEN0 0x10 171#define WPDCNTEN0 0x10
165#define WPDCNTEN1 0x20 172#define WPDCNTEN1 0x20
173
166#define WPDSRC0 0xc0 174#define WPDSRC0 0xc0
167#define WPDACC0 0x300 175#define WPDACC0_OFFSET 8
168#define WPDSRC1 0xc00 176#define WPDSRC1 0xc00
169#define WPDACC1 0x3000 177#define WPDACC1_OFFSET 12
170 178
171/* Watchpoint status register bits mask */ 179/* Watchpoint status register bits mask */
172#define STATIA0 0x1 180#define STATIA0 0x1
@@ -178,7 +186,4 @@ enum regnames {
178#define STATDA0 0x40 186#define STATDA0 0x40
179#define STATDA1 0x80 187#define STATDA1 0x80
180 188
181extern void kgdb_print(const char *fmt, ...);
182extern void init_kgdb_uart(void);
183
184#endif 189#endif
diff --git a/arch/blackfin/include/asm/mmu_context.h b/arch/blackfin/include/asm/mmu_context.h
index 8529552a981f..35593dda2a4d 100644
--- a/arch/blackfin/include/asm/mmu_context.h
+++ b/arch/blackfin/include/asm/mmu_context.h
@@ -45,49 +45,12 @@ extern unsigned long l1_stack_len;
45extern int l1sram_free(const void*); 45extern int l1sram_free(const void*);
46extern void *l1sram_alloc_max(void*); 46extern void *l1sram_alloc_max(void*);
47 47
48static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
49{
50}
51
52/* Called when creating a new context during fork() or execve(). */
53static inline int
54init_new_context(struct task_struct *tsk, struct mm_struct *mm)
55{
56#ifdef CONFIG_MPU
57 unsigned long p = __get_free_pages(GFP_KERNEL, page_mask_order);
58 mm->context.page_rwx_mask = (unsigned long *)p;
59 memset(mm->context.page_rwx_mask, 0,
60 page_mask_nelts * 3 * sizeof(long));
61#endif
62 return 0;
63}
64
65static inline void free_l1stack(void) 48static inline void free_l1stack(void)
66{ 49{
67 nr_l1stack_tasks--; 50 nr_l1stack_tasks--;
68 if (nr_l1stack_tasks == 0) 51 if (nr_l1stack_tasks == 0)
69 l1sram_free(l1_stack_base); 52 l1sram_free(l1_stack_base);
70} 53}
71static inline void destroy_context(struct mm_struct *mm)
72{
73 struct sram_list_struct *tmp;
74
75 if (current_l1_stack_save == mm->context.l1_stack_save)
76 current_l1_stack_save = NULL;
77 if (mm->context.l1_stack_save)
78 free_l1stack();
79
80 while ((tmp = mm->context.sram_list)) {
81 mm->context.sram_list = tmp->next;
82 sram_free(tmp->addr);
83 kfree(tmp);
84 }
85#ifdef CONFIG_MPU
86 if (current_rwx_mask == mm->context.page_rwx_mask)
87 current_rwx_mask = NULL;
88 free_pages((unsigned long)mm->context.page_rwx_mask, page_mask_order);
89#endif
90}
91 54
92static inline unsigned long 55static inline unsigned long
93alloc_l1stack(unsigned long length, unsigned long *stack_base) 56alloc_l1stack(unsigned long length, unsigned long *stack_base)
@@ -134,6 +97,7 @@ static inline void switch_mm(struct mm_struct *prev_mm, struct mm_struct *next_m
134 } 97 }
135#endif 98#endif
136 99
100#ifdef CONFIG_APP_STACK_L1
137 /* L1 stack switching. */ 101 /* L1 stack switching. */
138 if (!next_mm->context.l1_stack_save) 102 if (!next_mm->context.l1_stack_save)
139 return; 103 return;
@@ -144,6 +108,7 @@ static inline void switch_mm(struct mm_struct *prev_mm, struct mm_struct *next_m
144 } 108 }
145 current_l1_stack_save = next_mm->context.l1_stack_save; 109 current_l1_stack_save = next_mm->context.l1_stack_save;
146 memcpy(l1_stack_base, current_l1_stack_save, l1_stack_len); 110 memcpy(l1_stack_base, current_l1_stack_save, l1_stack_len);
111#endif
147} 112}
148 113
149#ifdef CONFIG_MPU 114#ifdef CONFIG_MPU
@@ -180,4 +145,44 @@ static inline void update_protections(struct mm_struct *mm)
180} 145}
181#endif 146#endif
182 147
148static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
149{
150}
151
152/* Called when creating a new context during fork() or execve(). */
153static inline int
154init_new_context(struct task_struct *tsk, struct mm_struct *mm)
155{
156#ifdef CONFIG_MPU
157 unsigned long p = __get_free_pages(GFP_KERNEL, page_mask_order);
158 mm->context.page_rwx_mask = (unsigned long *)p;
159 memset(mm->context.page_rwx_mask, 0,
160 page_mask_nelts * 3 * sizeof(long));
161#endif
162 return 0;
163}
164
165static inline void destroy_context(struct mm_struct *mm)
166{
167 struct sram_list_struct *tmp;
168
169#ifdef CONFIG_APP_STACK_L1
170 if (current_l1_stack_save == mm->context.l1_stack_save)
171 current_l1_stack_save = 0;
172 if (mm->context.l1_stack_save)
173 free_l1stack();
174#endif
175
176 while ((tmp = mm->context.sram_list)) {
177 mm->context.sram_list = tmp->next;
178 sram_free(tmp->addr);
179 kfree(tmp);
180 }
181#ifdef CONFIG_MPU
182 if (current_rwx_mask == mm->context.page_rwx_mask)
183 current_rwx_mask = NULL;
184 free_pages((unsigned long)mm->context.page_rwx_mask, page_mask_order);
185#endif
186}
187
183#endif 188#endif
diff --git a/arch/blackfin/include/asm/processor.h b/arch/blackfin/include/asm/processor.h
index 6f3995b119d8..e3e9b41fa8db 100644
--- a/arch/blackfin/include/asm/processor.h
+++ b/arch/blackfin/include/asm/processor.h
@@ -134,6 +134,12 @@ static inline uint32_t __pure bfin_revid(void)
134 return revid; 134 return revid;
135} 135}
136 136
137static inline uint16_t __pure bfin_cpuid(void)
138{
139 return (bfin_read_CHIPID() & CHIPID_FAMILY) >> 12;
140
141}
142
137static inline uint32_t __pure bfin_compiled_revid(void) 143static inline uint32_t __pure bfin_compiled_revid(void)
138{ 144{
139#if defined(CONFIG_BF_REV_0_0) 145#if defined(CONFIG_BF_REV_0_0)
diff --git a/arch/blackfin/include/asm/ptrace.h b/arch/blackfin/include/asm/ptrace.h
index a45a80e54adc..e3f086dc7268 100644
--- a/arch/blackfin/include/asm/ptrace.h
+++ b/arch/blackfin/include/asm/ptrace.h
@@ -158,6 +158,8 @@ extern void show_regs(struct pt_regs *);
158#define PT_SEQSTAT 8 158#define PT_SEQSTAT 8
159#define PT_IPEND 4 159#define PT_IPEND 4
160 160
161#define PT_ORIG_R0 208
162#define PT_ORIG_P0 212
161#define PT_SYSCFG 216 163#define PT_SYSCFG 216
162#define PT_TEXT_ADDR 220 164#define PT_TEXT_ADDR 220
163#define PT_TEXT_END_ADDR 224 165#define PT_TEXT_END_ADDR 224
diff --git a/arch/blackfin/include/asm/timex.h b/arch/blackfin/include/asm/timex.h
index 22b0806161bb..248aeb066805 100644
--- a/arch/blackfin/include/asm/timex.h
+++ b/arch/blackfin/include/asm/timex.h
@@ -16,7 +16,7 @@ typedef unsigned long long cycles_t;
16static inline cycles_t get_cycles(void) 16static inline cycles_t get_cycles(void)
17{ 17{
18 unsigned long tmp, tmp2; 18 unsigned long tmp, tmp2;
19 __asm__("%0 = cycles; %1 = cycles2;" : "=d"(tmp), "=d"(tmp2)); 19 __asm__ __volatile__("%0 = cycles; %1 = cycles2;" : "=d"(tmp), "=d"(tmp2));
20 return tmp | ((cycles_t)tmp2 << 32); 20 return tmp | ((cycles_t)tmp2 << 32);
21} 21}
22 22
diff --git a/arch/blackfin/include/asm/traps.h b/arch/blackfin/include/asm/traps.h
index f0e5f940d9ca..34f7295fb070 100644
--- a/arch/blackfin/include/asm/traps.h
+++ b/arch/blackfin/include/asm/traps.h
@@ -59,6 +59,9 @@
59 level " or a 16-bit register is accessed with a 32-bit instruction.\n" 59 level " or a 16-bit register is accessed with a 32-bit instruction.\n"
60#define HWC_x3(level) \ 60#define HWC_x3(level) \
61 "External Memory Addressing Error\n" 61 "External Memory Addressing Error\n"
62#define EXC_0x04(level) \
63 "Unimplmented exception occured\n" \
64 level " - Maybe you forgot to install a custom exception handler?\n"
62#define HWC_x12(level) \ 65#define HWC_x12(level) \
63 "Performance Monitor Overflow\n" 66 "Performance Monitor Overflow\n"
64#define HWC_x18(level) \ 67#define HWC_x18(level) \
@@ -84,7 +87,7 @@
84 level " a particular processor implementation.\n" 87 level " a particular processor implementation.\n"
85#define EXC_0x22(level) \ 88#define EXC_0x22(level) \
86 "Illegal instruction combination\n" \ 89 "Illegal instruction combination\n" \
87 level " - See section for multi-issue rules in the ADSP-BF53x Blackfin\n" \ 90 level " - See section for multi-issue rules in the Blackfin\n" \
88 level " Processor Instruction Set Reference.\n" 91 level " Processor Instruction Set Reference.\n"
89#define EXC_0x23(level) \ 92#define EXC_0x23(level) \
90 "Data access CPLB protection violation\n" \ 93 "Data access CPLB protection violation\n" \
diff --git a/arch/blackfin/kernel/asm-offsets.c b/arch/blackfin/kernel/asm-offsets.c
index 881afe9082c7..9bb85dd5ccb3 100644
--- a/arch/blackfin/kernel/asm-offsets.c
+++ b/arch/blackfin/kernel/asm-offsets.c
@@ -60,6 +60,7 @@ int main(void)
60 DEFINE(KERNEL_STACK_SIZE, THREAD_SIZE); 60 DEFINE(KERNEL_STACK_SIZE, THREAD_SIZE);
61 61
62 /* offsets into the pt_regs */ 62 /* offsets into the pt_regs */
63 DEFINE(PT_ORIG_R0, offsetof(struct pt_regs, orig_r0));
63 DEFINE(PT_ORIG_P0, offsetof(struct pt_regs, orig_p0)); 64 DEFINE(PT_ORIG_P0, offsetof(struct pt_regs, orig_p0));
64 DEFINE(PT_ORIG_PC, offsetof(struct pt_regs, orig_pc)); 65 DEFINE(PT_ORIG_PC, offsetof(struct pt_regs, orig_pc));
65 DEFINE(PT_R0, offsetof(struct pt_regs, r0)); 66 DEFINE(PT_R0, offsetof(struct pt_regs, r0));
diff --git a/arch/blackfin/kernel/bfin_gpio.c b/arch/blackfin/kernel/bfin_gpio.c
index ecbd141e0ef2..6e08f425bb44 100644
--- a/arch/blackfin/kernel/bfin_gpio.c
+++ b/arch/blackfin/kernel/bfin_gpio.c
@@ -231,14 +231,14 @@ inline int check_gpio(unsigned gpio)
231} 231}
232#endif 232#endif
233 233
234void gpio_error(unsigned gpio) 234static void gpio_error(unsigned gpio)
235{ 235{
236 printk(KERN_ERR "bfin-gpio: GPIO %d wasn't requested!\n", gpio); 236 printk(KERN_ERR "bfin-gpio: GPIO %d wasn't requested!\n", gpio);
237} 237}
238 238
239static void set_label(unsigned short ident, const char *label) 239static void set_label(unsigned short ident, const char *label)
240{ 240{
241 if (label && str_ident) { 241 if (label) {
242 strncpy(str_ident[ident].name, label, 242 strncpy(str_ident[ident].name, label,
243 RESOURCE_LABEL_SIZE); 243 RESOURCE_LABEL_SIZE);
244 str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0; 244 str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0;
@@ -247,9 +247,6 @@ static void set_label(unsigned short ident, const char *label)
247 247
248static char *get_label(unsigned short ident) 248static char *get_label(unsigned short ident)
249{ 249{
250 if (!str_ident)
251 return "UNKNOWN";
252
253 return (*str_ident[ident].name ? str_ident[ident].name : "UNKNOWN"); 250 return (*str_ident[ident].name ? str_ident[ident].name : "UNKNOWN");
254} 251}
255 252
@@ -260,7 +257,7 @@ static int cmp_label(unsigned short ident, const char *label)
260 printk(KERN_ERR "Please provide none-null label\n"); 257 printk(KERN_ERR "Please provide none-null label\n");
261 } 258 }
262 259
263 if (label && str_ident) 260 if (label)
264 return strncmp(str_ident[ident].name, 261 return strncmp(str_ident[ident].name,
265 label, strlen(label)); 262 label, strlen(label));
266 else 263 else
diff --git a/arch/blackfin/kernel/cplb-mpu/cplbinit.c b/arch/blackfin/kernel/cplb-mpu/cplbinit.c
index 48060105346a..55af729f8495 100644
--- a/arch/blackfin/kernel/cplb-mpu/cplbinit.c
+++ b/arch/blackfin/kernel/cplb-mpu/cplbinit.c
@@ -36,7 +36,7 @@ struct cplb_entry dcplb_tbl[MAX_CPLBS];
36int first_switched_icplb, first_switched_dcplb; 36int first_switched_icplb, first_switched_dcplb;
37int first_mask_dcplb; 37int first_mask_dcplb;
38 38
39void __init generate_cpl_tables(void) 39void __init generate_cplb_tables(void)
40{ 40{
41 int i_d, i_i; 41 int i_d, i_i;
42 unsigned long addr; 42 unsigned long addr;
@@ -83,8 +83,18 @@ void __init generate_cpl_tables(void)
83 dcplb_tbl[i_d].addr = L1_DATA_A_START; 83 dcplb_tbl[i_d].addr = L1_DATA_A_START;
84 dcplb_tbl[i_d++].data = L1_DMEMORY | PAGE_SIZE_4MB; 84 dcplb_tbl[i_d++].data = L1_DMEMORY | PAGE_SIZE_4MB;
85#endif 85#endif
86#if L1_CODE_LENGTH > 0
86 icplb_tbl[i_i].addr = L1_CODE_START; 87 icplb_tbl[i_i].addr = L1_CODE_START;
87 icplb_tbl[i_i++].data = L1_IMEMORY | PAGE_SIZE_4MB; 88 icplb_tbl[i_i++].data = L1_IMEMORY | PAGE_SIZE_4MB;
89#endif
90
91 /* Cover L2 memory */
92#if L2_LENGTH > 0
93 dcplb_tbl[i_d].addr = L2_START;
94 dcplb_tbl[i_d++].data = L2_DMEMORY | PAGE_SIZE_1MB;
95 icplb_tbl[i_i].addr = L2_START;
96 icplb_tbl[i_i++].data = L2_IMEMORY | PAGE_SIZE_1MB;
97#endif
88 98
89 first_mask_dcplb = i_d; 99 first_mask_dcplb = i_d;
90 first_switched_dcplb = i_d + (1 << page_mask_order); 100 first_switched_dcplb = i_d + (1 << page_mask_order);
diff --git a/arch/blackfin/kernel/cplb-mpu/cplbmgr.c b/arch/blackfin/kernel/cplb-mpu/cplbmgr.c
index 99f2831e2964..baa52e261f0d 100644
--- a/arch/blackfin/kernel/cplb-mpu/cplbmgr.c
+++ b/arch/blackfin/kernel/cplb-mpu/cplbmgr.c
@@ -21,6 +21,7 @@
21#include <linux/mm.h> 21#include <linux/mm.h>
22 22
23#include <asm/blackfin.h> 23#include <asm/blackfin.h>
24#include <asm/cacheflush.h>
24#include <asm/cplbinit.h> 25#include <asm/cplbinit.h>
25#include <asm/mmu_context.h> 26#include <asm/mmu_context.h>
26 27
@@ -144,9 +145,7 @@ static noinline int dcplb_miss(void)
144 145
145 d_data = CPLB_SUPV_WR | CPLB_VALID | CPLB_DIRTY | PAGE_SIZE_4KB; 146 d_data = CPLB_SUPV_WR | CPLB_VALID | CPLB_DIRTY | PAGE_SIZE_4KB;
146#ifdef CONFIG_BFIN_DCACHE 147#ifdef CONFIG_BFIN_DCACHE
147 if (addr < _ramend - DMA_UNCACHED_REGION || 148 if (bfin_addr_dcachable(addr)) {
148 (reserved_mem_dcache_on && addr >= _ramend &&
149 addr < physical_mem_end)) {
150 d_data |= CPLB_L1_CHBL | ANOMALY_05000158_WORKAROUND; 149 d_data |= CPLB_L1_CHBL | ANOMALY_05000158_WORKAROUND;
151#ifdef CONFIG_BFIN_WT 150#ifdef CONFIG_BFIN_WT
152 d_data |= CPLB_L1_AOW | CPLB_WT; 151 d_data |= CPLB_L1_AOW | CPLB_WT;
@@ -322,9 +321,11 @@ int cplb_hdr(int seqstat, struct pt_regs *regs)
322void flush_switched_cplbs(void) 321void flush_switched_cplbs(void)
323{ 322{
324 int i; 323 int i;
324 unsigned long flags;
325 325
326 nr_cplb_flush++; 326 nr_cplb_flush++;
327 327
328 local_irq_save(flags);
328 disable_icplb(); 329 disable_icplb();
329 for (i = first_switched_icplb; i < MAX_CPLBS; i++) { 330 for (i = first_switched_icplb; i < MAX_CPLBS; i++) {
330 icplb_tbl[i].data = 0; 331 icplb_tbl[i].data = 0;
@@ -338,6 +339,8 @@ void flush_switched_cplbs(void)
338 bfin_write32(DCPLB_DATA0 + i * 4, 0); 339 bfin_write32(DCPLB_DATA0 + i * 4, 0);
339 } 340 }
340 enable_dcplb(); 341 enable_dcplb();
342 local_irq_restore(flags);
343
341} 344}
342 345
343void set_mask_dcplbs(unsigned long *masks) 346void set_mask_dcplbs(unsigned long *masks)
@@ -345,10 +348,15 @@ void set_mask_dcplbs(unsigned long *masks)
345 int i; 348 int i;
346 unsigned long addr = (unsigned long)masks; 349 unsigned long addr = (unsigned long)masks;
347 unsigned long d_data; 350 unsigned long d_data;
348 current_rwx_mask = masks; 351 unsigned long flags;
349 352
350 if (!masks) 353 if (!masks) {
354 current_rwx_mask = masks;
351 return; 355 return;
356 }
357
358 local_irq_save(flags);
359 current_rwx_mask = masks;
352 360
353 d_data = CPLB_SUPV_WR | CPLB_VALID | CPLB_DIRTY | PAGE_SIZE_4KB; 361 d_data = CPLB_SUPV_WR | CPLB_VALID | CPLB_DIRTY | PAGE_SIZE_4KB;
354#ifdef CONFIG_BFIN_DCACHE 362#ifdef CONFIG_BFIN_DCACHE
@@ -367,4 +375,5 @@ void set_mask_dcplbs(unsigned long *masks)
367 addr += PAGE_SIZE; 375 addr += PAGE_SIZE;
368 } 376 }
369 enable_dcplb(); 377 enable_dcplb();
378 local_irq_restore(flags);
370} 379}
diff --git a/arch/blackfin/kernel/cplb-nompu/cplbinit.c b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
index 728f708d3981..512f8c92ead5 100644
--- a/arch/blackfin/kernel/cplb-nompu/cplbinit.c
+++ b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
@@ -23,6 +23,7 @@
23#include <linux/module.h> 23#include <linux/module.h>
24 24
25#include <asm/blackfin.h> 25#include <asm/blackfin.h>
26#include <asm/cacheflush.h>
26#include <asm/cplb.h> 27#include <asm/cplb.h>
27#include <asm/cplbinit.h> 28#include <asm/cplbinit.h>
28 29
@@ -168,8 +169,8 @@ static struct cplb_desc cplb_data[] = {
168 .end = L2_START + L2_LENGTH, 169 .end = L2_START + L2_LENGTH,
169 .psize = SIZE_1M, 170 .psize = SIZE_1M,
170 .attr = SWITCH_T | I_CPLB | D_CPLB, 171 .attr = SWITCH_T | I_CPLB | D_CPLB,
171 .i_conf = L2_MEMORY, 172 .i_conf = L2_IMEMORY,
172 .d_conf = L2_MEMORY, 173 .d_conf = L2_DMEMORY,
173 .valid = (L2_LENGTH > 0), 174 .valid = (L2_LENGTH > 0),
174 .name = "L2 Memory", 175 .name = "L2 Memory",
175 }, 176 },
@@ -308,7 +309,7 @@ __fill_data_cplbtab(struct cplb_tab *t, int i, u32 a_start, u32 a_end)
308 } 309 }
309} 310}
310 311
311void __init generate_cpl_tables(void) 312void __init generate_cplb_tables(void)
312{ 313{
313 314
314 u16 i, j, process; 315 u16 i, j, process;
diff --git a/arch/blackfin/kernel/early_printk.c b/arch/blackfin/kernel/early_printk.c
index 60f67f90fe35..1f4e3d2e0901 100644
--- a/arch/blackfin/kernel/early_printk.c
+++ b/arch/blackfin/kernel/early_printk.c
@@ -35,6 +35,9 @@
35extern struct console *bfin_earlyserial_init(unsigned int port, 35extern struct console *bfin_earlyserial_init(unsigned int port,
36 unsigned int cflag); 36 unsigned int cflag);
37#endif 37#endif
38#ifdef CONFIG_BFIN_JTAG_COMM
39extern struct console *bfin_jc_early_init(void);
40#endif
38 41
39static struct console *early_console; 42static struct console *early_console;
40 43
@@ -142,6 +145,15 @@ int __init setup_early_printk(char *buf)
142 early_console = earlyserial_init(buf); 145 early_console = earlyserial_init(buf);
143 } 146 }
144#endif 147#endif
148
149#ifdef CONFIG_BFIN_JTAG_COMM
150 /* Check for Blackfin JTAG */
151 if (!strncmp(buf, "jtag", 4)) {
152 buf += 4;
153 early_console = bfin_jc_early_init();
154 }
155#endif
156
145#ifdef CONFIG_FB 157#ifdef CONFIG_FB
146 /* TODO: add framebuffer console support */ 158 /* TODO: add framebuffer console support */
147#endif 159#endif
diff --git a/arch/blackfin/kernel/kgdb.c b/arch/blackfin/kernel/kgdb.c
index a1f9641a6425..b795a207742c 100644
--- a/arch/blackfin/kernel/kgdb.c
+++ b/arch/blackfin/kernel/kgdb.c
@@ -1,32 +1,9 @@
1/* 1/*
2 * File: arch/blackfin/kernel/kgdb.c 2 * arch/blackfin/kernel/kgdb.c - Blackfin kgdb pieces
3 * Based on:
4 * Author: Sonic Zhang
5 * 3 *
6 * Created: 4 * Copyright 2005-2008 Analog Devices Inc.
7 * Description:
8 * 5 *
9 * Rev: $Id: kgdb_bfin_linux-2.6.x.patch 4934 2007-02-13 09:32:11Z sonicz $ 6 * Licensed under the GPL-2 or later.
10 *
11 * Modified:
12 * Copyright 2005-2006 Analog Devices Inc.
13 *
14 * Bugs: Enter bugs at http://blackfin.uclinux.org/
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, see the file COPYING, or write
28 * to the Free Software Foundation, Inc.,
29 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
30 */ 7 */
31 8
32#include <linux/string.h> 9#include <linux/string.h>
@@ -39,24 +16,29 @@
39#include <linux/kgdb.h> 16#include <linux/kgdb.h>
40#include <linux/console.h> 17#include <linux/console.h>
41#include <linux/init.h> 18#include <linux/init.h>
42#include <linux/debugger.h>
43#include <linux/errno.h> 19#include <linux/errno.h>
44#include <linux/irq.h> 20#include <linux/irq.h>
21#include <linux/uaccess.h>
45#include <asm/system.h> 22#include <asm/system.h>
46#include <asm/traps.h> 23#include <asm/traps.h>
47#include <asm/blackfin.h> 24#include <asm/blackfin.h>
25#include <asm/dma.h>
48 26
49/* Put the error code here just in case the user cares. */ 27/* Put the error code here just in case the user cares. */
50int gdb_bf533errcode; 28int gdb_bfin_errcode;
51/* Likewise, the vector number here (since GDB only gets the signal 29/* Likewise, the vector number here (since GDB only gets the signal
52 number through the usual means, and that's not very specific). */ 30 number through the usual means, and that's not very specific). */
53int gdb_bf533vector = -1; 31int gdb_bfin_vector = -1;
54 32
55#if KGDB_MAX_NO_CPUS != 8 33#if KGDB_MAX_NO_CPUS != 8
56#error change the definition of slavecpulocks 34#error change the definition of slavecpulocks
57#endif 35#endif
58 36
59void regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs) 37#ifdef CONFIG_BFIN_WDT
38# error "Please unselect blackfin watchdog driver before build KGDB."
39#endif
40
41void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs)
60{ 42{
61 gdb_regs[BFIN_R0] = regs->r0; 43 gdb_regs[BFIN_R0] = regs->r0;
62 gdb_regs[BFIN_R1] = regs->r1; 44 gdb_regs[BFIN_R1] = regs->r1;
@@ -133,7 +115,7 @@ void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p)
133 gdb_regs[BFIN_SEQSTAT] = p->thread.seqstat; 115 gdb_regs[BFIN_SEQSTAT] = p->thread.seqstat;
134} 116}
135 117
136void gdb_regs_to_regs(unsigned long *gdb_regs, struct pt_regs *regs) 118void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *regs)
137{ 119{
138 regs->r0 = gdb_regs[BFIN_R0]; 120 regs->r0 = gdb_regs[BFIN_R0];
139 regs->r1 = gdb_regs[BFIN_R1]; 121 regs->r1 = gdb_regs[BFIN_R1];
@@ -199,171 +181,208 @@ struct hw_breakpoint {
199 unsigned int dataacc:2; 181 unsigned int dataacc:2;
200 unsigned short count; 182 unsigned short count;
201 unsigned int addr; 183 unsigned int addr;
202} breakinfo[HW_BREAKPOINT_NUM]; 184} breakinfo[HW_WATCHPOINT_NUM];
203 185
204int kgdb_arch_init(void) 186int bfin_set_hw_break(unsigned long addr, int len, enum kgdb_bptype type)
205{
206 debugger_step = 0;
207
208 kgdb_remove_all_hw_break();
209 return 0;
210}
211
212int kgdb_set_hw_break(unsigned long addr)
213{ 187{
214 int breakno; 188 int breakno;
215 for (breakno = 0; breakno < HW_BREAKPOINT_NUM; breakno++) 189 int bfin_type;
216 if (!breakinfo[breakno].occupied) { 190 int dataacc = 0;
191
192 switch (type) {
193 case BP_HARDWARE_BREAKPOINT:
194 bfin_type = TYPE_INST_WATCHPOINT;
195 break;
196 case BP_WRITE_WATCHPOINT:
197 dataacc = 1;
198 bfin_type = TYPE_DATA_WATCHPOINT;
199 break;
200 case BP_READ_WATCHPOINT:
201 dataacc = 2;
202 bfin_type = TYPE_DATA_WATCHPOINT;
203 break;
204 case BP_ACCESS_WATCHPOINT:
205 dataacc = 3;
206 bfin_type = TYPE_DATA_WATCHPOINT;
207 break;
208 default:
209 return -ENOSPC;
210 }
211
212 /* Becasue hardware data watchpoint impelemented in current
213 * Blackfin can not trigger an exception event as the hardware
214 * instrction watchpoint does, we ignaore all data watch point here.
215 * They can be turned on easily after future blackfin design
216 * supports this feature.
217 */
218 for (breakno = 0; breakno < HW_INST_WATCHPOINT_NUM; breakno++)
219 if (bfin_type == breakinfo[breakno].type
220 && !breakinfo[breakno].occupied) {
217 breakinfo[breakno].occupied = 1; 221 breakinfo[breakno].occupied = 1;
218 breakinfo[breakno].enabled = 1; 222 breakinfo[breakno].enabled = 1;
219 breakinfo[breakno].type = 1;
220 breakinfo[breakno].addr = addr; 223 breakinfo[breakno].addr = addr;
224 breakinfo[breakno].dataacc = dataacc;
225 breakinfo[breakno].count = 0;
221 return 0; 226 return 0;
222 } 227 }
223 228
224 return -ENOSPC; 229 return -ENOSPC;
225} 230}
226 231
227int kgdb_remove_hw_break(unsigned long addr) 232int bfin_remove_hw_break(unsigned long addr, int len, enum kgdb_bptype type)
228{ 233{
229 int breakno; 234 int breakno;
230 for (breakno = 0; breakno < HW_BREAKPOINT_NUM; breakno++) 235 int bfin_type;
231 if (breakinfo[breakno].addr == addr) 236
232 memset(&(breakinfo[breakno]), 0, sizeof(struct hw_breakpoint)); 237 switch (type) {
238 case BP_HARDWARE_BREAKPOINT:
239 bfin_type = TYPE_INST_WATCHPOINT;
240 break;
241 case BP_WRITE_WATCHPOINT:
242 case BP_READ_WATCHPOINT:
243 case BP_ACCESS_WATCHPOINT:
244 bfin_type = TYPE_DATA_WATCHPOINT;
245 break;
246 default:
247 return 0;
248 }
249 for (breakno = 0; breakno < HW_WATCHPOINT_NUM; breakno++)
250 if (bfin_type == breakinfo[breakno].type
251 && breakinfo[breakno].occupied
252 && breakinfo[breakno].addr == addr) {
253 breakinfo[breakno].occupied = 0;
254 breakinfo[breakno].enabled = 0;
255 }
233 256
234 return 0; 257 return 0;
235} 258}
236 259
237void kgdb_remove_all_hw_break(void) 260void bfin_remove_all_hw_break(void)
238{ 261{
239 memset(breakinfo, 0, sizeof(struct hw_breakpoint)*8); 262 int breakno;
240}
241 263
242/* 264 memset(breakinfo, 0, sizeof(struct hw_breakpoint)*HW_WATCHPOINT_NUM);
243void kgdb_show_info(void) 265
244{ 266 for (breakno = 0; breakno < HW_INST_WATCHPOINT_NUM; breakno++)
245 printk(KERN_DEBUG "hwd: wpia0=0x%x, wpiacnt0=%d, wpiactl=0x%x, wpstat=0x%x\n", 267 breakinfo[breakno].type = TYPE_INST_WATCHPOINT;
246 bfin_read_WPIA0(), bfin_read_WPIACNT0(), 268 for (; breakno < HW_WATCHPOINT_NUM; breakno++)
247 bfin_read_WPIACTL(), bfin_read_WPSTAT()); 269 breakinfo[breakno].type = TYPE_DATA_WATCHPOINT;
248} 270}
249*/
250 271
251void kgdb_correct_hw_break(void) 272void bfin_correct_hw_break(void)
252{ 273{
253 int breakno; 274 int breakno;
254 int correctit; 275 unsigned int wpiactl = 0;
255 uint32_t wpdactl = bfin_read_WPDACTL(); 276 unsigned int wpdactl = 0;
277 int enable_wp = 0;
278
279 for (breakno = 0; breakno < HW_WATCHPOINT_NUM; breakno++)
280 if (breakinfo[breakno].enabled) {
281 enable_wp = 1;
256 282
257 correctit = 0;
258 for (breakno = 0; breakno < HW_BREAKPOINT_NUM; breakno++) {
259 if (breakinfo[breakno].type == 1) {
260 switch (breakno) { 283 switch (breakno) {
261 case 0: 284 case 0:
262 if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN0)) { 285 wpiactl |= WPIAEN0|WPICNTEN0;
263 correctit = 1; 286 bfin_write_WPIA0(breakinfo[breakno].addr);
264 wpdactl &= ~(WPIREN01|EMUSW0); 287 bfin_write_WPIACNT0(breakinfo[breakno].count
265 wpdactl |= WPIAEN0|WPICNTEN0; 288 + breakinfo->skip);
266 bfin_write_WPIA0(breakinfo[breakno].addr);
267 bfin_write_WPIACNT0(breakinfo[breakno].skip);
268 } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN0)) {
269 correctit = 1;
270 wpdactl &= ~WPIAEN0;
271 }
272 break; 289 break;
273
274 case 1: 290 case 1:
275 if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN1)) { 291 wpiactl |= WPIAEN1|WPICNTEN1;
276 correctit = 1; 292 bfin_write_WPIA1(breakinfo[breakno].addr);
277 wpdactl &= ~(WPIREN01|EMUSW1); 293 bfin_write_WPIACNT1(breakinfo[breakno].count
278 wpdactl |= WPIAEN1|WPICNTEN1; 294 + breakinfo->skip);
279 bfin_write_WPIA1(breakinfo[breakno].addr);
280 bfin_write_WPIACNT1(breakinfo[breakno].skip);
281 } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN1)) {
282 correctit = 1;
283 wpdactl &= ~WPIAEN1;
284 }
285 break; 295 break;
286
287 case 2: 296 case 2:
288 if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN2)) { 297 wpiactl |= WPIAEN2|WPICNTEN2;
289 correctit = 1; 298 bfin_write_WPIA2(breakinfo[breakno].addr);
290 wpdactl &= ~(WPIREN23|EMUSW2); 299 bfin_write_WPIACNT2(breakinfo[breakno].count
291 wpdactl |= WPIAEN2|WPICNTEN2; 300 + breakinfo->skip);
292 bfin_write_WPIA2(breakinfo[breakno].addr);
293 bfin_write_WPIACNT2(breakinfo[breakno].skip);
294 } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN2)) {
295 correctit = 1;
296 wpdactl &= ~WPIAEN2;
297 }
298 break; 301 break;
299
300 case 3: 302 case 3:
301 if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN3)) { 303 wpiactl |= WPIAEN3|WPICNTEN3;
302 correctit = 1; 304 bfin_write_WPIA3(breakinfo[breakno].addr);
303 wpdactl &= ~(WPIREN23|EMUSW3); 305 bfin_write_WPIACNT3(breakinfo[breakno].count
304 wpdactl |= WPIAEN3|WPICNTEN3; 306 + breakinfo->skip);
305 bfin_write_WPIA3(breakinfo[breakno].addr);
306 bfin_write_WPIACNT3(breakinfo[breakno].skip);
307 } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN3)) {
308 correctit = 1;
309 wpdactl &= ~WPIAEN3;
310 }
311 break; 307 break;
312 case 4: 308 case 4:
313 if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN4)) { 309 wpiactl |= WPIAEN4|WPICNTEN4;
314 correctit = 1; 310 bfin_write_WPIA4(breakinfo[breakno].addr);
315 wpdactl &= ~(WPIREN45|EMUSW4); 311 bfin_write_WPIACNT4(breakinfo[breakno].count
316 wpdactl |= WPIAEN4|WPICNTEN4; 312 + breakinfo->skip);
317 bfin_write_WPIA4(breakinfo[breakno].addr);
318 bfin_write_WPIACNT4(breakinfo[breakno].skip);
319 } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN4)) {
320 correctit = 1;
321 wpdactl &= ~WPIAEN4;
322 }
323 break; 313 break;
324 case 5: 314 case 5:
325 if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN5)) { 315 wpiactl |= WPIAEN5|WPICNTEN5;
326 correctit = 1; 316 bfin_write_WPIA5(breakinfo[breakno].addr);
327 wpdactl &= ~(WPIREN45|EMUSW5); 317 bfin_write_WPIACNT5(breakinfo[breakno].count
328 wpdactl |= WPIAEN5|WPICNTEN5; 318 + breakinfo->skip);
329 bfin_write_WPIA5(breakinfo[breakno].addr); 319 break;
330 bfin_write_WPIACNT5(breakinfo[breakno].skip); 320 case 6:
331 } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN5)) { 321 wpdactl |= WPDAEN0|WPDCNTEN0|WPDSRC0;
332 correctit = 1; 322 wpdactl |= breakinfo[breakno].dataacc
333 wpdactl &= ~WPIAEN5; 323 << WPDACC0_OFFSET;
334 } 324 bfin_write_WPDA0(breakinfo[breakno].addr);
325 bfin_write_WPDACNT0(breakinfo[breakno].count
326 + breakinfo->skip);
327 break;
328 case 7:
329 wpdactl |= WPDAEN1|WPDCNTEN1|WPDSRC1;
330 wpdactl |= breakinfo[breakno].dataacc
331 << WPDACC1_OFFSET;
332 bfin_write_WPDA1(breakinfo[breakno].addr);
333 bfin_write_WPDACNT1(breakinfo[breakno].count
334 + breakinfo->skip);
335 break; 335 break;
336 } 336 }
337 } 337 }
338 } 338
339 if (correctit) { 339 /* Should enable WPPWR bit first before set any other
340 wpdactl &= ~WPAND; 340 * WPIACTL and WPDACTL bits */
341 wpdactl |= WPPWR; 341 if (enable_wp) {
342 /*printk("correct_hw_break: wpdactl=0x%x\n", wpdactl);*/ 342 bfin_write_WPIACTL(WPPWR);
343 CSYNC();
344 bfin_write_WPIACTL(wpiactl|WPPWR);
343 bfin_write_WPDACTL(wpdactl); 345 bfin_write_WPDACTL(wpdactl);
344 CSYNC(); 346 CSYNC();
345 /*kgdb_show_info();*/
346 } 347 }
347} 348}
348 349
349void kgdb_disable_hw_debug(struct pt_regs *regs) 350void kgdb_disable_hw_debug(struct pt_regs *regs)
350{ 351{
351 /* Disable hardware debugging while we are in kgdb */ 352 /* Disable hardware debugging while we are in kgdb */
352 bfin_write_WPIACTL(bfin_read_WPIACTL() & ~0x1); 353 bfin_write_WPIACTL(0);
354 bfin_write_WPDACTL(0);
353 CSYNC(); 355 CSYNC();
354} 356}
355 357
356void kgdb_post_master_code(struct pt_regs *regs, int eVector, int err_code) 358#ifdef CONFIG_SMP
359void kgdb_passive_cpu_callback(void *info)
360{
361 kgdb_nmicallback(raw_smp_processor_id(), get_irq_regs());
362}
363
364void kgdb_roundup_cpus(unsigned long flags)
365{
366 smp_call_function(kgdb_passive_cpu_callback, NULL, 0, 0);
367}
368
369void kgdb_roundup_cpu(int cpu, unsigned long flags)
370{
371 smp_call_function_single(cpu, kgdb_passive_cpu_callback, NULL, 0, 0);
372}
373#endif
374
375void kgdb_post_primary_code(struct pt_regs *regs, int eVector, int err_code)
357{ 376{
358 /* Master processor is completely in the debugger */ 377 /* Master processor is completely in the debugger */
359 gdb_bf533vector = eVector; 378 gdb_bfin_vector = eVector;
360 gdb_bf533errcode = err_code; 379 gdb_bfin_errcode = err_code;
361} 380}
362 381
363int kgdb_arch_handle_exception(int exceptionVector, int signo, 382int kgdb_arch_handle_exception(int vector, int signo,
364 int err_code, char *remcom_in_buffer, 383 int err_code, char *remcom_in_buffer,
365 char *remcom_out_buffer, 384 char *remcom_out_buffer,
366 struct pt_regs *linux_regs) 385 struct pt_regs *regs)
367{ 386{
368 long addr; 387 long addr;
369 long breakno; 388 long breakno;
@@ -385,44 +404,40 @@ int kgdb_arch_handle_exception(int exceptionVector, int signo,
385 /* try to read optional parameter, pc unchanged if no parm */ 404 /* try to read optional parameter, pc unchanged if no parm */
386 ptr = &remcom_in_buffer[1]; 405 ptr = &remcom_in_buffer[1];
387 if (kgdb_hex2long(&ptr, &addr)) { 406 if (kgdb_hex2long(&ptr, &addr)) {
388 linux_regs->retx = addr; 407 regs->retx = addr;
389 } 408 }
390 newPC = linux_regs->retx; 409 newPC = regs->retx;
391 410
392 /* clear the trace bit */ 411 /* clear the trace bit */
393 linux_regs->syscfg &= 0xfffffffe; 412 regs->syscfg &= 0xfffffffe;
394 413
395 /* set the trace bit if we're stepping */ 414 /* set the trace bit if we're stepping */
396 if (remcom_in_buffer[0] == 's') { 415 if (remcom_in_buffer[0] == 's') {
397 linux_regs->syscfg |= 0x1; 416 regs->syscfg |= 0x1;
398 debugger_step = linux_regs->ipend; 417 kgdb_single_step = regs->ipend;
399 debugger_step >>= 6; 418 kgdb_single_step >>= 6;
400 for (i = 10; i > 0; i--, debugger_step >>= 1) 419 for (i = 10; i > 0; i--, kgdb_single_step >>= 1)
401 if (debugger_step & 1) 420 if (kgdb_single_step & 1)
402 break; 421 break;
403 /* i indicate event priority of current stopped instruction 422 /* i indicate event priority of current stopped instruction
404 * user space instruction is 0, IVG15 is 1, IVTMR is 10. 423 * user space instruction is 0, IVG15 is 1, IVTMR is 10.
405 * debugger_step > 0 means in single step mode 424 * kgdb_single_step > 0 means in single step mode
406 */ 425 */
407 debugger_step = i + 1; 426 kgdb_single_step = i + 1;
408 } else {
409 debugger_step = 0;
410 } 427 }
411 428
412 wp_status = bfin_read_WPSTAT(); 429 if (vector == VEC_WATCH) {
413 CSYNC(); 430 wp_status = bfin_read_WPSTAT();
414 431 for (breakno = 0; breakno < HW_WATCHPOINT_NUM; breakno++) {
415 if (exceptionVector == VEC_WATCH) {
416 for (breakno = 0; breakno < 6; ++breakno) {
417 if (wp_status & (1 << breakno)) { 432 if (wp_status & (1 << breakno)) {
418 breakinfo->skip = 1; 433 breakinfo->skip = 1;
419 break; 434 break;
420 } 435 }
421 } 436 }
437 bfin_write_WPSTAT(0);
422 } 438 }
423 kgdb_correct_hw_break();
424 439
425 bfin_write_WPSTAT(0); 440 bfin_correct_hw_break();
426 441
427 return 0; 442 return 0;
428 } /* switch */ 443 } /* switch */
@@ -431,5 +446,385 @@ int kgdb_arch_handle_exception(int exceptionVector, int signo,
431 446
432struct kgdb_arch arch_kgdb_ops = { 447struct kgdb_arch arch_kgdb_ops = {
433 .gdb_bpt_instr = {0xa1}, 448 .gdb_bpt_instr = {0xa1},
449#ifdef CONFIG_SMP
450 .flags = KGDB_HW_BREAKPOINT|KGDB_THR_PROC_SWAP,
451#else
434 .flags = KGDB_HW_BREAKPOINT, 452 .flags = KGDB_HW_BREAKPOINT,
453#endif
454 .set_hw_breakpoint = bfin_set_hw_break,
455 .remove_hw_breakpoint = bfin_remove_hw_break,
456 .remove_all_hw_break = bfin_remove_all_hw_break,
457 .correct_hw_break = bfin_correct_hw_break,
435}; 458};
459
460static int hex(char ch)
461{
462 if ((ch >= 'a') && (ch <= 'f'))
463 return ch - 'a' + 10;
464 if ((ch >= '0') && (ch <= '9'))
465 return ch - '0';
466 if ((ch >= 'A') && (ch <= 'F'))
467 return ch - 'A' + 10;
468 return -1;
469}
470
471static int validate_memory_access_address(unsigned long addr, int size)
472{
473 int cpu = raw_smp_processor_id();
474
475 if (size < 0)
476 return EFAULT;
477 if (addr >= 0x1000 && (addr + size) <= physical_mem_end)
478 return 0;
479 if (addr >= SYSMMR_BASE)
480 return 0;
481 if (addr >= ASYNC_BANK0_BASE
482 && addr + size <= ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE)
483 return 0;
484 if (cpu == 0) {
485 if (addr >= L1_SCRATCH_START
486 && (addr + size <= L1_SCRATCH_START + L1_SCRATCH_LENGTH))
487 return 0;
488#if L1_CODE_LENGTH != 0
489 if (addr >= L1_CODE_START
490 && (addr + size <= L1_CODE_START + L1_CODE_LENGTH))
491 return 0;
492#endif
493#if L1_DATA_A_LENGTH != 0
494 if (addr >= L1_DATA_A_START
495 && (addr + size <= L1_DATA_A_START + L1_DATA_A_LENGTH))
496 return 0;
497#endif
498#if L1_DATA_B_LENGTH != 0
499 if (addr >= L1_DATA_B_START
500 && (addr + size <= L1_DATA_B_START + L1_DATA_B_LENGTH))
501 return 0;
502#endif
503#ifdef CONFIG_SMP
504 } else if (cpu == 1) {
505 if (addr >= COREB_L1_SCRATCH_START
506 && (addr + size <= COREB_L1_SCRATCH_START
507 + L1_SCRATCH_LENGTH))
508 return 0;
509# if L1_CODE_LENGTH != 0
510 if (addr >= COREB_L1_CODE_START
511 && (addr + size <= COREB_L1_CODE_START + L1_CODE_LENGTH))
512 return 0;
513# endif
514# if L1_DATA_A_LENGTH != 0
515 if (addr >= COREB_L1_DATA_A_START
516 && (addr + size <= COREB_L1_DATA_A_START + L1_DATA_A_LENGTH))
517 return 0;
518# endif
519# if L1_DATA_B_LENGTH != 0
520 if (addr >= COREB_L1_DATA_B_START
521 && (addr + size <= COREB_L1_DATA_B_START + L1_DATA_B_LENGTH))
522 return 0;
523# endif
524#endif
525 }
526
527#if L2_LENGTH != 0
528 if (addr >= L2_START
529 && addr + size <= L2_START + L2_LENGTH)
530 return 0;
531#endif
532
533 return EFAULT;
534}
535
536/*
537 * Convert the memory pointed to by mem into hex, placing result in buf.
538 * Return a pointer to the last char put in buf (null). May return an error.
539 */
540int kgdb_mem2hex(char *mem, char *buf, int count)
541{
542 char *tmp;
543 int err = 0;
544 unsigned char *pch;
545 unsigned short mmr16;
546 unsigned long mmr32;
547 int cpu = raw_smp_processor_id();
548
549 if (validate_memory_access_address((unsigned long)mem, count))
550 return EFAULT;
551
552 /*
553 * We use the upper half of buf as an intermediate buffer for the
554 * raw memory copy. Hex conversion will work against this one.
555 */
556 tmp = buf + count;
557
558 if ((unsigned int)mem >= SYSMMR_BASE) { /*access MMR registers*/
559 switch (count) {
560 case 2:
561 if ((unsigned int)mem % 2 == 0) {
562 mmr16 = *(unsigned short *)mem;
563 pch = (unsigned char *)&mmr16;
564 *tmp++ = *pch++;
565 *tmp++ = *pch++;
566 tmp -= 2;
567 } else
568 err = EFAULT;
569 break;
570 case 4:
571 if ((unsigned int)mem % 4 == 0) {
572 mmr32 = *(unsigned long *)mem;
573 pch = (unsigned char *)&mmr32;
574 *tmp++ = *pch++;
575 *tmp++ = *pch++;
576 *tmp++ = *pch++;
577 *tmp++ = *pch++;
578 tmp -= 4;
579 } else
580 err = EFAULT;
581 break;
582 default:
583 err = EFAULT;
584 }
585 } else if (cpu == 0 && (unsigned int)mem >= L1_CODE_START &&
586 (unsigned int)(mem + count) <= L1_CODE_START + L1_CODE_LENGTH
587#ifdef CONFIG_SMP
588 || cpu == 1 && (unsigned int)mem >= COREB_L1_CODE_START &&
589 (unsigned int)(mem + count) <=
590 COREB_L1_CODE_START + L1_CODE_LENGTH
591#endif
592 ) {
593 /* access L1 instruction SRAM*/
594 if (dma_memcpy(tmp, mem, count) == NULL)
595 err = EFAULT;
596 } else
597 err = probe_kernel_read(tmp, mem, count);
598
599 if (!err) {
600 while (count > 0) {
601 buf = pack_hex_byte(buf, *tmp);
602 tmp++;
603 count--;
604 }
605
606 *buf = 0;
607 }
608
609 return err;
610}
611
612/*
613 * Copy the binary array pointed to by buf into mem. Fix $, #, and
614 * 0x7d escaped with 0x7d. Return a pointer to the character after
615 * the last byte written.
616 */
617int kgdb_ebin2mem(char *buf, char *mem, int count)
618{
619 char *tmp_old;
620 char *tmp_new;
621 unsigned short *mmr16;
622 unsigned long *mmr32;
623 int err = 0;
624 int size = 0;
625 int cpu = raw_smp_processor_id();
626
627 tmp_old = tmp_new = buf;
628
629 while (count-- > 0) {
630 if (*tmp_old == 0x7d)
631 *tmp_new = *(++tmp_old) ^ 0x20;
632 else
633 *tmp_new = *tmp_old;
634 tmp_new++;
635 tmp_old++;
636 size++;
637 }
638
639 if (validate_memory_access_address((unsigned long)mem, size))
640 return EFAULT;
641
642 if ((unsigned int)mem >= SYSMMR_BASE) { /*access MMR registers*/
643 switch (size) {
644 case 2:
645 if ((unsigned int)mem % 2 == 0) {
646 mmr16 = (unsigned short *)buf;
647 *(unsigned short *)mem = *mmr16;
648 } else
649 return EFAULT;
650 break;
651 case 4:
652 if ((unsigned int)mem % 4 == 0) {
653 mmr32 = (unsigned long *)buf;
654 *(unsigned long *)mem = *mmr32;
655 } else
656 return EFAULT;
657 break;
658 default:
659 return EFAULT;
660 }
661 } else if (cpu == 0 && (unsigned int)mem >= L1_CODE_START &&
662 (unsigned int)(mem + count) < L1_CODE_START + L1_CODE_LENGTH
663#ifdef CONFIG_SMP
664 || cpu == 1 && (unsigned int)mem >= COREB_L1_CODE_START &&
665 (unsigned int)(mem + count) <=
666 COREB_L1_CODE_START + L1_CODE_LENGTH
667#endif
668 ) {
669 /* access L1 instruction SRAM */
670 if (dma_memcpy(mem, buf, size) == NULL)
671 err = EFAULT;
672 } else
673 err = probe_kernel_write(mem, buf, size);
674
675 return err;
676}
677
678/*
679 * Convert the hex array pointed to by buf into binary to be placed in mem.
680 * Return a pointer to the character AFTER the last byte written.
681 * May return an error.
682 */
683int kgdb_hex2mem(char *buf, char *mem, int count)
684{
685 char *tmp_raw;
686 char *tmp_hex;
687 unsigned short *mmr16;
688 unsigned long *mmr32;
689 int cpu = raw_smp_processor_id();
690
691 if (validate_memory_access_address((unsigned long)mem, count))
692 return EFAULT;
693
694 /*
695 * We use the upper half of buf as an intermediate buffer for the
696 * raw memory that is converted from hex.
697 */
698 tmp_raw = buf + count * 2;
699
700 tmp_hex = tmp_raw - 1;
701 while (tmp_hex >= buf) {
702 tmp_raw--;
703 *tmp_raw = hex(*tmp_hex--);
704 *tmp_raw |= hex(*tmp_hex--) << 4;
705 }
706
707 if ((unsigned int)mem >= SYSMMR_BASE) { /*access MMR registers*/
708 switch (count) {
709 case 2:
710 if ((unsigned int)mem % 2 == 0) {
711 mmr16 = (unsigned short *)tmp_raw;
712 *(unsigned short *)mem = *mmr16;
713 } else
714 return EFAULT;
715 break;
716 case 4:
717 if ((unsigned int)mem % 4 == 0) {
718 mmr32 = (unsigned long *)tmp_raw;
719 *(unsigned long *)mem = *mmr32;
720 } else
721 return EFAULT;
722 break;
723 default:
724 return EFAULT;
725 }
726 } else if (cpu == 0 && (unsigned int)mem >= L1_CODE_START &&
727 (unsigned int)(mem + count) <= L1_CODE_START + L1_CODE_LENGTH
728#ifdef CONFIG_SMP
729 || cpu == 1 && (unsigned int)mem >= COREB_L1_CODE_START &&
730 (unsigned int)(mem + count) <=
731 COREB_L1_CODE_START + L1_CODE_LENGTH
732#endif
733 ) {
734 /* access L1 instruction SRAM */
735 if (dma_memcpy(mem, tmp_raw, count) == NULL)
736 return EFAULT;
737 } else
738 return probe_kernel_write(mem, tmp_raw, count);
739 return 0;
740}
741
742int kgdb_validate_break_address(unsigned long addr)
743{
744 int cpu = raw_smp_processor_id();
745
746 if (addr >= 0x1000 && (addr + BREAK_INSTR_SIZE) <= physical_mem_end)
747 return 0;
748 if (addr >= ASYNC_BANK0_BASE
749 && addr + BREAK_INSTR_SIZE <= ASYNC_BANK3_BASE + ASYNC_BANK3_BASE)
750 return 0;
751#if L1_CODE_LENGTH != 0
752 if (cpu == 0 && addr >= L1_CODE_START
753 && addr + BREAK_INSTR_SIZE <= L1_CODE_START + L1_CODE_LENGTH)
754 return 0;
755# ifdef CONFIG_SMP
756 else if (cpu == 1 && addr >= COREB_L1_CODE_START
757 && addr + BREAK_INSTR_SIZE <= COREB_L1_CODE_START + L1_CODE_LENGTH)
758 return 0;
759# endif
760#endif
761#if L2_LENGTH != 0
762 if (addr >= L2_START
763 && addr + BREAK_INSTR_SIZE <= L2_START + L2_LENGTH)
764 return 0;
765#endif
766
767 return EFAULT;
768}
769
770int kgdb_arch_set_breakpoint(unsigned long addr, char *saved_instr)
771{
772 int err;
773 int cpu = raw_smp_processor_id();
774
775 if ((cpu == 0 && (unsigned int)addr >= L1_CODE_START
776 && (unsigned int)(addr + BREAK_INSTR_SIZE)
777 < L1_CODE_START + L1_CODE_LENGTH)
778#ifdef CONFIG_SMP
779 || (cpu == 1 && (unsigned int)addr >= COREB_L1_CODE_START
780 && (unsigned int)(addr + BREAK_INSTR_SIZE)
781 < COREB_L1_CODE_START + L1_CODE_LENGTH)
782#endif
783 ) {
784 /* access L1 instruction SRAM */
785 if (dma_memcpy(saved_instr, (void *)addr, BREAK_INSTR_SIZE)
786 == NULL)
787 return -EFAULT;
788
789 if (dma_memcpy((void *)addr, arch_kgdb_ops.gdb_bpt_instr,
790 BREAK_INSTR_SIZE) == NULL)
791 return -EFAULT;
792
793 return 0;
794 } else {
795 err = probe_kernel_read(saved_instr, (char *)addr,
796 BREAK_INSTR_SIZE);
797 if (err)
798 return err;
799
800 return probe_kernel_write((char *)addr,
801 arch_kgdb_ops.gdb_bpt_instr, BREAK_INSTR_SIZE);
802 }
803}
804
805int kgdb_arch_remove_breakpoint(unsigned long addr, char *bundle)
806{
807 if ((unsigned int)addr >= L1_CODE_START &&
808 (unsigned int)(addr + BREAK_INSTR_SIZE) <
809 L1_CODE_START + L1_CODE_LENGTH) {
810 /* access L1 instruction SRAM */
811 if (dma_memcpy((void *)addr, bundle, BREAK_INSTR_SIZE) == NULL)
812 return -EFAULT;
813
814 return 0;
815 } else
816 return probe_kernel_write((char *)addr,
817 (char *)bundle, BREAK_INSTR_SIZE);
818}
819
820int kgdb_arch_init(void)
821{
822 kgdb_single_step = 0;
823
824 bfin_remove_all_hw_break();
825 return 0;
826}
827
828void kgdb_arch_exit(void)
829{
830}
diff --git a/arch/blackfin/kernel/ptrace.c b/arch/blackfin/kernel/ptrace.c
index bf1a51d8e608..140bf00e9974 100644
--- a/arch/blackfin/kernel/ptrace.c
+++ b/arch/blackfin/kernel/ptrace.c
@@ -46,7 +46,6 @@
46#include <asm/dma.h> 46#include <asm/dma.h>
47#include <asm/fixed_code.h> 47#include <asm/fixed_code.h>
48 48
49#define MAX_SHARED_LIBS 3
50#define TEXT_OFFSET 0 49#define TEXT_OFFSET 0
51/* 50/*
52 * does not yet catch signals sent when the child dies. 51 * does not yet catch signals sent when the child dies.
@@ -161,21 +160,32 @@ static inline int is_user_addr_valid(struct task_struct *child,
161 struct vm_list_struct *vml; 160 struct vm_list_struct *vml;
162 struct sram_list_struct *sraml; 161 struct sram_list_struct *sraml;
163 162
163 /* overflow */
164 if (start + len < start)
165 return -EIO;
166
164 for (vml = child->mm->context.vmlist; vml; vml = vml->next) 167 for (vml = child->mm->context.vmlist; vml; vml = vml->next)
165 if (start >= vml->vma->vm_start && start + len <= vml->vma->vm_end) 168 if (start >= vml->vma->vm_start && start + len < vml->vma->vm_end)
166 return 0; 169 return 0;
167 170
168 for (sraml = child->mm->context.sram_list; sraml; sraml = sraml->next) 171 for (sraml = child->mm->context.sram_list; sraml; sraml = sraml->next)
169 if (start >= (unsigned long)sraml->addr 172 if (start >= (unsigned long)sraml->addr
170 && start + len <= (unsigned long)sraml->addr + sraml->length) 173 && start + len < (unsigned long)sraml->addr + sraml->length)
171 return 0; 174 return 0;
172 175
173 if (start >= FIXED_CODE_START && start + len <= FIXED_CODE_END) 176 if (start >= FIXED_CODE_START && start + len < FIXED_CODE_END)
174 return 0; 177 return 0;
175 178
176 return -EIO; 179 return -EIO;
177} 180}
178 181
182void ptrace_enable(struct task_struct *child)
183{
184 unsigned long tmp;
185 tmp = get_reg(child, PT_SYSCFG) | (TRACE_BITS);
186 put_reg(child, PT_SYSCFG, tmp);
187}
188
179/* 189/*
180 * Called by kernel/ptrace.c when detaching.. 190 * Called by kernel/ptrace.c when detaching..
181 * 191 *
@@ -192,14 +202,12 @@ void ptrace_disable(struct task_struct *child)
192long arch_ptrace(struct task_struct *child, long request, long addr, long data) 202long arch_ptrace(struct task_struct *child, long request, long addr, long data)
193{ 203{
194 int ret; 204 int ret;
195 int add = 0;
196 unsigned long __user *datap = (unsigned long __user *)data; 205 unsigned long __user *datap = (unsigned long __user *)data;
197 206
198 switch (request) { 207 switch (request) {
199 /* when I and D space are separate, these will need to be fixed. */ 208 /* when I and D space are separate, these will need to be fixed. */
200 case PTRACE_PEEKDATA: 209 case PTRACE_PEEKDATA:
201 pr_debug("ptrace: PEEKDATA\n"); 210 pr_debug("ptrace: PEEKDATA\n");
202 add = MAX_SHARED_LIBS * 4; /* space between text and data */
203 /* fall through */ 211 /* fall through */
204 case PTRACE_PEEKTEXT: /* read word at location addr. */ 212 case PTRACE_PEEKTEXT: /* read word at location addr. */
205 { 213 {
@@ -207,40 +215,35 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
207 int copied; 215 int copied;
208 216
209 ret = -EIO; 217 ret = -EIO;
210 pr_debug("ptrace: PEEKTEXT at addr 0x%08lx + add %d %ld\n", addr, add, 218 pr_debug("ptrace: PEEKTEXT at addr 0x%08lx + %ld\n", addr, sizeof(data));
211 sizeof(data)); 219 if (is_user_addr_valid(child, addr, sizeof(tmp)) < 0)
212 if (is_user_addr_valid(child, addr + add, sizeof(tmp)) < 0)
213 break; 220 break;
214 pr_debug("ptrace: user address is valid\n"); 221 pr_debug("ptrace: user address is valid\n");
215 222
216#if L1_CODE_LENGTH != 0 223 if (L1_CODE_LENGTH != 0 && addr >= L1_CODE_START
217 if (addr + add >= L1_CODE_START 224 && addr + sizeof(tmp) <= L1_CODE_START + L1_CODE_LENGTH) {
218 && addr + add + sizeof(tmp) <= L1_CODE_START + L1_CODE_LENGTH) { 225 safe_dma_memcpy (&tmp, (const void *)(addr), sizeof(tmp));
219 safe_dma_memcpy (&tmp, (const void *)(addr + add), sizeof(tmp));
220 copied = sizeof(tmp); 226 copied = sizeof(tmp);
221 } else 227
222#endif 228 } else if (L1_DATA_A_LENGTH != 0 && addr >= L1_DATA_A_START
223#if L1_DATA_A_LENGTH != 0 229 && addr + sizeof(tmp) <= L1_DATA_A_START + L1_DATA_A_LENGTH) {
224 if (addr + add >= L1_DATA_A_START 230 memcpy(&tmp, (const void *)(addr), sizeof(tmp));
225 && addr + add + sizeof(tmp) <= L1_DATA_A_START + L1_DATA_A_LENGTH) {
226 memcpy(&tmp, (const void *)(addr + add), sizeof(tmp));
227 copied = sizeof(tmp); 231 copied = sizeof(tmp);
228 } else 232
229#endif 233 } else if (L1_DATA_B_LENGTH != 0 && addr >= L1_DATA_B_START
230#if L1_DATA_B_LENGTH != 0 234 && addr + sizeof(tmp) <= L1_DATA_B_START + L1_DATA_B_LENGTH) {
231 if (addr + add >= L1_DATA_B_START 235 memcpy(&tmp, (const void *)(addr), sizeof(tmp));
232 && addr + add + sizeof(tmp) <= L1_DATA_B_START + L1_DATA_B_LENGTH) {
233 memcpy(&tmp, (const void *)(addr + add), sizeof(tmp));
234 copied = sizeof(tmp); 236 copied = sizeof(tmp);
235 } else 237
236#endif 238 } else if (addr >= FIXED_CODE_START
237 if (addr + add >= FIXED_CODE_START 239 && addr + sizeof(tmp) <= FIXED_CODE_END) {
238 && addr + add + sizeof(tmp) <= FIXED_CODE_END) { 240 memcpy(&tmp, (const void *)(addr), sizeof(tmp));
239 memcpy(&tmp, (const void *)(addr + add), sizeof(tmp));
240 copied = sizeof(tmp); 241 copied = sizeof(tmp);
242
241 } else 243 } else
242 copied = access_process_vm(child, addr + add, &tmp, 244 copied = access_process_vm(child, addr, &tmp,
243 sizeof(tmp), 0); 245 sizeof(tmp), 0);
246
244 pr_debug("ptrace: copied size %d [0x%08lx]\n", copied, tmp); 247 pr_debug("ptrace: copied size %d [0x%08lx]\n", copied, tmp);
245 if (copied != sizeof(tmp)) 248 if (copied != sizeof(tmp))
246 break; 249 break;
@@ -284,47 +287,43 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
284 287
285 /* when I and D space are separate, this will have to be fixed. */ 288 /* when I and D space are separate, this will have to be fixed. */
286 case PTRACE_POKEDATA: 289 case PTRACE_POKEDATA:
287 printk(KERN_NOTICE "ptrace: PTRACE_PEEKDATA\n"); 290 pr_debug("ptrace: PTRACE_PEEKDATA\n");
288 /* fall through */ 291 /* fall through */
289 case PTRACE_POKETEXT: /* write the word at location addr. */ 292 case PTRACE_POKETEXT: /* write the word at location addr. */
290 { 293 {
291 int copied; 294 int copied;
292 295
293 ret = -EIO; 296 ret = -EIO;
294 pr_debug("ptrace: POKETEXT at addr 0x%08lx + add %d %ld bytes %lx\n", 297 pr_debug("ptrace: POKETEXT at addr 0x%08lx + %ld bytes %lx\n",
295 addr, add, sizeof(data), data); 298 addr, sizeof(data), data);
296 if (is_user_addr_valid(child, addr + add, sizeof(data)) < 0) 299 if (is_user_addr_valid(child, addr, sizeof(data)) < 0)
297 break; 300 break;
298 pr_debug("ptrace: user address is valid\n"); 301 pr_debug("ptrace: user address is valid\n");
299 302
300#if L1_CODE_LENGTH != 0 303 if (L1_CODE_LENGTH != 0 && addr >= L1_CODE_START
301 if (addr + add >= L1_CODE_START 304 && addr + sizeof(data) <= L1_CODE_START + L1_CODE_LENGTH) {
302 && addr + add + sizeof(data) <= L1_CODE_START + L1_CODE_LENGTH) { 305 safe_dma_memcpy ((void *)(addr), &data, sizeof(data));
303 safe_dma_memcpy ((void *)(addr + add), &data, sizeof(data));
304 copied = sizeof(data); 306 copied = sizeof(data);
305 } else 307
306#endif 308 } else if (L1_DATA_A_LENGTH != 0 && addr >= L1_DATA_A_START
307#if L1_DATA_A_LENGTH != 0 309 && addr + sizeof(data) <= L1_DATA_A_START + L1_DATA_A_LENGTH) {
308 if (addr + add >= L1_DATA_A_START 310 memcpy((void *)(addr), &data, sizeof(data));
309 && addr + add + sizeof(data) <= L1_DATA_A_START + L1_DATA_A_LENGTH) {
310 memcpy((void *)(addr + add), &data, sizeof(data));
311 copied = sizeof(data); 311 copied = sizeof(data);
312 } else 312
313#endif 313 } else if (L1_DATA_B_LENGTH != 0 && addr >= L1_DATA_B_START
314#if L1_DATA_B_LENGTH != 0 314 && addr + sizeof(data) <= L1_DATA_B_START + L1_DATA_B_LENGTH) {
315 if (addr + add >= L1_DATA_B_START 315 memcpy((void *)(addr), &data, sizeof(data));
316 && addr + add + sizeof(data) <= L1_DATA_B_START + L1_DATA_B_LENGTH) {
317 memcpy((void *)(addr + add), &data, sizeof(data));
318 copied = sizeof(data); 316 copied = sizeof(data);
319 } else 317
320#endif 318 } else if (addr >= FIXED_CODE_START
321 if (addr + add >= FIXED_CODE_START 319 && addr + sizeof(data) <= FIXED_CODE_END) {
322 && addr + add + sizeof(data) <= FIXED_CODE_END) { 320 memcpy((void *)(addr), &data, sizeof(data));
323 memcpy((void *)(addr + add), &data, sizeof(data));
324 copied = sizeof(data); 321 copied = sizeof(data);
322
325 } else 323 } else
326 copied = access_process_vm(child, addr + add, &data, 324 copied = access_process_vm(child, addr, &data,
327 sizeof(data), 1); 325 sizeof(data), 1);
326
328 pr_debug("ptrace: copied size %d\n", copied); 327 pr_debug("ptrace: copied size %d\n", copied);
329 if (copied != sizeof(data)) 328 if (copied != sizeof(data))
330 break; 329 break;
@@ -351,29 +350,22 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
351 break; 350 break;
352 351
353 case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */ 352 case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
354 case PTRACE_CONT: 353 case PTRACE_CONT: /* restart after signal. */
355 { /* restart after signal. */ 354 pr_debug("ptrace: syscall/cont\n");
356 long tmp;
357 355
358 pr_debug("ptrace_cont\n"); 356 ret = -EIO;
359 357 if (!valid_signal(data))
360 ret = -EIO;
361 if (!valid_signal(data))
362 break;
363 if (request == PTRACE_SYSCALL)
364 set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
365 else
366 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
367
368 child->exit_code = data;
369 /* make sure the single step bit is not set. */
370 tmp = get_reg(child, PT_SYSCFG) & ~(TRACE_BITS);
371 put_reg(child, PT_SYSCFG, tmp);
372 pr_debug("before wake_up_process\n");
373 wake_up_process(child);
374 ret = 0;
375 break; 358 break;
376 } 359 if (request == PTRACE_SYSCALL)
360 set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
361 else
362 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
363 child->exit_code = data;
364 ptrace_disable(child);
365 pr_debug("ptrace: before wake_up_process\n");
366 wake_up_process(child);
367 ret = 0;
368 break;
377 369
378 /* 370 /*
379 * make the child exit. Best I can do is send it a sigkill. 371 * make the child exit. Best I can do is send it a sigkill.
@@ -381,55 +373,37 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
381 * exit. 373 * exit.
382 */ 374 */
383 case PTRACE_KILL: 375 case PTRACE_KILL:
384 { 376 ret = 0;
385 long tmp; 377 if (child->exit_state == EXIT_ZOMBIE) /* already dead */
386 ret = 0;
387 if (child->exit_state == EXIT_ZOMBIE) /* already dead */
388 break;
389 child->exit_code = SIGKILL;
390 /* make sure the single step bit is not set. */
391 tmp = get_reg(child, PT_SYSCFG) & ~(TRACE_BITS);
392 put_reg(child, PT_SYSCFG, tmp);
393 wake_up_process(child);
394 break; 378 break;
395 } 379 child->exit_code = SIGKILL;
396 380 ptrace_disable(child);
397 case PTRACE_SINGLESTEP: 381 wake_up_process(child);
398 { /* set the trap flag. */ 382 break;
399 long tmp;
400
401 pr_debug("single step\n");
402 ret = -EIO;
403 if (!valid_signal(data))
404 break;
405 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
406
407 tmp = get_reg(child, PT_SYSCFG) | (TRACE_BITS);
408 put_reg(child, PT_SYSCFG, tmp);
409 383
410 child->exit_code = data; 384 case PTRACE_SINGLESTEP: /* set the trap flag. */
411 /* give it a chance to run. */ 385 pr_debug("ptrace: single step\n");
412 wake_up_process(child); 386 ret = -EIO;
413 ret = 0; 387 if (!valid_signal(data))
414 break; 388 break;
415 } 389 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
390 ptrace_enable(child);
391 child->exit_code = data;
392 wake_up_process(child);
393 ret = 0;
394 break;
416 395
417 case PTRACE_GETREGS: 396 case PTRACE_GETREGS:
418 { 397 /* Get all gp regs from the child. */
419 398 ret = ptrace_getregs(child, datap);
420 /* Get all gp regs from the child. */ 399 break;
421 ret = ptrace_getregs(child, datap);
422 break;
423 }
424 400
425 case PTRACE_SETREGS: 401 case PTRACE_SETREGS:
426 { 402 printk(KERN_WARNING "ptrace: SETREGS: **** NOT IMPLEMENTED ***\n");
427 printk(KERN_NOTICE 403 /* Set all gp regs in the child. */
428 "ptrace: SETREGS: **** NOT IMPLEMENTED ***\n"); 404 ret = 0;
429 /* Set all gp regs in the child. */ 405 break;
430 ret = 0; 406
431 break;
432 }
433 default: 407 default:
434 ret = ptrace_request(child, request, addr, data); 408 ret = ptrace_request(child, request, addr, data);
435 break; 409 break;
@@ -440,7 +414,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
440 414
441asmlinkage void syscall_trace(void) 415asmlinkage void syscall_trace(void)
442{ 416{
443
444 if (!test_thread_flag(TIF_SYSCALL_TRACE)) 417 if (!test_thread_flag(TIF_SYSCALL_TRACE))
445 return; 418 return;
446 419
diff --git a/arch/blackfin/kernel/reboot.c b/arch/blackfin/kernel/reboot.c
index 367e2dc09881..ae97ca407b0d 100644
--- a/arch/blackfin/kernel/reboot.c
+++ b/arch/blackfin/kernel/reboot.c
@@ -10,6 +10,7 @@
10#include <asm/bfin-global.h> 10#include <asm/bfin-global.h>
11#include <asm/reboot.h> 11#include <asm/reboot.h>
12#include <asm/system.h> 12#include <asm/system.h>
13#include <asm/bfrom.h>
13 14
14/* A system soft reset makes external memory unusable so force 15/* A system soft reset makes external memory unusable so force
15 * this function into L1. We use the compiler ssync here rather 16 * this function into L1. We use the compiler ssync here rather
@@ -20,7 +21,7 @@
20 * the core reset. 21 * the core reset.
21 */ 22 */
22__attribute__((l1_text)) 23__attribute__((l1_text))
23void bfin_reset(void) 24static void bfin_reset(void)
24{ 25{
25 /* Wait for completion of "system" events such as cache line 26 /* Wait for completion of "system" events such as cache line
26 * line fills so that we avoid infinite stalls later on as 27 * line fills so that we avoid infinite stalls later on as
@@ -34,15 +35,15 @@ void bfin_reset(void)
34 bfin_write_SWRST(0x7); 35 bfin_write_SWRST(0x7);
35 36
36 /* Due to the way reset is handled in the hardware, we need 37 /* Due to the way reset is handled in the hardware, we need
37 * to delay for 7 SCLKS. The only reliable way to do this is 38 * to delay for 10 SCLKS. The only reliable way to do this is
38 * to calculate the CCLK/SCLK ratio and multiply 7. For now, 39 * to calculate the CCLK/SCLK ratio and multiply 10. For now,
39 * we'll assume worse case which is a 1:15 ratio. 40 * we'll assume worse case which is a 1:15 ratio.
40 */ 41 */
41 asm( 42 asm(
42 "LSETUP (1f, 1f) LC0 = %0\n" 43 "LSETUP (1f, 1f) LC0 = %0\n"
43 "1: nop;" 44 "1: nop;"
44 : 45 :
45 : "a" (15 * 7) 46 : "a" (15 * 10)
46 : "LC0", "LB0", "LT0" 47 : "LC0", "LB0", "LT0"
47 ); 48 );
48 49
@@ -74,7 +75,14 @@ void machine_restart(char *cmd)
74{ 75{
75 native_machine_restart(cmd); 76 native_machine_restart(cmd);
76 local_irq_disable(); 77 local_irq_disable();
77 bfin_reset(); 78 if (ANOMALY_05000353 || ANOMALY_05000386)
79 bfin_reset();
80 else
81 /* the bootrom checks to see how it was reset and will
82 * automatically perform a software reset for us when
83 * it starts executing boot
84 */
85 asm("raise 1;");
78} 86}
79 87
80__attribute__((weak)) 88__attribute__((weak))
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c
index 7a82d10b4ebf..7f35d1046cd8 100644
--- a/arch/blackfin/kernel/setup.c
+++ b/arch/blackfin/kernel/setup.c
@@ -42,6 +42,7 @@ EXPORT_SYMBOL(memory_start);
42EXPORT_SYMBOL(memory_end); 42EXPORT_SYMBOL(memory_end);
43EXPORT_SYMBOL(physical_mem_end); 43EXPORT_SYMBOL(physical_mem_end);
44EXPORT_SYMBOL(_ramend); 44EXPORT_SYMBOL(_ramend);
45EXPORT_SYMBOL(reserved_mem_dcache_on);
45 46
46#ifdef CONFIG_MTD_UCLINUX 47#ifdef CONFIG_MTD_UCLINUX
47unsigned long memory_mtd_end, memory_mtd_start, mtd_size; 48unsigned long memory_mtd_end, memory_mtd_start, mtd_size;
@@ -52,7 +53,8 @@ EXPORT_SYMBOL(mtd_size);
52#endif 53#endif
53 54
54char __initdata command_line[COMMAND_LINE_SIZE]; 55char __initdata command_line[COMMAND_LINE_SIZE];
55unsigned int __initdata *__retx; 56void __initdata *init_retx, *init_saved_retx, *init_saved_seqstat,
57 *init_saved_icplb_fault_addr, *init_saved_dcplb_fault_addr;
56 58
57/* boot memmap, for parsing "memmap=" */ 59/* boot memmap, for parsing "memmap=" */
58#define BFIN_MEMMAP_MAX 128 /* number of entries in bfin_memmap */ 60#define BFIN_MEMMAP_MAX 128 /* number of entries in bfin_memmap */
@@ -77,10 +79,10 @@ static struct change_member *change_point[2*BFIN_MEMMAP_MAX] __initdata;
77static struct bfin_memmap_entry *overlap_list[BFIN_MEMMAP_MAX] __initdata; 79static struct bfin_memmap_entry *overlap_list[BFIN_MEMMAP_MAX] __initdata;
78static struct bfin_memmap_entry new_map[BFIN_MEMMAP_MAX] __initdata; 80static struct bfin_memmap_entry new_map[BFIN_MEMMAP_MAX] __initdata;
79 81
80void __init bf53x_cache_init(void) 82void __init bfin_cache_init(void)
81{ 83{
82#if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE) 84#if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
83 generate_cpl_tables(); 85 generate_cplb_tables();
84#endif 86#endif
85 87
86#ifdef CONFIG_BFIN_ICACHE 88#ifdef CONFIG_BFIN_ICACHE
@@ -100,7 +102,7 @@ void __init bf53x_cache_init(void)
100#endif 102#endif
101} 103}
102 104
103void __init bf53x_relocate_l1_mem(void) 105void __init bfin_relocate_l1_mem(void)
104{ 106{
105 unsigned long l1_code_length; 107 unsigned long l1_code_length;
106 unsigned long l1_data_a_length; 108 unsigned long l1_data_a_length;
@@ -410,7 +412,7 @@ static __init void parse_cmdline_early(char *cmdline_p)
410 * [_rambase, _ramstart]: kernel image 412 * [_rambase, _ramstart]: kernel image
411 * [memory_start, memory_end]: dynamic memory managed by kernel 413 * [memory_start, memory_end]: dynamic memory managed by kernel
412 * [memory_end, _ramend]: reserved memory 414 * [memory_end, _ramend]: reserved memory
413 * [meory_mtd_start(memory_end), 415 * [memory_mtd_start(memory_end),
414 * memory_mtd_start + mtd_size]: rootfs (if any) 416 * memory_mtd_start + mtd_size]: rootfs (if any)
415 * [_ramend - DMA_UNCACHED_REGION, 417 * [_ramend - DMA_UNCACHED_REGION,
416 * _ramend]: uncached DMA region 418 * _ramend]: uncached DMA region
@@ -782,16 +784,25 @@ void __init setup_arch(char **cmdline_p)
782 784
783 _bfin_swrst = bfin_read_SWRST(); 785 _bfin_swrst = bfin_read_SWRST();
784 786
785 /* If we double fault, reset the system - otherwise we hang forever */ 787#ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT
786 bfin_write_SWRST(DOUBLE_FAULT); 788 bfin_write_SWRST(_bfin_swrst & ~DOUBLE_FAULT);
789#endif
790#ifdef CONFIG_DEBUG_DOUBLEFAULT_RESET
791 bfin_write_SWRST(_bfin_swrst | DOUBLE_FAULT);
792#endif
787 793
788 if (_bfin_swrst & RESET_DOUBLE) 794 if (_bfin_swrst & RESET_DOUBLE) {
789 /* 795 printk(KERN_EMERG "Recovering from DOUBLE FAULT event\n");
790 * don't decode the address, since you don't know if this 796#ifdef CONFIG_DEBUG_DOUBLEFAULT
791 * kernel's symbol map is the same as the crashing kernel 797 /* We assume the crashing kernel, and the current symbol table match */
792 */ 798 printk(KERN_EMERG " While handling exception (EXCAUSE = 0x%x) at %pF\n",
793 printk(KERN_INFO "Recovering from Double Fault event at %pF\n", __retx); 799 (int)init_saved_seqstat & SEQSTAT_EXCAUSE, init_saved_retx);
794 else if (_bfin_swrst & RESET_WDOG) 800 printk(KERN_NOTICE " DCPLB_FAULT_ADDR: %pF\n", init_saved_dcplb_fault_addr);
801 printk(KERN_NOTICE " ICPLB_FAULT_ADDR: %pF\n", init_saved_icplb_fault_addr);
802#endif
803 printk(KERN_NOTICE " The instruction at %pF caused a double exception\n",
804 init_retx);
805 } else if (_bfin_swrst & RESET_WDOG)
795 printk(KERN_INFO "Recovering from Watchdog event\n"); 806 printk(KERN_INFO "Recovering from Watchdog event\n");
796 else if (_bfin_swrst & RESET_SOFTWARE) 807 else if (_bfin_swrst & RESET_SOFTWARE)
797 printk(KERN_NOTICE "Reset caused by Software reset\n"); 808 printk(KERN_NOTICE "Reset caused by Software reset\n");
@@ -803,17 +814,24 @@ void __init setup_arch(char **cmdline_p)
803 printk(KERN_INFO "Compiled for ADSP-%s Rev none\n", CPU); 814 printk(KERN_INFO "Compiled for ADSP-%s Rev none\n", CPU);
804 else 815 else
805 printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid()); 816 printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid());
806 if (bfin_revid() != bfin_compiled_revid()) { 817
807 if (bfin_compiled_revid() == -1) 818 if (unlikely(CPUID != bfin_cpuid()))
808 printk(KERN_ERR "Warning: Compiled for Rev none, but running on Rev %d\n", 819 printk(KERN_ERR "ERROR: Not running on ADSP-%s: unknown CPUID 0x%04x Rev 0.%d\n",
809 bfin_revid()); 820 CPU, bfin_cpuid(), bfin_revid());
810 else if (bfin_compiled_revid() != 0xffff) 821 else {
811 printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n", 822 if (bfin_revid() != bfin_compiled_revid()) {
812 bfin_compiled_revid(), bfin_revid()); 823 if (bfin_compiled_revid() == -1)
824 printk(KERN_ERR "Warning: Compiled for Rev none, but running on Rev %d\n",
825 bfin_revid());
826 else if (bfin_compiled_revid() != 0xffff)
827 printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n",
828 bfin_compiled_revid(), bfin_revid());
829 }
830 if (bfin_revid() <= CONFIG_BF_REV_MIN || bfin_revid() > CONFIG_BF_REV_MAX)
831 printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n",
832 CPU, bfin_revid());
813 } 833 }
814 if (bfin_revid() < SUPPORTED_REVID) 834
815 printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n",
816 CPU, bfin_revid());
817 printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n"); 835 printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
818 836
819 printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n", 837 printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
@@ -850,7 +868,7 @@ void __init setup_arch(char **cmdline_p)
850 != SAFE_USER_INSTRUCTION - FIXED_CODE_START); 868 != SAFE_USER_INSTRUCTION - FIXED_CODE_START);
851 869
852 init_exception_vectors(); 870 init_exception_vectors();
853 bf53x_cache_init(); 871 bfin_cache_init();
854} 872}
855 873
856static int __init topology_init(void) 874static int __init topology_init(void)
@@ -986,13 +1004,18 @@ static int show_cpuinfo(struct seq_file *m, void *v)
986 } 1004 }
987 1005
988 seq_printf(m, "processor\t: %d\n" 1006 seq_printf(m, "processor\t: %d\n"
989 "vendor_id\t: %s\n" 1007 "vendor_id\t: %s\n",
990 "cpu family\t: 0x%x\n" 1008 *(unsigned int *)v,
991 "model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK) (%s)\n" 1009 vendor);
1010
1011 if (CPUID == bfin_cpuid())
1012 seq_printf(m, "cpu family\t: 0x%04x\n", CPUID);
1013 else
1014 seq_printf(m, "cpu family\t: Compiled for:0x%04x, running on:0x%04x\n",
1015 CPUID, bfin_cpuid());
1016
1017 seq_printf(m, "model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK) (%s)\n"
992 "stepping\t: %d\n", 1018 "stepping\t: %d\n",
993 0,
994 vendor,
995 (bfin_read_CHIPID() & CHIPID_FAMILY),
996 cpu, cclk/1000000, sclk/1000000, 1019 cpu, cclk/1000000, sclk/1000000,
997#ifdef CONFIG_MPU 1020#ifdef CONFIG_MPU
998 "mpu on", 1021 "mpu on",
@@ -1038,7 +1061,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
1038 if ((bfin_read_DMEM_CONTROL() & (ENDCPLB | DMC_ENABLE)) != (ENDCPLB | DMC_ENABLE)) 1061 if ((bfin_read_DMEM_CONTROL() & (ENDCPLB | DMC_ENABLE)) != (ENDCPLB | DMC_ENABLE))
1039 dcache_size = 0; 1062 dcache_size = 0;
1040 1063
1041 if ((bfin_read_IMEM_CONTROL() & (IMC | ENICPLB)) == (IMC | ENICPLB)) 1064 if ((bfin_read_IMEM_CONTROL() & (IMC | ENICPLB)) != (IMC | ENICPLB))
1042 icache_size = 0; 1065 icache_size = 0;
1043 1066
1044 seq_printf(m, "cache size\t: %d KB(L1 icache) " 1067 seq_printf(m, "cache size\t: %d KB(L1 icache) "
@@ -1127,12 +1150,18 @@ static int show_cpuinfo(struct seq_file *m, void *v)
1127 1150
1128static void *c_start(struct seq_file *m, loff_t *pos) 1151static void *c_start(struct seq_file *m, loff_t *pos)
1129{ 1152{
1130 return *pos < NR_CPUS ? ((void *)0x12345678) : NULL; 1153 if (*pos == 0)
1154 *pos = first_cpu(cpu_online_map);
1155 if (*pos >= num_online_cpus())
1156 return NULL;
1157
1158 return pos;
1131} 1159}
1132 1160
1133static void *c_next(struct seq_file *m, void *v, loff_t *pos) 1161static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1134{ 1162{
1135 ++*pos; 1163 *pos = next_cpu(*pos, cpu_online_map);
1164
1136 return c_start(m, pos); 1165 return c_start(m, pos);
1137} 1166}
1138 1167
diff --git a/arch/blackfin/kernel/traps.c b/arch/blackfin/kernel/traps.c
index 9a9d5083acfd..1aa2c788e228 100644
--- a/arch/blackfin/kernel/traps.c
+++ b/arch/blackfin/kernel/traps.c
@@ -34,20 +34,19 @@
34#include <linux/fs.h> 34#include <linux/fs.h>
35#include <asm/traps.h> 35#include <asm/traps.h>
36#include <asm/cacheflush.h> 36#include <asm/cacheflush.h>
37#include <asm/cplb.h>
37#include <asm/blackfin.h> 38#include <asm/blackfin.h>
38#include <asm/irq_handler.h> 39#include <asm/irq_handler.h>
39#include <linux/irq.h> 40#include <linux/irq.h>
40#include <asm/trace.h> 41#include <asm/trace.h>
41#include <asm/fixed_code.h> 42#include <asm/fixed_code.h>
42#include <asm/dma.h>
43 43
44#ifdef CONFIG_KGDB 44#ifdef CONFIG_KGDB
45# include <linux/debugger.h>
46# include <linux/kgdb.h> 45# include <linux/kgdb.h>
47 46
48# define CHK_DEBUGGER_TRAP() \ 47# define CHK_DEBUGGER_TRAP() \
49 do { \ 48 do { \
50 CHK_DEBUGGER(trapnr, sig, info.si_code, fp, ); \ 49 kgdb_handle_exception(trapnr, sig, info.si_code, fp); \
51 } while (0) 50 } while (0)
52# define CHK_DEBUGGER_TRAP_MAYBE() \ 51# define CHK_DEBUGGER_TRAP_MAYBE() \
53 do { \ 52 do { \
@@ -59,6 +58,15 @@
59# define CHK_DEBUGGER_TRAP_MAYBE() do { } while (0) 58# define CHK_DEBUGGER_TRAP_MAYBE() do { } while (0)
60#endif 59#endif
61 60
61
62#ifdef CONFIG_VERBOSE_DEBUG
63#define verbose_printk(fmt, arg...) \
64 printk(fmt, ##arg)
65#else
66#define verbose_printk(fmt, arg...) \
67 ({ if (0) printk(fmt, ##arg); 0; })
68#endif
69
62/* Initiate the event table handler */ 70/* Initiate the event table handler */
63void __init trap_init(void) 71void __init trap_init(void)
64{ 72{
@@ -67,10 +75,19 @@ void __init trap_init(void)
67 CSYNC(); 75 CSYNC();
68} 76}
69 77
70unsigned long saved_icplb_fault_addr, saved_dcplb_fault_addr; 78/*
79 * Used to save the RETX, SEQSTAT, I/D CPLB FAULT ADDR
80 * values across the transition from exception to IRQ5.
81 * We put these in L1, so they are going to be in a valid
82 * location during exception context
83 */
84__attribute__((l1_data))
85unsigned long saved_retx, saved_seqstat,
86 saved_icplb_fault_addr, saved_dcplb_fault_addr;
71 87
72static void decode_address(char *buf, unsigned long address) 88static void decode_address(char *buf, unsigned long address)
73{ 89{
90#ifdef CONFIG_DEBUG_VERBOSE
74 struct vm_list_struct *vml; 91 struct vm_list_struct *vml;
75 struct task_struct *p; 92 struct task_struct *p;
76 struct mm_struct *mm; 93 struct mm_struct *mm;
@@ -178,16 +195,39 @@ static void decode_address(char *buf, unsigned long address)
178 195
179done: 196done:
180 write_unlock_irqrestore(&tasklist_lock, flags); 197 write_unlock_irqrestore(&tasklist_lock, flags);
198#else
199 sprintf(buf, " ");
200#endif
181} 201}
182 202
183asmlinkage void double_fault_c(struct pt_regs *fp) 203asmlinkage void double_fault_c(struct pt_regs *fp)
184{ 204{
185 console_verbose(); 205 console_verbose();
186 oops_in_progress = 1; 206 oops_in_progress = 1;
207#ifdef CONFIG_DEBUG_VERBOSE
187 printk(KERN_EMERG "\n" KERN_EMERG "Double Fault\n"); 208 printk(KERN_EMERG "\n" KERN_EMERG "Double Fault\n");
188 dump_bfin_process(fp); 209#ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT
189 dump_bfin_mem(fp); 210 if (((long)fp->seqstat & SEQSTAT_EXCAUSE) == VEC_UNCOV) {
190 show_regs(fp); 211 char buf[150];
212 decode_address(buf, saved_retx);
213 printk(KERN_EMERG "While handling exception (EXCAUSE = 0x%x) at %s:\n",
214 (int)saved_seqstat & SEQSTAT_EXCAUSE, buf);
215 decode_address(buf, saved_dcplb_fault_addr);
216 printk(KERN_NOTICE " DCPLB_FAULT_ADDR: %s\n", buf);
217 decode_address(buf, saved_icplb_fault_addr);
218 printk(KERN_NOTICE " ICPLB_FAULT_ADDR: %s\n", buf);
219
220 decode_address(buf, fp->retx);
221 printk(KERN_NOTICE "The instruction at %s caused a double exception\n",
222 buf);
223 } else
224#endif
225 {
226 dump_bfin_process(fp);
227 dump_bfin_mem(fp);
228 show_regs(fp);
229 }
230#endif
191 panic("Double Fault - unrecoverable event\n"); 231 panic("Double Fault - unrecoverable event\n");
192 232
193} 233}
@@ -259,34 +299,42 @@ asmlinkage void trap_c(struct pt_regs *fp)
259 return; 299 return;
260 else 300 else
261 break; 301 break;
302 /* 0x03 - User Defined, userspace stack overflow */
303 case VEC_EXCPT03:
304 info.si_code = SEGV_STACKFLOW;
305 sig = SIGSEGV;
306 verbose_printk(KERN_NOTICE EXC_0x03(KERN_NOTICE));
307 CHK_DEBUGGER_TRAP_MAYBE();
308 break;
309 /* 0x02 - KGDB initial connection and break signal trap */
310 case VEC_EXCPT02:
262#ifdef CONFIG_KGDB 311#ifdef CONFIG_KGDB
263 case VEC_EXCPT02 : /* gdb connection */
264 info.si_code = TRAP_ILLTRAP; 312 info.si_code = TRAP_ILLTRAP;
265 sig = SIGTRAP; 313 sig = SIGTRAP;
266 CHK_DEBUGGER_TRAP(); 314 CHK_DEBUGGER_TRAP();
267 return; 315 return;
268#else
269 /* 0x02 - User Defined, Caught by default */
270#endif 316#endif
271 /* 0x03 - User Defined, userspace stack overflow */ 317 /* 0x04 - User Defined */
272 case VEC_EXCPT03: 318 /* 0x05 - User Defined */
273 info.si_code = SEGV_STACKFLOW; 319 /* 0x06 - User Defined */
274 sig = SIGSEGV; 320 /* 0x07 - User Defined */
275 printk(KERN_NOTICE EXC_0x03(KERN_NOTICE)); 321 /* 0x08 - User Defined */
276 CHK_DEBUGGER_TRAP(); 322 /* 0x09 - User Defined */
323 /* 0x0A - User Defined */
324 /* 0x0B - User Defined */
325 /* 0x0C - User Defined */
326 /* 0x0D - User Defined */
327 /* 0x0E - User Defined */
328 /* 0x0F - User Defined */
329 /* If we got here, it is most likely that someone was trying to use a
330 * custom exception handler, and it is not actually installed properly
331 */
332 case VEC_EXCPT04 ... VEC_EXCPT15:
333 info.si_code = ILL_ILLPARAOP;
334 sig = SIGILL;
335 verbose_printk(KERN_NOTICE EXC_0x04(KERN_NOTICE));
336 CHK_DEBUGGER_TRAP_MAYBE();
277 break; 337 break;
278 /* 0x04 - User Defined, Caught by default */
279 /* 0x05 - User Defined, Caught by default */
280 /* 0x06 - User Defined, Caught by default */
281 /* 0x07 - User Defined, Caught by default */
282 /* 0x08 - User Defined, Caught by default */
283 /* 0x09 - User Defined, Caught by default */
284 /* 0x0A - User Defined, Caught by default */
285 /* 0x0B - User Defined, Caught by default */
286 /* 0x0C - User Defined, Caught by default */
287 /* 0x0D - User Defined, Caught by default */
288 /* 0x0E - User Defined, Caught by default */
289 /* 0x0F - User Defined, Caught by default */
290 /* 0x10 HW Single step, handled here */ 338 /* 0x10 HW Single step, handled here */
291 case VEC_STEP: 339 case VEC_STEP:
292 info.si_code = TRAP_STEP; 340 info.si_code = TRAP_STEP;
@@ -301,8 +349,8 @@ asmlinkage void trap_c(struct pt_regs *fp)
301 case VEC_OVFLOW: 349 case VEC_OVFLOW:
302 info.si_code = TRAP_TRACEFLOW; 350 info.si_code = TRAP_TRACEFLOW;
303 sig = SIGTRAP; 351 sig = SIGTRAP;
304 printk(KERN_NOTICE EXC_0x11(KERN_NOTICE)); 352 verbose_printk(KERN_NOTICE EXC_0x11(KERN_NOTICE));
305 CHK_DEBUGGER_TRAP(); 353 CHK_DEBUGGER_TRAP_MAYBE();
306 break; 354 break;
307 /* 0x12 - Reserved, Caught by default */ 355 /* 0x12 - Reserved, Caught by default */
308 /* 0x13 - Reserved, Caught by default */ 356 /* 0x13 - Reserved, Caught by default */
@@ -323,44 +371,43 @@ asmlinkage void trap_c(struct pt_regs *fp)
323 case VEC_UNDEF_I: 371 case VEC_UNDEF_I:
324 info.si_code = ILL_ILLOPC; 372 info.si_code = ILL_ILLOPC;
325 sig = SIGILL; 373 sig = SIGILL;
326 printk(KERN_NOTICE EXC_0x21(KERN_NOTICE)); 374 verbose_printk(KERN_NOTICE EXC_0x21(KERN_NOTICE));
327 CHK_DEBUGGER_TRAP(); 375 CHK_DEBUGGER_TRAP_MAYBE();
328 break; 376 break;
329 /* 0x22 - Illegal Instruction Combination, handled here */ 377 /* 0x22 - Illegal Instruction Combination, handled here */
330 case VEC_ILGAL_I: 378 case VEC_ILGAL_I:
331 info.si_code = ILL_ILLPARAOP; 379 info.si_code = ILL_ILLPARAOP;
332 sig = SIGILL; 380 sig = SIGILL;
333 printk(KERN_NOTICE EXC_0x22(KERN_NOTICE)); 381 verbose_printk(KERN_NOTICE EXC_0x22(KERN_NOTICE));
334 CHK_DEBUGGER_TRAP(); 382 CHK_DEBUGGER_TRAP_MAYBE();
335 break; 383 break;
336 /* 0x23 - Data CPLB protection violation, handled here */ 384 /* 0x23 - Data CPLB protection violation, handled here */
337 case VEC_CPLB_VL: 385 case VEC_CPLB_VL:
338 info.si_code = ILL_CPLB_VI; 386 info.si_code = ILL_CPLB_VI;
339 sig = SIGBUS; 387 sig = SIGBUS;
340 printk(KERN_NOTICE EXC_0x23(KERN_NOTICE)); 388 verbose_printk(KERN_NOTICE EXC_0x23(KERN_NOTICE));
341 CHK_DEBUGGER_TRAP(); 389 CHK_DEBUGGER_TRAP_MAYBE();
342 break; 390 break;
343 /* 0x24 - Data access misaligned, handled here */ 391 /* 0x24 - Data access misaligned, handled here */
344 case VEC_MISALI_D: 392 case VEC_MISALI_D:
345 info.si_code = BUS_ADRALN; 393 info.si_code = BUS_ADRALN;
346 sig = SIGBUS; 394 sig = SIGBUS;
347 printk(KERN_NOTICE EXC_0x24(KERN_NOTICE)); 395 verbose_printk(KERN_NOTICE EXC_0x24(KERN_NOTICE));
348 CHK_DEBUGGER_TRAP(); 396 CHK_DEBUGGER_TRAP_MAYBE();
349 break; 397 break;
350 /* 0x25 - Unrecoverable Event, handled here */ 398 /* 0x25 - Unrecoverable Event, handled here */
351 case VEC_UNCOV: 399 case VEC_UNCOV:
352 info.si_code = ILL_ILLEXCPT; 400 info.si_code = ILL_ILLEXCPT;
353 sig = SIGILL; 401 sig = SIGILL;
354 printk(KERN_NOTICE EXC_0x25(KERN_NOTICE)); 402 verbose_printk(KERN_NOTICE EXC_0x25(KERN_NOTICE));
355 CHK_DEBUGGER_TRAP(); 403 CHK_DEBUGGER_TRAP_MAYBE();
356 break; 404 break;
357 /* 0x26 - Data CPLB Miss, normal case is handled in _cplb_hdr, 405 /* 0x26 - Data CPLB Miss, normal case is handled in _cplb_hdr,
358 error case is handled here */ 406 error case is handled here */
359 case VEC_CPLB_M: 407 case VEC_CPLB_M:
360 info.si_code = BUS_ADRALN; 408 info.si_code = BUS_ADRALN;
361 sig = SIGBUS; 409 sig = SIGBUS;
362 printk(KERN_NOTICE EXC_0x26(KERN_NOTICE)); 410 verbose_printk(KERN_NOTICE EXC_0x26(KERN_NOTICE));
363 CHK_DEBUGGER_TRAP();
364 break; 411 break;
365 /* 0x27 - Data CPLB Multiple Hits - Linux Trap Zero, handled here */ 412 /* 0x27 - Data CPLB Multiple Hits - Linux Trap Zero, handled here */
366 case VEC_CPLB_MHIT: 413 case VEC_CPLB_MHIT:
@@ -368,11 +415,11 @@ asmlinkage void trap_c(struct pt_regs *fp)
368 sig = SIGSEGV; 415 sig = SIGSEGV;
369#ifdef CONFIG_DEBUG_HUNT_FOR_ZERO 416#ifdef CONFIG_DEBUG_HUNT_FOR_ZERO
370 if (saved_dcplb_fault_addr < FIXED_CODE_START) 417 if (saved_dcplb_fault_addr < FIXED_CODE_START)
371 printk(KERN_NOTICE "NULL pointer access\n"); 418 verbose_printk(KERN_NOTICE "NULL pointer access\n");
372 else 419 else
373#endif 420#endif
374 printk(KERN_NOTICE EXC_0x27(KERN_NOTICE)); 421 verbose_printk(KERN_NOTICE EXC_0x27(KERN_NOTICE));
375 CHK_DEBUGGER_TRAP(); 422 CHK_DEBUGGER_TRAP_MAYBE();
376 break; 423 break;
377 /* 0x28 - Emulation Watchpoint, handled here */ 424 /* 0x28 - Emulation Watchpoint, handled here */
378 case VEC_WATCH: 425 case VEC_WATCH:
@@ -390,8 +437,8 @@ asmlinkage void trap_c(struct pt_regs *fp)
390 case VEC_ISTRU_VL: /* ADSP-BF535 only (MH) */ 437 case VEC_ISTRU_VL: /* ADSP-BF535 only (MH) */
391 info.si_code = BUS_OPFETCH; 438 info.si_code = BUS_OPFETCH;
392 sig = SIGBUS; 439 sig = SIGBUS;
393 printk(KERN_NOTICE "BF535: VEC_ISTRU_VL\n"); 440 verbose_printk(KERN_NOTICE "BF535: VEC_ISTRU_VL\n");
394 CHK_DEBUGGER_TRAP(); 441 CHK_DEBUGGER_TRAP_MAYBE();
395 break; 442 break;
396#else 443#else
397 /* 0x29 - Reserved, Caught by default */ 444 /* 0x29 - Reserved, Caught by default */
@@ -400,22 +447,21 @@ asmlinkage void trap_c(struct pt_regs *fp)
400 case VEC_MISALI_I: 447 case VEC_MISALI_I:
401 info.si_code = BUS_ADRALN; 448 info.si_code = BUS_ADRALN;
402 sig = SIGBUS; 449 sig = SIGBUS;
403 printk(KERN_NOTICE EXC_0x2A(KERN_NOTICE)); 450 verbose_printk(KERN_NOTICE EXC_0x2A(KERN_NOTICE));
404 CHK_DEBUGGER_TRAP(); 451 CHK_DEBUGGER_TRAP_MAYBE();
405 break; 452 break;
406 /* 0x2B - Instruction CPLB protection violation, handled here */ 453 /* 0x2B - Instruction CPLB protection violation, handled here */
407 case VEC_CPLB_I_VL: 454 case VEC_CPLB_I_VL:
408 info.si_code = ILL_CPLB_VI; 455 info.si_code = ILL_CPLB_VI;
409 sig = SIGBUS; 456 sig = SIGBUS;
410 printk(KERN_NOTICE EXC_0x2B(KERN_NOTICE)); 457 verbose_printk(KERN_NOTICE EXC_0x2B(KERN_NOTICE));
411 CHK_DEBUGGER_TRAP(); 458 CHK_DEBUGGER_TRAP_MAYBE();
412 break; 459 break;
413 /* 0x2C - Instruction CPLB miss, handled in _cplb_hdr */ 460 /* 0x2C - Instruction CPLB miss, handled in _cplb_hdr */
414 case VEC_CPLB_I_M: 461 case VEC_CPLB_I_M:
415 info.si_code = ILL_CPLB_MISS; 462 info.si_code = ILL_CPLB_MISS;
416 sig = SIGBUS; 463 sig = SIGBUS;
417 printk(KERN_NOTICE EXC_0x2C(KERN_NOTICE)); 464 verbose_printk(KERN_NOTICE EXC_0x2C(KERN_NOTICE));
418 CHK_DEBUGGER_TRAP();
419 break; 465 break;
420 /* 0x2D - Instruction CPLB Multiple Hits, handled here */ 466 /* 0x2D - Instruction CPLB Multiple Hits, handled here */
421 case VEC_CPLB_I_MHIT: 467 case VEC_CPLB_I_MHIT:
@@ -423,18 +469,18 @@ asmlinkage void trap_c(struct pt_regs *fp)
423 sig = SIGSEGV; 469 sig = SIGSEGV;
424#ifdef CONFIG_DEBUG_HUNT_FOR_ZERO 470#ifdef CONFIG_DEBUG_HUNT_FOR_ZERO
425 if (saved_icplb_fault_addr < FIXED_CODE_START) 471 if (saved_icplb_fault_addr < FIXED_CODE_START)
426 printk(KERN_NOTICE "Jump to NULL address\n"); 472 verbose_printk(KERN_NOTICE "Jump to NULL address\n");
427 else 473 else
428#endif 474#endif
429 printk(KERN_NOTICE EXC_0x2D(KERN_NOTICE)); 475 verbose_printk(KERN_NOTICE EXC_0x2D(KERN_NOTICE));
430 CHK_DEBUGGER_TRAP(); 476 CHK_DEBUGGER_TRAP_MAYBE();
431 break; 477 break;
432 /* 0x2E - Illegal use of Supervisor Resource, handled here */ 478 /* 0x2E - Illegal use of Supervisor Resource, handled here */
433 case VEC_ILL_RES: 479 case VEC_ILL_RES:
434 info.si_code = ILL_PRVOPC; 480 info.si_code = ILL_PRVOPC;
435 sig = SIGILL; 481 sig = SIGILL;
436 printk(KERN_NOTICE EXC_0x2E(KERN_NOTICE)); 482 verbose_printk(KERN_NOTICE EXC_0x2E(KERN_NOTICE));
437 CHK_DEBUGGER_TRAP(); 483 CHK_DEBUGGER_TRAP_MAYBE();
438 break; 484 break;
439 /* 0x2F - Reserved, Caught by default */ 485 /* 0x2F - Reserved, Caught by default */
440 /* 0x30 - Reserved, Caught by default */ 486 /* 0x30 - Reserved, Caught by default */
@@ -461,17 +507,17 @@ asmlinkage void trap_c(struct pt_regs *fp)
461 case (SEQSTAT_HWERRCAUSE_SYSTEM_MMR): 507 case (SEQSTAT_HWERRCAUSE_SYSTEM_MMR):
462 info.si_code = BUS_ADRALN; 508 info.si_code = BUS_ADRALN;
463 sig = SIGBUS; 509 sig = SIGBUS;
464 printk(KERN_NOTICE HWC_x2(KERN_NOTICE)); 510 verbose_printk(KERN_NOTICE HWC_x2(KERN_NOTICE));
465 break; 511 break;
466 /* External Memory Addressing Error */ 512 /* External Memory Addressing Error */
467 case (SEQSTAT_HWERRCAUSE_EXTERN_ADDR): 513 case (SEQSTAT_HWERRCAUSE_EXTERN_ADDR):
468 info.si_code = BUS_ADRERR; 514 info.si_code = BUS_ADRERR;
469 sig = SIGBUS; 515 sig = SIGBUS;
470 printk(KERN_NOTICE HWC_x3(KERN_NOTICE)); 516 verbose_printk(KERN_NOTICE HWC_x3(KERN_NOTICE));
471 break; 517 break;
472 /* Performance Monitor Overflow */ 518 /* Performance Monitor Overflow */
473 case (SEQSTAT_HWERRCAUSE_PERF_FLOW): 519 case (SEQSTAT_HWERRCAUSE_PERF_FLOW):
474 printk(KERN_NOTICE HWC_x12(KERN_NOTICE)); 520 verbose_printk(KERN_NOTICE HWC_x12(KERN_NOTICE));
475 break; 521 break;
476 /* RAISE 5 instruction */ 522 /* RAISE 5 instruction */
477 case (SEQSTAT_HWERRCAUSE_RAISE_5): 523 case (SEQSTAT_HWERRCAUSE_RAISE_5):
@@ -481,21 +527,25 @@ asmlinkage void trap_c(struct pt_regs *fp)
481 printk(KERN_NOTICE HWC_default(KERN_NOTICE)); 527 printk(KERN_NOTICE HWC_default(KERN_NOTICE));
482 break; 528 break;
483 } 529 }
484 CHK_DEBUGGER_TRAP(); 530 CHK_DEBUGGER_TRAP_MAYBE();
485 break; 531 break;
532 /*
533 * We should be handling all known exception types above,
534 * if we get here we hit a reserved one, so panic
535 */
486 default: 536 default:
487 info.si_code = TRAP_ILLTRAP; 537 oops_in_progress = 1;
488 sig = SIGTRAP; 538 info.si_code = ILL_ILLPARAOP;
489 printk(KERN_EMERG "Caught Unhandled Exception, code = %08lx\n", 539 sig = SIGILL;
540 verbose_printk(KERN_EMERG "Caught Unhandled Exception, code = %08lx\n",
490 (fp->seqstat & SEQSTAT_EXCAUSE)); 541 (fp->seqstat & SEQSTAT_EXCAUSE));
491 CHK_DEBUGGER_TRAP(); 542 CHK_DEBUGGER_TRAP_MAYBE();
492 break; 543 break;
493 } 544 }
494 545
495 BUG_ON(sig == 0); 546 BUG_ON(sig == 0);
496 547
497 if (sig != SIGTRAP) { 548 if (sig != SIGTRAP) {
498 unsigned long *stack;
499 dump_bfin_process(fp); 549 dump_bfin_process(fp);
500 dump_bfin_mem(fp); 550 dump_bfin_mem(fp);
501 show_regs(fp); 551 show_regs(fp);
@@ -503,7 +553,7 @@ asmlinkage void trap_c(struct pt_regs *fp)
503 /* Print out the trace buffer if it makes sense */ 553 /* Print out the trace buffer if it makes sense */
504#ifndef CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE 554#ifndef CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE
505 if (trapnr == VEC_CPLB_I_M || trapnr == VEC_CPLB_M) 555 if (trapnr == VEC_CPLB_I_M || trapnr == VEC_CPLB_M)
506 printk(KERN_NOTICE "No trace since you do not have " 556 verbose_printk(KERN_NOTICE "No trace since you do not have "
507 "CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE enabled\n" 557 "CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE enabled\n"
508 KERN_NOTICE "\n"); 558 KERN_NOTICE "\n");
509 else 559 else
@@ -512,20 +562,22 @@ asmlinkage void trap_c(struct pt_regs *fp)
512 562
513 if (oops_in_progress) { 563 if (oops_in_progress) {
514 /* Dump the current kernel stack */ 564 /* Dump the current kernel stack */
515 printk(KERN_NOTICE "\n" KERN_NOTICE "Kernel Stack\n"); 565 verbose_printk(KERN_NOTICE "\n" KERN_NOTICE "Kernel Stack\n");
516 show_stack(current, NULL); 566 show_stack(current, NULL);
517
518 print_modules(); 567 print_modules();
519#ifndef CONFIG_ACCESS_CHECK 568#ifndef CONFIG_ACCESS_CHECK
520 printk(KERN_EMERG "Please turn on " 569 verbose_printk(KERN_EMERG "Please turn on "
521 "CONFIG_ACCESS_CHECK\n"); 570 "CONFIG_ACCESS_CHECK\n");
522#endif 571#endif
523 panic("Kernel exception"); 572 panic("Kernel exception");
524 } else { 573 } else {
574#ifdef CONFIG_VERBOSE_DEBUG
575 unsigned long *stack;
525 /* Dump the user space stack */ 576 /* Dump the user space stack */
526 stack = (unsigned long *)rdusp(); 577 stack = (unsigned long *)rdusp();
527 printk(KERN_NOTICE "Userspace Stack\n"); 578 verbose_printk(KERN_NOTICE "Userspace Stack\n");
528 show_stack(NULL, stack); 579 show_stack(NULL, stack);
580#endif
529 } 581 }
530 } 582 }
531 583
@@ -546,7 +598,7 @@ asmlinkage void trap_c(struct pt_regs *fp)
546 * Similar to get_user, do some address checking, then dereference 598 * Similar to get_user, do some address checking, then dereference
547 * Return true on sucess, false on bad address 599 * Return true on sucess, false on bad address
548 */ 600 */
549bool get_instruction(unsigned short *val, unsigned short *address) 601static bool get_instruction(unsigned short *val, unsigned short *address)
550{ 602{
551 603
552 unsigned long addr; 604 unsigned long addr;
@@ -592,7 +644,7 @@ bool get_instruction(unsigned short *val, unsigned short *address)
592 644
593#if L1_CODE_LENGTH != 0 645#if L1_CODE_LENGTH != 0
594 if (addr >= L1_CODE_START && (addr + 2) <= (L1_CODE_START + L1_CODE_LENGTH)) { 646 if (addr >= L1_CODE_START && (addr + 2) <= (L1_CODE_START + L1_CODE_LENGTH)) {
595 dma_memcpy(val, address, 2); 647 isram_memcpy(val, address, 2);
596 return true; 648 return true;
597 } 649 }
598#endif 650#endif
@@ -607,45 +659,48 @@ bool get_instruction(unsigned short *val, unsigned short *address)
607 * These are the normal instructions which cause change of flow, which 659 * These are the normal instructions which cause change of flow, which
608 * would be at the source of the trace buffer 660 * would be at the source of the trace buffer
609 */ 661 */
610void decode_instruction(unsigned short *address) 662#ifdef CONFIG_DEBUG_VERBOSE
663static void decode_instruction(unsigned short *address)
611{ 664{
612 unsigned short opcode; 665 unsigned short opcode;
613 666
614 if (get_instruction(&opcode, address)) { 667 if (get_instruction(&opcode, address)) {
615 if (opcode == 0x0010) 668 if (opcode == 0x0010)
616 printk("RTS"); 669 verbose_printk("RTS");
617 else if (opcode == 0x0011) 670 else if (opcode == 0x0011)
618 printk("RTI"); 671 verbose_printk("RTI");
619 else if (opcode == 0x0012) 672 else if (opcode == 0x0012)
620 printk("RTX"); 673 verbose_printk("RTX");
621 else if (opcode >= 0x0050 && opcode <= 0x0057) 674 else if (opcode >= 0x0050 && opcode <= 0x0057)
622 printk("JUMP (P%i)", opcode & 7); 675 verbose_printk("JUMP (P%i)", opcode & 7);
623 else if (opcode >= 0x0060 && opcode <= 0x0067) 676 else if (opcode >= 0x0060 && opcode <= 0x0067)
624 printk("CALL (P%i)", opcode & 7); 677 verbose_printk("CALL (P%i)", opcode & 7);
625 else if (opcode >= 0x0070 && opcode <= 0x0077) 678 else if (opcode >= 0x0070 && opcode <= 0x0077)
626 printk("CALL (PC+P%i)", opcode & 7); 679 verbose_printk("CALL (PC+P%i)", opcode & 7);
627 else if (opcode >= 0x0080 && opcode <= 0x0087) 680 else if (opcode >= 0x0080 && opcode <= 0x0087)
628 printk("JUMP (PC+P%i)", opcode & 7); 681 verbose_printk("JUMP (PC+P%i)", opcode & 7);
629 else if ((opcode >= 0x1000 && opcode <= 0x13FF) || (opcode >= 0x1800 && opcode <= 0x1BFF)) 682 else if ((opcode >= 0x1000 && opcode <= 0x13FF) || (opcode >= 0x1800 && opcode <= 0x1BFF))
630 printk("IF !CC JUMP"); 683 verbose_printk("IF !CC JUMP");
631 else if ((opcode >= 0x1400 && opcode <= 0x17ff) || (opcode >= 0x1c00 && opcode <= 0x1fff)) 684 else if ((opcode >= 0x1400 && opcode <= 0x17ff) || (opcode >= 0x1c00 && opcode <= 0x1fff))
632 printk("IF CC JUMP"); 685 verbose_printk("IF CC JUMP");
633 else if (opcode >= 0x2000 && opcode <= 0x2fff) 686 else if (opcode >= 0x2000 && opcode <= 0x2fff)
634 printk("JUMP.S"); 687 verbose_printk("JUMP.S");
635 else if (opcode >= 0xe080 && opcode <= 0xe0ff) 688 else if (opcode >= 0xe080 && opcode <= 0xe0ff)
636 printk("LSETUP"); 689 verbose_printk("LSETUP");
637 else if (opcode >= 0xe200 && opcode <= 0xe2ff) 690 else if (opcode >= 0xe200 && opcode <= 0xe2ff)
638 printk("JUMP.L"); 691 verbose_printk("JUMP.L");
639 else if (opcode >= 0xe300 && opcode <= 0xe3ff) 692 else if (opcode >= 0xe300 && opcode <= 0xe3ff)
640 printk("CALL pcrel"); 693 verbose_printk("CALL pcrel");
641 else 694 else
642 printk("0x%04x", opcode); 695 verbose_printk("0x%04x", opcode);
643 } 696 }
644 697
645} 698}
699#endif
646 700
647void dump_bfin_trace_buffer(void) 701void dump_bfin_trace_buffer(void)
648{ 702{
703#ifdef CONFIG_DEBUG_VERBOSE
649#ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON 704#ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON
650 int tflags, i = 0; 705 int tflags, i = 0;
651 char buf[150]; 706 char buf[150];
@@ -701,6 +756,7 @@ void dump_bfin_trace_buffer(void)
701 756
702 trace_buffer_restore(tflags); 757 trace_buffer_restore(tflags);
703#endif 758#endif
759#endif
704} 760}
705EXPORT_SYMBOL(dump_bfin_trace_buffer); 761EXPORT_SYMBOL(dump_bfin_trace_buffer);
706 762
@@ -708,7 +764,7 @@ EXPORT_SYMBOL(dump_bfin_trace_buffer);
708 * Checks to see if the address pointed to is either a 764 * Checks to see if the address pointed to is either a
709 * 16-bit CALL instruction, or a 32-bit CALL instruction 765 * 16-bit CALL instruction, or a 32-bit CALL instruction
710 */ 766 */
711bool is_bfin_call(unsigned short *addr) 767static bool is_bfin_call(unsigned short *addr)
712{ 768{
713 unsigned short opcode = 0, *ins_addr; 769 unsigned short opcode = 0, *ins_addr;
714 ins_addr = (unsigned short *)addr; 770 ins_addr = (unsigned short *)addr;
@@ -730,8 +786,10 @@ bool is_bfin_call(unsigned short *addr)
730 return false; 786 return false;
731 787
732} 788}
789
733void show_stack(struct task_struct *task, unsigned long *stack) 790void show_stack(struct task_struct *task, unsigned long *stack)
734{ 791{
792#ifdef CONFIG_PRINTK
735 unsigned int *addr, *endstack, *fp = 0, *frame; 793 unsigned int *addr, *endstack, *fp = 0, *frame;
736 unsigned short *ins_addr; 794 unsigned short *ins_addr;
737 char buf[150]; 795 char buf[150];
@@ -756,8 +814,10 @@ void show_stack(struct task_struct *task, unsigned long *stack)
756 } else 814 } else
757 endstack = (unsigned int *)PAGE_ALIGN((unsigned int)stack); 815 endstack = (unsigned int *)PAGE_ALIGN((unsigned int)stack);
758 816
817 printk(KERN_NOTICE "Stack info:\n");
759 decode_address(buf, (unsigned int)stack); 818 decode_address(buf, (unsigned int)stack);
760 printk(KERN_NOTICE "Stack info:\n" KERN_NOTICE " SP: [0x%p] %s\n", stack, buf); 819 printk(KERN_NOTICE " SP: [0x%p] %s\n", stack, buf);
820
761 addr = (unsigned int *)((unsigned int)stack & ~0x3F); 821 addr = (unsigned int *)((unsigned int)stack & ~0x3F);
762 822
763 /* First thing is to look for a frame pointer */ 823 /* First thing is to look for a frame pointer */
@@ -848,7 +908,7 @@ void show_stack(struct task_struct *task, unsigned long *stack)
848 if (!j) 908 if (!j)
849 printk("\n"); 909 printk("\n");
850 } 910 }
851 911#endif
852} 912}
853 913
854void dump_stack(void) 914void dump_stack(void)
@@ -866,38 +926,39 @@ EXPORT_SYMBOL(dump_stack);
866 926
867void dump_bfin_process(struct pt_regs *fp) 927void dump_bfin_process(struct pt_regs *fp)
868{ 928{
929#ifdef CONFIG_DEBUG_VERBOSE
869 /* We should be able to look at fp->ipend, but we don't push it on the 930 /* We should be able to look at fp->ipend, but we don't push it on the
870 * stack all the time, so do this until we fix that */ 931 * stack all the time, so do this until we fix that */
871 unsigned int context = bfin_read_IPEND(); 932 unsigned int context = bfin_read_IPEND();
872 933
873 if (oops_in_progress) 934 if (oops_in_progress)
874 printk(KERN_EMERG "Kernel OOPS in progress\n"); 935 verbose_printk(KERN_EMERG "Kernel OOPS in progress\n");
875 936
876 if (context & 0x0020 && (fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR) 937 if (context & 0x0020 && (fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR)
877 printk(KERN_NOTICE "HW Error context\n"); 938 verbose_printk(KERN_NOTICE "HW Error context\n");
878 else if (context & 0x0020) 939 else if (context & 0x0020)
879 printk(KERN_NOTICE "Deferred Exception context\n"); 940 verbose_printk(KERN_NOTICE "Deferred Exception context\n");
880 else if (context & 0x3FC0) 941 else if (context & 0x3FC0)
881 printk(KERN_NOTICE "Interrupt context\n"); 942 verbose_printk(KERN_NOTICE "Interrupt context\n");
882 else if (context & 0x4000) 943 else if (context & 0x4000)
883 printk(KERN_NOTICE "Deferred Interrupt context\n"); 944 verbose_printk(KERN_NOTICE "Deferred Interrupt context\n");
884 else if (context & 0x8000) 945 else if (context & 0x8000)
885 printk(KERN_NOTICE "Kernel process context\n"); 946 verbose_printk(KERN_NOTICE "Kernel process context\n");
886 947
887 /* Because we are crashing, and pointers could be bad, we check things 948 /* Because we are crashing, and pointers could be bad, we check things
888 * pretty closely before we use them 949 * pretty closely before we use them
889 */ 950 */
890 if ((unsigned long)current >= FIXED_CODE_START && 951 if ((unsigned long)current >= FIXED_CODE_START &&
891 !((unsigned long)current & 0x3) && current->pid) { 952 !((unsigned long)current & 0x3) && current->pid) {
892 printk(KERN_NOTICE "CURRENT PROCESS:\n"); 953 verbose_printk(KERN_NOTICE "CURRENT PROCESS:\n");
893 if (current->comm >= (char *)FIXED_CODE_START) 954 if (current->comm >= (char *)FIXED_CODE_START)
894 printk(KERN_NOTICE "COMM=%s PID=%d\n", 955 verbose_printk(KERN_NOTICE "COMM=%s PID=%d\n",
895 current->comm, current->pid); 956 current->comm, current->pid);
896 else 957 else
897 printk(KERN_NOTICE "COMM= invalid\n"); 958 verbose_printk(KERN_NOTICE "COMM= invalid\n");
898 959
899 if (!((unsigned long)current->mm & 0x3) && (unsigned long)current->mm >= FIXED_CODE_START) 960 if (!((unsigned long)current->mm & 0x3) && (unsigned long)current->mm >= FIXED_CODE_START)
900 printk(KERN_NOTICE "TEXT = 0x%p-0x%p DATA = 0x%p-0x%p\n" 961 verbose_printk(KERN_NOTICE "TEXT = 0x%p-0x%p DATA = 0x%p-0x%p\n"
901 KERN_NOTICE " BSS = 0x%p-0x%p USER-STACK = 0x%p\n" 962 KERN_NOTICE " BSS = 0x%p-0x%p USER-STACK = 0x%p\n"
902 KERN_NOTICE "\n", 963 KERN_NOTICE "\n",
903 (void *)current->mm->start_code, 964 (void *)current->mm->start_code,
@@ -908,38 +969,40 @@ void dump_bfin_process(struct pt_regs *fp)
908 (void *)current->mm->brk, 969 (void *)current->mm->brk,
909 (void *)current->mm->start_stack); 970 (void *)current->mm->start_stack);
910 else 971 else
911 printk(KERN_NOTICE "invalid mm\n"); 972 verbose_printk(KERN_NOTICE "invalid mm\n");
912 } else 973 } else
913 printk(KERN_NOTICE "\n" KERN_NOTICE 974 verbose_printk(KERN_NOTICE "\n" KERN_NOTICE
914 "No Valid process in current context\n"); 975 "No Valid process in current context\n");
976#endif
915} 977}
916 978
917void dump_bfin_mem(struct pt_regs *fp) 979void dump_bfin_mem(struct pt_regs *fp)
918{ 980{
981#ifdef CONFIG_DEBUG_VERBOSE
919 unsigned short *addr, *erraddr, val = 0, err = 0; 982 unsigned short *addr, *erraddr, val = 0, err = 0;
920 char sti = 0, buf[6]; 983 char sti = 0, buf[6];
921 984
922 erraddr = (void *)fp->pc; 985 erraddr = (void *)fp->pc;
923 986
924 printk(KERN_NOTICE "return address: [0x%p]; contents of:", erraddr); 987 verbose_printk(KERN_NOTICE "return address: [0x%p]; contents of:", erraddr);
925 988
926 for (addr = (unsigned short *)((unsigned long)erraddr & ~0xF) - 0x10; 989 for (addr = (unsigned short *)((unsigned long)erraddr & ~0xF) - 0x10;
927 addr < (unsigned short *)((unsigned long)erraddr & ~0xF) + 0x10; 990 addr < (unsigned short *)((unsigned long)erraddr & ~0xF) + 0x10;
928 addr++) { 991 addr++) {
929 if (!((unsigned long)addr & 0xF)) 992 if (!((unsigned long)addr & 0xF))
930 printk("\n" KERN_NOTICE "0x%p: ", addr); 993 verbose_printk("\n" KERN_NOTICE "0x%p: ", addr);
931 994
932 if (get_instruction(&val, addr)) { 995 if (!get_instruction(&val, addr)) {
933 val = 0; 996 val = 0;
934 sprintf(buf, "????"); 997 sprintf(buf, "????");
935 } else 998 } else
936 sprintf(buf, "%04x", val); 999 sprintf(buf, "%04x", val);
937 1000
938 if (addr == erraddr) { 1001 if (addr == erraddr) {
939 printk("[%s]", buf); 1002 verbose_printk("[%s]", buf);
940 err = val; 1003 err = val;
941 } else 1004 } else
942 printk(" %s ", buf); 1005 verbose_printk(" %s ", buf);
943 1006
944 /* Do any previous instructions turn on interrupts? */ 1007 /* Do any previous instructions turn on interrupts? */
945 if (addr <= erraddr && /* in the past */ 1008 if (addr <= erraddr && /* in the past */
@@ -948,14 +1011,14 @@ void dump_bfin_mem(struct pt_regs *fp)
948 sti = 1; 1011 sti = 1;
949 } 1012 }
950 1013
951 printk("\n"); 1014 verbose_printk("\n");
952 1015
953 /* Hardware error interrupts can be deferred */ 1016 /* Hardware error interrupts can be deferred */
954 if (unlikely(sti && (fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR && 1017 if (unlikely(sti && (fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR &&
955 oops_in_progress)){ 1018 oops_in_progress)){
956 printk(KERN_NOTICE "Looks like this was a deferred error - sorry\n"); 1019 verbose_printk(KERN_NOTICE "Looks like this was a deferred error - sorry\n");
957#ifndef CONFIG_DEBUG_HWERR 1020#ifndef CONFIG_DEBUG_HWERR
958 printk(KERN_NOTICE "The remaining message may be meaningless\n" 1021 verbose_printk(KERN_NOTICE "The remaining message may be meaningless\n"
959 KERN_NOTICE "You should enable CONFIG_DEBUG_HWERR to get a" 1022 KERN_NOTICE "You should enable CONFIG_DEBUG_HWERR to get a"
960 " better idea where it came from\n"); 1023 " better idea where it came from\n");
961#else 1024#else
@@ -969,34 +1032,47 @@ void dump_bfin_mem(struct pt_regs *fp)
969 /* And the last RETI points to the current userspace context */ 1032 /* And the last RETI points to the current userspace context */
970 if ((fp + 1)->pc >= current->mm->start_code && 1033 if ((fp + 1)->pc >= current->mm->start_code &&
971 (fp + 1)->pc <= current->mm->end_code) { 1034 (fp + 1)->pc <= current->mm->end_code) {
972 printk(KERN_NOTICE "It might be better to look around here : \n"); 1035 verbose_printk(KERN_NOTICE "It might be better to look around here : \n");
973 printk(KERN_NOTICE "-------------------------------------------\n"); 1036 verbose_printk(KERN_NOTICE "-------------------------------------------\n");
974 show_regs(fp + 1); 1037 show_regs(fp + 1);
975 printk(KERN_NOTICE "-------------------------------------------\n"); 1038 verbose_printk(KERN_NOTICE "-------------------------------------------\n");
976 } 1039 }
977 } 1040 }
978#endif 1041#endif
979 } 1042 }
1043#endif
980} 1044}
981 1045
982void show_regs(struct pt_regs *fp) 1046void show_regs(struct pt_regs *fp)
983{ 1047{
1048#ifdef CONFIG_DEBUG_VERBOSE
984 char buf [150]; 1049 char buf [150];
985 struct irqaction *action; 1050 struct irqaction *action;
986 unsigned int i; 1051 unsigned int i;
987 unsigned long flags; 1052 unsigned long flags;
988 1053
989 printk(KERN_NOTICE "\n" KERN_NOTICE "SEQUENCER STATUS:\t\t%s\n", print_tainted()); 1054 verbose_printk(KERN_NOTICE "\n" KERN_NOTICE "SEQUENCER STATUS:\t\t%s\n", print_tainted());
990 printk(KERN_NOTICE " SEQSTAT: %08lx IPEND: %04lx SYSCFG: %04lx\n", 1055 verbose_printk(KERN_NOTICE " SEQSTAT: %08lx IPEND: %04lx SYSCFG: %04lx\n",
991 (long)fp->seqstat, fp->ipend, fp->syscfg); 1056 (long)fp->seqstat, fp->ipend, fp->syscfg);
992 printk(KERN_NOTICE " HWERRCAUSE: 0x%lx\n", 1057 if ((fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR) {
993 (fp->seqstat & SEQSTAT_HWERRCAUSE) >> 14); 1058 verbose_printk(KERN_NOTICE " HWERRCAUSE: 0x%lx\n",
994 printk(KERN_NOTICE " EXCAUSE : 0x%lx\n", 1059 (fp->seqstat & SEQSTAT_HWERRCAUSE) >> 14);
1060#ifdef EBIU_ERRMST
1061 /* If the error was from the EBIU, print it out */
1062 if (bfin_read_EBIU_ERRMST() & CORE_ERROR) {
1063 verbose_printk(KERN_NOTICE " EBIU Error Reason : 0x%04x\n",
1064 bfin_read_EBIU_ERRMST());
1065 verbose_printk(KERN_NOTICE " EBIU Error Address : 0x%08x\n",
1066 bfin_read_EBIU_ERRADD());
1067 }
1068#endif
1069 }
1070 verbose_printk(KERN_NOTICE " EXCAUSE : 0x%lx\n",
995 fp->seqstat & SEQSTAT_EXCAUSE); 1071 fp->seqstat & SEQSTAT_EXCAUSE);
996 for (i = 6; i <= 15 ; i++) { 1072 for (i = 6; i <= 15 ; i++) {
997 if (fp->ipend & (1 << i)) { 1073 if (fp->ipend & (1 << i)) {
998 decode_address(buf, bfin_read32(EVT0 + 4*i)); 1074 decode_address(buf, bfin_read32(EVT0 + 4*i));
999 printk(KERN_NOTICE " physical IVG%i asserted : %s\n", i, buf); 1075 verbose_printk(KERN_NOTICE " physical IVG%i asserted : %s\n", i, buf);
1000 } 1076 }
1001 } 1077 }
1002 1078
@@ -1009,64 +1085,65 @@ void show_regs(struct pt_regs *fp)
1009 goto unlock; 1085 goto unlock;
1010 1086
1011 decode_address(buf, (unsigned int)action->handler); 1087 decode_address(buf, (unsigned int)action->handler);
1012 printk(KERN_NOTICE " logical irq %3d mapped : %s", i, buf); 1088 verbose_printk(KERN_NOTICE " logical irq %3d mapped : %s", i, buf);
1013 for (action = action->next; action; action = action->next) { 1089 for (action = action->next; action; action = action->next) {
1014 decode_address(buf, (unsigned int)action->handler); 1090 decode_address(buf, (unsigned int)action->handler);
1015 printk(", %s", buf); 1091 verbose_printk(", %s", buf);
1016 } 1092 }
1017 printk("\n"); 1093 verbose_printk("\n");
1018unlock: 1094unlock:
1019 spin_unlock_irqrestore(&irq_desc[i].lock, flags); 1095 spin_unlock_irqrestore(&irq_desc[i].lock, flags);
1020 } 1096 }
1021 } 1097 }
1022 1098
1023 decode_address(buf, fp->rete); 1099 decode_address(buf, fp->rete);
1024 printk(KERN_NOTICE " RETE: %s\n", buf); 1100 verbose_printk(KERN_NOTICE " RETE: %s\n", buf);
1025 decode_address(buf, fp->retn); 1101 decode_address(buf, fp->retn);
1026 printk(KERN_NOTICE " RETN: %s\n", buf); 1102 verbose_printk(KERN_NOTICE " RETN: %s\n", buf);
1027 decode_address(buf, fp->retx); 1103 decode_address(buf, fp->retx);
1028 printk(KERN_NOTICE " RETX: %s\n", buf); 1104 verbose_printk(KERN_NOTICE " RETX: %s\n", buf);
1029 decode_address(buf, fp->rets); 1105 decode_address(buf, fp->rets);
1030 printk(KERN_NOTICE " RETS: %s\n", buf); 1106 verbose_printk(KERN_NOTICE " RETS: %s\n", buf);
1031 decode_address(buf, fp->pc); 1107 decode_address(buf, fp->pc);
1032 printk(KERN_NOTICE " PC : %s\n", buf); 1108 verbose_printk(KERN_NOTICE " PC : %s\n", buf);
1033 1109
1034 if (((long)fp->seqstat & SEQSTAT_EXCAUSE) && 1110 if (((long)fp->seqstat & SEQSTAT_EXCAUSE) &&
1035 (((long)fp->seqstat & SEQSTAT_EXCAUSE) != VEC_HWERR)) { 1111 (((long)fp->seqstat & SEQSTAT_EXCAUSE) != VEC_HWERR)) {
1036 decode_address(buf, saved_dcplb_fault_addr); 1112 decode_address(buf, saved_dcplb_fault_addr);
1037 printk(KERN_NOTICE "DCPLB_FAULT_ADDR: %s\n", buf); 1113 verbose_printk(KERN_NOTICE "DCPLB_FAULT_ADDR: %s\n", buf);
1038 decode_address(buf, saved_icplb_fault_addr); 1114 decode_address(buf, saved_icplb_fault_addr);
1039 printk(KERN_NOTICE "ICPLB_FAULT_ADDR: %s\n", buf); 1115 verbose_printk(KERN_NOTICE "ICPLB_FAULT_ADDR: %s\n", buf);
1040 } 1116 }
1041 1117
1042 printk(KERN_NOTICE "\n" KERN_NOTICE "PROCESSOR STATE:\n"); 1118 verbose_printk(KERN_NOTICE "\n" KERN_NOTICE "PROCESSOR STATE:\n");
1043 printk(KERN_NOTICE " R0 : %08lx R1 : %08lx R2 : %08lx R3 : %08lx\n", 1119 verbose_printk(KERN_NOTICE " R0 : %08lx R1 : %08lx R2 : %08lx R3 : %08lx\n",
1044 fp->r0, fp->r1, fp->r2, fp->r3); 1120 fp->r0, fp->r1, fp->r2, fp->r3);
1045 printk(KERN_NOTICE " R4 : %08lx R5 : %08lx R6 : %08lx R7 : %08lx\n", 1121 verbose_printk(KERN_NOTICE " R4 : %08lx R5 : %08lx R6 : %08lx R7 : %08lx\n",
1046 fp->r4, fp->r5, fp->r6, fp->r7); 1122 fp->r4, fp->r5, fp->r6, fp->r7);
1047 printk(KERN_NOTICE " P0 : %08lx P1 : %08lx P2 : %08lx P3 : %08lx\n", 1123 verbose_printk(KERN_NOTICE " P0 : %08lx P1 : %08lx P2 : %08lx P3 : %08lx\n",
1048 fp->p0, fp->p1, fp->p2, fp->p3); 1124 fp->p0, fp->p1, fp->p2, fp->p3);
1049 printk(KERN_NOTICE " P4 : %08lx P5 : %08lx FP : %08lx SP : %08lx\n", 1125 verbose_printk(KERN_NOTICE " P4 : %08lx P5 : %08lx FP : %08lx SP : %08lx\n",
1050 fp->p4, fp->p5, fp->fp, (long)fp); 1126 fp->p4, fp->p5, fp->fp, (long)fp);
1051 printk(KERN_NOTICE " LB0: %08lx LT0: %08lx LC0: %08lx\n", 1127 verbose_printk(KERN_NOTICE " LB0: %08lx LT0: %08lx LC0: %08lx\n",
1052 fp->lb0, fp->lt0, fp->lc0); 1128 fp->lb0, fp->lt0, fp->lc0);
1053 printk(KERN_NOTICE " LB1: %08lx LT1: %08lx LC1: %08lx\n", 1129 verbose_printk(KERN_NOTICE " LB1: %08lx LT1: %08lx LC1: %08lx\n",
1054 fp->lb1, fp->lt1, fp->lc1); 1130 fp->lb1, fp->lt1, fp->lc1);
1055 printk(KERN_NOTICE " B0 : %08lx L0 : %08lx M0 : %08lx I0 : %08lx\n", 1131 verbose_printk(KERN_NOTICE " B0 : %08lx L0 : %08lx M0 : %08lx I0 : %08lx\n",
1056 fp->b0, fp->l0, fp->m0, fp->i0); 1132 fp->b0, fp->l0, fp->m0, fp->i0);
1057 printk(KERN_NOTICE " B1 : %08lx L1 : %08lx M1 : %08lx I1 : %08lx\n", 1133 verbose_printk(KERN_NOTICE " B1 : %08lx L1 : %08lx M1 : %08lx I1 : %08lx\n",
1058 fp->b1, fp->l1, fp->m1, fp->i1); 1134 fp->b1, fp->l1, fp->m1, fp->i1);
1059 printk(KERN_NOTICE " B2 : %08lx L2 : %08lx M2 : %08lx I2 : %08lx\n", 1135 verbose_printk(KERN_NOTICE " B2 : %08lx L2 : %08lx M2 : %08lx I2 : %08lx\n",
1060 fp->b2, fp->l2, fp->m2, fp->i2); 1136 fp->b2, fp->l2, fp->m2, fp->i2);
1061 printk(KERN_NOTICE " B3 : %08lx L3 : %08lx M3 : %08lx I3 : %08lx\n", 1137 verbose_printk(KERN_NOTICE " B3 : %08lx L3 : %08lx M3 : %08lx I3 : %08lx\n",
1062 fp->b3, fp->l3, fp->m3, fp->i3); 1138 fp->b3, fp->l3, fp->m3, fp->i3);
1063 printk(KERN_NOTICE "A0.w: %08lx A0.x: %08lx A1.w: %08lx A1.x: %08lx\n", 1139 verbose_printk(KERN_NOTICE "A0.w: %08lx A0.x: %08lx A1.w: %08lx A1.x: %08lx\n",
1064 fp->a0w, fp->a0x, fp->a1w, fp->a1x); 1140 fp->a0w, fp->a0x, fp->a1w, fp->a1x);
1065 1141
1066 printk(KERN_NOTICE "USP : %08lx ASTAT: %08lx\n", 1142 verbose_printk(KERN_NOTICE "USP : %08lx ASTAT: %08lx\n",
1067 rdusp(), fp->astat); 1143 rdusp(), fp->astat);
1068 1144
1069 printk(KERN_NOTICE "\n"); 1145 verbose_printk(KERN_NOTICE "\n");
1146#endif
1070} 1147}
1071 1148
1072#ifdef CONFIG_SYS_BFIN_SPINLOCK_L1 1149#ifdef CONFIG_SYS_BFIN_SPINLOCK_L1
diff --git a/arch/blackfin/mach-bf527/boards/Kconfig b/arch/blackfin/mach-bf527/boards/Kconfig
index 8bf9e58f0148..df224d04e167 100644
--- a/arch/blackfin/mach-bf527/boards/Kconfig
+++ b/arch/blackfin/mach-bf527/boards/Kconfig
@@ -14,4 +14,9 @@ config BFIN527_BLUETECHNIX_CM
14 help 14 help
15 CM-BF527 support for EVAL- and DEV-Board. 15 CM-BF527 support for EVAL- and DEV-Board.
16 16
17config BFIN526_EZBRD
18 bool "BF526-EZBRD"
19 help
20 BF526-EZBRD/EZKIT Lite board support.
21
17endchoice 22endchoice
diff --git a/arch/blackfin/mach-bf527/boards/Makefile b/arch/blackfin/mach-bf527/boards/Makefile
index 7ba7d256bbb8..eb6ed3362f9f 100644
--- a/arch/blackfin/mach-bf527/boards/Makefile
+++ b/arch/blackfin/mach-bf527/boards/Makefile
@@ -4,3 +4,4 @@
4 4
5obj-$(CONFIG_BFIN527_EZKIT) += ezkit.o 5obj-$(CONFIG_BFIN527_EZKIT) += ezkit.o
6obj-$(CONFIG_BFIN527_BLUETECHNIX_CM) += cm_bf527.o 6obj-$(CONFIG_BFIN527_BLUETECHNIX_CM) += cm_bf527.o
7obj-$(CONFIG_BFIN526_EZBRD) += ezbrd.o
diff --git a/arch/blackfin/mach-bf527/boards/cm_bf527.c b/arch/blackfin/mach-bf527/boards/cm_bf527.c
index d22bc7773717..9ea440bbb13d 100644
--- a/arch/blackfin/mach-bf527/boards/cm_bf527.c
+++ b/arch/blackfin/mach-bf527/boards/cm_bf527.c
@@ -43,10 +43,7 @@
43#include <linux/irq.h> 43#include <linux/irq.h>
44#include <linux/interrupt.h> 44#include <linux/interrupt.h>
45#include <linux/usb/sl811.h> 45#include <linux/usb/sl811.h>
46#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
47#include <linux/usb/musb.h> 46#include <linux/usb/musb.h>
48#endif
49#include <asm/cplb.h>
50#include <asm/dma.h> 47#include <asm/dma.h>
51#include <asm/bfin5xx_spi.h> 48#include <asm/bfin5xx_spi.h>
52#include <asm/reboot.h> 49#include <asm/reboot.h>
@@ -130,6 +127,16 @@ static struct resource musb_resources[] = {
130 }, 127 },
131}; 128};
132 129
130static struct musb_hdrc_config musb_config = {
131 .multipoint = 0,
132 .dyn_fifo = 0,
133 .soft_con = 1,
134 .dma = 1,
135 .num_eps = 7,
136 .dma_channels = 7,
137 .gpio_vrsel = GPIO_PF11,
138};
139
133static struct musb_hdrc_platform_data musb_plat = { 140static struct musb_hdrc_platform_data musb_plat = {
134#if defined(CONFIG_USB_MUSB_OTG) 141#if defined(CONFIG_USB_MUSB_OTG)
135 .mode = MUSB_OTG, 142 .mode = MUSB_OTG,
@@ -138,7 +145,7 @@ static struct musb_hdrc_platform_data musb_plat = {
138#elif defined(CONFIG_USB_GADGET_MUSB_HDRC) 145#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
139 .mode = MUSB_PERIPHERAL, 146 .mode = MUSB_PERIPHERAL,
140#endif 147#endif
141 .multipoint = 0, 148 .config = &musb_config,
142}; 149};
143 150
144static u64 musb_dmamask = ~(u32)0; 151static u64 musb_dmamask = ~(u32)0;
@@ -201,7 +208,7 @@ static struct mtd_partition partition_info[] = {
201 { 208 {
202 .name = "linux kernel(nand)", 209 .name = "linux kernel(nand)",
203 .offset = 0, 210 .offset = 0,
204 .size = 4 * SIZE_1M, 211 .size = 4 * 1024 * 1024,
205 }, 212 },
206 { 213 {
207 .name = "file system(nand)", 214 .name = "file system(nand)",
diff --git a/arch/blackfin/mach-bf527/boards/ezbrd.c b/arch/blackfin/mach-bf527/boards/ezbrd.c
new file mode 100644
index 000000000000..36c87b6fbdec
--- /dev/null
+++ b/arch/blackfin/mach-bf527/boards/ezbrd.c
@@ -0,0 +1,734 @@
1/*
2 * File: arch/blackfin/mach-bf527/boards/ezbrd.c
3 * Based on: arch/blackfin/mach-bf537/boards/stamp.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created:
7 * Description:
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2008 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31#include <linux/device.h>
32#include <linux/platform_device.h>
33#include <linux/mtd/mtd.h>
34#include <linux/mtd/partitions.h>
35#include <linux/mtd/physmap.h>
36#include <linux/spi/spi.h>
37#include <linux/spi/flash.h>
38
39#include <linux/i2c.h>
40#include <linux/irq.h>
41#include <linux/interrupt.h>
42#include <linux/usb/musb.h>
43#include <asm/dma.h>
44#include <asm/bfin5xx_spi.h>
45#include <asm/reboot.h>
46#include <asm/nand.h>
47#include <asm/portmux.h>
48#include <asm/dpmc.h>
49#include <linux/spi/ad7877.h>
50
51/*
52 * Name the Board for the /proc/cpuinfo
53 */
54const char bfin_board_name[] = "BF526-EZBRD";
55
56/*
57 * Driver needs to know address, irq and flag pin.
58 */
59
60#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
61static struct resource musb_resources[] = {
62 [0] = {
63 .start = 0xffc03800,
64 .end = 0xffc03cff,
65 .flags = IORESOURCE_MEM,
66 },
67 [1] = { /* general IRQ */
68 .start = IRQ_USB_INT0,
69 .end = IRQ_USB_INT0,
70 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
71 },
72 [2] = { /* DMA IRQ */
73 .start = IRQ_USB_DMA,
74 .end = IRQ_USB_DMA,
75 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
76 },
77};
78
79static struct musb_hdrc_config musb_config = {
80 .multipoint = 0,
81 .dyn_fifo = 0,
82 .soft_con = 1,
83 .dma = 1,
84 .num_eps = 7,
85 .dma_channels = 7,
86 .gpio_vrsel = GPIO_PG13,
87};
88
89static struct musb_hdrc_platform_data musb_plat = {
90#if defined(CONFIG_USB_MUSB_OTG)
91 .mode = MUSB_OTG,
92#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
93 .mode = MUSB_HOST,
94#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
95 .mode = MUSB_PERIPHERAL,
96#endif
97 .config = &musb_config,
98};
99
100static u64 musb_dmamask = ~(u32)0;
101
102static struct platform_device musb_device = {
103 .name = "musb_hdrc",
104 .id = 0,
105 .dev = {
106 .dma_mask = &musb_dmamask,
107 .coherent_dma_mask = 0xffffffff,
108 .platform_data = &musb_plat,
109 },
110 .num_resources = ARRAY_SIZE(musb_resources),
111 .resource = musb_resources,
112};
113#endif
114
115#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
116static struct mtd_partition ezbrd_partitions[] = {
117 {
118 .name = "bootloader(nor)",
119 .size = 0x40000,
120 .offset = 0,
121 }, {
122 .name = "linux kernel(nor)",
123 .size = 0x1C0000,
124 .offset = MTDPART_OFS_APPEND,
125 }, {
126 .name = "file system(nor)",
127 .size = MTDPART_SIZ_FULL,
128 .offset = MTDPART_OFS_APPEND,
129 }
130};
131
132static struct physmap_flash_data ezbrd_flash_data = {
133 .width = 2,
134 .parts = ezbrd_partitions,
135 .nr_parts = ARRAY_SIZE(ezbrd_partitions),
136};
137
138static struct resource ezbrd_flash_resource = {
139 .start = 0x20000000,
140 .end = 0x203fffff,
141 .flags = IORESOURCE_MEM,
142};
143
144static struct platform_device ezbrd_flash_device = {
145 .name = "physmap-flash",
146 .id = 0,
147 .dev = {
148 .platform_data = &ezbrd_flash_data,
149 },
150 .num_resources = 1,
151 .resource = &ezbrd_flash_resource,
152};
153#endif
154
155#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
156static struct mtd_partition partition_info[] = {
157 {
158 .name = "linux kernel(nand)",
159 .offset = 0,
160 .size = 4 * 1024 * 1024,
161 },
162 {
163 .name = "file system(nand)",
164 .offset = MTDPART_OFS_APPEND,
165 .size = MTDPART_SIZ_FULL,
166 },
167};
168
169static struct bf5xx_nand_platform bf5xx_nand_platform = {
170 .page_size = NFC_PG_SIZE_256,
171 .data_width = NFC_NWIDTH_8,
172 .partitions = partition_info,
173 .nr_partitions = ARRAY_SIZE(partition_info),
174 .rd_dly = 3,
175 .wr_dly = 3,
176};
177
178static struct resource bf5xx_nand_resources[] = {
179 {
180 .start = NFC_CTL,
181 .end = NFC_DATA_RD + 2,
182 .flags = IORESOURCE_MEM,
183 },
184 {
185 .start = CH_NFC,
186 .end = CH_NFC,
187 .flags = IORESOURCE_IRQ,
188 },
189};
190
191static struct platform_device bf5xx_nand_device = {
192 .name = "bf5xx-nand",
193 .id = 0,
194 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
195 .resource = bf5xx_nand_resources,
196 .dev = {
197 .platform_data = &bf5xx_nand_platform,
198 },
199};
200#endif
201
202#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
203static struct platform_device rtc_device = {
204 .name = "rtc-bfin",
205 .id = -1,
206};
207#endif
208
209
210#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
211static struct platform_device bfin_mac_device = {
212 .name = "bfin_mac",
213};
214#endif
215
216#if defined(CONFIG_MTD_M25P80) \
217 || defined(CONFIG_MTD_M25P80_MODULE)
218static struct mtd_partition bfin_spi_flash_partitions[] = {
219 {
220 .name = "bootloader(spi)",
221 .size = 0x00040000,
222 .offset = 0,
223 .mask_flags = MTD_CAP_ROM
224 }, {
225 .name = "linux kernel(spi)",
226 .size = MTDPART_SIZ_FULL,
227 .offset = MTDPART_OFS_APPEND,
228 }
229};
230
231static struct flash_platform_data bfin_spi_flash_data = {
232 .name = "m25p80",
233 .parts = bfin_spi_flash_partitions,
234 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
235 .type = "m25p16",
236};
237
238/* SPI flash chip (m25p64) */
239static struct bfin5xx_spi_chip spi_flash_chip_info = {
240 .enable_dma = 0, /* use dma transfer with this chip*/
241 .bits_per_word = 8,
242};
243#endif
244
245#if defined(CONFIG_SPI_ADC_BF533) \
246 || defined(CONFIG_SPI_ADC_BF533_MODULE)
247/* SPI ADC chip */
248static struct bfin5xx_spi_chip spi_adc_chip_info = {
249 .enable_dma = 1, /* use dma transfer with this chip*/
250 .bits_per_word = 16,
251};
252#endif
253
254#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
255static struct bfin5xx_spi_chip spi_mmc_chip_info = {
256 .enable_dma = 1,
257 .bits_per_word = 8,
258};
259#endif
260
261#if defined(CONFIG_PBX)
262static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
263 .ctl_reg = 0x4, /* send zero */
264 .enable_dma = 0,
265 .bits_per_word = 8,
266 .cs_change_per_word = 1,
267};
268#endif
269
270#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
271static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
272 .enable_dma = 0,
273 .bits_per_word = 16,
274};
275
276static const struct ad7877_platform_data bfin_ad7877_ts_info = {
277 .model = 7877,
278 .vref_delay_usecs = 50, /* internal, no capacitor */
279 .x_plate_ohms = 419,
280 .y_plate_ohms = 486,
281 .pressure_max = 1000,
282 .pressure_min = 0,
283 .stopacq_polarity = 1,
284 .first_conversion_delay = 3,
285 .acquisition_time = 1,
286 .averaging = 1,
287 .pen_down_acc_interval = 1,
288};
289#endif
290
291#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
292 && defined(CONFIG_SND_SOC_WM8731_SPI)
293static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
294 .enable_dma = 0,
295 .bits_per_word = 16,
296};
297#endif
298
299#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
300static struct bfin5xx_spi_chip spidev_chip_info = {
301 .enable_dma = 0,
302 .bits_per_word = 8,
303};
304#endif
305
306#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
307static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
308 .enable_dma = 0,
309 .bits_per_word = 8,
310};
311#endif
312
313static struct spi_board_info bfin_spi_board_info[] __initdata = {
314#if defined(CONFIG_MTD_M25P80) \
315 || defined(CONFIG_MTD_M25P80_MODULE)
316 {
317 /* the modalias must be the same as spi device driver name */
318 .modalias = "m25p80", /* Name of spi_driver for this device */
319 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
320 .bus_num = 0, /* Framework bus number */
321 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
322 .platform_data = &bfin_spi_flash_data,
323 .controller_data = &spi_flash_chip_info,
324 .mode = SPI_MODE_3,
325 },
326#endif
327
328#if defined(CONFIG_SPI_ADC_BF533) \
329 || defined(CONFIG_SPI_ADC_BF533_MODULE)
330 {
331 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
332 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
333 .bus_num = 0, /* Framework bus number */
334 .chip_select = 1, /* Framework chip select. */
335 .platform_data = NULL, /* No spi_driver specific config */
336 .controller_data = &spi_adc_chip_info,
337 },
338#endif
339
340#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
341 {
342 .modalias = "spi_mmc_dummy",
343 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
344 .bus_num = 0,
345 .chip_select = 0,
346 .platform_data = NULL,
347 .controller_data = &spi_mmc_chip_info,
348 .mode = SPI_MODE_3,
349 },
350 {
351 .modalias = "spi_mmc",
352 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
353 .bus_num = 0,
354 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
355 .platform_data = NULL,
356 .controller_data = &spi_mmc_chip_info,
357 .mode = SPI_MODE_3,
358 },
359#endif
360#if defined(CONFIG_PBX)
361 {
362 .modalias = "fxs-spi",
363 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
364 .bus_num = 0,
365 .chip_select = 8 - CONFIG_J11_JUMPER,
366 .controller_data = &spi_si3xxx_chip_info,
367 .mode = SPI_MODE_3,
368 },
369 {
370 .modalias = "fxo-spi",
371 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
372 .bus_num = 0,
373 .chip_select = 8 - CONFIG_J19_JUMPER,
374 .controller_data = &spi_si3xxx_chip_info,
375 .mode = SPI_MODE_3,
376 },
377#endif
378#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
379 {
380 .modalias = "ad7877",
381 .platform_data = &bfin_ad7877_ts_info,
382 .irq = IRQ_PF8,
383 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
384 .bus_num = 0,
385 .chip_select = 2,
386 .controller_data = &spi_ad7877_chip_info,
387 },
388#endif
389#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
390 && defined(CONFIG_SND_SOC_WM8731_SPI)
391 {
392 .modalias = "wm8731",
393 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
394 .bus_num = 0,
395 .chip_select = 5,
396 .controller_data = &spi_wm8731_chip_info,
397 .mode = SPI_MODE_0,
398 },
399#endif
400#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
401 {
402 .modalias = "spidev",
403 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
404 .bus_num = 0,
405 .chip_select = 1,
406 .controller_data = &spidev_chip_info,
407 },
408#endif
409#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
410 {
411 .modalias = "bfin-lq035q1-spi",
412 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
413 .bus_num = 0,
414 .chip_select = 1,
415 .controller_data = &lq035q1_spi_chip_info,
416 .mode = SPI_CPHA | SPI_CPOL,
417 },
418#endif
419};
420
421#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
422/* SPI controller data */
423static struct bfin5xx_spi_master bfin_spi0_info = {
424 .num_chipselect = 8,
425 .enable_dma = 1, /* master has the ability to do dma transfer */
426 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
427};
428
429/* SPI (0) */
430static struct resource bfin_spi0_resource[] = {
431 [0] = {
432 .start = SPI0_REGBASE,
433 .end = SPI0_REGBASE + 0xFF,
434 .flags = IORESOURCE_MEM,
435 },
436 [1] = {
437 .start = CH_SPI,
438 .end = CH_SPI,
439 .flags = IORESOURCE_IRQ,
440 },
441};
442
443static struct platform_device bfin_spi0_device = {
444 .name = "bfin-spi",
445 .id = 0, /* Bus number */
446 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
447 .resource = bfin_spi0_resource,
448 .dev = {
449 .platform_data = &bfin_spi0_info, /* Passed to driver */
450 },
451};
452#endif /* spi master and devices */
453
454#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
455static struct resource bfin_uart_resources[] = {
456#ifdef CONFIG_SERIAL_BFIN_UART0
457 {
458 .start = 0xFFC00400,
459 .end = 0xFFC004FF,
460 .flags = IORESOURCE_MEM,
461 },
462#endif
463#ifdef CONFIG_SERIAL_BFIN_UART1
464 {
465 .start = 0xFFC02000,
466 .end = 0xFFC020FF,
467 .flags = IORESOURCE_MEM,
468 },
469#endif
470};
471
472static struct platform_device bfin_uart_device = {
473 .name = "bfin-uart",
474 .id = 1,
475 .num_resources = ARRAY_SIZE(bfin_uart_resources),
476 .resource = bfin_uart_resources,
477};
478#endif
479
480#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
481static struct resource bfin_sir_resources[] = {
482#ifdef CONFIG_BFIN_SIR0
483 {
484 .start = 0xFFC00400,
485 .end = 0xFFC004FF,
486 .flags = IORESOURCE_MEM,
487 },
488#endif
489#ifdef CONFIG_BFIN_SIR1
490 {
491 .start = 0xFFC02000,
492 .end = 0xFFC020FF,
493 .flags = IORESOURCE_MEM,
494 },
495#endif
496};
497
498static struct platform_device bfin_sir_device = {
499 .name = "bfin_sir",
500 .id = 0,
501 .num_resources = ARRAY_SIZE(bfin_sir_resources),
502 .resource = bfin_sir_resources,
503};
504#endif
505
506#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
507static struct resource bfin_twi0_resource[] = {
508 [0] = {
509 .start = TWI0_REGBASE,
510 .end = TWI0_REGBASE,
511 .flags = IORESOURCE_MEM,
512 },
513 [1] = {
514 .start = IRQ_TWI,
515 .end = IRQ_TWI,
516 .flags = IORESOURCE_IRQ,
517 },
518};
519
520static struct platform_device i2c_bfin_twi_device = {
521 .name = "i2c-bfin-twi",
522 .id = 0,
523 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
524 .resource = bfin_twi0_resource,
525};
526#endif
527
528#ifdef CONFIG_I2C_BOARDINFO
529static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
530#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
531 {
532 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
533 },
534#endif
535#if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
536 {
537 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
538 .irq = IRQ_PF8,
539 },
540#endif
541};
542#endif
543
544#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
545static struct platform_device bfin_sport0_uart_device = {
546 .name = "bfin-sport-uart",
547 .id = 0,
548};
549
550static struct platform_device bfin_sport1_uart_device = {
551 .name = "bfin-sport-uart",
552 .id = 1,
553};
554#endif
555
556#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
557#include <linux/input.h>
558#include <linux/gpio_keys.h>
559
560static struct gpio_keys_button bfin_gpio_keys_table[] = {
561 {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
562 {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
563};
564
565static struct gpio_keys_platform_data bfin_gpio_keys_data = {
566 .buttons = bfin_gpio_keys_table,
567 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
568};
569
570static struct platform_device bfin_device_gpiokeys = {
571 .name = "gpio-keys",
572 .dev = {
573 .platform_data = &bfin_gpio_keys_data,
574 },
575};
576#endif
577
578static struct resource bfin_gpios_resources = {
579 .start = 0,
580 .end = MAX_BLACKFIN_GPIOS - 1,
581 .flags = IORESOURCE_IRQ,
582};
583
584static struct platform_device bfin_gpios_device = {
585 .name = "simple-gpio",
586 .id = -1,
587 .num_resources = 1,
588 .resource = &bfin_gpios_resources,
589};
590
591static const unsigned int cclk_vlev_datasheet[] =
592{
593 VRPAIR(VLEV_100, 400000000),
594 VRPAIR(VLEV_105, 426000000),
595 VRPAIR(VLEV_110, 500000000),
596 VRPAIR(VLEV_115, 533000000),
597 VRPAIR(VLEV_120, 600000000),
598};
599
600static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
601 .tuple_tab = cclk_vlev_datasheet,
602 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
603 .vr_settling_time = 25 /* us */,
604};
605
606static struct platform_device bfin_dpmc = {
607 .name = "bfin dpmc",
608 .dev = {
609 .platform_data = &bfin_dmpc_vreg_data,
610 },
611};
612
613#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
614#include <asm/bfin-lq035q1.h>
615
616static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
617 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
618 .use_bl = 1,
619 .gpio_bl = GPIO_PG12,
620};
621
622static struct resource bfin_lq035q1_resources[] = {
623 {
624 .start = IRQ_PPI_ERROR,
625 .end = IRQ_PPI_ERROR,
626 .flags = IORESOURCE_IRQ,
627 },
628};
629
630static struct platform_device bfin_lq035q1_device = {
631 .name = "bfin-lq035q1",
632 .id = -1,
633 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
634 .resource = bfin_lq035q1_resources,
635 .dev = {
636 .platform_data = &bfin_lq035q1_data,
637 },
638};
639#endif
640
641static struct platform_device *stamp_devices[] __initdata = {
642
643 &bfin_dpmc,
644
645#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
646 &bf5xx_nand_device,
647#endif
648
649#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
650 &rtc_device,
651#endif
652
653#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
654 &musb_device,
655#endif
656
657#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
658 &bfin_mac_device,
659#endif
660
661#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
662 &bfin_spi0_device,
663#endif
664
665#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
666 &bfin_uart_device,
667#endif
668
669#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
670 &bfin_lq035q1_device,
671#endif
672
673#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
674 &bfin_sir_device,
675#endif
676
677#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
678 &i2c_bfin_twi_device,
679#endif
680
681#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
682 &bfin_sport0_uart_device,
683 &bfin_sport1_uart_device,
684#endif
685
686#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
687 &bfin_device_gpiokeys,
688#endif
689
690#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
691 &ezbrd_flash_device,
692#endif
693
694 &bfin_gpios_device,
695};
696
697static int __init stamp_init(void)
698{
699 printk(KERN_INFO "%s(): registering device resources\n", __func__);
700
701#ifdef CONFIG_I2C_BOARDINFO
702 i2c_register_board_info(0, bfin_i2c_board_info,
703 ARRAY_SIZE(bfin_i2c_board_info));
704#endif
705
706 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
707 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
708 return 0;
709}
710
711arch_initcall(stamp_init);
712
713void native_machine_restart(char *cmd)
714{
715 /* workaround reboot hang when booting from SPI */
716 if ((bfin_read_SYSCR() & 0x7) == 0x3)
717 bfin_gpio_reset_spi0_ssel1();
718}
719
720void bfin_get_ether_addr(char *addr)
721{
722 /* the MAC is stored in OTP memory page 0xDF */
723 u32 ret;
724 u64 otp_mac;
725 u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
726
727 ret = otp_read(0xDF, 0x00, &otp_mac);
728 if (!(ret & 0x1)) {
729 char *otp_mac_p = (char *)&otp_mac;
730 for (ret = 0; ret < 6; ++ret)
731 addr[ret] = otp_mac_p[5 - ret];
732 }
733}
734EXPORT_SYMBOL(bfin_get_ether_addr);
diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c
index 762f754c06cc..8ee2b744e234 100644
--- a/arch/blackfin/mach-bf527/boards/ezkit.c
+++ b/arch/blackfin/mach-bf527/boards/ezkit.c
@@ -42,10 +42,7 @@
42#include <linux/irq.h> 42#include <linux/irq.h>
43#include <linux/interrupt.h> 43#include <linux/interrupt.h>
44#include <linux/usb/sl811.h> 44#include <linux/usb/sl811.h>
45#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
46#include <linux/usb/musb.h> 45#include <linux/usb/musb.h>
47#endif
48#include <asm/cplb.h>
49#include <asm/dma.h> 46#include <asm/dma.h>
50#include <asm/bfin5xx_spi.h> 47#include <asm/bfin5xx_spi.h>
51#include <asm/reboot.h> 48#include <asm/reboot.h>
@@ -129,6 +126,16 @@ static struct resource musb_resources[] = {
129 }, 126 },
130}; 127};
131 128
129static struct musb_hdrc_config musb_config = {
130 .multipoint = 0,
131 .dyn_fifo = 0,
132 .soft_con = 1,
133 .dma = 1,
134 .num_eps = 7,
135 .dma_channels = 7,
136 .gpio_vrsel = GPIO_PG13,
137};
138
132static struct musb_hdrc_platform_data musb_plat = { 139static struct musb_hdrc_platform_data musb_plat = {
133#if defined(CONFIG_USB_MUSB_OTG) 140#if defined(CONFIG_USB_MUSB_OTG)
134 .mode = MUSB_OTG, 141 .mode = MUSB_OTG,
@@ -137,7 +144,7 @@ static struct musb_hdrc_platform_data musb_plat = {
137#elif defined(CONFIG_USB_GADGET_MUSB_HDRC) 144#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
138 .mode = MUSB_PERIPHERAL, 145 .mode = MUSB_PERIPHERAL,
139#endif 146#endif
140 .multipoint = 0, 147 .config = &musb_config,
141}; 148};
142 149
143static u64 musb_dmamask = ~(u32)0; 150static u64 musb_dmamask = ~(u32)0;
@@ -218,7 +225,7 @@ static struct mtd_partition partition_info[] = {
218 { 225 {
219 .name = "linux kernel(nand)", 226 .name = "linux kernel(nand)",
220 .offset = 0, 227 .offset = 0,
221 .size = 4 * SIZE_1M, 228 .size = 4 * 1024 * 1024,
222 }, 229 },
223 { 230 {
224 .name = "file system(nand)", 231 .name = "file system(nand)",
@@ -846,6 +853,38 @@ static struct platform_device bfin_device_gpiokeys = {
846}; 853};
847#endif 854#endif
848 855
856#if defined(CONFIG_JOYSTICK_BFIN_ROTARY) || defined(CONFIG_JOYSTICK_BFIN_ROTARY_MODULE)
857#include <linux/input.h>
858#include <asm/bfin_rotary.h>
859
860static struct bfin_rotary_platform_data bfin_rotary_data = {
861 /*.rotary_up_key = KEY_UP,*/
862 /*.rotary_down_key = KEY_DOWN,*/
863 .rotary_rel_code = REL_WHEEL,
864 .rotary_button_key = KEY_ENTER,
865 .debounce = 10, /* 0..17 */
866 .mode = ROT_QUAD_ENC | ROT_DEBE,
867};
868
869static struct resource bfin_rotary_resources[] = {
870 {
871 .start = IRQ_CNT,
872 .end = IRQ_CNT,
873 .flags = IORESOURCE_IRQ,
874 },
875};
876
877static struct platform_device bfin_rotary_device = {
878 .name = "bfin-rotary",
879 .id = -1,
880 .num_resources = ARRAY_SIZE(bfin_rotary_resources),
881 .resource = bfin_rotary_resources,
882 .dev = {
883 .platform_data = &bfin_rotary_data,
884 },
885};
886#endif
887
849static struct resource bfin_gpios_resources = { 888static struct resource bfin_gpios_resources = {
850 .start = 0, 889 .start = 0,
851 .end = MAX_BLACKFIN_GPIOS - 1, 890 .end = MAX_BLACKFIN_GPIOS - 1,
@@ -962,6 +1001,10 @@ static struct platform_device *stamp_devices[] __initdata = {
962 &bfin_device_gpiokeys, 1001 &bfin_device_gpiokeys,
963#endif 1002#endif
964 1003
1004#if defined(CONFIG_JOYSTICK_BFIN_ROTARY) || defined(CONFIG_JOYSTICK_BFIN_ROTARY_MODULE)
1005 &bfin_rotary_device,
1006#endif
1007
965#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) 1008#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
966 &ezkit_flash_device, 1009 &ezkit_flash_device,
967#endif 1010#endif
diff --git a/arch/blackfin/mach-bf527/head.S b/arch/blackfin/mach-bf527/head.S
index 28c486191209..0eb1da85db73 100644
--- a/arch/blackfin/mach-bf527/head.S
+++ b/arch/blackfin/mach-bf527/head.S
@@ -87,6 +87,9 @@ ENTRY(_start_dma_code)
87 r1 = PLL_BYPASS; /* Bypass the PLL? */ 87 r1 = PLL_BYPASS; /* Bypass the PLL? */
88 r1 = r1 << 8; /* Shift it over */ 88 r1 = r1 << 8; /* Shift it over */
89 r0 = r1 | r0; /* add them all together */ 89 r0 = r1 | r0; /* add them all together */
90#ifdef ANOMALY_05000265
91 BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */
92#endif
90 93
91 p0.h = hi(PLL_CTL); 94 p0.h = hi(PLL_CTL);
92 p0.l = lo(PLL_CTL); /* Load the address */ 95 p0.l = lo(PLL_CTL); /* Load the address */
diff --git a/arch/blackfin/mach-bf527/include/mach/anomaly.h b/arch/blackfin/mach-bf527/include/mach/anomaly.h
index b7b166f4f064..62373e61c585 100644
--- a/arch/blackfin/mach-bf527/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf527/include/mach/anomaly.h
@@ -7,12 +7,24 @@
7 */ 7 */
8 8
9/* This file shoule be up to date with: 9/* This file shoule be up to date with:
10 * - Revision C, 01/25/2008; ADSP-BF527 Blackfin Processor Anomaly List 10 * - Revision B, 08/12/2008; ADSP-BF526 Blackfin Processor Anomaly List
11 * - Revision E, 08/18/2008; ADSP-BF527 Blackfin Processor Anomaly List
11 */ 12 */
12 13
13#ifndef _MACH_ANOMALY_H_ 14#ifndef _MACH_ANOMALY_H_
14#define _MACH_ANOMALY_H_ 15#define _MACH_ANOMALY_H_
15 16
17#if defined(__ADSPBF522__) || defined(__ADSPBF524__) || defined(__ADSPBF526__)
18# define ANOMALY_BF526 1
19#else
20# define ANOMALY_BF526 0
21#endif
22#if defined(__ADSPBF523__) || defined(__ADSPBF525__) || defined(__ADSPBF527__)
23# define ANOMALY_BF527 1
24#else
25# define ANOMALY_BF527 0
26#endif
27
16/* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported */ 28/* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported */
17#define ANOMALY_05000074 (1) 29#define ANOMALY_05000074 (1)
18/* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */ 30/* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */
@@ -23,68 +35,124 @@
23#define ANOMALY_05000245 (1) 35#define ANOMALY_05000245 (1)
24/* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */ 36/* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */
25#define ANOMALY_05000265 (1) 37#define ANOMALY_05000265 (1)
26/* New Feature: EMAC TX DMA Word Alignment */ 38/* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */
27#define ANOMALY_05000285 (1) 39#define ANOMALY_05000310 (1)
28/* Errors when SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */ 40/* Errors when SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */
29#define ANOMALY_05000312 (1) 41#define ANOMALY_05000312 (ANOMALY_BF527)
42/* PPI Is Level-Sensitive on First Transfer In Single Frame Sync Modes */
43#define ANOMALY_05000313 (__SILICON_REVISION__ < 2)
30/* Incorrect Access of OTP_STATUS During otp_write() Function */ 44/* Incorrect Access of OTP_STATUS During otp_write() Function */
31#define ANOMALY_05000328 (1) 45#define ANOMALY_05000328 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
32/* Disallowed Configuration Prevents Subsequent Allowed Configuration on Host DMA Port */ 46/* Disallowed Configuration Prevents Subsequent Allowed Configuration on Host DMA Port */
33#define ANOMALY_05000337 (1) 47#define ANOMALY_05000337 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
34/* Ethernet MAC MDIO Reads Do Not Meet IEEE Specification */ 48/* Ethernet MAC MDIO Reads Do Not Meet IEEE Specification */
35#define ANOMALY_05000341 (1) 49#define ANOMALY_05000341 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
36/* TWI May Not Operate Correctly Under Certain Signal Termination Conditions */ 50/* TWI May Not Operate Correctly Under Certain Signal Termination Conditions */
37#define ANOMALY_05000342 (1) 51#define ANOMALY_05000342 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
38/* USB Calibration Value Is Not Initialized */ 52/* USB Calibration Value Is Not Initialized */
39#define ANOMALY_05000346 (1) 53#define ANOMALY_05000346 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
54/* USB Calibration Value to use */
55#define ANOMALY_05000346_value 0xE510
40/* Preboot Routine Incorrectly Alters Reset Value of USB Register */ 56/* Preboot Routine Incorrectly Alters Reset Value of USB Register */
41#define ANOMALY_05000347 (1) 57#define ANOMALY_05000347 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
42/* Security Features Are Not Functional */ 58/* Security Features Are Not Functional */
43#define ANOMALY_05000348 (__SILICON_REVISION__ < 1) 59#define ANOMALY_05000348 (ANOMALY_BF527 && __SILICON_REVISION__ < 1)
60/* bfrom_SysControl() Firmware Function Performs Improper System Reset */
61#define ANOMALY_05000353 (ANOMALY_BF526)
44/* Regulator Programming Blocked when Hibernate Wakeup Source Remains Active */ 62/* Regulator Programming Blocked when Hibernate Wakeup Source Remains Active */
45#define ANOMALY_05000355 (1) 63#define ANOMALY_05000355 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
46/* Serial Port (SPORT) Multichannel Transmit Failure when Channel 0 Is Disabled */ 64/* Serial Port (SPORT) Multichannel Transmit Failure when Channel 0 Is Disabled */
47#define ANOMALY_05000357 (1) 65#define ANOMALY_05000357 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
48/* Incorrect Revision Number in DSPID Register */ 66/* Incorrect Revision Number in DSPID Register */
49#define ANOMALY_05000364 (__SILICON_REVISION__ > 0) 67#define ANOMALY_05000364 (ANOMALY_BF527 && __SILICON_REVISION__ == 1)
50/* PPI Underflow Error Goes Undetected in ITU-R 656 Mode */ 68/* PPI Underflow Error Goes Undetected in ITU-R 656 Mode */
51#define ANOMALY_05000366 (1) 69#define ANOMALY_05000366 (1)
52/* New Feature: Higher Default CCLK Rate */ 70/* Incorrect Default CSEL Value in PLL_DIV */
53#define ANOMALY_05000368 (1) 71#define ANOMALY_05000368 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
54/* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */ 72/* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */
55#define ANOMALY_05000371 (1) 73#define ANOMALY_05000371 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
56/* Authentication Fails To Initiate */ 74/* Authentication Fails To Initiate */
57#define ANOMALY_05000376 (__SILICON_REVISION__ > 0) 75#define ANOMALY_05000376 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
58/* Data Read From L3 Memory by USB DMA May be Corrupted */ 76/* Data Read From L3 Memory by USB DMA May be Corrupted */
59#define ANOMALY_05000380 (1) 77#define ANOMALY_05000380 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
60/* USB Full-speed Mode not Fully Tested */ 78/* 8-Bit NAND Flash Boot Mode Not Functional */
61#define ANOMALY_05000381 (1) 79#define ANOMALY_05000382 (__SILICON_REVISION__ < 2)
62/* New Feature: Boot from OTP Memory */ 80/* Host Must Not Read Back During Host DMA Boot */
63#define ANOMALY_05000385 (1) 81#define ANOMALY_05000384 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
64/* New Feature: bfrom_SysControl() Routine */ 82/* Boot from OTP Memory Not Functional */
65#define ANOMALY_05000386 (1) 83#define ANOMALY_05000385 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
66/* New Feature: Programmable Preboot Settings */ 84/* bfrom_SysControl() Firmware Routine Not Functional */
67#define ANOMALY_05000387 (1) 85#define ANOMALY_05000386 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
86/* Programmable Preboot Settings Not Functional */
87#define ANOMALY_05000387 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
88/* CRC32 Checksum Support Not Functional */
89#define ANOMALY_05000388 (__SILICON_REVISION__ < 2)
68/* Reset Vector Must Not Be in SDRAM Memory Space */ 90/* Reset Vector Must Not Be in SDRAM Memory Space */
69#define ANOMALY_05000389 (1) 91#define ANOMALY_05000389 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
70/* New Feature: pTempCurrent Added to ADI_BOOT_DATA Structure */ 92/* pTempCurrent Not Present in ADI_BOOT_DATA Structure */
71#define ANOMALY_05000392 (1) 93#define ANOMALY_05000392 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
72/* New Feature: dTempByteCount Value Increased in ADI_BOOT_DATA Structure */ 94/* Deprecated Value of dTempByteCount in ADI_BOOT_DATA Structure */
73#define ANOMALY_05000393 (1) 95#define ANOMALY_05000393 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
74/* New Feature: Log Buffer Functionality */ 96/* Log Buffer Not Functional */
75#define ANOMALY_05000394 (1) 97#define ANOMALY_05000394 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
76/* New Feature: Hook Routine Functionality */ 98/* Hook Routine Not Functional */
77#define ANOMALY_05000395 (1) 99#define ANOMALY_05000395 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
78/* New Feature: Header Indirect Bit */ 100/* Header Indirect Bit Not Functional */
79#define ANOMALY_05000396 (1) 101#define ANOMALY_05000396 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
80/* New Feature: BK_ONES, BK_ZEROS, and BK_DATECODE Constants */ 102/* BK_ONES, BK_ZEROS, and BK_DATECODE Constants Not Functional */
81#define ANOMALY_05000397 (1) 103#define ANOMALY_05000397 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
82/* New Feature: SWRESET, DFRESET and WDRESET Bits Added to SYSCR Register */ 104/* SWRESET, DFRESET and WDRESET Bits in the SYSCR Register Not Functional */
83#define ANOMALY_05000398 (1) 105#define ANOMALY_05000398 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
84/* New Feature: BCODE_NOBOOT Added to BCODE Field of SYSCR Register */ 106/* BCODE_NOBOOT in BCODE Field of SYSCR Register Not Functional */
85#define ANOMALY_05000399 (1) 107#define ANOMALY_05000399 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
86/* PPI Data Signals D0 and D8 do not Tristate After Disabling PPI */ 108/* PPI Data Signals D0 and D8 do not Tristate After Disabling PPI */
87#define ANOMALY_05000401 (1) 109#define ANOMALY_05000401 (__SILICON_REVISION__ < 2)
110/* Level-Sensitive External GPIO Wakeups May Cause Indefinite Stall */
111#define ANOMALY_05000403 (__SILICON_REVISION__ < 2)
112/* Lockbox SESR Disallows Certain User Interrupts */
113#define ANOMALY_05000404 (__SILICON_REVISION__ < 2)
114/* Lockbox SESR Firmware Does Not Save/Restore Full Context */
115#define ANOMALY_05000405 (1)
116/* Lockbox SESR Firmware Arguments Are Not Retained After First Initialization */
117#define ANOMALY_05000407 (__SILICON_REVISION__ < 2)
118/* Lockbox Firmware Memory Cleanup Routine Does not Clear Registers */
119#define ANOMALY_05000408 (1)
120/* Lockbox firmware leaves MDMA0 channel enabled */
121#define ANOMALY_05000409 (__SILICON_REVISION__ < 2)
122/* Incorrect Default Internal Voltage Regulator Setting */
123#define ANOMALY_05000410 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
124/* bfrom_SysControl() Firmware Function Cannot be Used to Enter Power Saving Modes */
125#define ANOMALY_05000411 (__SILICON_REVISION__ < 2)
126/* OTP_CHECK_FOR_PREV_WRITE Bit is Not Functional in bfrom_OtpWrite() API */
127#define ANOMALY_05000414 (__SILICON_REVISION__ < 2)
128/* DEB2_URGENT Bit Not Functional */
129#define ANOMALY_05000415 (__SILICON_REVISION__ < 2)
130/* Speculative Fetches Can Cause Undesired External FIFO Operations */
131#define ANOMALY_05000416 (1)
132/* SPORT0 Ignores External TSCLK0 on PG14 When TMR6 is an Output */
133#define ANOMALY_05000417 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
134/* tSFSPE and tHFSPE Do Not Meet Data Sheet Specifications */
135#define ANOMALY_05000418 (__SILICON_REVISION__ < 2)
136/* USB PLL_STABLE Bit May Not Accurately Reflect the USB PLL's Status */
137#define ANOMALY_05000420 (__SILICON_REVISION__ < 2)
138/* TWI Fall Time (Tof) May Violate the Minimum I2C Specification */
139#define ANOMALY_05000421 (1)
140/* TWI Input Capacitance (Ci) May Violate the Maximum I2C Specification */
141#define ANOMALY_05000422 (ANOMALY_BF527 && __SILICON_REVISION__ > 1)
142/* Certain Ethernet Frames With Errors are Misclassified in RMII Mode */
143#define ANOMALY_05000423 (__SILICON_REVISION__ < 2)
144/* Internal Voltage Regulator Not Trimmed */
145#define ANOMALY_05000424 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
146/* Multichannel SPORT Channel Misalignment Under Specific Configuration */
147#define ANOMALY_05000425 (__SILICON_REVISION__ < 2)
148/* Speculative Fetches of Indirect-Pointer Instructions Can Cause Spurious Hardware Errors */
149#define ANOMALY_05000426 (1)
150/* WB_EDGE Bit in NFC_IRQSTAT Incorrectly Reflects Buffer Status Instead of IRQ Status */
151#define ANOMALY_05000429 (__SILICON_REVISION__ < 2)
152/* Software System Reset Corrupts PLL_LOCKCNT Register */
153#define ANOMALY_05000430 (ANOMALY_BF527 && __SILICON_REVISION__ > 1)
154/* bfrom_SysControl() Does Not Clear SIC_IWR1 Before Executing PLL Programming Sequence */
155#define ANOMALY_05000432 (ANOMALY_BF526)
88 156
89/* Anomalies that don't exist on this proc */ 157/* Anomalies that don't exist on this proc */
90#define ANOMALY_05000125 (0) 158#define ANOMALY_05000125 (0)
@@ -97,6 +165,8 @@
97#define ANOMALY_05000263 (0) 165#define ANOMALY_05000263 (0)
98#define ANOMALY_05000266 (0) 166#define ANOMALY_05000266 (0)
99#define ANOMALY_05000273 (0) 167#define ANOMALY_05000273 (0)
168#define ANOMALY_05000285 (0)
169#define ANOMALY_05000307 (0)
100#define ANOMALY_05000311 (0) 170#define ANOMALY_05000311 (0)
101#define ANOMALY_05000323 (0) 171#define ANOMALY_05000323 (0)
102#define ANOMALY_05000363 (0) 172#define ANOMALY_05000363 (0)
diff --git a/arch/blackfin/mach-bf527/include/mach/bf527.h b/arch/blackfin/mach-bf527/include/mach/bf527.h
index 056eb4b9cd25..144f08d3f8ea 100644
--- a/arch/blackfin/mach-bf527/include/mach/bf527.h
+++ b/arch/blackfin/mach-bf527/include/mach/bf527.h
@@ -30,8 +30,6 @@
30#ifndef __MACH_BF527_H__ 30#ifndef __MACH_BF527_H__
31#define __MACH_BF527_H__ 31#define __MACH_BF527_H__
32 32
33#define SUPPORTED_REVID 2
34
35#define OFFSET_(x) ((x) & 0x0000FFFF) 33#define OFFSET_(x) ((x) & 0x0000FFFF)
36 34
37/*some misc defines*/ 35/*some misc defines*/
@@ -112,16 +110,31 @@
112 110
113#ifdef CONFIG_BF527 111#ifdef CONFIG_BF527
114#define CPU "BF527" 112#define CPU "BF527"
113#define CPUID 0x27e4
114#endif
115#ifdef CONFIG_BF526
116#define CPU "BF526"
117#define CPUID 0x27e4
115#endif 118#endif
116#ifdef CONFIG_BF525 119#ifdef CONFIG_BF525
117#define CPU "BF525" 120#define CPU "BF525"
121#define CPUID 0x27e4
122#endif
123#ifdef CONFIG_BF524
124#define CPU "BF524"
125#define CPUID 0x27e4
126#endif
127#ifdef CONFIG_BF523
128#define CPU "BF523"
129#define CPUID 0x27e4
118#endif 130#endif
119#ifdef CONFIG_BF522 131#ifdef CONFIG_BF522
120#define CPU "BF522" 132#define CPU "BF522"
133#define CPUID 0x27e4
121#endif 134#endif
135
122#ifndef CPU 136#ifndef CPU
123#define CPU "UNKNOWN" 137#error Unknown CPU type - This kernel doesn't seem to be configured properly
124#define CPUID 0x0
125#endif 138#endif
126 139
127#endif /* __MACH_BF527_H__ */ 140#endif /* __MACH_BF527_H__ */
diff --git a/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h b/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h
index 6ac2ed7026eb..68b55d03fedf 100644
--- a/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h
+++ b/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h
@@ -1840,6 +1840,33 @@
1840 1840
1841#define DPRESCALE 0xf /* Load Counter Register */ 1841#define DPRESCALE 0xf /* Load Counter Register */
1842 1842
1843/* CNT_COMMAND bit field options */
1844
1845#define W1LCNT_ZERO 0x0001 /* write 1 to load CNT_COUNTER with zero */
1846#define W1LCNT_MIN 0x0004 /* write 1 to load CNT_COUNTER from CNT_MIN */
1847#define W1LCNT_MAX 0x0008 /* write 1 to load CNT_COUNTER from CNT_MAX */
1848
1849#define W1LMIN_ZERO 0x0010 /* write 1 to load CNT_MIN with zero */
1850#define W1LMIN_CNT 0x0020 /* write 1 to load CNT_MIN from CNT_COUNTER */
1851#define W1LMIN_MAX 0x0080 /* write 1 to load CNT_MIN from CNT_MAX */
1852
1853#define W1LMAX_ZERO 0x0100 /* write 1 to load CNT_MAX with zero */
1854#define W1LMAX_CNT 0x0200 /* write 1 to load CNT_MAX from CNT_COUNTER */
1855#define W1LMAX_MIN 0x0400 /* write 1 to load CNT_MAX from CNT_MIN */
1856
1857/* CNT_CONFIG bit field options */
1858
1859#define CNTMODE_QUADENC 0x0000 /* quadrature encoder mode */
1860#define CNTMODE_BINENC 0x0100 /* binary encoder mode */
1861#define CNTMODE_UDCNT 0x0200 /* up/down counter mode */
1862#define CNTMODE_DIRCNT 0x0400 /* direction counter mode */
1863#define CNTMODE_DIRTMR 0x0500 /* direction timer mode */
1864
1865#define BNDMODE_COMP 0x0000 /* boundary compare mode */
1866#define BNDMODE_ZERO 0x1000 /* boundary compare and zero mode */
1867#define BNDMODE_CAPT 0x2000 /* boundary capture mode */
1868#define BNDMODE_AEXT 0x3000 /* boundary auto-extend mode */
1869
1843/* Bit masks for OTP_CONTROL */ 1870/* Bit masks for OTP_CONTROL */
1844 1871
1845#define FUSE_FADDR 0x1ff /* OTP/Fuse Address */ 1872#define FUSE_FADDR 0x1ff /* OTP/Fuse Address */
diff --git a/arch/blackfin/mach-bf527/include/mach/portmux.h b/arch/blackfin/mach-bf527/include/mach/portmux.h
index ae4d205bfcf5..7f6da2c386bb 100644
--- a/arch/blackfin/mach-bf527/include/mach/portmux.h
+++ b/arch/blackfin/mach-bf527/include/mach/portmux.h
@@ -67,6 +67,10 @@
67#define P_UART1_RX (P_DEFINED | P_IDENT(GPIO_PG13) | P_FUNCT(1)) 67#define P_UART1_RX (P_DEFINED | P_IDENT(GPIO_PG13) | P_FUNCT(1))
68#endif 68#endif
69 69
70#define P_CNT_CZM (P_DEFINED | P_IDENT(GPIO_PF11) | P_FUNCT(3))
71#define P_CNT_CDG (P_DEFINED | P_IDENT(GPIO_PF12) | P_FUNCT(3))
72#define P_CNT_CUD (P_DEFINED | P_IDENT(GPIO_PF13) | P_FUNCT(3))
73
70#define P_HWAIT (P_DONTCARE) 74#define P_HWAIT (P_DONTCARE)
71 75
72#define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(0)) 76#define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(0))
diff --git a/arch/blackfin/mach-bf533/boards/H8606.c b/arch/blackfin/mach-bf533/boards/H8606.c
index c66a68f30239..72ac3ac8ef76 100644
--- a/arch/blackfin/mach-bf533/boards/H8606.c
+++ b/arch/blackfin/mach-bf533/boards/H8606.c
@@ -9,7 +9,7 @@
9 * Modified: 9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA) 10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2006 Analog Devices Inc 11 * Copyright 2004-2006 Analog Devices Inc
12 * Copyright 2007 HV Sistemas S.L. 12 * Copyright 2007,2008 HV Sistemas S.L.
13 * 13 *
14 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 14 * Bugs: Enter bugs at http://blackfin.uclinux.org/
15 * 15 *
@@ -64,18 +64,18 @@ static struct platform_device rtc_device = {
64static struct resource dm9000_resources[] = { 64static struct resource dm9000_resources[] = {
65 [0] = { 65 [0] = {
66 .start = 0x20300000, 66 .start = 0x20300000,
67 .end = 0x20300000 + 1, 67 .end = 0x20300002,
68 .flags = IORESOURCE_MEM, 68 .flags = IORESOURCE_MEM,
69 }, 69 },
70 [1] = { 70 [1] = {
71 .start = 0x20300000 + 4, 71 .start = 0x20300004,
72 .end = 0x20300000 + 5, 72 .end = 0x20300006,
73 .flags = IORESOURCE_MEM, 73 .flags = IORESOURCE_MEM,
74 }, 74 },
75 [2] = { 75 [2] = {
76 .start = IRQ_PF10, 76 .start = IRQ_PF10,
77 .end = IRQ_PF10, 77 .end = IRQ_PF10,
78 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE), 78 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | IRQF_SHARED | IRQF_TRIGGER_HIGH),
79 }, 79 },
80}; 80};
81 81
@@ -140,18 +140,22 @@ static struct platform_device net2272_bfin_device = {
140#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) 140#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
141static struct mtd_partition bfin_spi_flash_partitions[] = { 141static struct mtd_partition bfin_spi_flash_partitions[] = {
142 { 142 {
143 .name = "bootloader(spi)", 143 .name = "bootloader (spi)",
144 .size = 0x00060000, 144 .size = 0x40000,
145 .offset = 0, 145 .offset = 0,
146 .mask_flags = MTD_CAP_ROM 146 .mask_flags = MTD_CAP_ROM
147 }, { 147 }, {
148 .name = "linux kernel(spi)", 148 .name = "fpga (spi)",
149 .size = 0x100000, 149 .size = 0x30000,
150 .offset = 0x60000 150 .offset = 0x40000
151 }, { 151 }, {
152 .name = "file system(spi)", 152 .name = "linux kernel (spi)",
153 .size = 0x6a0000, 153 .size = 0x150000,
154 .offset = 0x00160000, 154 .offset = 0x70000
155 }, {
156 .name = "jffs2 root file system (spi)",
157 .size = 0x640000,
158 .offset = 0x1c0000,
155 } 159 }
156}; 160};
157 161
@@ -340,7 +344,7 @@ static struct platform_device bfin_sir_device = {
340 344
341static struct plat_serial8250_port serial8250_platform_data [] = { 345static struct plat_serial8250_port serial8250_platform_data [] = {
342 { 346 {
343 .membase = 0x20200000, 347 .membase = (void *)0x20200000,
344 .mapbase = 0x20200000, 348 .mapbase = 0x20200000,
345 .irq = IRQ_PF8, 349 .irq = IRQ_PF8,
346 .flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE, 350 .flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE,
@@ -348,7 +352,7 @@ static struct plat_serial8250_port serial8250_platform_data [] = {
348 .regshift = 1, 352 .regshift = 1,
349 .uartclk = 66666667, 353 .uartclk = 66666667,
350 }, { 354 }, {
351 .membase = 0x20200010, 355 .membase = (void *)0x20200010,
352 .mapbase = 0x20200010, 356 .mapbase = 0x20200010,
353 .irq = IRQ_PF8, 357 .irq = IRQ_PF8,
354 .flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE, 358 .flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE,
diff --git a/arch/blackfin/mach-bf533/head.S b/arch/blackfin/mach-bf533/head.S
index 01b2b7ead5ab..9fc95aaca439 100644
--- a/arch/blackfin/mach-bf533/head.S
+++ b/arch/blackfin/mach-bf533/head.S
@@ -78,6 +78,9 @@ ENTRY(_start_dma_code)
78 r1 = PLL_BYPASS; /* Bypass the PLL? */ 78 r1 = PLL_BYPASS; /* Bypass the PLL? */
79 r1 = r1 << 8; /* Shift it over */ 79 r1 = r1 << 8; /* Shift it over */
80 r0 = r1 | r0; /* add them all together */ 80 r0 = r1 | r0; /* add them all together */
81#ifdef ANOMALY_05000265
82 BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */
83#endif
81 84
82 p0.h = hi(PLL_CTL); 85 p0.h = hi(PLL_CTL);
83 p0.l = lo(PLL_CTL); /* Load the address */ 86 p0.l = lo(PLL_CTL); /* Load the address */
diff --git a/arch/blackfin/mach-bf533/include/mach/anomaly.h b/arch/blackfin/mach-bf533/include/mach/anomaly.h
index 8f7ea112fd3a..f544fc56959a 100644
--- a/arch/blackfin/mach-bf533/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf533/include/mach/anomaly.h
@@ -7,7 +7,7 @@
7 */ 7 */
8 8
9/* This file shoule be up to date with: 9/* This file shoule be up to date with:
10 * - Revision C, 02/08/2008; ADSP-BF531/BF532/BF533 Blackfin Processor Anomaly List 10 * - Revision D, 06/18/2008; ADSP-BF531/BF532/BF533 Blackfin Processor Anomaly List
11 */ 11 */
12 12
13#ifndef _MACH_ANOMALY_H_ 13#ifndef _MACH_ANOMALY_H_
@@ -97,11 +97,11 @@
97/* UART STB Bit Incorrectly Affects Receiver Setting */ 97/* UART STB Bit Incorrectly Affects Receiver Setting */
98#define ANOMALY_05000231 (__SILICON_REVISION__ < 5) 98#define ANOMALY_05000231 (__SILICON_REVISION__ < 5)
99/* PPI_FS3 Is Not Driven in 2 or 3 Internal Frame Sync Transmit Modes */ 99/* PPI_FS3 Is Not Driven in 2 or 3 Internal Frame Sync Transmit Modes */
100#define ANOMALY_05000233 (__SILICON_REVISION__ < 4) 100#define ANOMALY_05000233 (__SILICON_REVISION__ < 6)
101/* Incorrect Revision Number in DSPID Register */ 101/* Incorrect Revision Number in DSPID Register */
102#define ANOMALY_05000234 (__SILICON_REVISION__ == 4) 102#define ANOMALY_05000234 (__SILICON_REVISION__ == 4)
103/* DF Bit in PLL_CTL Register Does Not Respond to Hardware Reset */ 103/* DF Bit in PLL_CTL Register Does Not Respond to Hardware Reset */
104#define ANOMALY_05000242 (__SILICON_REVISION__ < 4) 104#define ANOMALY_05000242 (__SILICON_REVISION__ < 5)
105/* If I-Cache Is On, CSYNC/SSYNC/IDLE Around Change of Control Causes Failures */ 105/* If I-Cache Is On, CSYNC/SSYNC/IDLE Around Change of Control Causes Failures */
106#define ANOMALY_05000244 (__SILICON_REVISION__ < 5) 106#define ANOMALY_05000244 (__SILICON_REVISION__ < 5)
107/* Spurious Hardware Error from an Access in the Shadow of a Conditional Branch */ 107/* Spurious Hardware Error from an Access in the Shadow of a Conditional Branch */
@@ -131,7 +131,7 @@
131/* CSYNC/SSYNC/IDLE Causes Infinite Stall in Penultimate Instruction in Hardware Loop */ 131/* CSYNC/SSYNC/IDLE Causes Infinite Stall in Penultimate Instruction in Hardware Loop */
132#define ANOMALY_05000264 (__SILICON_REVISION__ < 5) 132#define ANOMALY_05000264 (__SILICON_REVISION__ < 5)
133/* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */ 133/* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */
134#define ANOMALY_05000265 (__SILICON_REVISION__ < 5) 134#define ANOMALY_05000265 (1)
135/* High I/O Activity Causes Output Voltage of Internal Voltage Regulator (Vddint) to Increase */ 135/* High I/O Activity Causes Output Voltage of Internal Voltage Regulator (Vddint) to Increase */
136#define ANOMALY_05000269 (__SILICON_REVISION__ < 5) 136#define ANOMALY_05000269 (__SILICON_REVISION__ < 5)
137/* High I/O Activity Causes Output Voltage of Internal Voltage Regulator (Vddint) to Decrease */ 137/* High I/O Activity Causes Output Voltage of Internal Voltage Regulator (Vddint) to Decrease */
@@ -141,56 +141,59 @@
141/* Certain Data Cache Writethrough Modes Fail for Vddint <= 0.9V */ 141/* Certain Data Cache Writethrough Modes Fail for Vddint <= 0.9V */
142#define ANOMALY_05000272 (1) 142#define ANOMALY_05000272 (1)
143/* Writes to Synchronous SDRAM Memory May Be Lost */ 143/* Writes to Synchronous SDRAM Memory May Be Lost */
144#define ANOMALY_05000273 (1) 144#define ANOMALY_05000273 (__SILICON_REVISION__ < 6)
145/* Timing Requirements Change for External Frame Sync PPI Modes with Non-Zero PPI_DELAY */ 145/* Timing Requirements Change for External Frame Sync PPI Modes with Non-Zero PPI_DELAY */
146#define ANOMALY_05000276 (1) 146#define ANOMALY_05000276 (1)
147/* Writes to an I/O Data Register One SCLK Cycle after an Edge Is Detected May Clear Interrupt */ 147/* Writes to an I/O Data Register One SCLK Cycle after an Edge Is Detected May Clear Interrupt */
148#define ANOMALY_05000277 (1) 148#define ANOMALY_05000277 (__SILICON_REVISION__ < 6)
149/* Disabling Peripherals with DMA Running May Cause DMA System Instability */ 149/* Disabling Peripherals with DMA Running May Cause DMA System Instability */
150#define ANOMALY_05000278 (1) 150#define ANOMALY_05000278 (__SILICON_REVISION__ < 6)
151/* False Hardware Error Exception When ISR Context Is Not Restored */ 151/* False Hardware Error Exception When ISR Context Is Not Restored */
152#define ANOMALY_05000281 (1) 152#define ANOMALY_05000281 (__SILICON_REVISION__ < 6)
153/* Memory DMA Corruption with 32-Bit Data and Traffic Control */ 153/* Memory DMA Corruption with 32-Bit Data and Traffic Control */
154#define ANOMALY_05000282 (1) 154#define ANOMALY_05000282 (__SILICON_REVISION__ < 6)
155/* System MMR Write Is Stalled Indefinitely When Killed in a Particular Stage */ 155/* System MMR Write Is Stalled Indefinitely When Killed in a Particular Stage */
156#define ANOMALY_05000283 (1) 156#define ANOMALY_05000283 (__SILICON_REVISION__ < 6)
157/* SPORTs May Receive Bad Data If FIFOs Fill Up */ 157/* SPORTs May Receive Bad Data If FIFOs Fill Up */
158#define ANOMALY_05000288 (1) 158#define ANOMALY_05000288 (__SILICON_REVISION__ < 6)
159/* Memory-To-Memory DMA Source/Destination Descriptors Must Be in Same Memory Space */ 159/* Memory-To-Memory DMA Source/Destination Descriptors Must Be in Same Memory Space */
160#define ANOMALY_05000301 (1) 160#define ANOMALY_05000301 (__SILICON_REVISION__ < 6)
161/* SSYNCs After Writes To DMA MMR Registers May Not Be Handled Correctly */ 161/* SSYNCs After Writes To DMA MMR Registers May Not Be Handled Correctly */
162#define ANOMALY_05000302 (__SILICON_REVISION__ < 5) 162#define ANOMALY_05000302 (__SILICON_REVISION__ < 5)
163/* New Feature: Additional Hysteresis on SPORT Input Pins (Not Available On Older Silicon) */ 163/* New Feature: Additional Hysteresis on SPORT Input Pins (Not Available On Older Silicon) */
164#define ANOMALY_05000305 (__SILICON_REVISION__ < 5) 164#define ANOMALY_05000305 (__SILICON_REVISION__ < 5)
165/* New Feature: Additional PPI Frame Sync Sampling Options (Not Available On Older Silicon) */ 165/* New Feature: Additional PPI Frame Sync Sampling Options (Not Available On Older Silicon) */
166#define ANOMALY_05000306 (__SILICON_REVISION__ < 5) 166#define ANOMALY_05000306 (__SILICON_REVISION__ < 5)
167/* SCKELOW Bit Does Not Maintain State Through Hibernate */
168#define ANOMALY_05000307 (1)
167/* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */ 169/* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */
168#define ANOMALY_05000310 (1) 170#define ANOMALY_05000310 (1)
169/* Erroneous Flag (GPIO) Pin Operations under Specific Sequences */ 171/* Erroneous Flag (GPIO) Pin Operations under Specific Sequences */
170#define ANOMALY_05000311 (1) 172#define ANOMALY_05000311 (__SILICON_REVISION__ < 6)
171/* Errors When SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */ 173/* Errors When SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */
172#define ANOMALY_05000312 (1) 174#define ANOMALY_05000312 (__SILICON_REVISION__ < 6)
173/* PPI Is Level-Sensitive on First Transfer */ 175/* PPI Is Level-Sensitive on First Transfer */
174#define ANOMALY_05000313 (1) 176#define ANOMALY_05000313 (__SILICON_REVISION__ < 6)
175/* Killed System MMR Write Completes Erroneously On Next System MMR Access */ 177/* Killed System MMR Write Completes Erroneously On Next System MMR Access */
176#define ANOMALY_05000315 (1) 178#define ANOMALY_05000315 (__SILICON_REVISION__ < 6)
177/* Internal Voltage Regulator Values of 1.05V, 1.10V and 1.15V Not Allowed for LQFP Packages */ 179/* Internal Voltage Regulator Values of 1.05V, 1.10V and 1.15V Not Allowed for LQFP Packages */
178#define ANOMALY_05000319 (ANOMALY_BF531 || ANOMALY_BF532) 180#define ANOMALY_05000319 ((ANOMALY_BF531 || ANOMALY_BF532) && __SILICON_REVISION__ < 6)
179/* Serial Port (SPORT) Multichannel Transmit Failure when Channel 0 Is Disabled */ 181/* Serial Port (SPORT) Multichannel Transmit Failure when Channel 0 Is Disabled */
180#define ANOMALY_05000357 (1) 182#define ANOMALY_05000357 (__SILICON_REVISION__ < 6)
181/* UART Break Signal Issues */ 183/* UART Break Signal Issues */
182#define ANOMALY_05000363 (__SILICON_REVISION__ < 5) 184#define ANOMALY_05000363 (__SILICON_REVISION__ < 5)
183/* PPI Underflow Error Goes Undetected in ITU-R 656 Mode */ 185/* PPI Underflow Error Goes Undetected in ITU-R 656 Mode */
184#define ANOMALY_05000366 (1) 186#define ANOMALY_05000366 (1)
185/* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */ 187/* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */
186#define ANOMALY_05000371 (1) 188#define ANOMALY_05000371 (__SILICON_REVISION__ < 6)
187/* PPI Does Not Start Properly In Specific Mode */ 189/* PPI Does Not Start Properly In Specific Mode */
188#define ANOMALY_05000400 (__SILICON_REVISION__ >= 5) 190#define ANOMALY_05000400 (__SILICON_REVISION__ == 5)
189/* SSYNC Stalls Processor when Executed from Non-Cacheable Memory */ 191/* SSYNC Stalls Processor when Executed from Non-Cacheable Memory */
190#define ANOMALY_05000402 (__SILICON_REVISION__ >= 5) 192#define ANOMALY_05000402 (__SILICON_REVISION__ == 5)
191/* Level-Sensitive External GPIO Wakeups May Cause Indefinite Stall */ 193/* Level-Sensitive External GPIO Wakeups May Cause Indefinite Stall */
192#define ANOMALY_05000403 (1) 194#define ANOMALY_05000403 (1)
193 195/* Speculative Fetches Can Cause Undesired External FIFO Operations */
196#define ANOMALY_05000416 (1)
194 197
195/* These anomalies have been "phased" out of analog.com anomaly sheets and are 198/* These anomalies have been "phased" out of analog.com anomaly sheets and are
196 * here to show running on older silicon just isn't feasible. 199 * here to show running on older silicon just isn't feasible.
@@ -268,5 +271,7 @@
268/* Anomalies that don't exist on this proc */ 271/* Anomalies that don't exist on this proc */
269#define ANOMALY_05000266 (0) 272#define ANOMALY_05000266 (0)
270#define ANOMALY_05000323 (0) 273#define ANOMALY_05000323 (0)
274#define ANOMALY_05000353 (1)
275#define ANOMALY_05000386 (1)
271 276
272#endif 277#endif
diff --git a/arch/blackfin/mach-bf533/include/mach/bf533.h b/arch/blackfin/mach-bf533/include/mach/bf533.h
index 12a416931991..dfc8c1ad2d7a 100644
--- a/arch/blackfin/mach-bf533/include/mach/bf533.h
+++ b/arch/blackfin/mach-bf533/include/mach/bf533.h
@@ -30,8 +30,6 @@
30#ifndef __MACH_BF533_H__ 30#ifndef __MACH_BF533_H__
31#define __MACH_BF533_H__ 31#define __MACH_BF533_H__
32 32
33#define SUPPORTED_REVID 2
34
35#define OFFSET_(x) ((x) & 0x0000FFFF) 33#define OFFSET_(x) ((x) & 0x0000FFFF)
36 34
37/*some misc defines*/ 35/*some misc defines*/
@@ -143,19 +141,19 @@
143 141
144#ifdef CONFIG_BF533 142#ifdef CONFIG_BF533
145#define CPU "BF533" 143#define CPU "BF533"
146#define CPUID 0x027a5000 144#define CPUID 0x27a5
147#endif 145#endif
148#ifdef CONFIG_BF532 146#ifdef CONFIG_BF532
149#define CPU "BF532" 147#define CPU "BF532"
150#define CPUID 0x0275A000 148#define CPUID 0x275A
151#endif 149#endif
152#ifdef CONFIG_BF531 150#ifdef CONFIG_BF531
153#define CPU "BF531" 151#define CPU "BF531"
154#define CPUID 0x027a5000 152#define CPUID 0x27a5
155#endif 153#endif
154
156#ifndef CPU 155#ifndef CPU
157#define CPU "UNKNOWN" 156#error Unknown CPU type - This kernel doesn't seem to be configured properly
158#define CPUID 0x0
159#endif 157#endif
160 158
161#endif /* __MACH_BF533_H__ */ 159#endif /* __MACH_BF533_H__ */
diff --git a/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h
index 815bfe5dd1a9..f3d9e495230c 100644
--- a/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h
@@ -85,7 +85,7 @@ struct bfin_serial_port {
85 unsigned int rx_dma_channel; 85 unsigned int rx_dma_channel;
86 struct work_struct tx_dma_workqueue; 86 struct work_struct tx_dma_workqueue;
87#else 87#else
88# if ANOMALY_05000230 88# if ANOMALY_05000363
89 unsigned int anomaly_threshold; 89 unsigned int anomaly_threshold;
90# endif 90# endif
91#endif 91#endif
@@ -158,7 +158,7 @@ static void bfin_serial_hw_init(struct bfin_serial_port *uart)
158 } 158 }
159 if (uart->rts_pin >= 0) { 159 if (uart->rts_pin >= 0) {
160 gpio_request(uart->rts_pin, DRIVER_NAME); 160 gpio_request(uart->rts_pin, DRIVER_NAME);
161 gpio_direction_input(uart->rts_pin, 0); 161 gpio_direction_output(uart->rts_pin, 0);
162 } 162 }
163#endif 163#endif
164} 164}
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c
index 8482d22321f3..8d394393201f 100644
--- a/arch/blackfin/mach-bf537/boards/stamp.c
+++ b/arch/blackfin/mach-bf537/boards/stamp.c
@@ -51,7 +51,6 @@
51#include <asm/reboot.h> 51#include <asm/reboot.h>
52#include <asm/portmux.h> 52#include <asm/portmux.h>
53#include <asm/dpmc.h> 53#include <asm/dpmc.h>
54#include <linux/spi/ad7877.h>
55 54
56/* 55/*
57 * Name the Board for the /proc/cpuinfo 56 * Name the Board for the /proc/cpuinfo
@@ -555,6 +554,7 @@ static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
555#endif 554#endif
556 555
557#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) 556#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
557#include <linux/spi/ad7877.h>
558static struct bfin5xx_spi_chip spi_ad7877_chip_info = { 558static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
559 .enable_dma = 0, 559 .enable_dma = 0,
560 .bits_per_word = 16, 560 .bits_per_word = 16,
@@ -575,6 +575,30 @@ static const struct ad7877_platform_data bfin_ad7877_ts_info = {
575}; 575};
576#endif 576#endif
577 577
578#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
579#include <linux/spi/ad7879.h>
580static const struct ad7879_platform_data bfin_ad7879_ts_info = {
581 .model = 7879, /* Model = AD7879 */
582 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
583 .pressure_max = 10000,
584 .pressure_min = 0,
585 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
586 .acquisition_time = 1, /* 4us acquisition time per sample */
587 .median = 2, /* do 8 measurements */
588 .averaging = 1, /* take the average of 4 middle samples */
589 .pen_down_acc_interval = 255, /* 9.4 ms */
590 .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */
591 .gpio_default = 1, /* During initialization set GPIO = HIGH */
592};
593#endif
594
595#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
596static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
597 .enable_dma = 0,
598 .bits_per_word = 16,
599};
600#endif
601
578#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) 602#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
579static struct bfin5xx_spi_chip spidev_chip_info = { 603static struct bfin5xx_spi_chip spidev_chip_info = {
580 .enable_dma = 0, 604 .enable_dma = 0,
@@ -582,6 +606,13 @@ static struct bfin5xx_spi_chip spidev_chip_info = {
582}; 606};
583#endif 607#endif
584 608
609#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
610static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
611 .enable_dma = 0,
612 .bits_per_word = 8,
613};
614#endif
615
585#if defined(CONFIG_MTD_DATAFLASH) \ 616#if defined(CONFIG_MTD_DATAFLASH) \
586 || defined(CONFIG_MTD_DATAFLASH_MODULE) 617 || defined(CONFIG_MTD_DATAFLASH_MODULE)
587 618
@@ -721,6 +752,18 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
721 .controller_data = &spi_ad7877_chip_info, 752 .controller_data = &spi_ad7877_chip_info,
722 }, 753 },
723#endif 754#endif
755#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
756 {
757 .modalias = "ad7879",
758 .platform_data = &bfin_ad7879_ts_info,
759 .irq = IRQ_PF7,
760 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
761 .bus_num = 0,
762 .chip_select = 1,
763 .controller_data = &spi_ad7879_chip_info,
764 .mode = SPI_CPHA | SPI_CPOL,
765 },
766#endif
724#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) 767#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
725 { 768 {
726 .modalias = "spidev", 769 .modalias = "spidev",
@@ -730,6 +773,16 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
730 .controller_data = &spidev_chip_info, 773 .controller_data = &spidev_chip_info,
731 }, 774 },
732#endif 775#endif
776#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
777 {
778 .modalias = "bfin-lq035q1-spi",
779 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
780 .bus_num = 0,
781 .chip_select = 2,
782 .controller_data = &lq035q1_spi_chip_info,
783 .mode = SPI_CPHA | SPI_CPOL,
784 },
785#endif
733}; 786};
734 787
735#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 788#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
@@ -777,6 +830,34 @@ static struct platform_device bfin_fb_adv7393_device = {
777}; 830};
778#endif 831#endif
779 832
833#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
834#include <asm/bfin-lq035q1.h>
835
836static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
837 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
838 .use_bl = 0, /* let something else control the LCD Blacklight */
839 .gpio_bl = GPIO_PF7,
840};
841
842static struct resource bfin_lq035q1_resources[] = {
843 {
844 .start = IRQ_PPI_ERROR,
845 .end = IRQ_PPI_ERROR,
846 .flags = IORESOURCE_IRQ,
847 },
848};
849
850static struct platform_device bfin_lq035q1_device = {
851 .name = "bfin-lq035q1",
852 .id = -1,
853 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
854 .resource = bfin_lq035q1_resources,
855 .dev = {
856 .platform_data = &bfin_lq035q1_data,
857 },
858};
859#endif
860
780#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 861#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
781static struct resource bfin_uart_resources[] = { 862static struct resource bfin_uart_resources[] = {
782#ifdef CONFIG_SERIAL_BFIN_UART0 863#ifdef CONFIG_SERIAL_BFIN_UART0
@@ -856,7 +937,7 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
856#if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE) 937#if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE)
857 { 938 {
858 I2C_BOARD_INFO("ad7142_joystick", 0x2C), 939 I2C_BOARD_INFO("ad7142_joystick", 0x2C),
859 .irq = 55, 940 .irq = IRQ_PF5,
860 }, 941 },
861#endif 942#endif
862#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) 943#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
@@ -867,7 +948,14 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
867#if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE) 948#if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
868 { 949 {
869 I2C_BOARD_INFO("pcf8574_keypad", 0x27), 950 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
870 .irq = 72, 951 .irq = IRQ_PG6,
952 },
953#endif
954#if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
955 {
956 I2C_BOARD_INFO("ad7879", 0x2F),
957 .irq = IRQ_PG5,
958 .platform_data = (void *)&bfin_ad7879_ts_info,
871 }, 959 },
872#endif 960#endif
873}; 961};
@@ -997,6 +1085,10 @@ static struct platform_device *stamp_devices[] __initdata = {
997 &bfin_fb_device, 1085 &bfin_fb_device,
998#endif 1086#endif
999 1087
1088#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1089 &bfin_lq035q1_device,
1090#endif
1091
1000#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE) 1092#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
1001 &bfin_fb_adv7393_device, 1093 &bfin_fb_adv7393_device,
1002#endif 1094#endif
diff --git a/arch/blackfin/mach-bf537/head.S b/arch/blackfin/mach-bf537/head.S
index 12eb5cc571d0..f5c94bf80e3b 100644
--- a/arch/blackfin/mach-bf537/head.S
+++ b/arch/blackfin/mach-bf537/head.S
@@ -87,6 +87,9 @@ ENTRY(_start_dma_code)
87 r1 = PLL_BYPASS; /* Bypass the PLL? */ 87 r1 = PLL_BYPASS; /* Bypass the PLL? */
88 r1 = r1 << 8; /* Shift it over */ 88 r1 = r1 << 8; /* Shift it over */
89 r0 = r1 | r0; /* add them all together */ 89 r0 = r1 | r0; /* add them all together */
90#ifdef ANOMALY_05000265
91 BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */
92#endif
90 93
91 p0.h = hi(PLL_CTL); 94 p0.h = hi(PLL_CTL);
92 p0.l = lo(PLL_CTL); /* Load the address */ 95 p0.l = lo(PLL_CTL); /* Load the address */
diff --git a/arch/blackfin/mach-bf537/include/mach/anomaly.h b/arch/blackfin/mach-bf537/include/mach/anomaly.h
index 8460ab9c324f..c68992494f9e 100644
--- a/arch/blackfin/mach-bf537/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf537/include/mach/anomaly.h
@@ -158,6 +158,8 @@
158#define ANOMALY_05000266 (0) 158#define ANOMALY_05000266 (0)
159#define ANOMALY_05000311 (0) 159#define ANOMALY_05000311 (0)
160#define ANOMALY_05000323 (0) 160#define ANOMALY_05000323 (0)
161#define ANOMALY_05000353 (1)
161#define ANOMALY_05000363 (0) 162#define ANOMALY_05000363 (0)
163#define ANOMALY_05000386 (1)
162 164
163#endif 165#endif
diff --git a/arch/blackfin/mach-bf537/include/mach/bf537.h b/arch/blackfin/mach-bf537/include/mach/bf537.h
index cfe2a221112e..24d5c9d42323 100644
--- a/arch/blackfin/mach-bf537/include/mach/bf537.h
+++ b/arch/blackfin/mach-bf537/include/mach/bf537.h
@@ -30,8 +30,6 @@
30#ifndef __MACH_BF537_H__ 30#ifndef __MACH_BF537_H__
31#define __MACH_BF537_H__ 31#define __MACH_BF537_H__
32 32
33#define SUPPORTED_REVID 2
34
35/* Masks for generic ERROR IRQ demultiplexing used in int-priority-sc.c */ 33/* Masks for generic ERROR IRQ demultiplexing used in int-priority-sc.c */
36 34
37#define SPI_ERR_MASK (TXCOL | RBSY | MODF | TXE) /* SPI_STAT */ 35#define SPI_ERR_MASK (TXCOL | RBSY | MODF | TXE) /* SPI_STAT */
@@ -123,19 +121,19 @@
123 121
124#ifdef CONFIG_BF537 122#ifdef CONFIG_BF537
125#define CPU "BF537" 123#define CPU "BF537"
126#define CPUID 0x027c8000 124#define CPUID 0x27c8
127#endif 125#endif
128#ifdef CONFIG_BF536 126#ifdef CONFIG_BF536
129#define CPU "BF536" 127#define CPU "BF536"
130#define CPUID 0x027c8000 128#define CPUID 0x27c8
131#endif 129#endif
132#ifdef CONFIG_BF534 130#ifdef CONFIG_BF534
133#define CPU "BF534" 131#define CPU "BF534"
134#define CPUID 0x027c6000 132#define CPUID 0x27c6
135#endif 133#endif
134
136#ifndef CPU 135#ifndef CPU
137#define CPU "UNKNOWN" 136#error Unknown CPU type - This kernel doesn't seem to be configured properly
138#define CPUID 0x0
139#endif 137#endif
140 138
141#endif /* __MACH_BF537_H__ */ 139#endif /* __MACH_BF537_H__ */
diff --git a/arch/blackfin/mach-bf548/boards/cm_bf548.c b/arch/blackfin/mach-bf548/boards/cm_bf548.c
index ce934ee174e0..24192aaa9275 100644
--- a/arch/blackfin/mach-bf548/boards/cm_bf548.c
+++ b/arch/blackfin/mach-bf548/boards/cm_bf548.c
@@ -36,11 +36,8 @@
36#include <linux/spi/flash.h> 36#include <linux/spi/flash.h>
37#include <linux/irq.h> 37#include <linux/irq.h>
38#include <linux/interrupt.h> 38#include <linux/interrupt.h>
39#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
40#include <linux/usb/musb.h> 39#include <linux/usb/musb.h>
41#endif
42#include <asm/bfin5xx_spi.h> 40#include <asm/bfin5xx_spi.h>
43#include <asm/cplb.h>
44#include <asm/dma.h> 41#include <asm/dma.h>
45#include <asm/gpio.h> 42#include <asm/gpio.h>
46#include <asm/nand.h> 43#include <asm/nand.h>
@@ -175,6 +172,7 @@ static struct resource bfin_uart_resources[] = {
175 { 172 {
176 .start = 0xFFC03100, 173 .start = 0xFFC03100,
177 .end = 0xFFC031FF, 174 .end = 0xFFC031FF,
175 .flags = IORESOURCE_MEM,
178 }, 176 },
179#endif 177#endif
180}; 178};
@@ -268,6 +266,16 @@ static struct resource musb_resources[] = {
268 }, 266 },
269}; 267};
270 268
269static struct musb_hdrc_config musb_config = {
270 .multipoint = 0,
271 .dyn_fifo = 0,
272 .soft_con = 1,
273 .dma = 1,
274 .num_eps = 7,
275 .dma_channels = 7,
276 .gpio_vrsel = GPIO_PH6,
277};
278
271static struct musb_hdrc_platform_data musb_plat = { 279static struct musb_hdrc_platform_data musb_plat = {
272#if defined(CONFIG_USB_MUSB_OTG) 280#if defined(CONFIG_USB_MUSB_OTG)
273 .mode = MUSB_OTG, 281 .mode = MUSB_OTG,
@@ -276,7 +284,7 @@ static struct musb_hdrc_platform_data musb_plat = {
276#elif defined(CONFIG_USB_GADGET_MUSB_HDRC) 284#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
277 .mode = MUSB_PERIPHERAL, 285 .mode = MUSB_PERIPHERAL,
278#endif 286#endif
279 .multipoint = 0, 287 .config = &musb_config,
280}; 288};
281 289
282static u64 musb_dmamask = ~(u32)0; 290static u64 musb_dmamask = ~(u32)0;
@@ -321,12 +329,12 @@ static struct mtd_partition partition_info[] = {
321 { 329 {
322 .name = "linux kernel(nand)", 330 .name = "linux kernel(nand)",
323 .offset = 0, 331 .offset = 0,
324 .size = 4 * SIZE_1M, 332 .size = 4 * 1024 * 1024,
325 }, 333 },
326 { 334 {
327 .name = "file system(nand)", 335 .name = "file system(nand)",
328 .offset = 4 * SIZE_1M, 336 .offset = 4 * 1024 * 1024,
329 .size = (256 - 4) * SIZE_1M, 337 .size = (256 - 4) * 1024 * 1024,
330 }, 338 },
331}; 339};
332 340
diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c
index 39357693046d..5288187a3ace 100644
--- a/arch/blackfin/mach-bf548/boards/ezkit.c
+++ b/arch/blackfin/mach-bf548/boards/ezkit.c
@@ -38,11 +38,8 @@
38#include <linux/irq.h> 38#include <linux/irq.h>
39#include <linux/i2c.h> 39#include <linux/i2c.h>
40#include <linux/interrupt.h> 40#include <linux/interrupt.h>
41#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
42#include <linux/usb/musb.h> 41#include <linux/usb/musb.h>
43#endif
44#include <asm/bfin5xx_spi.h> 42#include <asm/bfin5xx_spi.h>
45#include <asm/cplb.h>
46#include <asm/dma.h> 43#include <asm/dma.h>
47#include <asm/gpio.h> 44#include <asm/gpio.h>
48#include <asm/nand.h> 45#include <asm/nand.h>
@@ -186,6 +183,37 @@ static struct platform_device bf54x_kpad_device = {
186}; 183};
187#endif 184#endif
188 185
186#if defined(CONFIG_JOYSTICK_BFIN_ROTARY) || defined(CONFIG_JOYSTICK_BFIN_ROTARY_MODULE)
187#include <asm/bfin_rotary.h>
188
189static struct bfin_rotary_platform_data bfin_rotary_data = {
190 /*.rotary_up_key = KEY_UP,*/
191 /*.rotary_down_key = KEY_DOWN,*/
192 .rotary_rel_code = REL_WHEEL,
193 .rotary_button_key = KEY_ENTER,
194 .debounce = 10, /* 0..17 */
195 .mode = ROT_QUAD_ENC | ROT_DEBE,
196};
197
198static struct resource bfin_rotary_resources[] = {
199 {
200 .start = IRQ_CNT,
201 .end = IRQ_CNT,
202 .flags = IORESOURCE_IRQ,
203 },
204};
205
206static struct platform_device bfin_rotary_device = {
207 .name = "bfin-rotary",
208 .id = -1,
209 .num_resources = ARRAY_SIZE(bfin_rotary_resources),
210 .resource = bfin_rotary_resources,
211 .dev = {
212 .platform_data = &bfin_rotary_data,
213 },
214};
215#endif
216
189#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) 217#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
190static struct platform_device rtc_device = { 218static struct platform_device rtc_device = {
191 .name = "rtc-bfin", 219 .name = "rtc-bfin",
@@ -314,6 +342,16 @@ static struct resource musb_resources[] = {
314 }, 342 },
315}; 343};
316 344
345static struct musb_hdrc_config musb_config = {
346 .multipoint = 0,
347 .dyn_fifo = 0,
348 .soft_con = 1,
349 .dma = 1,
350 .num_eps = 7,
351 .dma_channels = 7,
352 .gpio_vrsel = GPIO_PE7,
353};
354
317static struct musb_hdrc_platform_data musb_plat = { 355static struct musb_hdrc_platform_data musb_plat = {
318#if defined(CONFIG_USB_MUSB_OTG) 356#if defined(CONFIG_USB_MUSB_OTG)
319 .mode = MUSB_OTG, 357 .mode = MUSB_OTG,
@@ -322,7 +360,7 @@ static struct musb_hdrc_platform_data musb_plat = {
322#elif defined(CONFIG_USB_GADGET_MUSB_HDRC) 360#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
323 .mode = MUSB_PERIPHERAL, 361 .mode = MUSB_PERIPHERAL,
324#endif 362#endif
325 .multipoint = 0, 363 .config = &musb_config,
326}; 364};
327 365
328static u64 musb_dmamask = ~(u32)0; 366static u64 musb_dmamask = ~(u32)0;
@@ -367,7 +405,7 @@ static struct mtd_partition partition_info[] = {
367 { 405 {
368 .name = "linux kernel(nand)", 406 .name = "linux kernel(nand)",
369 .offset = 0, 407 .offset = 0,
370 .size = 4 * SIZE_1M, 408 .size = 4 * 1024 * 1024,
371 }, 409 },
372 { 410 {
373 .name = "file system(nand)", 411 .name = "file system(nand)",
@@ -424,7 +462,7 @@ static struct mtd_partition ezkit_partitions[] = {
424 .offset = 0, 462 .offset = 0,
425 }, { 463 }, {
426 .name = "linux kernel(nor)", 464 .name = "linux kernel(nor)",
427 .size = 0x1C0000, 465 .size = 0x400000,
428 .offset = MTDPART_OFS_APPEND, 466 .offset = MTDPART_OFS_APPEND,
429 }, { 467 }, {
430 .name = "file system(nor)", 468 .name = "file system(nor)",
@@ -441,7 +479,7 @@ static struct physmap_flash_data ezkit_flash_data = {
441 479
442static struct resource ezkit_flash_resource = { 480static struct resource ezkit_flash_resource = {
443 .start = 0x20000000, 481 .start = 0x20000000,
444 .end = 0x20ffffff, 482 .end = 0x21ffffff,
445 .flags = IORESOURCE_MEM, 483 .flags = IORESOURCE_MEM,
446}; 484};
447 485
@@ -551,7 +589,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
551{ 589{
552 .modalias = "ad7877", 590 .modalias = "ad7877",
553 .platform_data = &bfin_ad7877_ts_info, 591 .platform_data = &bfin_ad7877_ts_info,
554 .irq = IRQ_PJ11, 592 .irq = IRQ_PJ11, /* newer boards (Rev 1.4+) use IRQ_PB4 */
555 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ 593 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
556 .bus_num = 0, 594 .bus_num = 0,
557 .chip_select = 2, 595 .chip_select = 2,
@@ -810,6 +848,10 @@ static struct platform_device *ezkit_devices[] __initdata = {
810 &bf54x_kpad_device, 848 &bf54x_kpad_device,
811#endif 849#endif
812 850
851#if defined(CONFIG_JOYSTICK_BFIN_ROTARY) || defined(CONFIG_JOYSTICK_BFIN_ROTARY_MODULE)
852 &bfin_rotary_device,
853#endif
854
813#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) 855#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
814 &i2c_bfin_twi0_device, 856 &i2c_bfin_twi0_device,
815#if !defined(CONFIG_BF542) 857#if !defined(CONFIG_BF542)
diff --git a/arch/blackfin/mach-bf548/head.S b/arch/blackfin/mach-bf548/head.S
index 4d5cfeacb123..93b361dff27b 100644
--- a/arch/blackfin/mach-bf548/head.S
+++ b/arch/blackfin/mach-bf548/head.S
@@ -73,25 +73,19 @@ ENTRY(_start_dma_code)
73 w[p0] = r0.l; 73 w[p0] = r0.l;
74 ssync; 74 ssync;
75 75
76#if defined(CONFIG_BF54x) 76 /* enable self refresh via SRREQ */
77 P2.H = hi(EBIU_RSTCTL); 77 P2.H = hi(EBIU_RSTCTL);
78 P2.L = lo(EBIU_RSTCTL); 78 P2.L = lo(EBIU_RSTCTL);
79 R0 = [P2]; 79 R0 = [P2];
80 BITSET (R0, 3); 80 BITSET (R0, 3);
81#else
82 P2.H = hi(EBIU_SDGCTL);
83 P2.L = lo(EBIU_SDGCTL);
84 R0 = [P2];
85 BITSET (R0, 24);
86#endif
87 [P2] = R0; 81 [P2] = R0;
88 SSYNC; 82 SSYNC;
89#if defined(CONFIG_BF54x) 83
84 /* wait for SRACK bit to be set */
90.LSRR_MODE: 85.LSRR_MODE:
91 R0 = [P2]; 86 R0 = [P2];
92 CC = BITTST(R0, 4); 87 CC = BITTST(R0, 4);
93 if !CC JUMP .LSRR_MODE; 88 if !CC JUMP .LSRR_MODE;
94#endif
95 89
96 r0 = CONFIG_VCO_MULT & 63; /* Load the VCO multiplier */ 90 r0 = CONFIG_VCO_MULT & 63; /* Load the VCO multiplier */
97 r0 = r0 << 9; /* Shift it over, */ 91 r0 = r0 << 9; /* Shift it over, */
@@ -100,6 +94,9 @@ ENTRY(_start_dma_code)
100 r1 = PLL_BYPASS; /* Bypass the PLL? */ 94 r1 = PLL_BYPASS; /* Bypass the PLL? */
101 r1 = r1 << 8; /* Shift it over */ 95 r1 = r1 << 8; /* Shift it over */
102 r0 = r1 | r0; /* add them all together */ 96 r0 = r1 | r0; /* add them all together */
97#ifdef ANOMALY_05000265
98 BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */
99#endif
103 100
104 p0.h = hi(PLL_CTL); 101 p0.h = hi(PLL_CTL);
105 p0.l = lo(PLL_CTL); /* Load the address */ 102 p0.l = lo(PLL_CTL); /* Load the address */
@@ -123,7 +120,7 @@ ENTRY(_start_dma_code)
123 w[p0] = r0.l; 120 w[p0] = r0.l;
124 ssync; 121 ssync;
125 122
126#if defined(CONFIG_BF54x) 123 /* disable self refresh by clearing SRREQ */
127 P2.H = hi(EBIU_RSTCTL); 124 P2.H = hi(EBIU_RSTCTL);
128 P2.L = lo(EBIU_RSTCTL); 125 P2.L = lo(EBIU_RSTCTL);
129 R0 = [P2]; 126 R0 = [P2];
@@ -155,41 +152,6 @@ ENTRY(_start_dma_code)
155 r0.h = hi(mem_DDRCTL2); 152 r0.h = hi(mem_DDRCTL2);
156 [p0] = r0; 153 [p0] = r0;
157 ssync; 154 ssync;
158#else
159 p0.l = lo(EBIU_SDRRC);
160 p0.h = hi(EBIU_SDRRC);
161 r0 = mem_SDRRC;
162 w[p0] = r0.l;
163 ssync;
164
165 p0.l = LO(EBIU_SDBCTL);
166 p0.h = HI(EBIU_SDBCTL); /* SDRAM Memory Bank Control Register */
167 r0 = mem_SDBCTL;
168 w[p0] = r0.l;
169 ssync;
170
171 P2.H = hi(EBIU_SDGCTL);
172 P2.L = lo(EBIU_SDGCTL);
173 R0 = [P2];
174 BITCLR (R0, 24);
175 p0.h = hi(EBIU_SDSTAT);
176 p0.l = lo(EBIU_SDSTAT);
177 r2.l = w[p0];
178 cc = bittst(r2,3);
179 if !cc jump .Lskip;
180 NOP;
181 BITSET (R0, 23);
182.Lskip:
183 [P2] = R0;
184 SSYNC;
185
186 R0.L = lo(mem_SDGCTL);
187 R0.H = hi(mem_SDGCTL);
188 R1 = [p2];
189 R1 = R1 | R0;
190 [P2] = R1;
191 SSYNC;
192#endif
193 155
194 RTS; 156 RTS;
195ENDPROC(_start_dma_code) 157ENDPROC(_start_dma_code)
diff --git a/arch/blackfin/mach-bf548/include/mach/anomaly.h b/arch/blackfin/mach-bf548/include/mach/anomaly.h
index 3ad59655881a..816b09278f62 100644
--- a/arch/blackfin/mach-bf548/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf548/include/mach/anomaly.h
@@ -2,18 +2,18 @@
2 * File: include/asm-blackfin/mach-bf548/anomaly.h 2 * File: include/asm-blackfin/mach-bf548/anomaly.h
3 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 3 * Bugs: Enter bugs at http://blackfin.uclinux.org/
4 * 4 *
5 * Copyright (C) 2004-2007 Analog Devices Inc. 5 * Copyright (C) 2004-2008 Analog Devices Inc.
6 * Licensed under the GPL-2 or later. 6 * Licensed under the GPL-2 or later.
7 */ 7 */
8 8
9/* This file shoule be up to date with: 9/* This file shoule be up to date with:
10 * - Revision E, 11/28/2007; ADSP-BF542/BF544/BF547/BF548/BF549 Blackfin Processor Anomaly List 10 * - Revision G, 08/07/2008; ADSP-BF542/BF544/BF547/BF548/BF549 Blackfin Processor Anomaly List
11 */ 11 */
12 12
13#ifndef _MACH_ANOMALY_H_ 13#ifndef _MACH_ANOMALY_H_
14#define _MACH_ANOMALY_H_ 14#define _MACH_ANOMALY_H_
15 15
16/* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot 2 Not Supported */ 16/* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported */
17#define ANOMALY_05000074 (1) 17#define ANOMALY_05000074 (1)
18/* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */ 18/* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */
19#define ANOMALY_05000119 (1) 19#define ANOMALY_05000119 (1)
@@ -36,14 +36,14 @@
36/* TWI Slave Boot Mode Is Not Functional */ 36/* TWI Slave Boot Mode Is Not Functional */
37#define ANOMALY_05000324 (__SILICON_REVISION__ < 1) 37#define ANOMALY_05000324 (__SILICON_REVISION__ < 1)
38/* External FIFO Boot Mode Is Not Functional */ 38/* External FIFO Boot Mode Is Not Functional */
39#define ANOMALY_05000325 (__SILICON_REVISION__ < 1) 39#define ANOMALY_05000325 (__SILICON_REVISION__ < 2)
40/* Data Lost When Core and DMA Accesses Are Made to the USB FIFO Simultaneously */ 40/* Data Lost When Core and DMA Accesses Are Made to the USB FIFO Simultaneously */
41#define ANOMALY_05000327 (__SILICON_REVISION__ < 1) 41#define ANOMALY_05000327 (__SILICON_REVISION__ < 1)
42/* Incorrect Access of OTP_STATUS During otp_write() Function */ 42/* Incorrect Access of OTP_STATUS During otp_write() Function */
43#define ANOMALY_05000328 (__SILICON_REVISION__ < 1) 43#define ANOMALY_05000328 (__SILICON_REVISION__ < 1)
44/* Synchronous Burst Flash Boot Mode Is Not Functional */ 44/* Synchronous Burst Flash Boot Mode Is Not Functional */
45#define ANOMALY_05000329 (__SILICON_REVISION__ < 1) 45#define ANOMALY_05000329 (__SILICON_REVISION__ < 1)
46/* Host DMA Boot Mode Is Not Functional */ 46/* Host DMA Boot Modes Are Not Functional */
47#define ANOMALY_05000330 (__SILICON_REVISION__ < 1) 47#define ANOMALY_05000330 (__SILICON_REVISION__ < 1)
48/* Inadequate Timing Margins on DDR DQS to DQ and DQM Skew */ 48/* Inadequate Timing Margins on DDR DQS to DQ and DQM Skew */
49#define ANOMALY_05000334 (__SILICON_REVISION__ < 1) 49#define ANOMALY_05000334 (__SILICON_REVISION__ < 1)
@@ -61,26 +61,102 @@
61#define ANOMALY_05000344 (__SILICON_REVISION__ < 1) 61#define ANOMALY_05000344 (__SILICON_REVISION__ < 1)
62/* USB Calibration Value Is Not Intialized */ 62/* USB Calibration Value Is Not Intialized */
63#define ANOMALY_05000346 (__SILICON_REVISION__ < 1) 63#define ANOMALY_05000346 (__SILICON_REVISION__ < 1)
64/* Boot ROM Kernel Incorrectly Alters Reset Value of USB Register */ 64/* USB Calibration Value to use */
65#define ANOMALY_05000346_value 0x5411
66/* Preboot Routine Incorrectly Alters Reset Value of USB Register */
65#define ANOMALY_05000347 (__SILICON_REVISION__ < 1) 67#define ANOMALY_05000347 (__SILICON_REVISION__ < 1)
66/* Data Lost when Core Reads SDH Data FIFO */ 68/* Data Lost when Core Reads SDH Data FIFO */
67#define ANOMALY_05000349 (__SILICON_REVISION__ < 1) 69#define ANOMALY_05000349 (__SILICON_REVISION__ < 1)
68/* PLL Status Register Is Inaccurate */ 70/* PLL Status Register Is Inaccurate */
69#define ANOMALY_05000351 (__SILICON_REVISION__ < 1) 71#define ANOMALY_05000351 (__SILICON_REVISION__ < 1)
72/* bfrom_SysControl() Firmware Function Performs Improper System Reset */
73#define ANOMALY_05000353 (__SILICON_REVISION__ < 2)
74/* Regulator Programming Blocked when Hibernate Wakeup Source Remains Active */
75#define ANOMALY_05000355 (__SILICON_REVISION__ < 1)
76/* System Stalled During A Core Access To AMC While A Core Access To NFC FIFO Is Required */
77#define ANOMALY_05000356 (__SILICON_REVISION__ < 1)
70/* Serial Port (SPORT) Multichannel Transmit Failure when Channel 0 Is Disabled */ 78/* Serial Port (SPORT) Multichannel Transmit Failure when Channel 0 Is Disabled */
71#define ANOMALY_05000357 (1) 79#define ANOMALY_05000357 (1)
72/* External Memory Read Access Hangs Core With PLL Bypass */ 80/* External Memory Read Access Hangs Core With PLL Bypass */
73#define ANOMALY_05000360 (1) 81#define ANOMALY_05000360 (1)
74/* DMAs that Go Urgent during Tight Core Writes to External Memory Are Blocked */ 82/* DMAs that Go Urgent during Tight Core Writes to External Memory Are Blocked */
75#define ANOMALY_05000365 (1) 83#define ANOMALY_05000365 (1)
84/* WURESET Bit In SYSCR Register Does Not Properly Indicate Hibernate Wake-Up */
85#define ANOMALY_05000367 (__SILICON_REVISION__ < 1)
76/* Addressing Conflict between Boot ROM and Asynchronous Memory */ 86/* Addressing Conflict between Boot ROM and Asynchronous Memory */
77#define ANOMALY_05000369 (1) 87#define ANOMALY_05000369 (1)
88/* Default PLL MSEL and SSEL Settings Can Cause 400MHz Product To Violate Specifications */
89#define ANOMALY_05000370 (__SILICON_REVISION__ < 1)
78/* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */ 90/* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */
79#define ANOMALY_05000371 (1) 91#define ANOMALY_05000371 (__SILICON_REVISION__ < 2)
92/* USB DP/DM Data Pins May Lose State When Entering Hibernate */
93#define ANOMALY_05000372 (__SILICON_REVISION__ < 1)
80/* Mobile DDR Operation Not Functional */ 94/* Mobile DDR Operation Not Functional */
81#define ANOMALY_05000377 (1) 95#define ANOMALY_05000377 (1)
82/* Security/Authentication Speedpath Causes Authentication To Fail To Initiate */ 96/* Security/Authentication Speedpath Causes Authentication To Fail To Initiate */
83#define ANOMALY_05000378 (1) 97#define ANOMALY_05000378 (__SILICON_REVISION__ < 2)
98/* 16-Bit NAND FLASH Boot Mode Is Not Functional */
99#define ANOMALY_05000379 (1)
100/* 8-Bit NAND Flash Boot Mode Not Functional */
101#define ANOMALY_05000382 (__SILICON_REVISION__ < 1)
102/* Some ATAPI Modes Are Not Functional */
103#define ANOMALY_05000383 (1)
104/* Boot from OTP Memory Not Functional */
105#define ANOMALY_05000385 (__SILICON_REVISION__ < 1)
106/* bfrom_SysControl() Firmware Routine Not Functional */
107#define ANOMALY_05000386 (__SILICON_REVISION__ < 1)
108/* Programmable Preboot Settings Not Functional */
109#define ANOMALY_05000387 (__SILICON_REVISION__ < 1)
110/* CRC32 Checksum Support Not Functional */
111#define ANOMALY_05000388 (__SILICON_REVISION__ < 1)
112/* Reset Vector Must Not Be in SDRAM Memory Space */
113#define ANOMALY_05000389 (__SILICON_REVISION__ < 1)
114/* Changed Meaning of BCODE Field in SYSCR Register */
115#define ANOMALY_05000390 (__SILICON_REVISION__ < 1)
116/* Repeated Boot from Page-Mode or Burst-Mode Flash Memory May Fail */
117#define ANOMALY_05000391 (__SILICON_REVISION__ < 1)
118/* pTempCurrent Not Present in ADI_BOOT_DATA Structure */
119#define ANOMALY_05000392 (__SILICON_REVISION__ < 1)
120/* Deprecated Value of dTempByteCount in ADI_BOOT_DATA Structure */
121#define ANOMALY_05000393 (__SILICON_REVISION__ < 1)
122/* Log Buffer Not Functional */
123#define ANOMALY_05000394 (__SILICON_REVISION__ < 1)
124/* Hook Routine Not Functional */
125#define ANOMALY_05000395 (__SILICON_REVISION__ < 1)
126/* Header Indirect Bit Not Functional */
127#define ANOMALY_05000396 (__SILICON_REVISION__ < 1)
128/* BK_ONES, BK_ZEROS, and BK_DATECODE Constants Not Functional */
129#define ANOMALY_05000397 (__SILICON_REVISION__ < 1)
130/* Lockbox SESR Disallows Certain User Interrupts */
131#define ANOMALY_05000404 (__SILICON_REVISION__ < 2)
132/* Lockbox SESR Firmware Does Not Save/Restore Full Context */
133#define ANOMALY_05000405 (1)
134/* Lockbox SESR Argument Checking Does Not Check L2 Memory Protection Range */
135#define ANOMALY_05000406 (__SILICON_REVISION__ < 2)
136/* Lockbox SESR Firmware Arguments Are Not Retained After First Initialization */
137#define ANOMALY_05000407 (__SILICON_REVISION__ < 2)
138/* Lockbox Firmware Memory Cleanup Routine Does not Clear Registers */
139#define ANOMALY_05000408 (1)
140/* Lockbox firmware leaves MDMA0 channel enabled */
141#define ANOMALY_05000409 (__SILICON_REVISION__ < 2)
142/* bfrom_SysControl() Firmware Function Cannot be Used to Enter Power Saving Modes */
143#define ANOMALY_05000411 (__SILICON_REVISION__ < 2)
144/* NAND Boot Mode Not Compatible With Some NAND Flash Devices */
145#define ANOMALY_05000413 (__SILICON_REVISION__ < 2)
146/* OTP_CHECK_FOR_PREV_WRITE Bit is Not Functional in bfrom_OtpWrite() API */
147#define ANOMALY_05000414 (__SILICON_REVISION__ < 2)
148/* Speculative Fetches Can Cause Undesired External FIFO Operations */
149#define ANOMALY_05000416 (1)
150/* Multichannel SPORT Channel Misalignment Under Specific Configuration */
151#define ANOMALY_05000425 (1)
152/* Speculative Fetches of Indirect-Pointer Instructions Can Cause Spurious Hardware Errors */
153#define ANOMALY_05000426 (1)
154/* CORE_EPPI_PRIO bit and SYS_EPPI_PRIO bit in the HMDMA1_CONTROL register are not functional */
155#define ANOMALY_05000427 (__SILICON_REVISION__ < 2)
156/* WB_EDGE Bit in NFC_IRQSTAT Incorrectly Behaves as a Buffer Status Bit Instead of an IRQ Status Bit */
157#define ANOMALY_05000429 (__SILICON_REVISION__ < 2)
158/* Software System Reset Corrupts PLL_LOCKCNT Register */
159#define ANOMALY_05000430 (__SILICON_REVISION__ >= 2)
84 160
85/* Anomalies that don't exist on this proc */ 161/* Anomalies that don't exist on this proc */
86#define ANOMALY_05000125 (0) 162#define ANOMALY_05000125 (0)
@@ -93,6 +169,7 @@
93#define ANOMALY_05000263 (0) 169#define ANOMALY_05000263 (0)
94#define ANOMALY_05000266 (0) 170#define ANOMALY_05000266 (0)
95#define ANOMALY_05000273 (0) 171#define ANOMALY_05000273 (0)
172#define ANOMALY_05000307 (0)
96#define ANOMALY_05000311 (0) 173#define ANOMALY_05000311 (0)
97#define ANOMALY_05000323 (0) 174#define ANOMALY_05000323 (0)
98#define ANOMALY_05000363 (0) 175#define ANOMALY_05000363 (0)
diff --git a/arch/blackfin/mach-bf548/include/mach/bf548.h b/arch/blackfin/mach-bf548/include/mach/bf548.h
index e748588e8930..49f9b403d458 100644
--- a/arch/blackfin/mach-bf548/include/mach/bf548.h
+++ b/arch/blackfin/mach-bf548/include/mach/bf548.h
@@ -30,8 +30,6 @@
30#ifndef __MACH_BF548_H__ 30#ifndef __MACH_BF548_H__
31#define __MACH_BF548_H__ 31#define __MACH_BF548_H__
32 32
33#define SUPPORTED_REVID 0
34
35#define OFFSET_(x) ((x) & 0x0000FFFF) 33#define OFFSET_(x) ((x) & 0x0000FFFF)
36 34
37/*some misc defines*/ 35/*some misc defines*/
@@ -108,20 +106,23 @@
108 106
109#if defined(CONFIG_BF542) 107#if defined(CONFIG_BF542)
110# define CPU "BF542" 108# define CPU "BF542"
111# define CPUID 0x027c8000 109# define CPUID 0x27de
112#elif defined(CONFIG_BF544) 110#elif defined(CONFIG_BF544)
113# define CPU "BF544" 111# define CPU "BF544"
114# define CPUID 0x027c8000 112# define CPUID 0x27de
115#elif defined(CONFIG_BF547) 113#elif defined(CONFIG_BF547)
116# define CPU "BF547" 114# define CPU "BF547"
115# define CPUID 0x27de
117#elif defined(CONFIG_BF548) 116#elif defined(CONFIG_BF548)
118# define CPU "BF548" 117# define CPU "BF548"
119# define CPUID 0x027c6000 118# define CPUID 0x27de
120#elif defined(CONFIG_BF549) 119#elif defined(CONFIG_BF549)
121# define CPU "BF549" 120# define CPU "BF549"
122#else 121# define CPUID 0x27de
123# define CPU "UNKNOWN" 122#endif
124# define CPUID 0x0 123
124#ifndef CPU
125#error Unknown CPU type - This kernel doesn't seem to be configured properly
125#endif 126#endif
126 127
127#endif /* __MACH_BF48_H__ */ 128#endif /* __MACH_BF48_H__ */
diff --git a/arch/blackfin/mach-bf548/include/mach/mem_map.h b/arch/blackfin/mach-bf548/include/mach/mem_map.h
index f99f47bc3a07..a2228428dc06 100644
--- a/arch/blackfin/mach-bf548/include/mach/mem_map.h
+++ b/arch/blackfin/mach-bf548/include/mach/mem_map.h
@@ -94,13 +94,13 @@
94#endif /*CONFIG_BFIN_DCACHE*/ 94#endif /*CONFIG_BFIN_DCACHE*/
95 95
96/* Level 2 Memory */ 96/* Level 2 Memory */
97#if !defined(CONFIG_BF542) 97#define L2_START 0xFEB00000
98# define L2_START 0xFEB00000 98#if defined(CONFIG_BF542)
99# if defined(CONFIG_BF544) 99# define L2_LENGTH 0
100# define L2_LENGTH 0x10000 100#elif defined(CONFIG_BF544)
101# else 101# define L2_LENGTH 0x10000
102# define L2_LENGTH 0x20000 102#else
103# endif 103# define L2_LENGTH 0x20000
104#endif 104#endif
105 105
106/* Scratch Pad Memory */ 106/* Scratch Pad Memory */
diff --git a/arch/blackfin/mach-bf561/head.S b/arch/blackfin/mach-bf561/head.S
index 75ea6a905829..31a777a9e699 100644
--- a/arch/blackfin/mach-bf561/head.S
+++ b/arch/blackfin/mach-bf561/head.S
@@ -77,6 +77,9 @@ ENTRY(_start_dma_code)
77 r1 = PLL_BYPASS; /* Bypass the PLL? */ 77 r1 = PLL_BYPASS; /* Bypass the PLL? */
78 r1 = r1 << 8; /* Shift it over */ 78 r1 = r1 << 8; /* Shift it over */
79 r0 = r1 | r0; /* add them all together */ 79 r0 = r1 | r0; /* add them all together */
80#ifdef ANOMALY_05000265
81 BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */
82#endif
80 83
81 p0.h = hi(PLL_CTL); 84 p0.h = hi(PLL_CTL);
82 p0.l = lo(PLL_CTL); /* Load the address */ 85 p0.l = lo(PLL_CTL); /* Load the address */
diff --git a/arch/blackfin/mach-bf561/include/mach/anomaly.h b/arch/blackfin/mach-bf561/include/mach/anomaly.h
index 5c5d7d7d695f..22990df04ae1 100644
--- a/arch/blackfin/mach-bf561/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf561/include/mach/anomaly.h
@@ -270,5 +270,7 @@
270#define ANOMALY_05000183 (0) 270#define ANOMALY_05000183 (0)
271#define ANOMALY_05000273 (0) 271#define ANOMALY_05000273 (0)
272#define ANOMALY_05000311 (0) 272#define ANOMALY_05000311 (0)
273#define ANOMALY_05000353 (1)
274#define ANOMALY_05000386 (1)
273 275
274#endif 276#endif
diff --git a/arch/blackfin/mach-bf561/include/mach/bf561.h b/arch/blackfin/mach-bf561/include/mach/bf561.h
index 3ef9e5f36136..18b1b3a223ab 100644
--- a/arch/blackfin/mach-bf561/include/mach/bf561.h
+++ b/arch/blackfin/mach-bf561/include/mach/bf561.h
@@ -30,8 +30,6 @@
30#ifndef __MACH_BF561_H__ 30#ifndef __MACH_BF561_H__
31#define __MACH_BF561_H__ 31#define __MACH_BF561_H__
32 32
33#define SUPPORTED_REVID 0x3
34
35#define OFFSET_(x) ((x) & 0x0000FFFF) 33#define OFFSET_(x) ((x) & 0x0000FFFF)
36 34
37/*some misc defines*/ 35/*some misc defines*/
@@ -213,11 +211,11 @@
213 211
214#ifdef CONFIG_BF561 212#ifdef CONFIG_BF561
215#define CPU "BF561" 213#define CPU "BF561"
216#define CPUID 0x027bb000 214#define CPUID 0x27bb
217#endif 215#endif
216
218#ifndef CPU 217#ifndef CPU
219#define CPU "UNKNOWN" 218#error Unknown CPU type - This kernel doesn't seem to be configured properly
220#define CPUID 0x0
221#endif 219#endif
222 220
223#endif /* __MACH_BF561_H__ */ 221#endif /* __MACH_BF561_H__ */
diff --git a/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h
index e0ce0c1843d4..043bfcf26c52 100644
--- a/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h
@@ -85,7 +85,7 @@ struct bfin_serial_port {
85 unsigned int rx_dma_channel; 85 unsigned int rx_dma_channel;
86 struct work_struct tx_dma_workqueue; 86 struct work_struct tx_dma_workqueue;
87#else 87#else
88# if ANOMALY_05000230 88# if ANOMALY_05000363
89 unsigned int anomaly_threshold; 89 unsigned int anomaly_threshold;
90# endif 90# endif
91#endif 91#endif
@@ -158,7 +158,7 @@ static void bfin_serial_hw_init(struct bfin_serial_port *uart)
158 } 158 }
159 if (uart->rts_pin >= 0) { 159 if (uart->rts_pin >= 0) {
160 gpio_request(uart->rts_pin, DRIVER_NAME); 160 gpio_request(uart->rts_pin, DRIVER_NAME);
161 gpio_direction_input(uart->rts_pin, 0); 161 gpio_direction_output(uart->rts_pin, 0);
162 } 162 }
163#endif 163#endif
164} 164}
diff --git a/arch/blackfin/mach-bf561/include/mach/mem_map.h b/arch/blackfin/mach-bf561/include/mach/mem_map.h
index c26d8486cc4b..f1d4c0637bd2 100644
--- a/arch/blackfin/mach-bf561/include/mach/mem_map.h
+++ b/arch/blackfin/mach-bf561/include/mach/mem_map.h
@@ -35,9 +35,16 @@
35/* Memory Map for ADSP-BF561 processors */ 35/* Memory Map for ADSP-BF561 processors */
36 36
37#ifdef CONFIG_BF561 37#ifdef CONFIG_BF561
38#define L1_CODE_START 0xFFA00000 38#define COREA_L1_CODE_START 0xFFA00000
39#define L1_DATA_A_START 0xFF800000 39#define COREA_L1_DATA_A_START 0xFF800000
40#define L1_DATA_B_START 0xFF900000 40#define COREA_L1_DATA_B_START 0xFF900000
41#define COREB_L1_CODE_START 0xFF600000
42#define COREB_L1_DATA_A_START 0xFF400000
43#define COREB_L1_DATA_B_START 0xFF500000
44
45#define L1_CODE_START COREA_L1_CODE_START
46#define L1_DATA_A_START COREA_L1_DATA_A_START
47#define L1_DATA_B_START COREA_L1_DATA_B_START
41 48
42#define L1_CODE_LENGTH 0x4000 49#define L1_CODE_LENGTH 0x4000
43 50
@@ -72,7 +79,10 @@
72 79
73/* Scratch Pad Memory */ 80/* Scratch Pad Memory */
74 81
75#define L1_SCRATCH_START 0xFFB00000 82#define COREA_L1_SCRATCH_START 0xFFB00000
83#define COREB_L1_SCRATCH_START 0xFF700000
84
85#define L1_SCRATCH_START COREA_L1_SCRATCH_START
76#define L1_SCRATCH_LENGTH 0x1000 86#define L1_SCRATCH_LENGTH 0x1000
77 87
78#endif /* _MEM_MAP_533_H_ */ 88#endif /* _MEM_MAP_533_H_ */
diff --git a/arch/blackfin/mach-common/cache.S b/arch/blackfin/mach-common/cache.S
index 85f8c79b3c37..db532181fbde 100644
--- a/arch/blackfin/mach-common/cache.S
+++ b/arch/blackfin/mach-common/cache.S
@@ -1,148 +1,91 @@
1/* 1/*
2 * File: arch/blackfin/mach-common/cache.S 2 * Blackfin cache control code
3 * Based on:
4 * Author: LG Soft India
5 * 3 *
6 * Created: 4 * Copyright 2004-2008 Analog Devices Inc.
7 * Description: cache control support
8 * 5 *
9 * Modified: 6 * Enter bugs at http://blackfin.uclinux.org/
10 * Copyright 2004-2006 Analog Devices Inc.
11 * 7 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 8 * Licensed under the GPL-2 or later.
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28 */ 9 */
29 10
30#include <linux/linkage.h> 11#include <linux/linkage.h>
31#include <asm/cplb.h>
32#include <asm/entry.h>
33#include <asm/blackfin.h> 12#include <asm/blackfin.h>
34#include <asm/cache.h> 13#include <asm/cache.h>
14#include <asm/page.h>
35 15
36.text 16.text
37 17
38/* 18/* Since all L1 caches work the same way, we use the same method for flushing
39 * blackfin_cache_flush_range(start, end) 19 * them. Only the actual flush instruction differs. We write this in asm as
40 * Invalidate all cache lines assocoiated with this 20 * GCC can be hard to coax into writing nice hardware loops.
41 * area of memory.
42 * 21 *
43 * start: Start address 22 * Also, we assume the following register setup:
44 * end: End address 23 * R0 = start address
24 * R1 = end address
45 */ 25 */
46ENTRY(_blackfin_icache_flush_range) 26.macro do_flush flushins:req optflushins optnopins label
27
28 /* end = ((end - 1) & -L1_CACHE_BYTES) + L1_CACHE_BYTES; */
29 R1 += -1;
47 R2 = -L1_CACHE_BYTES; 30 R2 = -L1_CACHE_BYTES;
48 R2 = R0 & R2; 31 R1 = R1 & R2;
49 P0 = R2; 32 R1 += L1_CACHE_BYTES;
50 P1 = R1; 33
51 CSYNC(R3); 34 /* count = (end - start) >> L1_CACHE_SHIFT */
52 IFLUSH [P0]; 35 R2 = R1 - R0;
36 R2 >>= L1_CACHE_SHIFT;
37 P1 = R2;
38
39.ifnb \label
40\label :
41.endif
42 P0 = R0;
43 LSETUP (1f, 2f) LC1 = P1;
531: 441:
54 IFLUSH [P0++]; 45.ifnb \optflushins
55 CC = P0 < P1 (iu); 46 \optflushins [P0];
56 IF CC JUMP 1b (bp); 47.endif
57 IFLUSH [P0]; 48.ifb \optnopins
58 SSYNC(R3); 492:
50.endif
51 \flushins [P0++];
52.ifnb \optnopins
532: \optnopins;
54.endif
55
59 RTS; 56 RTS;
60ENDPROC(_blackfin_icache_flush_range) 57.endm
61 58
62/* 59/* Invalidate all instruction cache lines assocoiated with this memory area */
63 * blackfin_icache_dcache_flush_range(start, end) 60ENTRY(_blackfin_icache_flush_range)
64 * FLUSH all cache lines assocoiated with this 61 do_flush IFLUSH, , nop
65 * area of memory. 62ENDPROC(_blackfin_icache_flush_range)
66 *
67 * start: Start address
68 * end: End address
69 */
70 63
64/* Flush all cache lines assocoiated with this area of memory. */
71ENTRY(_blackfin_icache_dcache_flush_range) 65ENTRY(_blackfin_icache_dcache_flush_range)
72 R2 = -L1_CACHE_BYTES; 66 do_flush IFLUSH, FLUSH
73 R2 = R0 & R2;
74 P0 = R2;
75 P1 = R1;
76 CSYNC(R3);
77 IFLUSH [P0];
781:
79 FLUSH [P0];
80 IFLUSH [P0++];
81 CC = P0 < P1 (iu);
82 IF CC JUMP 1b (bp);
83 IFLUSH [P0];
84 FLUSH [P0];
85 SSYNC(R3);
86 RTS;
87ENDPROC(_blackfin_icache_dcache_flush_range) 67ENDPROC(_blackfin_icache_dcache_flush_range)
88 68
89/* Throw away all D-cached data in specified region without any obligation to 69/* Throw away all D-cached data in specified region without any obligation to
90 * write them back. However, we must clean the D-cached entries around the 70 * write them back. Since the Blackfin ISA does not have an "invalidate"
91 * boundaries of the start and/or end address is not cache aligned. 71 * instruction, we use flush/invalidate. Perhaps as a speed optimization we
92 * 72 * could bang on the DTEST MMRs ...
93 * Start: start address,
94 * end : end address.
95 */ 73 */
96
97ENTRY(_blackfin_dcache_invalidate_range) 74ENTRY(_blackfin_dcache_invalidate_range)
98 R2 = -L1_CACHE_BYTES; 75 do_flush FLUSHINV
99 R2 = R0 & R2;
100 P0 = R2;
101 P1 = R1;
102 CSYNC(R3);
103 FLUSHINV[P0];
1041:
105 FLUSHINV[P0++];
106 CC = P0 < P1 (iu);
107 IF CC JUMP 1b (bp);
108
109 /* If the data crosses a cache line, then we'll be pointing to
110 * the last cache line, but won't have flushed/invalidated it yet,
111 * so do one more.
112 */
113 FLUSHINV[P0];
114 SSYNC(R3);
115 RTS;
116ENDPROC(_blackfin_dcache_invalidate_range) 76ENDPROC(_blackfin_dcache_invalidate_range)
117 77
78/* Flush all data cache lines assocoiated with this memory area */
118ENTRY(_blackfin_dcache_flush_range) 79ENTRY(_blackfin_dcache_flush_range)
119 R2 = -L1_CACHE_BYTES; 80 do_flush FLUSH, , , .Ldfr
120 R2 = R0 & R2;
121 P0 = R2;
122 P1 = R1;
123 CSYNC(R3);
124 FLUSH[P0];
1251:
126 FLUSH[P0++];
127 CC = P0 < P1 (iu);
128 IF CC JUMP 1b (bp);
129
130 /* If the data crosses a cache line, then we'll be pointing to
131 * the last cache line, but won't have flushed it yet, so do
132 * one more.
133 */
134 FLUSH[P0];
135 SSYNC(R3);
136 RTS;
137ENDPROC(_blackfin_dcache_flush_range) 81ENDPROC(_blackfin_dcache_flush_range)
138 82
83/* Our headers convert the page structure to an address, so just need to flush
84 * its contents like normal. We know the start address is page aligned (which
85 * greater than our cache alignment), as is the end address. So just jump into
86 * the middle of the dcache flush function.
87 */
139ENTRY(_blackfin_dflush_page) 88ENTRY(_blackfin_dflush_page)
140 P1 = 1 << (PAGE_SHIFT - L1_CACHE_SHIFT); 89 P1 = 1 << (PAGE_SHIFT - L1_CACHE_SHIFT);
141 P0 = R0; 90 jump .Ldfr;
142 CSYNC(R3);
143 FLUSH[P0];
144 LSETUP (.Lfl1, .Lfl1) LC0 = P1;
145.Lfl1: FLUSH [P0++];
146 SSYNC(R3);
147 RTS;
148ENDPROC(_blackfin_dflush_page) 91ENDPROC(_blackfin_dflush_page)
diff --git a/arch/blackfin/mach-common/cpufreq.c b/arch/blackfin/mach-common/cpufreq.c
index 75cdad291e88..c22c47b60127 100644
--- a/arch/blackfin/mach-common/cpufreq.c
+++ b/arch/blackfin/mach-common/cpufreq.c
@@ -158,8 +158,6 @@ static int __init __bfin_cpu_init(struct cpufreq_policy *policy)
158 dpm_state_table[index].tscale); 158 dpm_state_table[index].tscale);
159 } 159 }
160 160
161 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
162
163 policy->cpuinfo.transition_latency = (bfin_read_PLL_LOCKCNT() / (sclk / 1000000)) * 1000; 161 policy->cpuinfo.transition_latency = (bfin_read_PLL_LOCKCNT() / (sclk / 1000000)) * 1000;
164 /*Now ,only support one cpu */ 162 /*Now ,only support one cpu */
165 policy->cur = cclk; 163 policy->cur = cclk;
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S
index 847c172a99eb..c13fa8da28c7 100644
--- a/arch/blackfin/mach-common/entry.S
+++ b/arch/blackfin/mach-common/entry.S
@@ -129,6 +129,18 @@ ENTRY(_ex_icplb_miss)
129#else 129#else
130 call __cplb_hdr; 130 call __cplb_hdr;
131#endif 131#endif
132
133#ifdef CONFIG_DEBUG_DOUBLEFAULT
134 /* While we were processing this, did we double fault? */
135 r7 = SEQSTAT; /* reason code is in bit 5:0 */
136 r6.l = lo(SEQSTAT_EXCAUSE);
137 r6.h = hi(SEQSTAT_EXCAUSE);
138 r7 = r7 & r6;
139 r6 = 0x25;
140 CC = R7 == R6;
141 if CC JUMP _double_fault;
142#endif
143
132 DEBUG_HWTRACE_RESTORE(p5, r7) 144 DEBUG_HWTRACE_RESTORE(p5, r7)
133 RESTORE_ALL_SYS 145 RESTORE_ALL_SYS
134 SP = EX_SCRATCH_REG; 146 SP = EX_SCRATCH_REG;
@@ -136,11 +148,8 @@ ENTRY(_ex_icplb_miss)
136ENDPROC(_ex_icplb_miss) 148ENDPROC(_ex_icplb_miss)
137 149
138ENTRY(_ex_syscall) 150ENTRY(_ex_syscall)
139 (R7:6,P5:4) = [sp++];
140 ASTAT = [sp++];
141 raise 15; /* invoked by TRAP #0, for sys call */ 151 raise 15; /* invoked by TRAP #0, for sys call */
142 sp = EX_SCRATCH_REG; 152 jump.s _bfin_return_from_exception;
143 rtx
144ENDPROC(_ex_syscall) 153ENDPROC(_ex_syscall)
145 154
146ENTRY(_ex_soft_bp) 155ENTRY(_ex_soft_bp)
@@ -181,8 +190,8 @@ ENTRY(_ex_single_step)
181 if cc jump .Lfind_priority_done; 190 if cc jump .Lfind_priority_done;
182 jump.s .Lfind_priority_start; 191 jump.s .Lfind_priority_start;
183.Lfind_priority_done: 192.Lfind_priority_done:
184 p4.l = _debugger_step; 193 p4.l = _kgdb_single_step;
185 p4.h = _debugger_step; 194 p4.h = _kgdb_single_step;
186 r6 = [p4]; 195 r6 = [p4];
187 cc = r6 == 0; 196 cc = r6 == 0;
188 if cc jump .Ldo_single_step; 197 if cc jump .Ldo_single_step;
@@ -250,6 +259,29 @@ ENTRY(_bfin_return_from_exception)
250 R7=LC1; 259 R7=LC1;
251 LC1=R7; 260 LC1=R7;
252#endif 261#endif
262
263#ifdef CONFIG_DEBUG_DOUBLEFAULT
264 /* While we were processing the current exception,
265 * did we cause another, and double fault?
266 */
267 r7 = SEQSTAT; /* reason code is in bit 5:0 */
268 r6.l = lo(SEQSTAT_EXCAUSE);
269 r6.h = hi(SEQSTAT_EXCAUSE);
270 r7 = r7 & r6;
271 r6 = 0x25;
272 CC = R7 == R6;
273 if CC JUMP _double_fault;
274
275 /* Did we cause a HW error? */
276 p5.l = lo(ILAT);
277 p5.h = hi(ILAT);
278 r6 = [p5];
279 r7 = 0x20; /* Did I just cause anther HW error? */
280 r7 = r7 & r1;
281 CC = R7 == R6;
282 if CC JUMP _double_fault;
283#endif
284
253 (R7:6,P5:4) = [sp++]; 285 (R7:6,P5:4) = [sp++];
254 ASTAT = [sp++]; 286 ASTAT = [sp++];
255 sp = EX_SCRATCH_REG; 287 sp = EX_SCRATCH_REG;
@@ -292,6 +324,14 @@ ENTRY(_ex_trap_c)
292 [p4] = p5; 324 [p4] = p5;
293 csync; 325 csync;
294 326
327#ifndef CONFIG_DEBUG_DOUBLEFAULT
328 /*
329 * Save these registers, as they are only valid in exception context
330 * (where we are now - as soon as we defer to IRQ5, they can change)
331 * DCPLB_STATUS and ICPLB_STATUS are also only valid in EVT3,
332 * but they are not very interesting, so don't save them
333 */
334
295 p4.l = lo(DCPLB_FAULT_ADDR); 335 p4.l = lo(DCPLB_FAULT_ADDR);
296 p4.h = hi(DCPLB_FAULT_ADDR); 336 p4.h = hi(DCPLB_FAULT_ADDR);
297 r7 = [p4]; 337 r7 = [p4];
@@ -304,12 +344,11 @@ ENTRY(_ex_trap_c)
304 p5.l = _saved_icplb_fault_addr; 344 p5.l = _saved_icplb_fault_addr;
305 [p5] = r7; 345 [p5] = r7;
306 346
307 p4.l = _excpt_saved_stuff;
308 p4.h = _excpt_saved_stuff;
309
310 r6 = retx; 347 r6 = retx;
348 p4.l = _saved_retx;
349 p4.h = _saved_retx;
311 [p4] = r6; 350 [p4] = r6;
312 351#endif
313 r6 = SYSCFG; 352 r6 = SYSCFG;
314 [p4 + 4] = r6; 353 [p4 + 4] = r6;
315 BITCLR(r6, 0); 354 BITCLR(r6, 0);
@@ -327,59 +366,56 @@ ENTRY(_ex_trap_c)
327 r6 = 0x3f; 366 r6 = 0x3f;
328 sti r6; 367 sti r6;
329 368
330 (R7:6,P5:4) = [sp++];
331 ASTAT = [sp++];
332 SP = EX_SCRATCH_REG;
333 raise 5; 369 raise 5;
334 rtx; 370 jump.s _bfin_return_from_exception;
335ENDPROC(_ex_trap_c) 371ENDPROC(_ex_trap_c)
336 372
337/* We just realized we got an exception, while we were processing a different 373/* We just realized we got an exception, while we were processing a different
338 * exception. This is a unrecoverable event, so crash 374 * exception. This is a unrecoverable event, so crash
339 */ 375 */
340ENTRY(_double_fault) 376ENTRY(_double_fault)
341 /* Turn caches & protection off, to ensure we don't get any more 377 /* Turn caches & protection off, to ensure we don't get any more
342 * double exceptions 378 * double exceptions
343 */ 379 */
344 380
345 P4.L = LO(IMEM_CONTROL); 381 P4.L = LO(IMEM_CONTROL);
346 P4.H = HI(IMEM_CONTROL); 382 P4.H = HI(IMEM_CONTROL);
347 383
348 R5 = [P4]; /* Control Register*/ 384 R5 = [P4]; /* Control Register*/
349 BITCLR(R5,ENICPLB_P); 385 BITCLR(R5,ENICPLB_P);
350 SSYNC; /* SSYNC required before writing to IMEM_CONTROL. */ 386 SSYNC; /* SSYNC required before writing to IMEM_CONTROL. */
351 .align 8; 387 .align 8;
352 [P4] = R5; 388 [P4] = R5;
353 SSYNC; 389 SSYNC;
354 390
355 P4.L = LO(DMEM_CONTROL); 391 P4.L = LO(DMEM_CONTROL);
356 P4.H = HI(DMEM_CONTROL); 392 P4.H = HI(DMEM_CONTROL);
357 R5 = [P4]; 393 R5 = [P4];
358 BITCLR(R5,ENDCPLB_P); 394 BITCLR(R5,ENDCPLB_P);
359 SSYNC; /* SSYNC required before writing to DMEM_CONTROL. */ 395 SSYNC; /* SSYNC required before writing to DMEM_CONTROL. */
360 .align 8; 396 .align 8;
361 [P4] = R5; 397 [P4] = R5;
362 SSYNC; 398 SSYNC;
363 399
364 /* Fix up the stack */ 400 /* Fix up the stack */
365 (R7:6,P5:4) = [sp++]; 401 (R7:6,P5:4) = [sp++];
366 ASTAT = [sp++]; 402 ASTAT = [sp++];
367 SP = EX_SCRATCH_REG; 403 SP = EX_SCRATCH_REG;
368 404
369 /* We should be out of the exception stack, and back down into 405 /* We should be out of the exception stack, and back down into
370 * kernel or user space stack 406 * kernel or user space stack
371 */ 407 */
372 SAVE_ALL_SYS 408 SAVE_ALL_SYS
373 409
374 /* The dumping functions expect the return address in the RETI 410 /* The dumping functions expect the return address in the RETI
375 * slot. */ 411 * slot. */
376 r6 = retx; 412 r6 = retx;
377 [sp + PT_PC] = r6; 413 [sp + PT_PC] = r6;
378 414
379 r0 = sp; /* stack frame pt_regs pointer argument ==> r0 */ 415 r0 = sp; /* stack frame pt_regs pointer argument ==> r0 */
380 SP += -12; 416 SP += -12;
381 call _double_fault_c; 417 call _double_fault_c;
382 SP += 12; 418 SP += 12;
383.L_double_fault_panic: 419.L_double_fault_panic:
384 JUMP .L_double_fault_panic 420 JUMP .L_double_fault_panic
385 421
@@ -388,8 +424,8 @@ ENDPROC(_double_fault)
388ENTRY(_exception_to_level5) 424ENTRY(_exception_to_level5)
389 SAVE_ALL_SYS 425 SAVE_ALL_SYS
390 426
391 p4.l = _excpt_saved_stuff; 427 p4.l = _saved_retx;
392 p4.h = _excpt_saved_stuff; 428 p4.h = _saved_retx;
393 r6 = [p4]; 429 r6 = [p4];
394 [sp + PT_PC] = r6; 430 [sp + PT_PC] = r6;
395 431
@@ -420,6 +456,17 @@ ENTRY(_exception_to_level5)
420 call _trap_c; 456 call _trap_c;
421 SP += 12; 457 SP += 12;
422 458
459#ifdef CONFIG_DEBUG_DOUBLEFAULT
460 /* Grab ILAT */
461 p2.l = lo(ILAT);
462 p2.h = hi(ILAT);
463 r0 = [p2];
464 r1 = 0x20; /* Did I just cause anther HW error? */
465 r0 = r0 & r1;
466 CC = R0 == R1;
467 if CC JUMP _double_fault;
468#endif
469
423 call _ret_from_exception; 470 call _ret_from_exception;
424 RESTORE_ALL_SYS 471 RESTORE_ALL_SYS
425 rti; 472 rti;
@@ -436,7 +483,48 @@ ENTRY(_trap) /* Exception: 4th entry into system event table(supervisor mode)*/
436 /* Try to deal with syscalls quickly. */ 483 /* Try to deal with syscalls quickly. */
437 [--sp] = ASTAT; 484 [--sp] = ASTAT;
438 [--sp] = (R7:6,P5:4); 485 [--sp] = (R7:6,P5:4);
486
487#if ANOMALY_05000283 || ANOMALY_05000315
488 cc = r7 == r7;
489 p5.h = HI(CHIPID);
490 p5.l = LO(CHIPID);
491 if cc jump 1f;
492 r7.l = W[p5];
4931:
494#endif
495
496#ifdef CONFIG_DEBUG_DOUBLEFAULT
497 /*
498 * Save these registers, as they are only valid in exception context
499 * (where we are now - as soon as we defer to IRQ5, they can change)
500 * DCPLB_STATUS and ICPLB_STATUS are also only valid in EVT3,
501 * but they are not very interesting, so don't save them
502 */
503
504 p4.l = lo(DCPLB_FAULT_ADDR);
505 p4.h = hi(DCPLB_FAULT_ADDR);
506 r7 = [p4];
507 p5.h = _saved_dcplb_fault_addr;
508 p5.l = _saved_dcplb_fault_addr;
509 [p5] = r7;
510
511 r7 = [p4 + (ICPLB_FAULT_ADDR - DCPLB_FAULT_ADDR)];
512 p5.h = _saved_icplb_fault_addr;
513 p5.l = _saved_icplb_fault_addr;
514 [p5] = r7;
515
516 p4.l = _saved_retx;
517 p4.h = _saved_retx;
518 r6 = retx;
519 [p4] = r6;
520
439 r7 = SEQSTAT; /* reason code is in bit 5:0 */ 521 r7 = SEQSTAT; /* reason code is in bit 5:0 */
522 p4.l = _saved_seqstat;
523 p4.h = _saved_seqstat;
524 [p4] = r7;
525#else
526 r7 = SEQSTAT; /* reason code is in bit 5:0 */
527#endif
440 r6.l = lo(SEQSTAT_EXCAUSE); 528 r6.l = lo(SEQSTAT_EXCAUSE);
441 r6.h = hi(SEQSTAT_EXCAUSE); 529 r6.h = hi(SEQSTAT_EXCAUSE);
442 r7 = r7 & r6; 530 r7 = r7 & r6;
@@ -616,6 +704,9 @@ ENTRY(_system_call)
616 rts; 704 rts;
617ENDPROC(_system_call) 705ENDPROC(_system_call)
618 706
707/* Do not mark as ENTRY() to avoid error in assembler ...
708 * this symbol need not be global anyways, so ...
709 */
619_sys_trace: 710_sys_trace:
620 call _syscall_trace; 711 call _syscall_trace;
621 712
@@ -941,6 +1032,15 @@ ENTRY(_early_trap)
941 SAVE_ALL_SYS 1032 SAVE_ALL_SYS
942 trace_buffer_stop(p0,r0); 1033 trace_buffer_stop(p0,r0);
943 1034
1035#if ANOMALY_05000283 || ANOMALY_05000315
1036 cc = r5 == r5;
1037 p4.h = HI(CHIPID);
1038 p4.l = LO(CHIPID);
1039 if cc jump 1f;
1040 r5.l = W[p4];
10411:
1042#endif
1043
944 /* Turn caches off, to ensure we don't get double exceptions */ 1044 /* Turn caches off, to ensure we don't get double exceptions */
945 1045
946 P4.L = LO(IMEM_CONTROL); 1046 P4.L = LO(IMEM_CONTROL);
@@ -992,7 +1092,12 @@ ENTRY(_ex_table)
992 */ 1092 */
993 .long _ex_syscall /* 0x00 - User Defined - Linux Syscall */ 1093 .long _ex_syscall /* 0x00 - User Defined - Linux Syscall */
994 .long _ex_soft_bp /* 0x01 - User Defined - Software breakpoint */ 1094 .long _ex_soft_bp /* 0x01 - User Defined - Software breakpoint */
1095#ifdef CONFIG_KGDB
1096 .long _ex_trap_c /* 0x02 - User Defined - KGDB initial connection
1097 and break signal trap */
1098#else
995 .long _ex_replaceable /* 0x02 - User Defined */ 1099 .long _ex_replaceable /* 0x02 - User Defined */
1100#endif
996 .long _ex_trap_c /* 0x03 - User Defined - userspace stack overflow */ 1101 .long _ex_trap_c /* 0x03 - User Defined - userspace stack overflow */
997 .long _ex_trap_c /* 0x04 - User Defined - dump trace buffer */ 1102 .long _ex_trap_c /* 0x04 - User Defined - dump trace buffer */
998 .long _ex_replaceable /* 0x05 - User Defined */ 1103 .long _ex_replaceable /* 0x05 - User Defined */
@@ -1432,15 +1537,7 @@ ENTRY(_sys_call_table)
1432 .rept NR_syscalls-(.-_sys_call_table)/4 1537 .rept NR_syscalls-(.-_sys_call_table)/4
1433 .long _sys_ni_syscall 1538 .long _sys_ni_syscall
1434 .endr 1539 .endr
1435 1540END(_sys_call_table)
1436 /*
1437 * Used to save the real RETX, IMASK and SYSCFG when temporarily
1438 * storing safe values across the transition from exception to IRQ5.
1439 */
1440_excpt_saved_stuff:
1441 .long 0;
1442 .long 0;
1443 .long 0;
1444 1541
1445_exception_stack: 1542_exception_stack:
1446 .rept 1024 1543 .rept 1024
diff --git a/arch/blackfin/mach-common/head.S b/arch/blackfin/mach-common/head.S
index 191b4e974c4b..f123a62e2451 100644
--- a/arch/blackfin/mach-common/head.S
+++ b/arch/blackfin/mach-common/head.S
@@ -68,6 +68,16 @@ ENTRY(__start)
68 M2 = r0; 68 M2 = r0;
69 M3 = r0; 69 M3 = r0;
70 70
71 /*
72 * Clear ITEST_COMMAND and DTEST_COMMAND registers,
73 * Leaving these as non-zero can confuse the emulator
74 */
75 p0.L = LO(DTEST_COMMAND);
76 p0.H = HI(DTEST_COMMAND);
77 [p0] = R0;
78 [p0 + (ITEST_COMMAND - DTEST_COMMAND)] = R0;
79 CSYNC;
80
71 trace_buffer_init(p0,r0); 81 trace_buffer_init(p0,r0);
72 P0 = R1; 82 P0 = R1;
73 R0 = R1; 83 R0 = R1;
@@ -90,12 +100,46 @@ ENTRY(__start)
90 [p0] = R0; 100 [p0] = R0;
91 SSYNC; 101 SSYNC;
92 102
93 /* Save RETX, in case of doublefault */ 103 /* in case of double faults, save a few things */
94 p0.l = ___retx; 104 p0.l = _init_retx;
95 p0.h = ___retx; 105 p0.h = _init_retx;
96 R0 = RETX; 106 R0 = RETX;
97 [P0] = R0; 107 [P0] = R0;
98 108
109#ifdef CONFIG_DEBUG_DOUBLEFAULT
110 /* Only save these if we are storing them,
111 * This happens here, since L1 gets clobbered
112 * below
113 */
114 p0.l = _saved_retx;
115 p0.h = _saved_retx;
116 p1.l = _init_saved_retx;
117 p1.h = _init_saved_retx;
118 r0 = [p0];
119 [p1] = r0;
120
121 p0.l = _saved_dcplb_fault_addr;
122 p0.h = _saved_dcplb_fault_addr;
123 p1.l = _init_saved_dcplb_fault_addr;
124 p1.h = _init_saved_dcplb_fault_addr;
125 r0 = [p0];
126 [p1] = r0;
127
128 p0.l = _saved_icplb_fault_addr;
129 p0.h = _saved_icplb_fault_addr;
130 p1.l = _init_saved_icplb_fault_addr;
131 p1.h = _init_saved_icplb_fault_addr;
132 r0 = [p0];
133 [p1] = r0;
134
135 p0.l = _saved_seqstat;
136 p0.h = _saved_seqstat;
137 p1.l = _init_saved_seqstat;
138 p1.h = _init_saved_seqstat;
139 r0 = [p0];
140 [p1] = r0;
141#endif
142
99 /* Initialize stack pointer */ 143 /* Initialize stack pointer */
100 sp.l = lo(INITIAL_STACK); 144 sp.l = lo(INITIAL_STACK);
101 sp.h = hi(INITIAL_STACK); 145 sp.h = hi(INITIAL_STACK);
@@ -107,7 +151,7 @@ ENTRY(__start)
107#endif 151#endif
108 152
109 /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */ 153 /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */
110 call _bf53x_relocate_l1_mem; 154 call _bfin_relocate_l1_mem;
111#ifdef CONFIG_BFIN_KERNEL_CLOCK 155#ifdef CONFIG_BFIN_KERNEL_CLOCK
112 call _start_dma_code; 156 call _start_dma_code;
113#endif 157#endif
@@ -162,6 +206,60 @@ ENTRY(_real_start)
162 w[p0] = r0; 206 w[p0] = r0;
163 ssync; 207 ssync;
164 208
209#if L1_DATA_A_LENGTH > 0
210 r1.l = __sbss_l1;
211 r1.h = __sbss_l1;
212 r2.l = __ebss_l1;
213 r2.h = __ebss_l1;
214 r0 = 0 (z);
215 r2 = r2 - r1;
216 cc = r2 == 0;
217 if cc jump .L_a_l1_done;
218 r2 >>= 2;
219 p1 = r1;
220 p2 = r2;
221 lsetup (.L_clear_a_l1, .L_clear_a_l1 ) lc0 = p2;
222.L_clear_a_l1:
223 [p1++] = r0;
224.L_a_l1_done:
225#endif
226
227#if L1_DATA_B_LENGTH > 0
228 r1.l = __sbss_b_l1;
229 r1.h = __sbss_b_l1;
230 r2.l = __ebss_b_l1;
231 r2.h = __ebss_b_l1;
232 r0 = 0 (z);
233 r2 = r2 - r1;
234 cc = r2 == 0;
235 if cc jump .L_b_l1_done;
236 r2 >>= 2;
237 p1 = r1;
238 p2 = r2;
239 lsetup (.L_clear_b_l1, .L_clear_b_l1 ) lc0 = p2;
240.L_clear_b_l1:
241 [p1++] = r0;
242.L_b_l1_done:
243#endif
244
245#if L2_LENGTH > 0
246 r1.l = __sbss_l2;
247 r1.h = __sbss_l2;
248 r2.l = __ebss_l2;
249 r2.h = __ebss_l2;
250 r0 = 0 (z);
251 r2 = r2 - r1;
252 cc = r2 == 0;
253 if cc jump .L_l2_done;
254 r2 >>= 2;
255 p1 = r1;
256 p2 = r2;
257 lsetup (.L_clear_l2, .L_clear_l2 ) lc0 = p2;
258.L_clear_l2:
259 [p1++] = r0;
260.L_l2_done:
261#endif
262
165 /* Zero out the bss region 263 /* Zero out the bss region
166 * Note: this will fail if bss is 0 bytes ... 264 * Note: this will fail if bss is 0 bytes ...
167 */ 265 */
diff --git a/arch/blackfin/mach-common/interrupt.S b/arch/blackfin/mach-common/interrupt.S
index b27e59d32401..4a2ec7a9675a 100644
--- a/arch/blackfin/mach-common/interrupt.S
+++ b/arch/blackfin/mach-common/interrupt.S
@@ -143,7 +143,7 @@ ENTRY(_evt_ivhw)
143 fp = 0; 143 fp = 0;
144#endif 144#endif
145 145
146#if ANOMALY_05000283 146#if ANOMALY_05000283 || ANOMALY_05000315
147 cc = r7 == r7; 147 cc = r7 == r7;
148 p5.h = HI(CHIPID); 148 p5.h = HI(CHIPID);
149 p5.l = LO(CHIPID); 149 p5.l = LO(CHIPID);
@@ -179,7 +179,16 @@ ENTRY(_evt_ivhw)
179 call _trap_c; 179 call _trap_c;
180 SP += 12; 180 SP += 12;
181 181
182#ifdef EBIU_ERRMST
183 /* make sure EBIU_ERRMST is clear */
184 p0.l = LO(EBIU_ERRMST);
185 p0.h = HI(EBIU_ERRMST);
186 r0.l = (CORE_ERROR | CORE_MERROR);
187 w[p0] = r0.l;
188#endif
189
182 call _ret_from_exception; 190 call _ret_from_exception;
191
183.Lcommon_restore_all_sys: 192.Lcommon_restore_all_sys:
184 RESTORE_ALL_SYS 193 RESTORE_ALL_SYS
185 rti; 194 rti;
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c
index 5fa536727c61..34e8a726ffda 100644
--- a/arch/blackfin/mach-common/ints-priority.c
+++ b/arch/blackfin/mach-common/ints-priority.c
@@ -243,12 +243,14 @@ int bfin_internal_set_wake(unsigned int irq, unsigned int state)
243#endif 243#endif
244 244
245static struct irq_chip bfin_core_irqchip = { 245static struct irq_chip bfin_core_irqchip = {
246 .name = "CORE",
246 .ack = bfin_ack_noop, 247 .ack = bfin_ack_noop,
247 .mask = bfin_core_mask_irq, 248 .mask = bfin_core_mask_irq,
248 .unmask = bfin_core_unmask_irq, 249 .unmask = bfin_core_unmask_irq,
249}; 250};
250 251
251static struct irq_chip bfin_internal_irqchip = { 252static struct irq_chip bfin_internal_irqchip = {
253 .name = "INTN",
252 .ack = bfin_ack_noop, 254 .ack = bfin_ack_noop,
253 .mask = bfin_internal_mask_irq, 255 .mask = bfin_internal_mask_irq,
254 .unmask = bfin_internal_unmask_irq, 256 .unmask = bfin_internal_unmask_irq,
@@ -278,6 +280,7 @@ static void bfin_generic_error_unmask_irq(unsigned int irq)
278} 280}
279 281
280static struct irq_chip bfin_generic_error_irqchip = { 282static struct irq_chip bfin_generic_error_irqchip = {
283 .name = "ERROR",
281 .ack = bfin_ack_noop, 284 .ack = bfin_ack_noop,
282 .mask_ack = bfin_generic_error_mask_irq, 285 .mask_ack = bfin_generic_error_mask_irq,
283 .mask = bfin_generic_error_mask_irq, 286 .mask = bfin_generic_error_mask_irq,
@@ -361,6 +364,14 @@ static void bfin_demux_error_irq(unsigned int int_err_irq,
361} 364}
362#endif /* BF537_GENERIC_ERROR_INT_DEMUX */ 365#endif /* BF537_GENERIC_ERROR_INT_DEMUX */
363 366
367static inline void bfin_set_irq_handler(unsigned irq, irq_flow_handler_t handle)
368{
369 struct irq_desc *desc = irq_desc + irq;
370 /* May not call generic set_irq_handler() due to spinlock
371 recursion. */
372 desc->handle_irq = handle;
373}
374
364#if !defined(CONFIG_BF54x) 375#if !defined(CONFIG_BF54x)
365 376
366static unsigned short gpio_enabled[gpio_bank(MAX_BLACKFIN_GPIOS)]; 377static unsigned short gpio_enabled[gpio_bank(MAX_BLACKFIN_GPIOS)];
@@ -473,9 +484,9 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type)
473 SSYNC(); 484 SSYNC();
474 485
475 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) 486 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))
476 set_irq_handler(irq, handle_edge_irq); 487 bfin_set_irq_handler(irq, handle_edge_irq);
477 else 488 else
478 set_irq_handler(irq, handle_level_irq); 489 bfin_set_irq_handler(irq, handle_level_irq);
479 490
480 return 0; 491 return 0;
481} 492}
@@ -495,6 +506,7 @@ int bfin_gpio_set_wake(unsigned int irq, unsigned int state)
495#endif 506#endif
496 507
497static struct irq_chip bfin_gpio_irqchip = { 508static struct irq_chip bfin_gpio_irqchip = {
509 .name = "GPIO",
498 .ack = bfin_gpio_ack_irq, 510 .ack = bfin_gpio_ack_irq,
499 .mask = bfin_gpio_mask_irq, 511 .mask = bfin_gpio_mask_irq,
500 .mask_ack = bfin_gpio_mask_ack_irq, 512 .mask_ack = bfin_gpio_mask_ack_irq,
@@ -804,10 +816,10 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type)
804 816
805 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) { 817 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) {
806 pint[bank]->edge_set = pintbit; 818 pint[bank]->edge_set = pintbit;
807 set_irq_handler(irq, handle_edge_irq); 819 bfin_set_irq_handler(irq, handle_edge_irq);
808 } else { 820 } else {
809 pint[bank]->edge_clear = pintbit; 821 pint[bank]->edge_clear = pintbit;
810 set_irq_handler(irq, handle_level_irq); 822 bfin_set_irq_handler(irq, handle_level_irq);
811 } 823 }
812 824
813 SSYNC(); 825 SSYNC();
@@ -884,6 +896,7 @@ void bfin_pm_restore(void)
884#endif 896#endif
885 897
886static struct irq_chip bfin_gpio_irqchip = { 898static struct irq_chip bfin_gpio_irqchip = {
899 .name = "GPIO",
887 .ack = bfin_gpio_ack_irq, 900 .ack = bfin_gpio_ack_irq,
888 .mask = bfin_gpio_mask_irq, 901 .mask = bfin_gpio_mask_irq,
889 .mask_ack = bfin_gpio_mask_ack_irq, 902 .mask_ack = bfin_gpio_mask_ack_irq,
@@ -1136,8 +1149,4 @@ void do_irq(int vec, struct pt_regs *fp)
1136 vec = ivg->irqno; 1149 vec = ivg->irqno;
1137 } 1150 }
1138 asm_do_IRQ(vec, fp); 1151 asm_do_IRQ(vec, fp);
1139
1140#ifdef CONFIG_KGDB
1141 kgdb_process_breakpoint();
1142#endif
1143} 1152}
diff --git a/arch/blackfin/mm/Makefile b/arch/blackfin/mm/Makefile
index 2a7202ce01fd..d489f894f4b1 100644
--- a/arch/blackfin/mm/Makefile
+++ b/arch/blackfin/mm/Makefile
@@ -2,4 +2,4 @@
2# arch/blackfin/mm/Makefile 2# arch/blackfin/mm/Makefile
3# 3#
4 4
5obj-y := blackfin_sram.o init.o 5obj-y := sram-alloc.o isram-driver.o init.o
diff --git a/arch/blackfin/mm/isram-driver.c b/arch/blackfin/mm/isram-driver.c
new file mode 100644
index 000000000000..22913e7a1818
--- /dev/null
+++ b/arch/blackfin/mm/isram-driver.c
@@ -0,0 +1,201 @@
1/*
2 * Description: Instruction SRAM accessor functions for the Blackfin
3 *
4 * Copyright 2008 Analog Devices Inc.
5 *
6 * Bugs: Enter bugs at http://blackfin.uclinux.org/
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, see the file COPYING, or write
15 * to the Free Software Foundation, Inc.,
16 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
17 */
18
19#include <linux/module.h>
20#include <linux/kernel.h>
21#include <linux/types.h>
22#include <linux/spinlock.h>
23#include <linux/sched.h>
24
25#include <asm/blackfin.h>
26
27/*
28 * IMPORTANT WARNING ABOUT THESE FUNCTIONS
29 *
30 * The emulator will not function correctly if a write command is left in
31 * ITEST_COMMAND or DTEST_COMMAND AND access to cache memory is needed by
32 * the emulator. To avoid such problems, ensure that both ITEST_COMMAND
33 * and DTEST_COMMAND are zero when exiting these functions.
34 */
35
36
37/*
38 * On the Blackfin, L1 instruction sram (which operates at core speeds) can not
39 * be accessed by a normal core load, so we need to go through a few hoops to
40 * read/write it.
41 * To try to make it easier - we export a memcpy interface, where either src or
42 * dest can be in this special L1 memory area.
43 * The low level read/write functions should not be exposed to the rest of the
44 * kernel, since they operate on 64-bit data, and need specific address alignment
45 */
46
47static DEFINE_SPINLOCK(dtest_lock);
48
49/* Takes a void pointer */
50#define IADDR2DTEST(x) \
51 ({ unsigned long __addr = (unsigned long)(x); \
52 (__addr & 0x47F8) | /* address bits 14 & 10:3 */ \
53 (__addr & 0x0800) << 15 | /* address bit 11 */ \
54 (__addr & 0x3000) << 4 | /* address bits 13:12 */ \
55 (__addr & 0x8000) << 8 | /* address bit 15 */ \
56 (0x1000004); /* isram access */ \
57 })
58
59/* Takes a pointer, and returns the offset (in bits) which things should be shifted */
60#define ADDR2OFFSET(x) ((((unsigned long)(x)) & 0x7) * 8)
61
62/* Takes a pointer, determines if it is the last byte in the isram 64-bit data type */
63#define ADDR2LAST(x) ((((unsigned long)x) & 0x7) == 0x7)
64
65static void isram_write(const void *addr, uint64_t data)
66{
67 uint32_t cmd;
68 unsigned long flags;
69
70 if (addr >= (void *)(L1_CODE_START + L1_CODE_LENGTH))
71 return;
72
73 cmd = IADDR2DTEST(addr) | 1; /* write */
74
75 /*
76 * Writes to DTEST_DATA[0:1] need to be atomic with write to DTEST_COMMAND
77 * While in exception context - atomicity is guaranteed or double fault
78 */
79 spin_lock_irqsave(&dtest_lock, flags);
80
81 bfin_write_DTEST_DATA0(data & 0xFFFFFFFF);
82 bfin_write_DTEST_DATA1(data >> 32);
83
84 /* use the builtin, since interrupts are already turned off */
85 __builtin_bfin_csync();
86 bfin_write_DTEST_COMMAND(cmd);
87 __builtin_bfin_csync();
88
89 bfin_write_DTEST_COMMAND(0);
90 __builtin_bfin_csync();
91
92 spin_unlock_irqrestore(&dtest_lock, flags);
93}
94
95static uint64_t isram_read(const void *addr)
96{
97 uint32_t cmd;
98 unsigned long flags;
99 uint64_t ret;
100
101 if (addr > (void *)(L1_CODE_START + L1_CODE_LENGTH))
102 return 0;
103
104 cmd = IADDR2DTEST(addr) | 0; /* read */
105
106 /*
107 * Reads of DTEST_DATA[0:1] need to be atomic with write to DTEST_COMMAND
108 * While in exception context - atomicity is guaranteed or double fault
109 */
110 spin_lock_irqsave(&dtest_lock, flags);
111 /* use the builtin, since interrupts are already turned off */
112 __builtin_bfin_csync();
113 bfin_write_DTEST_COMMAND(cmd);
114 __builtin_bfin_csync();
115 ret = bfin_read_DTEST_DATA0() | ((uint64_t)bfin_read_DTEST_DATA1() << 32);
116
117 bfin_write_DTEST_COMMAND(0);
118 __builtin_bfin_csync();
119 spin_unlock_irqrestore(&dtest_lock, flags);
120
121 return ret;
122}
123
124static bool isram_check_addr(const void *addr, size_t n)
125{
126 if ((addr >= (void *)L1_CODE_START) &&
127 (addr < (void *)(L1_CODE_START + L1_CODE_LENGTH))) {
128 if ((addr + n) >= (void *)(L1_CODE_START + L1_CODE_LENGTH)) {
129 show_stack(NULL, NULL);
130 printk(KERN_ERR "isram_memcpy: copy involving %p length "
131 "(%zu) too long\n", addr, n);
132 }
133 return true;
134 }
135 return false;
136}
137
138/*
139 * The isram_memcpy() function copies n bytes from memory area src to memory area dest.
140 * The isram_memcpy() function returns a pointer to dest.
141 * Either dest or src can be in L1 instruction sram.
142 */
143void *isram_memcpy(void *dest, const void *src, size_t n)
144{
145 uint64_t data_in = 0, data_out = 0;
146 size_t count;
147 bool dest_in_l1, src_in_l1, need_data, put_data;
148 unsigned char byte, *src_byte, *dest_byte;
149
150 src_byte = (unsigned char *)src;
151 dest_byte = (unsigned char *)dest;
152
153 dest_in_l1 = isram_check_addr(dest, n);
154 src_in_l1 = isram_check_addr(src, n);
155
156 need_data = true;
157 put_data = true;
158 for (count = 0; count < n; count++) {
159 if (src_in_l1) {
160 if (need_data) {
161 data_in = isram_read(src + count);
162 need_data = false;
163 }
164
165 if (ADDR2LAST(src + count))
166 need_data = true;
167
168 byte = (unsigned char)((data_in >> ADDR2OFFSET(src + count)) & 0xff);
169
170 } else {
171 /* src is in L2 or L3 - so just dereference*/
172 byte = src_byte[count];
173 }
174
175 if (dest_in_l1) {
176 if (put_data) {
177 data_out = isram_read(dest + count);
178 put_data = false;
179 }
180
181 data_out &= ~((uint64_t)0xff << ADDR2OFFSET(dest + count));
182 data_out |= ((uint64_t)byte << ADDR2OFFSET(dest + count));
183
184 if (ADDR2LAST(dest + count)) {
185 put_data = true;
186 isram_write(dest + count, data_out);
187 }
188 } else {
189 /* dest in L2 or L3 - so just dereference */
190 dest_byte[count] = byte;
191 }
192 }
193
194 /* make sure we dump the last byte if necessary */
195 if (dest_in_l1 && !put_data)
196 isram_write(dest + count, data_out);
197
198 return dest;
199}
200EXPORT_SYMBOL(isram_memcpy);
201
diff --git a/arch/blackfin/mm/blackfin_sram.c b/arch/blackfin/mm/sram-alloc.c
index 4f5e887a0d96..0f1ca6930c16 100644
--- a/arch/blackfin/mm/blackfin_sram.c
+++ b/arch/blackfin/mm/sram-alloc.c
@@ -1,13 +1,13 @@
1/* 1/*
2 * File: arch/blackfin/mm/blackfin_sram.c 2 * File: arch/blackfin/mm/sram-alloc.c
3 * Based on: 3 * Based on:
4 * Author: 4 * Author:
5 * 5 *
6 * Created: 6 * Created:
7 * Description: SRAM driver for Blackfin ADSP-BF5xx 7 * Description: SRAM allocator for Blackfin L1 and L2 memory
8 * 8 *
9 * Modified: 9 * Modified:
10 * Copyright 2004-2007 Analog Devices Inc. 10 * Copyright 2004-2008 Analog Devices Inc.
11 * 11 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 * 13 *
@@ -78,7 +78,7 @@ static void __init l1sram_init(void)
78 free_l1_ssram_head.next = 78 free_l1_ssram_head.next =
79 kmem_cache_alloc(sram_piece_cache, GFP_KERNEL); 79 kmem_cache_alloc(sram_piece_cache, GFP_KERNEL);
80 if (!free_l1_ssram_head.next) { 80 if (!free_l1_ssram_head.next) {
81 printk(KERN_INFO"Fail to initialize Scratchpad data SRAM.\n"); 81 printk(KERN_INFO "Failed to initialize Scratchpad data SRAM\n");
82 return; 82 return;
83 } 83 }
84 84
@@ -102,7 +102,7 @@ static void __init l1_data_sram_init(void)
102 free_l1_data_A_sram_head.next = 102 free_l1_data_A_sram_head.next =
103 kmem_cache_alloc(sram_piece_cache, GFP_KERNEL); 103 kmem_cache_alloc(sram_piece_cache, GFP_KERNEL);
104 if (!free_l1_data_A_sram_head.next) { 104 if (!free_l1_data_A_sram_head.next) {
105 printk(KERN_INFO"Fail to initialize L1 Data A SRAM.\n"); 105 printk(KERN_INFO "Failed to initialize L1 Data A SRAM\n");
106 return; 106 return;
107 } 107 }
108 108
@@ -123,7 +123,7 @@ static void __init l1_data_sram_init(void)
123 free_l1_data_B_sram_head.next = 123 free_l1_data_B_sram_head.next =
124 kmem_cache_alloc(sram_piece_cache, GFP_KERNEL); 124 kmem_cache_alloc(sram_piece_cache, GFP_KERNEL);
125 if (!free_l1_data_B_sram_head.next) { 125 if (!free_l1_data_B_sram_head.next) {
126 printk(KERN_INFO"Fail to initialize L1 Data B SRAM.\n"); 126 printk(KERN_INFO "Failed to initialize L1 Data B SRAM\n");
127 return; 127 return;
128 } 128 }
129 129
@@ -151,7 +151,7 @@ static void __init l1_inst_sram_init(void)
151 free_l1_inst_sram_head.next = 151 free_l1_inst_sram_head.next =
152 kmem_cache_alloc(sram_piece_cache, GFP_KERNEL); 152 kmem_cache_alloc(sram_piece_cache, GFP_KERNEL);
153 if (!free_l1_inst_sram_head.next) { 153 if (!free_l1_inst_sram_head.next) {
154 printk(KERN_INFO"Fail to initialize L1 Instruction SRAM.\n"); 154 printk(KERN_INFO "Failed to initialize L1 Instruction SRAM\n");
155 return; 155 return;
156 } 156 }
157 157
@@ -179,7 +179,7 @@ static void __init l2_sram_init(void)
179 free_l2_sram_head.next = 179 free_l2_sram_head.next =
180 kmem_cache_alloc(sram_piece_cache, GFP_KERNEL); 180 kmem_cache_alloc(sram_piece_cache, GFP_KERNEL);
181 if (!free_l2_sram_head.next) { 181 if (!free_l2_sram_head.next) {
182 printk(KERN_INFO"Fail to initialize L2 SRAM.\n"); 182 printk(KERN_INFO "Failed to initialize L2 SRAM\n");
183 return; 183 return;
184 } 184 }
185 185
@@ -351,28 +351,31 @@ static int _sram_free(const void *addr,
351 351
352int sram_free(const void *addr) 352int sram_free(const void *addr)
353{ 353{
354 if (0) {} 354
355#if L1_CODE_LENGTH != 0 355#if L1_CODE_LENGTH != 0
356 else if (addr >= (void *)L1_CODE_START 356 if (addr >= (void *)L1_CODE_START
357 && addr < (void *)(L1_CODE_START + L1_CODE_LENGTH)) 357 && addr < (void *)(L1_CODE_START + L1_CODE_LENGTH))
358 return l1_inst_sram_free(addr); 358 return l1_inst_sram_free(addr);
359 else
359#endif 360#endif
360#if L1_DATA_A_LENGTH != 0 361#if L1_DATA_A_LENGTH != 0
361 else if (addr >= (void *)L1_DATA_A_START 362 if (addr >= (void *)L1_DATA_A_START
362 && addr < (void *)(L1_DATA_A_START + L1_DATA_A_LENGTH)) 363 && addr < (void *)(L1_DATA_A_START + L1_DATA_A_LENGTH))
363 return l1_data_A_sram_free(addr); 364 return l1_data_A_sram_free(addr);
365 else
364#endif 366#endif
365#if L1_DATA_B_LENGTH != 0 367#if L1_DATA_B_LENGTH != 0
366 else if (addr >= (void *)L1_DATA_B_START 368 if (addr >= (void *)L1_DATA_B_START
367 && addr < (void *)(L1_DATA_B_START + L1_DATA_B_LENGTH)) 369 && addr < (void *)(L1_DATA_B_START + L1_DATA_B_LENGTH))
368 return l1_data_B_sram_free(addr); 370 return l1_data_B_sram_free(addr);
371 else
369#endif 372#endif
370#if L2_LENGTH != 0 373#if L2_LENGTH != 0
371 else if (addr >= (void *)L2_START 374 if (addr >= (void *)L2_START
372 && addr < (void *)(L2_START + L2_LENGTH)) 375 && addr < (void *)(L2_START + L2_LENGTH))
373 return l2_sram_free(addr); 376 return l2_sram_free(addr);
374#endif
375 else 377 else
378#endif
376 return -1; 379 return -1;
377} 380}
378EXPORT_SYMBOL(sram_free); 381EXPORT_SYMBOL(sram_free);
diff --git a/arch/cris/Makefile b/arch/cris/Makefile
index 838cd2ae03ae..c6f5f5a2ffdf 100644
--- a/arch/cris/Makefile
+++ b/arch/cris/Makefile
@@ -10,6 +10,8 @@
10# License. See the file "COPYING" in the main directory of this archive 10# License. See the file "COPYING" in the main directory of this archive
11# for more details. 11# for more details.
12 12
13KBUILD_DEFCONFIG := etrax-100lx_v2_defconfig
14
13arch-y := v10 15arch-y := v10
14arch-$(CONFIG_ETRAX_ARCH_V10) := v10 16arch-$(CONFIG_ETRAX_ARCH_V10) := v10
15arch-$(CONFIG_ETRAX_ARCH_V32) := v32 17arch-$(CONFIG_ETRAX_ARCH_V32) := v32
diff --git a/arch/cris/arch-v10/boot/compressed/Makefile b/arch/cris/arch-v10/boot/compressed/Makefile
index 08d943ce4be7..6fe0ffaf3be6 100644
--- a/arch/cris/arch-v10/boot/compressed/Makefile
+++ b/arch/cris/arch-v10/boot/compressed/Makefile
@@ -4,7 +4,7 @@
4 4
5asflags-y += $(LINUXINCLUDE) 5asflags-y += $(LINUXINCLUDE)
6ccflags-y += -O2 $(LINUXINCLUDE) 6ccflags-y += -O2 $(LINUXINCLUDE)
7ldflags-y += -T $(srctree)/$(obj)/decompress.ld 7ldflags-y += -T $(srctree)/$(src)/decompress.lds
8OBJECTS = $(obj)/head.o $(obj)/misc.o 8OBJECTS = $(obj)/head.o $(obj)/misc.o
9OBJCOPYFLAGS = -O binary --remove-section=.bss 9OBJCOPYFLAGS = -O binary --remove-section=.bss
10 10
diff --git a/arch/cris/arch-v10/boot/compressed/decompress.ld b/arch/cris/arch-v10/boot/compressed/decompress.lds
index e80f4594d543..e80f4594d543 100644
--- a/arch/cris/arch-v10/boot/compressed/decompress.ld
+++ b/arch/cris/arch-v10/boot/compressed/decompress.lds
diff --git a/arch/cris/arch-v10/boot/rescue/Makefile b/arch/cris/arch-v10/boot/rescue/Makefile
index 07688da92708..82ab59b968e5 100644
--- a/arch/cris/arch-v10/boot/rescue/Makefile
+++ b/arch/cris/arch-v10/boot/rescue/Makefile
@@ -4,7 +4,7 @@
4 4
5ccflags-y += -O2 $(LINUXINCLUDE) 5ccflags-y += -O2 $(LINUXINCLUDE)
6asflags-y += $(LINUXINCLUDE) 6asflags-y += $(LINUXINCLUDE)
7ldflags-y += -T $(srctree)/$(obj)/rescue.ld 7ldflags-y += -T $(srctree)/$(src)/rescue.lds
8OBJCOPYFLAGS = -O binary --remove-section=.bss 8OBJCOPYFLAGS = -O binary --remove-section=.bss
9obj-$(CONFIG_ETRAX_AXISFLASHMAP) = head.o 9obj-$(CONFIG_ETRAX_AXISFLASHMAP) = head.o
10OBJECT := $(obj)/head.o 10OBJECT := $(obj)/head.o
diff --git a/arch/cris/arch-v10/boot/rescue/rescue.ld b/arch/cris/arch-v10/boot/rescue/rescue.lds
index 0b52a9490db6..0b52a9490db6 100644
--- a/arch/cris/arch-v10/boot/rescue/rescue.ld
+++ b/arch/cris/arch-v10/boot/rescue/rescue.lds
diff --git a/arch/cris/arch-v10/boot/tools/build.c b/arch/cris/arch-v10/boot/tools/build.c
index 2f9bbb26d603..c8adef364160 100644
--- a/arch/cris/arch-v10/boot/tools/build.c
+++ b/arch/cris/arch-v10/boot/tools/build.c
@@ -30,7 +30,6 @@
30#include <sys/sysmacros.h> 30#include <sys/sysmacros.h>
31#include <unistd.h> /* contains read/write */ 31#include <unistd.h> /* contains read/write */
32#include <fcntl.h> 32#include <fcntl.h>
33#include <linux/a.out.h>
34#include <errno.h> 33#include <errno.h>
35 34
36#define MINIX_HEADER 32 35#define MINIX_HEADER 32
diff --git a/arch/cris/arch-v32/boot/compressed/Makefile b/arch/cris/arch-v32/boot/compressed/Makefile
index d6335f26083b..5a1b31c99eaa 100644
--- a/arch/cris/arch-v32/boot/compressed/Makefile
+++ b/arch/cris/arch-v32/boot/compressed/Makefile
@@ -4,7 +4,7 @@
4 4
5asflags-y += -I $(srctree)/include/asm/mach/ -I $(srctree)/include/asm/arch 5asflags-y += -I $(srctree)/include/asm/mach/ -I $(srctree)/include/asm/arch
6ccflags-y += -O2 -I $(srctree)/include/asm/mach/ -I $(srctree)/include/asm/arch 6ccflags-y += -O2 -I $(srctree)/include/asm/mach/ -I $(srctree)/include/asm/arch
7ldflags-y += -T $(srctree)/$(obj)/decompress.ld 7ldflags-y += -T $(srctree)/$(src)/decompress.lds
8OBJECTS = $(obj)/head.o $(obj)/misc.o 8OBJECTS = $(obj)/head.o $(obj)/misc.o
9OBJCOPYFLAGS = -O binary --remove-section=.bss 9OBJCOPYFLAGS = -O binary --remove-section=.bss
10 10
diff --git a/arch/cris/arch-v32/boot/compressed/decompress.ld b/arch/cris/arch-v32/boot/compressed/decompress.lds
index 3c837feca3ac..3c837feca3ac 100644
--- a/arch/cris/arch-v32/boot/compressed/decompress.ld
+++ b/arch/cris/arch-v32/boot/compressed/decompress.lds
diff --git a/arch/cris/arch-v32/boot/rescue/Makefile b/arch/cris/arch-v32/boot/rescue/Makefile
index 44ae0ad61f90..566aac663a38 100644
--- a/arch/cris/arch-v32/boot/rescue/Makefile
+++ b/arch/cris/arch-v32/boot/rescue/Makefile
@@ -7,7 +7,7 @@ ccflags-y += -O2 -I $(srctree)/include/asm/arch/mach/ \
7 -I $(srctree)/include/asm/arch 7 -I $(srctree)/include/asm/arch
8asflags-y += -I $(srctree)/include/asm/arch/mach/ -I $(srctree)/include/asm/arch 8asflags-y += -I $(srctree)/include/asm/arch/mach/ -I $(srctree)/include/asm/arch
9LD = gcc-cris -mlinux -march=v32 -nostdlib 9LD = gcc-cris -mlinux -march=v32 -nostdlib
10ldflags-y += -T $(srctree)/$(obj)/rescue.ld 10ldflags-y += -T $(srctree)/$(src)/rescue.lds
11LDPOSTFLAGS = -lgcc 11LDPOSTFLAGS = -lgcc
12OBJCOPYFLAGS = -O binary --remove-section=.bss 12OBJCOPYFLAGS = -O binary --remove-section=.bss
13obj-$(CONFIG_ETRAX_AXISFLASHMAP) = head.o 13obj-$(CONFIG_ETRAX_AXISFLASHMAP) = head.o
diff --git a/arch/cris/arch-v32/boot/rescue/rescue.ld b/arch/cris/arch-v32/boot/rescue/rescue.lds
index 8ac646bc1a2b..8ac646bc1a2b 100644
--- a/arch/cris/arch-v32/boot/rescue/rescue.ld
+++ b/arch/cris/arch-v32/boot/rescue/rescue.lds
diff --git a/arch/cris/arch-v32/mach-a3/cpufreq.c b/arch/cris/arch-v32/mach-a3/cpufreq.c
index 8e5a3cab8ad7..ee391ecb5bc9 100644
--- a/arch/cris/arch-v32/mach-a3/cpufreq.c
+++ b/arch/cris/arch-v32/mach-a3/cpufreq.c
@@ -85,7 +85,6 @@ static int cris_freq_cpu_init(struct cpufreq_policy *policy)
85 int result; 85 int result;
86 86
87 /* cpuinfo and default policy values */ 87 /* cpuinfo and default policy values */
88 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
89 policy->cpuinfo.transition_latency = 1000000; /* 1ms */ 88 policy->cpuinfo.transition_latency = 1000000; /* 1ms */
90 policy->cur = cris_freq_get_cpu_frequency(0); 89 policy->cur = cris_freq_get_cpu_frequency(0);
91 90
diff --git a/arch/cris/arch-v32/mach-fs/cpufreq.c b/arch/cris/arch-v32/mach-fs/cpufreq.c
index d57631c0d8d1..58bd71e5bda9 100644
--- a/arch/cris/arch-v32/mach-fs/cpufreq.c
+++ b/arch/cris/arch-v32/mach-fs/cpufreq.c
@@ -81,7 +81,6 @@ static int cris_freq_cpu_init(struct cpufreq_policy *policy)
81 int result; 81 int result;
82 82
83 /* cpuinfo and default policy values */ 83 /* cpuinfo and default policy values */
84 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
85 policy->cpuinfo.transition_latency = 1000000; /* 1ms */ 84 policy->cpuinfo.transition_latency = 1000000; /* 1ms */
86 policy->cur = cris_freq_get_cpu_frequency(0); 85 policy->cur = cris_freq_get_cpu_frequency(0);
87 86
diff --git a/arch/cris/artpec_3_defconfig b/arch/cris/configs/artpec_3_defconfig
index 41fe67409aab..41fe67409aab 100644
--- a/arch/cris/artpec_3_defconfig
+++ b/arch/cris/configs/artpec_3_defconfig
diff --git a/arch/cris/arch-v10/defconfig b/arch/cris/configs/etrax-100lx_defconfig
index 572f11926399..572f11926399 100644
--- a/arch/cris/arch-v10/defconfig
+++ b/arch/cris/configs/etrax-100lx_defconfig
diff --git a/arch/cris/defconfig b/arch/cris/configs/etrax-100lx_v2_defconfig
index 59f36a58f842..59f36a58f842 100644
--- a/arch/cris/defconfig
+++ b/arch/cris/configs/etrax-100lx_v2_defconfig
diff --git a/arch/cris/etraxfs_defconfig b/arch/cris/configs/etraxfs_defconfig
index 73c646a37255..73c646a37255 100644
--- a/arch/cris/etraxfs_defconfig
+++ b/arch/cris/configs/etraxfs_defconfig
diff --git a/arch/frv/kernel/pm.c b/arch/frv/kernel/pm.c
index d1113c5031f5..be722fc1acff 100644
--- a/arch/frv/kernel/pm.c
+++ b/arch/frv/kernel/pm.c
@@ -211,7 +211,7 @@ static int cmode_procctl(ctl_table *ctl, int write, struct file *filp,
211 return try_set_cmode(new_cmode)?:*lenp; 211 return try_set_cmode(new_cmode)?:*lenp;
212} 212}
213 213
214static int cmode_sysctl(ctl_table *table, int __user *name, int nlen, 214static int cmode_sysctl(ctl_table *table,
215 void __user *oldval, size_t __user *oldlenp, 215 void __user *oldval, size_t __user *oldlenp,
216 void __user *newval, size_t newlen) 216 void __user *newval, size_t newlen)
217{ 217{
@@ -314,7 +314,7 @@ static int p0_procctl(ctl_table *ctl, int write, struct file *filp,
314 return try_set_p0(new_p0)?:*lenp; 314 return try_set_p0(new_p0)?:*lenp;
315} 315}
316 316
317static int p0_sysctl(ctl_table *table, int __user *name, int nlen, 317static int p0_sysctl(ctl_table *table,
318 void __user *oldval, size_t __user *oldlenp, 318 void __user *oldval, size_t __user *oldlenp,
319 void __user *newval, size_t newlen) 319 void __user *newval, size_t newlen)
320{ 320{
@@ -358,7 +358,7 @@ static int cm_procctl(ctl_table *ctl, int write, struct file *filp,
358 return try_set_cm(new_cm)?:*lenp; 358 return try_set_cm(new_cm)?:*lenp;
359} 359}
360 360
361static int cm_sysctl(ctl_table *table, int __user *name, int nlen, 361static int cm_sysctl(ctl_table *table,
362 void __user *oldval, size_t __user *oldlenp, 362 void __user *oldval, size_t __user *oldlenp,
363 void __user *newval, size_t newlen) 363 void __user *newval, size_t newlen)
364{ 364{
diff --git a/arch/frv/mb93090-mb00/pci-dma-nommu.c b/arch/frv/mb93090-mb00/pci-dma-nommu.c
index 64ee58d748be..52ff9aec799d 100644
--- a/arch/frv/mb93090-mb00/pci-dma-nommu.c
+++ b/arch/frv/mb93090-mb00/pci-dma-nommu.c
@@ -111,7 +111,7 @@ EXPORT_SYMBOL(dma_free_coherent);
111 * The 32-bit bus address to use is returned. 111 * The 32-bit bus address to use is returned.
112 * 112 *
113 * Once the device is given the dma address, the device owns this memory 113 * Once the device is given the dma address, the device owns this memory
114 * until either pci_unmap_single or pci_dma_sync_single is performed. 114 * until either dma_unmap_single or pci_dma_sync_single is performed.
115 */ 115 */
116dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size, 116dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
117 enum dma_data_direction direction) 117 enum dma_data_direction direction)
@@ -129,7 +129,7 @@ EXPORT_SYMBOL(dma_map_single);
129/* 129/*
130 * Map a set of buffers described by scatterlist in streaming 130 * Map a set of buffers described by scatterlist in streaming
131 * mode for DMA. This is the scather-gather version of the 131 * mode for DMA. This is the scather-gather version of the
132 * above pci_map_single interface. Here the scatter gather list 132 * above dma_map_single interface. Here the scatter gather list
133 * elements are each tagged with the appropriate dma address 133 * elements are each tagged with the appropriate dma address
134 * and length. They are obtained via sg_dma_{address,length}(SG). 134 * and length. They are obtained via sg_dma_{address,length}(SG).
135 * 135 *
@@ -139,7 +139,7 @@ EXPORT_SYMBOL(dma_map_single);
139 * The routine returns the number of addr/length pairs actually 139 * The routine returns the number of addr/length pairs actually
140 * used, at most nents. 140 * used, at most nents.
141 * 141 *
142 * Device ownership issues as mentioned above for pci_map_single are 142 * Device ownership issues as mentioned above for dma_map_single are
143 * the same here. 143 * the same here.
144 */ 144 */
145int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, 145int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
@@ -158,3 +158,20 @@ int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
158} 158}
159 159
160EXPORT_SYMBOL(dma_map_sg); 160EXPORT_SYMBOL(dma_map_sg);
161
162/*
163 * Map a single page of the indicated size for DMA in streaming mode.
164 * The 32-bit bus address to use is returned.
165 *
166 * Device ownership issues as mentioned above for dma_map_single are
167 * the same here.
168 */
169dma_addr_t dma_map_page(struct device *dev, struct page *page, unsigned long offset,
170 size_t size, enum dma_data_direction direction)
171{
172 BUG_ON(direction == DMA_NONE);
173 flush_dcache_page(page);
174 return (dma_addr_t) page_to_phys(page) + offset;
175}
176
177EXPORT_SYMBOL(dma_map_page);
diff --git a/arch/frv/mb93090-mb00/pci-dma.c b/arch/frv/mb93090-mb00/pci-dma.c
index 662f7b12d005..3ddedebc4eb3 100644
--- a/arch/frv/mb93090-mb00/pci-dma.c
+++ b/arch/frv/mb93090-mb00/pci-dma.c
@@ -61,7 +61,7 @@ EXPORT_SYMBOL(dma_map_single);
61/* 61/*
62 * Map a set of buffers described by scatterlist in streaming 62 * Map a set of buffers described by scatterlist in streaming
63 * mode for DMA. This is the scather-gather version of the 63 * mode for DMA. This is the scather-gather version of the
64 * above pci_map_single interface. Here the scatter gather list 64 * above dma_map_single interface. Here the scatter gather list
65 * elements are each tagged with the appropriate dma address 65 * elements are each tagged with the appropriate dma address
66 * and length. They are obtained via sg_dma_{address,length}(SG). 66 * and length. They are obtained via sg_dma_{address,length}(SG).
67 * 67 *
@@ -71,7 +71,7 @@ EXPORT_SYMBOL(dma_map_single);
71 * The routine returns the number of addr/length pairs actually 71 * The routine returns the number of addr/length pairs actually
72 * used, at most nents. 72 * used, at most nents.
73 * 73 *
74 * Device ownership issues as mentioned above for pci_map_single are 74 * Device ownership issues as mentioned above for dma_map_single are
75 * the same here. 75 * the same here.
76 */ 76 */
77int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, 77int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
@@ -105,6 +105,13 @@ int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
105 105
106EXPORT_SYMBOL(dma_map_sg); 106EXPORT_SYMBOL(dma_map_sg);
107 107
108/*
109 * Map a single page of the indicated size for DMA in streaming mode.
110 * The 32-bit bus address to use is returned.
111 *
112 * Device ownership issues as mentioned above for dma_map_single are
113 * the same here.
114 */
108dma_addr_t dma_map_page(struct device *dev, struct page *page, unsigned long offset, 115dma_addr_t dma_map_page(struct device *dev, struct page *page, unsigned long offset,
109 size_t size, enum dma_data_direction direction) 116 size_t size, enum dma_data_direction direction)
110{ 117{
diff --git a/arch/frv/mb93090-mb00/pci-frv.c b/arch/frv/mb93090-mb00/pci-frv.c
index edae117fcc2b..43d67534c712 100644
--- a/arch/frv/mb93090-mb00/pci-frv.c
+++ b/arch/frv/mb93090-mb00/pci-frv.c
@@ -201,38 +201,6 @@ void __init pcibios_resource_survey(void)
201 pcibios_assign_resources(); 201 pcibios_assign_resources();
202} 202}
203 203
204int pcibios_enable_resources(struct pci_dev *dev, int mask)
205{
206 u16 cmd, old_cmd;
207 int idx;
208 struct resource *r;
209
210 pci_read_config_word(dev, PCI_COMMAND, &cmd);
211 old_cmd = cmd;
212 for(idx=0; idx<6; idx++) {
213 /* Only set up the requested stuff */
214 if (!(mask & (1<<idx)))
215 continue;
216
217 r = &dev->resource[idx];
218 if (!r->start && r->end) {
219 printk(KERN_ERR "PCI: Device %s not available because of resource collisions\n", pci_name(dev));
220 return -EINVAL;
221 }
222 if (r->flags & IORESOURCE_IO)
223 cmd |= PCI_COMMAND_IO;
224 if (r->flags & IORESOURCE_MEM)
225 cmd |= PCI_COMMAND_MEMORY;
226 }
227 if (dev->resource[PCI_ROM_RESOURCE].start)
228 cmd |= PCI_COMMAND_MEMORY;
229 if (cmd != old_cmd) {
230 printk("PCI: Enabling device %s (%04x -> %04x)\n", pci_name(dev), old_cmd, cmd);
231 pci_write_config_word(dev, PCI_COMMAND, cmd);
232 }
233 return 0;
234}
235
236/* 204/*
237 * If we set up a device for bus mastering, we need to check the latency 205 * If we set up a device for bus mastering, we need to check the latency
238 * timer as certain crappy BIOSes forget to set it properly. 206 * timer as certain crappy BIOSes forget to set it properly.
diff --git a/arch/frv/mb93090-mb00/pci-frv.h b/arch/frv/mb93090-mb00/pci-frv.h
index 0c7bf39dc729..f3fe55914793 100644
--- a/arch/frv/mb93090-mb00/pci-frv.h
+++ b/arch/frv/mb93090-mb00/pci-frv.h
@@ -29,7 +29,6 @@ extern unsigned int __nongpreldata pci_probe;
29extern unsigned int pcibios_max_latency; 29extern unsigned int pcibios_max_latency;
30 30
31void pcibios_resource_survey(void); 31void pcibios_resource_survey(void);
32int pcibios_enable_resources(struct pci_dev *, int);
33 32
34/* pci-vdk.c */ 33/* pci-vdk.c */
35 34
diff --git a/arch/frv/mb93090-mb00/pci-vdk.c b/arch/frv/mb93090-mb00/pci-vdk.c
index f003cfa68b7a..0f41c3a72da5 100644
--- a/arch/frv/mb93090-mb00/pci-vdk.c
+++ b/arch/frv/mb93090-mb00/pci-vdk.c
@@ -412,7 +412,7 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
412{ 412{
413 int err; 413 int err;
414 414
415 if ((err = pcibios_enable_resources(dev, mask)) < 0) 415 if ((err = pci_enable_resources(dev, mask)) < 0)
416 return err; 416 return err;
417 if (!dev->msi_enabled) 417 if (!dev->msi_enabled)
418 pcibios_enable_irq(dev); 418 pcibios_enable_irq(dev);
diff --git a/arch/frv/mm/init.c b/arch/frv/mm/init.c
index 1b851db34186..0708284f85fb 100644
--- a/arch/frv/mm/init.c
+++ b/arch/frv/mm/init.c
@@ -87,8 +87,6 @@ void __init paging_init(void)
87 87
88 pkmap_page_table = alloc_bootmem_pages(PAGE_SIZE); 88 pkmap_page_table = alloc_bootmem_pages(PAGE_SIZE);
89 89
90 memset(pkmap_page_table, 0, PAGE_SIZE);
91
92 pge = swapper_pg_dir + pgd_index_k(PKMAP_BASE); 90 pge = swapper_pg_dir + pgd_index_k(PKMAP_BASE);
93 pue = pud_offset(pge, PKMAP_BASE); 91 pue = pud_offset(pge, PKMAP_BASE);
94 pme = pmd_offset(pue, PKMAP_BASE); 92 pme = pmd_offset(pue, PKMAP_BASE);
diff --git a/arch/h8300/Kconfig b/arch/h8300/Kconfig
index 396ab059efa3..c7966746fbfe 100644
--- a/arch/h8300/Kconfig
+++ b/arch/h8300/Kconfig
@@ -62,13 +62,14 @@ config GENERIC_TIME
62 bool 62 bool
63 default y 63 default y
64 64
65config GENERIC_BUG
66 bool
67 depends on BUG
68
65config TIME_LOW_RES 69config TIME_LOW_RES
66 bool 70 bool
67 default y 71 default y
68 72
69config ARCH_SUPPORTS_AOUT
70 def_bool y
71
72config NO_IOPORT 73config NO_IOPORT
73 def_bool y 74 def_bool y
74 75
diff --git a/arch/h8300/Kconfig.cpu b/arch/h8300/Kconfig.cpu
index 582797db9603..b65dcfe51d9c 100644
--- a/arch/h8300/Kconfig.cpu
+++ b/arch/h8300/Kconfig.cpu
@@ -1,5 +1,7 @@
1menu "Processor type and features" 1menu "Processor type and features"
2 2
3source "kernel/time/Kconfig"
4
3choice 5choice
4 prompt "H8/300 platform" 6 prompt "H8/300 platform"
5 default H8300H_GENERIC 7 default H8300H_GENERIC
@@ -11,6 +13,7 @@ config H8300H_GENERIC
11 13
12config H8300H_AKI3068NET 14config H8300H_AKI3068NET
13 bool "AE-3068/69" 15 bool "AE-3068/69"
16 select CONFIG_H83068
14 help 17 help
15 AKI-H8/3068F / AKI-H8/3069F Flashmicom LAN Board Support 18 AKI-H8/3068F / AKI-H8/3069F Flashmicom LAN Board Support
16 More Information. (Japanese Only) 19 More Information. (Japanese Only)
@@ -21,6 +24,7 @@ config H8300H_AKI3068NET
21 24
22config H8300H_H8MAX 25config H8300H_H8MAX
23 bool "H8MAX" 26 bool "H8MAX"
27 select CONFIG_H83068
24 help 28 help
25 H8MAX Evaluation Board Support 29 H8MAX Evaluation Board Support
26 More Information. (Japanese Only) 30 More Information. (Japanese Only)
@@ -28,6 +32,7 @@ config H8300H_H8MAX
28 32
29config H8300H_SIM 33config H8300H_SIM
30 bool "H8/300H Simulator" 34 bool "H8/300H Simulator"
35 select CONFIG_H83007
31 help 36 help
32 GDB Simulator Support 37 GDB Simulator Support
33 More Information. 38 More Information.
@@ -40,6 +45,7 @@ config H8S_GENERIC
40 45
41config H8S_EDOSK2674 46config H8S_EDOSK2674
42 bool "EDOSK-2674" 47 bool "EDOSK-2674"
48 select CONFIG_H8S2768
43 help 49 help
44 Renesas EDOSK-2674 Evaluation Board Support 50 Renesas EDOSK-2674 Evaluation Board Support
45 More Information. 51 More Information.
@@ -55,44 +61,37 @@ config H8S_SIM
55 61
56endchoice 62endchoice
57 63
58if (H8300H_GENERIC || H8S_GENERIC)
59menu "Detail Selection"
60if (H8300H_GENERIC)
61choice 64choice
62 prompt "CPU Selection" 65 prompt "CPU Selection"
63 66
64config H83002 67config H83002
65 bool "H8/3001,3002,3003" 68 bool "H8/3001,3002,3003"
69 select CPU_H8300H
66 70
67config H83007 71config H83007
68 bool "H8/3006,3007" 72 bool "H8/3006,3007"
73 select CPU_H8300H
69 74
70config H83048 75config H83048
71 bool "H8/3044,3045,3046,3047,3048,3052" 76 bool "H8/3044,3045,3046,3047,3048,3052"
77 select CPU_H8300H
72 78
73config H83068 79config H83068
74 bool "H8/3065,3066,3067,3068,3069" 80 bool "H8/3065,3066,3067,3068,3069"
75endchoice 81 select CPU_H8300H
76endif
77
78if (H8S_GENERIC)
79choice
80 prompt "CPU Selection"
81 82
82config H8S2678 83config H8S2678
83 bool "H8S/2670,2673,2674R,2675,2676" 84 bool "H8S/2670,2673,2674R,2675,2676"
85 select CPU_H8S
86
84endchoice 87endchoice
85endif
86 88
87config CPU_CLOCK 89config CPU_CLOCK
88 int "CPU Clock Frequency (/1KHz)" 90 int "CPU Clock Frequency (/1KHz)"
89 default "20000" 91 default "20000"
90 help 92 help
91 CPU Clock Frequency divide to 1000 93 CPU Clock Frequency divide to 1000
92endmenu
93endif
94 94
95if (H8300H_GENERIC || H8S_GENERIC || H8300H_SIM || H8S_SIM || H8S_EDOSK2674)
96choice 95choice
97 prompt "Kernel executes from" 96 prompt "Kernel executes from"
98 ---help--- 97 ---help---
@@ -107,75 +106,61 @@ config ROMKERNEL
107 bool "ROM" 106 bool "ROM"
108 help 107 help
109 The kernel will be resident in FLASH/ROM when running. 108 The kernel will be resident in FLASH/ROM when running.
110
111endchoice 109endchoice
112endif
113 110
114if (H8300H_AKI3068NET)
115config H83068
116 bool
117 default y
118 111
119config CPU_CLOCK 112config CPU_H8300H
120 int
121 default "20000"
122
123config RAMKERNEL
124 bool 113 bool
114 depends on (H83002 || H83007 || H83048 || H83068)
125 default y 115 default y
126endif
127 116
128if (H8300H_H8MAX) 117config CPU_H8S
129config H83068
130 bool 118 bool
119 depends on H8S2678
131 default y 120 default y
132 121
133config CPU_CLOCK 122choice
134 int 123 prompt "Timer"
135 default 25000 124config H8300_TIMER8
125 bool "8bit timer (2ch cascade)"
126 depends on (H83007 || H83068 || H8S2678)
136 127
137config RAMKERNEL 128config H8300_TIMER16
138 bool 129 bool "16bit timer"
139 default y 130 depends on (H83007 || H83068)
140endif
141 131
142if (H8300H_SIM) 132config H8300_ITU
143config H83007 133 bool "ITU"
144 bool 134 depends on (H83002 || H83048)
145 default y
146 135
147config CPU_CLOCK 136config H8300_TPU
148 int 137 bool "TPU"
149 default "16000" 138 depends on H8S2678
150endif 139endchoice
151 140
152if (H8S_EDOSK2674) 141if H8300_TIMER8
153config H8S2678 142choice
154 bool 143 prompt "Timer Channel"
155 default y 144config H8300_TIMER8_CH0
156config CPU_CLOCK 145 bool "Channel 0"
157 int 146config H8300_TIMER8_CH2
158 default 33000 147 bool "Channel 2"
148 depends on CPU_H8300H
149endchoice
159endif 150endif
160 151
161if (H8S_SIM) 152config H8300_TIMER16_CH
162config H8S2678 153 int "16bit timer channel (0 - 2)"
163 bool 154 depends on H8300_TIMER16
164 default y 155 range 0 2
165config CPU_CLOCK
166 int
167 default 33000
168endif
169 156
170config CPU_H8300H 157config H8300_ITU_CH
171 bool 158 int "ITU channel"
172 depends on (H83002 || H83007 || H83048 || H83068) 159 depends on H8300_ITU
173 default y
174 160
175config CPU_H8S 161config H8300_TPU_CH
176 bool 162 int "TPU channel"
177 depends on H8S2678 163 depends on H8300_TPU
178 default y
179 164
180config PREEMPT 165config PREEMPT
181 bool "Preemptible Kernel" 166 bool "Preemptible Kernel"
diff --git a/arch/h8300/include/asm/a.out.h b/arch/h8300/include/asm/a.out.h
deleted file mode 100644
index ded780f0a492..000000000000
--- a/arch/h8300/include/asm/a.out.h
+++ /dev/null
@@ -1,20 +0,0 @@
1#ifndef __H8300_A_OUT_H__
2#define __H8300_A_OUT_H__
3
4struct exec
5{
6 unsigned long a_info; /* Use macros N_MAGIC, etc for access */
7 unsigned a_text; /* length of text, in bytes */
8 unsigned a_data; /* length of data, in bytes */
9 unsigned a_bss; /* length of uninitialized data area for file, in bytes */
10 unsigned a_syms; /* length of symbol table data in file, in bytes */
11 unsigned a_entry; /* start address */
12 unsigned a_trsize; /* length of relocation info for text, in bytes */
13 unsigned a_drsize; /* length of relocation info for data, in bytes */
14};
15
16#define N_TRSIZE(a) ((a).a_trsize)
17#define N_DRSIZE(a) ((a).a_drsize)
18#define N_SYMSIZE(a) ((a).a_syms)
19
20#endif /* __H8300_A_OUT_H__ */
diff --git a/arch/h8300/include/asm/bug.h b/arch/h8300/include/asm/bug.h
index edddf5b086e5..887c19773185 100644
--- a/arch/h8300/include/asm/bug.h
+++ b/arch/h8300/include/asm/bug.h
@@ -1,4 +1,8 @@
1#ifndef _H8300_BUG_H 1#ifndef _H8300_BUG_H
2#define _H8300_BUG_H 2#define _H8300_BUG_H
3
4/* always true */
5#define is_valid_bugaddr(addr) (1)
6
3#include <asm-generic/bug.h> 7#include <asm-generic/bug.h>
4#endif 8#endif
diff --git a/arch/h8300/include/asm/elf.h b/arch/h8300/include/asm/elf.h
index a8b57d1f4128..94e2284c8816 100644
--- a/arch/h8300/include/asm/elf.h
+++ b/arch/h8300/include/asm/elf.h
@@ -55,7 +55,7 @@ typedef unsigned long elf_fpregset_t;
55 55
56#define ELF_PLATFORM (NULL) 56#define ELF_PLATFORM (NULL)
57 57
58#define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX) 58#define SET_PERSONALITY(ex) set_personality(PER_LINUX)
59 59
60#define R_H8_NONE 0 60#define R_H8_NONE 0
61#define R_H8_DIR32 1 61#define R_H8_DIR32 1
diff --git a/arch/h8300/include/asm/io.h b/arch/h8300/include/asm/io.h
index 26dc6ccd9441..33e842f3284b 100644
--- a/arch/h8300/include/asm/io.h
+++ b/arch/h8300/include/asm/io.h
@@ -295,6 +295,40 @@ static __inline__ void ctrl_outl(unsigned long b, unsigned long addr)
295 *(volatile unsigned long*)addr = b; 295 *(volatile unsigned long*)addr = b;
296} 296}
297 297
298static __inline__ void ctrl_bclr(int b, unsigned long addr)
299{
300 if (__builtin_constant_p(b))
301 switch (b) {
302 case 0: __asm__("bclr #0,@%0"::"r"(addr)); break;
303 case 1: __asm__("bclr #1,@%0"::"r"(addr)); break;
304 case 2: __asm__("bclr #2,@%0"::"r"(addr)); break;
305 case 3: __asm__("bclr #3,@%0"::"r"(addr)); break;
306 case 4: __asm__("bclr #4,@%0"::"r"(addr)); break;
307 case 5: __asm__("bclr #5,@%0"::"r"(addr)); break;
308 case 6: __asm__("bclr #6,@%0"::"r"(addr)); break;
309 case 7: __asm__("bclr #7,@%0"::"r"(addr)); break;
310 }
311 else
312 __asm__("bclr %w0,@%1"::"r"(b), "r"(addr));
313}
314
315static __inline__ void ctrl_bset(int b, unsigned long addr)
316{
317 if (__builtin_constant_p(b))
318 switch (b) {
319 case 0: __asm__("bset #0,@%0"::"r"(addr)); break;
320 case 1: __asm__("bset #1,@%0"::"r"(addr)); break;
321 case 2: __asm__("bset #2,@%0"::"r"(addr)); break;
322 case 3: __asm__("bset #3,@%0"::"r"(addr)); break;
323 case 4: __asm__("bset #4,@%0"::"r"(addr)); break;
324 case 5: __asm__("bset #5,@%0"::"r"(addr)); break;
325 case 6: __asm__("bset #6,@%0"::"r"(addr)); break;
326 case 7: __asm__("bset #7,@%0"::"r"(addr)); break;
327 }
328 else
329 __asm__("bset %w0,@%1"::"r"(b), "r"(addr));
330}
331
298/* Pages to physical address... */ 332/* Pages to physical address... */
299#define page_to_phys(page) ((page - mem_map) << PAGE_SHIFT) 333#define page_to_phys(page) ((page - mem_map) << PAGE_SHIFT)
300#define page_to_bus(page) ((page - mem_map) << PAGE_SHIFT) 334#define page_to_bus(page) ((page - mem_map) << PAGE_SHIFT)
diff --git a/arch/h8300/include/asm/md.h b/arch/h8300/include/asm/md.h
index 1a47dc6691fb..1b7300e0a175 100644
--- a/arch/h8300/include/asm/md.h
+++ b/arch/h8300/include/asm/md.h
@@ -1,4 +1,4 @@
1/* $Id: md.h,v 1.1 2002/11/19 02:09:26 gerg Exp $ 1/*
2 * md.h: High speed xor_block operation for RAID4/5 2 * md.h: High speed xor_block operation for RAID4/5
3 * 3 *
4 */ 4 */
diff --git a/arch/h8300/include/asm/system.h b/arch/h8300/include/asm/system.h
index 4b8e475908ae..d98d97685f06 100644
--- a/arch/h8300/include/asm/system.h
+++ b/arch/h8300/include/asm/system.h
@@ -155,4 +155,6 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz
155 155
156#define arch_align_stack(x) (x) 156#define arch_align_stack(x) (x)
157 157
158void die(char *str, struct pt_regs *fp, unsigned long err);
159
158#endif /* _H8300_SYSTEM_H */ 160#endif /* _H8300_SYSTEM_H */
diff --git a/arch/h8300/kernel/Makefile b/arch/h8300/kernel/Makefile
index 6c248c3c5c3b..8d4d2a54be9e 100644
--- a/arch/h8300/kernel/Makefile
+++ b/arch/h8300/kernel/Makefile
@@ -7,6 +7,6 @@ extra-y := vmlinux.lds
7obj-y := process.o traps.o ptrace.o irq.o \ 7obj-y := process.o traps.o ptrace.o irq.o \
8 sys_h8300.o time.o signal.o \ 8 sys_h8300.o time.o signal.o \
9 setup.o gpio.o init_task.o syscalls.o \ 9 setup.o gpio.o init_task.o syscalls.o \
10 entry.o 10 entry.o timer/
11 11
12obj-$(CONFIG_MODULES) += module.o h8300_ksyms.o 12obj-$(CONFIG_MODULES) += module.o h8300_ksyms.o
diff --git a/arch/h8300/kernel/module.c b/arch/h8300/kernel/module.c
index 4fd7138a6e03..cfc9127d2ced 100644
--- a/arch/h8300/kernel/module.c
+++ b/arch/h8300/kernel/module.c
@@ -114,9 +114,10 @@ int module_finalize(const Elf_Ehdr *hdr,
114 const Elf_Shdr *sechdrs, 114 const Elf_Shdr *sechdrs,
115 struct module *me) 115 struct module *me)
116{ 116{
117 return 0; 117 return module_bug_finalize(hdr, sechdrs, me);
118} 118}
119 119
120void module_arch_cleanup(struct module *mod) 120void module_arch_cleanup(struct module *mod)
121{ 121{
122 module_bug_cleanup(mod);
122} 123}
diff --git a/arch/h8300/kernel/process.c b/arch/h8300/kernel/process.c
index dfbe7ab9ffe2..a8ef654a5a0b 100644
--- a/arch/h8300/kernel/process.c
+++ b/arch/h8300/kernel/process.c
@@ -34,7 +34,6 @@
34#include <linux/ptrace.h> 34#include <linux/ptrace.h>
35#include <linux/slab.h> 35#include <linux/slab.h>
36#include <linux/user.h> 36#include <linux/user.h>
37#include <linux/a.out.h>
38#include <linux/interrupt.h> 37#include <linux/interrupt.h>
39#include <linux/reboot.h> 38#include <linux/reboot.h>
40#include <linux/fs.h> 39#include <linux/fs.h>
diff --git a/arch/h8300/kernel/time.c b/arch/h8300/kernel/time.c
index e37c835e67cf..7f2d6cfbb4b6 100644
--- a/arch/h8300/kernel/time.c
+++ b/arch/h8300/kernel/time.c
@@ -27,27 +27,21 @@
27#include <linux/profile.h> 27#include <linux/profile.h>
28 28
29#include <asm/io.h> 29#include <asm/io.h>
30#include <asm/target_time.h> 30#include <asm/timer.h>
31 31
32#define TICK_SIZE (tick_nsec / 1000) 32#define TICK_SIZE (tick_nsec / 1000)
33 33
34/* 34void h8300_timer_tick(void)
35 * timer_interrupt() needs to keep up the real-time clock,
36 * as well as call the "do_timer()" routine every clocktick
37 */
38static void timer_interrupt(int irq, void *dummy, struct pt_regs * regs)
39{ 35{
40 /* may need to kick the hardware timer */ 36 if (current->pid)
41 platform_timer_eoi(); 37 profile_tick(CPU_PROFILING);
42 38 write_seqlock(&xtime_lock);
43 do_timer(1); 39 do_timer(1);
44#ifndef CONFIG_SMP 40 write_sequnlock(&xtime_lock);
45 update_process_times(user_mode(regs)); 41 update_process_times(user_mode(get_irq_regs()));
46#endif
47 profile_tick(CPU_PROFILING);
48} 42}
49 43
50void time_init(void) 44void __init time_init(void)
51{ 45{
52 unsigned int year, mon, day, hour, min, sec; 46 unsigned int year, mon, day, hour, min, sec;
53 47
@@ -57,12 +51,13 @@ void time_init(void)
57 year = 1980; 51 year = 1980;
58 mon = day = 1; 52 mon = day = 1;
59 hour = min = sec = 0; 53 hour = min = sec = 0;
60 platform_gettod (&year, &mon, &day, &hour, &min, &sec); 54#ifdef CONFIG_H8300_GETTOD
61 55 h8300_gettod (&year, &mon, &day, &hour, &min, &sec);
56#endif
62 if ((year += 1900) < 1970) 57 if ((year += 1900) < 1970)
63 year += 100; 58 year += 100;
64 xtime.tv_sec = mktime(year, mon, day, hour, min, sec); 59 xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
65 xtime.tv_nsec = 0; 60 xtime.tv_nsec = 0;
66 61
67 platform_timer_setup(timer_interrupt); 62 h8300_timer_setup();
68} 63}
diff --git a/arch/h8300/kernel/timer/Makefile b/arch/h8300/kernel/timer/Makefile
new file mode 100644
index 000000000000..bef0510ea6ad
--- /dev/null
+++ b/arch/h8300/kernel/timer/Makefile
@@ -0,0 +1,6 @@
1# h8300 internal timer handler
2
3obj-$(CONFIG_H8300_TIMER8) := timer8.o
4obj-$(CONFIG_H8300_TIMER16) := timer16.o
5obj-$(CONFIG_H8300_ITU) := itu.o
6obj-$(CONFIG_H8300_TPU) := tpu.o
diff --git a/arch/h8300/kernel/timer/itu.c b/arch/h8300/kernel/timer/itu.c
new file mode 100644
index 000000000000..d1c926596b08
--- /dev/null
+++ b/arch/h8300/kernel/timer/itu.c
@@ -0,0 +1,83 @@
1/*
2 * linux/arch/h8300/kernel/timer/itu.c
3 *
4 * Yoshinori Sato <ysato@users.sourcefoge.jp>
5 *
6 * ITU Timer Handler
7 *
8 */
9
10#include <linux/errno.h>
11#include <linux/sched.h>
12#include <linux/kernel.h>
13#include <linux/param.h>
14#include <linux/string.h>
15#include <linux/mm.h>
16#include <linux/interrupt.h>
17#include <linux/init.h>
18#include <linux/timex.h>
19
20#include <asm/segment.h>
21#include <asm/io.h>
22#include <asm/irq.h>
23#include <asm/regs306x.h>
24
25#if CONFIG_H8300_ITU_CH == 0
26#define ITUBASE 0xffff64
27#define ITUIRQ 24
28#elif CONFIG_H8300_ITU_CH == 1
29#define ITUBASE 0xffff6e
30#define ITUIRQ 28
31#elif CONFIG_H8300_ITU_CH == 2
32#define ITUBASE 0xffff78
33#define ITUIRQ 32
34#elif CONFIG_H8300_ITU_CH == 3
35#define ITUBASE 0xffff82
36#define ITUIRQ 36
37#elif CONFIG_H8300_ITU_CH == 4
38#define ITUBASE 0xffff92
39#define ITUIRQ 40
40#else
41#error Unknown timer channel.
42#endif
43
44#define TCR 0
45#define TIOR 1
46#define TIER 2
47#define TSR 3
48#define TCNT 4
49#define GRA 6
50#define GRB 8
51
52static irqreturn_t timer_interrupt(int irq, void *dev_id)
53{
54 h8300_timer_tick();
55 ctrl_bclr(IMFA, ITUBASE + TSR);
56 return IRQ_HANDLED;
57}
58
59static struct irqaction itu_irq = {
60 .name = "itu",
61 .handler = timer_interrupt,
62 .flags = IRQF_DISABLED | IRQF_TIMER,
63 .mask = CPU_MASK_NONE,
64};
65
66static const int __initdata divide_rate[] = {1, 2, 4, 8};
67
68void __init h8300_timer_setup(void)
69{
70 unsigned int div;
71 unsigned int cnt;
72
73 calc_param(cnt, div, divide_rate, 0x10000);
74
75 setup_irq(ITUIRQ, &itu_irq);
76
77 /* initalize timer */
78 ctrl_outb(0, TSTR);
79 ctrl_outb(CCLR0 | div, ITUBASE + TCR);
80 ctrl_outb(0x01, ITUBASE + TIER);
81 ctrl_outw(cnt, ITUBASE + GRA);
82 ctrl_bset(CONFIG_H8300_ITU_CH, TSTR);
83}
diff --git a/arch/h8300/kernel/timer/timer16.c b/arch/h8300/kernel/timer/timer16.c
new file mode 100644
index 000000000000..e14271b72119
--- /dev/null
+++ b/arch/h8300/kernel/timer/timer16.c
@@ -0,0 +1,78 @@
1/*
2 * linux/arch/h8300/kernel/timer/timer16.c
3 *
4 * Yoshinori Sato <ysato@users.sourcefoge.jp>
5 *
6 * 16bit Timer Handler
7 *
8 */
9
10#include <linux/errno.h>
11#include <linux/sched.h>
12#include <linux/kernel.h>
13#include <linux/param.h>
14#include <linux/string.h>
15#include <linux/mm.h>
16#include <linux/interrupt.h>
17#include <linux/init.h>
18#include <linux/timex.h>
19
20#include <asm/segment.h>
21#include <asm/io.h>
22#include <asm/irq.h>
23#include <asm/regs306x.h>
24
25/* 16bit timer */
26#if CONFIG_H8300_TIMER16_CH == 0
27#define _16BASE 0xffff78
28#define _16IRQ 24
29#elif CONFIG_H8300_TIMER16_CH == 1
30#define _16BASE 0xffff80
31#define _16IRQ 28
32#elif CONFIG_H8300_TIMER16_CH == 2
33#define _16BASE 0xffff88
34#define _16IRQ 32
35#else
36#error Unknown timer channel.
37#endif
38
39#define TCR 0
40#define TIOR 1
41#define TCNT 2
42#define GRA 4
43#define GRB 6
44
45#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*10000 /* Timer input freq. */
46
47static irqreturn_t timer_interrupt(int irq, void *dev_id)
48{
49 h8300_timer_tick();
50 ctrl_bclr(CONFIG_H8300_TIMER16_CH, TISRA);
51 return IRQ_HANDLED;
52}
53
54static struct irqaction timer16_irq = {
55 .name = "timer-16",
56 .handler = timer_interrupt,
57 .flags = IRQF_DISABLED | IRQF_TIMER,
58 .mask = CPU_MASK_NONE,
59};
60
61static const int __initdata divide_rate[] = {1, 2, 4, 8};
62
63void __init h8300_timer_setup(void)
64{
65 unsigned int div;
66 unsigned int cnt;
67
68 calc_param(cnt, div, divide_rate, 0x10000);
69
70 setup_irq(_16IRQ, &timer16_irq);
71
72 /* initalize timer */
73 ctrl_outb(0, TSTR);
74 ctrl_outb(CCLR0 | div, _16BASE + TCR);
75 ctrl_outw(cnt, _16BASE + GRA);
76 ctrl_bset(4 + CONFIG_H8300_TIMER16_CH, TISRA);
77 ctrl_bset(CONFIG_H8300_TIMER16_CH, TSTR);
78}
diff --git a/arch/h8300/kernel/timer/timer8.c b/arch/h8300/kernel/timer/timer8.c
new file mode 100644
index 000000000000..0556d7c7bea6
--- /dev/null
+++ b/arch/h8300/kernel/timer/timer8.c
@@ -0,0 +1,103 @@
1/*
2 * linux/arch/h8300/kernel/cpu/timer/timer8.c
3 *
4 * Yoshinori Sato <ysato@users.sourcefoge.jp>
5 *
6 * 8bit Timer Handler
7 *
8 */
9
10#include <linux/errno.h>
11#include <linux/sched.h>
12#include <linux/kernel.h>
13#include <linux/param.h>
14#include <linux/string.h>
15#include <linux/mm.h>
16#include <linux/interrupt.h>
17#include <linux/init.h>
18#include <linux/profile.h>
19
20#include <asm/io.h>
21#include <asm/irq.h>
22#include <asm/timer.h>
23#if defined(CONFIG_CPU_H8300H)
24#include <asm/regs306x.h>
25#endif
26#if defined(CONFIG_CPU_H8S)
27#include <asm/regs267x.h>
28#endif
29
30/* 8bit timer x2 */
31#define CMFA 6
32
33#if defined(CONFIG_H8300_TIMER8_CH0)
34#define _8BASE _8TCR0
35#ifdef CONFIG_CPU_H8300H
36#define _8IRQ 36
37#endif
38#ifdef CONFIG_CPU_H8S
39#define _8IRQ 72
40#endif
41#elif defined(CONFIG_H8300_TIMER8_CH2)
42#ifdef CONFIG_CPU_H8300H
43#define _8BASE _8TCR2
44#define _8IRQ 40
45#endif
46#endif
47
48#ifndef _8BASE
49#error Unknown timer channel.
50#endif
51
52#define _8TCR 0
53#define _8TCSR 2
54#define TCORA 4
55#define TCORB 6
56#define _8TCNT 8
57
58#define CMIEA 0x40
59#define CCLR_CMA 0x08
60#define CKS2 0x04
61
62/*
63 * timer_interrupt() needs to keep up the real-time clock,
64 * as well as call the "do_timer()" routine every clocktick
65 */
66
67static irqreturn_t timer_interrupt(int irq, void *dev_id)
68{
69 h8300_timer_tick();
70 ctrl_bclr(CMFA, _8BASE + _8TCSR);
71 return IRQ_HANDLED;
72}
73
74static struct irqaction timer8_irq = {
75 .name = "timer-8",
76 .handler = timer_interrupt,
77 .flags = IRQF_DISABLED | IRQF_TIMER,
78 .mask = CPU_MASK_NONE,
79};
80
81static const int __initdata divide_rate[] = {8, 64, 8192};
82
83void __init h8300_timer_setup(void)
84{
85 unsigned int div;
86 unsigned int cnt;
87
88 calc_param(cnt, div, divide_rate, 0x10000);
89 div++;
90
91 setup_irq(_8IRQ, &timer8_irq);
92
93#if defined(CONFIG_CPU_H8S)
94 /* Timer module enable */
95 ctrl_bclr(0, MSTPCRL)
96#endif
97
98 /* initalize timer */
99 ctrl_outw(cnt, _8BASE + TCORA);
100 ctrl_outw(0x0000, _8BASE + _8TCSR);
101 ctrl_outw((CMIEA|CCLR_CMA|CKS2) << 8 | div,
102 _8BASE + _8TCR);
103}
diff --git a/arch/h8300/kernel/timer/tpu.c b/arch/h8300/kernel/timer/tpu.c
new file mode 100644
index 000000000000..df7f453a9673
--- /dev/null
+++ b/arch/h8300/kernel/timer/tpu.c
@@ -0,0 +1,102 @@
1/*
2 * linux/arch/h8300/kernel/timer/tpu.c
3 *
4 * Yoshinori Sato <ysato@users.sourceforge.jp>
5 *
6 * TPU Timer Handler
7 *
8 */
9
10#include <linux/config.h>
11#include <linux/errno.h>
12#include <linux/sched.h>
13#include <linux/kernel.h>
14#include <linux/param.h>
15#include <linux/string.h>
16#include <linux/mm.h>
17#include <linux/interrupt.h>
18#include <linux/init.h>
19#include <linux/timex.h>
20
21#include <asm/segment.h>
22#include <asm/io.h>
23#include <asm/irq.h>
24#include <asm/regs267x.h>
25
26/* TPU */
27#if CONFIG_H8300_TPU_CH == 0
28#define TPUBASE 0xffffd0
29#define TPUIRQ 40
30#elif CONFIG_H8300_TPU_CH == 1
31#define TPUBASE 0xffffe0
32#define TPUIRQ 48
33#elif CONFIG_H8300_TPU_CH == 2
34#define TPUBASE 0xfffff0
35#define TPUIRQ 52
36#elif CONFIG_H8300_TPU_CH == 3
37#define TPUBASE 0xfffe80
38#define TPUIRQ 56
39#elif CONFIG_H8300_TPU_CH == 4
40#define TPUBASE 0xfffe90
41#define TPUIRQ 64
42#else
43#error Unknown timer channel.
44#endif
45
46#define _TCR 0
47#define _TMDR 1
48#define _TIOR 2
49#define _TIER 4
50#define _TSR 5
51#define _TCNT 6
52#define _GRA 8
53#define _GRB 10
54
55#define CCLR0 0x20
56
57static irqreturn_t timer_interrupt(int irq, void *dev_id)
58{
59 h8300_timer_tick();
60 ctrl_bclr(0, TPUBASE + _TSR);
61 return IRQ_HANDLED;
62}
63
64static struct irqaction tpu_irq = {
65 .name = "tpu",
66 .handler = timer_interrupt,
67 .flags = IRQF_DISABLED | IRQF_TIMER,
68 .mask = CPU_MASK_NONE,
69};
70
71const static int __initdata divide_rate[] = {
72#if CONFIG_H8300_TPU_CH == 0
73 1,4,16,64,0,0,0,0,
74#elif (CONFIG_H8300_TPU_CH == 1) || (CONFIG_H8300_TPU_CH == 5)
75 1,4,16,64,0,0,256,0,
76#elif (CONFIG_H8300_TPU_CH == 2) || (CONFIG_H8300_TPU_CH == 4)
77 1,4,16,64,0,0,0,1024,
78#elif CONFIG_H8300_TPU_CH == 3
79 1,4,16,64,0,1024,256,4096,
80#endif
81};
82
83void __init h8300_timer_setup(void)
84{
85 unsigned int cnt;
86 unsigned int div;
87
88 calc_param(cnt, div, divide_rate, 0x10000);
89
90 setup_irq(TPUIRQ, &tpu_irq);
91
92 /* TPU module enabled */
93 ctrl_bclr(3, MSTPCRH);
94
95 ctrl_outb(0, TSTR);
96 ctrl_outb(CCLR0 | div, TPUBASE + _TCR);
97 ctrl_outb(0, TPUBASE + _TMDR);
98 ctrl_outw(0, TPUBASE + _TIOR);
99 ctrl_outb(0x01, TPUBASE + _TIER);
100 ctrl_outw(cnt, TPUBASE + _GRA);
101 ctrl_bset(CONFIG_H8300_TPU_CH, TSTR);
102}
diff --git a/arch/h8300/kernel/traps.c b/arch/h8300/kernel/traps.c
index f8f7d7ea97f1..3c0b66bc669e 100644
--- a/arch/h8300/kernel/traps.c
+++ b/arch/h8300/kernel/traps.c
@@ -20,12 +20,14 @@
20#include <linux/errno.h> 20#include <linux/errno.h>
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/module.h> 22#include <linux/module.h>
23#include <linux/bug.h>
23 24
24#include <asm/system.h> 25#include <asm/system.h>
25#include <asm/irq.h> 26#include <asm/irq.h>
26#include <asm/traps.h> 27#include <asm/traps.h>
27#include <asm/page.h> 28#include <asm/page.h>
28#include <asm/gpio.h> 29
30static DEFINE_SPINLOCK(die_lock);
29 31
30/* 32/*
31 * this must be called very early as the kernel might 33 * this must be called very early as the kernel might
@@ -94,16 +96,19 @@ static void dump(struct pt_regs *fp)
94 printk("\n\n"); 96 printk("\n\n");
95} 97}
96 98
97void die_if_kernel (char *str, struct pt_regs *fp, int nr) 99void die(char *str, struct pt_regs *fp, unsigned long err)
98{ 100{
99 extern int console_loglevel; 101 static int diecount;
100 102
101 if (!(fp->ccr & PS_S)) 103 oops_enter();
102 return;
103 104
104 console_loglevel = 15; 105 console_verbose();
106 spin_lock_irq(&die_lock);
107 report_bug(fp->pc, fp);
108 printk(KERN_EMERG "%s: %04lx [#%d] ", str, err & 0xffff, ++diecount);
105 dump(fp); 109 dump(fp);
106 110
111 spin_unlock_irq(&die_lock);
107 do_exit(SIGSEGV); 112 do_exit(SIGSEGV);
108} 113}
109 114
diff --git a/arch/h8300/mm/fault.c b/arch/h8300/mm/fault.c
index 29e9af9f0e6a..1d092abebf03 100644
--- a/arch/h8300/mm/fault.c
+++ b/arch/h8300/mm/fault.c
@@ -20,8 +20,6 @@
20#include <asm/system.h> 20#include <asm/system.h>
21#include <asm/pgtable.h> 21#include <asm/pgtable.h>
22 22
23extern void die_if_kernel(char *, struct pt_regs *, long);
24
25/* 23/*
26 * This routine handles page faults. It determines the problem, and 24 * This routine handles page faults. It determines the problem, and
27 * then passes it off to one of the appropriate routines. 25 * then passes it off to one of the appropriate routines.
@@ -50,7 +48,8 @@ asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
50 } else 48 } else
51 printk(KERN_ALERT "Unable to handle kernel access"); 49 printk(KERN_ALERT "Unable to handle kernel access");
52 printk(" at virtual address %08lx\n",address); 50 printk(" at virtual address %08lx\n",address);
53 die_if_kernel("Oops", regs, error_code); 51 if (!user_mode(regs))
52 die("Oops", regs, error_code);
54 do_exit(SIGKILL); 53 do_exit(SIGKILL);
55 54
56 return 1; 55 return 1;
diff --git a/arch/h8300/platform/h8300h/aki3068net/Makefile b/arch/h8300/platform/h8300h/aki3068net/Makefile
index b03c328f8c70..b7ff78050b7f 100644
--- a/arch/h8300/platform/h8300h/aki3068net/Makefile
+++ b/arch/h8300/platform/h8300h/aki3068net/Makefile
@@ -3,4 +3,3 @@
3# 3#
4 4
5extra-y := crt0_ram.o 5extra-y := crt0_ram.o
6obj-y := timer.o
diff --git a/arch/h8300/platform/h8300h/aki3068net/timer.c b/arch/h8300/platform/h8300h/aki3068net/timer.c
deleted file mode 100644
index 27cd85d56128..000000000000
--- a/arch/h8300/platform/h8300h/aki3068net/timer.c
+++ /dev/null
@@ -1,51 +0,0 @@
1/*
2 * linux/arch/h8300/platform/h8300h/aki3068net/timer.c
3 *
4 * Yoshinori Sato <ysato@users.sourcefoge.jp>
5 *
6 * Platform depend Timer Handler
7 *
8 */
9
10#include <linux/errno.h>
11#include <linux/sched.h>
12#include <linux/kernel.h>
13#include <linux/param.h>
14#include <linux/string.h>
15#include <linux/mm.h>
16#include <linux/interrupt.h>
17#include <linux/init.h>
18#include <linux/timex.h>
19
20#include <asm/segment.h>
21#include <asm/io.h>
22#include <asm/irq.h>
23#include <asm/regs306x.h>
24
25#define CMFA 6
26
27#define CMIEA 0x40
28#define CCLR_CMA 0x08
29#define CLK_DIV8192 0x03
30
31#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8192 /* Timer input freq. */
32
33void __init platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *))
34{
35 /* setup 8bit timer ch2 */
36 ctrl_outb(H8300_TIMER_FREQ / HZ, TCORA2); /* set interval */
37 ctrl_outb(0x00, _8TCSR2); /* no output */
38 request_irq(40, timer_int, 0, "timer", 0);
39 ctrl_outb(CMIEA|CCLR_CMA|CLK_DIV8192, _8TCR2); /* start count */
40}
41
42void platform_timer_eoi(void)
43{
44 *(volatile unsigned char *)_8TCSR2 &= ~(1 << CMFA);
45}
46
47void platform_gettod(int *year, int *mon, int *day, int *hour,
48 int *min, int *sec)
49{
50 *year = *mon = *day = *hour = *min = *sec = 0;
51}
diff --git a/arch/h8300/platform/h8300h/generic/Makefile b/arch/h8300/platform/h8300h/generic/Makefile
index 32b964a9010e..2b12a170209e 100644
--- a/arch/h8300/platform/h8300h/generic/Makefile
+++ b/arch/h8300/platform/h8300h/generic/Makefile
@@ -3,4 +3,3 @@
3# 3#
4 4
5extra-y := crt0_$(MODEL).o 5extra-y := crt0_$(MODEL).o
6obj-y := timer.o
diff --git a/arch/h8300/platform/h8300h/generic/timer.c b/arch/h8300/platform/h8300h/generic/timer.c
deleted file mode 100644
index 6f5cefe0cceb..000000000000
--- a/arch/h8300/platform/h8300h/generic/timer.c
+++ /dev/null
@@ -1,95 +0,0 @@
1/*
2 * linux/arch/h8300/platform/h8300h/generic/timer.c
3 *
4 * Yoshinori Sato <ysato@users.sourceforge.jp>
5 *
6 * Platform depend Timer Handler
7 *
8 */
9
10#include <linux/errno.h>
11#include <linux/sched.h>
12#include <linux/kernel.h>
13#include <linux/param.h>
14#include <linux/string.h>
15#include <linux/mm.h>
16#include <linux/interrupt.h>
17
18#include <asm/segment.h>
19#include <asm/io.h>
20#include <asm/irq.h>
21
22#include <linux/timex.h>
23
24#if defined(CONFIG_H83007) || defined(CONFIG_H83068)
25#include <asm/regs306x.h>
26#define CMFA 6
27
28#define CMIEA 0x40
29#define CCLR_CMA 0x08
30#define CLK_DIV8192 0x03
31
32#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8192 /* Timer input freq. */
33
34void __init platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *))
35{
36 /* setup 8bit timer ch2 */
37 ctrl_outb(H8300_TIMER_FREQ / HZ, TCORA2); /* set interval */
38 ctrl_outb(0x00, _8TCSR2); /* no output */
39 request_irq(40, timer_int, 0, "timer", 0);
40 ctrl_outb(CMIEA|CCLR_CMA|CLK_DIV8192, _8TCR2); /* start count */
41}
42
43void platform_timer_eoi(void)
44{
45 *(volatile unsigned char *)_8TCSR2 &= ~(1 << CMFA);
46}
47#endif
48
49#if defined(CONFIG_H83002) || defined(CONFIG_H83048)
50/* FIXME! */
51#define TSTR 0x00ffff60
52#define TSNC 0x00ffff61
53#define TMDR 0x00ffff62
54#define TFCR 0x00ffff63
55#define TOER 0x00ffff90
56#define TOCR 0x00ffff91
57/* ITU0 */
58#define TCR 0x00ffff64
59#define TIOR 0x00ffff65
60#define TIER 0x00ffff66
61#define TSR 0x00ffff67
62#define TCNT 0x00ffff68
63#define GRA 0x00ffff6a
64#define GRB 0x00ffff6c
65
66#define CCLR_CMGRA 0x20
67#define CLK_DIV8 0x03
68
69#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8 /* Timer input freq. */
70
71void __init platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *))
72{
73 *(unsigned short *)GRA= H8300_TIMER_FREQ / HZ; /* set interval */
74 *(unsigned short *)TCNT=0; /* clear counter */
75 ctrl_outb(0x80|CCLR_CMGRA|CLK_DIV8, TCR); /* set ITU0 clock */
76 ctrl_outb(0x88, TIOR); /* no output */
77 request_irq(26, timer_int, 0, "timer", 0);
78 ctrl_outb(0xf9, TIER); /* compare match GRA interrupt */
79 ctrl_outb(ctrl_inb(TSNC) & ~0x01, TSNC); /* ITU0 async */
80 ctrl_outb(ctrl_inb(TMDR) & ~0x01, TMDR); /* ITU0 normal mode */
81 ctrl_outb(ctrl_inb(TSTR) | 0x01, TSTR); /* ITU0 Start */
82 return 0;
83}
84
85void platform_timer_eoi(void)
86{
87 ctrl_outb(ctrl_inb(TSR) & ~0x01,TSR);
88}
89#endif
90
91void platform_gettod(int *year, int *mon, int *day, int *hour,
92 int *min, int *sec)
93{
94 *year = *mon = *day = *hour = *min = *sec = 0;
95}
diff --git a/arch/h8300/platform/h8300h/h8max/Makefile b/arch/h8300/platform/h8300h/h8max/Makefile
index b03c328f8c70..b7ff78050b7f 100644
--- a/arch/h8300/platform/h8300h/h8max/Makefile
+++ b/arch/h8300/platform/h8300h/h8max/Makefile
@@ -3,4 +3,3 @@
3# 3#
4 4
5extra-y := crt0_ram.o 5extra-y := crt0_ram.o
6obj-y := timer.o
diff --git a/arch/h8300/platform/h8300h/h8max/timer.c b/arch/h8300/platform/h8300h/h8max/timer.c
deleted file mode 100644
index 85a574afe9d0..000000000000
--- a/arch/h8300/platform/h8300h/h8max/timer.c
+++ /dev/null
@@ -1,52 +0,0 @@
1/*
2 * linux/arch/h8300/platform/h8300h/h8max/timer.c
3 *
4 * Yoshinori Sato <ysato@users.sourcefoge.jp>
5 *
6 * Platform depend Timer Handler
7 *
8 */
9
10#include <linux/errno.h>
11#include <linux/sched.h>
12#include <linux/kernel.h>
13#include <linux/param.h>
14#include <linux/string.h>
15#include <linux/mm.h>
16#include <linux/interrupt.h>
17#include <linux/init.h>
18#include <linux/timex.h>
19
20#include <asm/segment.h>
21#include <asm/io.h>
22#include <asm/irq.h>
23#include <asm/regs306x.h>
24
25#define CMFA 6
26
27#define CMIEA 0x40
28#define CCLR_CMA 0x08
29#define CLK_DIV8192 0x03
30
31#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8192 /* Timer input freq. */
32
33void __init platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *))
34{
35 /* setup 8bit timer ch2 */
36 ctrl_outb(H8300_TIMER_FREQ / HZ, TCORA2); /* set interval */
37 ctrl_outb(0x00, _8TCSR2); /* no output */
38 request_irq(40, timer_int, 0, "timer", 0);
39 ctrl_outb(CMIEA|CCLR_CMA|CLK_DIV8192, _8TCR2); /* start count */
40}
41
42void platform_timer_eoi(void)
43{
44 *(volatile unsigned char *)_8TCSR2 &= ~(1 << CMFA);
45}
46
47void platform_gettod(int *year, int *mon, int *day, int *hour,
48 int *min, int *sec)
49{
50 *year = *mon = *day = *hour = *min = *sec = 0;
51}
52
diff --git a/arch/h8300/platform/h8s/edosk2674/Makefile b/arch/h8300/platform/h8s/edosk2674/Makefile
index f763654ac6fe..8e349723bb4f 100644
--- a/arch/h8300/platform/h8s/edosk2674/Makefile
+++ b/arch/h8300/platform/h8s/edosk2674/Makefile
@@ -3,4 +3,3 @@
3# 3#
4 4
5extra-y := crt0_$(MODEL).o 5extra-y := crt0_$(MODEL).o
6obj-y := timer.o
diff --git a/arch/h8300/platform/h8s/edosk2674/timer.c b/arch/h8300/platform/h8s/edosk2674/timer.c
deleted file mode 100644
index bfb1424482f4..000000000000
--- a/arch/h8300/platform/h8s/edosk2674/timer.c
+++ /dev/null
@@ -1,54 +0,0 @@
1/*
2 * linux/arch/h8300/platform/h8s/edosk2674/timer.c
3 *
4 * Yoshinori Sato <ysato@users.sourceforge.jp>
5 *
6 * Platform depend Timer Handler
7 *
8 */
9
10#include <linux/errno.h>
11#include <linux/sched.h>
12#include <linux/kernel.h>
13#include <linux/param.h>
14#include <linux/string.h>
15#include <linux/mm.h>
16#include <linux/interrupt.h>
17#include <linux/init.h>
18#include <linux/timex.h>
19
20#include <asm/segment.h>
21#include <asm/io.h>
22#include <asm/irq.h>
23#include <asm/regs267x.h>
24
25#define CMFA 6
26
27#define CMIEA 0x40
28#define CCLR_CMA 0x08
29#define CLK_DIV8192 0x03
30
31#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8192 /* Timer input freq. */
32
33void __init platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *))
34{
35 /* 8bit timer module enabled */
36 ctrl_outb(ctrl_inb(MSTPCRL) & ~0x01, MSTPCRL);
37 /* setup 8bit timer ch1 */
38 ctrl_outb(H8300_TIMER_FREQ / HZ, _8TCORA1); /* set interval */
39 ctrl_outb(0x00, _8TCSR1); /* no output */
40 request_irq(76, timer_int, 0, "timer" ,0);
41 ctrl_outb(CMIEA|CCLR_CMA|CLK_DIV8192, _8TCR1); /* start count */
42}
43
44void platform_timer_eoi(void)
45{
46 *(volatile unsigned char *)_8TCSR1 &= ~(1 << CMFA);
47}
48
49void platform_gettod(int *year, int *mon, int *day, int *hour,
50 int *min, int *sec)
51{
52/* FIXME! not RTC support */
53 *year = *mon = *day = *hour = *min = *sec = 0;
54}
diff --git a/arch/h8300/platform/h8s/generic/Makefile b/arch/h8300/platform/h8s/generic/Makefile
index 055d53a9811b..44b4685c664c 100644
--- a/arch/h8300/platform/h8s/generic/Makefile
+++ b/arch/h8300/platform/h8s/generic/Makefile
@@ -3,4 +3,3 @@
3# 3#
4 4
5extra-y = crt0_$(MODEL).o 5extra-y = crt0_$(MODEL).o
6obj-y := timer.o
diff --git a/arch/h8300/platform/h8s/generic/timer.c b/arch/h8300/platform/h8s/generic/timer.c
deleted file mode 100644
index c2211c6e79da..000000000000
--- a/arch/h8300/platform/h8s/generic/timer.c
+++ /dev/null
@@ -1,53 +0,0 @@
1/*
2 * linux/arch/h8300/platform/h8s/generic/timer.c
3 *
4 * Yoshinori Sato <ysato@users.sourceforge.jp>
5 *
6 * Platform depend Timer Handler
7 *
8 */
9
10#include <linux/errno.h>
11#include <linux/sched.h>
12#include <linux/kernel.h>
13#include <linux/param.h>
14#include <linux/string.h>
15#include <linux/mm.h>
16#include <linux/interrupt.h>
17#include <linux/init.h>
18#include <linux/timex.h>
19
20#include <asm/segment.h>
21#include <asm/io.h>
22#include <asm/irq.h>
23#include <asm/regs267x.h>
24
25#define CMFA 6
26
27#define CMIEA 0x40
28#define CCLR_CMA 0x08
29#define CLK_DIV8192 0x03
30
31#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8192 /* Timer input freq. */
32
33void __init platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *))
34{
35 /* 8bit timer module enabled */
36 ctrl_outb(ctrl_inb(MSTPCRL) & ~0x01, MSTPCRL);
37 /* setup 8bit timer ch1 */
38 ctrl_outb(H8300_TIMER_FREQ / HZ, _8TCORA1); /* set interval */
39 ctrl_outb(0x00, _8TCSR1); /* no output */
40 request_irq(76, timer_int, 0, "timer" ,0);
41 ctrl_outb(CMIEA|CCLR_CMA|CLK_DIV8192, _8TCR1); /* start count */
42}
43
44void platform_timer_eoi(void)
45{
46 *(volatile unsigned char *)_8TCSR1 &= ~(1 << CMFA);
47}
48
49void platform_gettod(int *year, int *mon, int *day, int *hour,
50 int *min, int *sec)
51{
52 *year = *mon = *day = *hour = *min = *sec = 0;
53}
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index 48e496fe1e75..3b7aa38254a8 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -60,14 +60,6 @@ config RWSEM_XCHGADD_ALGORITHM
60 bool 60 bool
61 default y 61 default y
62 62
63config ARCH_HAS_ILOG2_U32
64 bool
65 default n
66
67config ARCH_HAS_ILOG2_U64
68 bool
69 default n
70
71config HUGETLB_PAGE_SIZE_VARIABLE 63config HUGETLB_PAGE_SIZE_VARIABLE
72 bool 64 bool
73 depends on HUGETLB_PAGE 65 depends on HUGETLB_PAGE
diff --git a/arch/ia64/ia32/binfmt_elf32.c b/arch/ia64/ia32/binfmt_elf32.c
index 4f0c30c38e99..f92bdaac8976 100644
--- a/arch/ia64/ia32/binfmt_elf32.c
+++ b/arch/ia64/ia32/binfmt_elf32.c
@@ -41,7 +41,7 @@ randomize_stack_top(unsigned long stack_top);
41#define elf_map elf32_map 41#define elf_map elf32_map
42 42
43#undef SET_PERSONALITY 43#undef SET_PERSONALITY
44#define SET_PERSONALITY(ex, ibcs2) elf32_set_personality() 44#define SET_PERSONALITY(ex) elf32_set_personality()
45 45
46#define elf_read_implies_exec(ex, have_pt_gnu_stack) (!(have_pt_gnu_stack)) 46#define elf_read_implies_exec(ex, have_pt_gnu_stack) (!(have_pt_gnu_stack))
47 47
diff --git a/arch/ia64/ia32/ia32_entry.S b/arch/ia64/ia32/ia32_entry.S
index ff88c48c5d19..53505bb04771 100644
--- a/arch/ia64/ia32/ia32_entry.S
+++ b/arch/ia64/ia32/ia32_entry.S
@@ -251,8 +251,8 @@ ia32_syscall_table:
251 data8 compat_sys_setrlimit /* 75 */ 251 data8 compat_sys_setrlimit /* 75 */
252 data8 compat_sys_old_getrlimit 252 data8 compat_sys_old_getrlimit
253 data8 compat_sys_getrusage 253 data8 compat_sys_getrusage
254 data8 sys32_gettimeofday 254 data8 compat_sys_gettimeofday
255 data8 sys32_settimeofday 255 data8 compat_sys_settimeofday
256 data8 sys32_getgroups16 /* 80 */ 256 data8 sys32_getgroups16 /* 80 */
257 data8 sys32_setgroups16 257 data8 sys32_setgroups16
258 data8 sys32_old_select 258 data8 sys32_old_select
diff --git a/arch/ia64/ia32/ia32priv.h b/arch/ia64/ia32/ia32priv.h
index dd0c53687a96..0f15349c3c6b 100644
--- a/arch/ia64/ia32/ia32priv.h
+++ b/arch/ia64/ia32/ia32priv.h
@@ -332,8 +332,8 @@ void ia64_elf32_init(struct pt_regs *regs);
332#define ELF_PLATFORM NULL 332#define ELF_PLATFORM NULL
333 333
334#ifdef __KERNEL__ 334#ifdef __KERNEL__
335# define SET_PERSONALITY(EX,IBCS2) \ 335# define SET_PERSONALITY(EX) \
336 (current->personality = (IBCS2) ? PER_SVR4 : PER_LINUX) 336 (current->personality = PER_LINUX)
337#endif 337#endif
338 338
339#define IA32_EFLAG 0x200 339#define IA32_EFLAG 0x200
diff --git a/arch/ia64/ia32/sys_ia32.c b/arch/ia64/ia32/sys_ia32.c
index bf196cbb3796..f4430bb4bbdc 100644
--- a/arch/ia64/ia32/sys_ia32.c
+++ b/arch/ia64/ia32/sys_ia32.c
@@ -118,41 +118,6 @@ sys32_execve (char __user *name, compat_uptr_t __user *argv, compat_uptr_t __use
118 return error; 118 return error;
119} 119}
120 120
121int cp_compat_stat(struct kstat *stat, struct compat_stat __user *ubuf)
122{
123 compat_ino_t ino;
124 int err;
125
126 if ((u64) stat->size > MAX_NON_LFS ||
127 !old_valid_dev(stat->dev) ||
128 !old_valid_dev(stat->rdev))
129 return -EOVERFLOW;
130
131 ino = stat->ino;
132 if (sizeof(ino) < sizeof(stat->ino) && ino != stat->ino)
133 return -EOVERFLOW;
134
135 if (clear_user(ubuf, sizeof(*ubuf)))
136 return -EFAULT;
137
138 err = __put_user(old_encode_dev(stat->dev), &ubuf->st_dev);
139 err |= __put_user(ino, &ubuf->st_ino);
140 err |= __put_user(stat->mode, &ubuf->st_mode);
141 err |= __put_user(stat->nlink, &ubuf->st_nlink);
142 err |= __put_user(high2lowuid(stat->uid), &ubuf->st_uid);
143 err |= __put_user(high2lowgid(stat->gid), &ubuf->st_gid);
144 err |= __put_user(old_encode_dev(stat->rdev), &ubuf->st_rdev);
145 err |= __put_user(stat->size, &ubuf->st_size);
146 err |= __put_user(stat->atime.tv_sec, &ubuf->st_atime);
147 err |= __put_user(stat->atime.tv_nsec, &ubuf->st_atime_nsec);
148 err |= __put_user(stat->mtime.tv_sec, &ubuf->st_mtime);
149 err |= __put_user(stat->mtime.tv_nsec, &ubuf->st_mtime_nsec);
150 err |= __put_user(stat->ctime.tv_sec, &ubuf->st_ctime);
151 err |= __put_user(stat->ctime.tv_nsec, &ubuf->st_ctime_nsec);
152 err |= __put_user(stat->blksize, &ubuf->st_blksize);
153 err |= __put_user(stat->blocks, &ubuf->st_blocks);
154 return err;
155}
156 121
157#if PAGE_SHIFT > IA32_PAGE_SHIFT 122#if PAGE_SHIFT > IA32_PAGE_SHIFT
158 123
@@ -1148,68 +1113,12 @@ sys32_pipe (int __user *fd)
1148 return retval; 1113 return retval;
1149} 1114}
1150 1115
1151static inline long
1152get_tv32 (struct timeval *o, struct compat_timeval __user *i)
1153{
1154 return (!access_ok(VERIFY_READ, i, sizeof(*i)) ||
1155 (__get_user(o->tv_sec, &i->tv_sec) | __get_user(o->tv_usec, &i->tv_usec)));
1156}
1157
1158static inline long
1159put_tv32 (struct compat_timeval __user *o, struct timeval *i)
1160{
1161 return (!access_ok(VERIFY_WRITE, o, sizeof(*o)) ||
1162 (__put_user(i->tv_sec, &o->tv_sec) | __put_user(i->tv_usec, &o->tv_usec)));
1163}
1164
1165asmlinkage unsigned long 1116asmlinkage unsigned long
1166sys32_alarm (unsigned int seconds) 1117sys32_alarm (unsigned int seconds)
1167{ 1118{
1168 return alarm_setitimer(seconds); 1119 return alarm_setitimer(seconds);
1169} 1120}
1170 1121
1171/* Translations due to time_t size differences. Which affects all
1172 sorts of things, like timeval and itimerval. */
1173
1174extern struct timezone sys_tz;
1175
1176asmlinkage long
1177sys32_gettimeofday (struct compat_timeval __user *tv, struct timezone __user *tz)
1178{
1179 if (tv) {
1180 struct timeval ktv;
1181 do_gettimeofday(&ktv);
1182 if (put_tv32(tv, &ktv))
1183 return -EFAULT;
1184 }
1185 if (tz) {
1186 if (copy_to_user(tz, &sys_tz, sizeof(sys_tz)))
1187 return -EFAULT;
1188 }
1189 return 0;
1190}
1191
1192asmlinkage long
1193sys32_settimeofday (struct compat_timeval __user *tv, struct timezone __user *tz)
1194{
1195 struct timeval ktv;
1196 struct timespec kts;
1197 struct timezone ktz;
1198
1199 if (tv) {
1200 if (get_tv32(&ktv, tv))
1201 return -EFAULT;
1202 kts.tv_sec = ktv.tv_sec;
1203 kts.tv_nsec = ktv.tv_usec * 1000;
1204 }
1205 if (tz) {
1206 if (copy_from_user(&ktz, tz, sizeof(ktz)))
1207 return -EFAULT;
1208 }
1209
1210 return do_sys_settimeofday(tv ? &kts : NULL, tz ? &ktz : NULL);
1211}
1212
1213struct sel_arg_struct { 1122struct sel_arg_struct {
1214 unsigned int n; 1123 unsigned int n;
1215 unsigned int inp; 1124 unsigned int inp;
diff --git a/arch/ia64/include/asm/a.out.h b/arch/ia64/include/asm/a.out.h
deleted file mode 100644
index 193dcfb67596..000000000000
--- a/arch/ia64/include/asm/a.out.h
+++ /dev/null
@@ -1,32 +0,0 @@
1#ifndef _ASM_IA64_A_OUT_H
2#define _ASM_IA64_A_OUT_H
3
4/*
5 * No a.out format has been (or should be) defined so this file is
6 * just a dummy that allows us to get binfmt_elf compiled. It
7 * probably would be better to clean up binfmt_elf.c so it does not
8 * necessarily depend on there being a.out support.
9 *
10 * Modified 1998-2002
11 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co.
12 */
13
14#include <linux/types.h>
15
16struct exec {
17 unsigned long a_info;
18 unsigned long a_text;
19 unsigned long a_data;
20 unsigned long a_bss;
21 unsigned long a_entry;
22};
23
24#define N_TXTADDR(x) 0
25#define N_DATADDR(x) 0
26#define N_BSSADDR(x) 0
27#define N_DRSIZE(x) 0
28#define N_TRSIZE(x) 0
29#define N_SYMSIZE(x) 0
30#define N_TXTOFF(x) 0
31
32#endif /* _ASM_IA64_A_OUT_H */
diff --git a/arch/ia64/include/asm/elf.h b/arch/ia64/include/asm/elf.h
index 2acb6b6543c9..86eddee029cb 100644
--- a/arch/ia64/include/asm/elf.h
+++ b/arch/ia64/include/asm/elf.h
@@ -202,7 +202,7 @@ extern void ia64_elf_core_copy_regs (struct pt_regs *src, elf_gregset_t dst);
202 relevant until we have real hardware to play with... */ 202 relevant until we have real hardware to play with... */
203#define ELF_PLATFORM NULL 203#define ELF_PLATFORM NULL
204 204
205#define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX) 205#define SET_PERSONALITY(ex) set_personality(PER_LINUX)
206#define elf_read_implies_exec(ex, executable_stack) \ 206#define elf_read_implies_exec(ex, executable_stack) \
207 ((executable_stack!=EXSTACK_DISABLE_X) && ((ex).e_flags & EF_IA_64_LINUX_EXECUTABLE_STACK) != 0) 207 ((executable_stack!=EXSTACK_DISABLE_X) && ((ex).e_flags & EF_IA_64_LINUX_EXECUTABLE_STACK) != 0)
208 208
diff --git a/arch/ia64/include/asm/kvm_host.h b/arch/ia64/include/asm/kvm_host.h
index 1efe513a9941..85db124d37f6 100644
--- a/arch/ia64/include/asm/kvm_host.h
+++ b/arch/ia64/include/asm/kvm_host.h
@@ -132,7 +132,7 @@
132#define GPFN_IOSAPIC (4UL << 60) /* IOSAPIC base */ 132#define GPFN_IOSAPIC (4UL << 60) /* IOSAPIC base */
133#define GPFN_LEGACY_IO (5UL << 60) /* Legacy I/O base */ 133#define GPFN_LEGACY_IO (5UL << 60) /* Legacy I/O base */
134#define GPFN_GFW (6UL << 60) /* Guest Firmware */ 134#define GPFN_GFW (6UL << 60) /* Guest Firmware */
135#define GPFN_HIGH_MMIO (7UL << 60) /* High MMIO range */ 135#define GPFN_PHYS_MMIO (7UL << 60) /* Directed MMIO Range */
136 136
137#define GPFN_IO_MASK (7UL << 60) /* Guest pfn is I/O type */ 137#define GPFN_IO_MASK (7UL << 60) /* Guest pfn is I/O type */
138#define GPFN_INV_MASK (1UL << 63) /* Guest pfn is invalid */ 138#define GPFN_INV_MASK (1UL << 63) /* Guest pfn is invalid */
@@ -413,6 +413,10 @@ struct kvm_arch {
413 struct kvm_ioapic *vioapic; 413 struct kvm_ioapic *vioapic;
414 struct kvm_vm_stat stat; 414 struct kvm_vm_stat stat;
415 struct kvm_sal_data rdv_sal_data; 415 struct kvm_sal_data rdv_sal_data;
416
417 struct list_head assigned_dev_head;
418 struct dmar_domain *intel_iommu_domain;
419 struct hlist_head irq_ack_notifier_list;
416}; 420};
417 421
418union cpuid3_t { 422union cpuid3_t {
diff --git a/arch/ia64/include/asm/statfs.h b/arch/ia64/include/asm/statfs.h
index 811097974f31..1e589669de56 100644
--- a/arch/ia64/include/asm/statfs.h
+++ b/arch/ia64/include/asm/statfs.h
@@ -8,55 +8,13 @@
8 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co 8 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
9 */ 9 */
10 10
11#ifndef __KERNEL_STRICT_NAMES
12# include <linux/types.h>
13typedef __kernel_fsid_t fsid_t;
14#endif
15
16/* 11/*
17 * This is ugly --- we're already 64-bit, so just duplicate the definitions 12 * We need compat_statfs64 to be packed, because the i386 ABI won't
13 * add padding at the end to bring it to a multiple of 8 bytes, but
14 * the IA64 ABI will.
18 */ 15 */
19struct statfs { 16#define ARCH_PACK_COMPAT_STATFS64 __attribute__((packed,aligned(4)))
20 long f_type;
21 long f_bsize;
22 long f_blocks;
23 long f_bfree;
24 long f_bavail;
25 long f_files;
26 long f_ffree;
27 __kernel_fsid_t f_fsid;
28 long f_namelen;
29 long f_frsize;
30 long f_spare[5];
31};
32
33
34struct statfs64 {
35 long f_type;
36 long f_bsize;
37 long f_blocks;
38 long f_bfree;
39 long f_bavail;
40 long f_files;
41 long f_ffree;
42 __kernel_fsid_t f_fsid;
43 long f_namelen;
44 long f_frsize;
45 long f_spare[5];
46};
47 17
48struct compat_statfs64 { 18#include <asm-generic/statfs.h>
49 __u32 f_type;
50 __u32 f_bsize;
51 __u64 f_blocks;
52 __u64 f_bfree;
53 __u64 f_bavail;
54 __u64 f_files;
55 __u64 f_ffree;
56 __kernel_fsid_t f_fsid;
57 __u32 f_namelen;
58 __u32 f_frsize;
59 __u32 f_spare[5];
60} __attribute__((packed));
61 19
62#endif /* _ASM_IA64_STATFS_H */ 20#endif /* _ASM_IA64_STATFS_H */
diff --git a/arch/ia64/kvm/Kconfig b/arch/ia64/kvm/Kconfig
index 7914e4828504..8e99fed6b3fd 100644
--- a/arch/ia64/kvm/Kconfig
+++ b/arch/ia64/kvm/Kconfig
@@ -46,4 +46,6 @@ config KVM_INTEL
46config KVM_TRACE 46config KVM_TRACE
47 bool 47 bool
48 48
49source drivers/virtio/Kconfig
50
49endif # VIRTUALIZATION 51endif # VIRTUALIZATION
diff --git a/arch/ia64/kvm/Makefile b/arch/ia64/kvm/Makefile
index bf22fb9e6dcf..cf37f8f490c0 100644
--- a/arch/ia64/kvm/Makefile
+++ b/arch/ia64/kvm/Makefile
@@ -44,7 +44,11 @@ EXTRA_CFLAGS += -Ivirt/kvm -Iarch/ia64/kvm/
44EXTRA_AFLAGS += -Ivirt/kvm -Iarch/ia64/kvm/ 44EXTRA_AFLAGS += -Ivirt/kvm -Iarch/ia64/kvm/
45 45
46common-objs = $(addprefix ../../../virt/kvm/, kvm_main.o ioapic.o \ 46common-objs = $(addprefix ../../../virt/kvm/, kvm_main.o ioapic.o \
47 coalesced_mmio.o) 47 coalesced_mmio.o irq_comm.o)
48
49ifeq ($(CONFIG_DMAR),y)
50common-objs += $(addprefix ../../../virt/kvm/, vtd.o)
51endif
48 52
49kvm-objs := $(common-objs) kvm-ia64.o kvm_fw.o 53kvm-objs := $(common-objs) kvm-ia64.o kvm_fw.o
50obj-$(CONFIG_KVM) += kvm.o 54obj-$(CONFIG_KVM) += kvm.o
diff --git a/arch/ia64/kvm/irq.h b/arch/ia64/kvm/irq.h
new file mode 100644
index 000000000000..c6786e8b1bf4
--- /dev/null
+++ b/arch/ia64/kvm/irq.h
@@ -0,0 +1,31 @@
1/*
2 * irq.h: In-kernel interrupt controller related definitions
3 * Copyright (c) 2008, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
16 * Place - Suite 330, Boston, MA 02111-1307 USA.
17 *
18 * Authors:
19 * Xiantao Zhang <xiantao.zhang@intel.com>
20 *
21 */
22
23#ifndef __IRQ_H
24#define __IRQ_H
25
26static inline int irqchip_in_kernel(struct kvm *kvm)
27{
28 return 1;
29}
30
31#endif
diff --git a/arch/ia64/kvm/kvm-ia64.c b/arch/ia64/kvm/kvm-ia64.c
index cd0d1a7284b7..c0699f0e35a9 100644
--- a/arch/ia64/kvm/kvm-ia64.c
+++ b/arch/ia64/kvm/kvm-ia64.c
@@ -31,6 +31,7 @@
31#include <linux/bitops.h> 31#include <linux/bitops.h>
32#include <linux/hrtimer.h> 32#include <linux/hrtimer.h>
33#include <linux/uaccess.h> 33#include <linux/uaccess.h>
34#include <linux/intel-iommu.h>
34 35
35#include <asm/pgtable.h> 36#include <asm/pgtable.h>
36#include <asm/gcc_intrin.h> 37#include <asm/gcc_intrin.h>
@@ -45,6 +46,7 @@
45#include "iodev.h" 46#include "iodev.h"
46#include "ioapic.h" 47#include "ioapic.h"
47#include "lapic.h" 48#include "lapic.h"
49#include "irq.h"
48 50
49static unsigned long kvm_vmm_base; 51static unsigned long kvm_vmm_base;
50static unsigned long kvm_vsa_base; 52static unsigned long kvm_vsa_base;
@@ -179,12 +181,16 @@ int kvm_dev_ioctl_check_extension(long ext)
179 switch (ext) { 181 switch (ext) {
180 case KVM_CAP_IRQCHIP: 182 case KVM_CAP_IRQCHIP:
181 case KVM_CAP_USER_MEMORY: 183 case KVM_CAP_USER_MEMORY:
184 case KVM_CAP_MP_STATE:
182 185
183 r = 1; 186 r = 1;
184 break; 187 break;
185 case KVM_CAP_COALESCED_MMIO: 188 case KVM_CAP_COALESCED_MMIO:
186 r = KVM_COALESCED_MMIO_PAGE_OFFSET; 189 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
187 break; 190 break;
191 case KVM_CAP_IOMMU:
192 r = intel_iommu_found();
193 break;
188 default: 194 default:
189 r = 0; 195 r = 0;
190 } 196 }
@@ -771,6 +777,7 @@ static void kvm_init_vm(struct kvm *kvm)
771 */ 777 */
772 kvm_build_io_pmt(kvm); 778 kvm_build_io_pmt(kvm);
773 779
780 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
774} 781}
775 782
776struct kvm *kvm_arch_create_vm(void) 783struct kvm *kvm_arch_create_vm(void)
@@ -1334,6 +1341,10 @@ static void kvm_release_vm_pages(struct kvm *kvm)
1334 1341
1335void kvm_arch_destroy_vm(struct kvm *kvm) 1342void kvm_arch_destroy_vm(struct kvm *kvm)
1336{ 1343{
1344 kvm_iommu_unmap_guest(kvm);
1345#ifdef KVM_CAP_DEVICE_ASSIGNMENT
1346 kvm_free_all_assigned_devices(kvm);
1347#endif
1337 kfree(kvm->arch.vioapic); 1348 kfree(kvm->arch.vioapic);
1338 kvm_release_vm_pages(kvm); 1349 kvm_release_vm_pages(kvm);
1339 kvm_free_physmem(kvm); 1350 kvm_free_physmem(kvm);
@@ -1435,17 +1446,24 @@ int kvm_arch_set_memory_region(struct kvm *kvm,
1435 int user_alloc) 1446 int user_alloc)
1436{ 1447{
1437 unsigned long i; 1448 unsigned long i;
1438 struct page *page; 1449 unsigned long pfn;
1439 int npages = mem->memory_size >> PAGE_SHIFT; 1450 int npages = mem->memory_size >> PAGE_SHIFT;
1440 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot]; 1451 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
1441 unsigned long base_gfn = memslot->base_gfn; 1452 unsigned long base_gfn = memslot->base_gfn;
1442 1453
1443 for (i = 0; i < npages; i++) { 1454 for (i = 0; i < npages; i++) {
1444 page = gfn_to_page(kvm, base_gfn + i); 1455 pfn = gfn_to_pfn(kvm, base_gfn + i);
1445 kvm_set_pmt_entry(kvm, base_gfn + i, 1456 if (!kvm_is_mmio_pfn(pfn)) {
1446 page_to_pfn(page) << PAGE_SHIFT, 1457 kvm_set_pmt_entry(kvm, base_gfn + i,
1447 _PAGE_AR_RWX|_PAGE_MA_WB); 1458 pfn << PAGE_SHIFT,
1448 memslot->rmap[i] = (unsigned long)page; 1459 _PAGE_AR_RWX | _PAGE_MA_WB);
1460 memslot->rmap[i] = (unsigned long)pfn_to_page(pfn);
1461 } else {
1462 kvm_set_pmt_entry(kvm, base_gfn + i,
1463 GPFN_PHYS_MMIO | (pfn << PAGE_SHIFT),
1464 _PAGE_MA_UC);
1465 memslot->rmap[i] = 0;
1466 }
1449 } 1467 }
1450 1468
1451 return 0; 1469 return 0;
@@ -1789,11 +1807,43 @@ int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
1789int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu, 1807int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
1790 struct kvm_mp_state *mp_state) 1808 struct kvm_mp_state *mp_state)
1791{ 1809{
1792 return -EINVAL; 1810 vcpu_load(vcpu);
1811 mp_state->mp_state = vcpu->arch.mp_state;
1812 vcpu_put(vcpu);
1813 return 0;
1814}
1815
1816static int vcpu_reset(struct kvm_vcpu *vcpu)
1817{
1818 int r;
1819 long psr;
1820 local_irq_save(psr);
1821 r = kvm_insert_vmm_mapping(vcpu);
1822 if (r)
1823 goto fail;
1824
1825 vcpu->arch.launched = 0;
1826 kvm_arch_vcpu_uninit(vcpu);
1827 r = kvm_arch_vcpu_init(vcpu);
1828 if (r)
1829 goto fail;
1830
1831 kvm_purge_vmm_mapping(vcpu);
1832 r = 0;
1833fail:
1834 local_irq_restore(psr);
1835 return r;
1793} 1836}
1794 1837
1795int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu, 1838int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
1796 struct kvm_mp_state *mp_state) 1839 struct kvm_mp_state *mp_state)
1797{ 1840{
1798 return -EINVAL; 1841 int r = 0;
1842
1843 vcpu_load(vcpu);
1844 vcpu->arch.mp_state = mp_state->mp_state;
1845 if (vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)
1846 r = vcpu_reset(vcpu);
1847 vcpu_put(vcpu);
1848 return r;
1799} 1849}
diff --git a/arch/ia64/kvm/kvm_minstate.h b/arch/ia64/kvm/kvm_minstate.h
index 13980d9b8bcf..2cc41d17cf99 100644
--- a/arch/ia64/kvm/kvm_minstate.h
+++ b/arch/ia64/kvm/kvm_minstate.h
@@ -50,27 +50,18 @@
50 50
51#define PAL_VSA_SYNC_READ \ 51#define PAL_VSA_SYNC_READ \
52 /* begin to call pal vps sync_read */ \ 52 /* begin to call pal vps sync_read */ \
53{.mii; \
53 add r25 = VMM_VPD_BASE_OFFSET, r21; \ 54 add r25 = VMM_VPD_BASE_OFFSET, r21; \
54 adds r20 = VMM_VCPU_VSA_BASE_OFFSET, r21; /* entry point */ \ 55 nop 0x0; \
56 mov r24=ip; \
55 ;; \ 57 ;; \
58} \
59{.mmb \
60 add r24=0x20, r24; \
56 ld8 r25 = [r25]; /* read vpd base */ \ 61 ld8 r25 = [r25]; /* read vpd base */ \
57 ld8 r20 = [r20]; \ 62 br.cond.sptk kvm_vps_sync_read; /*call the service*/ \
58 ;; \
59 add r20 = PAL_VPS_SYNC_READ,r20; \
60 ;; \
61{ .mii; \
62 nop 0x0; \
63 mov r24 = ip; \
64 mov b0 = r20; \
65 ;; \ 63 ;; \
66}; \ 64}; \
67{ .mmb; \
68 add r24 = 0x20, r24; \
69 nop 0x0; \
70 br.cond.sptk b0; /* call the service */ \
71 ;; \
72};
73
74 65
75 66
76#define KVM_MINSTATE_GET_CURRENT(reg) mov reg=r21 67#define KVM_MINSTATE_GET_CURRENT(reg) mov reg=r21
diff --git a/arch/ia64/kvm/optvfault.S b/arch/ia64/kvm/optvfault.S
index e4f15d641b22..634abad979b5 100644
--- a/arch/ia64/kvm/optvfault.S
+++ b/arch/ia64/kvm/optvfault.S
@@ -1,9 +1,12 @@
1/* 1/*
2 * arch/ia64/vmx/optvfault.S 2 * arch/ia64/kvm/optvfault.S
3 * optimize virtualization fault handler 3 * optimize virtualization fault handler
4 * 4 *
5 * Copyright (C) 2006 Intel Co 5 * Copyright (C) 2006 Intel Co
6 * Xuefei Xu (Anthony Xu) <anthony.xu@intel.com> 6 * Xuefei Xu (Anthony Xu) <anthony.xu@intel.com>
7 * Copyright (C) 2008 Intel Co
8 * Add the support for Tukwila processors.
9 * Xiantao Zhang <xiantao.zhang@intel.com>
7 */ 10 */
8 11
9#include <asm/asmmacro.h> 12#include <asm/asmmacro.h>
@@ -20,6 +23,98 @@
20#define ACCE_MOV_TO_PSR 23#define ACCE_MOV_TO_PSR
21#define ACCE_THASH 24#define ACCE_THASH
22 25
26#define VMX_VPS_SYNC_READ \
27 add r16=VMM_VPD_BASE_OFFSET,r21; \
28 mov r17 = b0; \
29 mov r18 = r24; \
30 mov r19 = r25; \
31 mov r20 = r31; \
32 ;; \
33{.mii; \
34 ld8 r16 = [r16]; \
35 nop 0x0; \
36 mov r24 = ip; \
37 ;; \
38}; \
39{.mmb; \
40 add r24=0x20, r24; \
41 mov r25 =r16; \
42 br.sptk.many kvm_vps_sync_read; \
43}; \
44 mov b0 = r17; \
45 mov r24 = r18; \
46 mov r25 = r19; \
47 mov r31 = r20
48
49ENTRY(kvm_vps_entry)
50 adds r29 = VMM_VCPU_VSA_BASE_OFFSET,r21
51 ;;
52 ld8 r29 = [r29]
53 ;;
54 add r29 = r29, r30
55 ;;
56 mov b0 = r29
57 br.sptk.many b0
58END(kvm_vps_entry)
59
60/*
61 * Inputs:
62 * r24 : return address
63 * r25 : vpd
64 * r29 : scratch
65 *
66 */
67GLOBAL_ENTRY(kvm_vps_sync_read)
68 movl r30 = PAL_VPS_SYNC_READ
69 ;;
70 br.sptk.many kvm_vps_entry
71END(kvm_vps_sync_read)
72
73/*
74 * Inputs:
75 * r24 : return address
76 * r25 : vpd
77 * r29 : scratch
78 *
79 */
80GLOBAL_ENTRY(kvm_vps_sync_write)
81 movl r30 = PAL_VPS_SYNC_WRITE
82 ;;
83 br.sptk.many kvm_vps_entry
84END(kvm_vps_sync_write)
85
86/*
87 * Inputs:
88 * r23 : pr
89 * r24 : guest b0
90 * r25 : vpd
91 *
92 */
93GLOBAL_ENTRY(kvm_vps_resume_normal)
94 movl r30 = PAL_VPS_RESUME_NORMAL
95 ;;
96 mov pr=r23,-2
97 br.sptk.many kvm_vps_entry
98END(kvm_vps_resume_normal)
99
100/*
101 * Inputs:
102 * r23 : pr
103 * r24 : guest b0
104 * r25 : vpd
105 * r17 : isr
106 */
107GLOBAL_ENTRY(kvm_vps_resume_handler)
108 movl r30 = PAL_VPS_RESUME_HANDLER
109 ;;
110 ld8 r27=[r25]
111 shr r17=r17,IA64_ISR_IR_BIT
112 ;;
113 dep r27=r17,r27,63,1 // bit 63 of r27 indicate whether enable CFLE
114 mov pr=r23,-2
115 br.sptk.many kvm_vps_entry
116END(kvm_vps_resume_handler)
117
23//mov r1=ar3 118//mov r1=ar3
24GLOBAL_ENTRY(kvm_asm_mov_from_ar) 119GLOBAL_ENTRY(kvm_asm_mov_from_ar)
25#ifndef ACCE_MOV_FROM_AR 120#ifndef ACCE_MOV_FROM_AR
@@ -157,11 +252,11 @@ GLOBAL_ENTRY(kvm_asm_rsm)
157#ifndef ACCE_RSM 252#ifndef ACCE_RSM
158 br.many kvm_virtualization_fault_back 253 br.many kvm_virtualization_fault_back
159#endif 254#endif
160 add r16=VMM_VPD_BASE_OFFSET,r21 255 VMX_VPS_SYNC_READ
256 ;;
161 extr.u r26=r25,6,21 257 extr.u r26=r25,6,21
162 extr.u r27=r25,31,2 258 extr.u r27=r25,31,2
163 ;; 259 ;;
164 ld8 r16=[r16]
165 extr.u r28=r25,36,1 260 extr.u r28=r25,36,1
166 dep r26=r27,r26,21,2 261 dep r26=r27,r26,21,2
167 ;; 262 ;;
@@ -196,7 +291,7 @@ GLOBAL_ENTRY(kvm_asm_rsm)
196 tbit.nz p6,p0=r23,0 291 tbit.nz p6,p0=r23,0
197 ;; 292 ;;
198 tbit.z.or p6,p0=r26,IA64_PSR_DT_BIT 293 tbit.z.or p6,p0=r26,IA64_PSR_DT_BIT
199 (p6) br.dptk kvm_resume_to_guest 294 (p6) br.dptk kvm_resume_to_guest_with_sync
200 ;; 295 ;;
201 add r26=VMM_VCPU_META_RR0_OFFSET,r21 296 add r26=VMM_VCPU_META_RR0_OFFSET,r21
202 add r27=VMM_VCPU_META_RR0_OFFSET+8,r21 297 add r27=VMM_VCPU_META_RR0_OFFSET+8,r21
@@ -212,7 +307,7 @@ GLOBAL_ENTRY(kvm_asm_rsm)
212 mov rr[r28]=r27 307 mov rr[r28]=r27
213 ;; 308 ;;
214 srlz.d 309 srlz.d
215 br.many kvm_resume_to_guest 310 br.many kvm_resume_to_guest_with_sync
216END(kvm_asm_rsm) 311END(kvm_asm_rsm)
217 312
218 313
@@ -221,11 +316,11 @@ GLOBAL_ENTRY(kvm_asm_ssm)
221#ifndef ACCE_SSM 316#ifndef ACCE_SSM
222 br.many kvm_virtualization_fault_back 317 br.many kvm_virtualization_fault_back
223#endif 318#endif
224 add r16=VMM_VPD_BASE_OFFSET,r21 319 VMX_VPS_SYNC_READ
320 ;;
225 extr.u r26=r25,6,21 321 extr.u r26=r25,6,21
226 extr.u r27=r25,31,2 322 extr.u r27=r25,31,2
227 ;; 323 ;;
228 ld8 r16=[r16]
229 extr.u r28=r25,36,1 324 extr.u r28=r25,36,1
230 dep r26=r27,r26,21,2 325 dep r26=r27,r26,21,2
231 ;; //r26 is imm24 326 ;; //r26 is imm24
@@ -271,7 +366,7 @@ kvm_asm_ssm_1:
271 tbit.nz p6,p0=r29,IA64_PSR_I_BIT 366 tbit.nz p6,p0=r29,IA64_PSR_I_BIT
272 ;; 367 ;;
273 tbit.z.or p6,p0=r19,IA64_PSR_I_BIT 368 tbit.z.or p6,p0=r19,IA64_PSR_I_BIT
274 (p6) br.dptk kvm_resume_to_guest 369 (p6) br.dptk kvm_resume_to_guest_with_sync
275 ;; 370 ;;
276 add r29=VPD_VTPR_START_OFFSET,r16 371 add r29=VPD_VTPR_START_OFFSET,r16
277 add r30=VPD_VHPI_START_OFFSET,r16 372 add r30=VPD_VHPI_START_OFFSET,r16
@@ -286,7 +381,7 @@ kvm_asm_ssm_1:
286 ;; 381 ;;
287 cmp.gt p6,p0=r30,r17 382 cmp.gt p6,p0=r30,r17
288 (p6) br.dpnt.few kvm_asm_dispatch_vexirq 383 (p6) br.dpnt.few kvm_asm_dispatch_vexirq
289 br.many kvm_resume_to_guest 384 br.many kvm_resume_to_guest_with_sync
290END(kvm_asm_ssm) 385END(kvm_asm_ssm)
291 386
292 387
@@ -295,10 +390,9 @@ GLOBAL_ENTRY(kvm_asm_mov_to_psr)
295#ifndef ACCE_MOV_TO_PSR 390#ifndef ACCE_MOV_TO_PSR
296 br.many kvm_virtualization_fault_back 391 br.many kvm_virtualization_fault_back
297#endif 392#endif
298 add r16=VMM_VPD_BASE_OFFSET,r21 393 VMX_VPS_SYNC_READ
299 extr.u r26=r25,13,7 //r2
300 ;; 394 ;;
301 ld8 r16=[r16] 395 extr.u r26=r25,13,7 //r2
302 addl r20=@gprel(asm_mov_from_reg),gp 396 addl r20=@gprel(asm_mov_from_reg),gp
303 ;; 397 ;;
304 adds r30=kvm_asm_mov_to_psr_back-asm_mov_from_reg,r20 398 adds r30=kvm_asm_mov_to_psr_back-asm_mov_from_reg,r20
@@ -374,7 +468,7 @@ kvm_asm_mov_to_psr_1:
374 ;; 468 ;;
375 tbit.nz.or p6,p0=r17,IA64_PSR_I_BIT 469 tbit.nz.or p6,p0=r17,IA64_PSR_I_BIT
376 tbit.z.or p6,p0=r30,IA64_PSR_I_BIT 470 tbit.z.or p6,p0=r30,IA64_PSR_I_BIT
377 (p6) br.dpnt.few kvm_resume_to_guest 471 (p6) br.dpnt.few kvm_resume_to_guest_with_sync
378 ;; 472 ;;
379 add r29=VPD_VTPR_START_OFFSET,r16 473 add r29=VPD_VTPR_START_OFFSET,r16
380 add r30=VPD_VHPI_START_OFFSET,r16 474 add r30=VPD_VHPI_START_OFFSET,r16
@@ -389,13 +483,29 @@ kvm_asm_mov_to_psr_1:
389 ;; 483 ;;
390 cmp.gt p6,p0=r30,r17 484 cmp.gt p6,p0=r30,r17
391 (p6) br.dpnt.few kvm_asm_dispatch_vexirq 485 (p6) br.dpnt.few kvm_asm_dispatch_vexirq
392 br.many kvm_resume_to_guest 486 br.many kvm_resume_to_guest_with_sync
393END(kvm_asm_mov_to_psr) 487END(kvm_asm_mov_to_psr)
394 488
395 489
396ENTRY(kvm_asm_dispatch_vexirq) 490ENTRY(kvm_asm_dispatch_vexirq)
397//increment iip 491//increment iip
492 mov r17 = b0
493 mov r18 = r31
494{.mii
495 add r25=VMM_VPD_BASE_OFFSET,r21
496 nop 0x0
497 mov r24 = ip
498 ;;
499}
500{.mmb
501 add r24 = 0x20, r24
502 ld8 r25 = [r25]
503 br.sptk.many kvm_vps_sync_write
504}
505 mov b0 =r17
398 mov r16=cr.ipsr 506 mov r16=cr.ipsr
507 mov r31 = r18
508 mov r19 = 37
399 ;; 509 ;;
400 extr.u r17=r16,IA64_PSR_RI_BIT,2 510 extr.u r17=r16,IA64_PSR_RI_BIT,2
401 tbit.nz p6,p7=r16,IA64_PSR_RI_BIT+1 511 tbit.nz p6,p7=r16,IA64_PSR_RI_BIT+1
@@ -435,25 +545,31 @@ GLOBAL_ENTRY(kvm_asm_thash)
435 ;; 545 ;;
436kvm_asm_thash_back1: 546kvm_asm_thash_back1:
437 shr.u r23=r19,61 // get RR number 547 shr.u r23=r19,61 // get RR number
438 adds r25=VMM_VCPU_VRR0_OFFSET,r21 // get vcpu->arch.vrr[0]'s addr 548 adds r28=VMM_VCPU_VRR0_OFFSET,r21 // get vcpu->arch.vrr[0]'s addr
439 adds r16=VMM_VPD_VPTA_OFFSET,r16 // get vpta 549 adds r16=VMM_VPD_VPTA_OFFSET,r16 // get vpta
440 ;; 550 ;;
441 shladd r27=r23,3,r25 // get vcpu->arch.vrr[r23]'s addr 551 shladd r27=r23,3,r28 // get vcpu->arch.vrr[r23]'s addr
442 ld8 r17=[r16] // get PTA 552 ld8 r17=[r16] // get PTA
443 mov r26=1 553 mov r26=1
444 ;; 554 ;;
445 extr.u r29=r17,2,6 // get pta.size 555 extr.u r29=r17,2,6 // get pta.size
446 ld8 r25=[r27] // get vcpu->arch.vrr[r23]'s value 556 ld8 r28=[r27] // get vcpu->arch.vrr[r23]'s value
447 ;; 557 ;;
448 extr.u r25=r25,2,6 // get rr.ps 558 mov b0=r24
559 //Fallback to C if pta.vf is set
560 tbit.nz p6,p0=r17, 8
561 ;;
562 (p6) mov r24=EVENT_THASH
563 (p6) br.cond.dpnt.many kvm_virtualization_fault_back
564 extr.u r28=r28,2,6 // get rr.ps
449 shl r22=r26,r29 // 1UL << pta.size 565 shl r22=r26,r29 // 1UL << pta.size
450 ;; 566 ;;
451 shr.u r23=r19,r25 // vaddr >> rr.ps 567 shr.u r23=r19,r28 // vaddr >> rr.ps
452 adds r26=3,r29 // pta.size + 3 568 adds r26=3,r29 // pta.size + 3
453 shl r27=r17,3 // pta << 3 569 shl r27=r17,3 // pta << 3
454 ;; 570 ;;
455 shl r23=r23,3 // (vaddr >> rr.ps) << 3 571 shl r23=r23,3 // (vaddr >> rr.ps) << 3
456 shr.u r27=r27,r26 // (pta << 3) >> (pta.size+3) 572 shr.u r27=r27,r26 // (pta << 3) >> (pta.size+3)
457 movl r16=7<<61 573 movl r16=7<<61
458 ;; 574 ;;
459 adds r22=-1,r22 // (1UL << pta.size) - 1 575 adds r22=-1,r22 // (1UL << pta.size) - 1
@@ -724,6 +840,29 @@ END(asm_mov_from_reg)
724 * r31: pr 840 * r31: pr
725 * r24: b0 841 * r24: b0
726 */ 842 */
843ENTRY(kvm_resume_to_guest_with_sync)
844 adds r19=VMM_VPD_BASE_OFFSET,r21
845 mov r16 = r31
846 mov r17 = r24
847 ;;
848{.mii
849 ld8 r25 =[r19]
850 nop 0x0
851 mov r24 = ip
852 ;;
853}
854{.mmb
855 add r24 =0x20, r24
856 nop 0x0
857 br.sptk.many kvm_vps_sync_write
858}
859
860 mov r31 = r16
861 mov r24 =r17
862 ;;
863 br.sptk.many kvm_resume_to_guest
864END(kvm_resume_to_guest_with_sync)
865
727ENTRY(kvm_resume_to_guest) 866ENTRY(kvm_resume_to_guest)
728 adds r16 = VMM_VCPU_SAVED_GP_OFFSET,r21 867 adds r16 = VMM_VCPU_SAVED_GP_OFFSET,r21
729 ;; 868 ;;
diff --git a/arch/ia64/kvm/process.c b/arch/ia64/kvm/process.c
index 5a33f7ed29a0..3417783ae164 100644
--- a/arch/ia64/kvm/process.c
+++ b/arch/ia64/kvm/process.c
@@ -962,9 +962,9 @@ static void kvm_do_resume_op(struct kvm_vcpu *vcpu)
962void vmm_transition(struct kvm_vcpu *vcpu) 962void vmm_transition(struct kvm_vcpu *vcpu)
963{ 963{
964 ia64_call_vsa(PAL_VPS_SAVE, (unsigned long)vcpu->arch.vpd, 964 ia64_call_vsa(PAL_VPS_SAVE, (unsigned long)vcpu->arch.vpd,
965 0, 0, 0, 0, 0, 0); 965 1, 0, 0, 0, 0, 0);
966 vmm_trampoline(&vcpu->arch.guest, &vcpu->arch.host); 966 vmm_trampoline(&vcpu->arch.guest, &vcpu->arch.host);
967 ia64_call_vsa(PAL_VPS_RESTORE, (unsigned long)vcpu->arch.vpd, 967 ia64_call_vsa(PAL_VPS_RESTORE, (unsigned long)vcpu->arch.vpd,
968 0, 0, 0, 0, 0, 0); 968 1, 0, 0, 0, 0, 0);
969 kvm_do_resume_op(vcpu); 969 kvm_do_resume_op(vcpu);
970} 970}
diff --git a/arch/ia64/kvm/vcpu.h b/arch/ia64/kvm/vcpu.h
index b0fcfb62c49e..341e3fee280c 100644
--- a/arch/ia64/kvm/vcpu.h
+++ b/arch/ia64/kvm/vcpu.h
@@ -313,21 +313,21 @@ static inline void vcpu_set_tr(struct thash_data *trp, u64 pte, u64 itir,
313 trp->rid = rid; 313 trp->rid = rid;
314} 314}
315 315
316extern u64 kvm_lookup_mpa(u64 gpfn); 316extern u64 kvm_get_mpt_entry(u64 gpfn);
317extern u64 kvm_gpa_to_mpa(u64 gpa);
318
319/* Return I/O type if trye */
320#define __gpfn_is_io(gpfn) \
321 ({ \
322 u64 pte, ret = 0; \
323 pte = kvm_lookup_mpa(gpfn); \
324 if (!(pte & GPFN_INV_MASK)) \
325 ret = pte & GPFN_IO_MASK; \
326 ret; \
327 })
328 317
318/* Return I/ */
319static inline u64 __gpfn_is_io(u64 gpfn)
320{
321 u64 pte;
322 pte = kvm_get_mpt_entry(gpfn);
323 if (!(pte & GPFN_INV_MASK)) {
324 pte = pte & GPFN_IO_MASK;
325 if (pte != GPFN_PHYS_MMIO)
326 return pte;
327 }
328 return 0;
329}
329#endif 330#endif
330
331#define IA64_NO_FAULT 0 331#define IA64_NO_FAULT 0
332#define IA64_FAULT 1 332#define IA64_FAULT 1
333 333
diff --git a/arch/ia64/kvm/vmm_ivt.S b/arch/ia64/kvm/vmm_ivt.S
index 3ee5f481c06d..c1d7251a1480 100644
--- a/arch/ia64/kvm/vmm_ivt.S
+++ b/arch/ia64/kvm/vmm_ivt.S
@@ -1261,11 +1261,6 @@ kvm_rse_clear_invalid:
1261 adds r19=VMM_VPD_VPSR_OFFSET,r18 1261 adds r19=VMM_VPD_VPSR_OFFSET,r18
1262 ;; 1262 ;;
1263 ld8 r19=[r19] //vpsr 1263 ld8 r19=[r19] //vpsr
1264 adds r20=VMM_VCPU_VSA_BASE_OFFSET,r21
1265 ;;
1266 ld8 r20=[r20]
1267 ;;
1268//vsa_sync_write_start
1269 mov r25=r18 1264 mov r25=r18
1270 adds r16= VMM_VCPU_GP_OFFSET,r21 1265 adds r16= VMM_VCPU_GP_OFFSET,r21
1271 ;; 1266 ;;
@@ -1274,10 +1269,7 @@ kvm_rse_clear_invalid:
1274 ;; 1269 ;;
1275 add r24=r24,r16 1270 add r24=r24,r16
1276 ;; 1271 ;;
1277 add r16=PAL_VPS_SYNC_WRITE,r20 1272 br.sptk.many kvm_vps_sync_write // call the service
1278 ;;
1279 mov b0=r16
1280 br.cond.sptk b0 // call the service
1281 ;; 1273 ;;
1282END(ia64_leave_hypervisor) 1274END(ia64_leave_hypervisor)
1283// fall through 1275// fall through
@@ -1288,28 +1280,15 @@ GLOBAL_ENTRY(ia64_vmm_entry)
1288 * r17:cr.isr 1280 * r17:cr.isr
1289 * r18:vpd 1281 * r18:vpd
1290 * r19:vpsr 1282 * r19:vpsr
1291 * r20:__vsa_base
1292 * r22:b0 1283 * r22:b0
1293 * r23:predicate 1284 * r23:predicate
1294 */ 1285 */
1295 mov r24=r22 1286 mov r24=r22
1296 mov r25=r18 1287 mov r25=r18
1297 tbit.nz p1,p2 = r19,IA64_PSR_IC_BIT // p1=vpsr.ic 1288 tbit.nz p1,p2 = r19,IA64_PSR_IC_BIT // p1=vpsr.ic
1289 (p1) br.cond.sptk.few kvm_vps_resume_normal
1290 (p2) br.cond.sptk.many kvm_vps_resume_handler
1298 ;; 1291 ;;
1299 (p1) add r29=PAL_VPS_RESUME_NORMAL,r20
1300 (p1) br.sptk.many ia64_vmm_entry_out
1301 ;;
1302 tbit.nz p1,p2 = r17,IA64_ISR_IR_BIT //p1=cr.isr.ir
1303 ;;
1304 (p1) add r29=PAL_VPS_RESUME_NORMAL,r20
1305 (p2) add r29=PAL_VPS_RESUME_HANDLER,r20
1306 (p2) ld8 r26=[r25]
1307 ;;
1308ia64_vmm_entry_out:
1309 mov pr=r23,-2
1310 mov b0=r29
1311 ;;
1312 br.cond.sptk b0 // call pal service
1313END(ia64_vmm_entry) 1292END(ia64_vmm_entry)
1314 1293
1315 1294
@@ -1376,6 +1355,9 @@ GLOBAL_ENTRY(vmm_reset_entry)
1376 //set up ipsr, iip, vpd.vpsr, dcr 1355 //set up ipsr, iip, vpd.vpsr, dcr
1377 // For IPSR: it/dt/rt=1, i/ic=1, si=1, vm/bn=1 1356 // For IPSR: it/dt/rt=1, i/ic=1, si=1, vm/bn=1
1378 // For DCR: all bits 0 1357 // For DCR: all bits 0
1358 bsw.0
1359 ;;
1360 mov r21 =r13
1379 adds r14=-VMM_PT_REGS_SIZE, r12 1361 adds r14=-VMM_PT_REGS_SIZE, r12
1380 ;; 1362 ;;
1381 movl r6=0x501008826000 // IPSR dt/rt/it:1;i/ic:1, si:1, vm/bn:1 1363 movl r6=0x501008826000 // IPSR dt/rt/it:1;i/ic:1, si:1, vm/bn:1
@@ -1387,12 +1369,6 @@ GLOBAL_ENTRY(vmm_reset_entry)
1387 ;; 1369 ;;
1388 srlz.i 1370 srlz.i
1389 ;; 1371 ;;
1390 bsw.0
1391 ;;
1392 mov r21 =r13
1393 ;;
1394 bsw.1
1395 ;;
1396 mov ar.rsc = 0 1372 mov ar.rsc = 0
1397 ;; 1373 ;;
1398 flushrs 1374 flushrs
@@ -1406,12 +1382,9 @@ GLOBAL_ENTRY(vmm_reset_entry)
1406 ld8 r1 = [r20] 1382 ld8 r1 = [r20]
1407 ;; 1383 ;;
1408 mov cr.iip=r4 1384 mov cr.iip=r4
1409 ;;
1410 adds r16=VMM_VPD_BASE_OFFSET,r13 1385 adds r16=VMM_VPD_BASE_OFFSET,r13
1411 adds r20=VMM_VCPU_VSA_BASE_OFFSET,r13
1412 ;; 1386 ;;
1413 ld8 r18=[r16] 1387 ld8 r18=[r16]
1414 ld8 r20=[r20]
1415 ;; 1388 ;;
1416 adds r19=VMM_VPD_VPSR_OFFSET,r18 1389 adds r19=VMM_VPD_VPSR_OFFSET,r18
1417 ;; 1390 ;;
diff --git a/arch/ia64/kvm/vtlb.c b/arch/ia64/kvm/vtlb.c
index def4576d22b1..e22b93361e08 100644
--- a/arch/ia64/kvm/vtlb.c
+++ b/arch/ia64/kvm/vtlb.c
@@ -390,7 +390,7 @@ void thash_purge_entries_remote(struct kvm_vcpu *v, u64 va, u64 ps)
390 390
391u64 translate_phy_pte(u64 *pte, u64 itir, u64 va) 391u64 translate_phy_pte(u64 *pte, u64 itir, u64 va)
392{ 392{
393 u64 ps, ps_mask, paddr, maddr; 393 u64 ps, ps_mask, paddr, maddr, io_mask;
394 union pte_flags phy_pte; 394 union pte_flags phy_pte;
395 395
396 ps = itir_ps(itir); 396 ps = itir_ps(itir);
@@ -398,8 +398,9 @@ u64 translate_phy_pte(u64 *pte, u64 itir, u64 va)
398 phy_pte.val = *pte; 398 phy_pte.val = *pte;
399 paddr = *pte; 399 paddr = *pte;
400 paddr = ((paddr & _PAGE_PPN_MASK) & ps_mask) | (va & ~ps_mask); 400 paddr = ((paddr & _PAGE_PPN_MASK) & ps_mask) | (va & ~ps_mask);
401 maddr = kvm_lookup_mpa(paddr >> PAGE_SHIFT); 401 maddr = kvm_get_mpt_entry(paddr >> PAGE_SHIFT);
402 if (maddr & GPFN_IO_MASK) { 402 io_mask = maddr & GPFN_IO_MASK;
403 if (io_mask && (io_mask != GPFN_PHYS_MMIO)) {
403 *pte |= VTLB_PTE_IO; 404 *pte |= VTLB_PTE_IO;
404 return -1; 405 return -1;
405 } 406 }
@@ -418,7 +419,7 @@ int thash_purge_and_insert(struct kvm_vcpu *v, u64 pte, u64 itir,
418 u64 ifa, int type) 419 u64 ifa, int type)
419{ 420{
420 u64 ps; 421 u64 ps;
421 u64 phy_pte; 422 u64 phy_pte, io_mask, index;
422 union ia64_rr vrr, mrr; 423 union ia64_rr vrr, mrr;
423 int ret = 0; 424 int ret = 0;
424 425
@@ -426,13 +427,16 @@ int thash_purge_and_insert(struct kvm_vcpu *v, u64 pte, u64 itir,
426 vrr.val = vcpu_get_rr(v, ifa); 427 vrr.val = vcpu_get_rr(v, ifa);
427 mrr.val = ia64_get_rr(ifa); 428 mrr.val = ia64_get_rr(ifa);
428 429
430 index = (pte & _PAGE_PPN_MASK) >> PAGE_SHIFT;
431 io_mask = kvm_get_mpt_entry(index) & GPFN_IO_MASK;
429 phy_pte = translate_phy_pte(&pte, itir, ifa); 432 phy_pte = translate_phy_pte(&pte, itir, ifa);
430 433
431 /* Ensure WB attribute if pte is related to a normal mem page, 434 /* Ensure WB attribute if pte is related to a normal mem page,
432 * which is required by vga acceleration since qemu maps shared 435 * which is required by vga acceleration since qemu maps shared
433 * vram buffer with WB. 436 * vram buffer with WB.
434 */ 437 */
435 if (!(pte & VTLB_PTE_IO) && ((pte & _PAGE_MA_MASK) != _PAGE_MA_NAT)) { 438 if (!(pte & VTLB_PTE_IO) && ((pte & _PAGE_MA_MASK) != _PAGE_MA_NAT) &&
439 io_mask != GPFN_PHYS_MMIO) {
436 pte &= ~_PAGE_MA_MASK; 440 pte &= ~_PAGE_MA_MASK;
437 phy_pte &= ~_PAGE_MA_MASK; 441 phy_pte &= ~_PAGE_MA_MASK;
438 } 442 }
@@ -566,12 +570,19 @@ void thash_init(struct thash_cb *hcb, u64 sz)
566 } 570 }
567} 571}
568 572
569u64 kvm_lookup_mpa(u64 gpfn) 573u64 kvm_get_mpt_entry(u64 gpfn)
570{ 574{
571 u64 *base = (u64 *) KVM_P2M_BASE; 575 u64 *base = (u64 *) KVM_P2M_BASE;
572 return *(base + gpfn); 576 return *(base + gpfn);
573} 577}
574 578
579u64 kvm_lookup_mpa(u64 gpfn)
580{
581 u64 maddr;
582 maddr = kvm_get_mpt_entry(gpfn);
583 return maddr&_PAGE_PPN_MASK;
584}
585
575u64 kvm_gpa_to_mpa(u64 gpa) 586u64 kvm_gpa_to_mpa(u64 gpa)
576{ 587{
577 u64 pte = kvm_lookup_mpa(gpa >> PAGE_SHIFT); 588 u64 pte = kvm_lookup_mpa(gpa >> PAGE_SHIFT);
diff --git a/arch/ia64/mm/init.c b/arch/ia64/mm/init.c
index 200100ea7610..f482a9098e32 100644
--- a/arch/ia64/mm/init.c
+++ b/arch/ia64/mm/init.c
@@ -21,7 +21,6 @@
21#include <linux/bitops.h> 21#include <linux/bitops.h>
22#include <linux/kexec.h> 22#include <linux/kexec.h>
23 23
24#include <asm/a.out.h>
25#include <asm/dma.h> 24#include <asm/dma.h>
26#include <asm/ia32.h> 25#include <asm/ia32.h>
27#include <asm/io.h> 26#include <asm/io.h>
diff --git a/arch/m32r/Kconfig b/arch/m32r/Kconfig
index f57113f1f892..00289c178f89 100644
--- a/arch/m32r/Kconfig
+++ b/arch/m32r/Kconfig
@@ -36,9 +36,6 @@ config NO_IOPORT
36config NO_DMA 36config NO_DMA
37 def_bool y 37 def_bool y
38 38
39config ARCH_SUPPORTS_AOUT
40 def_bool y
41
42config HZ 39config HZ
43 int 40 int
44 default 100 41 default 100
diff --git a/arch/m32r/kernel/process.c b/arch/m32r/kernel/process.c
index 5be4faaf5b1c..7103d91e1a2f 100644
--- a/arch/m32r/kernel/process.c
+++ b/arch/m32r/kernel/process.c
@@ -11,7 +11,7 @@
11#undef DEBUG_PROCESS 11#undef DEBUG_PROCESS
12#ifdef DEBUG_PROCESS 12#ifdef DEBUG_PROCESS
13#define DPRINTK(fmt, args...) printk("%s:%d:%s: " fmt, __FILE__, __LINE__, \ 13#define DPRINTK(fmt, args...) printk("%s:%d:%s: " fmt, __FILE__, __LINE__, \
14 __FUNCTION__, ##args) 14 __func__, ##args)
15#else 15#else
16#define DPRINTK(fmt, args...) 16#define DPRINTK(fmt, args...)
17#endif 17#endif
diff --git a/arch/m32r/mm/discontig.c b/arch/m32r/mm/discontig.c
index cbc3c4c54566..7daf897292cf 100644
--- a/arch/m32r/mm/discontig.c
+++ b/arch/m32r/mm/discontig.c
@@ -111,9 +111,9 @@ unsigned long __init setup_memory(void)
111 initrd_start, INITRD_SIZE); 111 initrd_start, INITRD_SIZE);
112 } else { 112 } else {
113 printk("initrd extends beyond end of memory " 113 printk("initrd extends beyond end of memory "
114 "(0x%08lx > 0x%08lx)\ndisabling initrd\n", 114 "(0x%08lx > 0x%08llx)\ndisabling initrd\n",
115 INITRD_START + INITRD_SIZE, 115 INITRD_START + INITRD_SIZE,
116 PFN_PHYS(max_low_pfn)); 116 (unsigned long long)PFN_PHYS(max_low_pfn));
117 117
118 initrd_start = 0; 118 initrd_start = 0;
119 } 119 }
diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig
index 8c5e1de68fcb..677c93a490f6 100644
--- a/arch/m68k/Kconfig
+++ b/arch/m68k/Kconfig
@@ -5,6 +5,7 @@
5config M68K 5config M68K
6 bool 6 bool
7 default y 7 default y
8 select HAVE_AOUT
8 select HAVE_IDE 9 select HAVE_IDE
9 10
10config MMU 11config MMU
@@ -53,9 +54,6 @@ config NO_IOPORT
53config NO_DMA 54config NO_DMA
54 def_bool SUN3 55 def_bool SUN3
55 56
56config ARCH_SUPPORTS_AOUT
57 def_bool y
58
59config HZ 57config HZ
60 int 58 int
61 default 100 59 default 100
@@ -107,21 +105,9 @@ config PCMCIA
107 To compile this driver as modules, choose M here: the 105 To compile this driver as modules, choose M here: the
108 modules will be called pcmcia_core and ds. 106 modules will be called pcmcia_core and ds.
109 107
110config SUN3
111 bool "Sun3 support"
112 select M68020
113 select MMU_SUN3 if MMU
114 help
115 This option enables support for the Sun 3 series of workstations
116 (3/50, 3/60, 3/1xx, 3/2xx systems). Enabling this option requires
117 that all other hardware types must be disabled, as Sun 3 kernels
118 are incompatible with all other m68k targets (including Sun 3x!).
119
120 If you don't want to compile a kernel exclusively for a Sun 3, say N.
121
122config AMIGA 108config AMIGA
123 bool "Amiga support" 109 bool "Amiga support"
124 depends on !MMU_SUN3 110 select MMU_MOTOROLA if MMU
125 help 111 help
126 This option enables support for the Amiga series of computers. If 112 This option enables support for the Amiga series of computers. If
127 you plan to use this kernel on an Amiga, say Y here and browse the 113 you plan to use this kernel on an Amiga, say Y here and browse the
@@ -129,33 +115,16 @@ config AMIGA
129 115
130config ATARI 116config ATARI
131 bool "Atari support" 117 bool "Atari support"
132 depends on !MMU_SUN3 118 select MMU_MOTOROLA if MMU
133 help 119 help
134 This option enables support for the 68000-based Atari series of 120 This option enables support for the 68000-based Atari series of
135 computers (including the TT, Falcon and Medusa). If you plan to use 121 computers (including the TT, Falcon and Medusa). If you plan to use
136 this kernel on an Atari, say Y here and browse the material 122 this kernel on an Atari, say Y here and browse the material
137 available in <file:Documentation/m68k>; otherwise say N. 123 available in <file:Documentation/m68k>; otherwise say N.
138 124
139config HADES
140 bool "Hades support"
141 depends on ATARI && BROKEN
142 help
143 This option enables support for the Hades Atari clone. If you plan
144 to use this kernel on a Hades, say Y here; otherwise say N.
145
146config PCI
147 bool
148 depends on HADES
149 default y
150 help
151 Find out whether you have a PCI motherboard. PCI is the name of a
152 bus system, i.e. the way the CPU talks to the other stuff inside
153 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
154 VESA. If you have PCI, say Y, otherwise N.
155
156config MAC 125config MAC
157 bool "Macintosh support" 126 bool "Macintosh support"
158 depends on !MMU_SUN3 127 select MMU_MOTOROLA if MMU
159 help 128 help
160 This option enables support for the Apple Macintosh series of 129 This option enables support for the Apple Macintosh series of
161 computers (yes, there is experimental support now, at least for part 130 computers (yes, there is experimental support now, at least for part
@@ -176,14 +145,14 @@ config M68K_L2_CACHE
176 145
177config APOLLO 146config APOLLO
178 bool "Apollo support" 147 bool "Apollo support"
179 depends on !MMU_SUN3 148 select MMU_MOTOROLA if MMU
180 help 149 help
181 Say Y here if you want to run Linux on an MC680x0-based Apollo 150 Say Y here if you want to run Linux on an MC680x0-based Apollo
182 Domain workstation such as the DN3500. 151 Domain workstation such as the DN3500.
183 152
184config VME 153config VME
185 bool "VME (Motorola and BVM) support" 154 bool "VME (Motorola and BVM) support"
186 depends on !MMU_SUN3 155 select MMU_MOTOROLA if MMU
187 help 156 help
188 Say Y here if you want to build a kernel for a 680x0 based VME 157 Say Y here if you want to build a kernel for a 680x0 based VME
189 board. Boards currently supported include Motorola boards MVME147, 158 board. Boards currently supported include Motorola boards MVME147,
@@ -220,7 +189,7 @@ config BVME6000
220 189
221config HP300 190config HP300
222 bool "HP9000/300 and HP9000/400 support" 191 bool "HP9000/300 and HP9000/400 support"
223 depends on !MMU_SUN3 192 select MMU_MOTOROLA if MMU
224 help 193 help
225 This option enables support for the HP9000/300 and HP9000/400 series 194 This option enables support for the HP9000/300 and HP9000/400 series
226 of workstations. Support for these machines is still somewhat 195 of workstations. Support for these machines is still somewhat
@@ -239,7 +208,7 @@ config DIO
239 208
240config SUN3X 209config SUN3X
241 bool "Sun3x support" 210 bool "Sun3x support"
242 depends on !MMU_SUN3 211 select MMU_MOTOROLA if MMU
243 select M68030 212 select M68030
244 help 213 help
245 This option enables support for the Sun 3x series of workstations. 214 This option enables support for the Sun 3x series of workstations.
@@ -252,7 +221,7 @@ config SUN3X
252 221
253config Q40 222config Q40
254 bool "Q40/Q60 support" 223 bool "Q40/Q60 support"
255 depends on !MMU_SUN3 224 select MMU_MOTOROLA if MMU
256 help 225 help
257 The Q40 is a Motorola 68040-based successor to the Sinclair QL 226 The Q40 is a Motorola 68040-based successor to the Sinclair QL
258 manufactured in Germany. There is an official Q40 home page at 227 manufactured in Germany. There is an official Q40 home page at
@@ -260,6 +229,19 @@ config Q40
260 Q60. Select your CPU below. For 68LC060 don't forget to enable FPU 229 Q60. Select your CPU below. For 68LC060 don't forget to enable FPU
261 emulation. 230 emulation.
262 231
232config SUN3
233 bool "Sun3 support"
234 depends on !MMU_MOTOROLA
235 select MMU_SUN3 if MMU
236 select M68020
237 help
238 This option enables support for the Sun 3 series of workstations
239 (3/50, 3/60, 3/1xx, 3/2xx systems). Enabling this option requires
240 that all other hardware types must be disabled, as Sun 3 kernels
241 are incompatible with all other m68k targets (including Sun 3x!).
242
243 If you don't want to compile a kernel exclusively for a Sun 3, say N.
244
263comment "Processor type" 245comment "Processor type"
264 246
265config M68020 247config M68020
@@ -297,10 +279,10 @@ config M68060
297config MMU_MOTOROLA 279config MMU_MOTOROLA
298 bool 280 bool
299 depends on MMU && !MMU_SUN3 281 depends on MMU && !MMU_SUN3
300 default y
301 282
302config MMU_SUN3 283config MMU_SUN3
303 bool 284 bool
285 depends on MMU && !MMU_MOTOROLA
304 286
305config M68KFPU_EMU 287config M68KFPU_EMU
306 bool "Math emulation support (EXPERIMENTAL)" 288 bool "Math emulation support (EXPERIMENTAL)"
diff --git a/arch/m68k/amiga/config.c b/arch/m68k/amiga/config.c
index df679d96b1cb..0a3f9e8ebde0 100644
--- a/arch/m68k/amiga/config.c
+++ b/arch/m68k/amiga/config.c
@@ -24,6 +24,7 @@
24#include <linux/interrupt.h> 24#include <linux/interrupt.h>
25#include <linux/zorro.h> 25#include <linux/zorro.h>
26#include <linux/module.h> 26#include <linux/module.h>
27#include <linux/keyboard.h>
27 28
28#include <asm/bootinfo.h> 29#include <asm/bootinfo.h>
29#include <asm/setup.h> 30#include <asm/setup.h>
@@ -984,3 +985,11 @@ static int amiga_get_hardware_list(char *buffer)
984 985
985 return len; 986 return len;
986} 987}
988
989/*
990 * The Amiga keyboard driver needs key_maps, but we cannot export it in
991 * drivers/char/defkeymap.c, as it is autogenerated
992 */
993#ifdef CONFIG_HW_CONSOLE
994EXPORT_SYMBOL_GPL(key_maps);
995#endif
diff --git a/arch/m68k/atari/Makefile b/arch/m68k/atari/Makefile
index 2cd905efe63a..0cac723306f9 100644
--- a/arch/m68k/atari/Makefile
+++ b/arch/m68k/atari/Makefile
@@ -5,7 +5,4 @@
5obj-y := config.o time.o debug.o ataints.o stdma.o \ 5obj-y := config.o time.o debug.o ataints.o stdma.o \
6 atasound.o stram.o 6 atasound.o stram.o
7 7
8ifeq ($(CONFIG_PCI),y)
9obj-$(CONFIG_HADES) += hades-pci.o
10endif
11obj-$(CONFIG_ATARI_KBD_CORE) += atakeyb.o 8obj-$(CONFIG_ATARI_KBD_CORE) += atakeyb.o
diff --git a/arch/m68k/atari/ataints.c b/arch/m68k/atari/ataints.c
index b45593a60bdd..dba4afabb444 100644
--- a/arch/m68k/atari/ataints.c
+++ b/arch/m68k/atari/ataints.c
@@ -407,10 +407,8 @@ void __init atari_init_IRQ(void)
407 * gets overruns) 407 * gets overruns)
408 */ 408 */
409 409
410 if (!MACH_IS_HADES) { 410 vectors[VEC_INT2] = falcon_hblhandler;
411 vectors[VEC_INT2] = falcon_hblhandler; 411 vectors[VEC_INT4] = falcon_hblhandler;
412 vectors[VEC_INT4] = falcon_hblhandler;
413 }
414 } 412 }
415 413
416 if (ATARIHW_PRESENT(PCM_8BIT) && ATARIHW_PRESENT(MICROWIRE)) { 414 if (ATARIHW_PRESENT(PCM_8BIT) && ATARIHW_PRESENT(MICROWIRE)) {
diff --git a/arch/m68k/atari/atakeyb.c b/arch/m68k/atari/atakeyb.c
index bb959fbab2dc..c038b7c7eff0 100644
--- a/arch/m68k/atari/atakeyb.c
+++ b/arch/m68k/atari/atakeyb.c
@@ -635,15 +635,3 @@ int atari_keyb_init(void)
635 return 0; 635 return 0;
636} 636}
637EXPORT_SYMBOL_GPL(atari_keyb_init); 637EXPORT_SYMBOL_GPL(atari_keyb_init);
638
639int atari_kbd_translate(unsigned char keycode, unsigned char *keycodep, char raw_mode)
640{
641#ifdef CONFIG_MAGIC_SYSRQ
642 /* ALT+HELP pressed? */
643 if ((keycode == 98) && ((shift_state & 0xff) == 8))
644 *keycodep = 0xff;
645 else
646#endif
647 *keycodep = keycode;
648 return 1;
649}
diff --git a/arch/m68k/atari/config.c b/arch/m68k/atari/config.c
index 5945e1505558..af031855f796 100644
--- a/arch/m68k/atari/config.c
+++ b/arch/m68k/atari/config.c
@@ -231,7 +231,7 @@ void __init config_atari(void)
231 */ 231 */
232 232
233 printk("Atari hardware found: "); 233 printk("Atari hardware found: ");
234 if (MACH_IS_MEDUSA || MACH_IS_HADES) { 234 if (MACH_IS_MEDUSA) {
235 /* There's no Atari video hardware on the Medusa, but all the 235 /* There's no Atari video hardware on the Medusa, but all the
236 * addresses below generate a DTACK so no bus error occurs! */ 236 * addresses below generate a DTACK so no bus error occurs! */
237 } else if (hwreg_present(f030_xreg)) { 237 } else if (hwreg_present(f030_xreg)) {
@@ -269,10 +269,6 @@ void __init config_atari(void)
269 ATARIHW_SET(SCSI_DMA); 269 ATARIHW_SET(SCSI_DMA);
270 printk("TT_SCSI_DMA "); 270 printk("TT_SCSI_DMA ");
271 } 271 }
272 if (!MACH_IS_HADES && hwreg_present(&st_dma.dma_hi)) {
273 ATARIHW_SET(STND_DMA);
274 printk("STND_DMA ");
275 }
276 /* 272 /*
277 * The ST-DMA address registers aren't readable 273 * The ST-DMA address registers aren't readable
278 * on all Medusas, so the test below may fail 274 * on all Medusas, so the test below may fail
@@ -294,12 +290,11 @@ void __init config_atari(void)
294 ATARIHW_SET(YM_2149); 290 ATARIHW_SET(YM_2149);
295 printk("YM2149 "); 291 printk("YM2149 ");
296 } 292 }
297 if (!MACH_IS_MEDUSA && !MACH_IS_HADES && 293 if (!MACH_IS_MEDUSA && hwreg_present(&tt_dmasnd.ctrl)) {
298 hwreg_present(&tt_dmasnd.ctrl)) {
299 ATARIHW_SET(PCM_8BIT); 294 ATARIHW_SET(PCM_8BIT);
300 printk("PCM "); 295 printk("PCM ");
301 } 296 }
302 if (!MACH_IS_HADES && hwreg_present(&falcon_codec.unused5)) { 297 if (hwreg_present(&falcon_codec.unused5)) {
303 ATARIHW_SET(CODEC); 298 ATARIHW_SET(CODEC);
304 printk("CODEC "); 299 printk("CODEC ");
305 } 300 }
@@ -313,7 +308,7 @@ void __init config_atari(void)
313 (tt_scc_dma.dma_ctrl = 0x01, (tt_scc_dma.dma_ctrl & 1) == 1) && 308 (tt_scc_dma.dma_ctrl = 0x01, (tt_scc_dma.dma_ctrl & 1) == 1) &&
314 (tt_scc_dma.dma_ctrl = 0x00, (tt_scc_dma.dma_ctrl & 1) == 0) 309 (tt_scc_dma.dma_ctrl = 0x00, (tt_scc_dma.dma_ctrl & 1) == 0)
315#else 310#else
316 !MACH_IS_MEDUSA && !MACH_IS_HADES 311 !MACH_IS_MEDUSA
317#endif 312#endif
318 ) { 313 ) {
319 ATARIHW_SET(SCC_DMA); 314 ATARIHW_SET(SCC_DMA);
@@ -327,10 +322,7 @@ void __init config_atari(void)
327 ATARIHW_SET(ST_ESCC); 322 ATARIHW_SET(ST_ESCC);
328 printk("ST_ESCC "); 323 printk("ST_ESCC ");
329 } 324 }
330 if (MACH_IS_HADES) { 325 if (hwreg_present(&tt_scu.sys_mask)) {
331 ATARIHW_SET(VME);
332 printk("VME ");
333 } else if (hwreg_present(&tt_scu.sys_mask)) {
334 ATARIHW_SET(SCU); 326 ATARIHW_SET(SCU);
335 /* Assume a VME bus if there's a SCU */ 327 /* Assume a VME bus if there's a SCU */
336 ATARIHW_SET(VME); 328 ATARIHW_SET(VME);
@@ -340,7 +332,7 @@ void __init config_atari(void)
340 ATARIHW_SET(ANALOG_JOY); 332 ATARIHW_SET(ANALOG_JOY);
341 printk("ANALOG_JOY "); 333 printk("ANALOG_JOY ");
342 } 334 }
343 if (!MACH_IS_HADES && hwreg_present(blitter.halftone)) { 335 if (hwreg_present(blitter.halftone)) {
344 ATARIHW_SET(BLITTER); 336 ATARIHW_SET(BLITTER);
345 printk("BLITTER "); 337 printk("BLITTER ");
346 } 338 }
@@ -349,8 +341,7 @@ void __init config_atari(void)
349 printk("IDE "); 341 printk("IDE ");
350 } 342 }
351#if 1 /* This maybe wrong */ 343#if 1 /* This maybe wrong */
352 if (!MACH_IS_MEDUSA && !MACH_IS_HADES && 344 if (!MACH_IS_MEDUSA && hwreg_present(&tt_microwire.data) &&
353 hwreg_present(&tt_microwire.data) &&
354 hwreg_present(&tt_microwire.mask) && 345 hwreg_present(&tt_microwire.mask) &&
355 (tt_microwire.mask = 0x7ff, 346 (tt_microwire.mask = 0x7ff,
356 udelay(1), 347 udelay(1),
@@ -369,19 +360,18 @@ void __init config_atari(void)
369 mach_hwclk = atari_tt_hwclk; 360 mach_hwclk = atari_tt_hwclk;
370 mach_set_clock_mmss = atari_tt_set_clock_mmss; 361 mach_set_clock_mmss = atari_tt_set_clock_mmss;
371 } 362 }
372 if (!MACH_IS_HADES && hwreg_present(&mste_rtc.sec_ones)) { 363 if (hwreg_present(&mste_rtc.sec_ones)) {
373 ATARIHW_SET(MSTE_CLK); 364 ATARIHW_SET(MSTE_CLK);
374 printk("MSTE_CLK "); 365 printk("MSTE_CLK ");
375 mach_hwclk = atari_mste_hwclk; 366 mach_hwclk = atari_mste_hwclk;
376 mach_set_clock_mmss = atari_mste_set_clock_mmss; 367 mach_set_clock_mmss = atari_mste_set_clock_mmss;
377 } 368 }
378 if (!MACH_IS_MEDUSA && !MACH_IS_HADES && 369 if (!MACH_IS_MEDUSA && hwreg_present(&dma_wd.fdc_speed) &&
379 hwreg_present(&dma_wd.fdc_speed) &&
380 hwreg_write(&dma_wd.fdc_speed, 0)) { 370 hwreg_write(&dma_wd.fdc_speed, 0)) {
381 ATARIHW_SET(FDCSPEED); 371 ATARIHW_SET(FDCSPEED);
382 printk("FDC_SPEED "); 372 printk("FDC_SPEED ");
383 } 373 }
384 if (!MACH_IS_HADES && !ATARIHW_PRESENT(ST_SCSI)) { 374 if (!ATARIHW_PRESENT(ST_SCSI)) {
385 ATARIHW_SET(ACSI); 375 ATARIHW_SET(ACSI);
386 printk("ACSI "); 376 printk("ACSI ");
387 } 377 }
@@ -449,7 +439,7 @@ void __init config_atari(void)
449 * 0xFFxxxxxx -> 0x00xxxxxx, so that the first 16MB is accessible 439 * 0xFFxxxxxx -> 0x00xxxxxx, so that the first 16MB is accessible
450 * in the last 16MB of the address space. 440 * in the last 16MB of the address space.
451 */ 441 */
452 tos_version = (MACH_IS_MEDUSA || MACH_IS_HADES) ? 442 tos_version = (MACH_IS_MEDUSA) ?
453 0xfff : *(unsigned short *)0xff000002; 443 0xfff : *(unsigned short *)0xff000002;
454 atari_rtc_year_offset = (tos_version < 0x306) ? 70 : 68; 444 atari_rtc_year_offset = (tos_version < 0x306) ? 70 : 68;
455} 445}
@@ -511,8 +501,7 @@ static void atari_reset(void)
511 * On the Medusa, phys. 0x4 may contain garbage because it's no 501 * On the Medusa, phys. 0x4 may contain garbage because it's no
512 * ROM. See above for explanation why we cannot use PTOV(4). 502 * ROM. See above for explanation why we cannot use PTOV(4).
513 */ 503 */
514 reset_addr = MACH_IS_HADES ? 0x7fe00030 : 504 reset_addr = MACH_IS_MEDUSA || MACH_IS_AB40 ? 0xe00030 :
515 MACH_IS_MEDUSA || MACH_IS_AB40 ? 0xe00030 :
516 *(unsigned long *) 0xff000004; 505 *(unsigned long *) 0xff000004;
517 506
518 /* reset ACIA for switch off OverScan, if it's active */ 507 /* reset ACIA for switch off OverScan, if it's active */
@@ -606,8 +595,6 @@ static void atari_get_model(char *model)
606 if (MACH_IS_MEDUSA) 595 if (MACH_IS_MEDUSA)
607 /* Medusa has TT _MCH cookie */ 596 /* Medusa has TT _MCH cookie */
608 strcat(model, "Medusa"); 597 strcat(model, "Medusa");
609 else if (MACH_IS_HADES)
610 strcat(model, "Hades");
611 else 598 else
612 strcat(model, "TT"); 599 strcat(model, "TT");
613 break; 600 break;
diff --git a/arch/m68k/atari/hades-pci.c b/arch/m68k/atari/hades-pci.c
deleted file mode 100644
index 2bbabc008708..000000000000
--- a/arch/m68k/atari/hades-pci.c
+++ /dev/null
@@ -1,440 +0,0 @@
1/*
2 * hades-pci.c - Hardware specific PCI BIOS functions the Hades Atari clone.
3 *
4 * Written by Wout Klaren.
5 */
6
7#include <linux/init.h>
8#include <linux/kernel.h>
9#include <asm/io.h>
10
11#if 0
12# define DBG_DEVS(args) printk args
13#else
14# define DBG_DEVS(args)
15#endif
16
17#if defined(CONFIG_PCI) && defined(CONFIG_HADES)
18
19#include <linux/slab.h>
20#include <linux/mm.h>
21#include <linux/pci.h>
22
23#include <asm/atarihw.h>
24#include <asm/atariints.h>
25#include <asm/byteorder.h>
26#include <asm/pci.h>
27
28#define HADES_MEM_BASE 0x80000000
29#define HADES_MEM_SIZE 0x20000000
30#define HADES_CONFIG_BASE 0xA0000000
31#define HADES_CONFIG_SIZE 0x10000000
32#define HADES_IO_BASE 0xB0000000
33#define HADES_IO_SIZE 0x10000000
34#define HADES_VIRT_IO_SIZE 0x00010000 /* Only 64k is remapped and actually used. */
35
36#define N_SLOTS 4 /* Number of PCI slots. */
37
38static const char pci_mem_name[] = "PCI memory space";
39static const char pci_io_name[] = "PCI I/O space";
40static const char pci_config_name[] = "PCI config space";
41
42static struct resource config_space = {
43 .name = pci_config_name,
44 .start = HADES_CONFIG_BASE,
45 .end = HADES_CONFIG_BASE + HADES_CONFIG_SIZE - 1
46};
47static struct resource io_space = {
48 .name = pci_io_name,
49 .start = HADES_IO_BASE,
50 .end = HADES_IO_BASE + HADES_IO_SIZE - 1
51};
52
53static const unsigned long pci_conf_base_phys[] = {
54 0xA0080000, 0xA0040000, 0xA0020000, 0xA0010000
55};
56static unsigned long pci_conf_base_virt[N_SLOTS];
57static unsigned long pci_io_base_virt;
58
59/*
60 * static void *mk_conf_addr(unsigned char bus, unsigned char device_fn,
61 * unsigned char where)
62 *
63 * Calculate the address of the PCI configuration area of the given
64 * device.
65 *
66 * BUG: boards with multiple functions are probably not correctly
67 * supported.
68 */
69
70static void *mk_conf_addr(struct pci_dev *dev, int where)
71{
72 int device = dev->devfn >> 3, function = dev->devfn & 7;
73 void *result;
74
75 DBG_DEVS(("mk_conf_addr(bus=%d ,device_fn=0x%x, where=0x%x, pci_addr=0x%p)\n",
76 dev->bus->number, dev->devfn, where, pci_addr));
77
78 if (device > 3)
79 {
80 DBG_DEVS(("mk_conf_addr: device (%d) > 3, returning NULL\n", device));
81 return NULL;
82 }
83
84 if (dev->bus->number != 0)
85 {
86 DBG_DEVS(("mk_conf_addr: bus (%d) > 0, returning NULL\n", device));
87 return NULL;
88 }
89
90 result = (void *) (pci_conf_base_virt[device] | (function << 8) | (where));
91 DBG_DEVS(("mk_conf_addr: returning pci_addr 0x%lx\n", (unsigned long) result));
92 return result;
93}
94
95static int hades_read_config_byte(struct pci_dev *dev, int where, u8 *value)
96{
97 volatile unsigned char *pci_addr;
98
99 *value = 0xff;
100
101 if ((pci_addr = (unsigned char *) mk_conf_addr(dev, where)) == NULL)
102 return PCIBIOS_DEVICE_NOT_FOUND;
103
104 *value = *pci_addr;
105
106 return PCIBIOS_SUCCESSFUL;
107}
108
109static int hades_read_config_word(struct pci_dev *dev, int where, u16 *value)
110{
111 volatile unsigned short *pci_addr;
112
113 *value = 0xffff;
114
115 if (where & 0x1)
116 return PCIBIOS_BAD_REGISTER_NUMBER;
117
118 if ((pci_addr = (unsigned short *) mk_conf_addr(dev, where)) == NULL)
119 return PCIBIOS_DEVICE_NOT_FOUND;
120
121 *value = le16_to_cpu(*pci_addr);
122
123 return PCIBIOS_SUCCESSFUL;
124}
125
126static int hades_read_config_dword(struct pci_dev *dev, int where, u32 *value)
127{
128 volatile unsigned int *pci_addr;
129 unsigned char header_type;
130 int result;
131
132 *value = 0xffffffff;
133
134 if (where & 0x3)
135 return PCIBIOS_BAD_REGISTER_NUMBER;
136
137 if ((pci_addr = (unsigned int *) mk_conf_addr(dev, where)) == NULL)
138 return PCIBIOS_DEVICE_NOT_FOUND;
139
140 *value = le32_to_cpu(*pci_addr);
141
142 /*
143 * Check if the value is an address on the bus. If true, add the
144 * base address of the PCI memory or PCI I/O area on the Hades.
145 */
146
147 if ((result = hades_read_config_byte(dev, PCI_HEADER_TYPE,
148 &header_type)) != PCIBIOS_SUCCESSFUL)
149 return result;
150
151 if (((where >= PCI_BASE_ADDRESS_0) && (where <= PCI_BASE_ADDRESS_1)) ||
152 ((header_type != PCI_HEADER_TYPE_BRIDGE) && ((where >= PCI_BASE_ADDRESS_2) &&
153 (where <= PCI_BASE_ADDRESS_5))))
154 {
155 if ((*value & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO)
156 {
157 /*
158 * Base address register that contains an I/O address. If the
159 * address is valid on the Hades (0 <= *value < HADES_VIRT_IO_SIZE),
160 * add 'pci_io_base_virt' to the value.
161 */
162
163 if (*value < HADES_VIRT_IO_SIZE)
164 *value += pci_io_base_virt;
165 }
166 else
167 {
168 /*
169 * Base address register that contains an memory address. If the
170 * address is valid on the Hades (0 <= *value < HADES_MEM_SIZE),
171 * add HADES_MEM_BASE to the value.
172 */
173
174 if (*value == 0)
175 {
176 /*
177 * Base address is 0. Test if this base
178 * address register is used.
179 */
180
181 *pci_addr = 0xffffffff;
182 if (*pci_addr != 0)
183 {
184 *pci_addr = *value;
185 if (*value < HADES_MEM_SIZE)
186 *value += HADES_MEM_BASE;
187 }
188 }
189 else
190 {
191 if (*value < HADES_MEM_SIZE)
192 *value += HADES_MEM_BASE;
193 }
194 }
195 }
196
197 return PCIBIOS_SUCCESSFUL;
198}
199
200static int hades_write_config_byte(struct pci_dev *dev, int where, u8 value)
201{
202 volatile unsigned char *pci_addr;
203
204 if ((pci_addr = (unsigned char *) mk_conf_addr(dev, where)) == NULL)
205 return PCIBIOS_DEVICE_NOT_FOUND;
206
207 *pci_addr = value;
208
209 return PCIBIOS_SUCCESSFUL;
210}
211
212static int hades_write_config_word(struct pci_dev *dev, int where, u16 value)
213{
214 volatile unsigned short *pci_addr;
215
216 if ((pci_addr = (unsigned short *) mk_conf_addr(dev, where)) == NULL)
217 return PCIBIOS_DEVICE_NOT_FOUND;
218
219 *pci_addr = cpu_to_le16(value);
220
221 return PCIBIOS_SUCCESSFUL;
222}
223
224static int hades_write_config_dword(struct pci_dev *dev, int where, u32 value)
225{
226 volatile unsigned int *pci_addr;
227 unsigned char header_type;
228 int result;
229
230 if ((pci_addr = (unsigned int *) mk_conf_addr(dev, where)) == NULL)
231 return PCIBIOS_DEVICE_NOT_FOUND;
232
233 /*
234 * Check if the value is an address on the bus. If true, subtract the
235 * base address of the PCI memory or PCI I/O area on the Hades.
236 */
237
238 if ((result = hades_read_config_byte(dev, PCI_HEADER_TYPE,
239 &header_type)) != PCIBIOS_SUCCESSFUL)
240 return result;
241
242 if (((where >= PCI_BASE_ADDRESS_0) && (where <= PCI_BASE_ADDRESS_1)) ||
243 ((header_type != PCI_HEADER_TYPE_BRIDGE) && ((where >= PCI_BASE_ADDRESS_2) &&
244 (where <= PCI_BASE_ADDRESS_5))))
245 {
246 if ((value & PCI_BASE_ADDRESS_SPACE) ==
247 PCI_BASE_ADDRESS_SPACE_IO)
248 {
249 /*
250 * I/O address. Check if the address is valid address on
251 * the Hades (pci_io_base_virt <= value < pci_io_base_virt +
252 * HADES_VIRT_IO_SIZE) or if the value is 0xffffffff. If not
253 * true do not write the base address register. If it is a
254 * valid base address subtract 'pci_io_base_virt' from the value.
255 */
256
257 if ((value >= pci_io_base_virt) && (value < (pci_io_base_virt +
258 HADES_VIRT_IO_SIZE)))
259 value -= pci_io_base_virt;
260 else
261 {
262 if (value != 0xffffffff)
263 return PCIBIOS_SET_FAILED;
264 }
265 }
266 else
267 {
268 /*
269 * Memory address. Check if the address is valid address on
270 * the Hades (HADES_MEM_BASE <= value < HADES_MEM_BASE + HADES_MEM_SIZE) or
271 * if the value is 0xffffffff. If not true do not write
272 * the base address register. If it is a valid base address
273 * subtract HADES_MEM_BASE from the value.
274 */
275
276 if ((value >= HADES_MEM_BASE) && (value < (HADES_MEM_BASE + HADES_MEM_SIZE)))
277 value -= HADES_MEM_BASE;
278 else
279 {
280 if (value != 0xffffffff)
281 return PCIBIOS_SET_FAILED;
282 }
283 }
284 }
285
286 *pci_addr = cpu_to_le32(value);
287
288 return PCIBIOS_SUCCESSFUL;
289}
290
291/*
292 * static inline void hades_fixup(void)
293 *
294 * Assign IRQ numbers as used by Linux to the interrupt pins
295 * of the PCI cards.
296 */
297
298static void __init hades_fixup(int pci_modify)
299{
300 char irq_tab[4] = {
301 [0] = IRQ_TT_MFP_IO0, /* Slot 0. */
302 [1] = IRQ_TT_MFP_IO1, /* Slot 1. */
303 [2] = IRQ_TT_MFP_SCC, /* Slot 2. */
304 [3] = IRQ_TT_MFP_SCSIDMA /* Slot 3. */
305 };
306 struct pci_dev *dev = NULL;
307 unsigned char slot;
308
309 /*
310 * Go through all devices, fixing up irqs as we see fit:
311 */
312
313 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL)
314 {
315 if (dev->class >> 16 != PCI_BASE_CLASS_BRIDGE)
316 {
317 slot = PCI_SLOT(dev->devfn); /* Determine slot number. */
318 dev->irq = irq_tab[slot];
319 if (pci_modify)
320 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
321 }
322 }
323}
324
325/*
326 * static void hades_conf_device(struct pci_dev *dev)
327 *
328 * Machine dependent Configure the given device.
329 *
330 * Parameters:
331 *
332 * dev - the pci device.
333 */
334
335static void __init hades_conf_device(struct pci_dev *dev)
336{
337 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 0);
338}
339
340static struct pci_ops hades_pci_ops = {
341 .read_byte = hades_read_config_byte,
342 .read_word = hades_read_config_word,
343 .read_dword = hades_read_config_dword,
344 .write_byte = hades_write_config_byte,
345 .write_word = hades_write_config_word,
346 .write_dword = hades_write_config_dword
347};
348
349/*
350 * struct pci_bus_info *init_hades_pci(void)
351 *
352 * Machine specific initialisation:
353 *
354 * - Allocate and initialise a 'pci_bus_info' structure
355 * - Initialise hardware
356 *
357 * Result: pointer to 'pci_bus_info' structure.
358 */
359
360struct pci_bus_info * __init init_hades_pci(void)
361{
362 struct pci_bus_info *bus;
363 int i;
364
365 /*
366 * Remap I/O and configuration space.
367 */
368
369 pci_io_base_virt = (unsigned long) ioremap(HADES_IO_BASE, HADES_VIRT_IO_SIZE);
370
371 for (i = 0; i < N_SLOTS; i++)
372 pci_conf_base_virt[i] = (unsigned long) ioremap(pci_conf_base_phys[i], 0x10000);
373
374 /*
375 * Allocate memory for bus info structure.
376 */
377
378 bus = kzalloc(sizeof(struct pci_bus_info), GFP_KERNEL);
379 if (unlikely(!bus))
380 goto iounmap_base_virt;
381
382 /*
383 * Claim resources. The m68k has no separate I/O space, both
384 * PCI memory space and PCI I/O space are in memory space. Therefore
385 * the I/O resources are requested in memory space as well.
386 */
387
388 if (unlikely(request_resource(&iomem_resource, &config_space) != 0))
389 goto free_bus;
390
391 if (unlikely(request_resource(&iomem_resource, &io_space) != 0))
392 goto release_config_space;
393
394 bus->mem_space.start = HADES_MEM_BASE;
395 bus->mem_space.end = HADES_MEM_BASE + HADES_MEM_SIZE - 1;
396 bus->mem_space.name = pci_mem_name;
397#if 1
398 if (unlikely(request_resource(&iomem_resource, &bus->mem_space) != 0))
399 goto release_io_space;
400#endif
401 bus->io_space.start = pci_io_base_virt;
402 bus->io_space.end = pci_io_base_virt + HADES_VIRT_IO_SIZE - 1;
403 bus->io_space.name = pci_io_name;
404#if 1
405 if (unlikely(request_resource(&ioport_resource, &bus->io_space) != 0))
406 goto release_bus_mem_space;
407#endif
408 /*
409 * Set hardware dependent functions.
410 */
411
412 bus->m68k_pci_ops = &hades_pci_ops;
413 bus->fixup = hades_fixup;
414 bus->conf_device = hades_conf_device;
415
416 /*
417 * Select high to low edge for PCI interrupts.
418 */
419
420 tt_mfp.active_edge &= ~0x27;
421
422 return bus;
423
424release_bus_mem_space:
425 release_resource(&bus->mem_space);
426release_io_space:
427 release_resource(&io_space);
428release_config_space:
429 release_resource(&config_space);
430free_bus:
431 kfree(bus);
432iounmap_base_virt:
433 iounmap((void *)pci_io_base_virt);
434
435 for (i = 0; i < N_SLOTS; i++)
436 iounmap((void *)pci_conf_base_virt[i]);
437
438 return NULL;
439}
440#endif
diff --git a/arch/m68k/atari/time.c b/arch/m68k/atari/time.c
index e0d3c8bfb408..1edde27fa32d 100644
--- a/arch/m68k/atari/time.c
+++ b/arch/m68k/atari/time.c
@@ -20,6 +20,9 @@
20 20
21#include <asm/atariints.h> 21#include <asm/atariints.h>
22 22
23DEFINE_SPINLOCK(rtc_lock);
24EXPORT_SYMBOL_GPL(rtc_lock);
25
23void __init 26void __init
24atari_sched_init(irq_handler_t timer_routine) 27atari_sched_init(irq_handler_t timer_routine)
25{ 28{
@@ -191,13 +194,14 @@ int atari_tt_hwclk( int op, struct rtc_time *t )
191 } 194 }
192 195
193 if (!(ctrl & RTC_DM_BINARY)) { 196 if (!(ctrl & RTC_DM_BINARY)) {
194 BIN_TO_BCD(sec); 197 sec = bin2bcd(sec);
195 BIN_TO_BCD(min); 198 min = bin2bcd(min);
196 BIN_TO_BCD(hour); 199 hour = bin2bcd(hour);
197 BIN_TO_BCD(day); 200 day = bin2bcd(day);
198 BIN_TO_BCD(mon); 201 mon = bin2bcd(mon);
199 BIN_TO_BCD(year); 202 year = bin2bcd(year);
200 if (wday >= 0) BIN_TO_BCD(wday); 203 if (wday >= 0)
204 wday = bin2bcd(wday);
201 } 205 }
202 } 206 }
203 207
@@ -252,13 +256,13 @@ int atari_tt_hwclk( int op, struct rtc_time *t )
252 } 256 }
253 257
254 if (!(ctrl & RTC_DM_BINARY)) { 258 if (!(ctrl & RTC_DM_BINARY)) {
255 BCD_TO_BIN(sec); 259 sec = bcd2bin(sec);
256 BCD_TO_BIN(min); 260 min = bcd2bin(min);
257 BCD_TO_BIN(hour); 261 hour = bcd2bin(hour);
258 BCD_TO_BIN(day); 262 day = bcd2bin(day);
259 BCD_TO_BIN(mon); 263 mon = bcd2bin(mon);
260 BCD_TO_BIN(year); 264 year = bcd2bin(year);
261 BCD_TO_BIN(wday); 265 wday = bcd2bin(wday);
262 } 266 }
263 267
264 if (!(ctrl & RTC_24H)) { 268 if (!(ctrl & RTC_24H)) {
@@ -318,7 +322,7 @@ int atari_tt_set_clock_mmss (unsigned long nowtime)
318 322
319 rtc_minutes = RTC_READ (RTC_MINUTES); 323 rtc_minutes = RTC_READ (RTC_MINUTES);
320 if (!(save_control & RTC_DM_BINARY)) 324 if (!(save_control & RTC_DM_BINARY))
321 BCD_TO_BIN (rtc_minutes); 325 rtc_minutes = bcd2bin(rtc_minutes);
322 326
323 /* Since we're only adjusting minutes and seconds, don't interfere 327 /* Since we're only adjusting minutes and seconds, don't interfere
324 with hour overflow. This avoids messing with unknown time zones 328 with hour overflow. This avoids messing with unknown time zones
@@ -329,8 +333,8 @@ int atari_tt_set_clock_mmss (unsigned long nowtime)
329 { 333 {
330 if (!(save_control & RTC_DM_BINARY)) 334 if (!(save_control & RTC_DM_BINARY))
331 { 335 {
332 BIN_TO_BCD (real_seconds); 336 real_seconds = bin2bcd(real_seconds);
333 BIN_TO_BCD (real_minutes); 337 real_minutes = bin2bcd(real_minutes);
334 } 338 }
335 RTC_WRITE (RTC_SECONDS, real_seconds); 339 RTC_WRITE (RTC_SECONDS, real_seconds);
336 RTC_WRITE (RTC_MINUTES, real_minutes); 340 RTC_WRITE (RTC_MINUTES, real_minutes);
diff --git a/arch/m68k/bvme6000/config.c b/arch/m68k/bvme6000/config.c
index 9433a88a33c4..65c9204ab9ac 100644
--- a/arch/m68k/bvme6000/config.c
+++ b/arch/m68k/bvme6000/config.c
@@ -25,6 +25,7 @@
25#include <linux/genhd.h> 25#include <linux/genhd.h>
26#include <linux/rtc.h> 26#include <linux/rtc.h>
27#include <linux/interrupt.h> 27#include <linux/interrupt.h>
28#include <linux/bcd.h>
28 29
29#include <asm/bootinfo.h> 30#include <asm/bootinfo.h>
30#include <asm/system.h> 31#include <asm/system.h>
@@ -46,9 +47,6 @@ extern void bvme6000_reset (void);
46extern void bvme6000_waitbut(void); 47extern void bvme6000_waitbut(void);
47void bvme6000_set_vectors (void); 48void bvme6000_set_vectors (void);
48 49
49static unsigned char bcd2bin (unsigned char b);
50static unsigned char bin2bcd (unsigned char b);
51
52/* Save tick handler routine pointer, will point to do_timer() in 50/* Save tick handler routine pointer, will point to do_timer() in
53 * kernel/sched.c, called via bvme6000_process_int() */ 51 * kernel/sched.c, called via bvme6000_process_int() */
54 52
@@ -264,17 +262,6 @@ unsigned long bvme6000_gettimeoffset (void)
264 return v; 262 return v;
265} 263}
266 264
267static unsigned char bcd2bin (unsigned char b)
268{
269 return ((b>>4)*10 + (b&15));
270}
271
272static unsigned char bin2bcd (unsigned char b)
273{
274 return (((b/10)*16) + (b%10));
275}
276
277
278/* 265/*
279 * Looks like op is non-zero for setting the clock, and zero for 266 * Looks like op is non-zero for setting the clock, and zero for
280 * reading the clock. 267 * reading the clock.
diff --git a/arch/m68k/bvme6000/rtc.c b/arch/m68k/bvme6000/rtc.c
index e8ac3f7d72df..808c9018b115 100644
--- a/arch/m68k/bvme6000/rtc.c
+++ b/arch/m68k/bvme6000/rtc.c
@@ -57,16 +57,16 @@ static int rtc_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
57 rtc->msr = 0x40; 57 rtc->msr = 0x40;
58 memset(&wtime, 0, sizeof(struct rtc_time)); 58 memset(&wtime, 0, sizeof(struct rtc_time));
59 do { 59 do {
60 wtime.tm_sec = BCD2BIN(rtc->bcd_sec); 60 wtime.tm_sec = bcd2bin(rtc->bcd_sec);
61 wtime.tm_min = BCD2BIN(rtc->bcd_min); 61 wtime.tm_min = bcd2bin(rtc->bcd_min);
62 wtime.tm_hour = BCD2BIN(rtc->bcd_hr); 62 wtime.tm_hour = bcd2bin(rtc->bcd_hr);
63 wtime.tm_mday = BCD2BIN(rtc->bcd_dom); 63 wtime.tm_mday = bcd2bin(rtc->bcd_dom);
64 wtime.tm_mon = BCD2BIN(rtc->bcd_mth)-1; 64 wtime.tm_mon = bcd2bin(rtc->bcd_mth)-1;
65 wtime.tm_year = BCD2BIN(rtc->bcd_year); 65 wtime.tm_year = bcd2bin(rtc->bcd_year);
66 if (wtime.tm_year < 70) 66 if (wtime.tm_year < 70)
67 wtime.tm_year += 100; 67 wtime.tm_year += 100;
68 wtime.tm_wday = BCD2BIN(rtc->bcd_dow)-1; 68 wtime.tm_wday = bcd2bin(rtc->bcd_dow)-1;
69 } while (wtime.tm_sec != BCD2BIN(rtc->bcd_sec)); 69 } while (wtime.tm_sec != bcd2bin(rtc->bcd_sec));
70 rtc->msr = msr; 70 rtc->msr = msr;
71 local_irq_restore(flags); 71 local_irq_restore(flags);
72 return copy_to_user(argp, &wtime, sizeof wtime) ? 72 return copy_to_user(argp, &wtime, sizeof wtime) ?
@@ -114,14 +114,14 @@ static int rtc_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
114 114
115 rtc->t0cr_rtmr = yrs%4; 115 rtc->t0cr_rtmr = yrs%4;
116 rtc->bcd_tenms = 0; 116 rtc->bcd_tenms = 0;
117 rtc->bcd_sec = BIN2BCD(sec); 117 rtc->bcd_sec = bin2bcd(sec);
118 rtc->bcd_min = BIN2BCD(min); 118 rtc->bcd_min = bin2bcd(min);
119 rtc->bcd_hr = BIN2BCD(hrs); 119 rtc->bcd_hr = bin2bcd(hrs);
120 rtc->bcd_dom = BIN2BCD(day); 120 rtc->bcd_dom = bin2bcd(day);
121 rtc->bcd_mth = BIN2BCD(mon); 121 rtc->bcd_mth = bin2bcd(mon);
122 rtc->bcd_year = BIN2BCD(yrs%100); 122 rtc->bcd_year = bin2bcd(yrs%100);
123 if (rtc_tm.tm_wday >= 0) 123 if (rtc_tm.tm_wday >= 0)
124 rtc->bcd_dow = BIN2BCD(rtc_tm.tm_wday+1); 124 rtc->bcd_dow = bin2bcd(rtc_tm.tm_wday+1);
125 rtc->t0cr_rtmr = yrs%4 | 0x08; 125 rtc->t0cr_rtmr = yrs%4 | 0x08;
126 126
127 rtc->msr = msr; 127 rtc->msr = msr;
diff --git a/arch/m68k/kernel/Makefile b/arch/m68k/kernel/Makefile
index 3a7f62225504..55d5d6b680a2 100644
--- a/arch/m68k/kernel/Makefile
+++ b/arch/m68k/kernel/Makefile
@@ -14,5 +14,4 @@ obj-y := entry.o process.o traps.o ints.o signal.o ptrace.o module.o \
14 14
15devres-y = ../../../kernel/irq/devres.o 15devres-y = ../../../kernel/irq/devres.o
16 16
17obj-$(CONFIG_PCI) += bios32.o
18obj-y$(CONFIG_MMU_SUN3) += dma.o # no, it's not a typo 17obj-y$(CONFIG_MMU_SUN3) += dma.o # no, it's not a typo
diff --git a/arch/m68k/kernel/bios32.c b/arch/m68k/kernel/bios32.c
deleted file mode 100644
index af170c2be735..000000000000
--- a/arch/m68k/kernel/bios32.c
+++ /dev/null
@@ -1,514 +0,0 @@
1/*
2 * bios32.c - PCI BIOS functions for m68k systems.
3 *
4 * Written by Wout Klaren.
5 *
6 * Based on the DEC Alpha bios32.c by Dave Rusling and David Mosberger.
7 */
8
9#include <linux/init.h>
10#include <linux/kernel.h>
11
12#if 0
13# define DBG_DEVS(args) printk args
14#else
15# define DBG_DEVS(args)
16#endif
17
18#ifdef CONFIG_PCI
19
20/*
21 * PCI support for Linux/m68k. Currently only the Hades is supported.
22 *
23 * The support for PCI bridges in the DEC Alpha version has
24 * been removed in this version.
25 */
26
27#include <linux/pci.h>
28#include <linux/slab.h>
29#include <linux/mm.h>
30
31#include <asm/io.h>
32#include <asm/pci.h>
33#include <asm/uaccess.h>
34
35#define KB 1024
36#define MB (1024*KB)
37#define GB (1024*MB)
38
39#define MAJOR_REV 0
40#define MINOR_REV 5
41
42/*
43 * Align VAL to ALIGN, which must be a power of two.
44 */
45
46#define ALIGN(val,align) (((val) + ((align) - 1)) & ~((align) - 1))
47
48/*
49 * Offsets relative to the I/O and memory base addresses from where resources
50 * are allocated.
51 */
52
53#define IO_ALLOC_OFFSET 0x00004000
54#define MEM_ALLOC_OFFSET 0x04000000
55
56/*
57 * Declarations of hardware specific initialisation functions.
58 */
59
60extern struct pci_bus_info *init_hades_pci(void);
61
62/*
63 * Bus info structure of the PCI bus. A pointer to this structure is
64 * put in the sysdata member of the pci_bus structure.
65 */
66
67static struct pci_bus_info *bus_info;
68
69static int pci_modify = 1; /* If set, layout the PCI bus ourself. */
70static int skip_vga; /* If set do not modify base addresses
71 of vga cards.*/
72static int disable_pci_burst; /* If set do not allow PCI bursts. */
73
74static unsigned int io_base;
75static unsigned int mem_base;
76
77/*
78 * static void disable_dev(struct pci_dev *dev)
79 *
80 * Disable PCI device DEV so that it does not respond to I/O or memory
81 * accesses.
82 *
83 * Parameters:
84 *
85 * dev - device to disable.
86 */
87
88static void __init disable_dev(struct pci_dev *dev)
89{
90 unsigned short cmd;
91
92 if (((dev->class >> 8 == PCI_CLASS_NOT_DEFINED_VGA) ||
93 (dev->class >> 8 == PCI_CLASS_DISPLAY_VGA) ||
94 (dev->class >> 8 == PCI_CLASS_DISPLAY_XGA)) && skip_vga)
95 return;
96
97 pci_read_config_word(dev, PCI_COMMAND, &cmd);
98
99 cmd &= (~PCI_COMMAND_IO & ~PCI_COMMAND_MEMORY & ~PCI_COMMAND_MASTER);
100 pci_write_config_word(dev, PCI_COMMAND, cmd);
101}
102
103/*
104 * static void layout_dev(struct pci_dev *dev)
105 *
106 * Layout memory and I/O for a device.
107 *
108 * Parameters:
109 *
110 * device - device to layout memory and I/O for.
111 */
112
113static void __init layout_dev(struct pci_dev *dev)
114{
115 unsigned short cmd;
116 unsigned int base, mask, size, reg;
117 unsigned int alignto;
118 int i;
119
120 /*
121 * Skip video cards if requested.
122 */
123
124 if (((dev->class >> 8 == PCI_CLASS_NOT_DEFINED_VGA) ||
125 (dev->class >> 8 == PCI_CLASS_DISPLAY_VGA) ||
126 (dev->class >> 8 == PCI_CLASS_DISPLAY_XGA)) && skip_vga)
127 return;
128
129 pci_read_config_word(dev, PCI_COMMAND, &cmd);
130
131 for (reg = PCI_BASE_ADDRESS_0, i = 0; reg <= PCI_BASE_ADDRESS_5; reg += 4, i++)
132 {
133 /*
134 * Figure out how much space and of what type this
135 * device wants.
136 */
137
138 pci_write_config_dword(dev, reg, 0xffffffff);
139 pci_read_config_dword(dev, reg, &base);
140
141 if (!base)
142 {
143 /* this base-address register is unused */
144 dev->resource[i].start = 0;
145 dev->resource[i].end = 0;
146 dev->resource[i].flags = 0;
147 continue;
148 }
149
150 /*
151 * We've read the base address register back after
152 * writing all ones and so now we must decode it.
153 */
154
155 if (base & PCI_BASE_ADDRESS_SPACE_IO)
156 {
157 /*
158 * I/O space base address register.
159 */
160
161 cmd |= PCI_COMMAND_IO;
162
163 base &= PCI_BASE_ADDRESS_IO_MASK;
164 mask = (~base << 1) | 0x1;
165 size = (mask & base) & 0xffffffff;
166
167 /*
168 * Align to multiple of size of minimum base.
169 */
170
171 alignto = max_t(unsigned int, 0x040, size);
172 base = ALIGN(io_base, alignto);
173 io_base = base + size;
174 pci_write_config_dword(dev, reg, base | PCI_BASE_ADDRESS_SPACE_IO);
175
176 dev->resource[i].start = base;
177 dev->resource[i].end = dev->resource[i].start + size - 1;
178 dev->resource[i].flags = IORESOURCE_IO | PCI_BASE_ADDRESS_SPACE_IO;
179
180 DBG_DEVS(("layout_dev: IO address: %lX\n", base));
181 }
182 else
183 {
184 unsigned int type;
185
186 /*
187 * Memory space base address register.
188 */
189
190 cmd |= PCI_COMMAND_MEMORY;
191 type = base & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
192 base &= PCI_BASE_ADDRESS_MEM_MASK;
193 mask = (~base << 1) | 0x1;
194 size = (mask & base) & 0xffffffff;
195 switch (type)
196 {
197 case PCI_BASE_ADDRESS_MEM_TYPE_32:
198 case PCI_BASE_ADDRESS_MEM_TYPE_64:
199 break;
200
201 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
202 printk("bios32 WARNING: slot %d, function %d "
203 "requests memory below 1MB---don't "
204 "know how to do that.\n",
205 PCI_SLOT(dev->devfn),
206 PCI_FUNC(dev->devfn));
207 continue;
208 }
209
210 /*
211 * Align to multiple of size of minimum base.
212 */
213
214 alignto = max_t(unsigned int, 0x1000, size);
215 base = ALIGN(mem_base, alignto);
216 mem_base = base + size;
217 pci_write_config_dword(dev, reg, base);
218
219 dev->resource[i].start = base;
220 dev->resource[i].end = dev->resource[i].start + size - 1;
221 dev->resource[i].flags = IORESOURCE_MEM;
222
223 if (type == PCI_BASE_ADDRESS_MEM_TYPE_64)
224 {
225 /*
226 * 64-bit address, set the highest 32 bits
227 * to zero.
228 */
229
230 reg += 4;
231 pci_write_config_dword(dev, reg, 0);
232
233 i++;
234 dev->resource[i].start = 0;
235 dev->resource[i].end = 0;
236 dev->resource[i].flags = 0;
237 }
238 }
239 }
240
241 /*
242 * Enable device:
243 */
244
245 if (dev->class >> 8 == PCI_CLASS_NOT_DEFINED ||
246 dev->class >> 8 == PCI_CLASS_NOT_DEFINED_VGA ||
247 dev->class >> 8 == PCI_CLASS_DISPLAY_VGA ||
248 dev->class >> 8 == PCI_CLASS_DISPLAY_XGA)
249 {
250 /*
251 * All of these (may) have I/O scattered all around
252 * and may not use i/o-base address registers at all.
253 * So we just have to always enable I/O to these
254 * devices.
255 */
256 cmd |= PCI_COMMAND_IO;
257 }
258
259 pci_write_config_word(dev, PCI_COMMAND, cmd | PCI_COMMAND_MASTER);
260
261 pci_write_config_byte(dev, PCI_LATENCY_TIMER, (disable_pci_burst) ? 0 : 32);
262
263 if (bus_info != NULL)
264 bus_info->conf_device(dev); /* Machine dependent configuration. */
265
266 DBG_DEVS(("layout_dev: bus %d slot 0x%x VID 0x%x DID 0x%x class 0x%x\n",
267 dev->bus->number, PCI_SLOT(dev->devfn), dev->vendor, dev->device, dev->class));
268}
269
270/*
271 * static void layout_bus(struct pci_bus *bus)
272 *
273 * Layout memory and I/O for all devices on the given bus.
274 *
275 * Parameters:
276 *
277 * bus - bus.
278 */
279
280static void __init layout_bus(struct pci_bus *bus)
281{
282 unsigned int bio, bmem;
283 struct pci_dev *dev;
284
285 DBG_DEVS(("layout_bus: starting bus %d\n", bus->number));
286
287 if (!bus->devices && !bus->children)
288 return;
289
290 /*
291 * Align the current bases on appropriate boundaries (4K for
292 * IO and 1MB for memory).
293 */
294
295 bio = io_base = ALIGN(io_base, 4*KB);
296 bmem = mem_base = ALIGN(mem_base, 1*MB);
297
298 /*
299 * PCI devices might have been setup by a PCI BIOS emulation
300 * running under TOS. In these cases there is a
301 * window during which two devices may have an overlapping
302 * address range. To avoid this causing trouble, we first
303 * turn off the I/O and memory address decoders for all PCI
304 * devices. They'll be re-enabled only once all address
305 * decoders are programmed consistently.
306 */
307
308 DBG_DEVS(("layout_bus: disable_dev for bus %d\n", bus->number));
309
310 for (dev = bus->devices; dev; dev = dev->sibling)
311 {
312 if ((dev->class >> 16 != PCI_BASE_CLASS_BRIDGE) ||
313 (dev->class >> 8 == PCI_CLASS_BRIDGE_PCMCIA))
314 disable_dev(dev);
315 }
316
317 /*
318 * Allocate space to each device:
319 */
320
321 DBG_DEVS(("layout_bus: starting bus %d devices\n", bus->number));
322
323 for (dev = bus->devices; dev; dev = dev->sibling)
324 {
325 if ((dev->class >> 16 != PCI_BASE_CLASS_BRIDGE) ||
326 (dev->class >> 8 == PCI_CLASS_BRIDGE_PCMCIA))
327 layout_dev(dev);
328 }
329
330 DBG_DEVS(("layout_bus: bus %d finished\n", bus->number));
331}
332
333/*
334 * static void pcibios_fixup(void)
335 *
336 * Layout memory and I/O of all devices on the PCI bus if 'pci_modify' is
337 * true. This might be necessary because not every m68k machine with a PCI
338 * bus has a PCI BIOS. This function should be called right after
339 * pci_scan_bus() in pcibios_init().
340 */
341
342static void __init pcibios_fixup(void)
343{
344 if (pci_modify)
345 {
346 /*
347 * Set base addresses for allocation of I/O and memory space.
348 */
349
350 io_base = bus_info->io_space.start + IO_ALLOC_OFFSET;
351 mem_base = bus_info->mem_space.start + MEM_ALLOC_OFFSET;
352
353 /*
354 * Scan the tree, allocating PCI memory and I/O space.
355 */
356
357 layout_bus(pci_bus_b(pci_root.next));
358 }
359
360 /*
361 * Fix interrupt assignments, etc.
362 */
363
364 bus_info->fixup(pci_modify);
365}
366
367/*
368 * static void pcibios_claim_resources(struct pci_bus *bus)
369 *
370 * Claim all resources that are assigned to devices on the given bus.
371 *
372 * Parameters:
373 *
374 * bus - bus.
375 */
376
377static void __init pcibios_claim_resources(struct pci_bus *bus)
378{
379 struct pci_dev *dev;
380 int i;
381
382 while (bus)
383 {
384 for (dev = bus->devices; (dev != NULL); dev = dev->sibling)
385 {
386 for (i = 0; i < PCI_NUM_RESOURCES; i++)
387 {
388 struct resource *r = &dev->resource[i];
389 struct resource *pr;
390 struct pci_bus_info *bus_info = (struct pci_bus_info *) dev->sysdata;
391
392 if ((r->start == 0) || (r->parent != NULL))
393 continue;
394#if 1
395 if (r->flags & IORESOURCE_IO)
396 pr = &bus_info->io_space;
397 else
398 pr = &bus_info->mem_space;
399#else
400 if (r->flags & IORESOURCE_IO)
401 pr = &ioport_resource;
402 else
403 pr = &iomem_resource;
404#endif
405 if (request_resource(pr, r) < 0)
406 {
407 printk(KERN_ERR "PCI: Address space collision on region %d of device %s\n", i, dev->name);
408 }
409 }
410 }
411
412 if (bus->children)
413 pcibios_claim_resources(bus->children);
414
415 bus = bus->next;
416 }
417}
418
419/*
420 * int pcibios_assign_resource(struct pci_dev *dev, int i)
421 *
422 * Assign a new address to a PCI resource.
423 *
424 * Parameters:
425 *
426 * dev - device.
427 * i - resource.
428 *
429 * Result: 0 if successful.
430 */
431
432int __init pcibios_assign_resource(struct pci_dev *dev, int i)
433{
434 struct resource *r = &dev->resource[i];
435 struct resource *pr = pci_find_parent_resource(dev, r);
436 unsigned long size = r->end + 1;
437
438 if (!pr)
439 return -EINVAL;
440
441 if (r->flags & IORESOURCE_IO)
442 {
443 if (size > 0x100)
444 return -EFBIG;
445
446 if (allocate_resource(pr, r, size, bus_info->io_space.start +
447 IO_ALLOC_OFFSET, bus_info->io_space.end, 1024))
448 return -EBUSY;
449 }
450 else
451 {
452 if (allocate_resource(pr, r, size, bus_info->mem_space.start +
453 MEM_ALLOC_OFFSET, bus_info->mem_space.end, size))
454 return -EBUSY;
455 }
456
457 if (i < 6)
458 pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + 4 * i, r->start);
459
460 return 0;
461}
462
463void __init pcibios_fixup_bus(struct pci_bus *bus)
464{
465 struct pci_dev *dev;
466 void *sysdata;
467
468 sysdata = (bus->parent) ? bus->parent->sysdata : bus->sysdata;
469
470 for (dev = bus->devices; (dev != NULL); dev = dev->sibling)
471 dev->sysdata = sysdata;
472}
473
474void __init pcibios_init(void)
475{
476 printk("Linux/m68k PCI BIOS32 revision %x.%02x\n", MAJOR_REV, MINOR_REV);
477
478 bus_info = NULL;
479#ifdef CONFIG_HADES
480 if (MACH_IS_HADES)
481 bus_info = init_hades_pci();
482#endif
483 if (bus_info != NULL)
484 {
485 printk("PCI: Probing PCI hardware\n");
486 pci_scan_bus(0, bus_info->m68k_pci_ops, bus_info);
487 pcibios_fixup();
488 pcibios_claim_resources(pci_root);
489 }
490 else
491 printk("PCI: No PCI bus detected\n");
492}
493
494char * __init pcibios_setup(char *str)
495{
496 if (!strcmp(str, "nomodify"))
497 {
498 pci_modify = 0;
499 return NULL;
500 }
501 else if (!strcmp(str, "skipvga"))
502 {
503 skip_vga = 1;
504 return NULL;
505 }
506 else if (!strcmp(str, "noburst"))
507 {
508 disable_pci_burst = 1;
509 return NULL;
510 }
511
512 return str;
513}
514#endif /* CONFIG_PCI */
diff --git a/arch/m68k/kernel/dma.c b/arch/m68k/kernel/dma.c
index 6f8c080dd9f9..2bb4245404d8 100644
--- a/arch/m68k/kernel/dma.c
+++ b/arch/m68k/kernel/dma.c
@@ -66,8 +66,8 @@ void dma_free_coherent(struct device *dev, size_t size,
66} 66}
67EXPORT_SYMBOL(dma_free_coherent); 67EXPORT_SYMBOL(dma_free_coherent);
68 68
69inline void dma_sync_single_for_device(struct device *dev, dma_addr_t handle, size_t size, 69void dma_sync_single_for_device(struct device *dev, dma_addr_t handle,
70 enum dma_data_direction dir) 70 size_t size, enum dma_data_direction dir)
71{ 71{
72 switch (dir) { 72 switch (dir) {
73 case DMA_TO_DEVICE: 73 case DMA_TO_DEVICE:
diff --git a/arch/m68k/kernel/ints.c b/arch/m68k/kernel/ints.c
index ded7dd2f67b2..7e8a0d394e61 100644
--- a/arch/m68k/kernel/ints.c
+++ b/arch/m68k/kernel/ints.c
@@ -429,8 +429,9 @@ int show_interrupts(struct seq_file *p, void *v)
429 return 0; 429 return 0;
430} 430}
431 431
432#ifdef CONFIG_PROC_FS
432void init_irq_proc(void) 433void init_irq_proc(void)
433{ 434{
434 /* Insert /proc/irq driver here */ 435 /* Insert /proc/irq driver here */
435} 436}
436 437#endif
diff --git a/arch/m68k/kernel/process.c b/arch/m68k/kernel/process.c
index 7888cdf91f5d..3042c2bc8c58 100644
--- a/arch/m68k/kernel/process.c
+++ b/arch/m68k/kernel/process.c
@@ -78,7 +78,7 @@ unsigned long thread_saved_pc(struct task_struct *tsk)
78static void default_idle(void) 78static void default_idle(void)
79{ 79{
80 if (!need_resched()) 80 if (!need_resched())
81#if defined(MACH_ATARI_ONLY) && !defined(CONFIG_HADES) 81#if defined(MACH_ATARI_ONLY)
82 /* block out HSYNC on the atari (falcon) */ 82 /* block out HSYNC on the atari (falcon) */
83 __asm__("stop #0x2200" : : : "cc"); 83 __asm__("stop #0x2200" : : : "cc");
84#else 84#else
diff --git a/arch/m68k/kernel/traps.c b/arch/m68k/kernel/traps.c
index 75b8340b254b..6d813de2baf1 100644
--- a/arch/m68k/kernel/traps.c
+++ b/arch/m68k/kernel/traps.c
@@ -883,8 +883,7 @@ void show_trace(unsigned long *stack)
883 if (i % 5 == 0) 883 if (i % 5 == 0)
884 printk("\n "); 884 printk("\n ");
885#endif 885#endif
886 printk(" [<%08lx>]", addr); 886 printk(" [<%08lx>] %pS\n", addr, (void *)addr);
887 print_symbol(" %s\n", addr);
888 i++; 887 i++;
889 } 888 }
890 } 889 }
@@ -900,10 +899,8 @@ void show_registers(struct pt_regs *regs)
900 int i; 899 int i;
901 900
902 print_modules(); 901 print_modules();
903 printk("PC: [<%08lx>]",regs->pc); 902 printk("PC: [<%08lx>] %pS\n", regs->pc, (void *)regs->pc);
904 print_symbol(" %s", regs->pc); 903 printk("SR: %04x SP: %p a2: %08lx\n", regs->sr, regs, regs->a2);
905 printk("\nSR: %04x SP: %p a2: %08lx\n",
906 regs->sr, regs, regs->a2);
907 printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n", 904 printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n",
908 regs->d0, regs->d1, regs->d2, regs->d3); 905 regs->d0, regs->d1, regs->d2, regs->d3);
909 printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n", 906 printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n",
diff --git a/arch/m68k/kernel/vmlinux-std.lds b/arch/m68k/kernel/vmlinux-std.lds
index 99b0784c0552..f846d4e3e5e1 100644
--- a/arch/m68k/kernel/vmlinux-std.lds
+++ b/arch/m68k/kernel/vmlinux-std.lds
@@ -34,10 +34,10 @@ SECTIONS
34 CONSTRUCTORS 34 CONSTRUCTORS
35 } 35 }
36 36
37 .bss : { *(.bss) } /* BSS */
38
39 . = ALIGN(16); 37 . = ALIGN(16);
40 .data.cacheline_aligned : { *(.data.cacheline_aligned) } :data 38 .data.cacheline_aligned : { *(.data.cacheline_aligned) }
39
40 .bss : { *(.bss) } /* BSS */
41 41
42 _edata = .; /* End of data section */ 42 _edata = .; /* End of data section */
43 43
@@ -48,7 +48,7 @@ SECTIONS
48 _sinittext = .; 48 _sinittext = .;
49 INIT_TEXT 49 INIT_TEXT
50 _einittext = .; 50 _einittext = .;
51 } 51 } :data
52 .init.data : { INIT_DATA } 52 .init.data : { INIT_DATA }
53 . = ALIGN(16); 53 . = ALIGN(16);
54 __setup_start = .; 54 __setup_start = .;
@@ -74,6 +74,7 @@ SECTIONS
74 .init.ramfs : { *(.init.ramfs) } 74 .init.ramfs : { *(.init.ramfs) }
75 __initramfs_end = .; 75 __initramfs_end = .;
76#endif 76#endif
77 NOTES
77 . = ALIGN(8192); 78 . = ALIGN(8192);
78 __init_end = .; 79 __init_end = .;
79 80
diff --git a/arch/m68k/mm/kmap.c b/arch/m68k/mm/kmap.c
index 46b7d6035aab..df620ac2a296 100644
--- a/arch/m68k/mm/kmap.c
+++ b/arch/m68k/mm/kmap.c
@@ -66,8 +66,10 @@ static struct vm_struct *get_io_area(unsigned long size)
66 for (p = &iolist; (tmp = *p) ; p = &tmp->next) { 66 for (p = &iolist; (tmp = *p) ; p = &tmp->next) {
67 if (size + addr < (unsigned long)tmp->addr) 67 if (size + addr < (unsigned long)tmp->addr)
68 break; 68 break;
69 if (addr > KMAP_END-size) 69 if (addr > KMAP_END-size) {
70 kfree(area);
70 return NULL; 71 return NULL;
72 }
71 addr = tmp->size + (unsigned long)tmp->addr; 73 addr = tmp->size + (unsigned long)tmp->addr;
72 } 74 }
73 area->addr = (void *)addr; 75 area->addr = (void *)addr;
diff --git a/arch/m68k/mvme16x/rtc.c b/arch/m68k/mvme16x/rtc.c
index 432a9f13b2ed..cea5e3e4e636 100644
--- a/arch/m68k/mvme16x/rtc.c
+++ b/arch/m68k/mvme16x/rtc.c
@@ -52,15 +52,15 @@ static int rtc_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
52 /* Ensure clock and real-time-mode-register are accessible */ 52 /* Ensure clock and real-time-mode-register are accessible */
53 rtc->ctrl = RTC_READ; 53 rtc->ctrl = RTC_READ;
54 memset(&wtime, 0, sizeof(struct rtc_time)); 54 memset(&wtime, 0, sizeof(struct rtc_time));
55 wtime.tm_sec = BCD2BIN(rtc->bcd_sec); 55 wtime.tm_sec = bcd2bin(rtc->bcd_sec);
56 wtime.tm_min = BCD2BIN(rtc->bcd_min); 56 wtime.tm_min = bcd2bin(rtc->bcd_min);
57 wtime.tm_hour = BCD2BIN(rtc->bcd_hr); 57 wtime.tm_hour = bcd2bin(rtc->bcd_hr);
58 wtime.tm_mday = BCD2BIN(rtc->bcd_dom); 58 wtime.tm_mday = bcd2bin(rtc->bcd_dom);
59 wtime.tm_mon = BCD2BIN(rtc->bcd_mth)-1; 59 wtime.tm_mon = bcd2bin(rtc->bcd_mth)-1;
60 wtime.tm_year = BCD2BIN(rtc->bcd_year); 60 wtime.tm_year = bcd2bin(rtc->bcd_year);
61 if (wtime.tm_year < 70) 61 if (wtime.tm_year < 70)
62 wtime.tm_year += 100; 62 wtime.tm_year += 100;
63 wtime.tm_wday = BCD2BIN(rtc->bcd_dow)-1; 63 wtime.tm_wday = bcd2bin(rtc->bcd_dow)-1;
64 rtc->ctrl = 0; 64 rtc->ctrl = 0;
65 local_irq_restore(flags); 65 local_irq_restore(flags);
66 return copy_to_user(argp, &wtime, sizeof wtime) ? 66 return copy_to_user(argp, &wtime, sizeof wtime) ?
@@ -104,12 +104,12 @@ static int rtc_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
104 local_irq_save(flags); 104 local_irq_save(flags);
105 rtc->ctrl = RTC_WRITE; 105 rtc->ctrl = RTC_WRITE;
106 106
107 rtc->bcd_sec = BIN2BCD(sec); 107 rtc->bcd_sec = bin2bcd(sec);
108 rtc->bcd_min = BIN2BCD(min); 108 rtc->bcd_min = bin2bcd(min);
109 rtc->bcd_hr = BIN2BCD(hrs); 109 rtc->bcd_hr = bin2bcd(hrs);
110 rtc->bcd_dom = BIN2BCD(day); 110 rtc->bcd_dom = bin2bcd(day);
111 rtc->bcd_mth = BIN2BCD(mon); 111 rtc->bcd_mth = bin2bcd(mon);
112 rtc->bcd_year = BIN2BCD(yrs%100); 112 rtc->bcd_year = bin2bcd(yrs%100);
113 113
114 rtc->ctrl = 0; 114 rtc->ctrl = 0;
115 local_irq_restore(flags); 115 local_irq_restore(flags);
diff --git a/arch/m68k/q40/config.c b/arch/m68k/q40/config.c
index be9de2f3dc48..9c7eefa3f98a 100644
--- a/arch/m68k/q40/config.c
+++ b/arch/m68k/q40/config.c
@@ -23,6 +23,7 @@
23#include <linux/serial_reg.h> 23#include <linux/serial_reg.h>
24#include <linux/rtc.h> 24#include <linux/rtc.h>
25#include <linux/vt_kern.h> 25#include <linux/vt_kern.h>
26#include <linux/bcd.h>
26 27
27#include <asm/io.h> 28#include <asm/io.h>
28#include <asm/rtc.h> 29#include <asm/rtc.h>
@@ -216,17 +217,6 @@ int q40_parse_bootinfo(const struct bi_record *rec)
216} 217}
217 218
218 219
219static inline unsigned char bcd2bin(unsigned char b)
220{
221 return (b >> 4) * 10 + (b & 15);
222}
223
224static inline unsigned char bin2bcd(unsigned char b)
225{
226 return (b / 10) * 16 + (b % 10);
227}
228
229
230static unsigned long q40_gettimeoffset(void) 220static unsigned long q40_gettimeoffset(void)
231{ 221{
232 return 5000 * (ql_ticks != 0); 222 return 5000 * (ql_ticks != 0);
diff --git a/arch/m68k/sun3x/time.c b/arch/m68k/sun3x/time.c
index f5eaafb00d21..536a04aaf22f 100644
--- a/arch/m68k/sun3x/time.c
+++ b/arch/m68k/sun3x/time.c
@@ -47,23 +47,23 @@ int sun3x_hwclk(int set, struct rtc_time *t)
47 47
48 if(set) { 48 if(set) {
49 h->csr |= C_WRITE; 49 h->csr |= C_WRITE;
50 h->sec = BIN2BCD(t->tm_sec); 50 h->sec = bin2bcd(t->tm_sec);
51 h->min = BIN2BCD(t->tm_min); 51 h->min = bin2bcd(t->tm_min);
52 h->hour = BIN2BCD(t->tm_hour); 52 h->hour = bin2bcd(t->tm_hour);
53 h->wday = BIN2BCD(t->tm_wday); 53 h->wday = bin2bcd(t->tm_wday);
54 h->mday = BIN2BCD(t->tm_mday); 54 h->mday = bin2bcd(t->tm_mday);
55 h->month = BIN2BCD(t->tm_mon); 55 h->month = bin2bcd(t->tm_mon);
56 h->year = BIN2BCD(t->tm_year); 56 h->year = bin2bcd(t->tm_year);
57 h->csr &= ~C_WRITE; 57 h->csr &= ~C_WRITE;
58 } else { 58 } else {
59 h->csr |= C_READ; 59 h->csr |= C_READ;
60 t->tm_sec = BCD2BIN(h->sec); 60 t->tm_sec = bcd2bin(h->sec);
61 t->tm_min = BCD2BIN(h->min); 61 t->tm_min = bcd2bin(h->min);
62 t->tm_hour = BCD2BIN(h->hour); 62 t->tm_hour = bcd2bin(h->hour);
63 t->tm_wday = BCD2BIN(h->wday); 63 t->tm_wday = bcd2bin(h->wday);
64 t->tm_mday = BCD2BIN(h->mday); 64 t->tm_mday = bcd2bin(h->mday);
65 t->tm_mon = BCD2BIN(h->month); 65 t->tm_mon = bcd2bin(h->month);
66 t->tm_year = BCD2BIN(h->year); 66 t->tm_year = bcd2bin(h->year);
67 h->csr &= ~C_READ; 67 h->csr &= ~C_READ;
68 } 68 }
69 69
diff --git a/arch/m68knommu/Kconfig b/arch/m68knommu/Kconfig
index 2e7515e8db98..0a8998315e5e 100644
--- a/arch/m68knommu/Kconfig
+++ b/arch/m68knommu/Kconfig
@@ -73,9 +73,6 @@ config GENERIC_CLOCKEVENTS
73config NO_IOPORT 73config NO_IOPORT
74 def_bool y 74 def_bool y
75 75
76config ARCH_SUPPORTS_AOUT
77 def_bool y
78
79source "init/Kconfig" 76source "init/Kconfig"
80 77
81menu "Processor type and features" 78menu "Processor type and features"
diff --git a/arch/m68knommu/include/asm/a.out.h b/arch/m68knommu/include/asm/a.out.h
deleted file mode 100644
index ce18ef99de04..000000000000
--- a/arch/m68knommu/include/asm/a.out.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-m68k/a.out.h>
diff --git a/arch/m68knommu/include/asm/elf.h b/arch/m68knommu/include/asm/elf.h
index 27f0ec70fba8..b8046837f384 100644
--- a/arch/m68knommu/include/asm/elf.h
+++ b/arch/m68knommu/include/asm/elf.h
@@ -105,6 +105,6 @@ typedef struct user_m68kfp_struct elf_fpregset_t;
105 105
106#define ELF_PLATFORM (NULL) 106#define ELF_PLATFORM (NULL)
107 107
108#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX) 108#define SET_PERSONALITY(ex) set_personality(PER_LINUX)
109 109
110#endif 110#endif
diff --git a/arch/m68knommu/kernel/process.c b/arch/m68knommu/kernel/process.c
index 47502d5ec19f..3f2d7745f31e 100644
--- a/arch/m68knommu/kernel/process.c
+++ b/arch/m68knommu/kernel/process.c
@@ -25,7 +25,6 @@
25#include <linux/ptrace.h> 25#include <linux/ptrace.h>
26#include <linux/slab.h> 26#include <linux/slab.h>
27#include <linux/user.h> 27#include <linux/user.h>
28#include <linux/a.out.h>
29#include <linux/interrupt.h> 28#include <linux/interrupt.h>
30#include <linux/reboot.h> 29#include <linux/reboot.h>
31#include <linux/fs.h> 30#include <linux/fs.h>
diff --git a/arch/m68knommu/kernel/traps.c b/arch/m68knommu/kernel/traps.c
index 46f8f9d0c408..5d5d56bcd0ef 100644
--- a/arch/m68knommu/kernel/traps.c
+++ b/arch/m68knommu/kernel/traps.c
@@ -22,7 +22,6 @@
22#include <linux/mm.h> 22#include <linux/mm.h>
23#include <linux/module.h> 23#include <linux/module.h>
24#include <linux/types.h> 24#include <linux/types.h>
25#include <linux/a.out.h>
26#include <linux/user.h> 25#include <linux/user.h>
27#include <linux/string.h> 26#include <linux/string.h>
28#include <linux/linkage.h> 27#include <linux/linkage.h>
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index cd5fbf6f0784..b905744d7915 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -52,6 +52,7 @@ config BCM47XX
52 select SSB 52 select SSB
53 select SSB_DRIVER_MIPS 53 select SSB_DRIVER_MIPS
54 select SSB_DRIVER_EXTIF 54 select SSB_DRIVER_EXTIF
55 select SSB_EMBEDDED
55 select SSB_PCICORE_HOSTMODE if PCI 56 select SSB_PCICORE_HOSTMODE if PCI
56 select GENERIC_GPIO 57 select GENERIC_GPIO
57 select SYS_HAS_EARLY_PRINTK 58 select SYS_HAS_EARLY_PRINTK
diff --git a/arch/mips/bcm47xx/gpio.c b/arch/mips/bcm47xx/gpio.c
index f5a53acf995a..9b798800258c 100644
--- a/arch/mips/bcm47xx/gpio.c
+++ b/arch/mips/bcm47xx/gpio.c
@@ -12,68 +12,51 @@
12#include <asm/mach-bcm47xx/bcm47xx.h> 12#include <asm/mach-bcm47xx/bcm47xx.h>
13#include <asm/mach-bcm47xx/gpio.h> 13#include <asm/mach-bcm47xx/gpio.h>
14 14
15int bcm47xx_gpio_to_irq(unsigned gpio) 15#if (BCM47XX_CHIPCO_GPIO_LINES > BCM47XX_EXTIF_GPIO_LINES)
16static DECLARE_BITMAP(gpio_in_use, BCM47XX_CHIPCO_GPIO_LINES);
17#else
18static DECLARE_BITMAP(gpio_in_use, BCM47XX_EXTIF_GPIO_LINES);
19#endif
20
21int gpio_request(unsigned gpio, const char *tag)
16{ 22{
17 if (ssb_bcm47xx.chipco.dev) 23 if (ssb_chipco_available(&ssb_bcm47xx.chipco) &&
18 return ssb_mips_irq(ssb_bcm47xx.chipco.dev) + 2; 24 ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES))
19 else if (ssb_bcm47xx.extif.dev)
20 return ssb_mips_irq(ssb_bcm47xx.extif.dev) + 2;
21 else
22 return -EINVAL; 25 return -EINVAL;
23}
24EXPORT_SYMBOL_GPL(bcm47xx_gpio_to_irq);
25 26
26int bcm47xx_gpio_get_value(unsigned gpio) 27 if (ssb_extif_available(&ssb_bcm47xx.extif) &&
27{ 28 ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES))
28 if (ssb_bcm47xx.chipco.dev) 29 return -EINVAL;
29 return ssb_chipco_gpio_in(&ssb_bcm47xx.chipco, 1 << gpio);
30 else if (ssb_bcm47xx.extif.dev)
31 return ssb_extif_gpio_in(&ssb_bcm47xx.extif, 1 << gpio);
32 else
33 return 0;
34}
35EXPORT_SYMBOL_GPL(bcm47xx_gpio_get_value);
36 30
37void bcm47xx_gpio_set_value(unsigned gpio, int value) 31 if (test_and_set_bit(gpio, gpio_in_use))
38{ 32 return -EBUSY;
39 if (ssb_bcm47xx.chipco.dev)
40 ssb_chipco_gpio_out(&ssb_bcm47xx.chipco,
41 1 << gpio,
42 value ? 1 << gpio : 0);
43 else if (ssb_bcm47xx.extif.dev)
44 ssb_extif_gpio_out(&ssb_bcm47xx.extif,
45 1 << gpio,
46 value ? 1 << gpio : 0);
47}
48EXPORT_SYMBOL_GPL(bcm47xx_gpio_set_value);
49 33
50int bcm47xx_gpio_direction_input(unsigned gpio)
51{
52 if (ssb_bcm47xx.chipco.dev && (gpio < BCM47XX_CHIPCO_GPIO_LINES))
53 ssb_chipco_gpio_outen(&ssb_bcm47xx.chipco,
54 1 << gpio, 0);
55 else if (ssb_bcm47xx.extif.dev && (gpio < BCM47XX_EXTIF_GPIO_LINES))
56 ssb_extif_gpio_outen(&ssb_bcm47xx.extif,
57 1 << gpio, 0);
58 else
59 return -EINVAL;
60 return 0; 34 return 0;
61} 35}
62EXPORT_SYMBOL_GPL(bcm47xx_gpio_direction_input); 36EXPORT_SYMBOL(gpio_request);
63 37
64int bcm47xx_gpio_direction_output(unsigned gpio, int value) 38void gpio_free(unsigned gpio)
65{ 39{
66 bcm47xx_gpio_set_value(gpio, value); 40 if (ssb_chipco_available(&ssb_bcm47xx.chipco) &&
41 ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES))
42 return;
43
44 if (ssb_extif_available(&ssb_bcm47xx.extif) &&
45 ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES))
46 return;
47
48 clear_bit(gpio, gpio_in_use);
49}
50EXPORT_SYMBOL(gpio_free);
67 51
68 if (ssb_bcm47xx.chipco.dev && (gpio < BCM47XX_CHIPCO_GPIO_LINES)) 52int gpio_to_irq(unsigned gpio)
69 ssb_chipco_gpio_outen(&ssb_bcm47xx.chipco, 53{
70 1 << gpio, 1 << gpio); 54 if (ssb_chipco_available(&ssb_bcm47xx.chipco))
71 else if (ssb_bcm47xx.extif.dev && (gpio < BCM47XX_EXTIF_GPIO_LINES)) 55 return ssb_mips_irq(ssb_bcm47xx.chipco.dev) + 2;
72 ssb_extif_gpio_outen(&ssb_bcm47xx.extif, 56 else if (ssb_extif_available(&ssb_bcm47xx.extif))
73 1 << gpio, 1 << gpio); 57 return ssb_mips_irq(ssb_bcm47xx.extif.dev) + 2;
74 else 58 else
75 return -EINVAL; 59 return -EINVAL;
76 return 0;
77} 60}
78EXPORT_SYMBOL_GPL(bcm47xx_gpio_direction_output); 61EXPORT_SYMBOL_GPL(gpio_to_irq);
79 62
diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c
index 8d36f186890e..2f580fa160c9 100644
--- a/arch/mips/bcm47xx/setup.c
+++ b/arch/mips/bcm47xx/setup.c
@@ -27,6 +27,7 @@
27 27
28#include <linux/types.h> 28#include <linux/types.h>
29#include <linux/ssb/ssb.h> 29#include <linux/ssb/ssb.h>
30#include <linux/ssb/ssb_embedded.h>
30#include <asm/bootinfo.h> 31#include <asm/bootinfo.h>
31#include <asm/reboot.h> 32#include <asm/reboot.h>
32#include <asm/time.h> 33#include <asm/time.h>
@@ -41,7 +42,7 @@ static void bcm47xx_machine_restart(char *command)
41 printk(KERN_ALERT "Please stand by while rebooting the system...\n"); 42 printk(KERN_ALERT "Please stand by while rebooting the system...\n");
42 local_irq_disable(); 43 local_irq_disable();
43 /* Set the watchdog timer to reset immediately */ 44 /* Set the watchdog timer to reset immediately */
44 ssb_chipco_watchdog_timer_set(&ssb_bcm47xx.chipco, 1); 45 ssb_watchdog_timer_set(&ssb_bcm47xx, 1);
45 while (1) 46 while (1)
46 cpu_relax(); 47 cpu_relax();
47} 48}
@@ -50,7 +51,7 @@ static void bcm47xx_machine_halt(void)
50{ 51{
51 /* Disable interrupts and watchdog and spin forever */ 52 /* Disable interrupts and watchdog and spin forever */
52 local_irq_disable(); 53 local_irq_disable();
53 ssb_chipco_watchdog_timer_set(&ssb_bcm47xx.chipco, 0); 54 ssb_watchdog_timer_set(&ssb_bcm47xx, 0);
54 while (1) 55 while (1)
55 cpu_relax(); 56 cpu_relax();
56} 57}
diff --git a/arch/mips/bcm47xx/wgt634u.c b/arch/mips/bcm47xx/wgt634u.c
index d1d90c9ef2fa..ef00e7f58c24 100644
--- a/arch/mips/bcm47xx/wgt634u.c
+++ b/arch/mips/bcm47xx/wgt634u.c
@@ -11,6 +11,9 @@
11#include <linux/leds.h> 11#include <linux/leds.h>
12#include <linux/mtd/physmap.h> 12#include <linux/mtd/physmap.h>
13#include <linux/ssb/ssb.h> 13#include <linux/ssb/ssb.h>
14#include <linux/interrupt.h>
15#include <linux/reboot.h>
16#include <linux/gpio.h>
14#include <asm/mach-bcm47xx/bcm47xx.h> 17#include <asm/mach-bcm47xx/bcm47xx.h>
15 18
16/* GPIO definitions for the WGT634U */ 19/* GPIO definitions for the WGT634U */
@@ -99,6 +102,30 @@ static struct platform_device *wgt634u_devices[] __initdata = {
99 &wgt634u_gpio_leds, 102 &wgt634u_gpio_leds,
100}; 103};
101 104
105static irqreturn_t gpio_interrupt(int irq, void *ignored)
106{
107 int state;
108
109 /* Interrupts are shared, check if the current one is
110 a GPIO interrupt. */
111 if (!ssb_chipco_irq_status(&ssb_bcm47xx.chipco,
112 SSB_CHIPCO_IRQ_GPIO))
113 return IRQ_NONE;
114
115 state = gpio_get_value(WGT634U_GPIO_RESET);
116
117 /* Interrupt are level triggered, revert the interrupt polarity
118 to clear the interrupt. */
119 gpio_polarity(WGT634U_GPIO_RESET, state);
120
121 if (!state) {
122 printk(KERN_INFO "Reset button pressed");
123 ctrl_alt_del();
124 }
125
126 return IRQ_HANDLED;
127}
128
102static int __init wgt634u_init(void) 129static int __init wgt634u_init(void)
103{ 130{
104 /* There is no easy way to detect that we are running on a WGT634U 131 /* There is no easy way to detect that we are running on a WGT634U
@@ -112,6 +139,19 @@ static int __init wgt634u_init(void)
112 ((et0mac[1] == 0x09 && et0mac[2] == 0x5b) || 139 ((et0mac[1] == 0x09 && et0mac[2] == 0x5b) ||
113 (et0mac[1] == 0x0f && et0mac[2] == 0xb5))) { 140 (et0mac[1] == 0x0f && et0mac[2] == 0xb5))) {
114 struct ssb_mipscore *mcore = &ssb_bcm47xx.mipscore; 141 struct ssb_mipscore *mcore = &ssb_bcm47xx.mipscore;
142
143 printk(KERN_INFO "WGT634U machine detected.\n");
144
145 if (!request_irq(gpio_to_irq(WGT634U_GPIO_RESET),
146 gpio_interrupt, IRQF_SHARED,
147 "WGT634U GPIO", &ssb_bcm47xx.chipco)) {
148 gpio_direction_input(WGT634U_GPIO_RESET);
149 gpio_intmask(WGT634U_GPIO_RESET, 1);
150 ssb_chipco_irq_mask(&ssb_bcm47xx.chipco,
151 SSB_CHIPCO_IRQ_GPIO,
152 SSB_CHIPCO_IRQ_GPIO);
153 }
154
115 wgt634u_flash_data.width = mcore->flash_buswidth; 155 wgt634u_flash_data.width = mcore->flash_buswidth;
116 wgt634u_flash_resource.start = mcore->flash_window; 156 wgt634u_flash_resource.start = mcore->flash_window;
117 wgt634u_flash_resource.end = mcore->flash_window 157 wgt634u_flash_resource.end = mcore->flash_window
diff --git a/arch/mips/emma2rh/common/irq.c b/arch/mips/emma2rh/common/irq.c
index d95604773667..91cbd959ab67 100644
--- a/arch/mips/emma2rh/common/irq.c
+++ b/arch/mips/emma2rh/common/irq.c
@@ -29,7 +29,6 @@
29 29
30#include <asm/system.h> 30#include <asm/system.h>
31#include <asm/mipsregs.h> 31#include <asm/mipsregs.h>
32#include <asm/debug.h>
33#include <asm/addrspace.h> 32#include <asm/addrspace.h>
34#include <asm/bootinfo.h> 33#include <asm/bootinfo.h>
35 34
diff --git a/arch/mips/emma2rh/common/prom.c b/arch/mips/emma2rh/common/prom.c
index 5e92b3a9c5b8..e14a2e3d8842 100644
--- a/arch/mips/emma2rh/common/prom.c
+++ b/arch/mips/emma2rh/common/prom.c
@@ -30,7 +30,6 @@
30#include <asm/addrspace.h> 30#include <asm/addrspace.h>
31#include <asm/bootinfo.h> 31#include <asm/bootinfo.h>
32#include <asm/emma2rh/emma2rh.h> 32#include <asm/emma2rh/emma2rh.h>
33#include <asm/debug.h>
34 33
35const char *get_system_type(void) 34const char *get_system_type(void)
36{ 35{
diff --git a/arch/mips/emma2rh/markeins/platform.c b/arch/mips/emma2rh/markeins/platform.c
index d70627de7cfe..fb9cda253ab0 100644
--- a/arch/mips/emma2rh/markeins/platform.c
+++ b/arch/mips/emma2rh/markeins/platform.c
@@ -35,7 +35,6 @@
35#include <asm/irq.h> 35#include <asm/irq.h>
36#include <asm/reboot.h> 36#include <asm/reboot.h>
37#include <asm/traps.h> 37#include <asm/traps.h>
38#include <asm/debug.h>
39 38
40#include <asm/emma2rh/emma2rh.h> 39#include <asm/emma2rh/emma2rh.h>
41 40
diff --git a/arch/mips/include/asm/a.out.h b/arch/mips/include/asm/a.out.h
deleted file mode 100644
index cad8371422ab..000000000000
--- a/arch/mips/include/asm/a.out.h
+++ /dev/null
@@ -1,35 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994 - 1999, 2003 by Ralf Baechle
7 */
8#ifndef _ASM_A_OUT_H
9#define _ASM_A_OUT_H
10
11#ifdef __KERNEL__
12
13
14#endif
15
16struct exec
17{
18 unsigned long a_info; /* Use macros N_MAGIC, etc for access */
19 unsigned a_text; /* length of text, in bytes */
20 unsigned a_data; /* length of data, in bytes */
21 unsigned a_bss; /* length of uninitialized data area for
22 file, in bytes */
23 unsigned a_syms; /* length of symbol table data in file,
24 in bytes */
25 unsigned a_entry; /* start address */
26 unsigned a_trsize; /* length of relocation info for text, in
27 bytes */
28 unsigned a_drsize; /* length of relocation info for data, in bytes */
29};
30
31#define N_TRSIZE(a) ((a).a_trsize)
32#define N_DRSIZE(a) ((a).a_drsize)
33#define N_SYMSIZE(a) ((a).a_syms)
34
35#endif /* _ASM_A_OUT_H */
diff --git a/arch/mips/include/asm/cevt-r4k.h b/arch/mips/include/asm/cevt-r4k.h
new file mode 100644
index 000000000000..fa4328f9124f
--- /dev/null
+++ b/arch/mips/include/asm/cevt-r4k.h
@@ -0,0 +1,46 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2008 Kevin D. Kissell
7 */
8
9/*
10 * Definitions used for common event timer implementation
11 * for MIPS 4K-type processors and their MIPS MT variants.
12 * Avoids unsightly extern declarations in C files.
13 */
14#ifndef __ASM_CEVT_R4K_H
15#define __ASM_CEVT_R4K_H
16
17DECLARE_PER_CPU(struct clock_event_device, mips_clockevent_device);
18
19void mips_event_handler(struct clock_event_device *dev);
20int c0_compare_int_usable(void);
21void mips_set_clock_mode(enum clock_event_mode, struct clock_event_device *);
22irqreturn_t c0_compare_interrupt(int, void *);
23
24extern struct irqaction c0_compare_irqaction;
25extern int cp0_timer_irq_installed;
26
27/*
28 * Possibly handle a performance counter interrupt.
29 * Return true if the timer interrupt should not be checked
30 */
31
32static inline int handle_perf_irq(int r2)
33{
34 /*
35 * The performance counter overflow interrupt may be shared with the
36 * timer interrupt (cp0_perfcount_irq < 0). If it is and a
37 * performance counter has overflowed (perf_irq() == IRQ_HANDLED)
38 * and we can't reliably determine if a counter interrupt has also
39 * happened (!r2) then don't check for a timer interrupt.
40 */
41 return (cp0_perfcount_irq < 0) &&
42 perf_irq() == IRQ_HANDLED &&
43 !r2;
44}
45
46#endif /* __ASM_CEVT_R4K_H */
diff --git a/arch/mips/include/asm/elf.h b/arch/mips/include/asm/elf.h
index f69f7acba637..a8eac1697b3d 100644
--- a/arch/mips/include/asm/elf.h
+++ b/arch/mips/include/asm/elf.h
@@ -247,10 +247,8 @@ extern struct mips_abi mips_abi_n32;
247 247
248#ifdef CONFIG_32BIT 248#ifdef CONFIG_32BIT
249 249
250#define SET_PERSONALITY(ex, ibcs2) \ 250#define SET_PERSONALITY(ex) \
251do { \ 251do { \
252 if (ibcs2) \
253 set_personality(PER_SVR4); \
254 set_personality(PER_LINUX); \ 252 set_personality(PER_LINUX); \
255 \ 253 \
256 current->thread.abi = &mips_abi; \ 254 current->thread.abi = &mips_abi; \
@@ -296,7 +294,7 @@ do { \
296#define __SET_PERSONALITY32(ex) do { } while (0) 294#define __SET_PERSONALITY32(ex) do { } while (0)
297#endif 295#endif
298 296
299#define SET_PERSONALITY(ex, ibcs2) \ 297#define SET_PERSONALITY(ex) \
300do { \ 298do { \
301 clear_thread_flag(TIF_32BIT_REGS); \ 299 clear_thread_flag(TIF_32BIT_REGS); \
302 clear_thread_flag(TIF_32BIT_ADDR); \ 300 clear_thread_flag(TIF_32BIT_ADDR); \
@@ -306,9 +304,7 @@ do { \
306 else \ 304 else \
307 current->thread.abi = &mips_abi; \ 305 current->thread.abi = &mips_abi; \
308 \ 306 \
309 if (ibcs2) \ 307 if (current->personality != PER_LINUX32) \
310 set_personality(PER_SVR4); \
311 else if (current->personality != PER_LINUX32) \
312 set_personality(PER_LINUX); \ 308 set_personality(PER_LINUX); \
313} while (0) 309} while (0)
314 310
diff --git a/arch/mips/include/asm/mach-bcm47xx/gpio.h b/arch/mips/include/asm/mach-bcm47xx/gpio.h
index cfc8f4d618ce..d8ff4cd89ab5 100644
--- a/arch/mips/include/asm/mach-bcm47xx/gpio.h
+++ b/arch/mips/include/asm/mach-bcm47xx/gpio.h
@@ -9,47 +9,46 @@
9#ifndef __BCM47XX_GPIO_H 9#ifndef __BCM47XX_GPIO_H
10#define __BCM47XX_GPIO_H 10#define __BCM47XX_GPIO_H
11 11
12#include <linux/ssb/ssb_embedded.h>
13#include <asm/mach-bcm47xx/bcm47xx.h>
14
12#define BCM47XX_EXTIF_GPIO_LINES 5 15#define BCM47XX_EXTIF_GPIO_LINES 5
13#define BCM47XX_CHIPCO_GPIO_LINES 16 16#define BCM47XX_CHIPCO_GPIO_LINES 16
14 17
15extern int bcm47xx_gpio_to_irq(unsigned gpio); 18extern int gpio_request(unsigned gpio, const char *label);
16extern int bcm47xx_gpio_get_value(unsigned gpio); 19extern void gpio_free(unsigned gpio);
17extern void bcm47xx_gpio_set_value(unsigned gpio, int value); 20extern int gpio_to_irq(unsigned gpio);
18extern int bcm47xx_gpio_direction_input(unsigned gpio);
19extern int bcm47xx_gpio_direction_output(unsigned gpio, int value);
20
21static inline int gpio_request(unsigned gpio, const char *label)
22{
23 return 0;
24}
25 21
26static inline void gpio_free(unsigned gpio) 22static inline int gpio_get_value(unsigned gpio)
27{ 23{
24 return ssb_gpio_in(&ssb_bcm47xx, 1 << gpio);
28} 25}
29 26
30static inline int gpio_to_irq(unsigned gpio) 27static inline void gpio_set_value(unsigned gpio, int value)
31{ 28{
32 return bcm47xx_gpio_to_irq(gpio); 29 ssb_gpio_out(&ssb_bcm47xx, 1 << gpio, value ? 1 << gpio : 0);
33} 30}
34 31
35static inline int gpio_get_value(unsigned gpio) 32static inline int gpio_direction_input(unsigned gpio)
36{ 33{
37 return bcm47xx_gpio_get_value(gpio); 34 return ssb_gpio_outen(&ssb_bcm47xx, 1 << gpio, 0);
38} 35}
39 36
40static inline void gpio_set_value(unsigned gpio, int value) 37static inline int gpio_direction_output(unsigned gpio, int value)
41{ 38{
42 bcm47xx_gpio_set_value(gpio, value); 39 return ssb_gpio_outen(&ssb_bcm47xx, 1 << gpio, 1 << gpio);
43} 40}
44 41
45static inline int gpio_direction_input(unsigned gpio) 42static int gpio_intmask(unsigned gpio, int value)
46{ 43{
47 return bcm47xx_gpio_direction_input(gpio); 44 return ssb_gpio_intmask(&ssb_bcm47xx, 1 << gpio,
45 value ? 1 << gpio : 0);
48} 46}
49 47
50static inline int gpio_direction_output(unsigned gpio, int value) 48static int gpio_polarity(unsigned gpio, int value)
51{ 49{
52 return bcm47xx_gpio_direction_output(gpio, value); 50 return ssb_gpio_polarity(&ssb_bcm47xx, 1 << gpio,
51 value ? 1 << gpio : 0);
53} 52}
54 53
55 54
diff --git a/arch/mips/include/asm/mach-bcm47xx/war.h b/arch/mips/include/asm/mach-bcm47xx/war.h
index 4a2b7986b582..87cd4651dda3 100644
--- a/arch/mips/include/asm/mach-bcm47xx/war.h
+++ b/arch/mips/include/asm/mach-bcm47xx/war.h
@@ -5,8 +5,8 @@
5 * 5 *
6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org> 6 * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
7 */ 7 */
8#ifndef __ASM_MIPS_MACH_BCM947XX_WAR_H 8#ifndef __ASM_MIPS_MACH_BCM47XX_WAR_H
9#define __ASM_MIPS_MACH_BCM947XX_WAR_H 9#define __ASM_MIPS_MACH_BCM47XX_WAR_H
10 10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0 11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0 12#define R4600_V1_HIT_CACHEOP_WAR 0
@@ -22,4 +22,4 @@
22#define R10000_LLSC_WAR 0 22#define R10000_LLSC_WAR 0
23#define MIPS34K_MISSED_ITLB_WAR 0 23#define MIPS34K_MISSED_ITLB_WAR 0
24 24
25#endif /* __ASM_MIPS_MACH_BCM947XX_WAR_H */ 25#endif /* __ASM_MIPS_MACH_BCM47XX_WAR_H */
diff --git a/arch/mips/include/asm/mach-generic/ide.h b/arch/mips/include/asm/mach-generic/ide.h
index 73008f7bdc93..9c93a5b36f2a 100644
--- a/arch/mips/include/asm/mach-generic/ide.h
+++ b/arch/mips/include/asm/mach-generic/ide.h
@@ -19,35 +19,6 @@
19#include <linux/stddef.h> 19#include <linux/stddef.h>
20#include <asm/processor.h> 20#include <asm/processor.h>
21 21
22static __inline__ int ide_probe_legacy(void)
23{
24#ifdef CONFIG_PCI
25 struct pci_dev *dev;
26 /*
27 * This can be called on the ide_setup() path, super-early in
28 * boot. But the down_read() will enable local interrupts,
29 * which can cause some machines to crash. So here we detect
30 * and flag that situation and bail out early.
31 */
32 if (no_pci_devices())
33 return 0;
34 dev = pci_get_class(PCI_CLASS_BRIDGE_EISA << 8, NULL);
35 if (dev)
36 goto found;
37 dev = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL);
38 if (dev)
39 goto found;
40 return 0;
41found:
42 pci_dev_put(dev);
43 return 1;
44#elif defined(CONFIG_EISA) || defined(CONFIG_ISA)
45 return 1;
46#else
47 return 0;
48#endif
49}
50
51/* MIPS port and memory-mapped I/O string operations. */ 22/* MIPS port and memory-mapped I/O string operations. */
52static inline void __ide_flush_prologue(void) 23static inline void __ide_flush_prologue(void)
53{ 24{
diff --git a/arch/mips/include/asm/mach-ip22/ds1286.h b/arch/mips/include/asm/mach-ip22/ds1286.h
deleted file mode 100644
index f19f1eafbc71..000000000000
--- a/arch/mips/include/asm/mach-ip22/ds1286.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1998, 2001, 03 by Ralf Baechle
7 *
8 * RTC routines for PC style attached Dallas chip.
9 */
10#ifndef __ASM_MACH_IP22_DS1286_H
11#define __ASM_MACH_IP22_DS1286_H
12
13#include <asm/sgi/hpc3.h>
14
15#define rtc_read(reg) (hpc3c0->rtcregs[(reg)] & 0xff)
16#define rtc_write(data, reg) do { hpc3c0->rtcregs[(reg)] = (data); } while(0)
17
18#endif /* __ASM_MACH_IP22_DS1286_H */
diff --git a/arch/mips/include/asm/mach-ip28/ds1286.h b/arch/mips/include/asm/mach-ip28/ds1286.h
deleted file mode 100644
index 471bb9a33e0f..000000000000
--- a/arch/mips/include/asm/mach-ip28/ds1286.h
+++ /dev/null
@@ -1,4 +0,0 @@
1#ifndef __ASM_MACH_IP28_DS1286_H
2#define __ASM_MACH_IP28_DS1286_H
3#include <asm/mach-ip22/ds1286.h>
4#endif /* __ASM_MACH_IP28_DS1286_H */
diff --git a/arch/mips/include/asm/spinlock.h b/arch/mips/include/asm/spinlock.h
index 5d98a3cb85b7..1a1f320c30d8 100644
--- a/arch/mips/include/asm/spinlock.h
+++ b/arch/mips/include/asm/spinlock.h
@@ -147,7 +147,7 @@ static inline void __raw_spin_unlock(raw_spinlock_t *lock)
147 " ori %[ticket], %[ticket], 0x2000 \n" 147 " ori %[ticket], %[ticket], 0x2000 \n"
148 " xori %[ticket], %[ticket], 0x2000 \n" 148 " xori %[ticket], %[ticket], 0x2000 \n"
149 " sc %[ticket], %[ticket_ptr] \n" 149 " sc %[ticket], %[ticket_ptr] \n"
150 " beqzl %[ticket], 2f \n" 150 " beqzl %[ticket], 1b \n"
151 : [ticket_ptr] "+m" (lock->lock), 151 : [ticket_ptr] "+m" (lock->lock),
152 [ticket] "=&r" (tmp)); 152 [ticket] "=&r" (tmp));
153 } else { 153 } else {
diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c
index 2fefb14414b7..aa2c55e3b55f 100644
--- a/arch/mips/kernel/linux32.c
+++ b/arch/mips/kernel/linux32.c
@@ -63,41 +63,6 @@
63#define merge_64(r1, r2) ((((r2) & 0xffffffffUL) << 32) + ((r1) & 0xffffffffUL)) 63#define merge_64(r1, r2) ((((r2) & 0xffffffffUL) << 32) + ((r1) & 0xffffffffUL))
64#endif 64#endif
65 65
66/*
67 * Revalidate the inode. This is required for proper NFS attribute caching.
68 */
69
70int cp_compat_stat(struct kstat *stat, struct compat_stat __user *statbuf)
71{
72 struct compat_stat tmp;
73
74 if (!new_valid_dev(stat->dev) || !new_valid_dev(stat->rdev))
75 return -EOVERFLOW;
76
77 memset(&tmp, 0, sizeof(tmp));
78 tmp.st_dev = new_encode_dev(stat->dev);
79 tmp.st_ino = stat->ino;
80 if (sizeof(tmp.st_ino) < sizeof(stat->ino) && tmp.st_ino != stat->ino)
81 return -EOVERFLOW;
82 tmp.st_mode = stat->mode;
83 tmp.st_nlink = stat->nlink;
84 SET_UID(tmp.st_uid, stat->uid);
85 SET_GID(tmp.st_gid, stat->gid);
86 tmp.st_rdev = new_encode_dev(stat->rdev);
87 tmp.st_size = stat->size;
88 tmp.st_atime = stat->atime.tv_sec;
89 tmp.st_mtime = stat->mtime.tv_sec;
90 tmp.st_ctime = stat->ctime.tv_sec;
91#ifdef STAT_HAVE_NSEC
92 tmp.st_atime_nsec = stat->atime.tv_nsec;
93 tmp.st_mtime_nsec = stat->mtime.tv_nsec;
94 tmp.st_ctime_nsec = stat->ctime.tv_nsec;
95#endif
96 tmp.st_blocks = stat->blocks;
97 tmp.st_blksize = stat->blksize;
98 return copy_to_user(statbuf, &tmp, sizeof(tmp)) ? -EFAULT : 0;
99}
100
101asmlinkage unsigned long 66asmlinkage unsigned long
102sys32_mmap2(unsigned long addr, unsigned long len, unsigned long prot, 67sys32_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
103 unsigned long flags, unsigned long fd, unsigned long pgoff) 68 unsigned long flags, unsigned long fd, unsigned long pgoff)
@@ -168,72 +133,6 @@ asmlinkage long sys32_ftruncate64(unsigned int fd, unsigned long __dummy,
168 return sys_ftruncate(fd, merge_64(a2, a3)); 133 return sys_ftruncate(fd, merge_64(a2, a3));
169} 134}
170 135
171static inline long
172get_tv32(struct timeval *o, struct compat_timeval __user *i)
173{
174 return (!access_ok(VERIFY_READ, i, sizeof(*i)) ||
175 (__get_user(o->tv_sec, &i->tv_sec) |
176 __get_user(o->tv_usec, &i->tv_usec)));
177}
178
179static inline long
180put_tv32(struct compat_timeval __user *o, struct timeval *i)
181{
182 return (!access_ok(VERIFY_WRITE, o, sizeof(*o)) ||
183 (__put_user(i->tv_sec, &o->tv_sec) |
184 __put_user(i->tv_usec, &o->tv_usec)));
185}
186
187extern struct timezone sys_tz;
188
189asmlinkage int
190sys32_gettimeofday(struct compat_timeval __user *tv, struct timezone __user *tz)
191{
192 if (tv) {
193 struct timeval ktv;
194 do_gettimeofday(&ktv);
195 if (put_tv32(tv, &ktv))
196 return -EFAULT;
197 }
198 if (tz) {
199 if (copy_to_user(tz, &sys_tz, sizeof(sys_tz)))
200 return -EFAULT;
201 }
202 return 0;
203}
204
205static inline long get_ts32(struct timespec *o, struct compat_timeval __user *i)
206{
207 long usec;
208
209 if (!access_ok(VERIFY_READ, i, sizeof(*i)))
210 return -EFAULT;
211 if (__get_user(o->tv_sec, &i->tv_sec))
212 return -EFAULT;
213 if (__get_user(usec, &i->tv_usec))
214 return -EFAULT;
215 o->tv_nsec = usec * 1000;
216 return 0;
217}
218
219asmlinkage int
220sys32_settimeofday(struct compat_timeval __user *tv, struct timezone __user *tz)
221{
222 struct timespec kts;
223 struct timezone ktz;
224
225 if (tv) {
226 if (get_ts32(&kts, tv))
227 return -EFAULT;
228 }
229 if (tz) {
230 if (copy_from_user(&ktz, tz, sizeof(ktz)))
231 return -EFAULT;
232 }
233
234 return do_sys_settimeofday(tv ? &kts : NULL, tz ? &ktz : NULL);
235}
236
237asmlinkage int sys32_llseek(unsigned int fd, unsigned int offset_high, 136asmlinkage int sys32_llseek(unsigned int fd, unsigned int offset_high,
238 unsigned int offset_low, loff_t __user * result, 137 unsigned int offset_low, loff_t __user * result,
239 unsigned int origin) 138 unsigned int origin)
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index 75bb1300dd7a..26760cad8b69 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -39,7 +39,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
39 seq_printf(m, "processor\t\t: %ld\n", n); 39 seq_printf(m, "processor\t\t: %ld\n", n);
40 sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n", 40 sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n",
41 cpu_data[n].options & MIPS_CPU_FPU ? " FPU V%d.%d" : ""); 41 cpu_data[n].options & MIPS_CPU_FPU ? " FPU V%d.%d" : "");
42 seq_printf(m, fmt, __cpu_name[smp_processor_id()], 42 seq_printf(m, fmt, __cpu_name[n],
43 (version >> 4) & 0x0f, version & 0x0f, 43 (version >> 4) & 0x0f, version & 0x0f,
44 (fp_vers >> 4) & 0x0f, fp_vers & 0x0f); 44 (fp_vers >> 4) & 0x0f, fp_vers & 0x0f);
45 seq_printf(m, "BogoMIPS\t\t: %lu.%02lu\n", 45 seq_printf(m, "BogoMIPS\t\t: %lu.%02lu\n",
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index 22fc19bbe87f..ca2e4026ad20 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -22,7 +22,6 @@
22#include <linux/personality.h> 22#include <linux/personality.h>
23#include <linux/sys.h> 23#include <linux/sys.h>
24#include <linux/user.h> 24#include <linux/user.h>
25#include <linux/a.out.h>
26#include <linux/init.h> 25#include <linux/init.h>
27#include <linux/completion.h> 26#include <linux/completion.h>
28#include <linux/kallsyms.h> 27#include <linux/kallsyms.h>
diff --git a/arch/mips/kernel/rtlx.c b/arch/mips/kernel/rtlx.c
index dfd868b68364..4ce93aa7b372 100644
--- a/arch/mips/kernel/rtlx.c
+++ b/arch/mips/kernel/rtlx.c
@@ -522,8 +522,8 @@ static int __init rtlx_module_init(void)
522 atomic_set(&channel_wqs[i].in_open, 0); 522 atomic_set(&channel_wqs[i].in_open, 0);
523 mutex_init(&channel_wqs[i].mutex); 523 mutex_init(&channel_wqs[i].mutex);
524 524
525 dev = device_create_drvdata(mt_class, NULL, MKDEV(major, i), 525 dev = device_create(mt_class, NULL, MKDEV(major, i), NULL,
526 NULL, "%s%d", module_name, i); 526 "%s%d", module_name, i);
527 if (IS_ERR(dev)) { 527 if (IS_ERR(dev)) {
528 err = PTR_ERR(dev); 528 err = PTR_ERR(dev);
529 goto out_chrdev; 529 goto out_chrdev;
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index 324c5499dec2..e266b3aa6560 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -214,7 +214,7 @@ EXPORT(sysn32_call_table)
214 PTR sys_fchown 214 PTR sys_fchown
215 PTR sys_lchown 215 PTR sys_lchown
216 PTR sys_umask 216 PTR sys_umask
217 PTR sys32_gettimeofday 217 PTR compat_sys_gettimeofday
218 PTR compat_sys_getrlimit /* 6095 */ 218 PTR compat_sys_getrlimit /* 6095 */
219 PTR compat_sys_getrusage 219 PTR compat_sys_getrusage
220 PTR compat_sys_sysinfo 220 PTR compat_sys_sysinfo
@@ -279,7 +279,7 @@ EXPORT(sysn32_call_table)
279 PTR sys_chroot 279 PTR sys_chroot
280 PTR sys_sync 280 PTR sys_sync
281 PTR sys_acct 281 PTR sys_acct
282 PTR sys32_settimeofday 282 PTR compat_sys_settimeofday
283 PTR compat_sys_mount /* 6160 */ 283 PTR compat_sys_mount /* 6160 */
284 PTR sys_umount 284 PTR sys_umount
285 PTR sys_swapon 285 PTR sys_swapon
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index 85fedac99a57..6c7ef8313ebd 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -283,8 +283,8 @@ sys_call_table:
283 PTR compat_sys_setrlimit /* 4075 */ 283 PTR compat_sys_setrlimit /* 4075 */
284 PTR compat_sys_getrlimit 284 PTR compat_sys_getrlimit
285 PTR compat_sys_getrusage 285 PTR compat_sys_getrusage
286 PTR sys32_gettimeofday 286 PTR compat_sys_gettimeofday
287 PTR sys32_settimeofday 287 PTR compat_sys_settimeofday
288 PTR sys_getgroups /* 4080 */ 288 PTR sys_getgroups /* 4080 */
289 PTR sys_setgroups 289 PTR sys_setgroups
290 PTR sys_ni_syscall /* old_select */ 290 PTR sys_ni_syscall /* old_select */
diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c
index 343015a2f418..37970d9b2186 100644
--- a/arch/mips/kernel/syscall.c
+++ b/arch/mips/kernel/syscall.c
@@ -7,7 +7,6 @@
7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
8 * Copyright (C) 2001 MIPS Technologies, Inc. 8 * Copyright (C) 2001 MIPS Technologies, Inc.
9 */ 9 */
10#include <linux/a.out.h>
11#include <linux/capability.h> 10#include <linux/capability.h>
12#include <linux/errno.h> 11#include <linux/errno.h>
13#include <linux/linkage.h> 12#include <linux/linkage.h>
diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S
index afb119f35682..58738c8d754f 100644
--- a/arch/mips/kernel/vmlinux.lds.S
+++ b/arch/mips/kernel/vmlinux.lds.S
@@ -104,7 +104,7 @@ SECTIONS
104 . = ALIGN(_PAGE_SIZE); 104 . = ALIGN(_PAGE_SIZE);
105 __nosave_end = .; 105 __nosave_end = .;
106 106
107 . = ALIGN(32); 107 . = ALIGN(1 << CONFIG_MIPS_L1_CACHE_SHIFT);
108 .data.cacheline_aligned : { 108 .data.cacheline_aligned : {
109 *(.data.cacheline_aligned) 109 *(.data.cacheline_aligned)
110 } 110 }
diff --git a/arch/mips/lasat/sysctl.c b/arch/mips/lasat/sysctl.c
index 866881ec0cf8..8f88886feb12 100644
--- a/arch/mips/lasat/sysctl.c
+++ b/arch/mips/lasat/sysctl.c
@@ -38,14 +38,13 @@
38#endif 38#endif
39 39
40/* Strategy function to write EEPROM after changing string entry */ 40/* Strategy function to write EEPROM after changing string entry */
41int sysctl_lasatstring(ctl_table *table, int *name, int nlen, 41int sysctl_lasatstring(ctl_table *table,
42 void *oldval, size_t *oldlenp, 42 void *oldval, size_t *oldlenp,
43 void *newval, size_t newlen) 43 void *newval, size_t newlen)
44{ 44{
45 int r; 45 int r;
46 46
47 r = sysctl_string(table, name, 47 r = sysctl_string(table, oldval, oldlenp, newval, newlen);
48 nlen, oldval, oldlenp, newval, newlen);
49 if (r < 0) 48 if (r < 0)
50 return r; 49 return r;
51 50
@@ -113,13 +112,13 @@ int proc_dolasatrtc(ctl_table *table, int write, struct file *filp,
113#endif 112#endif
114 113
115/* Sysctl for setting the IP addresses */ 114/* Sysctl for setting the IP addresses */
116int sysctl_lasat_intvec(ctl_table *table, int *name, int nlen, 115int sysctl_lasat_intvec(ctl_table *table,
117 void *oldval, size_t *oldlenp, 116 void *oldval, size_t *oldlenp,
118 void *newval, size_t newlen) 117 void *newval, size_t newlen)
119{ 118{
120 int r; 119 int r;
121 120
122 r = sysctl_intvec(table, name, nlen, oldval, oldlenp, newval, newlen); 121 r = sysctl_intvec(table, oldval, oldlenp, newval, newlen);
123 if (r < 0) 122 if (r < 0)
124 return r; 123 return r;
125 124
@@ -131,7 +130,7 @@ int sysctl_lasat_intvec(ctl_table *table, int *name, int nlen,
131 130
132#ifdef CONFIG_DS1603 131#ifdef CONFIG_DS1603
133/* Same for RTC */ 132/* Same for RTC */
134int sysctl_lasat_rtc(ctl_table *table, int *name, int nlen, 133int sysctl_lasat_rtc(ctl_table *table,
135 void *oldval, size_t *oldlenp, 134 void *oldval, size_t *oldlenp,
136 void *newval, size_t newlen) 135 void *newval, size_t newlen)
137{ 136{
@@ -140,7 +139,7 @@ int sysctl_lasat_rtc(ctl_table *table, int *name, int nlen,
140 rtctmp = read_persistent_clock(); 139 rtctmp = read_persistent_clock();
141 if (rtctmp < 0) 140 if (rtctmp < 0)
142 rtctmp = 0; 141 rtctmp = 0;
143 r = sysctl_intvec(table, name, nlen, oldval, oldlenp, newval, newlen); 142 r = sysctl_intvec(table, oldval, oldlenp, newval, newlen);
144 if (r < 0) 143 if (r < 0)
145 return r; 144 return r;
146 if (newval && newlen) 145 if (newval && newlen)
@@ -211,13 +210,13 @@ int proc_lasat_ip(ctl_table *table, int write, struct file *filp,
211} 210}
212#endif 211#endif
213 212
214static int sysctl_lasat_prid(ctl_table *table, int *name, int nlen, 213static int sysctl_lasat_prid(ctl_table *table,
215 void *oldval, size_t *oldlenp, 214 void *oldval, size_t *oldlenp,
216 void *newval, size_t newlen) 215 void *newval, size_t newlen)
217{ 216{
218 int r; 217 int r;
219 218
220 r = sysctl_intvec(table, name, nlen, oldval, oldlenp, newval, newlen); 219 r = sysctl_intvec(table, oldval, oldlenp, newval, newlen);
221 if (r < 0) 220 if (r < 0)
222 return r; 221 return r;
223 if (newval && newlen) { 222 if (newval && newlen) {
diff --git a/arch/mips/pci/fixup-emma2rh.c b/arch/mips/pci/fixup-emma2rh.c
index a2705895561d..846eae9cdd05 100644
--- a/arch/mips/pci/fixup-emma2rh.c
+++ b/arch/mips/pci/fixup-emma2rh.c
@@ -29,7 +29,6 @@
29#include <linux/pci.h> 29#include <linux/pci.h>
30 30
31#include <asm/bootinfo.h> 31#include <asm/bootinfo.h>
32#include <asm/debug.h>
33 32
34#include <asm/emma2rh/emma2rh.h> 33#include <asm/emma2rh/emma2rh.h>
35 34
diff --git a/arch/mips/pci/ops-pnx8550.c b/arch/mips/pci/ops-pnx8550.c
index 0e160d9f07c3..1e6213fa7bdb 100644
--- a/arch/mips/pci/ops-pnx8550.c
+++ b/arch/mips/pci/ops-pnx8550.c
@@ -29,8 +29,6 @@
29 29
30#include <asm/mach-pnx8550/pci.h> 30#include <asm/mach-pnx8550/pci.h>
31#include <asm/mach-pnx8550/glb.h> 31#include <asm/mach-pnx8550/glb.h>
32#include <asm/debug.h>
33
34 32
35static inline void clear_status(void) 33static inline void clear_status(void)
36{ 34{
diff --git a/arch/mips/pci/pci-emma2rh.c b/arch/mips/pci/pci-emma2rh.c
index d99591a0cdfe..772e283daa63 100644
--- a/arch/mips/pci/pci-emma2rh.c
+++ b/arch/mips/pci/pci-emma2rh.c
@@ -29,7 +29,6 @@
29#include <linux/pci.h> 29#include <linux/pci.h>
30 30
31#include <asm/bootinfo.h> 31#include <asm/bootinfo.h>
32#include <asm/debug.h>
33 32
34#include <asm/emma2rh/emma2rh.h> 33#include <asm/emma2rh/emma2rh.h>
35 34
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index c7fe6ec621e6..a377e9d2d029 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -34,6 +34,8 @@ static struct pci_controller *hose_head, **hose_tail = &hose_head;
34unsigned long PCIBIOS_MIN_IO = 0x0000; 34unsigned long PCIBIOS_MIN_IO = 0x0000;
35unsigned long PCIBIOS_MIN_MEM = 0; 35unsigned long PCIBIOS_MIN_MEM = 0;
36 36
37static int pci_initialized;
38
37/* 39/*
38 * We need to avoid collisions with `mirrored' VGA ports 40 * We need to avoid collisions with `mirrored' VGA ports
39 * and other strange ISA hardware, so we always want the 41 * and other strange ISA hardware, so we always want the
@@ -74,6 +76,42 @@ pcibios_align_resource(void *data, struct resource *res,
74 res->start = start; 76 res->start = start;
75} 77}
76 78
79static void __devinit pcibios_scanbus(struct pci_controller *hose)
80{
81 static int next_busno;
82 static int need_domain_info;
83 struct pci_bus *bus;
84
85 if (!hose->iommu)
86 PCI_DMA_BUS_IS_PHYS = 1;
87
88 if (hose->get_busno && pci_probe_only)
89 next_busno = (*hose->get_busno)();
90
91 bus = pci_scan_bus(next_busno, hose->pci_ops, hose);
92 hose->bus = bus;
93
94 need_domain_info = need_domain_info || hose->index;
95 hose->need_domain_info = need_domain_info;
96 if (bus) {
97 next_busno = bus->subordinate + 1;
98 /* Don't allow 8-bit bus number overflow inside the hose -
99 reserve some space for bridges. */
100 if (next_busno > 224) {
101 next_busno = 0;
102 need_domain_info = 1;
103 }
104
105 if (!pci_probe_only) {
106 pci_bus_size_bridges(bus);
107 pci_bus_assign_resources(bus);
108 pci_enable_bridges(bus);
109 }
110 }
111}
112
113static DEFINE_MUTEX(pci_scan_mutex);
114
77void __devinit register_pci_controller(struct pci_controller *hose) 115void __devinit register_pci_controller(struct pci_controller *hose)
78{ 116{
79 if (request_resource(&iomem_resource, hose->mem_resource) < 0) 117 if (request_resource(&iomem_resource, hose->mem_resource) < 0)
@@ -93,6 +131,17 @@ void __devinit register_pci_controller(struct pci_controller *hose)
93 printk(KERN_WARNING 131 printk(KERN_WARNING
94 "registering PCI controller with io_map_base unset\n"); 132 "registering PCI controller with io_map_base unset\n");
95 } 133 }
134
135 /*
136 * Scan the bus if it is register after the PCI subsystem
137 * initialization.
138 */
139 if (pci_initialized) {
140 mutex_lock(&pci_scan_mutex);
141 pcibios_scanbus(hose);
142 mutex_unlock(&pci_scan_mutex);
143 }
144
96 return; 145 return;
97 146
98out: 147out:
@@ -125,38 +174,15 @@ static u8 __init common_swizzle(struct pci_dev *dev, u8 *pinp)
125static int __init pcibios_init(void) 174static int __init pcibios_init(void)
126{ 175{
127 struct pci_controller *hose; 176 struct pci_controller *hose;
128 struct pci_bus *bus;
129 int next_busno;
130 int need_domain_info = 0;
131 177
132 /* Scan all of the recorded PCI controllers. */ 178 /* Scan all of the recorded PCI controllers. */
133 for (next_busno = 0, hose = hose_head; hose; hose = hose->next) { 179 for (hose = hose_head; hose; hose = hose->next)
134 180 pcibios_scanbus(hose);
135 if (!hose->iommu)
136 PCI_DMA_BUS_IS_PHYS = 1;
137
138 if (hose->get_busno && pci_probe_only)
139 next_busno = (*hose->get_busno)();
140
141 bus = pci_scan_bus(next_busno, hose->pci_ops, hose);
142 hose->bus = bus;
143 need_domain_info = need_domain_info || hose->index;
144 hose->need_domain_info = need_domain_info;
145 if (bus) {
146 next_busno = bus->subordinate + 1;
147 /* Don't allow 8-bit bus number overflow inside the hose -
148 reserve some space for bridges. */
149 if (next_busno > 224) {
150 next_busno = 0;
151 need_domain_info = 1;
152 }
153 }
154 }
155 181
156 if (!pci_probe_only)
157 pci_assign_unassigned_resources();
158 pci_fixup_irqs(common_swizzle, pcibios_map_irq); 182 pci_fixup_irqs(common_swizzle, pcibios_map_irq);
159 183
184 pci_initialized = 1;
185
160 return 0; 186 return 0;
161} 187}
162 188
diff --git a/arch/mips/rb532/time.c b/arch/mips/rb532/time.c
index 8e7a46855b50..1377d599f0e3 100644
--- a/arch/mips/rb532/time.c
+++ b/arch/mips/rb532/time.c
@@ -28,7 +28,6 @@
28#include <linux/timex.h> 28#include <linux/timex.h>
29 29
30#include <asm/mipsregs.h> 30#include <asm/mipsregs.h>
31#include <asm/debug.h>
32#include <asm/time.h> 31#include <asm/time.h>
33#include <asm/mach-rc32434/rc32434.h> 32#include <asm/mach-rc32434/rc32434.h>
34 33
diff --git a/arch/mips/sgi-ip22/ip22-platform.c b/arch/mips/sgi-ip22/ip22-platform.c
index 52486c4d2b01..deddbf0ebe5c 100644
--- a/arch/mips/sgi-ip22/ip22-platform.c
+++ b/arch/mips/sgi-ip22/ip22-platform.c
@@ -192,3 +192,18 @@ static int __init sgi_button_devinit(void)
192} 192}
193 193
194device_initcall(sgi_button_devinit); 194device_initcall(sgi_button_devinit);
195
196static int __init sgi_ds1286_devinit(void)
197{
198 struct resource res;
199
200 memset(&res, 0, sizeof(res));
201 res.start = HPC3_CHIP0_BASE + offsetof(struct hpc3_regs, rtcregs);
202 res.end = res.start + sizeof(hpc3c0->rtcregs) - 1;
203 res.flags = IORESOURCE_MEM;
204
205 return IS_ERR(platform_device_register_simple("rtc-ds1286", -1,
206 &res, 1));
207}
208
209device_initcall(sgi_ds1286_devinit);
diff --git a/arch/mips/sgi-ip22/ip22-setup.c b/arch/mips/sgi-ip22/ip22-setup.c
index 896a1ef84829..b9a931358e23 100644
--- a/arch/mips/sgi-ip22/ip22-setup.c
+++ b/arch/mips/sgi-ip22/ip22-setup.c
@@ -4,7 +4,6 @@
4 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com) 4 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
5 * Copyright (C) 1997, 1998 Ralf Baechle (ralf@gnu.org) 5 * Copyright (C) 1997, 1998 Ralf Baechle (ralf@gnu.org)
6 */ 6 */
7#include <linux/ds1286.h>
8#include <linux/init.h> 7#include <linux/init.h>
9#include <linux/kernel.h> 8#include <linux/kernel.h>
10#include <linux/kdev_t.h> 9#include <linux/kdev_t.h>
diff --git a/arch/mips/sgi-ip22/ip22-time.c b/arch/mips/sgi-ip22/ip22-time.c
index 10e505491655..3dcb27ec0c53 100644
--- a/arch/mips/sgi-ip22/ip22-time.c
+++ b/arch/mips/sgi-ip22/ip22-time.c
@@ -10,7 +10,6 @@
10 * Copyright (C) 2003, 06 Ralf Baechle (ralf@linux-mips.org) 10 * Copyright (C) 2003, 06 Ralf Baechle (ralf@linux-mips.org)
11 */ 11 */
12#include <linux/bcd.h> 12#include <linux/bcd.h>
13#include <linux/ds1286.h>
14#include <linux/init.h> 13#include <linux/init.h>
15#include <linux/irq.h> 14#include <linux/irq.h>
16#include <linux/kernel.h> 15#include <linux/kernel.h>
@@ -29,69 +28,6 @@
29#include <asm/sgi/hpc3.h> 28#include <asm/sgi/hpc3.h>
30#include <asm/sgi/ip22.h> 29#include <asm/sgi/ip22.h>
31 30
32/*
33 * Note that mktime uses month from 1 to 12 while rtc_time_to_tm
34 * uses 0 to 11.
35 */
36unsigned long read_persistent_clock(void)
37{
38 unsigned int yrs, mon, day, hrs, min, sec;
39 unsigned int save_control;
40 unsigned long flags;
41
42 spin_lock_irqsave(&rtc_lock, flags);
43 save_control = hpc3c0->rtcregs[RTC_CMD] & 0xff;
44 hpc3c0->rtcregs[RTC_CMD] = save_control | RTC_TE;
45
46 sec = BCD2BIN(hpc3c0->rtcregs[RTC_SECONDS] & 0xff);
47 min = BCD2BIN(hpc3c0->rtcregs[RTC_MINUTES] & 0xff);
48 hrs = BCD2BIN(hpc3c0->rtcregs[RTC_HOURS] & 0x3f);
49 day = BCD2BIN(hpc3c0->rtcregs[RTC_DATE] & 0xff);
50 mon = BCD2BIN(hpc3c0->rtcregs[RTC_MONTH] & 0x1f);
51 yrs = BCD2BIN(hpc3c0->rtcregs[RTC_YEAR] & 0xff);
52
53 hpc3c0->rtcregs[RTC_CMD] = save_control;
54 spin_unlock_irqrestore(&rtc_lock, flags);
55
56 if (yrs < 45)
57 yrs += 30;
58 if ((yrs += 40) < 70)
59 yrs += 100;
60
61 return mktime(yrs + 1900, mon, day, hrs, min, sec);
62}
63
64int rtc_mips_set_time(unsigned long tim)
65{
66 struct rtc_time tm;
67 unsigned int save_control;
68 unsigned long flags;
69
70 rtc_time_to_tm(tim, &tm);
71
72 tm.tm_mon += 1; /* tm_mon starts at zero */
73 tm.tm_year -= 40;
74 if (tm.tm_year >= 100)
75 tm.tm_year -= 100;
76
77 spin_lock_irqsave(&rtc_lock, flags);
78 save_control = hpc3c0->rtcregs[RTC_CMD] & 0xff;
79 hpc3c0->rtcregs[RTC_CMD] = save_control | RTC_TE;
80
81 hpc3c0->rtcregs[RTC_YEAR] = BIN2BCD(tm.tm_year);
82 hpc3c0->rtcregs[RTC_MONTH] = BIN2BCD(tm.tm_mon);
83 hpc3c0->rtcregs[RTC_DATE] = BIN2BCD(tm.tm_mday);
84 hpc3c0->rtcregs[RTC_HOURS] = BIN2BCD(tm.tm_hour);
85 hpc3c0->rtcregs[RTC_MINUTES] = BIN2BCD(tm.tm_min);
86 hpc3c0->rtcregs[RTC_SECONDS] = BIN2BCD(tm.tm_sec);
87 hpc3c0->rtcregs[RTC_HUNDREDTH_SECOND] = 0;
88
89 hpc3c0->rtcregs[RTC_CMD] = save_control;
90 spin_unlock_irqrestore(&rtc_lock, flags);
91
92 return 0;
93}
94
95static unsigned long dosample(void) 31static unsigned long dosample(void)
96{ 32{
97 u32 ct0, ct1; 33 u32 ct0, ct1;
diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c
index 8b4e854af925..1327c2746fb7 100644
--- a/arch/mips/sgi-ip27/ip27-timer.c
+++ b/arch/mips/sgi-ip27/ip27-timer.c
@@ -13,12 +13,12 @@
13#include <linux/time.h> 13#include <linux/time.h>
14#include <linux/timex.h> 14#include <linux/timex.h>
15#include <linux/mm.h> 15#include <linux/mm.h>
16#include <linux/platform_device.h>
16 17
17#include <asm/time.h> 18#include <asm/time.h>
18#include <asm/pgtable.h> 19#include <asm/pgtable.h>
19#include <asm/sgialib.h> 20#include <asm/sgialib.h>
20#include <asm/sn/ioc3.h> 21#include <asm/sn/ioc3.h>
21#include <asm/m48t35.h>
22#include <asm/sn/klconfig.h> 22#include <asm/sn/klconfig.h>
23#include <asm/sn/arch.h> 23#include <asm/sn/arch.h>
24#include <asm/sn/addrs.h> 24#include <asm/sn/addrs.h>
@@ -28,51 +28,6 @@
28 28
29#define TICK_SIZE (tick_nsec / 1000) 29#define TICK_SIZE (tick_nsec / 1000)
30 30
31#if 0
32static int set_rtc_mmss(unsigned long nowtime)
33{
34 int retval = 0;
35 int real_seconds, real_minutes, cmos_minutes;
36 struct m48t35_rtc *rtc;
37 nasid_t nid;
38
39 nid = get_nasid();
40 rtc = (struct m48t35_rtc *)(KL_CONFIG_CH_CONS_INFO(nid)->memory_base +
41 IOC3_BYTEBUS_DEV0);
42
43 rtc->control |= M48T35_RTC_READ;
44 cmos_minutes = BCD2BIN(rtc->min);
45 rtc->control &= ~M48T35_RTC_READ;
46
47 /*
48 * Since we're only adjusting minutes and seconds, don't interfere with
49 * hour overflow. This avoids messing with unknown time zones but
50 * requires your RTC not to be off by more than 15 minutes
51 */
52 real_seconds = nowtime % 60;
53 real_minutes = nowtime / 60;
54 if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
55 real_minutes += 30; /* correct for half hour time zone */
56 real_minutes %= 60;
57
58 if (abs(real_minutes - cmos_minutes) < 30) {
59 real_seconds = BIN2BCD(real_seconds);
60 real_minutes = BIN2BCD(real_minutes);
61 rtc->control |= M48T35_RTC_SET;
62 rtc->sec = real_seconds;
63 rtc->min = real_minutes;
64 rtc->control &= ~M48T35_RTC_SET;
65 } else {
66 printk(KERN_WARNING
67 "set_rtc_mmss: can't update from %d to %d\n",
68 cmos_minutes, real_minutes);
69 retval = -1;
70 }
71
72 return retval;
73}
74#endif
75
76/* Includes for ioc3_init(). */ 31/* Includes for ioc3_init(). */
77#include <asm/sn/types.h> 32#include <asm/sn/types.h>
78#include <asm/sn/sn0/addrs.h> 33#include <asm/sn/sn0/addrs.h>
@@ -80,37 +35,6 @@ static int set_rtc_mmss(unsigned long nowtime)
80#include <asm/sn/sn0/hubio.h> 35#include <asm/sn/sn0/hubio.h>
81#include <asm/pci/bridge.h> 36#include <asm/pci/bridge.h>
82 37
83unsigned long read_persistent_clock(void)
84{
85 unsigned int year, month, date, hour, min, sec;
86 struct m48t35_rtc *rtc;
87 nasid_t nid;
88
89 nid = get_nasid();
90 rtc = (struct m48t35_rtc *)(KL_CONFIG_CH_CONS_INFO(nid)->memory_base +
91 IOC3_BYTEBUS_DEV0);
92
93 rtc->control |= M48T35_RTC_READ;
94 sec = rtc->sec;
95 min = rtc->min;
96 hour = rtc->hour;
97 date = rtc->date;
98 month = rtc->month;
99 year = rtc->year;
100 rtc->control &= ~M48T35_RTC_READ;
101
102 sec = BCD2BIN(sec);
103 min = BCD2BIN(min);
104 hour = BCD2BIN(hour);
105 date = BCD2BIN(date);
106 month = BCD2BIN(month);
107 year = BCD2BIN(year);
108
109 year += 1970;
110
111 return mktime(year, month, date, hour, min, sec);
112}
113
114static void enable_rt_irq(unsigned int irq) 38static void enable_rt_irq(unsigned int irq)
115{ 39{
116} 40}
@@ -286,6 +210,7 @@ void __cpuinit cpu_time_init(void)
286 210
287void __cpuinit hub_rtc_init(cnodeid_t cnode) 211void __cpuinit hub_rtc_init(cnodeid_t cnode)
288{ 212{
213
289 /* 214 /*
290 * We only need to initialize the current node. 215 * We only need to initialize the current node.
291 * If this is not the current node then it is a cpuless 216 * If this is not the current node then it is a cpuless
@@ -301,3 +226,23 @@ void __cpuinit hub_rtc_init(cnodeid_t cnode)
301 LOCAL_HUB_S(PI_RT_PEND_B, 0); 226 LOCAL_HUB_S(PI_RT_PEND_B, 0);
302 } 227 }
303} 228}
229
230static int __init sgi_ip27_rtc_devinit(void)
231{
232 struct resource res;
233
234 memset(&res, 0, sizeof(res));
235 res.start = XPHYSADDR(KL_CONFIG_CH_CONS_INFO(master_nasid)->memory_base +
236 IOC3_BYTEBUS_DEV0);
237 res.end = res.start + 32767;
238 res.flags = IORESOURCE_MEM;
239
240 return IS_ERR(platform_device_register_simple("rtc-m48t35", -1,
241 &res, 1));
242}
243
244/*
245 * kludge make this a device_initcall after ioc3 resource conflicts
246 * are resolved
247 */
248late_initcall(sgi_ip27_rtc_devinit);
diff --git a/arch/mips/sgi-ip32/ip32-platform.c b/arch/mips/sgi-ip32/ip32-platform.c
index 3d63721e0e80..511e9ff2acfd 100644
--- a/arch/mips/sgi-ip32/ip32-platform.c
+++ b/arch/mips/sgi-ip32/ip32-platform.c
@@ -90,6 +90,22 @@ static __init int sgio2btns_devinit(void)
90 90
91device_initcall(sgio2btns_devinit); 91device_initcall(sgio2btns_devinit);
92 92
93static struct resource sgio2_cmos_rsrc[] = {
94 {
95 .start = 0x70,
96 .end = 0x71,
97 .flags = IORESOURCE_IO
98 }
99};
100
101static __init int sgio2_cmos_devinit(void)
102{
103 return IS_ERR(platform_device_register_simple("rtc_cmos", -1,
104 sgio2_cmos_rsrc, 1));
105}
106
107device_initcall(sgio2_cmos_devinit);
108
93MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>"); 109MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
94MODULE_LICENSE("GPL"); 110MODULE_LICENSE("GPL");
95MODULE_DESCRIPTION("8250 UART probe driver for SGI IP32 aka O2"); 111MODULE_DESCRIPTION("8250 UART probe driver for SGI IP32 aka O2");
diff --git a/arch/mips/sgi-ip32/ip32-setup.c b/arch/mips/sgi-ip32/ip32-setup.c
index 1024bf40bd9e..c5a5d4a31b4b 100644
--- a/arch/mips/sgi-ip32/ip32-setup.c
+++ b/arch/mips/sgi-ip32/ip32-setup.c
@@ -62,11 +62,6 @@ static inline void str2eaddr(unsigned char *ea, unsigned char *str)
62} 62}
63#endif 63#endif
64 64
65unsigned long read_persistent_clock(void)
66{
67 return mc146818_get_cmos_time();
68}
69
70/* An arbitrary time; this can be decreased if reliability looks good */ 65/* An arbitrary time; this can be decreased if reliability looks good */
71#define WAIT_MS 10 66#define WAIT_MS 10
72 67
diff --git a/arch/mips/sibyte/common/sb_tbprof.c b/arch/mips/sibyte/common/sb_tbprof.c
index 66e3e3fb311f..637a194e5cd5 100644
--- a/arch/mips/sibyte/common/sb_tbprof.c
+++ b/arch/mips/sibyte/common/sb_tbprof.c
@@ -576,8 +576,7 @@ static int __init sbprof_tb_init(void)
576 576
577 tb_class = tbc; 577 tb_class = tbc;
578 578
579 dev = device_create_drvdata(tbc, NULL, MKDEV(SBPROF_TB_MAJOR, 0), 579 dev = device_create(tbc, NULL, MKDEV(SBPROF_TB_MAJOR, 0), NULL, "tb");
580 NULL, "tb");
581 if (IS_ERR(dev)) { 580 if (IS_ERR(dev)) {
582 err = PTR_ERR(dev); 581 err = PTR_ERR(dev);
583 goto out_class; 582 goto out_class;
diff --git a/arch/mn10300/Kconfig b/arch/mn10300/Kconfig
index e856218da90d..dd557c9cf001 100644
--- a/arch/mn10300/Kconfig
+++ b/arch/mn10300/Kconfig
@@ -53,9 +53,6 @@ config QUICKLIST
53config ARCH_HAS_ILOG2_U32 53config ARCH_HAS_ILOG2_U32
54 def_bool y 54 def_bool y
55 55
56config ARCH_SUPPORTS_AOUT
57 def_bool n
58
59# Use the generic interrupt handling code in kernel/irq/ 56# Use the generic interrupt handling code in kernel/irq/
60config GENERIC_HARDIRQS 57config GENERIC_HARDIRQS
61 def_bool y 58 def_bool y
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig
index a7d4fd353c2b..8313fccced5e 100644
--- a/arch/parisc/Kconfig
+++ b/arch/parisc/Kconfig
@@ -76,9 +76,6 @@ config IRQ_PER_CPU
76 bool 76 bool
77 default y 77 default y
78 78
79config ARCH_SUPPORTS_AOUT
80 def_bool y
81
82# unless you want to implement ACPI on PA-RISC ... ;-) 79# unless you want to implement ACPI on PA-RISC ... ;-)
83config PM 80config PM
84 bool 81 bool
diff --git a/arch/parisc/kernel/binfmt_elf32.c b/arch/parisc/kernel/binfmt_elf32.c
index ecb10a4f63c6..f61692d2b557 100644
--- a/arch/parisc/kernel/binfmt_elf32.c
+++ b/arch/parisc/kernel/binfmt_elf32.c
@@ -85,7 +85,7 @@ struct elf_prpsinfo32
85 * could set a processor dependent flag in the thread_struct. 85 * could set a processor dependent flag in the thread_struct.
86 */ 86 */
87 87
88#define SET_PERSONALITY(ex, ibcs2) \ 88#define SET_PERSONALITY(ex) \
89 set_thread_flag(TIF_32BIT); \ 89 set_thread_flag(TIF_32BIT); \
90 current->thread.map_base = DEFAULT_MAP_BASE32; \ 90 current->thread.map_base = DEFAULT_MAP_BASE32; \
91 current->thread.task_size = DEFAULT_TASK_SIZE32 \ 91 current->thread.task_size = DEFAULT_TASK_SIZE32 \
diff --git a/arch/parisc/kernel/sys_parisc32.c b/arch/parisc/kernel/sys_parisc32.c
index 71efd6a28e2a..0838155b7a88 100644
--- a/arch/parisc/kernel/sys_parisc32.c
+++ b/arch/parisc/kernel/sys_parisc32.c
@@ -179,111 +179,6 @@ asmlinkage long sys32_sched_rr_get_interval(pid_t pid,
179 return ret; 179 return ret;
180} 180}
181 181
182static int
183put_compat_timeval(struct compat_timeval __user *u, struct timeval *t)
184{
185 struct compat_timeval t32;
186 t32.tv_sec = t->tv_sec;
187 t32.tv_usec = t->tv_usec;
188 return copy_to_user(u, &t32, sizeof t32);
189}
190
191static inline long get_ts32(struct timespec *o, struct compat_timeval __user *i)
192{
193 long usec;
194
195 if (__get_user(o->tv_sec, &i->tv_sec))
196 return -EFAULT;
197 if (__get_user(usec, &i->tv_usec))
198 return -EFAULT;
199 o->tv_nsec = usec * 1000;
200 return 0;
201}
202
203asmlinkage int
204sys32_gettimeofday(struct compat_timeval __user *tv, struct timezone __user *tz)
205{
206 extern void do_gettimeofday(struct timeval *tv);
207
208 if (tv) {
209 struct timeval ktv;
210 do_gettimeofday(&ktv);
211 if (put_compat_timeval(tv, &ktv))
212 return -EFAULT;
213 }
214 if (tz) {
215 extern struct timezone sys_tz;
216 if (copy_to_user(tz, &sys_tz, sizeof(sys_tz)))
217 return -EFAULT;
218 }
219 return 0;
220}
221
222asmlinkage
223int sys32_settimeofday(struct compat_timeval __user *tv, struct timezone __user *tz)
224{
225 struct timespec kts;
226 struct timezone ktz;
227
228 if (tv) {
229 if (get_ts32(&kts, tv))
230 return -EFAULT;
231 }
232 if (tz) {
233 if (copy_from_user(&ktz, tz, sizeof(ktz)))
234 return -EFAULT;
235 }
236
237 return do_sys_settimeofday(tv ? &kts : NULL, tz ? &ktz : NULL);
238}
239
240int cp_compat_stat(struct kstat *stat, struct compat_stat __user *statbuf)
241{
242 compat_ino_t ino;
243 int err;
244
245 if (stat->size > MAX_NON_LFS || !new_valid_dev(stat->dev) ||
246 !new_valid_dev(stat->rdev))
247 return -EOVERFLOW;
248
249 ino = stat->ino;
250 if (sizeof(ino) < sizeof(stat->ino) && ino != stat->ino)
251 return -EOVERFLOW;
252
253 err = put_user(new_encode_dev(stat->dev), &statbuf->st_dev);
254 err |= put_user(ino, &statbuf->st_ino);
255 err |= put_user(stat->mode, &statbuf->st_mode);
256 err |= put_user(stat->nlink, &statbuf->st_nlink);
257 err |= put_user(0, &statbuf->st_reserved1);
258 err |= put_user(0, &statbuf->st_reserved2);
259 err |= put_user(new_encode_dev(stat->rdev), &statbuf->st_rdev);
260 err |= put_user(stat->size, &statbuf->st_size);
261 err |= put_user(stat->atime.tv_sec, &statbuf->st_atime);
262 err |= put_user(stat->atime.tv_nsec, &statbuf->st_atime_nsec);
263 err |= put_user(stat->mtime.tv_sec, &statbuf->st_mtime);
264 err |= put_user(stat->mtime.tv_nsec, &statbuf->st_mtime_nsec);
265 err |= put_user(stat->ctime.tv_sec, &statbuf->st_ctime);
266 err |= put_user(stat->ctime.tv_nsec, &statbuf->st_ctime_nsec);
267 err |= put_user(stat->blksize, &statbuf->st_blksize);
268 err |= put_user(stat->blocks, &statbuf->st_blocks);
269 err |= put_user(0, &statbuf->__unused1);
270 err |= put_user(0, &statbuf->__unused2);
271 err |= put_user(0, &statbuf->__unused3);
272 err |= put_user(0, &statbuf->__unused4);
273 err |= put_user(0, &statbuf->__unused5);
274 err |= put_user(0, &statbuf->st_fstype); /* not avail */
275 err |= put_user(0, &statbuf->st_realdev); /* not avail */
276 err |= put_user(0, &statbuf->st_basemode); /* not avail */
277 err |= put_user(0, &statbuf->st_spareshort);
278 err |= put_user(stat->uid, &statbuf->st_uid);
279 err |= put_user(stat->gid, &statbuf->st_gid);
280 err |= put_user(0, &statbuf->st_spare4[0]);
281 err |= put_user(0, &statbuf->st_spare4[1]);
282 err |= put_user(0, &statbuf->st_spare4[2]);
283
284 return err;
285}
286
287/*** copied from mips64 ***/ 182/*** copied from mips64 ***/
288/* 183/*
289 * Ooo, nasty. We need here to frob 32-bit unsigned longs to 184 * Ooo, nasty. We need here to frob 32-bit unsigned longs to
diff --git a/arch/parisc/kernel/syscall_table.S b/arch/parisc/kernel/syscall_table.S
index 6b5ac38f5a99..c7e59f548817 100644
--- a/arch/parisc/kernel/syscall_table.S
+++ b/arch/parisc/kernel/syscall_table.S
@@ -149,8 +149,8 @@
149 ENTRY_COMP(getrlimit) 149 ENTRY_COMP(getrlimit)
150 ENTRY_COMP(getrusage) 150 ENTRY_COMP(getrusage)
151 /* struct timeval and timezone are maybe?? consistent wide and narrow */ 151 /* struct timeval and timezone are maybe?? consistent wide and narrow */
152 ENTRY_DIFF(gettimeofday) 152 ENTRY_COMP(gettimeofday)
153 ENTRY_DIFF(settimeofday) 153 ENTRY_COMP(settimeofday)
154 ENTRY_SAME(getgroups) /* 80 */ 154 ENTRY_SAME(getgroups) /* 80 */
155 ENTRY_SAME(setgroups) 155 ENTRY_SAME(setgroups)
156 /* struct socketaddr... */ 156 /* struct socketaddr... */
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 587da5e0990f..380baa1780e9 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -22,6 +22,9 @@ config WORD_SIZE
22config PPC_MERGE 22config PPC_MERGE
23 def_bool y 23 def_bool y
24 24
25config ARCH_PHYS_ADDR_T_64BIT
26 def_bool PPC64 || PHYS_64BIT
27
25config MMU 28config MMU
26 bool 29 bool
27 default y 30 default y
@@ -415,8 +418,11 @@ config PPC_64K_PAGES
415 418
416config FORCE_MAX_ZONEORDER 419config FORCE_MAX_ZONEORDER
417 int "Maximum zone order" 420 int "Maximum zone order"
421 range 9 64 if PPC_64K_PAGES
418 default "9" if PPC_64K_PAGES 422 default "9" if PPC_64K_PAGES
423 range 13 64 if PPC64 && !PPC_64K_PAGES
419 default "13" if PPC64 && !PPC_64K_PAGES 424 default "13" if PPC64 && !PPC_64K_PAGES
425 range 11 64
420 default "11" 426 default "11"
421 help 427 help
422 The kernel memory allocator divides physically contiguous memory 428 The kernel memory allocator divides physically contiguous memory
@@ -806,6 +812,19 @@ config PIN_TLB
806endmenu 812endmenu
807 813
808if PPC64 814if PPC64
815config RELOCATABLE
816 bool "Build a relocatable kernel"
817 help
818 This builds a kernel image that is capable of running anywhere
819 in the RMA (real memory area) at any 16k-aligned base address.
820 The kernel is linked as a position-independent executable (PIE)
821 and contains dynamic relocations which are processed early
822 in the bootup process.
823
824 One use is for the kexec on panic case where the recovery kernel
825 must live at a different physical address than the primary
826 kernel.
827
809config PAGE_OFFSET 828config PAGE_OFFSET
810 hex 829 hex
811 default "0xc000000000000000" 830 default "0xc000000000000000"
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index 4ebc52a19f0a..15eb27861fc7 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -51,6 +51,11 @@ config FTR_FIXUP_SELFTEST
51 depends on DEBUG_KERNEL 51 depends on DEBUG_KERNEL
52 default n 52 default n
53 53
54config MSI_BITMAP_SELFTEST
55 bool "Run self-tests of the MSI bitmap code."
56 depends on DEBUG_KERNEL
57 default n
58
54config XMON 59config XMON
55 bool "Include xmon kernel debugger" 60 bool "Include xmon kernel debugger"
56 depends on DEBUG_KERNEL 61 depends on DEBUG_KERNEL
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index c6be19e9ceae..24dd1a37f8fb 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -63,7 +63,9 @@ override CC += -m$(CONFIG_WORD_SIZE)
63override AR := GNUTARGET=elf$(CONFIG_WORD_SIZE)-powerpc $(AR) 63override AR := GNUTARGET=elf$(CONFIG_WORD_SIZE)-powerpc $(AR)
64endif 64endif
65 65
66LDFLAGS_vmlinux := -Bstatic 66LDFLAGS_vmlinux-yy := -Bstatic
67LDFLAGS_vmlinux-$(CONFIG_PPC64)$(CONFIG_RELOCATABLE) := -pie
68LDFLAGS_vmlinux := $(LDFLAGS_vmlinux-yy)
67 69
68CFLAGS-$(CONFIG_PPC64) := -mminimal-toc -mtraceback=none -mcall-aixdesc 70CFLAGS-$(CONFIG_PPC64) := -mminimal-toc -mtraceback=none -mcall-aixdesc
69CFLAGS-$(CONFIG_PPC32) := -ffixed-r2 -mmultiple 71CFLAGS-$(CONFIG_PPC32) := -ffixed-r2 -mmultiple
@@ -102,7 +104,10 @@ endif
102KBUILD_CFLAGS += $(call cc-option,-mno-altivec) 104KBUILD_CFLAGS += $(call cc-option,-mno-altivec)
103 105
104# No SPE instruction when building kernel 106# No SPE instruction when building kernel
107# (We use all available options to help semi-broken compilers)
105KBUILD_CFLAGS += $(call cc-option,-mno-spe) 108KBUILD_CFLAGS += $(call cc-option,-mno-spe)
109KBUILD_CFLAGS += $(call cc-option,-mspe=no)
110KBUILD_CFLAGS += $(call cc-option,-mabi=no-spe)
106 111
107# Enable unit-at-a-time mode when possible. It shrinks the 112# Enable unit-at-a-time mode when possible. It shrinks the
108# kernel considerably. 113# kernel considerably.
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 65d1a8454d2c..aac1406ccba5 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -310,8 +310,11 @@ $(obj)/dtbImage.%: vmlinux $(wrapperbits) $(obj)/%.dtb
310$(obj)/vmlinux.strip: vmlinux 310$(obj)/vmlinux.strip: vmlinux
311 $(STRIP) -s -R .comment $< -o $@ 311 $(STRIP) -s -R .comment $< -o $@
312 312
313# The iseries hypervisor won't take an ET_DYN executable, so this
314# changes the type (byte 17) in the file to ET_EXEC (2).
313$(obj)/zImage.iseries: vmlinux 315$(obj)/zImage.iseries: vmlinux
314 $(STRIP) -s -R .comment $< -o $@ 316 $(STRIP) -s -R .comment $< -o $@
317 printf "\x02" | dd of=$@ conv=notrunc bs=1 seek=17
315 318
316$(obj)/uImage: vmlinux $(wrapperbits) 319$(obj)/uImage: vmlinux $(wrapperbits)
317 $(call if_changed,wrap,uboot) 320 $(call if_changed,wrap,uboot)
diff --git a/arch/powerpc/boot/addnote.c b/arch/powerpc/boot/addnote.c
index b1e5611b2ab1..dcc9ab2ca823 100644
--- a/arch/powerpc/boot/addnote.c
+++ b/arch/powerpc/boot/addnote.c
@@ -11,7 +11,12 @@
11 * as published by the Free Software Foundation; either version 11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version. 12 * 2 of the License, or (at your option) any later version.
13 * 13 *
14 * Usage: addnote zImage 14 * Usage: addnote zImage [note.elf]
15 *
16 * If note.elf is supplied, it is the name of an ELF file that contains
17 * an RPA note to use instead of the built-in one. Alternatively, the
18 * note.elf file may be empty, in which case the built-in RPA note is
19 * used (this is to simplify how this is invoked from the wrapper script).
15 */ 20 */
16#include <stdio.h> 21#include <stdio.h>
17#include <stdlib.h> 22#include <stdlib.h>
@@ -43,27 +48,29 @@ char rpaname[] = "IBM,RPA-Client-Config";
43 */ 48 */
44#define N_RPA_DESCR 8 49#define N_RPA_DESCR 8
45unsigned int rpanote[N_RPA_DESCR] = { 50unsigned int rpanote[N_RPA_DESCR] = {
46 0, /* lparaffinity */ 51 1, /* lparaffinity */
47 64, /* min_rmo_size */ 52 128, /* min_rmo_size */
48 0, /* min_rmo_percent */ 53 0, /* min_rmo_percent */
49 40, /* max_pft_size */ 54 46, /* max_pft_size */
50 1, /* splpar */ 55 1, /* splpar */
51 -1, /* min_load */ 56 -1, /* min_load */
52 0, /* new_mem_def */ 57 1, /* new_mem_def */
53 1, /* ignore_my_client_config */ 58 0, /* ignore_my_client_config */
54}; 59};
55 60
56#define ROUNDUP(len) (((len) + 3) & ~3) 61#define ROUNDUP(len) (((len) + 3) & ~3)
57 62
58unsigned char buf[512]; 63unsigned char buf[512];
64unsigned char notebuf[512];
59 65
60#define GET_16BE(off) ((buf[off] << 8) + (buf[(off)+1])) 66#define GET_16BE(b, off) (((b)[off] << 8) + ((b)[(off)+1]))
61#define GET_32BE(off) ((GET_16BE(off) << 16) + GET_16BE((off)+2)) 67#define GET_32BE(b, off) ((GET_16BE((b), (off)) << 16) + \
68 GET_16BE((b), (off)+2))
62 69
63#define PUT_16BE(off, v) (buf[off] = ((v) >> 8) & 0xff, \ 70#define PUT_16BE(b, off, v) ((b)[off] = ((v) >> 8) & 0xff, \
64 buf[(off) + 1] = (v) & 0xff) 71 (b)[(off) + 1] = (v) & 0xff)
65#define PUT_32BE(off, v) (PUT_16BE((off), (v) >> 16), \ 72#define PUT_32BE(b, off, v) (PUT_16BE((b), (off), (v) >> 16), \
66 PUT_16BE((off) + 2, (v))) 73 PUT_16BE((b), (off) + 2, (v)))
67 74
68/* Structure of an ELF file */ 75/* Structure of an ELF file */
69#define E_IDENT 0 /* ELF header */ 76#define E_IDENT 0 /* ELF header */
@@ -88,15 +95,71 @@ unsigned char buf[512];
88 95
89unsigned char elf_magic[4] = { 0x7f, 'E', 'L', 'F' }; 96unsigned char elf_magic[4] = { 0x7f, 'E', 'L', 'F' };
90 97
98unsigned char *read_rpanote(const char *fname, int *nnp)
99{
100 int notefd, nr, i;
101 int ph, ps, np;
102 int note, notesize;
103
104 notefd = open(fname, O_RDONLY);
105 if (notefd < 0) {
106 perror(fname);
107 exit(1);
108 }
109 nr = read(notefd, notebuf, sizeof(notebuf));
110 if (nr < 0) {
111 perror("read note");
112 exit(1);
113 }
114 if (nr == 0) /* empty file */
115 return NULL;
116 if (nr < E_HSIZE ||
117 memcmp(&notebuf[E_IDENT+EI_MAGIC], elf_magic, 4) != 0 ||
118 notebuf[E_IDENT+EI_CLASS] != ELFCLASS32 ||
119 notebuf[E_IDENT+EI_DATA] != ELFDATA2MSB)
120 goto notelf;
121 close(notefd);
122
123 /* now look for the RPA-note */
124 ph = GET_32BE(notebuf, E_PHOFF);
125 ps = GET_16BE(notebuf, E_PHENTSIZE);
126 np = GET_16BE(notebuf, E_PHNUM);
127 if (ph < E_HSIZE || ps < PH_HSIZE || np < 1)
128 goto notelf;
129
130 for (i = 0; i < np; ++i, ph += ps) {
131 if (GET_32BE(notebuf, ph + PH_TYPE) != PT_NOTE)
132 continue;
133 note = GET_32BE(notebuf, ph + PH_OFFSET);
134 notesize = GET_32BE(notebuf, ph + PH_FILESZ);
135 if (notesize < 34 || note + notesize > nr)
136 continue;
137 if (GET_32BE(notebuf, note) != strlen(rpaname) + 1 ||
138 GET_32BE(notebuf, note + 8) != 0x12759999 ||
139 strcmp((char *)&notebuf[note + 12], rpaname) != 0)
140 continue;
141 /* looks like an RPA note, return it */
142 *nnp = notesize;
143 return &notebuf[note];
144 }
145 /* no RPA note found */
146 return NULL;
147
148 notelf:
149 fprintf(stderr, "%s is not a big-endian 32-bit ELF image\n", fname);
150 exit(1);
151}
152
91int 153int
92main(int ac, char **av) 154main(int ac, char **av)
93{ 155{
94 int fd, n, i; 156 int fd, n, i;
95 int ph, ps, np; 157 int ph, ps, np;
96 int nnote, nnote2, ns; 158 int nnote, nnote2, ns;
159 unsigned char *rpap;
97 160
98 if (ac != 2) { 161 if (ac != 2 && ac != 3) {
99 fprintf(stderr, "Usage: %s elf-file\n", av[0]); 162 fprintf(stderr, "Usage: %s elf-file [rpanote.elf]\n", av[0]);
100 exit(1); 163 exit(1);
101 } 164 }
102 fd = open(av[1], O_RDWR); 165 fd = open(av[1], O_RDWR);
@@ -107,6 +170,7 @@ main(int ac, char **av)
107 170
108 nnote = 12 + ROUNDUP(strlen(arch) + 1) + sizeof(descr); 171 nnote = 12 + ROUNDUP(strlen(arch) + 1) + sizeof(descr);
109 nnote2 = 12 + ROUNDUP(strlen(rpaname) + 1) + sizeof(rpanote); 172 nnote2 = 12 + ROUNDUP(strlen(rpaname) + 1) + sizeof(rpanote);
173 rpap = NULL;
110 174
111 n = read(fd, buf, sizeof(buf)); 175 n = read(fd, buf, sizeof(buf));
112 if (n < 0) { 176 if (n < 0) {
@@ -124,16 +188,19 @@ main(int ac, char **av)
124 exit(1); 188 exit(1);
125 } 189 }
126 190
127 ph = GET_32BE(E_PHOFF); 191 if (ac == 3)
128 ps = GET_16BE(E_PHENTSIZE); 192 rpap = read_rpanote(av[2], &nnote2);
129 np = GET_16BE(E_PHNUM); 193
194 ph = GET_32BE(buf, E_PHOFF);
195 ps = GET_16BE(buf, E_PHENTSIZE);
196 np = GET_16BE(buf, E_PHNUM);
130 if (ph < E_HSIZE || ps < PH_HSIZE || np < 1) 197 if (ph < E_HSIZE || ps < PH_HSIZE || np < 1)
131 goto notelf; 198 goto notelf;
132 if (ph + (np + 2) * ps + nnote + nnote2 > n) 199 if (ph + (np + 2) * ps + nnote + nnote2 > n)
133 goto nospace; 200 goto nospace;
134 201
135 for (i = 0; i < np; ++i) { 202 for (i = 0; i < np; ++i) {
136 if (GET_32BE(ph + PH_TYPE) == PT_NOTE) { 203 if (GET_32BE(buf, ph + PH_TYPE) == PT_NOTE) {
137 fprintf(stderr, "%s already has a note entry\n", 204 fprintf(stderr, "%s already has a note entry\n",
138 av[1]); 205 av[1]);
139 exit(0); 206 exit(0);
@@ -148,37 +215,42 @@ main(int ac, char **av)
148 215
149 /* fill in the program header entry */ 216 /* fill in the program header entry */
150 ns = ph + 2 * ps; 217 ns = ph + 2 * ps;
151 PUT_32BE(ph + PH_TYPE, PT_NOTE); 218 PUT_32BE(buf, ph + PH_TYPE, PT_NOTE);
152 PUT_32BE(ph + PH_OFFSET, ns); 219 PUT_32BE(buf, ph + PH_OFFSET, ns);
153 PUT_32BE(ph + PH_FILESZ, nnote); 220 PUT_32BE(buf, ph + PH_FILESZ, nnote);
154 221
155 /* fill in the note area we point to */ 222 /* fill in the note area we point to */
156 /* XXX we should probably make this a proper section */ 223 /* XXX we should probably make this a proper section */
157 PUT_32BE(ns, strlen(arch) + 1); 224 PUT_32BE(buf, ns, strlen(arch) + 1);
158 PUT_32BE(ns + 4, N_DESCR * 4); 225 PUT_32BE(buf, ns + 4, N_DESCR * 4);
159 PUT_32BE(ns + 8, 0x1275); 226 PUT_32BE(buf, ns + 8, 0x1275);
160 strcpy((char *) &buf[ns + 12], arch); 227 strcpy((char *) &buf[ns + 12], arch);
161 ns += 12 + strlen(arch) + 1; 228 ns += 12 + strlen(arch) + 1;
162 for (i = 0; i < N_DESCR; ++i, ns += 4) 229 for (i = 0; i < N_DESCR; ++i, ns += 4)
163 PUT_32BE(ns, descr[i]); 230 PUT_32BE(buf, ns, descr[i]);
164 231
165 /* fill in the second program header entry and the RPA note area */ 232 /* fill in the second program header entry and the RPA note area */
166 ph += ps; 233 ph += ps;
167 PUT_32BE(ph + PH_TYPE, PT_NOTE); 234 PUT_32BE(buf, ph + PH_TYPE, PT_NOTE);
168 PUT_32BE(ph + PH_OFFSET, ns); 235 PUT_32BE(buf, ph + PH_OFFSET, ns);
169 PUT_32BE(ph + PH_FILESZ, nnote2); 236 PUT_32BE(buf, ph + PH_FILESZ, nnote2);
170 237
171 /* fill in the note area we point to */ 238 /* fill in the note area we point to */
172 PUT_32BE(ns, strlen(rpaname) + 1); 239 if (rpap) {
173 PUT_32BE(ns + 4, sizeof(rpanote)); 240 /* RPA note supplied in file, just copy the whole thing over */
174 PUT_32BE(ns + 8, 0x12759999); 241 memcpy(buf + ns, rpap, nnote2);
175 strcpy((char *) &buf[ns + 12], rpaname); 242 } else {
176 ns += 12 + ROUNDUP(strlen(rpaname) + 1); 243 PUT_32BE(buf, ns, strlen(rpaname) + 1);
177 for (i = 0; i < N_RPA_DESCR; ++i, ns += 4) 244 PUT_32BE(buf, ns + 4, sizeof(rpanote));
178 PUT_32BE(ns, rpanote[i]); 245 PUT_32BE(buf, ns + 8, 0x12759999);
246 strcpy((char *) &buf[ns + 12], rpaname);
247 ns += 12 + ROUNDUP(strlen(rpaname) + 1);
248 for (i = 0; i < N_RPA_DESCR; ++i, ns += 4)
249 PUT_32BE(buf, ns, rpanote[i]);
250 }
179 251
180 /* Update the number of program headers */ 252 /* Update the number of program headers */
181 PUT_16BE(E_PHNUM, np + 2); 253 PUT_16BE(buf, E_PHNUM, np + 2);
182 254
183 /* write back */ 255 /* write back */
184 lseek(fd, (long) 0, SEEK_SET); 256 lseek(fd, (long) 0, SEEK_SET);
diff --git a/arch/powerpc/boot/dtc-src/Makefile.dtc b/arch/powerpc/boot/dtc-src/Makefile.dtc
index d607fdb8df8d..6ddf9ecac669 100644
--- a/arch/powerpc/boot/dtc-src/Makefile.dtc
+++ b/arch/powerpc/boot/dtc-src/Makefile.dtc
@@ -5,21 +5,5 @@
5# 5#
6DTC_SRCS = dtc.c flattree.c fstree.c data.c livetree.c treesource.c srcpos.c \ 6DTC_SRCS = dtc.c flattree.c fstree.c data.c livetree.c treesource.c srcpos.c \
7 checks.c 7 checks.c
8DTC_EXTRA = dtc.h srcpos.h 8DTC_GEN_SRCS = dtc-lexer.lex.c dtc-parser.tab.c
9DTC_LEXFILES = dtc-lexer.l
10DTC_BISONFILES = dtc-parser.y
11
12DTC_LEX_SRCS = $(DTC_LEXFILES:%.l=%.lex.c)
13DTC_BISON_SRCS = $(DTC_BISONFILES:%.y=%.tab.c)
14DTC_BISON_INCLUDES = $(DTC_BISONFILES:%.y=%.tab.h)
15
16DTC_GEN_SRCS = $(DTC_LEX_SRCS) $(DTC_BISON_SRCS)
17DTC_GEN_ALL = $(DTC_GEN_SRCS) $(DTC_BISON_INCLUDES)
18DTC_OBJS = $(DTC_SRCS:%.c=%.o) $(DTC_GEN_SRCS:%.c=%.o) 9DTC_OBJS = $(DTC_SRCS:%.c=%.o) $(DTC_GEN_SRCS:%.c=%.o)
19
20DTC_CLEANFILES = $(DTC_GEN_ALL)
21
22# We assume the containing Makefile system can do auto-dependencies for most
23# things, but we supply the dependencies on generated header files explicitly
24
25$(addprefix $(DTC_objdir)/,$(DTC_GEN_SRCS:%.c=%.o)): $(addprefix $(DTC_objdir)/,$(DTC_BISON_INCLUDES))
diff --git a/arch/powerpc/boot/dtc-src/checks.c b/arch/powerpc/boot/dtc-src/checks.c
index 2ce961cd414d..95485796f253 100644
--- a/arch/powerpc/boot/dtc-src/checks.c
+++ b/arch/powerpc/boot/dtc-src/checks.c
@@ -242,6 +242,42 @@ static void check_duplicate_property_names(struct check *c, struct node *dt,
242} 242}
243NODE_CHECK(duplicate_property_names, NULL, ERROR); 243NODE_CHECK(duplicate_property_names, NULL, ERROR);
244 244
245#define LOWERCASE "abcdefghijklmnopqrstuvwxyz"
246#define UPPERCASE "ABCDEFGHIJKLMNOPQRSTUVWXYZ"
247#define DIGITS "0123456789"
248#define PROPNODECHARS LOWERCASE UPPERCASE DIGITS ",._+*#?-"
249
250static void check_node_name_chars(struct check *c, struct node *dt,
251 struct node *node)
252{
253 int n = strspn(node->name, c->data);
254
255 if (n < strlen(node->name))
256 FAIL(c, "Bad character '%c' in node %s",
257 node->name[n], node->fullpath);
258}
259NODE_CHECK(node_name_chars, PROPNODECHARS "@", ERROR);
260
261static void check_node_name_format(struct check *c, struct node *dt,
262 struct node *node)
263{
264 if (strchr(get_unitname(node), '@'))
265 FAIL(c, "Node %s has multiple '@' characters in name",
266 node->fullpath);
267}
268NODE_CHECK(node_name_format, NULL, ERROR, &node_name_chars);
269
270static void check_property_name_chars(struct check *c, struct node *dt,
271 struct node *node, struct property *prop)
272{
273 int n = strspn(prop->name, c->data);
274
275 if (n < strlen(prop->name))
276 FAIL(c, "Bad character '%c' in property name \"%s\", node %s",
277 prop->name[n], prop->name, node->fullpath);
278}
279PROP_CHECK(property_name_chars, PROPNODECHARS, ERROR);
280
245static void check_explicit_phandles(struct check *c, struct node *root, 281static void check_explicit_phandles(struct check *c, struct node *root,
246 struct node *node) 282 struct node *node)
247{ 283{
@@ -280,16 +316,29 @@ NODE_CHECK(explicit_phandles, NULL, ERROR);
280static void check_name_properties(struct check *c, struct node *root, 316static void check_name_properties(struct check *c, struct node *root,
281 struct node *node) 317 struct node *node)
282{ 318{
283 struct property *prop; 319 struct property **pp, *prop = NULL;
320
321 for (pp = &node->proplist; *pp; pp = &((*pp)->next))
322 if (streq((*pp)->name, "name")) {
323 prop = *pp;
324 break;
325 }
284 326
285 prop = get_property(node, "name");
286 if (!prop) 327 if (!prop)
287 return; /* No name property, that's fine */ 328 return; /* No name property, that's fine */
288 329
289 if ((prop->val.len != node->basenamelen+1) 330 if ((prop->val.len != node->basenamelen+1)
290 || (memcmp(prop->val.val, node->name, node->basenamelen) != 0)) 331 || (memcmp(prop->val.val, node->name, node->basenamelen) != 0)) {
291 FAIL(c, "\"name\" property in %s is incorrect (\"%s\" instead" 332 FAIL(c, "\"name\" property in %s is incorrect (\"%s\" instead"
292 " of base node name)", node->fullpath, prop->val.val); 333 " of base node name)", node->fullpath, prop->val.val);
334 } else {
335 /* The name property is correct, and therefore redundant.
336 * Delete it */
337 *pp = prop->next;
338 free(prop->name);
339 data_free(prop->val);
340 free(prop);
341 }
293} 342}
294CHECK_IS_STRING(name_is_string, "name", ERROR); 343CHECK_IS_STRING(name_is_string, "name", ERROR);
295NODE_CHECK(name_properties, NULL, ERROR, &name_is_string); 344NODE_CHECK(name_properties, NULL, ERROR, &name_is_string);
@@ -301,23 +350,23 @@ NODE_CHECK(name_properties, NULL, ERROR, &name_is_string);
301static void fixup_phandle_references(struct check *c, struct node *dt, 350static void fixup_phandle_references(struct check *c, struct node *dt,
302 struct node *node, struct property *prop) 351 struct node *node, struct property *prop)
303{ 352{
304 struct marker *m = prop->val.markers; 353 struct marker *m = prop->val.markers;
305 struct node *refnode; 354 struct node *refnode;
306 cell_t phandle; 355 cell_t phandle;
307 356
308 for_each_marker_of_type(m, REF_PHANDLE) { 357 for_each_marker_of_type(m, REF_PHANDLE) {
309 assert(m->offset + sizeof(cell_t) <= prop->val.len); 358 assert(m->offset + sizeof(cell_t) <= prop->val.len);
310 359
311 refnode = get_node_by_ref(dt, m->ref); 360 refnode = get_node_by_ref(dt, m->ref);
312 if (! refnode) { 361 if (! refnode) {
313 FAIL(c, "Reference to non-existent node or label \"%s\"\n", 362 FAIL(c, "Reference to non-existent node or label \"%s\"\n",
314 m->ref); 363 m->ref);
315 continue; 364 continue;
316 } 365 }
317 366
318 phandle = get_node_phandle(dt, refnode); 367 phandle = get_node_phandle(dt, refnode);
319 *((cell_t *)(prop->val.val + m->offset)) = cpu_to_be32(phandle); 368 *((cell_t *)(prop->val.val + m->offset)) = cpu_to_fdt32(phandle);
320 } 369 }
321} 370}
322CHECK(phandle_references, NULL, NULL, fixup_phandle_references, NULL, ERROR, 371CHECK(phandle_references, NULL, NULL, fixup_phandle_references, NULL, ERROR,
323 &duplicate_node_names, &explicit_phandles); 372 &duplicate_node_names, &explicit_phandles);
@@ -498,6 +547,7 @@ TREE_CHECK(obsolete_chosen_interrupt_controller, NULL, WARN);
498 547
499static struct check *check_table[] = { 548static struct check *check_table[] = {
500 &duplicate_node_names, &duplicate_property_names, 549 &duplicate_node_names, &duplicate_property_names,
550 &node_name_chars, &node_name_format, &property_name_chars,
501 &name_is_string, &name_properties, 551 &name_is_string, &name_properties,
502 &explicit_phandles, 552 &explicit_phandles,
503 &phandle_references, &path_references, 553 &phandle_references, &path_references,
@@ -511,10 +561,7 @@ static struct check *check_table[] = {
511 &obsolete_chosen_interrupt_controller, 561 &obsolete_chosen_interrupt_controller,
512}; 562};
513 563
514int check_semantics(struct node *dt, int outversion, int boot_cpuid_phys); 564void process_checks(int force, struct boot_info *bi)
515
516void process_checks(int force, struct boot_info *bi,
517 int checkflag, int outversion, int boot_cpuid_phys)
518{ 565{
519 struct node *dt = bi->dt; 566 struct node *dt = bi->dt;
520 int i; 567 int i;
@@ -537,214 +584,4 @@ void process_checks(int force, struct boot_info *bi,
537 "output forced\n"); 584 "output forced\n");
538 } 585 }
539 } 586 }
540
541 if (checkflag) {
542 if (error) {
543 fprintf(stderr, "Warning: Skipping semantic checks due to structural errors\n");
544 } else {
545 if (!check_semantics(bi->dt, outversion,
546 boot_cpuid_phys))
547 fprintf(stderr, "Warning: Input tree has semantic errors\n");
548 }
549 }
550}
551
552/*
553 * Semantic check functions
554 */
555
556#define ERRMSG(...) if (quiet < 2) fprintf(stderr, "ERROR: " __VA_ARGS__)
557#define WARNMSG(...) if (quiet < 1) fprintf(stderr, "Warning: " __VA_ARGS__)
558
559#define DO_ERR(...) do {ERRMSG(__VA_ARGS__); ok = 0; } while (0)
560
561#define CHECK_HAVE(node, propname) \
562 do { \
563 if (! (prop = get_property((node), (propname)))) \
564 DO_ERR("Missing \"%s\" property in %s\n", (propname), \
565 (node)->fullpath); \
566 } while (0);
567
568#define CHECK_HAVE_WARN(node, propname) \
569 do { \
570 if (! (prop = get_property((node), (propname)))) \
571 WARNMSG("%s has no \"%s\" property\n", \
572 (node)->fullpath, (propname)); \
573 } while (0)
574
575#define CHECK_HAVE_STRING(node, propname) \
576 do { \
577 CHECK_HAVE((node), (propname)); \
578 if (prop && !data_is_one_string(prop->val)) \
579 DO_ERR("\"%s\" property in %s is not a string\n", \
580 (propname), (node)->fullpath); \
581 } while (0)
582
583#define CHECK_HAVE_STREQ(node, propname, value) \
584 do { \
585 CHECK_HAVE_STRING((node), (propname)); \
586 if (prop && !streq(prop->val.val, (value))) \
587 DO_ERR("%s has wrong %s, %s (should be %s\n", \
588 (node)->fullpath, (propname), \
589 prop->val.val, (value)); \
590 } while (0)
591
592#define CHECK_HAVE_ONECELL(node, propname) \
593 do { \
594 CHECK_HAVE((node), (propname)); \
595 if (prop && (prop->val.len != sizeof(cell_t))) \
596 DO_ERR("\"%s\" property in %s has wrong size %d (should be 1 cell)\n", (propname), (node)->fullpath, prop->val.len); \
597 } while (0)
598
599#define CHECK_HAVE_WARN_ONECELL(node, propname) \
600 do { \
601 CHECK_HAVE_WARN((node), (propname)); \
602 if (prop && (prop->val.len != sizeof(cell_t))) \
603 DO_ERR("\"%s\" property in %s has wrong size %d (should be 1 cell)\n", (propname), (node)->fullpath, prop->val.len); \
604 } while (0)
605
606#define CHECK_HAVE_WARN_PHANDLE(xnode, propname, root) \
607 do { \
608 struct node *ref; \
609 CHECK_HAVE_WARN_ONECELL((xnode), (propname)); \
610 if (prop) {\
611 cell_t phandle = propval_cell(prop); \
612 if ((phandle == 0) || (phandle == -1)) { \
613 DO_ERR("\"%s\" property in %s contains an invalid phandle %x\n", (propname), (xnode)->fullpath, phandle); \
614 } else { \
615 ref = get_node_by_phandle((root), propval_cell(prop)); \
616 if (! ref) \
617 DO_ERR("\"%s\" property in %s refers to non-existant phandle %x\n", (propname), (xnode)->fullpath, propval_cell(prop)); \
618 } \
619 } \
620 } while (0)
621
622#define CHECK_HAVE_WARN_STRING(node, propname) \
623 do { \
624 CHECK_HAVE_WARN((node), (propname)); \
625 if (prop && !data_is_one_string(prop->val)) \
626 DO_ERR("\"%s\" property in %s is not a string\n", \
627 (propname), (node)->fullpath); \
628 } while (0)
629
630static int check_root(struct node *root)
631{
632 struct property *prop;
633 int ok = 1;
634
635 CHECK_HAVE_STRING(root, "model");
636 CHECK_HAVE_WARN(root, "compatible");
637
638 return ok;
639}
640
641static int check_cpus(struct node *root, int outversion, int boot_cpuid_phys)
642{
643 struct node *cpus, *cpu;
644 struct property *prop;
645 struct node *bootcpu = NULL;
646 int ok = 1;
647
648 cpus = get_subnode(root, "cpus");
649 if (! cpus) {
650 ERRMSG("Missing /cpus node\n");
651 return 0;
652 }
653
654 if (cpus->addr_cells != 1)
655 DO_ERR("%s has bad #address-cells value %d (should be 1)\n",
656 cpus->fullpath, cpus->addr_cells);
657 if (cpus->size_cells != 0)
658 DO_ERR("%s has bad #size-cells value %d (should be 0)\n",
659 cpus->fullpath, cpus->size_cells);
660
661 for_each_child(cpus, cpu) {
662 CHECK_HAVE_STREQ(cpu, "device_type", "cpu");
663
664 CHECK_HAVE_ONECELL(cpu, "reg");
665 if (prop) {
666 cell_t unitnum;
667 char *eptr;
668
669 unitnum = strtol(get_unitname(cpu), &eptr, 16);
670 if (*eptr) {
671 WARNMSG("%s has bad format unit name %s (should be CPU number\n",
672 cpu->fullpath, get_unitname(cpu));
673 } else if (unitnum != propval_cell(prop)) {
674 WARNMSG("%s unit name \"%s\" does not match \"reg\" property <%x>\n",
675 cpu->fullpath, get_unitname(cpu),
676 propval_cell(prop));
677 }
678 }
679
680/* CHECK_HAVE_ONECELL(cpu, "d-cache-line-size"); */
681/* CHECK_HAVE_ONECELL(cpu, "i-cache-line-size"); */
682 CHECK_HAVE_ONECELL(cpu, "d-cache-size");
683 CHECK_HAVE_ONECELL(cpu, "i-cache-size");
684
685 CHECK_HAVE_WARN_ONECELL(cpu, "clock-frequency");
686 CHECK_HAVE_WARN_ONECELL(cpu, "timebase-frequency");
687
688 prop = get_property(cpu, "linux,boot-cpu");
689 if (prop) {
690 if (prop->val.len)
691 WARNMSG("\"linux,boot-cpu\" property in %s is non-empty\n",
692 cpu->fullpath);
693 if (bootcpu)
694 DO_ERR("Multiple boot cpus (%s and %s)\n",
695 bootcpu->fullpath, cpu->fullpath);
696 else
697 bootcpu = cpu;
698 }
699 }
700
701 if (outversion < 2) {
702 if (! bootcpu)
703 WARNMSG("No cpu has \"linux,boot-cpu\" property\n");
704 } else {
705 if (bootcpu)
706 WARNMSG("\"linux,boot-cpu\" property is deprecated in blob version 2 or higher\n");
707 if (boot_cpuid_phys == 0xfeedbeef)
708 WARNMSG("physical boot CPU not set. Use -b option to set\n");
709 }
710
711 return ok;
712}
713
714static int check_memory(struct node *root)
715{
716 struct node *mem;
717 struct property *prop;
718 int nnodes = 0;
719 int ok = 1;
720
721 for_each_child(root, mem) {
722 if (! strneq(mem->name, "memory", mem->basenamelen))
723 continue;
724
725 nnodes++;
726
727 CHECK_HAVE_STREQ(mem, "device_type", "memory");
728 CHECK_HAVE(mem, "reg");
729 }
730
731 if (nnodes == 0) {
732 ERRMSG("No memory nodes\n");
733 return 0;
734 }
735
736 return ok;
737}
738
739int check_semantics(struct node *dt, int outversion, int boot_cpuid_phys)
740{
741 int ok = 1;
742
743 ok = ok && check_root(dt);
744 ok = ok && check_cpus(dt, outversion, boot_cpuid_phys);
745 ok = ok && check_memory(dt);
746 if (! ok)
747 return 0;
748
749 return 1;
750} 587}
diff --git a/arch/powerpc/boot/dtc-src/data.c b/arch/powerpc/boot/dtc-src/data.c
index a94718c731a9..dd2e3d39d4c1 100644
--- a/arch/powerpc/boot/dtc-src/data.c
+++ b/arch/powerpc/boot/dtc-src/data.c
@@ -32,8 +32,6 @@ void data_free(struct data d)
32 m = nm; 32 m = nm;
33 } 33 }
34 34
35 assert(!d.val || d.asize);
36
37 if (d.val) 35 if (d.val)
38 free(d.val); 36 free(d.val);
39} 37}
@@ -43,9 +41,6 @@ struct data data_grow_for(struct data d, int xlen)
43 struct data nd; 41 struct data nd;
44 int newsize; 42 int newsize;
45 43
46 /* we must start with an allocated datum */
47 assert(!d.val || d.asize);
48
49 if (xlen == 0) 44 if (xlen == 0)
50 return d; 45 return d;
51 46
@@ -56,11 +51,8 @@ struct data data_grow_for(struct data d, int xlen)
56 while ((d.len + xlen) > newsize) 51 while ((d.len + xlen) > newsize)
57 newsize *= 2; 52 newsize *= 2;
58 53
59 nd.asize = newsize;
60 nd.val = xrealloc(d.val, newsize); 54 nd.val = xrealloc(d.val, newsize);
61 55
62 assert(nd.asize >= (d.len + xlen));
63
64 return nd; 56 return nd;
65} 57}
66 58
@@ -83,16 +75,11 @@ static char get_oct_char(const char *s, int *i)
83 long val; 75 long val;
84 76
85 x[3] = '\0'; 77 x[3] = '\0';
86 x[0] = s[(*i)]; 78 strncpy(x, s + *i, 3);
87 if (x[0]) {
88 x[1] = s[(*i)+1];
89 if (x[1])
90 x[2] = s[(*i)+2];
91 }
92 79
93 val = strtol(x, &endx, 8); 80 val = strtol(x, &endx, 8);
94 if ((endx - x) == 0) 81
95 fprintf(stderr, "Empty \\nnn escape\n"); 82 assert(endx > x);
96 83
97 (*i) += endx - x; 84 (*i) += endx - x;
98 return val; 85 return val;
@@ -105,13 +92,11 @@ static char get_hex_char(const char *s, int *i)
105 long val; 92 long val;
106 93
107 x[2] = '\0'; 94 x[2] = '\0';
108 x[0] = s[(*i)]; 95 strncpy(x, s + *i, 2);
109 if (x[0])
110 x[1] = s[(*i)+1];
111 96
112 val = strtol(x, &endx, 16); 97 val = strtol(x, &endx, 16);
113 if ((endx - x) == 0) 98 if (!(endx > x))
114 fprintf(stderr, "Empty \\x escape\n"); 99 die("\\x used with no following hex digits\n");
115 100
116 (*i) += endx - x; 101 (*i) += endx - x;
117 return val; 102 return val;
@@ -182,14 +167,29 @@ struct data data_copy_escape_string(const char *s, int len)
182 return d; 167 return d;
183} 168}
184 169
185struct data data_copy_file(FILE *f, size_t len) 170struct data data_copy_file(FILE *f, size_t maxlen)
186{ 171{
187 struct data d; 172 struct data d = empty_data;
188 173
189 d = data_grow_for(empty_data, len); 174 while (!feof(f) && (d.len < maxlen)) {
175 size_t chunksize, ret;
190 176
191 d.len = len; 177 if (maxlen == -1)
192 fread(d.val, len, 1, f); 178 chunksize = 4096;
179 else
180 chunksize = maxlen - d.len;
181
182 d = data_grow_for(d, chunksize);
183 ret = fread(d.val + d.len, 1, chunksize, f);
184
185 if (ferror(f))
186 die("Error reading file into data: %s", strerror(errno));
187
188 if (d.len + ret < d.len)
189 die("Overflow reading file into data\n");
190
191 d.len += ret;
192 }
193 193
194 return d; 194 return d;
195} 195}
@@ -247,7 +247,7 @@ struct data data_merge(struct data d1, struct data d2)
247 247
248struct data data_append_cell(struct data d, cell_t word) 248struct data data_append_cell(struct data d, cell_t word)
249{ 249{
250 cell_t beword = cpu_to_be32(word); 250 cell_t beword = cpu_to_fdt32(word);
251 251
252 return data_append_data(d, &beword, sizeof(beword)); 252 return data_append_data(d, &beword, sizeof(beword));
253} 253}
@@ -256,15 +256,15 @@ struct data data_append_re(struct data d, const struct fdt_reserve_entry *re)
256{ 256{
257 struct fdt_reserve_entry bere; 257 struct fdt_reserve_entry bere;
258 258
259 bere.address = cpu_to_be64(re->address); 259 bere.address = cpu_to_fdt64(re->address);
260 bere.size = cpu_to_be64(re->size); 260 bere.size = cpu_to_fdt64(re->size);
261 261
262 return data_append_data(d, &bere, sizeof(bere)); 262 return data_append_data(d, &bere, sizeof(bere));
263} 263}
264 264
265struct data data_append_addr(struct data d, u64 addr) 265struct data data_append_addr(struct data d, uint64_t addr)
266{ 266{
267 u64 beaddr = cpu_to_be64(addr); 267 uint64_t beaddr = cpu_to_fdt64(addr);
268 268
269 return data_append_data(d, &beaddr, sizeof(beaddr)); 269 return data_append_data(d, &beaddr, sizeof(beaddr));
270} 270}
diff --git a/arch/powerpc/boot/dtc-src/dtc-lexer.l b/arch/powerpc/boot/dtc-src/dtc-lexer.l
index c811b221b31e..44dbfd3f0976 100644
--- a/arch/powerpc/boot/dtc-src/dtc-lexer.l
+++ b/arch/powerpc/boot/dtc-src/dtc-lexer.l
@@ -28,6 +28,10 @@
28PROPNODECHAR [a-zA-Z0-9,._+*#?@-] 28PROPNODECHAR [a-zA-Z0-9,._+*#?@-]
29PATHCHAR ({PROPNODECHAR}|[/]) 29PATHCHAR ({PROPNODECHAR}|[/])
30LABEL [a-zA-Z_][a-zA-Z0-9_]* 30LABEL [a-zA-Z_][a-zA-Z0-9_]*
31STRING \"([^\\"]|\\.)*\"
32WS [[:space:]]
33COMMENT "/*"([^*]|\*+[^*/])*\*+"/"
34LINECOMMENT "//".*\n
31 35
32%{ 36%{
33#include "dtc.h" 37#include "dtc.h"
@@ -52,29 +56,26 @@ static int dts_version; /* = 0 */
52 DPRINT("<V1>\n"); \ 56 DPRINT("<V1>\n"); \
53 BEGIN(V1); \ 57 BEGIN(V1); \
54 } 58 }
59
60static void push_input_file(const char *filename);
61static int pop_input_file(void);
55%} 62%}
56 63
57%% 64%%
58<*>"/include/" BEGIN(INCLUDE); 65<*>"/include/"{WS}*{STRING} {
59 66 char *name = strchr(yytext, '\"') + 1;
60<INCLUDE>\"[^"\n]*\" { 67 yytext[yyleng-1] = '\0';
61 yytext[strlen(yytext) - 1] = 0; 68 push_input_file(name);
62 if (!push_input_file(yytext + 1)) {
63 /* Some unrecoverable error.*/
64 exit(1);
65 }
66 BEGIN_DEFAULT();
67 } 69 }
68 70
69
70<*><<EOF>> { 71<*><<EOF>> {
71 if (!pop_input_file()) { 72 if (!pop_input_file()) {
72 yyterminate(); 73 yyterminate();
73 } 74 }
74 } 75 }
75 76
76<*>\"([^\\"]|\\.)*\" { 77<*>{STRING} {
77 yylloc.filenum = srcpos_filenum; 78 yylloc.file = srcpos_file;
78 yylloc.first_line = yylineno; 79 yylloc.first_line = yylineno;
79 DPRINT("String: %s\n", yytext); 80 DPRINT("String: %s\n", yytext);
80 yylval.data = data_copy_escape_string(yytext+1, 81 yylval.data = data_copy_escape_string(yytext+1,
@@ -84,7 +85,7 @@ static int dts_version; /* = 0 */
84 } 85 }
85 86
86<*>"/dts-v1/" { 87<*>"/dts-v1/" {
87 yylloc.filenum = srcpos_filenum; 88 yylloc.file = srcpos_file;
88 yylloc.first_line = yylineno; 89 yylloc.first_line = yylineno;
89 DPRINT("Keyword: /dts-v1/\n"); 90 DPRINT("Keyword: /dts-v1/\n");
90 dts_version = 1; 91 dts_version = 1;
@@ -93,7 +94,7 @@ static int dts_version; /* = 0 */
93 } 94 }
94 95
95<*>"/memreserve/" { 96<*>"/memreserve/" {
96 yylloc.filenum = srcpos_filenum; 97 yylloc.file = srcpos_file;
97 yylloc.first_line = yylineno; 98 yylloc.first_line = yylineno;
98 DPRINT("Keyword: /memreserve/\n"); 99 DPRINT("Keyword: /memreserve/\n");
99 BEGIN_DEFAULT(); 100 BEGIN_DEFAULT();
@@ -101,7 +102,7 @@ static int dts_version; /* = 0 */
101 } 102 }
102 103
103<*>{LABEL}: { 104<*>{LABEL}: {
104 yylloc.filenum = srcpos_filenum; 105 yylloc.file = srcpos_file;
105 yylloc.first_line = yylineno; 106 yylloc.first_line = yylineno;
106 DPRINT("Label: %s\n", yytext); 107 DPRINT("Label: %s\n", yytext);
107 yylval.labelref = strdup(yytext); 108 yylval.labelref = strdup(yytext);
@@ -110,7 +111,7 @@ static int dts_version; /* = 0 */
110 } 111 }
111 112
112<INITIAL>[bodh]# { 113<INITIAL>[bodh]# {
113 yylloc.filenum = srcpos_filenum; 114 yylloc.file = srcpos_file;
114 yylloc.first_line = yylineno; 115 yylloc.first_line = yylineno;
115 if (*yytext == 'b') 116 if (*yytext == 'b')
116 yylval.cbase = 2; 117 yylval.cbase = 2;
@@ -125,7 +126,7 @@ static int dts_version; /* = 0 */
125 } 126 }
126 127
127<INITIAL>[0-9a-fA-F]+ { 128<INITIAL>[0-9a-fA-F]+ {
128 yylloc.filenum = srcpos_filenum; 129 yylloc.file = srcpos_file;
129 yylloc.first_line = yylineno; 130 yylloc.first_line = yylineno;
130 yylval.literal = strdup(yytext); 131 yylval.literal = strdup(yytext);
131 DPRINT("Literal: '%s'\n", yylval.literal); 132 DPRINT("Literal: '%s'\n", yylval.literal);
@@ -133,7 +134,7 @@ static int dts_version; /* = 0 */
133 } 134 }
134 135
135<V1>[0-9]+|0[xX][0-9a-fA-F]+ { 136<V1>[0-9]+|0[xX][0-9a-fA-F]+ {
136 yylloc.filenum = srcpos_filenum; 137 yylloc.file = srcpos_file;
137 yylloc.first_line = yylineno; 138 yylloc.first_line = yylineno;
138 yylval.literal = strdup(yytext); 139 yylval.literal = strdup(yytext);
139 DPRINT("Literal: '%s'\n", yylval.literal); 140 DPRINT("Literal: '%s'\n", yylval.literal);
@@ -141,7 +142,7 @@ static int dts_version; /* = 0 */
141 } 142 }
142 143
143\&{LABEL} { /* label reference */ 144\&{LABEL} { /* label reference */
144 yylloc.filenum = srcpos_filenum; 145 yylloc.file = srcpos_file;
145 yylloc.first_line = yylineno; 146 yylloc.first_line = yylineno;
146 DPRINT("Ref: %s\n", yytext+1); 147 DPRINT("Ref: %s\n", yytext+1);
147 yylval.labelref = strdup(yytext+1); 148 yylval.labelref = strdup(yytext+1);
@@ -149,7 +150,7 @@ static int dts_version; /* = 0 */
149 } 150 }
150 151
151"&{/"{PATHCHAR}+\} { /* new-style path reference */ 152"&{/"{PATHCHAR}+\} { /* new-style path reference */
152 yylloc.filenum = srcpos_filenum; 153 yylloc.file = srcpos_file;
153 yylloc.first_line = yylineno; 154 yylloc.first_line = yylineno;
154 yytext[yyleng-1] = '\0'; 155 yytext[yyleng-1] = '\0';
155 DPRINT("Ref: %s\n", yytext+2); 156 DPRINT("Ref: %s\n", yytext+2);
@@ -158,7 +159,7 @@ static int dts_version; /* = 0 */
158 } 159 }
159 160
160<INITIAL>"&/"{PATHCHAR}+ { /* old-style path reference */ 161<INITIAL>"&/"{PATHCHAR}+ { /* old-style path reference */
161 yylloc.filenum = srcpos_filenum; 162 yylloc.file = srcpos_file;
162 yylloc.first_line = yylineno; 163 yylloc.first_line = yylineno;
163 DPRINT("Ref: %s\n", yytext+1); 164 DPRINT("Ref: %s\n", yytext+1);
164 yylval.labelref = strdup(yytext+1); 165 yylval.labelref = strdup(yytext+1);
@@ -166,7 +167,7 @@ static int dts_version; /* = 0 */
166 } 167 }
167 168
168<BYTESTRING>[0-9a-fA-F]{2} { 169<BYTESTRING>[0-9a-fA-F]{2} {
169 yylloc.filenum = srcpos_filenum; 170 yylloc.file = srcpos_file;
170 yylloc.first_line = yylineno; 171 yylloc.first_line = yylineno;
171 yylval.byte = strtol(yytext, NULL, 16); 172 yylval.byte = strtol(yytext, NULL, 16);
172 DPRINT("Byte: %02x\n", (int)yylval.byte); 173 DPRINT("Byte: %02x\n", (int)yylval.byte);
@@ -174,7 +175,7 @@ static int dts_version; /* = 0 */
174 } 175 }
175 176
176<BYTESTRING>"]" { 177<BYTESTRING>"]" {
177 yylloc.filenum = srcpos_filenum; 178 yylloc.file = srcpos_file;
178 yylloc.first_line = yylineno; 179 yylloc.first_line = yylineno;
179 DPRINT("/BYTESTRING\n"); 180 DPRINT("/BYTESTRING\n");
180 BEGIN_DEFAULT(); 181 BEGIN_DEFAULT();
@@ -182,7 +183,7 @@ static int dts_version; /* = 0 */
182 } 183 }
183 184
184<PROPNODENAME>{PROPNODECHAR}+ { 185<PROPNODENAME>{PROPNODECHAR}+ {
185 yylloc.filenum = srcpos_filenum; 186 yylloc.file = srcpos_file;
186 yylloc.first_line = yylineno; 187 yylloc.first_line = yylineno;
187 DPRINT("PropNodeName: %s\n", yytext); 188 DPRINT("PropNodeName: %s\n", yytext);
188 yylval.propnodename = strdup(yytext); 189 yylval.propnodename = strdup(yytext);
@@ -190,20 +191,19 @@ static int dts_version; /* = 0 */
190 return DT_PROPNODENAME; 191 return DT_PROPNODENAME;
191 } 192 }
192 193
193 194"/incbin/" {
194<*>[[:space:]]+ /* eat whitespace */ 195 yylloc.file = srcpos_file;
195
196<*>"/*"([^*]|\*+[^*/])*\*+"/" {
197 yylloc.filenum = srcpos_filenum;
198 yylloc.first_line = yylineno; 196 yylloc.first_line = yylineno;
199 DPRINT("Comment: %s\n", yytext); 197 DPRINT("Binary Include\n");
200 /* eat comments */ 198 return DT_INCBIN;
201 } 199 }
202 200
203<*>"//".*\n /* eat line comments */ 201<*>{WS}+ /* eat whitespace */
202<*>{COMMENT}+ /* eat C-style comments */
203<*>{LINECOMMENT}+ /* eat C++-style comments */
204 204
205<*>. { 205<*>. {
206 yylloc.filenum = srcpos_filenum; 206 yylloc.file = srcpos_file;
207 yylloc.first_line = yylineno; 207 yylloc.first_line = yylineno;
208 DPRINT("Char: %c (\\x%02x)\n", yytext[0], 208 DPRINT("Char: %c (\\x%02x)\n", yytext[0],
209 (unsigned)yytext[0]); 209 (unsigned)yytext[0]);
@@ -227,14 +227,13 @@ static int dts_version; /* = 0 */
227 */ 227 */
228 228
229struct incl_file { 229struct incl_file {
230 int filenum; 230 struct dtc_file *file;
231 FILE *file;
232 YY_BUFFER_STATE yy_prev_buf; 231 YY_BUFFER_STATE yy_prev_buf;
233 int yy_prev_lineno; 232 int yy_prev_lineno;
234 struct incl_file *prev; 233 struct incl_file *prev;
235}; 234};
236 235
237struct incl_file *incl_file_stack; 236static struct incl_file *incl_file_stack;
238 237
239 238
240/* 239/*
@@ -245,36 +244,34 @@ struct incl_file *incl_file_stack;
245static int incl_depth = 0; 244static int incl_depth = 0;
246 245
247 246
248int push_input_file(const char *filename) 247static void push_input_file(const char *filename)
249{ 248{
250 FILE *f;
251 struct incl_file *incl_file; 249 struct incl_file *incl_file;
250 struct dtc_file *newfile;
251 struct search_path search, *searchptr = NULL;
252 252
253 if (!filename) { 253 assert(filename);
254 yyerror("No include file name given.");
255 return 0;
256 }
257 254
258 if (incl_depth++ >= MAX_INCLUDE_DEPTH) { 255 if (incl_depth++ >= MAX_INCLUDE_DEPTH)
259 yyerror("Includes nested too deeply"); 256 die("Includes nested too deeply");
260 return 0; 257
258 if (srcpos_file) {
259 search.dir = srcpos_file->dir;
260 search.next = NULL;
261 search.prev = NULL;
262 searchptr = &search;
261 } 263 }
262 264
263 f = dtc_open_file(filename); 265 newfile = dtc_open_file(filename, searchptr);
264 266
265 incl_file = malloc(sizeof(struct incl_file)); 267 incl_file = xmalloc(sizeof(struct incl_file));
266 if (!incl_file) {
267 yyerror("Can not allocate include file space.");
268 return 0;
269 }
270 268
271 /* 269 /*
272 * Save current context. 270 * Save current context.
273 */ 271 */
274 incl_file->yy_prev_buf = YY_CURRENT_BUFFER; 272 incl_file->yy_prev_buf = YY_CURRENT_BUFFER;
275 incl_file->yy_prev_lineno = yylineno; 273 incl_file->yy_prev_lineno = yylineno;
276 incl_file->filenum = srcpos_filenum; 274 incl_file->file = srcpos_file;
277 incl_file->file = yyin;
278 incl_file->prev = incl_file_stack; 275 incl_file->prev = incl_file_stack;
279 276
280 incl_file_stack = incl_file; 277 incl_file_stack = incl_file;
@@ -282,23 +279,21 @@ int push_input_file(const char *filename)
282 /* 279 /*
283 * Establish new context. 280 * Establish new context.
284 */ 281 */
285 srcpos_filenum = lookup_file_name(filename, 0); 282 srcpos_file = newfile;
286 yylineno = 1; 283 yylineno = 1;
287 yyin = f; 284 yyin = newfile->file;
288 yy_switch_to_buffer(yy_create_buffer(yyin, YY_BUF_SIZE)); 285 yy_switch_to_buffer(yy_create_buffer(yyin, YY_BUF_SIZE));
289
290 return 1;
291} 286}
292 287
293 288
294int pop_input_file(void) 289static int pop_input_file(void)
295{ 290{
296 struct incl_file *incl_file; 291 struct incl_file *incl_file;
297 292
298 if (incl_file_stack == 0) 293 if (incl_file_stack == 0)
299 return 0; 294 return 0;
300 295
301 fclose(yyin); 296 dtc_close_file(srcpos_file);
302 297
303 /* 298 /*
304 * Pop. 299 * Pop.
@@ -313,16 +308,13 @@ int pop_input_file(void)
313 yy_delete_buffer(YY_CURRENT_BUFFER); 308 yy_delete_buffer(YY_CURRENT_BUFFER);
314 yy_switch_to_buffer(incl_file->yy_prev_buf); 309 yy_switch_to_buffer(incl_file->yy_prev_buf);
315 yylineno = incl_file->yy_prev_lineno; 310 yylineno = incl_file->yy_prev_lineno;
316 srcpos_filenum = incl_file->filenum; 311 srcpos_file = incl_file->file;
317 yyin = incl_file->file; 312 yyin = incl_file->file ? incl_file->file->file : NULL;
318 313
319 /* 314 /*
320 * Free old state. 315 * Free old state.
321 */ 316 */
322 free(incl_file); 317 free(incl_file);
323 318
324 if (YY_CURRENT_BUFFER == 0)
325 return 0;
326
327 return 1; 319 return 1;
328} 320}
diff --git a/arch/powerpc/boot/dtc-src/dtc-lexer.lex.c_shipped b/arch/powerpc/boot/dtc-src/dtc-lexer.lex.c_shipped
index d0f742460f92..ac392cb040f6 100644
--- a/arch/powerpc/boot/dtc-src/dtc-lexer.lex.c_shipped
+++ b/arch/powerpc/boot/dtc-src/dtc-lexer.lex.c_shipped
@@ -9,7 +9,7 @@
9#define FLEX_SCANNER 9#define FLEX_SCANNER
10#define YY_FLEX_MAJOR_VERSION 2 10#define YY_FLEX_MAJOR_VERSION 2
11#define YY_FLEX_MINOR_VERSION 5 11#define YY_FLEX_MINOR_VERSION 5
12#define YY_FLEX_SUBMINOR_VERSION 33 12#define YY_FLEX_SUBMINOR_VERSION 34
13#if YY_FLEX_SUBMINOR_VERSION > 0 13#if YY_FLEX_SUBMINOR_VERSION > 0
14#define FLEX_BETA 14#define FLEX_BETA
15#endif 15#endif
@@ -31,7 +31,7 @@
31 31
32/* C99 systems have <inttypes.h>. Non-C99 systems may or may not. */ 32/* C99 systems have <inttypes.h>. Non-C99 systems may or may not. */
33 33
34#if __STDC_VERSION__ >= 199901L 34#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L
35 35
36/* C99 says to define __STDC_LIMIT_MACROS before including stdint.h, 36/* C99 says to define __STDC_LIMIT_MACROS before including stdint.h,
37 * if you want the limit (max/min) macros for int types. 37 * if you want the limit (max/min) macros for int types.
@@ -94,11 +94,12 @@ typedef unsigned int flex_uint32_t;
94 94
95#else /* ! __cplusplus */ 95#else /* ! __cplusplus */
96 96
97#if __STDC__ 97/* C99 requires __STDC__ to be defined as 1. */
98#if defined (__STDC__)
98 99
99#define YY_USE_CONST 100#define YY_USE_CONST
100 101
101#endif /* __STDC__ */ 102#endif /* defined (__STDC__) */
102#endif /* ! __cplusplus */ 103#endif /* ! __cplusplus */
103 104
104#ifdef YY_USE_CONST 105#ifdef YY_USE_CONST
@@ -194,11 +195,13 @@ extern FILE *yyin, *yyout;
194/* The following is because we cannot portably get our hands on size_t 195/* The following is because we cannot portably get our hands on size_t
195 * (without autoconf's help, which isn't available because we want 196 * (without autoconf's help, which isn't available because we want
196 * flex-generated scanners to compile on their own). 197 * flex-generated scanners to compile on their own).
198 * Given that the standard has decreed that size_t exists since 1989,
199 * I guess we can afford to depend on it. Manoj.
197 */ 200 */
198 201
199#ifndef YY_TYPEDEF_YY_SIZE_T 202#ifndef YY_TYPEDEF_YY_SIZE_T
200#define YY_TYPEDEF_YY_SIZE_T 203#define YY_TYPEDEF_YY_SIZE_T
201typedef unsigned int yy_size_t; 204typedef size_t yy_size_t;
202#endif 205#endif
203 206
204#ifndef YY_STRUCT_YY_BUFFER_STATE 207#ifndef YY_STRUCT_YY_BUFFER_STATE
@@ -349,7 +352,7 @@ void yyfree (void * );
349 352
350/* Begin user sect3 */ 353/* Begin user sect3 */
351 354
352#define yywrap() 1 355#define yywrap(n) 1
353#define YY_SKIP_YYWRAP 356#define YY_SKIP_YYWRAP
354 357
355typedef unsigned char YY_CHAR; 358typedef unsigned char YY_CHAR;
@@ -389,19 +392,20 @@ struct yy_trans_info
389 flex_int32_t yy_verify; 392 flex_int32_t yy_verify;
390 flex_int32_t yy_nxt; 393 flex_int32_t yy_nxt;
391 }; 394 };
392static yyconst flex_int16_t yy_accept[94] = 395static yyconst flex_int16_t yy_accept[104] =
393 { 0, 396 { 0,
394 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 397 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
395 21, 19, 16, 16, 19, 19, 19, 8, 8, 19, 398 21, 19, 16, 16, 19, 19, 19, 7, 7, 19,
396 8, 19, 19, 19, 19, 14, 15, 15, 19, 9, 399 7, 19, 19, 19, 19, 13, 14, 14, 19, 8,
397 9, 16, 0, 3, 0, 0, 10, 0, 0, 0, 400 8, 16, 0, 2, 0, 0, 9, 0, 0, 0,
398 0, 0, 0, 8, 8, 6, 0, 7, 0, 2, 401 0, 0, 0, 7, 7, 5, 0, 6, 0, 12,
399 0, 13, 13, 15, 15, 9, 0, 12, 10, 0, 402 12, 14, 14, 8, 0, 11, 9, 0, 0, 0,
400 0, 0, 0, 18, 0, 0, 0, 2, 9, 0, 403 0, 18, 0, 0, 0, 0, 8, 0, 17, 0,
401 17, 0, 0, 0, 11, 0, 0, 0, 0, 0, 404 0, 0, 0, 0, 10, 0, 0, 0, 0, 0,
402 0, 0, 0, 0, 4, 0, 0, 1, 0, 0, 405 0, 0, 0, 0, 0, 0, 0, 0, 3, 15,
403 0, 5, 0 406 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
404 407
408 0, 4, 0
405 } ; 409 } ;
406 410
407static yyconst flex_int32_t yy_ec[256] = 411static yyconst flex_int32_t yy_ec[256] =
@@ -444,122 +448,126 @@ static yyconst flex_int32_t yy_meta[36] =
444 7, 7, 7, 8, 1 448 7, 7, 7, 8, 1
445 } ; 449 } ;
446 450
447static yyconst flex_int16_t yy_base[107] = 451static yyconst flex_int16_t yy_base[117] =
448 { 0, 452 { 0,
449 0, 0, 32, 0, 53, 0, 76, 0, 108, 111, 453 0, 0, 30, 0, 44, 0, 67, 0, 97, 105,
450 280, 288, 37, 39, 33, 36, 106, 0, 123, 146, 454 302, 303, 35, 44, 40, 94, 112, 0, 129, 152,
451 255, 251, 45, 0, 159, 288, 0, 53, 108, 172, 455 296, 295, 159, 0, 176, 303, 0, 116, 95, 165,
452 114, 127, 158, 288, 245, 0, 0, 234, 235, 236, 456 49, 46, 102, 303, 296, 0, 0, 288, 290, 293,
453 197, 195, 199, 0, 0, 288, 0, 288, 160, 288, 457 264, 266, 270, 0, 0, 303, 0, 303, 264, 303,
454 183, 288, 0, 0, 183, 182, 0, 0, 0, 0, 458 0, 0, 195, 101, 0, 0, 0, 0, 284, 125,
455 204, 189, 207, 288, 179, 187, 180, 194, 0, 171, 459 277, 265, 225, 230, 216, 218, 0, 202, 224, 221,
456 288, 196, 178, 174, 288, 169, 169, 177, 165, 153, 460 217, 107, 196, 188, 303, 206, 179, 186, 178, 185,
457 143, 155, 137, 118, 288, 122, 42, 288, 36, 36, 461 183, 162, 161, 150, 169, 160, 145, 125, 303, 303,
458 40, 288, 288, 212, 218, 223, 229, 234, 239, 245, 462 137, 109, 190, 103, 203, 167, 108, 197, 303, 123,
459 463
460 251, 255, 262, 270, 275, 280 464 29, 303, 303, 215, 221, 226, 229, 234, 240, 246,
465 250, 257, 265, 270, 275, 282
461 } ; 466 } ;
462 467
463static yyconst flex_int16_t yy_def[107] = 468static yyconst flex_int16_t yy_def[117] =
464 { 0, 469 { 0,
465 93, 1, 1, 3, 3, 5, 93, 7, 3, 3, 470 103, 1, 1, 3, 3, 5, 103, 7, 3, 3,
466 93, 93, 93, 93, 94, 95, 93, 96, 93, 19, 471 103, 103, 103, 103, 104, 105, 103, 106, 103, 19,
467 19, 20, 97, 98, 20, 93, 99, 100, 95, 93, 472 19, 20, 103, 107, 20, 103, 108, 109, 105, 103,
468 93, 93, 94, 93, 94, 101, 102, 93, 103, 104, 473 103, 103, 104, 103, 104, 110, 111, 103, 112, 113,
469 93, 93, 93, 96, 19, 93, 20, 93, 97, 93, 474 103, 103, 103, 106, 19, 103, 20, 103, 103, 103,
470 97, 93, 20, 99, 100, 93, 105, 101, 102, 106, 475 20, 108, 109, 103, 114, 110, 111, 115, 112, 112,
471 103, 103, 104, 93, 93, 93, 93, 94, 105, 106, 476 113, 103, 103, 103, 103, 103, 114, 115, 103, 103,
472 93, 93, 93, 93, 93, 93, 93, 93, 93, 93, 477 103, 103, 103, 103, 103, 103, 103, 103, 103, 103,
473 93, 93, 93, 93, 93, 93, 93, 93, 93, 93, 478 103, 103, 103, 103, 103, 103, 103, 103, 103, 103,
474 93, 93, 0, 93, 93, 93, 93, 93, 93, 93, 479 103, 103, 103, 103, 103, 116, 103, 116, 103, 116,
475 480
476 93, 93, 93, 93, 93, 93 481 103, 103, 0, 103, 103, 103, 103, 103, 103, 103,
482 103, 103, 103, 103, 103, 103
477 } ; 483 } ;
478 484
479static yyconst flex_int16_t yy_nxt[324] = 485static yyconst flex_int16_t yy_nxt[339] =
480 { 0, 486 { 0,
481 12, 13, 14, 15, 12, 16, 12, 12, 12, 17, 487 12, 13, 14, 15, 12, 16, 12, 12, 12, 17,
482 18, 18, 18, 12, 19, 20, 20, 12, 12, 21, 488 18, 18, 18, 12, 19, 20, 20, 12, 12, 21,
483 19, 21, 19, 22, 20, 20, 20, 20, 20, 20, 489 19, 21, 19, 22, 20, 20, 20, 20, 20, 20,
484 20, 20, 20, 12, 12, 23, 34, 12, 32, 32, 490 20, 20, 20, 12, 12, 12, 32, 32, 102, 23,
485 32, 32, 12, 12, 12, 36, 20, 33, 50, 92, 491 12, 12, 12, 34, 20, 32, 32, 32, 32, 20,
486 35, 20, 20, 20, 20, 20, 15, 54, 91, 54, 492 20, 20, 20, 20, 24, 24, 24, 35, 25, 54,
487 54, 54, 51, 24, 24, 24, 46, 25, 90, 38, 493 54, 54, 26, 25, 25, 25, 25, 12, 13, 14,
488 89, 26, 25, 25, 25, 25, 12, 13, 14, 15, 494 15, 27, 12, 27, 27, 27, 23, 27, 27, 27,
489 27, 12, 27, 27, 27, 17, 27, 27, 27, 12, 495 12, 28, 28, 28, 12, 12, 28, 28, 28, 28,
490 28, 28, 28, 12, 12, 28, 28, 28, 28, 28, 496 28, 28, 28, 28, 28, 28, 28, 28, 28, 28,
491 497
492 28, 28, 28, 28, 28, 28, 28, 28, 28, 12, 498 12, 12, 29, 36, 103, 34, 17, 30, 31, 31,
493 12, 15, 39, 29, 15, 40, 29, 93, 30, 31, 499 29, 54, 54, 54, 17, 30, 31, 31, 39, 35,
494 31, 30, 31, 31, 56, 56, 56, 41, 32, 32, 500 52, 40, 52, 52, 52, 103, 78, 38, 38, 46,
495 42, 88, 43, 45, 45, 45, 46, 45, 47, 47, 501 101, 60, 79, 41, 69, 97, 42, 94, 43, 45,
496 87, 38, 45, 45, 45, 45, 47, 47, 47, 47, 502 45, 45, 46, 45, 47, 47, 93, 92, 45, 45,
497 47, 47, 47, 47, 47, 47, 47, 47, 47, 86, 503 45, 45, 47, 47, 47, 47, 47, 47, 47, 47,
498 47, 34, 33, 50, 85, 47, 47, 47, 47, 53, 504 47, 47, 47, 47, 47, 39, 47, 91, 40, 90,
499 53, 53, 84, 53, 83, 35, 82, 51, 53, 53, 505 99, 47, 47, 47, 47, 54, 54, 54, 89, 88,
500 53, 53, 56, 56, 56, 93, 68, 54, 57, 54, 506 41, 55, 87, 49, 100, 43, 51, 51, 51, 86,
501 54, 54, 56, 56, 56, 62, 46, 34, 71, 81, 507 51, 95, 95, 96, 85, 51, 51, 51, 51, 52,
502 508
503 80, 79, 78, 77, 76, 75, 74, 73, 72, 64, 509 99, 52, 52, 52, 95, 95, 96, 84, 46, 83,
504 62, 35, 33, 33, 33, 33, 33, 33, 33, 33, 510 82, 81, 39, 79, 100, 33, 33, 33, 33, 33,
505 37, 67, 66, 37, 37, 37, 44, 65, 44, 49, 511 33, 33, 33, 37, 80, 77, 37, 37, 37, 44,
506 49, 49, 49, 49, 49, 49, 49, 52, 64, 52, 512 40, 44, 50, 76, 50, 52, 75, 52, 74, 52,
507 54, 62, 54, 60, 54, 54, 55, 93, 55, 55, 513 52, 53, 73, 53, 53, 53, 53, 56, 56, 56,
508 55, 55, 58, 58, 58, 48, 58, 58, 59, 48, 514 72, 56, 56, 57, 71, 57, 57, 59, 59, 59,
509 59, 59, 61, 61, 61, 61, 61, 61, 61, 61, 515 59, 59, 59, 59, 59, 61, 61, 61, 61, 61,
510 63, 63, 63, 63, 63, 63, 63, 63, 69, 93, 516 61, 61, 61, 67, 70, 67, 68, 68, 68, 62,
511 69, 70, 70, 70, 93, 70, 70, 11, 93, 93, 517 68, 68, 98, 98, 98, 98, 98, 98, 98, 98,
512 93, 93, 93, 93, 93, 93, 93, 93, 93, 93, 518 60, 66, 65, 64, 63, 62, 60, 58, 103, 48,
513 519
514 93, 93, 93, 93, 93, 93, 93, 93, 93, 93, 520 48, 103, 11, 103, 103, 103, 103, 103, 103, 103,
515 93, 93, 93, 93, 93, 93, 93, 93, 93, 93, 521 103, 103, 103, 103, 103, 103, 103, 103, 103, 103,
516 93, 93, 93 522 103, 103, 103, 103, 103, 103, 103, 103, 103, 103,
523 103, 103, 103, 103, 103, 103, 103, 103
517 } ; 524 } ;
518 525
519static yyconst flex_int16_t yy_chk[324] = 526static yyconst flex_int16_t yy_chk[339] =
520 { 0, 527 { 0,
521 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 528 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
522 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 529 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
523 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 530 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
524 1, 1, 1, 1, 1, 3, 15, 3, 13, 13, 531 1, 1, 1, 1, 1, 3, 13, 13, 101, 3,
525 14, 14, 3, 3, 3, 16, 3, 23, 23, 91, 532 3, 3, 3, 15, 3, 14, 14, 32, 32, 3,
526 15, 3, 3, 3, 3, 3, 5, 28, 90, 28, 533 3, 3, 3, 3, 5, 5, 5, 15, 5, 31,
527 28, 28, 23, 5, 5, 5, 28, 5, 89, 16, 534 31, 31, 5, 5, 5, 5, 5, 7, 7, 7,
528 87, 5, 5, 5, 5, 5, 7, 7, 7, 7,
529 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 535 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
530 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 536 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
531
532 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 537 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
533 7, 9, 17, 9, 10, 17, 10, 29, 9, 9, 538
534 9, 10, 10, 10, 31, 31, 31, 17, 32, 32, 539 7, 7, 9, 16, 29, 33, 9, 9, 9, 9,
535 17, 86, 17, 19, 19, 19, 19, 19, 19, 19, 540 10, 54, 54, 54, 10, 10, 10, 10, 17, 33,
536 84, 29, 19, 19, 19, 19, 19, 19, 19, 19, 541 28, 17, 28, 28, 28, 100, 72, 16, 29, 28,
537 19, 19, 19, 19, 19, 19, 20, 20, 20, 83, 542 97, 60, 72, 17, 60, 94, 17, 92, 17, 19,
538 20, 33, 49, 49, 82, 20, 20, 20, 20, 25, 543 19, 19, 19, 19, 19, 19, 91, 88, 19, 19,
539 25, 25, 81, 25, 80, 33, 79, 49, 25, 25, 544 19, 19, 19, 19, 19, 19, 19, 19, 19, 19,
540 25, 25, 30, 30, 30, 51, 51, 55, 30, 55, 545 19, 19, 20, 20, 20, 23, 20, 87, 23, 86,
541 55, 55, 56, 56, 56, 62, 55, 68, 62, 78, 546 96, 20, 20, 20, 20, 30, 30, 30, 85, 84,
542 547 23, 30, 83, 23, 96, 23, 25, 25, 25, 82,
543 77, 76, 74, 73, 72, 70, 67, 66, 65, 63, 548 25, 93, 93, 93, 81, 25, 25, 25, 25, 53,
544 61, 68, 94, 94, 94, 94, 94, 94, 94, 94, 549
545 95, 43, 42, 95, 95, 95, 96, 41, 96, 97, 550 98, 53, 53, 53, 95, 95, 95, 80, 53, 79,
546 97, 97, 97, 97, 97, 97, 97, 98, 40, 98, 551 78, 77, 76, 74, 98, 104, 104, 104, 104, 104,
547 99, 39, 99, 38, 99, 99, 100, 35, 100, 100, 552 104, 104, 104, 105, 73, 71, 105, 105, 105, 106,
548 100, 100, 101, 101, 101, 22, 101, 101, 102, 21, 553 70, 106, 107, 69, 107, 108, 68, 108, 66, 108,
549 102, 102, 103, 103, 103, 103, 103, 103, 103, 103, 554 108, 109, 65, 109, 109, 109, 109, 110, 110, 110,
550 104, 104, 104, 104, 104, 104, 104, 104, 105, 11, 555 64, 110, 110, 111, 63, 111, 111, 112, 112, 112,
551 105, 106, 106, 106, 0, 106, 106, 93, 93, 93, 556 112, 112, 112, 112, 112, 113, 113, 113, 113, 113,
552 93, 93, 93, 93, 93, 93, 93, 93, 93, 93, 557 113, 113, 113, 114, 62, 114, 115, 115, 115, 61,
553 558 115, 115, 116, 116, 116, 116, 116, 116, 116, 116,
554 93, 93, 93, 93, 93, 93, 93, 93, 93, 93, 559 59, 49, 43, 42, 41, 40, 39, 38, 35, 22,
555 93, 93, 93, 93, 93, 93, 93, 93, 93, 93, 560
556 93, 93, 93 561 21, 11, 103, 103, 103, 103, 103, 103, 103, 103,
562 103, 103, 103, 103, 103, 103, 103, 103, 103, 103,
563 103, 103, 103, 103, 103, 103, 103, 103, 103, 103,
564 103, 103, 103, 103, 103, 103, 103, 103
557 } ; 565 } ;
558 566
559/* Table of booleans, true if rule could match eol. */ 567/* Table of booleans, true if rule could match eol. */
560static yyconst flex_int32_t yy_rule_can_match_eol[21] = 568static yyconst flex_int32_t yy_rule_can_match_eol[21] =
561 { 0, 569 { 0,
5620, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 5701, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0,
563 0, }; 571 0, };
564 572
565static yy_state_type yy_last_accepting_state; 573static yy_state_type yy_last_accepting_state;
@@ -600,7 +608,7 @@ char *yytext;
600 608
601 609
602 610
603#line 33 "dtc-lexer.l" 611#line 37 "dtc-lexer.l"
604#include "dtc.h" 612#include "dtc.h"
605#include "srcpos.h" 613#include "srcpos.h"
606#include "dtc-parser.tab.h" 614#include "dtc-parser.tab.h"
@@ -623,7 +631,10 @@ static int dts_version; /* = 0 */
623 DPRINT("<V1>\n"); \ 631 DPRINT("<V1>\n"); \
624 BEGIN(V1); \ 632 BEGIN(V1); \
625 } 633 }
626#line 627 "dtc-lexer.lex.c" 634
635static void push_input_file(const char *filename);
636static int pop_input_file(void);
637#line 638 "dtc-lexer.lex.c"
627 638
628#define INITIAL 0 639#define INITIAL 0
629#define INCLUDE 1 640#define INCLUDE 1
@@ -685,7 +696,7 @@ static int input (void );
685/* This used to be an fputs(), but since the string might contain NUL's, 696/* This used to be an fputs(), but since the string might contain NUL's,
686 * we now use fwrite(). 697 * we now use fwrite().
687 */ 698 */
688#define ECHO (void) fwrite( yytext, yyleng, 1, yyout ) 699#define ECHO fwrite( yytext, yyleng, 1, yyout )
689#endif 700#endif
690 701
691/* Gets input and stuffs it into "buf". number of characters read, or YY_NULL, 702/* Gets input and stuffs it into "buf". number of characters read, or YY_NULL,
@@ -696,7 +707,7 @@ static int input (void );
696 if ( YY_CURRENT_BUFFER_LVALUE->yy_is_interactive ) \ 707 if ( YY_CURRENT_BUFFER_LVALUE->yy_is_interactive ) \
697 { \ 708 { \
698 int c = '*'; \ 709 int c = '*'; \
699 size_t n; \ 710 int n; \
700 for ( n = 0; n < max_size && \ 711 for ( n = 0; n < max_size && \
701 (c = getc( yyin )) != EOF && c != '\n'; ++n ) \ 712 (c = getc( yyin )) != EOF && c != '\n'; ++n ) \
702 buf[n] = (char) c; \ 713 buf[n] = (char) c; \
@@ -778,9 +789,9 @@ YY_DECL
778 register char *yy_cp, *yy_bp; 789 register char *yy_cp, *yy_bp;
779 register int yy_act; 790 register int yy_act;
780 791
781#line 57 "dtc-lexer.l" 792#line 64 "dtc-lexer.l"
782 793
783#line 784 "dtc-lexer.lex.c" 794#line 795 "dtc-lexer.lex.c"
784 795
785 if ( !(yy_init) ) 796 if ( !(yy_init) )
786 { 797 {
@@ -833,13 +844,13 @@ yy_match:
833 while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) 844 while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
834 { 845 {
835 yy_current_state = (int) yy_def[yy_current_state]; 846 yy_current_state = (int) yy_def[yy_current_state];
836 if ( yy_current_state >= 94 ) 847 if ( yy_current_state >= 104 )
837 yy_c = yy_meta[(unsigned int) yy_c]; 848 yy_c = yy_meta[(unsigned int) yy_c];
838 } 849 }
839 yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; 850 yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
840 ++yy_cp; 851 ++yy_cp;
841 } 852 }
842 while ( yy_base[yy_current_state] != 288 ); 853 while ( yy_base[yy_current_state] != 303 );
843 854
844yy_find_action: 855yy_find_action:
845 yy_act = yy_accept[yy_current_state]; 856 yy_act = yy_accept[yy_current_state];
@@ -874,20 +885,13 @@ do_action: /* This label is used only to access EOF actions. */
874 goto yy_find_action; 885 goto yy_find_action;
875 886
876case 1: 887case 1:
888/* rule 1 can match eol */
877YY_RULE_SETUP 889YY_RULE_SETUP
878#line 58 "dtc-lexer.l" 890#line 65 "dtc-lexer.l"
879BEGIN(INCLUDE);
880 YY_BREAK
881case 2:
882YY_RULE_SETUP
883#line 60 "dtc-lexer.l"
884{ 891{
885 yytext[strlen(yytext) - 1] = 0; 892 char *name = strchr(yytext, '\"') + 1;
886 if (!push_input_file(yytext + 1)) { 893 yytext[yyleng-1] = '\0';
887 /* Some unrecoverable error.*/ 894 push_input_file(name);
888 exit(1);
889 }
890 BEGIN_DEFAULT();
891 } 895 }
892 YY_BREAK 896 YY_BREAK
893case YY_STATE_EOF(INITIAL): 897case YY_STATE_EOF(INITIAL):
@@ -895,19 +899,19 @@ case YY_STATE_EOF(INCLUDE):
895case YY_STATE_EOF(BYTESTRING): 899case YY_STATE_EOF(BYTESTRING):
896case YY_STATE_EOF(PROPNODENAME): 900case YY_STATE_EOF(PROPNODENAME):
897case YY_STATE_EOF(V1): 901case YY_STATE_EOF(V1):
898#line 70 "dtc-lexer.l" 902#line 71 "dtc-lexer.l"
899{ 903{
900 if (!pop_input_file()) { 904 if (!pop_input_file()) {
901 yyterminate(); 905 yyterminate();
902 } 906 }
903 } 907 }
904 YY_BREAK 908 YY_BREAK
905case 3: 909case 2:
906/* rule 3 can match eol */ 910/* rule 2 can match eol */
907YY_RULE_SETUP 911YY_RULE_SETUP
908#line 76 "dtc-lexer.l" 912#line 77 "dtc-lexer.l"
909{ 913{
910 yylloc.filenum = srcpos_filenum; 914 yylloc.file = srcpos_file;
911 yylloc.first_line = yylineno; 915 yylloc.first_line = yylineno;
912 DPRINT("String: %s\n", yytext); 916 DPRINT("String: %s\n", yytext);
913 yylval.data = data_copy_escape_string(yytext+1, 917 yylval.data = data_copy_escape_string(yytext+1,
@@ -916,11 +920,11 @@ YY_RULE_SETUP
916 return DT_STRING; 920 return DT_STRING;
917 } 921 }
918 YY_BREAK 922 YY_BREAK
919case 4: 923case 3:
920YY_RULE_SETUP 924YY_RULE_SETUP
921#line 86 "dtc-lexer.l" 925#line 87 "dtc-lexer.l"
922{ 926{
923 yylloc.filenum = srcpos_filenum; 927 yylloc.file = srcpos_file;
924 yylloc.first_line = yylineno; 928 yylloc.first_line = yylineno;
925 DPRINT("Keyword: /dts-v1/\n"); 929 DPRINT("Keyword: /dts-v1/\n");
926 dts_version = 1; 930 dts_version = 1;
@@ -928,22 +932,22 @@ YY_RULE_SETUP
928 return DT_V1; 932 return DT_V1;
929 } 933 }
930 YY_BREAK 934 YY_BREAK
931case 5: 935case 4:
932YY_RULE_SETUP 936YY_RULE_SETUP
933#line 95 "dtc-lexer.l" 937#line 96 "dtc-lexer.l"
934{ 938{
935 yylloc.filenum = srcpos_filenum; 939 yylloc.file = srcpos_file;
936 yylloc.first_line = yylineno; 940 yylloc.first_line = yylineno;
937 DPRINT("Keyword: /memreserve/\n"); 941 DPRINT("Keyword: /memreserve/\n");
938 BEGIN_DEFAULT(); 942 BEGIN_DEFAULT();
939 return DT_MEMRESERVE; 943 return DT_MEMRESERVE;
940 } 944 }
941 YY_BREAK 945 YY_BREAK
942case 6: 946case 5:
943YY_RULE_SETUP 947YY_RULE_SETUP
944#line 103 "dtc-lexer.l" 948#line 104 "dtc-lexer.l"
945{ 949{
946 yylloc.filenum = srcpos_filenum; 950 yylloc.file = srcpos_file;
947 yylloc.first_line = yylineno; 951 yylloc.first_line = yylineno;
948 DPRINT("Label: %s\n", yytext); 952 DPRINT("Label: %s\n", yytext);
949 yylval.labelref = strdup(yytext); 953 yylval.labelref = strdup(yytext);
@@ -951,11 +955,11 @@ YY_RULE_SETUP
951 return DT_LABEL; 955 return DT_LABEL;
952 } 956 }
953 YY_BREAK 957 YY_BREAK
954case 7: 958case 6:
955YY_RULE_SETUP 959YY_RULE_SETUP
956#line 112 "dtc-lexer.l" 960#line 113 "dtc-lexer.l"
957{ 961{
958 yylloc.filenum = srcpos_filenum; 962 yylloc.file = srcpos_file;
959 yylloc.first_line = yylineno; 963 yylloc.first_line = yylineno;
960 if (*yytext == 'b') 964 if (*yytext == 'b')
961 yylval.cbase = 2; 965 yylval.cbase = 2;
@@ -969,44 +973,44 @@ YY_RULE_SETUP
969 return DT_BASE; 973 return DT_BASE;
970 } 974 }
971 YY_BREAK 975 YY_BREAK
972case 8: 976case 7:
973YY_RULE_SETUP 977YY_RULE_SETUP
974#line 127 "dtc-lexer.l" 978#line 128 "dtc-lexer.l"
975{ 979{
976 yylloc.filenum = srcpos_filenum; 980 yylloc.file = srcpos_file;
977 yylloc.first_line = yylineno; 981 yylloc.first_line = yylineno;
978 yylval.literal = strdup(yytext); 982 yylval.literal = strdup(yytext);
979 DPRINT("Literal: '%s'\n", yylval.literal); 983 DPRINT("Literal: '%s'\n", yylval.literal);
980 return DT_LEGACYLITERAL; 984 return DT_LEGACYLITERAL;
981 } 985 }
982 YY_BREAK 986 YY_BREAK
983case 9: 987case 8:
984YY_RULE_SETUP 988YY_RULE_SETUP
985#line 135 "dtc-lexer.l" 989#line 136 "dtc-lexer.l"
986{ 990{
987 yylloc.filenum = srcpos_filenum; 991 yylloc.file = srcpos_file;
988 yylloc.first_line = yylineno; 992 yylloc.first_line = yylineno;
989 yylval.literal = strdup(yytext); 993 yylval.literal = strdup(yytext);
990 DPRINT("Literal: '%s'\n", yylval.literal); 994 DPRINT("Literal: '%s'\n", yylval.literal);
991 return DT_LITERAL; 995 return DT_LITERAL;
992 } 996 }
993 YY_BREAK 997 YY_BREAK
994case 10: 998case 9:
995YY_RULE_SETUP 999YY_RULE_SETUP
996#line 143 "dtc-lexer.l" 1000#line 144 "dtc-lexer.l"
997{ /* label reference */ 1001{ /* label reference */
998 yylloc.filenum = srcpos_filenum; 1002 yylloc.file = srcpos_file;
999 yylloc.first_line = yylineno; 1003 yylloc.first_line = yylineno;
1000 DPRINT("Ref: %s\n", yytext+1); 1004 DPRINT("Ref: %s\n", yytext+1);
1001 yylval.labelref = strdup(yytext+1); 1005 yylval.labelref = strdup(yytext+1);
1002 return DT_REF; 1006 return DT_REF;
1003 } 1007 }
1004 YY_BREAK 1008 YY_BREAK
1005case 11: 1009case 10:
1006YY_RULE_SETUP 1010YY_RULE_SETUP
1007#line 151 "dtc-lexer.l" 1011#line 152 "dtc-lexer.l"
1008{ /* new-style path reference */ 1012{ /* new-style path reference */
1009 yylloc.filenum = srcpos_filenum; 1013 yylloc.file = srcpos_file;
1010 yylloc.first_line = yylineno; 1014 yylloc.first_line = yylineno;
1011 yytext[yyleng-1] = '\0'; 1015 yytext[yyleng-1] = '\0';
1012 DPRINT("Ref: %s\n", yytext+2); 1016 DPRINT("Ref: %s\n", yytext+2);
@@ -1014,44 +1018,44 @@ YY_RULE_SETUP
1014 return DT_REF; 1018 return DT_REF;
1015 } 1019 }
1016 YY_BREAK 1020 YY_BREAK
1017case 12: 1021case 11:
1018YY_RULE_SETUP 1022YY_RULE_SETUP
1019#line 160 "dtc-lexer.l" 1023#line 161 "dtc-lexer.l"
1020{ /* old-style path reference */ 1024{ /* old-style path reference */
1021 yylloc.filenum = srcpos_filenum; 1025 yylloc.file = srcpos_file;
1022 yylloc.first_line = yylineno; 1026 yylloc.first_line = yylineno;
1023 DPRINT("Ref: %s\n", yytext+1); 1027 DPRINT("Ref: %s\n", yytext+1);
1024 yylval.labelref = strdup(yytext+1); 1028 yylval.labelref = strdup(yytext+1);
1025 return DT_REF; 1029 return DT_REF;
1026 } 1030 }
1027 YY_BREAK 1031 YY_BREAK
1028case 13: 1032case 12:
1029YY_RULE_SETUP 1033YY_RULE_SETUP
1030#line 168 "dtc-lexer.l" 1034#line 169 "dtc-lexer.l"
1031{ 1035{
1032 yylloc.filenum = srcpos_filenum; 1036 yylloc.file = srcpos_file;
1033 yylloc.first_line = yylineno; 1037 yylloc.first_line = yylineno;
1034 yylval.byte = strtol(yytext, NULL, 16); 1038 yylval.byte = strtol(yytext, NULL, 16);
1035 DPRINT("Byte: %02x\n", (int)yylval.byte); 1039 DPRINT("Byte: %02x\n", (int)yylval.byte);
1036 return DT_BYTE; 1040 return DT_BYTE;
1037 } 1041 }
1038 YY_BREAK 1042 YY_BREAK
1039case 14: 1043case 13:
1040YY_RULE_SETUP 1044YY_RULE_SETUP
1041#line 176 "dtc-lexer.l" 1045#line 177 "dtc-lexer.l"
1042{ 1046{
1043 yylloc.filenum = srcpos_filenum; 1047 yylloc.file = srcpos_file;
1044 yylloc.first_line = yylineno; 1048 yylloc.first_line = yylineno;
1045 DPRINT("/BYTESTRING\n"); 1049 DPRINT("/BYTESTRING\n");
1046 BEGIN_DEFAULT(); 1050 BEGIN_DEFAULT();
1047 return ']'; 1051 return ']';
1048 } 1052 }
1049 YY_BREAK 1053 YY_BREAK
1050case 15: 1054case 14:
1051YY_RULE_SETUP 1055YY_RULE_SETUP
1052#line 184 "dtc-lexer.l" 1056#line 185 "dtc-lexer.l"
1053{ 1057{
1054 yylloc.filenum = srcpos_filenum; 1058 yylloc.file = srcpos_file;
1055 yylloc.first_line = yylineno; 1059 yylloc.first_line = yylineno;
1056 DPRINT("PropNodeName: %s\n", yytext); 1060 DPRINT("PropNodeName: %s\n", yytext);
1057 yylval.propnodename = strdup(yytext); 1061 yylval.propnodename = strdup(yytext);
@@ -1059,34 +1063,39 @@ YY_RULE_SETUP
1059 return DT_PROPNODENAME; 1063 return DT_PROPNODENAME;
1060 } 1064 }
1061 YY_BREAK 1065 YY_BREAK
1066case 15:
1067YY_RULE_SETUP
1068#line 194 "dtc-lexer.l"
1069{
1070 yylloc.file = srcpos_file;
1071 yylloc.first_line = yylineno;
1072 DPRINT("Binary Include\n");
1073 return DT_INCBIN;
1074 }
1075 YY_BREAK
1062case 16: 1076case 16:
1063/* rule 16 can match eol */ 1077/* rule 16 can match eol */
1064YY_RULE_SETUP 1078YY_RULE_SETUP
1065#line 194 "dtc-lexer.l" 1079#line 201 "dtc-lexer.l"
1066/* eat whitespace */ 1080/* eat whitespace */
1067 YY_BREAK 1081 YY_BREAK
1068case 17: 1082case 17:
1069/* rule 17 can match eol */ 1083/* rule 17 can match eol */
1070YY_RULE_SETUP 1084YY_RULE_SETUP
1071#line 196 "dtc-lexer.l" 1085#line 202 "dtc-lexer.l"
1072{ 1086/* eat C-style comments */
1073 yylloc.filenum = srcpos_filenum;
1074 yylloc.first_line = yylineno;
1075 DPRINT("Comment: %s\n", yytext);
1076 /* eat comments */
1077 }
1078 YY_BREAK 1087 YY_BREAK
1079case 18: 1088case 18:
1080/* rule 18 can match eol */ 1089/* rule 18 can match eol */
1081YY_RULE_SETUP 1090YY_RULE_SETUP
1082#line 203 "dtc-lexer.l" 1091#line 203 "dtc-lexer.l"
1083/* eat line comments */ 1092/* eat C++-style comments */
1084 YY_BREAK 1093 YY_BREAK
1085case 19: 1094case 19:
1086YY_RULE_SETUP 1095YY_RULE_SETUP
1087#line 205 "dtc-lexer.l" 1096#line 205 "dtc-lexer.l"
1088{ 1097{
1089 yylloc.filenum = srcpos_filenum; 1098 yylloc.file = srcpos_file;
1090 yylloc.first_line = yylineno; 1099 yylloc.first_line = yylineno;
1091 DPRINT("Char: %c (\\x%02x)\n", yytext[0], 1100 DPRINT("Char: %c (\\x%02x)\n", yytext[0],
1092 (unsigned)yytext[0]); 1101 (unsigned)yytext[0]);
@@ -1107,7 +1116,7 @@ YY_RULE_SETUP
1107#line 222 "dtc-lexer.l" 1116#line 222 "dtc-lexer.l"
1108ECHO; 1117ECHO;
1109 YY_BREAK 1118 YY_BREAK
1110#line 1111 "dtc-lexer.lex.c" 1119#line 1120 "dtc-lexer.lex.c"
1111 1120
1112 case YY_END_OF_BUFFER: 1121 case YY_END_OF_BUFFER:
1113 { 1122 {
@@ -1360,6 +1369,14 @@ static int yy_get_next_buffer (void)
1360 else 1369 else
1361 ret_val = EOB_ACT_CONTINUE_SCAN; 1370 ret_val = EOB_ACT_CONTINUE_SCAN;
1362 1371
1372 if ((yy_size_t) ((yy_n_chars) + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) {
1373 /* Extend the array by 50%, plus the number we really need. */
1374 yy_size_t new_size = (yy_n_chars) + number_to_move + ((yy_n_chars) >> 1);
1375 YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) yyrealloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,new_size );
1376 if ( ! YY_CURRENT_BUFFER_LVALUE->yy_ch_buf )
1377 YY_FATAL_ERROR( "out of dynamic memory in yy_get_next_buffer()" );
1378 }
1379
1363 (yy_n_chars) += number_to_move; 1380 (yy_n_chars) += number_to_move;
1364 YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] = YY_END_OF_BUFFER_CHAR; 1381 YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] = YY_END_OF_BUFFER_CHAR;
1365 YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] = YY_END_OF_BUFFER_CHAR; 1382 YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] = YY_END_OF_BUFFER_CHAR;
@@ -1389,7 +1406,7 @@ static int yy_get_next_buffer (void)
1389 while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) 1406 while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
1390 { 1407 {
1391 yy_current_state = (int) yy_def[yy_current_state]; 1408 yy_current_state = (int) yy_def[yy_current_state];
1392 if ( yy_current_state >= 94 ) 1409 if ( yy_current_state >= 104 )
1393 yy_c = yy_meta[(unsigned int) yy_c]; 1410 yy_c = yy_meta[(unsigned int) yy_c];
1394 } 1411 }
1395 yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; 1412 yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
@@ -1417,11 +1434,11 @@ static int yy_get_next_buffer (void)
1417 while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) 1434 while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
1418 { 1435 {
1419 yy_current_state = (int) yy_def[yy_current_state]; 1436 yy_current_state = (int) yy_def[yy_current_state];
1420 if ( yy_current_state >= 94 ) 1437 if ( yy_current_state >= 104 )
1421 yy_c = yy_meta[(unsigned int) yy_c]; 1438 yy_c = yy_meta[(unsigned int) yy_c];
1422 } 1439 }
1423 yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; 1440 yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
1424 yy_is_jam = (yy_current_state == 93); 1441 yy_is_jam = (yy_current_state == 103);
1425 1442
1426 return yy_is_jam ? 0 : yy_current_state; 1443 return yy_is_jam ? 0 : yy_current_state;
1427} 1444}
@@ -1743,7 +1760,9 @@ static void yyensure_buffer_stack (void)
1743 (yy_buffer_stack) = (struct yy_buffer_state**)yyalloc 1760 (yy_buffer_stack) = (struct yy_buffer_state**)yyalloc
1744 (num_to_alloc * sizeof(struct yy_buffer_state*) 1761 (num_to_alloc * sizeof(struct yy_buffer_state*)
1745 ); 1762 );
1746 1763 if ( ! (yy_buffer_stack) )
1764 YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" );
1765
1747 memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*)); 1766 memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*));
1748 1767
1749 (yy_buffer_stack_max) = num_to_alloc; 1768 (yy_buffer_stack_max) = num_to_alloc;
@@ -1761,6 +1780,8 @@ static void yyensure_buffer_stack (void)
1761 ((yy_buffer_stack), 1780 ((yy_buffer_stack),
1762 num_to_alloc * sizeof(struct yy_buffer_state*) 1781 num_to_alloc * sizeof(struct yy_buffer_state*)
1763 ); 1782 );
1783 if ( ! (yy_buffer_stack) )
1784 YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" );
1764 1785
1765 /* zero only the new slots.*/ 1786 /* zero only the new slots.*/
1766 memset((yy_buffer_stack) + (yy_buffer_stack_max), 0, grow_size * sizeof(struct yy_buffer_state*)); 1787 memset((yy_buffer_stack) + (yy_buffer_stack_max), 0, grow_size * sizeof(struct yy_buffer_state*));
@@ -2072,14 +2093,13 @@ void yyfree (void * ptr )
2072 */ 2093 */
2073 2094
2074struct incl_file { 2095struct incl_file {
2075 int filenum; 2096 struct dtc_file *file;
2076 FILE *file;
2077 YY_BUFFER_STATE yy_prev_buf; 2097 YY_BUFFER_STATE yy_prev_buf;
2078 int yy_prev_lineno; 2098 int yy_prev_lineno;
2079 struct incl_file *prev; 2099 struct incl_file *prev;
2080}; 2100};
2081 2101
2082struct incl_file *incl_file_stack; 2102static struct incl_file *incl_file_stack;
2083 2103
2084 2104
2085/* 2105/*
@@ -2090,36 +2110,34 @@ struct incl_file *incl_file_stack;
2090static int incl_depth = 0; 2110static int incl_depth = 0;
2091 2111
2092 2112
2093int push_input_file(const char *filename) 2113static void push_input_file(const char *filename)
2094{ 2114{
2095 FILE *f;
2096 struct incl_file *incl_file; 2115 struct incl_file *incl_file;
2116 struct dtc_file *newfile;
2117 struct search_path search, *searchptr = NULL;
2097 2118
2098 if (!filename) { 2119 assert(filename);
2099 yyerror("No include file name given.");
2100 return 0;
2101 }
2102 2120
2103 if (incl_depth++ >= MAX_INCLUDE_DEPTH) { 2121 if (incl_depth++ >= MAX_INCLUDE_DEPTH)
2104 yyerror("Includes nested too deeply"); 2122 die("Includes nested too deeply");
2105 return 0; 2123
2124 if (srcpos_file) {
2125 search.dir = srcpos_file->dir;
2126 search.next = NULL;
2127 search.prev = NULL;
2128 searchptr = &search;
2106 } 2129 }
2107 2130
2108 f = dtc_open_file(filename); 2131 newfile = dtc_open_file(filename, searchptr);
2109 2132
2110 incl_file = malloc(sizeof(struct incl_file)); 2133 incl_file = xmalloc(sizeof(struct incl_file));
2111 if (!incl_file) {
2112 yyerror("Can not allocate include file space.");
2113 return 0;
2114 }
2115 2134
2116 /* 2135 /*
2117 * Save current context. 2136 * Save current context.
2118 */ 2137 */
2119 incl_file->yy_prev_buf = YY_CURRENT_BUFFER; 2138 incl_file->yy_prev_buf = YY_CURRENT_BUFFER;
2120 incl_file->yy_prev_lineno = yylineno; 2139 incl_file->yy_prev_lineno = yylineno;
2121 incl_file->filenum = srcpos_filenum; 2140 incl_file->file = srcpos_file;
2122 incl_file->file = yyin;
2123 incl_file->prev = incl_file_stack; 2141 incl_file->prev = incl_file_stack;
2124 2142
2125 incl_file_stack = incl_file; 2143 incl_file_stack = incl_file;
@@ -2127,23 +2145,21 @@ int push_input_file(const char *filename)
2127 /* 2145 /*
2128 * Establish new context. 2146 * Establish new context.
2129 */ 2147 */
2130 srcpos_filenum = lookup_file_name(filename, 0); 2148 srcpos_file = newfile;
2131 yylineno = 1; 2149 yylineno = 1;
2132 yyin = f; 2150 yyin = newfile->file;
2133 yy_switch_to_buffer(yy_create_buffer(yyin,YY_BUF_SIZE)); 2151 yy_switch_to_buffer(yy_create_buffer(yyin,YY_BUF_SIZE));
2134
2135 return 1;
2136} 2152}
2137 2153
2138 2154
2139int pop_input_file(void) 2155static int pop_input_file(void)
2140{ 2156{
2141 struct incl_file *incl_file; 2157 struct incl_file *incl_file;
2142 2158
2143 if (incl_file_stack == 0) 2159 if (incl_file_stack == 0)
2144 return 0; 2160 return 0;
2145 2161
2146 fclose(yyin); 2162 dtc_close_file(srcpos_file);
2147 2163
2148 /* 2164 /*
2149 * Pop. 2165 * Pop.
@@ -2158,17 +2174,14 @@ int pop_input_file(void)
2158 yy_delete_buffer(YY_CURRENT_BUFFER); 2174 yy_delete_buffer(YY_CURRENT_BUFFER);
2159 yy_switch_to_buffer(incl_file->yy_prev_buf); 2175 yy_switch_to_buffer(incl_file->yy_prev_buf);
2160 yylineno = incl_file->yy_prev_lineno; 2176 yylineno = incl_file->yy_prev_lineno;
2161 srcpos_filenum = incl_file->filenum; 2177 srcpos_file = incl_file->file;
2162 yyin = incl_file->file; 2178 yyin = incl_file->file ? incl_file->file->file : NULL;
2163 2179
2164 /* 2180 /*
2165 * Free old state. 2181 * Free old state.
2166 */ 2182 */
2167 free(incl_file); 2183 free(incl_file);
2168 2184
2169 if (YY_CURRENT_BUFFER == 0)
2170 return 0;
2171
2172 return 1; 2185 return 1;
2173} 2186}
2174 2187
diff --git a/arch/powerpc/boot/dtc-src/dtc-parser.tab.c_shipped b/arch/powerpc/boot/dtc-src/dtc-parser.tab.c_shipped
index 28e6ec0296a1..27129377e5d2 100644
--- a/arch/powerpc/boot/dtc-src/dtc-parser.tab.c_shipped
+++ b/arch/powerpc/boot/dtc-src/dtc-parser.tab.c_shipped
@@ -75,7 +75,8 @@
75 DT_BYTE = 264, 75 DT_BYTE = 264,
76 DT_STRING = 265, 76 DT_STRING = 265,
77 DT_LABEL = 266, 77 DT_LABEL = 266,
78 DT_REF = 267 78 DT_REF = 267,
79 DT_INCBIN = 268
79 }; 80 };
80#endif 81#endif
81/* Tokens. */ 82/* Tokens. */
@@ -89,6 +90,7 @@
89#define DT_STRING 265 90#define DT_STRING 265
90#define DT_LABEL 266 91#define DT_LABEL 266
91#define DT_REF 267 92#define DT_REF 267
93#define DT_INCBIN 268
92 94
93 95
94 96
@@ -96,14 +98,17 @@
96/* Copy the first part of user declarations. */ 98/* Copy the first part of user declarations. */
97#line 23 "dtc-parser.y" 99#line 23 "dtc-parser.y"
98 100
101#include <stdio.h>
102
99#include "dtc.h" 103#include "dtc.h"
100#include "srcpos.h" 104#include "srcpos.h"
101 105
102int yylex(void); 106extern int yylex(void);
103unsigned long long eval_literal(const char *s, int base, int bits);
104 107
105extern struct boot_info *the_boot_info; 108extern struct boot_info *the_boot_info;
109extern int treesource_error;
106 110
111static unsigned long long eval_literal(const char *s, int base, int bits);
107 112
108 113
109/* Enabling traces. */ 114/* Enabling traces. */
@@ -126,16 +131,16 @@ extern struct boot_info *the_boot_info;
126 131
127#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED 132#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
128typedef union YYSTYPE 133typedef union YYSTYPE
129#line 34 "dtc-parser.y" 134#line 37 "dtc-parser.y"
130{ 135{
131 char *propnodename; 136 char *propnodename;
132 char *literal; 137 char *literal;
133 char *labelref; 138 char *labelref;
134 unsigned int cbase; 139 unsigned int cbase;
135 u8 byte; 140 uint8_t byte;
136 struct data data; 141 struct data data;
137 142
138 u64 addr; 143 uint64_t addr;
139 cell_t cell; 144 cell_t cell;
140 struct property *prop; 145 struct property *prop;
141 struct property *proplist; 146 struct property *proplist;
@@ -144,7 +149,7 @@ typedef union YYSTYPE
144 struct reserve_info *re; 149 struct reserve_info *re;
145} 150}
146/* Line 187 of yacc.c. */ 151/* Line 187 of yacc.c. */
147#line 148 "dtc-parser.tab.c" 152#line 153 "dtc-parser.tab.c"
148 YYSTYPE; 153 YYSTYPE;
149# define yystype YYSTYPE /* obsolescent; will be withdrawn */ 154# define yystype YYSTYPE /* obsolescent; will be withdrawn */
150# define YYSTYPE_IS_DECLARED 1 155# define YYSTYPE_IS_DECLARED 1
@@ -169,7 +174,7 @@ typedef struct YYLTYPE
169 174
170 175
171/* Line 216 of yacc.c. */ 176/* Line 216 of yacc.c. */
172#line 173 "dtc-parser.tab.c" 177#line 178 "dtc-parser.tab.c"
173 178
174#ifdef short 179#ifdef short
175# undef short 180# undef short
@@ -386,20 +391,20 @@ union yyalloc
386/* YYFINAL -- State number of the termination state. */ 391/* YYFINAL -- State number of the termination state. */
387#define YYFINAL 9 392#define YYFINAL 9
388/* YYLAST -- Last index in YYTABLE. */ 393/* YYLAST -- Last index in YYTABLE. */
389#define YYLAST 60 394#define YYLAST 73
390 395
391/* YYNTOKENS -- Number of terminals. */ 396/* YYNTOKENS -- Number of terminals. */
392#define YYNTOKENS 24 397#define YYNTOKENS 27
393/* YYNNTS -- Number of nonterminals. */ 398/* YYNNTS -- Number of nonterminals. */
394#define YYNNTS 20 399#define YYNNTS 20
395/* YYNRULES -- Number of rules. */ 400/* YYNRULES -- Number of rules. */
396#define YYNRULES 43 401#define YYNRULES 45
397/* YYNRULES -- Number of states. */ 402/* YYNRULES -- Number of states. */
398#define YYNSTATES 67 403#define YYNSTATES 76
399 404
400/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */ 405/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */
401#define YYUNDEFTOK 2 406#define YYUNDEFTOK 2
402#define YYMAXUTOK 267 407#define YYMAXUTOK 268
403 408
404#define YYTRANSLATE(YYX) \ 409#define YYTRANSLATE(YYX) \
405 ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK) 410 ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK)
@@ -411,15 +416,15 @@ static const yytype_uint8 yytranslate[] =
411 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 416 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
412 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 417 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
413 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 418 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
414 2, 2, 2, 2, 23, 14, 2, 15, 2, 2, 419 24, 26, 2, 2, 25, 15, 2, 16, 2, 2,
415 2, 2, 2, 2, 2, 2, 2, 2, 2, 13, 420 2, 2, 2, 2, 2, 2, 2, 2, 2, 14,
416 19, 18, 20, 2, 2, 2, 2, 2, 2, 2, 421 20, 19, 21, 2, 2, 2, 2, 2, 2, 2,
417 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 422 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
418 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 423 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
419 2, 21, 2, 22, 2, 2, 2, 2, 2, 2, 424 2, 22, 2, 23, 2, 2, 2, 2, 2, 2,
420 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 425 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
421 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 426 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
422 2, 2, 2, 16, 2, 17, 2, 2, 2, 2, 427 2, 2, 2, 17, 2, 18, 2, 2, 2, 2,
423 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 428 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
424 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 429 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
425 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 430 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
@@ -433,7 +438,7 @@ static const yytype_uint8 yytranslate[] =
433 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 438 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
434 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 439 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
435 2, 2, 2, 2, 2, 2, 1, 2, 3, 4, 440 2, 2, 2, 2, 2, 2, 1, 2, 3, 4,
436 5, 6, 7, 8, 9, 10, 11, 12 441 5, 6, 7, 8, 9, 10, 11, 12, 13
437}; 442};
438 443
439#if YYDEBUG 444#if YYDEBUG
@@ -443,37 +448,39 @@ static const yytype_uint8 yyprhs[] =
443{ 448{
444 0, 0, 3, 8, 11, 12, 15, 21, 22, 25, 449 0, 0, 3, 8, 11, 12, 15, 21, 22, 25,
445 27, 34, 36, 38, 41, 47, 48, 51, 57, 61, 450 27, 34, 36, 38, 41, 47, 48, 51, 57, 61,
446 64, 69, 74, 77, 80, 81, 84, 87, 88, 91, 451 64, 69, 74, 77, 87, 93, 96, 97, 100, 103,
447 94, 97, 98, 100, 102, 105, 106, 109, 112, 113, 452 104, 107, 110, 113, 114, 116, 118, 121, 122, 125,
448 116, 119, 123, 124 453 128, 129, 132, 135, 139, 140
449}; 454};
450 455
451/* YYRHS -- A `-1'-separated list of the rules' RHS. */ 456/* YYRHS -- A `-1'-separated list of the rules' RHS. */
452static const yytype_int8 yyrhs[] = 457static const yytype_int8 yyrhs[] =
453{ 458{
454 25, 0, -1, 3, 13, 26, 31, -1, 28, 31, 459 28, 0, -1, 3, 14, 29, 34, -1, 31, 34,
455 -1, -1, 27, 26, -1, 43, 4, 30, 30, 13, 460 -1, -1, 30, 29, -1, 46, 4, 33, 33, 14,
456 -1, -1, 29, 28, -1, 27, -1, 43, 4, 30, 461 -1, -1, 32, 31, -1, 30, -1, 46, 4, 33,
457 14, 30, 13, -1, 6, -1, 7, -1, 15, 32, 462 15, 33, 14, -1, 6, -1, 7, -1, 16, 35,
458 -1, 16, 33, 41, 17, 13, -1, -1, 33, 34, 463 -1, 17, 36, 44, 18, 14, -1, -1, 36, 37,
459 -1, 43, 5, 18, 35, 13, -1, 43, 5, 13, 464 -1, 46, 5, 19, 38, 14, -1, 46, 5, 14,
460 -1, 36, 10, -1, 36, 19, 37, 20, -1, 36, 465 -1, 39, 10, -1, 39, 20, 40, 21, -1, 39,
461 21, 40, 22, -1, 36, 12, -1, 35, 11, -1, 466 22, 43, 23, -1, 39, 12, -1, 39, 13, 24,
462 -1, 35, 23, -1, 36, 11, -1, -1, 37, 39, 467 10, 25, 33, 25, 33, 26, -1, 39, 13, 24,
463 -1, 37, 12, -1, 37, 11, -1, -1, 8, -1, 468 10, 26, -1, 38, 11, -1, -1, 38, 25, -1,
464 6, -1, 38, 7, -1, -1, 40, 9, -1, 40, 469 39, 11, -1, -1, 40, 42, -1, 40, 12, -1,
465 11, -1, -1, 42, 41, -1, 42, 34, -1, 43, 470 40, 11, -1, -1, 8, -1, 6, -1, 41, 7,
466 5, 32, -1, -1, 11, -1 471 -1, -1, 43, 9, -1, 43, 11, -1, -1, 45,
472 44, -1, 45, 37, -1, 46, 5, 35, -1, -1,
473 11, -1
467}; 474};
468 475
469/* YYRLINE[YYN] -- source line where rule number YYN was defined. */ 476/* YYRLINE[YYN] -- source line where rule number YYN was defined. */
470static const yytype_uint16 yyrline[] = 477static const yytype_uint16 yyrline[] =
471{ 478{
472 0, 85, 85, 89, 97, 100, 107, 115, 118, 125, 479 0, 89, 89, 93, 101, 104, 111, 119, 122, 129,
473 129, 136, 140, 147, 154, 162, 165, 172, 176, 183, 480 133, 140, 144, 151, 158, 166, 169, 176, 180, 187,
474 187, 191, 195, 199, 207, 210, 214, 222, 225, 229, 481 191, 195, 199, 203, 220, 231, 239, 242, 246, 254,
475 234, 242, 245, 249, 253, 261, 264, 268, 276, 279, 482 257, 261, 266, 274, 277, 281, 285, 293, 296, 300,
476 283, 291, 299, 302 483 308, 311, 315, 323, 331, 334
477}; 484};
478#endif 485#endif
479 486
@@ -484,12 +491,12 @@ static const char *const yytname[] =
484{ 491{
485 "$end", "error", "$undefined", "DT_V1", "DT_MEMRESERVE", 492 "$end", "error", "$undefined", "DT_V1", "DT_MEMRESERVE",
486 "DT_PROPNODENAME", "DT_LITERAL", "DT_LEGACYLITERAL", "DT_BASE", 493 "DT_PROPNODENAME", "DT_LITERAL", "DT_LEGACYLITERAL", "DT_BASE",
487 "DT_BYTE", "DT_STRING", "DT_LABEL", "DT_REF", "';'", "'-'", "'/'", "'{'", 494 "DT_BYTE", "DT_STRING", "DT_LABEL", "DT_REF", "DT_INCBIN", "';'", "'-'",
488 "'}'", "'='", "'<'", "'>'", "'['", "']'", "','", "$accept", "sourcefile", 495 "'/'", "'{'", "'}'", "'='", "'<'", "'>'", "'['", "']'", "'('", "','",
489 "memreserves", "memreserve", "v0_memreserves", "v0_memreserve", "addr", 496 "')'", "$accept", "sourcefile", "memreserves", "memreserve",
490 "devicetree", "nodedef", "proplist", "propdef", "propdata", 497 "v0_memreserves", "v0_memreserve", "addr", "devicetree", "nodedef",
491 "propdataprefix", "celllist", "cellbase", "cellval", "bytestring", 498 "proplist", "propdef", "propdata", "propdataprefix", "celllist",
492 "subnodes", "subnode", "label", 0 499 "cellbase", "cellval", "bytestring", "subnodes", "subnode", "label", 0
493}; 500};
494#endif 501#endif
495 502
@@ -499,19 +506,19 @@ static const char *const yytname[] =
499static const yytype_uint16 yytoknum[] = 506static const yytype_uint16 yytoknum[] =
500{ 507{
501 0, 256, 257, 258, 259, 260, 261, 262, 263, 264, 508 0, 256, 257, 258, 259, 260, 261, 262, 263, 264,
502 265, 266, 267, 59, 45, 47, 123, 125, 61, 60, 509 265, 266, 267, 268, 59, 45, 47, 123, 125, 61,
503 62, 91, 93, 44 510 60, 62, 91, 93, 40, 44, 41
504}; 511};
505# endif 512# endif
506 513
507/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */ 514/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */
508static const yytype_uint8 yyr1[] = 515static const yytype_uint8 yyr1[] =
509{ 516{
510 0, 24, 25, 25, 26, 26, 27, 28, 28, 29, 517 0, 27, 28, 28, 29, 29, 30, 31, 31, 32,
511 29, 30, 30, 31, 32, 33, 33, 34, 34, 35, 518 32, 33, 33, 34, 35, 36, 36, 37, 37, 38,
512 35, 35, 35, 35, 36, 36, 36, 37, 37, 37, 519 38, 38, 38, 38, 38, 38, 39, 39, 39, 40,
513 37, 38, 38, 39, 39, 40, 40, 40, 41, 41, 520 40, 40, 40, 41, 41, 42, 42, 43, 43, 43,
514 41, 42, 43, 43 521 44, 44, 44, 45, 46, 46
515}; 522};
516 523
517/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */ 524/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */
@@ -519,9 +526,9 @@ static const yytype_uint8 yyr2[] =
519{ 526{
520 0, 2, 4, 2, 0, 2, 5, 0, 2, 1, 527 0, 2, 4, 2, 0, 2, 5, 0, 2, 1,
521 6, 1, 1, 2, 5, 0, 2, 5, 3, 2, 528 6, 1, 1, 2, 5, 0, 2, 5, 3, 2,
522 4, 4, 2, 2, 0, 2, 2, 0, 2, 2, 529 4, 4, 2, 9, 5, 2, 0, 2, 2, 0,
523 2, 0, 1, 1, 2, 0, 2, 2, 0, 2, 530 2, 2, 2, 0, 1, 1, 2, 0, 2, 2,
524 2, 3, 0, 1 531 0, 2, 2, 3, 0, 1
525}; 532};
526 533
527/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state 534/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state
@@ -529,81 +536,86 @@ static const yytype_uint8 yyr2[] =
529 means the default is an error. */ 536 means the default is an error. */
530static const yytype_uint8 yydefact[] = 537static const yytype_uint8 yydefact[] =
531{ 538{
532 7, 0, 43, 0, 9, 0, 7, 0, 4, 1, 539 7, 0, 45, 0, 9, 0, 7, 0, 4, 1,
533 0, 3, 8, 0, 0, 4, 0, 15, 13, 11, 540 0, 3, 8, 0, 0, 4, 0, 15, 13, 11,
534 12, 0, 2, 5, 0, 38, 0, 0, 0, 16, 541 12, 0, 2, 5, 0, 40, 0, 0, 0, 16,
535 0, 38, 0, 0, 6, 0, 40, 39, 0, 10, 542 0, 40, 0, 0, 6, 0, 42, 41, 0, 10,
536 14, 18, 24, 41, 0, 0, 23, 17, 25, 19, 543 14, 18, 26, 43, 0, 0, 25, 17, 27, 19,
537 26, 22, 27, 35, 31, 0, 33, 32, 30, 29, 544 28, 22, 0, 29, 37, 0, 33, 0, 0, 35,
538 20, 0, 28, 36, 37, 21, 34 545 34, 32, 31, 20, 0, 30, 38, 39, 21, 0,
546 24, 36, 0, 0, 0, 23
539}; 547};
540 548
541/* YYDEFGOTO[NTERM-NUM]. */ 549/* YYDEFGOTO[NTERM-NUM]. */
542static const yytype_int8 yydefgoto[] = 550static const yytype_int8 yydefgoto[] =
543{ 551{
544 -1, 3, 14, 4, 5, 6, 27, 11, 18, 25, 552 -1, 3, 14, 4, 5, 6, 27, 11, 18, 25,
545 29, 44, 45, 54, 61, 62, 55, 30, 31, 7 553 29, 44, 45, 56, 64, 65, 57, 30, 31, 7
546}; 554};
547 555
548/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing 556/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing
549 STATE-NUM. */ 557 STATE-NUM. */
550#define YYPACT_NINF -13 558#define YYPACT_NINF -14
551static const yytype_int8 yypact[] = 559static const yytype_int8 yypact[] =
552{ 560{
553 23, 11, -13, 37, -13, -4, 18, 39, 18, -13, 561 30, -11, -14, 7, -14, -1, 27, 13, 27, -14,
554 28, -13, -13, 34, -4, 18, 41, -13, -13, -13, 562 8, -14, -14, 40, -1, 27, 35, -14, -14, -14,
555 -13, 25, -13, -13, 34, -3, 34, 33, 34, -13, 563 -14, 21, -14, -14, 40, 24, 40, 28, 40, -14,
556 30, -3, 43, 36, -13, 38, -13, -13, 20, -13, 564 32, 24, 46, 38, -14, 39, -14, -14, 26, -14,
557 -13, -13, -13, -13, 2, 9, -13, -13, -13, -13, 565 -14, -14, -14, -14, -9, 10, -14, -14, -14, -14,
558 -13, -13, -13, -13, -2, -6, -13, -13, -13, -13, 566 -14, -14, 31, -14, -14, 44, -2, 3, 23, -14,
559 -13, 45, -13, -13, -13, -13, -13 567 -14, -14, -14, -14, 50, -14, -14, -14, -14, 40,
568 -14, -14, 33, 40, 36, -14
560}; 569};
561 570
562/* YYPGOTO[NTERM-NUM]. */ 571/* YYPGOTO[NTERM-NUM]. */
563static const yytype_int8 yypgoto[] = 572static const yytype_int8 yypgoto[] =
564{ 573{
565 -13, -13, 35, 27, 47, -13, -12, 40, 17, -13, 574 -14, -14, 48, 29, 53, -14, -13, 47, 34, -14,
566 26, -13, -13, -13, -13, -13, -13, 29, -13, -8 575 37, -14, -14, -14, -14, -14, -14, 42, -14, -7
567}; 576};
568 577
569/* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If 578/* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If
570 positive, shift that token. If negative, reduce the rule which 579 positive, shift that token. If negative, reduce the rule which
571 number is the opposite. If zero, do what YYDEFACT says. 580 number is the opposite. If zero, do what YYDEFACT says.
572 If YYTABLE_NINF, syntax error. */ 581 If YYTABLE_NINF, syntax error. */
573#define YYTABLE_NINF -43 582#define YYTABLE_NINF -45
574static const yytype_int8 yytable[] = 583static const yytype_int8 yytable[] =
575{ 584{
576 16, 21, -42, 63, 56, 64, 57, 16, 2, 58, 585 21, 16, 46, 8, 59, 47, 60, 9, 16, 61,
577 59, 10, 28, 46, 33, 47, 65, 32, 60, 49, 586 62, 28, 66, 33, 67, 10, 48, 13, 32, 63,
578 50, 51, -42, 32, 8, 48, 1, -42, 52, 2, 587 49, 50, 51, 52, 32, 17, 68, 19, 20, -44,
579 53, 19, 20, 41, 2, 15, 17, 9, 42, 26, 588 53, -44, 54, 1, -44, 2, 26, 15, 2, 24,
580 19, 20, 15, 13, 17, 24, 34, 35, 38, 39, 589 41, 2, 34, 17, 15, 42, 19, 20, 69, 70,
581 23, 40, 66, 12, 22, 43, 0, 36, 0, 0, 590 35, 38, 39, 40, 58, 55, 72, 71, 73, 12,
582 37 591 74, 22, 75, 23, 0, 0, 0, 0, 36, 0,
592 0, 0, 43, 37
583}; 593};
584 594
585static const yytype_int8 yycheck[] = 595static const yytype_int8 yycheck[] =
586{ 596{
587 8, 13, 5, 9, 6, 11, 8, 15, 11, 11, 597 13, 8, 11, 14, 6, 14, 8, 0, 15, 11,
588 12, 15, 24, 11, 26, 13, 22, 25, 20, 10, 598 12, 24, 9, 26, 11, 16, 25, 4, 25, 21,
589 11, 12, 4, 31, 13, 23, 3, 4, 19, 11, 599 10, 11, 12, 13, 31, 17, 23, 6, 7, 5,
590 21, 6, 7, 13, 11, 8, 16, 0, 18, 14, 600 20, 4, 22, 3, 4, 11, 15, 8, 11, 4,
591 6, 7, 15, 4, 16, 4, 13, 17, 5, 13, 601 14, 11, 14, 17, 15, 19, 6, 7, 25, 26,
592 15, 13, 7, 6, 14, 38, -1, 31, -1, -1, 602 18, 5, 14, 14, 10, 24, 69, 7, 25, 6,
593 31 603 73, 14, 26, 15, -1, -1, -1, -1, 31, -1,
604 -1, -1, 38, 31
594}; 605};
595 606
596/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing 607/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing
597 symbol of state STATE-NUM. */ 608 symbol of state STATE-NUM. */
598static const yytype_uint8 yystos[] = 609static const yytype_uint8 yystos[] =
599{ 610{
600 0, 3, 11, 25, 27, 28, 29, 43, 13, 0, 611 0, 3, 11, 28, 30, 31, 32, 46, 14, 0,
601 15, 31, 28, 4, 26, 27, 43, 16, 32, 6, 612 16, 34, 31, 4, 29, 30, 46, 17, 35, 6,
602 7, 30, 31, 26, 4, 33, 14, 30, 30, 34, 613 7, 33, 34, 29, 4, 36, 15, 33, 33, 37,
603 41, 42, 43, 30, 13, 17, 34, 41, 5, 13, 614 44, 45, 46, 33, 14, 18, 37, 44, 5, 14,
604 13, 13, 18, 32, 35, 36, 11, 13, 23, 10, 615 14, 14, 19, 35, 38, 39, 11, 14, 25, 10,
605 11, 12, 19, 21, 37, 40, 6, 8, 11, 12, 616 11, 12, 13, 20, 22, 24, 40, 43, 10, 6,
606 20, 38, 39, 9, 11, 22, 7 617 8, 11, 12, 21, 41, 42, 9, 11, 23, 25,
618 26, 7, 33, 25, 33, 26
607}; 619};
608 620
609#define yyerrok (yyerrstatus = 0) 621#define yyerrok (yyerrstatus = 0)
@@ -1440,289 +1452,323 @@ yyreduce:
1440 switch (yyn) 1452 switch (yyn)
1441 { 1453 {
1442 case 2: 1454 case 2:
1443#line 86 "dtc-parser.y" 1455#line 90 "dtc-parser.y"
1444 { 1456 {
1445 the_boot_info = build_boot_info((yyvsp[(3) - (4)].re), (yyvsp[(4) - (4)].node)); 1457 the_boot_info = build_boot_info((yyvsp[(3) - (4)].re), (yyvsp[(4) - (4)].node), 0);
1446 ;} 1458 ;}
1447 break; 1459 break;
1448 1460
1449 case 3: 1461 case 3:
1450#line 90 "dtc-parser.y" 1462#line 94 "dtc-parser.y"
1451 { 1463 {
1452 the_boot_info = build_boot_info((yyvsp[(1) - (2)].re), (yyvsp[(2) - (2)].node)); 1464 the_boot_info = build_boot_info((yyvsp[(1) - (2)].re), (yyvsp[(2) - (2)].node), 0);
1453 ;} 1465 ;}
1454 break; 1466 break;
1455 1467
1456 case 4: 1468 case 4:
1457#line 97 "dtc-parser.y" 1469#line 101 "dtc-parser.y"
1458 { 1470 {
1459 (yyval.re) = NULL; 1471 (yyval.re) = NULL;
1460 ;} 1472 ;}
1461 break; 1473 break;
1462 1474
1463 case 5: 1475 case 5:
1464#line 101 "dtc-parser.y" 1476#line 105 "dtc-parser.y"
1465 { 1477 {
1466 (yyval.re) = chain_reserve_entry((yyvsp[(1) - (2)].re), (yyvsp[(2) - (2)].re)); 1478 (yyval.re) = chain_reserve_entry((yyvsp[(1) - (2)].re), (yyvsp[(2) - (2)].re));
1467 ;} 1479 ;}
1468 break; 1480 break;
1469 1481
1470 case 6: 1482 case 6:
1471#line 108 "dtc-parser.y" 1483#line 112 "dtc-parser.y"
1472 { 1484 {
1473 (yyval.re) = build_reserve_entry((yyvsp[(3) - (5)].addr), (yyvsp[(4) - (5)].addr), (yyvsp[(1) - (5)].labelref)); 1485 (yyval.re) = build_reserve_entry((yyvsp[(3) - (5)].addr), (yyvsp[(4) - (5)].addr), (yyvsp[(1) - (5)].labelref));
1474 ;} 1486 ;}
1475 break; 1487 break;
1476 1488
1477 case 7: 1489 case 7:
1478#line 115 "dtc-parser.y" 1490#line 119 "dtc-parser.y"
1479 { 1491 {
1480 (yyval.re) = NULL; 1492 (yyval.re) = NULL;
1481 ;} 1493 ;}
1482 break; 1494 break;
1483 1495
1484 case 8: 1496 case 8:
1485#line 119 "dtc-parser.y" 1497#line 123 "dtc-parser.y"
1486 { 1498 {
1487 (yyval.re) = chain_reserve_entry((yyvsp[(1) - (2)].re), (yyvsp[(2) - (2)].re)); 1499 (yyval.re) = chain_reserve_entry((yyvsp[(1) - (2)].re), (yyvsp[(2) - (2)].re));
1488 ;} 1500 ;}
1489 break; 1501 break;
1490 1502
1491 case 9: 1503 case 9:
1492#line 126 "dtc-parser.y" 1504#line 130 "dtc-parser.y"
1493 { 1505 {
1494 (yyval.re) = (yyvsp[(1) - (1)].re); 1506 (yyval.re) = (yyvsp[(1) - (1)].re);
1495 ;} 1507 ;}
1496 break; 1508 break;
1497 1509
1498 case 10: 1510 case 10:
1499#line 130 "dtc-parser.y" 1511#line 134 "dtc-parser.y"
1500 { 1512 {
1501 (yyval.re) = build_reserve_entry((yyvsp[(3) - (6)].addr), (yyvsp[(5) - (6)].addr) - (yyvsp[(3) - (6)].addr) + 1, (yyvsp[(1) - (6)].labelref)); 1513 (yyval.re) = build_reserve_entry((yyvsp[(3) - (6)].addr), (yyvsp[(5) - (6)].addr) - (yyvsp[(3) - (6)].addr) + 1, (yyvsp[(1) - (6)].labelref));
1502 ;} 1514 ;}
1503 break; 1515 break;
1504 1516
1505 case 11: 1517 case 11:
1506#line 137 "dtc-parser.y" 1518#line 141 "dtc-parser.y"
1507 { 1519 {
1508 (yyval.addr) = eval_literal((yyvsp[(1) - (1)].literal), 0, 64); 1520 (yyval.addr) = eval_literal((yyvsp[(1) - (1)].literal), 0, 64);
1509 ;} 1521 ;}
1510 break; 1522 break;
1511 1523
1512 case 12: 1524 case 12:
1513#line 141 "dtc-parser.y" 1525#line 145 "dtc-parser.y"
1514 { 1526 {
1515 (yyval.addr) = eval_literal((yyvsp[(1) - (1)].literal), 16, 64); 1527 (yyval.addr) = eval_literal((yyvsp[(1) - (1)].literal), 16, 64);
1516 ;} 1528 ;}
1517 break; 1529 break;
1518 1530
1519 case 13: 1531 case 13:
1520#line 148 "dtc-parser.y" 1532#line 152 "dtc-parser.y"
1521 { 1533 {
1522 (yyval.node) = name_node((yyvsp[(2) - (2)].node), "", NULL); 1534 (yyval.node) = name_node((yyvsp[(2) - (2)].node), "", NULL);
1523 ;} 1535 ;}
1524 break; 1536 break;
1525 1537
1526 case 14: 1538 case 14:
1527#line 155 "dtc-parser.y" 1539#line 159 "dtc-parser.y"
1528 { 1540 {
1529 (yyval.node) = build_node((yyvsp[(2) - (5)].proplist), (yyvsp[(3) - (5)].nodelist)); 1541 (yyval.node) = build_node((yyvsp[(2) - (5)].proplist), (yyvsp[(3) - (5)].nodelist));
1530 ;} 1542 ;}
1531 break; 1543 break;
1532 1544
1533 case 15: 1545 case 15:
1534#line 162 "dtc-parser.y" 1546#line 166 "dtc-parser.y"
1535 { 1547 {
1536 (yyval.proplist) = NULL; 1548 (yyval.proplist) = NULL;
1537 ;} 1549 ;}
1538 break; 1550 break;
1539 1551
1540 case 16: 1552 case 16:
1541#line 166 "dtc-parser.y" 1553#line 170 "dtc-parser.y"
1542 { 1554 {
1543 (yyval.proplist) = chain_property((yyvsp[(2) - (2)].prop), (yyvsp[(1) - (2)].proplist)); 1555 (yyval.proplist) = chain_property((yyvsp[(2) - (2)].prop), (yyvsp[(1) - (2)].proplist));
1544 ;} 1556 ;}
1545 break; 1557 break;
1546 1558
1547 case 17: 1559 case 17:
1548#line 173 "dtc-parser.y" 1560#line 177 "dtc-parser.y"
1549 { 1561 {
1550 (yyval.prop) = build_property((yyvsp[(2) - (5)].propnodename), (yyvsp[(4) - (5)].data), (yyvsp[(1) - (5)].labelref)); 1562 (yyval.prop) = build_property((yyvsp[(2) - (5)].propnodename), (yyvsp[(4) - (5)].data), (yyvsp[(1) - (5)].labelref));
1551 ;} 1563 ;}
1552 break; 1564 break;
1553 1565
1554 case 18: 1566 case 18:
1555#line 177 "dtc-parser.y" 1567#line 181 "dtc-parser.y"
1556 { 1568 {
1557 (yyval.prop) = build_property((yyvsp[(2) - (3)].propnodename), empty_data, (yyvsp[(1) - (3)].labelref)); 1569 (yyval.prop) = build_property((yyvsp[(2) - (3)].propnodename), empty_data, (yyvsp[(1) - (3)].labelref));
1558 ;} 1570 ;}
1559 break; 1571 break;
1560 1572
1561 case 19: 1573 case 19:
1562#line 184 "dtc-parser.y" 1574#line 188 "dtc-parser.y"
1563 { 1575 {
1564 (yyval.data) = data_merge((yyvsp[(1) - (2)].data), (yyvsp[(2) - (2)].data)); 1576 (yyval.data) = data_merge((yyvsp[(1) - (2)].data), (yyvsp[(2) - (2)].data));
1565 ;} 1577 ;}
1566 break; 1578 break;
1567 1579
1568 case 20: 1580 case 20:
1569#line 188 "dtc-parser.y" 1581#line 192 "dtc-parser.y"
1570 { 1582 {
1571 (yyval.data) = data_merge((yyvsp[(1) - (4)].data), (yyvsp[(3) - (4)].data)); 1583 (yyval.data) = data_merge((yyvsp[(1) - (4)].data), (yyvsp[(3) - (4)].data));
1572 ;} 1584 ;}
1573 break; 1585 break;
1574 1586
1575 case 21: 1587 case 21:
1576#line 192 "dtc-parser.y" 1588#line 196 "dtc-parser.y"
1577 { 1589 {
1578 (yyval.data) = data_merge((yyvsp[(1) - (4)].data), (yyvsp[(3) - (4)].data)); 1590 (yyval.data) = data_merge((yyvsp[(1) - (4)].data), (yyvsp[(3) - (4)].data));
1579 ;} 1591 ;}
1580 break; 1592 break;
1581 1593
1582 case 22: 1594 case 22:
1583#line 196 "dtc-parser.y" 1595#line 200 "dtc-parser.y"
1584 { 1596 {
1585 (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), REF_PATH, (yyvsp[(2) - (2)].labelref)); 1597 (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), REF_PATH, (yyvsp[(2) - (2)].labelref));
1586 ;} 1598 ;}
1587 break; 1599 break;
1588 1600
1589 case 23: 1601 case 23:
1590#line 200 "dtc-parser.y" 1602#line 204 "dtc-parser.y"
1591 { 1603 {
1592 (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), LABEL, (yyvsp[(2) - (2)].labelref)); 1604 struct search_path path = { srcpos_file->dir, NULL, NULL };
1605 struct dtc_file *file = dtc_open_file((yyvsp[(4) - (9)].data).val, &path);
1606 struct data d = empty_data;
1607
1608 if ((yyvsp[(6) - (9)].addr) != 0)
1609 if (fseek(file->file, (yyvsp[(6) - (9)].addr), SEEK_SET) != 0)
1610 yyerrorf("Couldn't seek to offset %llu in \"%s\": %s",
1611 (unsigned long long)(yyvsp[(6) - (9)].addr),
1612 (yyvsp[(4) - (9)].data).val, strerror(errno));
1613
1614 d = data_copy_file(file->file, (yyvsp[(8) - (9)].addr));
1615
1616 (yyval.data) = data_merge((yyvsp[(1) - (9)].data), d);
1617 dtc_close_file(file);
1593 ;} 1618 ;}
1594 break; 1619 break;
1595 1620
1596 case 24: 1621 case 24:
1597#line 207 "dtc-parser.y" 1622#line 221 "dtc-parser.y"
1598 { 1623 {
1599 (yyval.data) = empty_data; 1624 struct search_path path = { srcpos_file->dir, NULL, NULL };
1625 struct dtc_file *file = dtc_open_file((yyvsp[(4) - (5)].data).val, &path);
1626 struct data d = empty_data;
1627
1628 d = data_copy_file(file->file, -1);
1629
1630 (yyval.data) = data_merge((yyvsp[(1) - (5)].data), d);
1631 dtc_close_file(file);
1600 ;} 1632 ;}
1601 break; 1633 break;
1602 1634
1603 case 25: 1635 case 25:
1604#line 211 "dtc-parser.y" 1636#line 232 "dtc-parser.y"
1605 { 1637 {
1606 (yyval.data) = (yyvsp[(1) - (2)].data); 1638 (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), LABEL, (yyvsp[(2) - (2)].labelref));
1607 ;} 1639 ;}
1608 break; 1640 break;
1609 1641
1610 case 26: 1642 case 26:
1611#line 215 "dtc-parser.y" 1643#line 239 "dtc-parser.y"
1612 { 1644 {
1613 (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), LABEL, (yyvsp[(2) - (2)].labelref)); 1645 (yyval.data) = empty_data;
1614 ;} 1646 ;}
1615 break; 1647 break;
1616 1648
1617 case 27: 1649 case 27:
1618#line 222 "dtc-parser.y" 1650#line 243 "dtc-parser.y"
1619 { 1651 {
1620 (yyval.data) = empty_data; 1652 (yyval.data) = (yyvsp[(1) - (2)].data);
1621 ;} 1653 ;}
1622 break; 1654 break;
1623 1655
1624 case 28: 1656 case 28:
1625#line 226 "dtc-parser.y" 1657#line 247 "dtc-parser.y"
1626 { 1658 {
1627 (yyval.data) = data_append_cell((yyvsp[(1) - (2)].data), (yyvsp[(2) - (2)].cell)); 1659 (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), LABEL, (yyvsp[(2) - (2)].labelref));
1628 ;} 1660 ;}
1629 break; 1661 break;
1630 1662
1631 case 29: 1663 case 29:
1632#line 230 "dtc-parser.y" 1664#line 254 "dtc-parser.y"
1665 {
1666 (yyval.data) = empty_data;
1667 ;}
1668 break;
1669
1670 case 30:
1671#line 258 "dtc-parser.y"
1672 {
1673 (yyval.data) = data_append_cell((yyvsp[(1) - (2)].data), (yyvsp[(2) - (2)].cell));
1674 ;}
1675 break;
1676
1677 case 31:
1678#line 262 "dtc-parser.y"
1633 { 1679 {
1634 (yyval.data) = data_append_cell(data_add_marker((yyvsp[(1) - (2)].data), REF_PHANDLE, 1680 (yyval.data) = data_append_cell(data_add_marker((yyvsp[(1) - (2)].data), REF_PHANDLE,
1635 (yyvsp[(2) - (2)].labelref)), -1); 1681 (yyvsp[(2) - (2)].labelref)), -1);
1636 ;} 1682 ;}
1637 break; 1683 break;
1638 1684
1639 case 30: 1685 case 32:
1640#line 235 "dtc-parser.y" 1686#line 267 "dtc-parser.y"
1641 { 1687 {
1642 (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), LABEL, (yyvsp[(2) - (2)].labelref)); 1688 (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), LABEL, (yyvsp[(2) - (2)].labelref));
1643 ;} 1689 ;}
1644 break; 1690 break;
1645 1691
1646 case 31: 1692 case 33:
1647#line 242 "dtc-parser.y" 1693#line 274 "dtc-parser.y"
1648 { 1694 {
1649 (yyval.cbase) = 16; 1695 (yyval.cbase) = 16;
1650 ;} 1696 ;}
1651 break; 1697 break;
1652 1698
1653 case 33: 1699 case 35:
1654#line 250 "dtc-parser.y" 1700#line 282 "dtc-parser.y"
1655 { 1701 {
1656 (yyval.cell) = eval_literal((yyvsp[(1) - (1)].literal), 0, 32); 1702 (yyval.cell) = eval_literal((yyvsp[(1) - (1)].literal), 0, 32);
1657 ;} 1703 ;}
1658 break; 1704 break;
1659 1705
1660 case 34: 1706 case 36:
1661#line 254 "dtc-parser.y" 1707#line 286 "dtc-parser.y"
1662 { 1708 {
1663 (yyval.cell) = eval_literal((yyvsp[(2) - (2)].literal), (yyvsp[(1) - (2)].cbase), 32); 1709 (yyval.cell) = eval_literal((yyvsp[(2) - (2)].literal), (yyvsp[(1) - (2)].cbase), 32);
1664 ;} 1710 ;}
1665 break; 1711 break;
1666 1712
1667 case 35: 1713 case 37:
1668#line 261 "dtc-parser.y" 1714#line 293 "dtc-parser.y"
1669 { 1715 {
1670 (yyval.data) = empty_data; 1716 (yyval.data) = empty_data;
1671 ;} 1717 ;}
1672 break; 1718 break;
1673 1719
1674 case 36: 1720 case 38:
1675#line 265 "dtc-parser.y" 1721#line 297 "dtc-parser.y"
1676 { 1722 {
1677 (yyval.data) = data_append_byte((yyvsp[(1) - (2)].data), (yyvsp[(2) - (2)].byte)); 1723 (yyval.data) = data_append_byte((yyvsp[(1) - (2)].data), (yyvsp[(2) - (2)].byte));
1678 ;} 1724 ;}
1679 break; 1725 break;
1680 1726
1681 case 37: 1727 case 39:
1682#line 269 "dtc-parser.y" 1728#line 301 "dtc-parser.y"
1683 { 1729 {
1684 (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), LABEL, (yyvsp[(2) - (2)].labelref)); 1730 (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), LABEL, (yyvsp[(2) - (2)].labelref));
1685 ;} 1731 ;}
1686 break; 1732 break;
1687 1733
1688 case 38: 1734 case 40:
1689#line 276 "dtc-parser.y" 1735#line 308 "dtc-parser.y"
1690 { 1736 {
1691 (yyval.nodelist) = NULL; 1737 (yyval.nodelist) = NULL;
1692 ;} 1738 ;}
1693 break; 1739 break;
1694 1740
1695 case 39: 1741 case 41:
1696#line 280 "dtc-parser.y" 1742#line 312 "dtc-parser.y"
1697 { 1743 {
1698 (yyval.nodelist) = chain_node((yyvsp[(1) - (2)].node), (yyvsp[(2) - (2)].nodelist)); 1744 (yyval.nodelist) = chain_node((yyvsp[(1) - (2)].node), (yyvsp[(2) - (2)].nodelist));
1699 ;} 1745 ;}
1700 break; 1746 break;
1701 1747
1702 case 40: 1748 case 42:
1703#line 284 "dtc-parser.y" 1749#line 316 "dtc-parser.y"
1704 { 1750 {
1705 yyerror("syntax error: properties must precede subnodes\n"); 1751 yyerror("syntax error: properties must precede subnodes");
1706 YYERROR; 1752 YYERROR;
1707 ;} 1753 ;}
1708 break; 1754 break;
1709 1755
1710 case 41: 1756 case 43:
1711#line 292 "dtc-parser.y" 1757#line 324 "dtc-parser.y"
1712 { 1758 {
1713 (yyval.node) = name_node((yyvsp[(3) - (3)].node), (yyvsp[(2) - (3)].propnodename), (yyvsp[(1) - (3)].labelref)); 1759 (yyval.node) = name_node((yyvsp[(3) - (3)].node), (yyvsp[(2) - (3)].propnodename), (yyvsp[(1) - (3)].labelref));
1714 ;} 1760 ;}
1715 break; 1761 break;
1716 1762
1717 case 42: 1763 case 44:
1718#line 299 "dtc-parser.y" 1764#line 331 "dtc-parser.y"
1719 { 1765 {
1720 (yyval.labelref) = NULL; 1766 (yyval.labelref) = NULL;
1721 ;} 1767 ;}
1722 break; 1768 break;
1723 1769
1724 case 43: 1770 case 45:
1725#line 303 "dtc-parser.y" 1771#line 335 "dtc-parser.y"
1726 { 1772 {
1727 (yyval.labelref) = (yyvsp[(1) - (1)].labelref); 1773 (yyval.labelref) = (yyvsp[(1) - (1)].labelref);
1728 ;} 1774 ;}
@@ -1730,7 +1776,7 @@ yyreduce:
1730 1776
1731 1777
1732/* Line 1267 of yacc.c. */ 1778/* Line 1267 of yacc.c. */
1733#line 1734 "dtc-parser.tab.c" 1779#line 1780 "dtc-parser.tab.c"
1734 default: break; 1780 default: break;
1735 } 1781 }
1736 YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc); 1782 YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc);
@@ -1950,21 +1996,32 @@ yyreturn:
1950} 1996}
1951 1997
1952 1998
1953#line 308 "dtc-parser.y" 1999#line 340 "dtc-parser.y"
1954 2000
1955 2001
1956void yyerror (char const *s) 2002void yyerrorf(char const *s, ...)
1957{ 2003{
1958 const char *fname = srcpos_filename_for_num(yylloc.filenum); 2004 const char *fname = srcpos_file ? srcpos_file->name : "<no-file>";
2005 va_list va;
2006 va_start(va, s);
1959 2007
1960 if (strcmp(fname, "-") == 0) 2008 if (strcmp(fname, "-") == 0)
1961 fname = "stdin"; 2009 fname = "stdin";
1962 2010
1963 fprintf(stderr, "%s:%d %s\n", 2011 fprintf(stderr, "%s:%d ", fname, yylloc.first_line);
1964 fname, yylloc.first_line, s); 2012 vfprintf(stderr, s, va);
2013 fprintf(stderr, "\n");
2014
2015 treesource_error = 1;
2016 va_end(va);
2017}
2018
2019void yyerror (char const *s)
2020{
2021 yyerrorf("%s", s);
1965} 2022}
1966 2023
1967unsigned long long eval_literal(const char *s, int base, int bits) 2024static unsigned long long eval_literal(const char *s, int base, int bits)
1968{ 2025{
1969 unsigned long long val; 2026 unsigned long long val;
1970 char *e; 2027 char *e;
diff --git a/arch/powerpc/boot/dtc-src/dtc-parser.tab.h_shipped b/arch/powerpc/boot/dtc-src/dtc-parser.tab.h_shipped
index 4707b029ed25..ba99100d55c9 100644
--- a/arch/powerpc/boot/dtc-src/dtc-parser.tab.h_shipped
+++ b/arch/powerpc/boot/dtc-src/dtc-parser.tab.h_shipped
@@ -48,7 +48,8 @@
48 DT_BYTE = 264, 48 DT_BYTE = 264,
49 DT_STRING = 265, 49 DT_STRING = 265,
50 DT_LABEL = 266, 50 DT_LABEL = 266,
51 DT_REF = 267 51 DT_REF = 267,
52 DT_INCBIN = 268
52 }; 53 };
53#endif 54#endif
54/* Tokens. */ 55/* Tokens. */
@@ -62,22 +63,23 @@
62#define DT_STRING 265 63#define DT_STRING 265
63#define DT_LABEL 266 64#define DT_LABEL 266
64#define DT_REF 267 65#define DT_REF 267
66#define DT_INCBIN 268
65 67
66 68
67 69
68 70
69#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED 71#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
70typedef union YYSTYPE 72typedef union YYSTYPE
71#line 34 "dtc-parser.y" 73#line 37 "dtc-parser.y"
72{ 74{
73 char *propnodename; 75 char *propnodename;
74 char *literal; 76 char *literal;
75 char *labelref; 77 char *labelref;
76 unsigned int cbase; 78 unsigned int cbase;
77 u8 byte; 79 uint8_t byte;
78 struct data data; 80 struct data data;
79 81
80 u64 addr; 82 uint64_t addr;
81 cell_t cell; 83 cell_t cell;
82 struct property *prop; 84 struct property *prop;
83 struct property *proplist; 85 struct property *proplist;
@@ -86,7 +88,7 @@ typedef union YYSTYPE
86 struct reserve_info *re; 88 struct reserve_info *re;
87} 89}
88/* Line 1489 of yacc.c. */ 90/* Line 1489 of yacc.c. */
89#line 90 "dtc-parser.tab.h" 91#line 92 "dtc-parser.tab.h"
90 YYSTYPE; 92 YYSTYPE;
91# define yystype YYSTYPE /* obsolescent; will be withdrawn */ 93# define yystype YYSTYPE /* obsolescent; will be withdrawn */
92# define YYSTYPE_IS_DECLARED 1 94# define YYSTYPE_IS_DECLARED 1
diff --git a/arch/powerpc/boot/dtc-src/dtc-parser.y b/arch/powerpc/boot/dtc-src/dtc-parser.y
index 002ea7fef184..b2ab562420ea 100644
--- a/arch/powerpc/boot/dtc-src/dtc-parser.y
+++ b/arch/powerpc/boot/dtc-src/dtc-parser.y
@@ -21,14 +21,17 @@
21%locations 21%locations
22 22
23%{ 23%{
24#include <stdio.h>
25
24#include "dtc.h" 26#include "dtc.h"
25#include "srcpos.h" 27#include "srcpos.h"
26 28
27int yylex(void); 29extern int yylex(void);
28unsigned long long eval_literal(const char *s, int base, int bits);
29 30
30extern struct boot_info *the_boot_info; 31extern struct boot_info *the_boot_info;
32extern int treesource_error;
31 33
34static unsigned long long eval_literal(const char *s, int base, int bits);
32%} 35%}
33 36
34%union { 37%union {
@@ -36,10 +39,10 @@ extern struct boot_info *the_boot_info;
36 char *literal; 39 char *literal;
37 char *labelref; 40 char *labelref;
38 unsigned int cbase; 41 unsigned int cbase;
39 u8 byte; 42 uint8_t byte;
40 struct data data; 43 struct data data;
41 44
42 u64 addr; 45 uint64_t addr;
43 cell_t cell; 46 cell_t cell;
44 struct property *prop; 47 struct property *prop;
45 struct property *proplist; 48 struct property *proplist;
@@ -58,6 +61,7 @@ extern struct boot_info *the_boot_info;
58%token <data> DT_STRING 61%token <data> DT_STRING
59%token <labelref> DT_LABEL 62%token <labelref> DT_LABEL
60%token <labelref> DT_REF 63%token <labelref> DT_REF
64%token DT_INCBIN
61 65
62%type <data> propdata 66%type <data> propdata
63%type <data> propdataprefix 67%type <data> propdataprefix
@@ -84,11 +88,11 @@ extern struct boot_info *the_boot_info;
84sourcefile: 88sourcefile:
85 DT_V1 ';' memreserves devicetree 89 DT_V1 ';' memreserves devicetree
86 { 90 {
87 the_boot_info = build_boot_info($3, $4); 91 the_boot_info = build_boot_info($3, $4, 0);
88 } 92 }
89 | v0_memreserves devicetree 93 | v0_memreserves devicetree
90 { 94 {
91 the_boot_info = build_boot_info($1, $2); 95 the_boot_info = build_boot_info($1, $2, 0);
92 } 96 }
93 ; 97 ;
94 98
@@ -196,6 +200,34 @@ propdata:
196 { 200 {
197 $$ = data_add_marker($1, REF_PATH, $2); 201 $$ = data_add_marker($1, REF_PATH, $2);
198 } 202 }
203 | propdataprefix DT_INCBIN '(' DT_STRING ',' addr ',' addr ')'
204 {
205 struct search_path path = { srcpos_file->dir, NULL, NULL };
206 struct dtc_file *file = dtc_open_file($4.val, &path);
207 struct data d = empty_data;
208
209 if ($6 != 0)
210 if (fseek(file->file, $6, SEEK_SET) != 0)
211 yyerrorf("Couldn't seek to offset %llu in \"%s\": %s",
212 (unsigned long long)$6,
213 $4.val, strerror(errno));
214
215 d = data_copy_file(file->file, $8);
216
217 $$ = data_merge($1, d);
218 dtc_close_file(file);
219 }
220 | propdataprefix DT_INCBIN '(' DT_STRING ')'
221 {
222 struct search_path path = { srcpos_file->dir, NULL, NULL };
223 struct dtc_file *file = dtc_open_file($4.val, &path);
224 struct data d = empty_data;
225
226 d = data_copy_file(file->file, -1);
227
228 $$ = data_merge($1, d);
229 dtc_close_file(file);
230 }
199 | propdata DT_LABEL 231 | propdata DT_LABEL
200 { 232 {
201 $$ = data_add_marker($1, LABEL, $2); 233 $$ = data_add_marker($1, LABEL, $2);
@@ -282,7 +314,7 @@ subnodes:
282 } 314 }
283 | subnode propdef 315 | subnode propdef
284 { 316 {
285 yyerror("syntax error: properties must precede subnodes\n"); 317 yyerror("syntax error: properties must precede subnodes");
286 YYERROR; 318 YYERROR;
287 } 319 }
288 ; 320 ;
@@ -307,18 +339,29 @@ label:
307 339
308%% 340%%
309 341
310void yyerror (char const *s) 342void yyerrorf(char const *s, ...)
311{ 343{
312 const char *fname = srcpos_filename_for_num(yylloc.filenum); 344 const char *fname = srcpos_file ? srcpos_file->name : "<no-file>";
345 va_list va;
346 va_start(va, s);
313 347
314 if (strcmp(fname, "-") == 0) 348 if (strcmp(fname, "-") == 0)
315 fname = "stdin"; 349 fname = "stdin";
316 350
317 fprintf(stderr, "%s:%d %s\n", 351 fprintf(stderr, "%s:%d ", fname, yylloc.first_line);
318 fname, yylloc.first_line, s); 352 vfprintf(stderr, s, va);
353 fprintf(stderr, "\n");
354
355 treesource_error = 1;
356 va_end(va);
357}
358
359void yyerror (char const *s)
360{
361 yyerrorf("%s", s);
319} 362}
320 363
321unsigned long long eval_literal(const char *s, int base, int bits) 364static unsigned long long eval_literal(const char *s, int base, int bits)
322{ 365{
323 unsigned long long val; 366 unsigned long long val;
324 char *e; 367 char *e;
diff --git a/arch/powerpc/boot/dtc-src/dtc.c b/arch/powerpc/boot/dtc-src/dtc.c
index 01131d7c2d5e..d8fd43b4ac1a 100644
--- a/arch/powerpc/boot/dtc-src/dtc.c
+++ b/arch/powerpc/boot/dtc-src/dtc.c
@@ -55,7 +55,7 @@ char *join_path(const char *path, const char *name)
55 return str; 55 return str;
56} 56}
57 57
58void fill_fullpaths(struct node *tree, const char *prefix) 58static void fill_fullpaths(struct node *tree, const char *prefix)
59{ 59{
60 struct node *child; 60 struct node *child;
61 const char *unit; 61 const char *unit;
@@ -106,7 +106,7 @@ static void __attribute__ ((noreturn)) usage(void)
106 fprintf(stderr, "\t\tForce - try to produce output even if the input tree has errors\n"); 106 fprintf(stderr, "\t\tForce - try to produce output even if the input tree has errors\n");
107 fprintf(stderr, "\t-v\n"); 107 fprintf(stderr, "\t-v\n");
108 fprintf(stderr, "\t\tPrint DTC version and exit\n"); 108 fprintf(stderr, "\t\tPrint DTC version and exit\n");
109 exit(2); 109 exit(3);
110} 110}
111 111
112int main(int argc, char *argv[]) 112int main(int argc, char *argv[])
@@ -118,10 +118,9 @@ int main(int argc, char *argv[])
118 int force = 0, check = 0; 118 int force = 0, check = 0;
119 const char *arg; 119 const char *arg;
120 int opt; 120 int opt;
121 FILE *inf = NULL;
122 FILE *outf = NULL; 121 FILE *outf = NULL;
123 int outversion = DEFAULT_FDT_VERSION; 122 int outversion = DEFAULT_FDT_VERSION;
124 int boot_cpuid_phys = 0xfeedbeef; 123 long long cmdline_boot_cpuid = -1;
125 124
126 quiet = 0; 125 quiet = 0;
127 reservenum = 0; 126 reservenum = 0;
@@ -161,11 +160,11 @@ int main(int argc, char *argv[])
161 quiet++; 160 quiet++;
162 break; 161 break;
163 case 'b': 162 case 'b':
164 boot_cpuid_phys = strtol(optarg, NULL, 0); 163 cmdline_boot_cpuid = strtoll(optarg, NULL, 0);
165 break; 164 break;
166 case 'v': 165 case 'v':
167 printf("Version: %s\n", DTC_VERSION); 166 printf("Version: %s\n", DTC_VERSION);
168 exit(0); 167 exit(0);
169 case 'h': 168 case 'h':
170 default: 169 default:
171 usage(); 170 usage();
@@ -180,31 +179,27 @@ int main(int argc, char *argv[])
180 arg = argv[optind]; 179 arg = argv[optind];
181 180
182 /* minsize and padsize are mutually exclusive */ 181 /* minsize and padsize are mutually exclusive */
183 if ((minsize) && (padsize)) { 182 if (minsize && padsize)
184 die("Can't set both -p and -S\n"); 183 die("Can't set both -p and -S\n");
185 }
186 184
187 fprintf(stderr, "DTC: %s->%s on file \"%s\"\n", 185 fprintf(stderr, "DTC: %s->%s on file \"%s\"\n",
188 inform, outform, arg); 186 inform, outform, arg);
189 187
190 if (streq(inform, "dts")) { 188 if (streq(inform, "dts"))
191 bi = dt_from_source(arg); 189 bi = dt_from_source(arg);
192 } else if (streq(inform, "fs")) { 190 else if (streq(inform, "fs"))
193 bi = dt_from_fs(arg); 191 bi = dt_from_fs(arg);
194 } else if(streq(inform, "dtb")) { 192 else if(streq(inform, "dtb"))
195 inf = dtc_open_file(arg); 193 bi = dt_from_blob(arg);
196 bi = dt_from_blob(inf); 194 else
197 } else {
198 die("Unknown input format \"%s\"\n", inform); 195 die("Unknown input format \"%s\"\n", inform);
199 }
200 196
201 if (inf && (inf != stdin)) 197 if (cmdline_boot_cpuid != -1)
202 fclose(inf); 198 bi->boot_cpuid_phys = cmdline_boot_cpuid;
203 199
204 if (! bi || ! bi->dt) 200 fill_fullpaths(bi->dt, "");
205 die("Couldn't read input tree\n"); 201 process_checks(force, bi);
206 202
207 process_checks(force, bi, check, outversion, boot_cpuid_phys);
208 203
209 if (streq(outname, "-")) { 204 if (streq(outname, "-")) {
210 outf = stdout; 205 outf = stdout;
@@ -218,9 +213,9 @@ int main(int argc, char *argv[])
218 if (streq(outform, "dts")) { 213 if (streq(outform, "dts")) {
219 dt_to_source(outf, bi); 214 dt_to_source(outf, bi);
220 } else if (streq(outform, "dtb")) { 215 } else if (streq(outform, "dtb")) {
221 dt_to_blob(outf, bi, outversion, boot_cpuid_phys); 216 dt_to_blob(outf, bi, outversion);
222 } else if (streq(outform, "asm")) { 217 } else if (streq(outform, "asm")) {
223 dt_to_asm(outf, bi, outversion, boot_cpuid_phys); 218 dt_to_asm(outf, bi, outversion);
224 } else if (streq(outform, "null")) { 219 } else if (streq(outform, "null")) {
225 /* do nothing */ 220 /* do nothing */
226 } else { 221 } else {
diff --git a/arch/powerpc/boot/dtc-src/dtc.h b/arch/powerpc/boot/dtc-src/dtc.h
index 65281777a167..08d54c870086 100644
--- a/arch/powerpc/boot/dtc-src/dtc.h
+++ b/arch/powerpc/boot/dtc-src/dtc.h
@@ -30,10 +30,8 @@
30#include <ctype.h> 30#include <ctype.h>
31#include <errno.h> 31#include <errno.h>
32#include <unistd.h> 32#include <unistd.h>
33#include <netinet/in.h>
34#include <endian.h>
35#include <byteswap.h>
36 33
34#include <libfdt_env.h>
37#include <fdt.h> 35#include <fdt.h>
38 36
39#define DEFAULT_FDT_VERSION 17 37#define DEFAULT_FDT_VERSION 17
@@ -75,25 +73,8 @@ static inline void *xrealloc(void *p, size_t len)
75 return new; 73 return new;
76} 74}
77 75
78typedef uint8_t u8; 76typedef uint32_t cell_t;
79typedef uint16_t u16;
80typedef uint32_t u32;
81typedef uint64_t u64;
82typedef u32 cell_t;
83 77
84#define cpu_to_be16(x) htons(x)
85#define be16_to_cpu(x) ntohs(x)
86
87#define cpu_to_be32(x) htonl(x)
88#define be32_to_cpu(x) ntohl(x)
89
90#if __BYTE_ORDER == __BIG_ENDIAN
91#define cpu_to_be64(x) (x)
92#define be64_to_cpu(x) (x)
93#else
94#define cpu_to_be64(x) bswap_64(x)
95#define be64_to_cpu(x) bswap_64(x)
96#endif
97 78
98#define streq(a, b) (strcmp((a), (b)) == 0) 79#define streq(a, b) (strcmp((a), (b)) == 0)
99#define strneq(a, b, n) (strncmp((a), (b), (n)) == 0) 80#define strneq(a, b, n) (strncmp((a), (b), (n)) == 0)
@@ -118,7 +99,6 @@ struct marker {
118struct data { 99struct data {
119 int len; 100 int len;
120 char *val; 101 char *val;
121 int asize;
122 struct marker *markers; 102 struct marker *markers;
123}; 103};
124 104
@@ -145,7 +125,7 @@ struct data data_insert_at_marker(struct data d, struct marker *m,
145struct data data_merge(struct data d1, struct data d2); 125struct data data_merge(struct data d1, struct data d2);
146struct data data_append_cell(struct data d, cell_t word); 126struct data data_append_cell(struct data d, cell_t word);
147struct data data_append_re(struct data d, const struct fdt_reserve_entry *re); 127struct data data_append_re(struct data d, const struct fdt_reserve_entry *re);
148struct data data_append_addr(struct data d, u64 addr); 128struct data data_append_addr(struct data d, uint64_t addr);
149struct data data_append_byte(struct data d, uint8_t byte); 129struct data data_append_byte(struct data d, uint8_t byte);
150struct data data_append_zeroes(struct data d, int len); 130struct data data_append_zeroes(struct data d, int len);
151struct data data_append_align(struct data d, int align); 131struct data data_append_align(struct data d, int align);
@@ -223,7 +203,7 @@ struct reserve_info {
223 char *label; 203 char *label;
224}; 204};
225 205
226struct reserve_info *build_reserve_entry(u64 start, u64 len, char *label); 206struct reserve_info *build_reserve_entry(uint64_t start, uint64_t len, char *label);
227struct reserve_info *chain_reserve_entry(struct reserve_info *first, 207struct reserve_info *chain_reserve_entry(struct reserve_info *first,
228 struct reserve_info *list); 208 struct reserve_info *list);
229struct reserve_info *add_reserve_entry(struct reserve_info *list, 209struct reserve_info *add_reserve_entry(struct reserve_info *list,
@@ -233,24 +213,22 @@ struct reserve_info *add_reserve_entry(struct reserve_info *list,
233struct boot_info { 213struct boot_info {
234 struct reserve_info *reservelist; 214 struct reserve_info *reservelist;
235 struct node *dt; /* the device tree */ 215 struct node *dt; /* the device tree */
216 uint32_t boot_cpuid_phys;
236}; 217};
237 218
238struct boot_info *build_boot_info(struct reserve_info *reservelist, 219struct boot_info *build_boot_info(struct reserve_info *reservelist,
239 struct node *tree); 220 struct node *tree, uint32_t boot_cpuid_phys);
240 221
241/* Checks */ 222/* Checks */
242 223
243void process_checks(int force, struct boot_info *bi, 224void process_checks(int force, struct boot_info *bi);
244 int checkflag, int outversion, int boot_cpuid_phys);
245 225
246/* Flattened trees */ 226/* Flattened trees */
247 227
248void dt_to_blob(FILE *f, struct boot_info *bi, int version, 228void dt_to_blob(FILE *f, struct boot_info *bi, int version);
249 int boot_cpuid_phys); 229void dt_to_asm(FILE *f, struct boot_info *bi, int version);
250void dt_to_asm(FILE *f, struct boot_info *bi, int version,
251 int boot_cpuid_phys);
252 230
253struct boot_info *dt_from_blob(FILE *f); 231struct boot_info *dt_from_blob(const char *fname);
254 232
255/* Tree source */ 233/* Tree source */
256 234
@@ -264,6 +242,5 @@ struct boot_info *dt_from_fs(const char *dirname);
264/* misc */ 242/* misc */
265 243
266char *join_path(const char *path, const char *name); 244char *join_path(const char *path, const char *name);
267void fill_fullpaths(struct node *tree, const char *prefix);
268 245
269#endif /* _DTC_H */ 246#endif /* _DTC_H */
diff --git a/arch/powerpc/boot/dtc-src/flattree.c b/arch/powerpc/boot/dtc-src/flattree.c
index a7cfb843d334..76acd28c068d 100644
--- a/arch/powerpc/boot/dtc-src/flattree.c
+++ b/arch/powerpc/boot/dtc-src/flattree.c
@@ -19,6 +19,7 @@
19 */ 19 */
20 20
21#include "dtc.h" 21#include "dtc.h"
22#include "srcpos.h"
22 23
23#define FTF_FULLPATH 0x1 24#define FTF_FULLPATH 0x1
24#define FTF_VARALIGN 0x2 25#define FTF_VARALIGN 0x2
@@ -162,28 +163,18 @@ static void asm_emit_data(void *e, struct data d)
162{ 163{
163 FILE *f = e; 164 FILE *f = e;
164 int off = 0; 165 int off = 0;
165 struct marker *m; 166 struct marker *m = d.markers;
166 167
167 m = d.markers; 168 for_each_marker_of_type(m, LABEL)
168 while (m) { 169 emit_offset_label(f, m->ref, m->offset);
169 if (m->type == LABEL)
170 emit_offset_label(f, m->ref, m->offset);
171 m = m->next;
172 }
173 170
174 while ((d.len - off) >= sizeof(u32)) { 171 while ((d.len - off) >= sizeof(uint32_t)) {
175 fprintf(f, "\t.long\t0x%x\n", 172 fprintf(f, "\t.long\t0x%x\n",
176 be32_to_cpu(*((u32 *)(d.val+off)))); 173 fdt32_to_cpu(*((uint32_t *)(d.val+off))));
177 off += sizeof(u32); 174 off += sizeof(uint32_t);
178 }
179
180 if ((d.len - off) >= sizeof(u16)) {
181 fprintf(f, "\t.short\t0x%hx\n",
182 be16_to_cpu(*((u16 *)(d.val+off))));
183 off += sizeof(u16);
184 } 175 }
185 176
186 if ((d.len - off) >= 1) { 177 while ((d.len - off) >= 1) {
187 fprintf(f, "\t.byte\t0x%hhx\n", d.val[off]); 178 fprintf(f, "\t.byte\t0x%hhx\n", d.val[off]);
188 off += 1; 179 off += 1;
189 } 180 }
@@ -336,29 +327,28 @@ static void make_fdt_header(struct fdt_header *fdt,
336 327
337 memset(fdt, 0xff, sizeof(*fdt)); 328 memset(fdt, 0xff, sizeof(*fdt));
338 329
339 fdt->magic = cpu_to_be32(FDT_MAGIC); 330 fdt->magic = cpu_to_fdt32(FDT_MAGIC);
340 fdt->version = cpu_to_be32(vi->version); 331 fdt->version = cpu_to_fdt32(vi->version);
341 fdt->last_comp_version = cpu_to_be32(vi->last_comp_version); 332 fdt->last_comp_version = cpu_to_fdt32(vi->last_comp_version);
342 333
343 /* Reserve map should be doubleword aligned */ 334 /* Reserve map should be doubleword aligned */
344 reserve_off = ALIGN(vi->hdr_size, 8); 335 reserve_off = ALIGN(vi->hdr_size, 8);
345 336
346 fdt->off_mem_rsvmap = cpu_to_be32(reserve_off); 337 fdt->off_mem_rsvmap = cpu_to_fdt32(reserve_off);
347 fdt->off_dt_struct = cpu_to_be32(reserve_off + reservesize); 338 fdt->off_dt_struct = cpu_to_fdt32(reserve_off + reservesize);
348 fdt->off_dt_strings = cpu_to_be32(reserve_off + reservesize 339 fdt->off_dt_strings = cpu_to_fdt32(reserve_off + reservesize
349 + dtsize); 340 + dtsize);
350 fdt->totalsize = cpu_to_be32(reserve_off + reservesize + dtsize + strsize); 341 fdt->totalsize = cpu_to_fdt32(reserve_off + reservesize + dtsize + strsize);
351 342
352 if (vi->flags & FTF_BOOTCPUID) 343 if (vi->flags & FTF_BOOTCPUID)
353 fdt->boot_cpuid_phys = cpu_to_be32(boot_cpuid_phys); 344 fdt->boot_cpuid_phys = cpu_to_fdt32(boot_cpuid_phys);
354 if (vi->flags & FTF_STRTABSIZE) 345 if (vi->flags & FTF_STRTABSIZE)
355 fdt->size_dt_strings = cpu_to_be32(strsize); 346 fdt->size_dt_strings = cpu_to_fdt32(strsize);
356 if (vi->flags & FTF_STRUCTSIZE) 347 if (vi->flags & FTF_STRUCTSIZE)
357 fdt->size_dt_struct = cpu_to_be32(dtsize); 348 fdt->size_dt_struct = cpu_to_fdt32(dtsize);
358} 349}
359 350
360void dt_to_blob(FILE *f, struct boot_info *bi, int version, 351void dt_to_blob(FILE *f, struct boot_info *bi, int version)
361 int boot_cpuid_phys)
362{ 352{
363 struct version_info *vi = NULL; 353 struct version_info *vi = NULL;
364 int i; 354 int i;
@@ -383,26 +373,26 @@ void dt_to_blob(FILE *f, struct boot_info *bi, int version,
383 373
384 /* Make header */ 374 /* Make header */
385 make_fdt_header(&fdt, vi, reservebuf.len, dtbuf.len, strbuf.len, 375 make_fdt_header(&fdt, vi, reservebuf.len, dtbuf.len, strbuf.len,
386 boot_cpuid_phys); 376 bi->boot_cpuid_phys);
387 377
388 /* 378 /*
389 * If the user asked for more space than is used, adjust the totalsize. 379 * If the user asked for more space than is used, adjust the totalsize.
390 */ 380 */
391 if (minsize > 0) { 381 if (minsize > 0) {
392 padlen = minsize - be32_to_cpu(fdt.totalsize); 382 padlen = minsize - fdt32_to_cpu(fdt.totalsize);
393 if ((padlen < 0) && (quiet < 1)) 383 if ((padlen < 0) && (quiet < 1))
394 fprintf(stderr, 384 fprintf(stderr,
395 "Warning: blob size %d >= minimum size %d\n", 385 "Warning: blob size %d >= minimum size %d\n",
396 be32_to_cpu(fdt.totalsize), minsize); 386 fdt32_to_cpu(fdt.totalsize), minsize);
397 } 387 }
398 388
399 if (padsize > 0) 389 if (padsize > 0)
400 padlen = padsize; 390 padlen = padsize;
401 391
402 if (padlen > 0) { 392 if (padlen > 0) {
403 int tsize = be32_to_cpu(fdt.totalsize); 393 int tsize = fdt32_to_cpu(fdt.totalsize);
404 tsize += padlen; 394 tsize += padlen;
405 fdt.totalsize = cpu_to_be32(tsize); 395 fdt.totalsize = cpu_to_fdt32(tsize);
406 } 396 }
407 397
408 /* 398 /*
@@ -410,7 +400,7 @@ void dt_to_blob(FILE *f, struct boot_info *bi, int version,
410 * the reserve buffer, add the reserve map terminating zeroes, 400 * the reserve buffer, add the reserve map terminating zeroes,
411 * the device tree itself, and finally the strings. 401 * the device tree itself, and finally the strings.
412 */ 402 */
413 blob = data_append_data(blob, &fdt, sizeof(fdt)); 403 blob = data_append_data(blob, &fdt, vi->hdr_size);
414 blob = data_append_align(blob, 8); 404 blob = data_append_align(blob, 8);
415 blob = data_merge(blob, reservebuf); 405 blob = data_merge(blob, reservebuf);
416 blob = data_append_zeroes(blob, sizeof(struct fdt_reserve_entry)); 406 blob = data_append_zeroes(blob, sizeof(struct fdt_reserve_entry));
@@ -449,7 +439,7 @@ static void dump_stringtable_asm(FILE *f, struct data strbuf)
449 } 439 }
450} 440}
451 441
452void dt_to_asm(FILE *f, struct boot_info *bi, int version, int boot_cpuid_phys) 442void dt_to_asm(FILE *f, struct boot_info *bi, int version)
453{ 443{
454 struct version_info *vi = NULL; 444 struct version_info *vi = NULL;
455 int i; 445 int i;
@@ -489,7 +479,7 @@ void dt_to_asm(FILE *f, struct boot_info *bi, int version, int boot_cpuid_phys)
489 479
490 if (vi->flags & FTF_BOOTCPUID) 480 if (vi->flags & FTF_BOOTCPUID)
491 fprintf(f, "\t.long\t%i\t\t\t\t\t/* boot_cpuid_phys */\n", 481 fprintf(f, "\t.long\t%i\t\t\t\t\t/* boot_cpuid_phys */\n",
492 boot_cpuid_phys); 482 bi->boot_cpuid_phys);
493 483
494 if (vi->flags & FTF_STRTABSIZE) 484 if (vi->flags & FTF_STRTABSIZE)
495 fprintf(f, "\t.long\t_%s_strings_end - _%s_strings_start\t/* size_dt_strings */\n", 485 fprintf(f, "\t.long\t_%s_strings_end - _%s_strings_start\t/* size_dt_strings */\n",
@@ -579,15 +569,15 @@ static void flat_read_chunk(struct inbuf *inb, void *p, int len)
579 inb->ptr += len; 569 inb->ptr += len;
580} 570}
581 571
582static u32 flat_read_word(struct inbuf *inb) 572static uint32_t flat_read_word(struct inbuf *inb)
583{ 573{
584 u32 val; 574 uint32_t val;
585 575
586 assert(((inb->ptr - inb->base) % sizeof(val)) == 0); 576 assert(((inb->ptr - inb->base) % sizeof(val)) == 0);
587 577
588 flat_read_chunk(inb, &val, sizeof(val)); 578 flat_read_chunk(inb, &val, sizeof(val));
589 579
590 return be32_to_cpu(val); 580 return fdt32_to_cpu(val);
591} 581}
592 582
593static void flat_realign(struct inbuf *inb, int align) 583static void flat_realign(struct inbuf *inb, int align)
@@ -615,7 +605,7 @@ static char *flat_read_string(struct inbuf *inb)
615 605
616 inb->ptr += len; 606 inb->ptr += len;
617 607
618 flat_realign(inb, sizeof(u32)); 608 flat_realign(inb, sizeof(uint32_t));
619 609
620 return str; 610 return str;
621} 611}
@@ -632,7 +622,7 @@ static struct data flat_read_data(struct inbuf *inb, int len)
632 622
633 flat_read_chunk(inb, d.val, len); 623 flat_read_chunk(inb, d.val, len);
634 624
635 flat_realign(inb, sizeof(u32)); 625 flat_realign(inb, sizeof(uint32_t));
636 626
637 return d; 627 return d;
638} 628}
@@ -659,7 +649,7 @@ static char *flat_read_stringtable(struct inbuf *inb, int offset)
659static struct property *flat_read_property(struct inbuf *dtbuf, 649static struct property *flat_read_property(struct inbuf *dtbuf,
660 struct inbuf *strbuf, int flags) 650 struct inbuf *strbuf, int flags)
661{ 651{
662 u32 proplen, stroff; 652 uint32_t proplen, stroff;
663 char *name; 653 char *name;
664 struct data val; 654 struct data val;
665 655
@@ -693,8 +683,8 @@ static struct reserve_info *flat_read_mem_reserve(struct inbuf *inb)
693 p = inb->ptr; 683 p = inb->ptr;
694 while (1) { 684 while (1) {
695 flat_read_chunk(inb, &re, sizeof(re)); 685 flat_read_chunk(inb, &re, sizeof(re));
696 re.address = be64_to_cpu(re.address); 686 re.address = fdt64_to_cpu(re.address);
697 re.size = be64_to_cpu(re.size); 687 re.size = fdt64_to_cpu(re.size);
698 if (re.size == 0) 688 if (re.size == 0)
699 break; 689 break;
700 690
@@ -708,77 +698,37 @@ static struct reserve_info *flat_read_mem_reserve(struct inbuf *inb)
708 698
709static char *nodename_from_path(const char *ppath, const char *cpath) 699static char *nodename_from_path(const char *ppath, const char *cpath)
710{ 700{
711 const char *lslash;
712 int plen; 701 int plen;
713 702
714 lslash = strrchr(cpath, '/'); 703 plen = strlen(ppath);
715 if (! lslash)
716 return NULL;
717
718 plen = lslash - cpath;
719
720 if (streq(cpath, "/") && streq(ppath, ""))
721 return "";
722
723 if ((plen == 0) && streq(ppath, "/"))
724 return strdup(lslash+1);
725
726 if (! strneq(ppath, cpath, plen))
727 return NULL;
728
729 return strdup(lslash+1);
730}
731
732static const char PROPCHAR[] = "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789,._+*#?-";
733static const char UNITCHAR[] = "0123456789abcdef,";
734
735static int check_node_name(const char *name)
736{
737 const char *atpos;
738 int basenamelen;
739 704
740 atpos = strrchr(name, '@'); 705 if (!strneq(ppath, cpath, plen))
706 die("Path \"%s\" is not valid as a child of \"%s\"\n",
707 cpath, ppath);
741 708
742 if (atpos) 709 /* root node is a special case */
743 basenamelen = atpos - name; 710 if (!streq(ppath, "/"))
744 else 711 plen++;
745 basenamelen = strlen(name);
746
747 if (strspn(name, PROPCHAR) < basenamelen)
748 return -1;
749 712
750 if (atpos 713 return strdup(cpath + plen);
751 && ((basenamelen + 1 + strspn(atpos+1, UNITCHAR)) < strlen(name)))
752 return -1;
753
754 return basenamelen;
755} 714}
756 715
757static struct node *unflatten_tree(struct inbuf *dtbuf, 716static struct node *unflatten_tree(struct inbuf *dtbuf,
758 struct inbuf *strbuf, 717 struct inbuf *strbuf,
759 const char *parent_path, int flags) 718 const char *parent_flatname, int flags)
760{ 719{
761 struct node *node; 720 struct node *node;
762 u32 val; 721 char *flatname;
722 uint32_t val;
763 723
764 node = build_node(NULL, NULL); 724 node = build_node(NULL, NULL);
765 725
766 if (flags & FTF_FULLPATH) { 726 flatname = flat_read_string(dtbuf);
767 node->fullpath = flat_read_string(dtbuf);
768 node->name = nodename_from_path(parent_path, node->fullpath);
769
770 if (! node->name)
771 die("Path \"%s\" is not valid as a child of \"%s\"\n",
772 node->fullpath, parent_path);
773 } else {
774 node->name = flat_read_string(dtbuf);
775 node->fullpath = join_path(parent_path, node->name);
776 }
777 727
778 node->basenamelen = check_node_name(node->name); 728 if (flags & FTF_FULLPATH)
779 if (node->basenamelen < 0) { 729 node->name = nodename_from_path(parent_flatname, flatname);
780 fprintf(stderr, "Warning \"%s\" has incorrect format\n", node->name); 730 else
781 } 731 node->name = flatname;
782 732
783 do { 733 do {
784 struct property *prop; 734 struct property *prop;
@@ -795,8 +745,7 @@ static struct node *unflatten_tree(struct inbuf *dtbuf,
795 break; 745 break;
796 746
797 case FDT_BEGIN_NODE: 747 case FDT_BEGIN_NODE:
798 child = unflatten_tree(dtbuf,strbuf, node->fullpath, 748 child = unflatten_tree(dtbuf,strbuf, flatname, flags);
799 flags);
800 add_child(node, child); 749 add_child(node, child);
801 break; 750 break;
802 751
@@ -825,10 +774,11 @@ static struct node *unflatten_tree(struct inbuf *dtbuf,
825} 774}
826 775
827 776
828struct boot_info *dt_from_blob(FILE *f) 777struct boot_info *dt_from_blob(const char *fname)
829{ 778{
830 u32 magic, totalsize, version, size_str, size_dt; 779 struct dtc_file *dtcf;
831 u32 off_dt, off_str, off_mem_rsvmap; 780 uint32_t magic, totalsize, version, size_dt, boot_cpuid_phys;
781 uint32_t off_dt, off_str, off_mem_rsvmap;
832 int rc; 782 int rc;
833 char *blob; 783 char *blob;
834 struct fdt_header *fdt; 784 struct fdt_header *fdt;
@@ -838,54 +788,56 @@ struct boot_info *dt_from_blob(FILE *f)
838 int sizeleft; 788 int sizeleft;
839 struct reserve_info *reservelist; 789 struct reserve_info *reservelist;
840 struct node *tree; 790 struct node *tree;
841 u32 val; 791 uint32_t val;
842 int flags = 0; 792 int flags = 0;
843 793
844 rc = fread(&magic, sizeof(magic), 1, f); 794 dtcf = dtc_open_file(fname, NULL);
845 if (ferror(f)) 795
796 rc = fread(&magic, sizeof(magic), 1, dtcf->file);
797 if (ferror(dtcf->file))
846 die("Error reading DT blob magic number: %s\n", 798 die("Error reading DT blob magic number: %s\n",
847 strerror(errno)); 799 strerror(errno));
848 if (rc < 1) { 800 if (rc < 1) {
849 if (feof(f)) 801 if (feof(dtcf->file))
850 die("EOF reading DT blob magic number\n"); 802 die("EOF reading DT blob magic number\n");
851 else 803 else
852 die("Mysterious short read reading magic number\n"); 804 die("Mysterious short read reading magic number\n");
853 } 805 }
854 806
855 magic = be32_to_cpu(magic); 807 magic = fdt32_to_cpu(magic);
856 if (magic != FDT_MAGIC) 808 if (magic != FDT_MAGIC)
857 die("Blob has incorrect magic number\n"); 809 die("Blob has incorrect magic number\n");
858 810
859 rc = fread(&totalsize, sizeof(totalsize), 1, f); 811 rc = fread(&totalsize, sizeof(totalsize), 1, dtcf->file);
860 if (ferror(f)) 812 if (ferror(dtcf->file))
861 die("Error reading DT blob size: %s\n", strerror(errno)); 813 die("Error reading DT blob size: %s\n", strerror(errno));
862 if (rc < 1) { 814 if (rc < 1) {
863 if (feof(f)) 815 if (feof(dtcf->file))
864 die("EOF reading DT blob size\n"); 816 die("EOF reading DT blob size\n");
865 else 817 else
866 die("Mysterious short read reading blob size\n"); 818 die("Mysterious short read reading blob size\n");
867 } 819 }
868 820
869 totalsize = be32_to_cpu(totalsize); 821 totalsize = fdt32_to_cpu(totalsize);
870 if (totalsize < FDT_V1_SIZE) 822 if (totalsize < FDT_V1_SIZE)
871 die("DT blob size (%d) is too small\n", totalsize); 823 die("DT blob size (%d) is too small\n", totalsize);
872 824
873 blob = xmalloc(totalsize); 825 blob = xmalloc(totalsize);
874 826
875 fdt = (struct fdt_header *)blob; 827 fdt = (struct fdt_header *)blob;
876 fdt->magic = cpu_to_be32(magic); 828 fdt->magic = cpu_to_fdt32(magic);
877 fdt->totalsize = cpu_to_be32(totalsize); 829 fdt->totalsize = cpu_to_fdt32(totalsize);
878 830
879 sizeleft = totalsize - sizeof(magic) - sizeof(totalsize); 831 sizeleft = totalsize - sizeof(magic) - sizeof(totalsize);
880 p = blob + sizeof(magic) + sizeof(totalsize); 832 p = blob + sizeof(magic) + sizeof(totalsize);
881 833
882 while (sizeleft) { 834 while (sizeleft) {
883 if (feof(f)) 835 if (feof(dtcf->file))
884 die("EOF before reading %d bytes of DT blob\n", 836 die("EOF before reading %d bytes of DT blob\n",
885 totalsize); 837 totalsize);
886 838
887 rc = fread(p, 1, sizeleft, f); 839 rc = fread(p, 1, sizeleft, dtcf->file);
888 if (ferror(f)) 840 if (ferror(dtcf->file))
889 die("Error reading DT blob: %s\n", 841 die("Error reading DT blob: %s\n",
890 strerror(errno)); 842 strerror(errno));
891 843
@@ -893,19 +845,11 @@ struct boot_info *dt_from_blob(FILE *f)
893 p += rc; 845 p += rc;
894 } 846 }
895 847
896 off_dt = be32_to_cpu(fdt->off_dt_struct); 848 off_dt = fdt32_to_cpu(fdt->off_dt_struct);
897 off_str = be32_to_cpu(fdt->off_dt_strings); 849 off_str = fdt32_to_cpu(fdt->off_dt_strings);
898 off_mem_rsvmap = be32_to_cpu(fdt->off_mem_rsvmap); 850 off_mem_rsvmap = fdt32_to_cpu(fdt->off_mem_rsvmap);
899 version = be32_to_cpu(fdt->version); 851 version = fdt32_to_cpu(fdt->version);
900 852 boot_cpuid_phys = fdt32_to_cpu(fdt->boot_cpuid_phys);
901 fprintf(stderr, "\tmagic:\t\t\t0x%x\n", magic);
902 fprintf(stderr, "\ttotalsize:\t\t%d\n", totalsize);
903 fprintf(stderr, "\toff_dt_struct:\t\t0x%x\n", off_dt);
904 fprintf(stderr, "\toff_dt_strings:\t\t0x%x\n", off_str);
905 fprintf(stderr, "\toff_mem_rsvmap:\t\t0x%x\n", off_mem_rsvmap);
906 fprintf(stderr, "\tversion:\t\t0x%x\n", version );
907 fprintf(stderr, "\tlast_comp_version:\t0x%x\n",
908 be32_to_cpu(fdt->last_comp_version));
909 853
910 if (off_mem_rsvmap >= totalsize) 854 if (off_mem_rsvmap >= totalsize)
911 die("Mem Reserve structure offset exceeds total size\n"); 855 die("Mem Reserve structure offset exceeds total size\n");
@@ -916,21 +860,17 @@ struct boot_info *dt_from_blob(FILE *f)
916 if (off_str > totalsize) 860 if (off_str > totalsize)
917 die("String table offset exceeds total size\n"); 861 die("String table offset exceeds total size\n");
918 862
919 if (version >= 2)
920 fprintf(stderr, "\tboot_cpuid_phys:\t0x%x\n",
921 be32_to_cpu(fdt->boot_cpuid_phys));
922
923 size_str = -1;
924 if (version >= 3) { 863 if (version >= 3) {
925 size_str = be32_to_cpu(fdt->size_dt_strings); 864 uint32_t size_str = fdt32_to_cpu(fdt->size_dt_strings);
926 fprintf(stderr, "\tsize_dt_strings:\t%d\n", size_str);
927 if (off_str+size_str > totalsize) 865 if (off_str+size_str > totalsize)
928 die("String table extends past total size\n"); 866 die("String table extends past total size\n");
867 inbuf_init(&strbuf, blob + off_str, blob + off_str + size_str);
868 } else {
869 inbuf_init(&strbuf, blob + off_str, blob + totalsize);
929 } 870 }
930 871
931 if (version >= 17) { 872 if (version >= 17) {
932 size_dt = be32_to_cpu(fdt->size_dt_struct); 873 size_dt = fdt32_to_cpu(fdt->size_dt_struct);
933 fprintf(stderr, "\tsize_dt_struct:\t\t%d\n", size_dt);
934 if (off_dt+size_dt > totalsize) 874 if (off_dt+size_dt > totalsize)
935 die("Structure block extends past total size\n"); 875 die("Structure block extends past total size\n");
936 } 876 }
@@ -944,10 +884,6 @@ struct boot_info *dt_from_blob(FILE *f)
944 inbuf_init(&memresvbuf, 884 inbuf_init(&memresvbuf,
945 blob + off_mem_rsvmap, blob + totalsize); 885 blob + off_mem_rsvmap, blob + totalsize);
946 inbuf_init(&dtbuf, blob + off_dt, blob + totalsize); 886 inbuf_init(&dtbuf, blob + off_dt, blob + totalsize);
947 if (size_str >= 0)
948 inbuf_init(&strbuf, blob + off_str, blob + off_str + size_str);
949 else
950 inbuf_init(&strbuf, blob + off_str, blob + totalsize);
951 887
952 reservelist = flat_read_mem_reserve(&memresvbuf); 888 reservelist = flat_read_mem_reserve(&memresvbuf);
953 889
@@ -964,5 +900,7 @@ struct boot_info *dt_from_blob(FILE *f)
964 900
965 free(blob); 901 free(blob);
966 902
967 return build_boot_info(reservelist, tree); 903 dtc_close_file(dtcf);
904
905 return build_boot_info(reservelist, tree, boot_cpuid_phys);
968} 906}
diff --git a/arch/powerpc/boot/dtc-src/fstree.c b/arch/powerpc/boot/dtc-src/fstree.c
index 2a160a46998e..766b2694d935 100644
--- a/arch/powerpc/boot/dtc-src/fstree.c
+++ b/arch/powerpc/boot/dtc-src/fstree.c
@@ -31,8 +31,8 @@ static struct node *read_fstree(const char *dirname)
31 struct node *tree; 31 struct node *tree;
32 32
33 d = opendir(dirname); 33 d = opendir(dirname);
34 if (! d) 34 if (!d)
35 die("opendir(): %s\n", strerror(errno)); 35 die("Couldn't opendir() \"%s\": %s\n", dirname, strerror(errno));
36 36
37 tree = build_node(NULL, NULL); 37 tree = build_node(NULL, NULL);
38 38
@@ -87,8 +87,6 @@ struct boot_info *dt_from_fs(const char *dirname)
87 tree = read_fstree(dirname); 87 tree = read_fstree(dirname);
88 tree = name_node(tree, "", NULL); 88 tree = name_node(tree, "", NULL);
89 89
90 fill_fullpaths(tree, ""); 90 return build_boot_info(NULL, tree, 0);
91
92 return build_boot_info(NULL, tree);
93} 91}
94 92
diff --git a/arch/powerpc/boot/dtc-src/libfdt_env.h b/arch/powerpc/boot/dtc-src/libfdt_env.h
new file mode 100644
index 000000000000..449bf602daf1
--- /dev/null
+++ b/arch/powerpc/boot/dtc-src/libfdt_env.h
@@ -0,0 +1,23 @@
1#ifndef _LIBFDT_ENV_H
2#define _LIBFDT_ENV_H
3
4#include <stddef.h>
5#include <stdint.h>
6#include <string.h>
7
8#define _B(n) ((unsigned long long)((uint8_t *)&x)[n])
9static inline uint32_t fdt32_to_cpu(uint32_t x)
10{
11 return (_B(0) << 24) | (_B(1) << 16) | (_B(2) << 8) | _B(3);
12}
13#define cpu_to_fdt32(x) fdt32_to_cpu(x)
14
15static inline uint64_t fdt64_to_cpu(uint64_t x)
16{
17 return (_B(0) << 56) | (_B(1) << 48) | (_B(2) << 40) | (_B(3) << 32)
18 | (_B(4) << 24) | (_B(5) << 16) | (_B(6) << 8) | _B(7);
19}
20#define cpu_to_fdt64(x) fdt64_to_cpu(x)
21#undef _B
22
23#endif /* _LIBFDT_ENV_H */
diff --git a/arch/powerpc/boot/dtc-src/livetree.c b/arch/powerpc/boot/dtc-src/livetree.c
index 6ba0846b4310..0ca3de550b3f 100644
--- a/arch/powerpc/boot/dtc-src/livetree.c
+++ b/arch/powerpc/boot/dtc-src/livetree.c
@@ -115,6 +115,7 @@ void add_child(struct node *parent, struct node *child)
115 struct node **p; 115 struct node **p;
116 116
117 child->next_sibling = NULL; 117 child->next_sibling = NULL;
118 child->parent = parent;
118 119
119 p = &parent->children; 120 p = &parent->children;
120 while (*p) 121 while (*p)
@@ -123,7 +124,8 @@ void add_child(struct node *parent, struct node *child)
123 *p = child; 124 *p = child;
124} 125}
125 126
126struct reserve_info *build_reserve_entry(u64 address, u64 size, char *label) 127struct reserve_info *build_reserve_entry(uint64_t address, uint64_t size,
128 char *label)
127{ 129{
128 struct reserve_info *new = xmalloc(sizeof(*new)); 130 struct reserve_info *new = xmalloc(sizeof(*new));
129 131
@@ -165,13 +167,14 @@ struct reserve_info *add_reserve_entry(struct reserve_info *list,
165} 167}
166 168
167struct boot_info *build_boot_info(struct reserve_info *reservelist, 169struct boot_info *build_boot_info(struct reserve_info *reservelist,
168 struct node *tree) 170 struct node *tree, uint32_t boot_cpuid_phys)
169{ 171{
170 struct boot_info *bi; 172 struct boot_info *bi;
171 173
172 bi = xmalloc(sizeof(*bi)); 174 bi = xmalloc(sizeof(*bi));
173 bi->reservelist = reservelist; 175 bi->reservelist = reservelist;
174 bi->dt = tree; 176 bi->dt = tree;
177 bi->boot_cpuid_phys = boot_cpuid_phys;
175 178
176 return bi; 179 return bi;
177} 180}
@@ -202,7 +205,7 @@ struct property *get_property(struct node *node, const char *propname)
202cell_t propval_cell(struct property *prop) 205cell_t propval_cell(struct property *prop)
203{ 206{
204 assert(prop->val.len == sizeof(cell_t)); 207 assert(prop->val.len == sizeof(cell_t));
205 return be32_to_cpu(*((cell_t *)prop->val.val)); 208 return fdt32_to_cpu(*((cell_t *)prop->val.val));
206} 209}
207 210
208struct node *get_subnode(struct node *node, const char *nodename) 211struct node *get_subnode(struct node *node, const char *nodename)
diff --git a/arch/powerpc/boot/dtc-src/srcpos.c b/arch/powerpc/boot/dtc-src/srcpos.c
index 352b0fe06fde..9641b7628b4d 100644
--- a/arch/powerpc/boot/dtc-src/srcpos.c
+++ b/arch/powerpc/boot/dtc-src/srcpos.c
@@ -20,86 +20,97 @@
20#include "dtc.h" 20#include "dtc.h"
21#include "srcpos.h" 21#include "srcpos.h"
22 22
23
24/*
25 * Record the complete unique set of opened file names.
26 * Primarily used to cache source position file names.
27 */
28#define MAX_N_FILE_NAMES (100)
29
30const char *file_names[MAX_N_FILE_NAMES];
31static int n_file_names = 0;
32
33/* 23/*
34 * Like yylineno, this is the current open file pos. 24 * Like yylineno, this is the current open file pos.
35 */ 25 */
36 26
37int srcpos_filenum = -1; 27struct dtc_file *srcpos_file;
38
39 28
40 29static int dtc_open_one(struct dtc_file *file,
41FILE *dtc_open_file(const char *fname) 30 const char *search,
31 const char *fname)
42{ 32{
43 FILE *f; 33 char *fullname;
44 34
45 if (lookup_file_name(fname, 1) < 0) 35 if (search) {
46 die("Too many files opened\n"); 36 fullname = xmalloc(strlen(search) + strlen(fname) + 2);
47 37
48 if (streq(fname, "-")) 38 strcpy(fullname, search);
49 f = stdin; 39 strcat(fullname, "/");
50 else 40 strcat(fullname, fname);
51 f = fopen(fname, "r"); 41 } else {
42 fullname = strdup(fname);
43 }
52 44
53 if (! f) 45 file->file = fopen(fullname, "r");
54 die("Couldn't open \"%s\": %s\n", fname, strerror(errno)); 46 if (!file->file) {
47 free(fullname);
48 return 0;
49 }
55 50
56 return f; 51 file->name = fullname;
52 return 1;
57} 53}
58 54
59 55
56struct dtc_file *dtc_open_file(const char *fname,
57 const struct search_path *search)
58{
59 static const struct search_path default_search = { NULL, NULL, NULL };
60 60
61/* 61 struct dtc_file *file;
62 * Locate and optionally add filename fname in the file_names[] array. 62 const char *slash;
63 *
64 * If the filename is currently not in the array and the boolean
65 * add_it is non-zero, an attempt to add the filename will be made.
66 *
67 * Returns;
68 * Index [0..MAX_N_FILE_NAMES) where the filename is kept
69 * -1 if the name can not be recorded
70 */
71 63
72int lookup_file_name(const char *fname, int add_it) 64 file = xmalloc(sizeof(struct dtc_file));
73{
74 int i;
75 65
76 for (i = 0; i < n_file_names; i++) { 66 slash = strrchr(fname, '/');
77 if (strcmp(file_names[i], fname) == 0) 67 if (slash) {
78 return i; 68 char *dir = xmalloc(slash - fname + 1);
69
70 memcpy(dir, fname, slash - fname);
71 dir[slash - fname] = 0;
72 file->dir = dir;
73 } else {
74 file->dir = NULL;
79 } 75 }
80 76
81 if (add_it) { 77 if (streq(fname, "-")) {
82 if (n_file_names < MAX_N_FILE_NAMES) { 78 file->name = "stdin";
83 file_names[n_file_names] = strdup(fname); 79 file->file = stdin;
84 return n_file_names++; 80 return file;
85 }
86 } 81 }
87 82
88 return -1; 83 if (fname[0] == '/') {
89} 84 file->file = fopen(fname, "r");
85 if (!file->file)
86 goto fail;
87
88 file->name = strdup(fname);
89 return file;
90 }
90 91
92 if (!search)
93 search = &default_search;
91 94
92const char *srcpos_filename_for_num(int filenum) 95 while (search) {
93{ 96 if (dtc_open_one(file, search->dir, fname))
94 if (0 <= filenum && filenum < n_file_names) { 97 return file;
95 return file_names[filenum]; 98
99 if (errno != ENOENT)
100 goto fail;
101
102 search = search->next;
96 } 103 }
97 104
98 return 0; 105fail:
106 die("Couldn't open \"%s\": %s\n", fname, strerror(errno));
99} 107}
100 108
101 109void dtc_close_file(struct dtc_file *file)
102const char *srcpos_get_filename(void)
103{ 110{
104 return srcpos_filename_for_num(srcpos_filenum); 111 if (fclose(file->file))
112 die("Error closing \"%s\": %s\n", file->name, strerror(errno));
113
114 free(file->dir);
115 free(file);
105} 116}
diff --git a/arch/powerpc/boot/dtc-src/srcpos.h b/arch/powerpc/boot/dtc-src/srcpos.h
index ce7ab5ba5b46..e17c7c04db8e 100644
--- a/arch/powerpc/boot/dtc-src/srcpos.h
+++ b/arch/powerpc/boot/dtc-src/srcpos.h
@@ -22,13 +22,21 @@
22 * array of all opened filenames. 22 * array of all opened filenames.
23 */ 23 */
24 24
25#include <stdio.h>
26
27struct dtc_file {
28 char *dir;
29 const char *name;
30 FILE *file;
31};
32
25#if ! defined(YYLTYPE) && ! defined(YYLTYPE_IS_DECLARED) 33#if ! defined(YYLTYPE) && ! defined(YYLTYPE_IS_DECLARED)
26typedef struct YYLTYPE { 34typedef struct YYLTYPE {
27 int first_line; 35 int first_line;
28 int first_column; 36 int first_column;
29 int last_line; 37 int last_line;
30 int last_column; 38 int last_column;
31 int filenum; 39 struct dtc_file *file;
32} YYLTYPE; 40} YYLTYPE;
33 41
34#define YYLTYPE_IS_DECLARED 1 42#define YYLTYPE_IS_DECLARED 1
@@ -48,7 +56,7 @@ typedef struct YYLTYPE {
48 (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \ 56 (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \
49 (Current).last_line = YYRHSLOC (Rhs, N).last_line; \ 57 (Current).last_line = YYRHSLOC (Rhs, N).last_line; \
50 (Current).last_column = YYRHSLOC (Rhs, N).last_column; \ 58 (Current).last_column = YYRHSLOC (Rhs, N).last_column; \
51 (Current).filenum = YYRHSLOC (Rhs, N).filenum; \ 59 (Current).file = YYRHSLOC (Rhs, N).file; \
52 } \ 60 } \
53 else \ 61 else \
54 { \ 62 { \
@@ -56,20 +64,22 @@ typedef struct YYLTYPE {
56 YYRHSLOC (Rhs, 0).last_line; \ 64 YYRHSLOC (Rhs, 0).last_line; \
57 (Current).first_column = (Current).last_column = \ 65 (Current).first_column = (Current).last_column = \
58 YYRHSLOC (Rhs, 0).last_column; \ 66 YYRHSLOC (Rhs, 0).last_column; \
59 (Current).filenum = YYRHSLOC (Rhs, 0).filenum; \ 67 (Current).file = YYRHSLOC (Rhs, 0).file; \
60 } \ 68 } \
61 while (YYID (0)) 69 while (YYID (0))
62 70
63 71
64 72
65extern void yyerror(char const *); 73extern void yyerror(char const *);
74extern void yyerrorf(char const *, ...) __attribute__((format(printf, 1, 2)));
66 75
67extern int srcpos_filenum; 76extern struct dtc_file *srcpos_file;
68 77
69extern int push_input_file(const char *filename); 78struct search_path {
70extern int pop_input_file(void); 79 const char *dir; /* NULL for current directory */
80 struct search_path *prev, *next;
81};
71 82
72extern FILE *dtc_open_file(const char *fname); 83extern struct dtc_file *dtc_open_file(const char *fname,
73extern int lookup_file_name(const char *fname, int add_it); 84 const struct search_path *search);
74extern const char *srcpos_filename_for_num(int filenum); 85extern void dtc_close_file(struct dtc_file *file);
75const char *srcpos_get_filename(void);
diff --git a/arch/powerpc/boot/dtc-src/treesource.c b/arch/powerpc/boot/dtc-src/treesource.c
index a6a776797636..ebeb6eb27907 100644
--- a/arch/powerpc/boot/dtc-src/treesource.c
+++ b/arch/powerpc/boot/dtc-src/treesource.c
@@ -23,20 +23,23 @@
23 23
24extern FILE *yyin; 24extern FILE *yyin;
25extern int yyparse(void); 25extern int yyparse(void);
26extern void yyerror(char const *);
27 26
28struct boot_info *the_boot_info; 27struct boot_info *the_boot_info;
28int treesource_error;
29 29
30struct boot_info *dt_from_source(const char *fname) 30struct boot_info *dt_from_source(const char *fname)
31{ 31{
32 the_boot_info = NULL; 32 the_boot_info = NULL;
33 treesource_error = 0;
33 34
34 push_input_file(fname); 35 srcpos_file = dtc_open_file(fname, NULL);
36 yyin = srcpos_file->file;
35 37
36 if (yyparse() != 0) 38 if (yyparse() != 0)
37 return NULL; 39 die("Unable to parse input tree\n");
38 40
39 fill_fullpaths(the_boot_info->dt, ""); 41 if (treesource_error)
42 die("Syntax error parsing input tree\n");
40 43
41 return the_boot_info; 44 return the_boot_info;
42} 45}
@@ -144,7 +147,7 @@ static void write_propval_cells(FILE *f, struct data val)
144 m = m->next; 147 m = m->next;
145 } 148 }
146 149
147 fprintf(f, "0x%x", be32_to_cpu(*cp++)); 150 fprintf(f, "0x%x", fdt32_to_cpu(*cp++));
148 if ((void *)cp >= propend) 151 if ((void *)cp >= propend)
149 break; 152 break;
150 fprintf(f, " "); 153 fprintf(f, " ");
@@ -173,7 +176,7 @@ static void write_propval_bytes(FILE *f, struct data val)
173 } 176 }
174 177
175 fprintf(f, "%02hhx", *bp++); 178 fprintf(f, "%02hhx", *bp++);
176 if ((void *)bp >= propend) 179 if ((const void *)bp >= propend)
177 break; 180 break;
178 fprintf(f, " "); 181 fprintf(f, " ");
179 } 182 }
diff --git a/arch/powerpc/boot/dtc-src/version_gen.h b/arch/powerpc/boot/dtc-src/version_gen.h
index 6c343031538e..658ff42429d6 100644
--- a/arch/powerpc/boot/dtc-src/version_gen.h
+++ b/arch/powerpc/boot/dtc-src/version_gen.h
@@ -1 +1 @@
#define DTC_VERSION "DTC 1.0.0-gd6f9b62f" #define DTC_VERSION "DTC 1.2.0"
diff --git a/arch/powerpc/boot/dts/arches.dts b/arch/powerpc/boot/dts/arches.dts
new file mode 100644
index 000000000000..d9113b1e8c1d
--- /dev/null
+++ b/arch/powerpc/boot/dts/arches.dts
@@ -0,0 +1,293 @@
1/*
2 * Device Tree Source for AMCC Arches (dual 460GT board)
3 *
4 * (C) Copyright 2008 Applied Micro Circuits Corporation
5 * Victor Gallardo <vgallardo@amcc.com>
6 * Adam Graham <agraham@amcc.com>
7 *
8 * Based on the glacier.dts file
9 * Stefan Roese <sr@denx.de>
10 * Copyright 2008 DENX Software Engineering
11 *
12 * See file CREDITS for list of people who contributed to this
13 * project.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * MA 02111-1307 USA
29 */
30
31/dts-v1/;
32
33/ {
34 #address-cells = <2>;
35 #size-cells = <1>;
36 model = "amcc,arches";
37 compatible = "amcc,arches";
38 dcr-parent = <&{/cpus/cpu@0}>;
39
40 aliases {
41 ethernet0 = &EMAC0;
42 ethernet1 = &EMAC1;
43 ethernet2 = &EMAC2;
44 serial0 = &UART0;
45 };
46
47 cpus {
48 #address-cells = <1>;
49 #size-cells = <0>;
50
51 cpu@0 {
52 device_type = "cpu";
53 model = "PowerPC,460GT";
54 reg = <0x00000000>;
55 clock-frequency = <0>; /* Filled in by U-Boot */
56 timebase-frequency = <0>; /* Filled in by U-Boot */
57 i-cache-line-size = <32>;
58 d-cache-line-size = <32>;
59 i-cache-size = <32768>;
60 d-cache-size = <32768>;
61 dcr-controller;
62 dcr-access-method = "native";
63 };
64 };
65
66 memory {
67 device_type = "memory";
68 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
69 };
70
71 UIC0: interrupt-controller0 {
72 compatible = "ibm,uic-460gt","ibm,uic";
73 interrupt-controller;
74 cell-index = <0>;
75 dcr-reg = <0x0c0 0x009>;
76 #address-cells = <0>;
77 #size-cells = <0>;
78 #interrupt-cells = <2>;
79 };
80
81 UIC1: interrupt-controller1 {
82 compatible = "ibm,uic-460gt","ibm,uic";
83 interrupt-controller;
84 cell-index = <1>;
85 dcr-reg = <0x0d0 0x009>;
86 #address-cells = <0>;
87 #size-cells = <0>;
88 #interrupt-cells = <2>;
89 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
90 interrupt-parent = <&UIC0>;
91 };
92
93 UIC2: interrupt-controller2 {
94 compatible = "ibm,uic-460gt","ibm,uic";
95 interrupt-controller;
96 cell-index = <2>;
97 dcr-reg = <0x0e0 0x009>;
98 #address-cells = <0>;
99 #size-cells = <0>;
100 #interrupt-cells = <2>;
101 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
102 interrupt-parent = <&UIC0>;
103 };
104
105 UIC3: interrupt-controller3 {
106 compatible = "ibm,uic-460gt","ibm,uic";
107 interrupt-controller;
108 cell-index = <3>;
109 dcr-reg = <0x0f0 0x009>;
110 #address-cells = <0>;
111 #size-cells = <0>;
112 #interrupt-cells = <2>;
113 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
114 interrupt-parent = <&UIC0>;
115 };
116
117 SDR0: sdr {
118 compatible = "ibm,sdr-460gt";
119 dcr-reg = <0x00e 0x002>;
120 };
121
122 CPR0: cpr {
123 compatible = "ibm,cpr-460gt";
124 dcr-reg = <0x00c 0x002>;
125 };
126
127 plb {
128 compatible = "ibm,plb-460gt", "ibm,plb4";
129 #address-cells = <2>;
130 #size-cells = <1>;
131 ranges;
132 clock-frequency = <0>; /* Filled in by U-Boot */
133
134 SDRAM0: sdram {
135 compatible = "ibm,sdram-460gt", "ibm,sdram-405gp";
136 dcr-reg = <0x010 0x002>;
137 };
138
139 MAL0: mcmal {
140 compatible = "ibm,mcmal-460gt", "ibm,mcmal2";
141 dcr-reg = <0x180 0x062>;
142 num-tx-chans = <3>;
143 num-rx-chans = <24>;
144 #address-cells = <0>;
145 #size-cells = <0>;
146 interrupt-parent = <&UIC2>;
147 interrupts = < /*TXEOB*/ 0x6 0x4
148 /*RXEOB*/ 0x7 0x4
149 /*SERR*/ 0x3 0x4
150 /*TXDE*/ 0x4 0x4
151 /*RXDE*/ 0x5 0x4>;
152 desc-base-addr-high = <0x8>;
153 };
154
155 POB0: opb {
156 compatible = "ibm,opb-460gt", "ibm,opb";
157 #address-cells = <1>;
158 #size-cells = <1>;
159 ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
160 clock-frequency = <0>; /* Filled in by U-Boot */
161
162 EBC0: ebc {
163 compatible = "ibm,ebc-460gt", "ibm,ebc";
164 dcr-reg = <0x012 0x002>;
165 #address-cells = <2>;
166 #size-cells = <1>;
167 clock-frequency = <0>; /* Filled in by U-Boot */
168 /* ranges property is supplied by U-Boot */
169 interrupts = <0x6 0x4>;
170 interrupt-parent = <&UIC1>;
171 };
172
173 UART0: serial@ef600300 {
174 device_type = "serial";
175 compatible = "ns16550";
176 reg = <0xef600300 0x00000008>;
177 virtual-reg = <0xef600300>;
178 clock-frequency = <0>; /* Filled in by U-Boot */
179 current-speed = <0>; /* Filled in by U-Boot */
180 interrupt-parent = <&UIC1>;
181 interrupts = <0x1 0x4>;
182 };
183
184 IIC0: i2c@ef600700 {
185 compatible = "ibm,iic-460gt", "ibm,iic";
186 reg = <0xef600700 0x00000014>;
187 interrupt-parent = <&UIC0>;
188 interrupts = <0x2 0x4>;
189 };
190
191 IIC1: i2c@ef600800 {
192 compatible = "ibm,iic-460gt", "ibm,iic";
193 reg = <0xef600800 0x00000014>;
194 interrupt-parent = <&UIC0>;
195 interrupts = <0x3 0x4>;
196 };
197
198 TAH0: emac-tah@ef601350 {
199 compatible = "ibm,tah-460gt", "ibm,tah";
200 reg = <0xef601350 0x00000030>;
201 };
202
203 TAH1: emac-tah@ef601450 {
204 compatible = "ibm,tah-460gt", "ibm,tah";
205 reg = <0xef601450 0x00000030>;
206 };
207
208 EMAC0: ethernet@ef600e00 {
209 device_type = "network";
210 compatible = "ibm,emac-460gt", "ibm,emac4sync";
211 interrupt-parent = <&EMAC0>;
212 interrupts = <0x0 0x1>;
213 #interrupt-cells = <1>;
214 #address-cells = <0>;
215 #size-cells = <0>;
216 interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4
217 /*Wake*/ 0x1 &UIC2 0x14 0x4>;
218 reg = <0xef600e00 0x000000c4>;
219 local-mac-address = [000000000000]; /* Filled in by U-Boot */
220 mal-device = <&MAL0>;
221 mal-tx-channel = <0>;
222 mal-rx-channel = <0>;
223 cell-index = <0>;
224 max-frame-size = <9000>;
225 rx-fifo-size = <4096>;
226 tx-fifo-size = <2048>;
227 phy-mode = "sgmii";
228 phy-map = <0xffffffff>;
229 gpcs-address = <0x0000000a>;
230 tah-device = <&TAH0>;
231 tah-channel = <0>;
232 has-inverted-stacr-oc;
233 has-new-stacr-staopc;
234 };
235
236 EMAC1: ethernet@ef600f00 {
237 device_type = "network";
238 compatible = "ibm,emac-460gt", "ibm,emac4sync";
239 interrupt-parent = <&EMAC1>;
240 interrupts = <0x0 0x1>;
241 #interrupt-cells = <1>;
242 #address-cells = <0>;
243 #size-cells = <0>;
244 interrupt-map = </*Status*/ 0x0 &UIC2 0x11 0x4
245 /*Wake*/ 0x1 &UIC2 0x15 0x4>;
246 reg = <0xef600f00 0x000000c4>;
247 local-mac-address = [000000000000]; /* Filled in by U-Boot */
248 mal-device = <&MAL0>;
249 mal-tx-channel = <1>;
250 mal-rx-channel = <8>;
251 cell-index = <1>;
252 max-frame-size = <9000>;
253 rx-fifo-size = <4096>;
254 tx-fifo-size = <2048>;
255 phy-mode = "sgmii";
256 phy-map = <0x00000000>;
257 gpcs-address = <0x0000000b>;
258 tah-device = <&TAH1>;
259 tah-channel = <1>;
260 has-inverted-stacr-oc;
261 has-new-stacr-staopc;
262 mdio-device = <&EMAC0>;
263 };
264
265 EMAC2: ethernet@ef601100 {
266 device_type = "network";
267 compatible = "ibm,emac-460gt", "ibm,emac4sync";
268 interrupt-parent = <&EMAC2>;
269 interrupts = <0x0 0x1>;
270 #interrupt-cells = <1>;
271 #address-cells = <0>;
272 #size-cells = <0>;
273 interrupt-map = </*Status*/ 0x0 &UIC2 0x12 0x4
274 /*Wake*/ 0x1 &UIC2 0x16 0x4>;
275 reg = <0xef601100 0x000000c4>;
276 local-mac-address = [000000000000]; /* Filled in by U-Boot */
277 mal-device = <&MAL0>;
278 mal-tx-channel = <2>;
279 mal-rx-channel = <16>;
280 cell-index = <2>;
281 max-frame-size = <9000>;
282 rx-fifo-size = <4096>;
283 tx-fifo-size = <2048>;
284 phy-mode = "sgmii";
285 phy-map = <0x00000001>;
286 gpcs-address = <0x0000000C>;
287 has-inverted-stacr-oc;
288 has-new-stacr-staopc;
289 mdio-device = <&EMAC0>;
290 };
291 };
292 };
293};
diff --git a/arch/powerpc/boot/dts/asp834x-redboot.dts b/arch/powerpc/boot/dts/asp834x-redboot.dts
index 8b1bb0e41905..6235fca445de 100644
--- a/arch/powerpc/boot/dts/asp834x-redboot.dts
+++ b/arch/powerpc/boot/dts/asp834x-redboot.dts
@@ -130,24 +130,28 @@
130 dma-channel@0 { 130 dma-channel@0 {
131 compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel"; 131 compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel";
132 reg = <0 0x80>; 132 reg = <0 0x80>;
133 cell-index = <0>;
133 interrupt-parent = <&ipic>; 134 interrupt-parent = <&ipic>;
134 interrupts = <71 8>; 135 interrupts = <71 8>;
135 }; 136 };
136 dma-channel@80 { 137 dma-channel@80 {
137 compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel"; 138 compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel";
138 reg = <0x80 0x80>; 139 reg = <0x80 0x80>;
140 cell-index = <1>;
139 interrupt-parent = <&ipic>; 141 interrupt-parent = <&ipic>;
140 interrupts = <71 8>; 142 interrupts = <71 8>;
141 }; 143 };
142 dma-channel@100 { 144 dma-channel@100 {
143 compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel"; 145 compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel";
144 reg = <0x100 0x80>; 146 reg = <0x100 0x80>;
147 cell-index = <2>;
145 interrupt-parent = <&ipic>; 148 interrupt-parent = <&ipic>;
146 interrupts = <71 8>; 149 interrupts = <71 8>;
147 }; 150 };
148 dma-channel@180 { 151 dma-channel@180 {
149 compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel"; 152 compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel";
150 reg = <0x180 0x28>; 153 reg = <0x180 0x28>;
154 cell-index = <3>;
151 interrupt-parent = <&ipic>; 155 interrupt-parent = <&ipic>;
152 interrupts = <71 8>; 156 interrupts = <71 8>;
153 }; 157 };
diff --git a/arch/powerpc/boot/dts/gef_sbc610.dts b/arch/powerpc/boot/dts/gef_sbc610.dts
new file mode 100644
index 000000000000..6ed608322ddc
--- /dev/null
+++ b/arch/powerpc/boot/dts/gef_sbc610.dts
@@ -0,0 +1,293 @@
1/*
2 * GE Fanuc SBC610 Device Tree Source
3 *
4 * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * Based on: SBS CM6 Device Tree Source
12 * Copyright 2007 SBS Technologies GmbH & Co. KG
13 * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source)
14 * Copyright 2006 Freescale Semiconductor Inc.
15 */
16
17/*
18 * Compiled with dtc -I dts -O dtb -o gef_sbc610.dtb gef_sbc610.dts
19 */
20
21/dts-v1/;
22
23/ {
24 model = "GEF_SBC610";
25 compatible = "gef,sbc610";
26 #address-cells = <1>;
27 #size-cells = <1>;
28
29 aliases {
30 ethernet0 = &enet0;
31 ethernet1 = &enet1;
32 serial0 = &serial0;
33 serial1 = &serial1;
34 pci0 = &pci0;
35 };
36
37 cpus {
38 #address-cells = <1>;
39 #size-cells = <0>;
40
41 PowerPC,8641@0 {
42 device_type = "cpu";
43 reg = <0>;
44 d-cache-line-size = <32>; // 32 bytes
45 i-cache-line-size = <32>; // 32 bytes
46 d-cache-size = <32768>; // L1, 32K
47 i-cache-size = <32768>; // L1, 32K
48 timebase-frequency = <0>; // From uboot
49 bus-frequency = <0>; // From uboot
50 clock-frequency = <0>; // From uboot
51 };
52 PowerPC,8641@1 {
53 device_type = "cpu";
54 reg = <1>;
55 d-cache-line-size = <32>; // 32 bytes
56 i-cache-line-size = <32>; // 32 bytes
57 d-cache-size = <32768>; // L1, 32K
58 i-cache-size = <32768>; // L1, 32K
59 timebase-frequency = <0>; // From uboot
60 bus-frequency = <0>; // From uboot
61 clock-frequency = <0>; // From uboot
62 };
63 };
64
65 memory {
66 device_type = "memory";
67 reg = <0x0 0x40000000>; // set by uboot
68 };
69
70 localbus@fef05000 {
71 #address-cells = <2>;
72 #size-cells = <1>;
73 compatible = "fsl,mpc8641-localbus", "simple-bus";
74 reg = <0xf8005000 0x1000>;
75 interrupts = <19 2>;
76 interrupt-parent = <&mpic>;
77
78 ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash
79 1 0 0xe8000000 0x08000000 // Paged Flash 0
80 2 0 0xe0000000 0x08000000 // Paged Flash 1
81 3 0 0xfc100000 0x00020000 // NVRAM
82 4 0 0xfc000000 0x00008000 // FPGA
83 5 0 0xfc008000 0x00008000 // AFIX FPGA
84 6 0 0xfd000000 0x00800000 // IO FPGA (8-bit)
85 7 0 0xfd800000 0x00800000>; // IO FPGA (32-bit)
86
87 fpga@4,0 {
88 compatible = "gef,fpga-regs";
89 reg = <0x4 0x0 0x40>;
90 };
91 gef_pic: pic@4,4000 {
92 #interrupt-cells = <1>;
93 interrupt-controller;
94 compatible = "gef,fpga-pic";
95 reg = <0x4 0x4000 0x20>;
96 interrupts = <0x8
97 0x9>;
98 interrupt-parent = <&mpic>;
99
100 };
101 };
102
103 soc@fef00000 {
104 #address-cells = <1>;
105 #size-cells = <1>;
106 #interrupt-cells = <2>;
107 device_type = "soc";
108 compatible = "simple-bus";
109 ranges = <0x0 0xfef00000 0x00100000>;
110 reg = <0xfef00000 0x100000>; // CCSRBAR 1M
111 bus-frequency = <0>;
112
113 i2c1: i2c@3000 {
114 #address-cells = <1>;
115 #size-cells = <0>;
116 compatible = "fsl-i2c";
117 reg = <0x3000 0x100>;
118 interrupts = <0x2b 0x2>;
119 interrupt-parent = <&mpic>;
120 dfsrr;
121
122 eti@6b {
123 compatible = "dallas,ds1682";
124 reg = <0x6b>;
125 };
126 };
127
128 i2c2: i2c@3100 {
129 #address-cells = <1>;
130 #size-cells = <0>;
131 compatible = "fsl-i2c";
132 reg = <0x3100 0x100>;
133 interrupts = <0x2b 0x2>;
134 interrupt-parent = <&mpic>;
135 dfsrr;
136 };
137
138 dma@21300 {
139 #address-cells = <1>;
140 #size-cells = <1>;
141 compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma";
142 reg = <0x21300 0x4>;
143 ranges = <0x0 0x21100 0x200>;
144 cell-index = <0>;
145 dma-channel@0 {
146 compatible = "fsl,mpc8641-dma-channel",
147 "fsl,eloplus-dma-channel";
148 reg = <0x0 0x80>;
149 cell-index = <0>;
150 interrupt-parent = <&mpic>;
151 interrupts = <20 2>;
152 };
153 dma-channel@80 {
154 compatible = "fsl,mpc8641-dma-channel",
155 "fsl,eloplus-dma-channel";
156 reg = <0x80 0x80>;
157 cell-index = <1>;
158 interrupt-parent = <&mpic>;
159 interrupts = <21 2>;
160 };
161 dma-channel@100 {
162 compatible = "fsl,mpc8641-dma-channel",
163 "fsl,eloplus-dma-channel";
164 reg = <0x100 0x80>;
165 cell-index = <2>;
166 interrupt-parent = <&mpic>;
167 interrupts = <22 2>;
168 };
169 dma-channel@180 {
170 compatible = "fsl,mpc8641-dma-channel",
171 "fsl,eloplus-dma-channel";
172 reg = <0x180 0x80>;
173 cell-index = <3>;
174 interrupt-parent = <&mpic>;
175 interrupts = <23 2>;
176 };
177 };
178
179 mdio@24520 {
180 #address-cells = <1>;
181 #size-cells = <0>;
182 compatible = "fsl,gianfar-mdio";
183 reg = <0x24520 0x20>;
184
185 phy0: ethernet-phy@0 {
186 interrupt-parent = <&gef_pic>;
187 interrupts = <0x9 0x4>;
188 reg = <1>;
189 };
190 phy2: ethernet-phy@2 {
191 interrupt-parent = <&gef_pic>;
192 interrupts = <0x8 0x4>;
193 reg = <3>;
194 };
195 };
196
197 enet0: ethernet@24000 {
198 device_type = "network";
199 model = "eTSEC";
200 compatible = "gianfar";
201 reg = <0x24000 0x1000>;
202 local-mac-address = [ 00 00 00 00 00 00 ];
203 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
204 interrupt-parent = <&mpic>;
205 phy-handle = <&phy0>;
206 phy-connection-type = "gmii";
207 };
208
209 enet1: ethernet@26000 {
210 device_type = "network";
211 model = "eTSEC";
212 compatible = "gianfar";
213 reg = <0x26000 0x1000>;
214 local-mac-address = [ 00 00 00 00 00 00 ];
215 interrupts = <0x1f 0x2 0x20 0x2 0x21 0x2>;
216 interrupt-parent = <&mpic>;
217 phy-handle = <&phy2>;
218 phy-connection-type = "gmii";
219 };
220
221 serial0: serial@4500 {
222 cell-index = <0>;
223 device_type = "serial";
224 compatible = "ns16550";
225 reg = <0x4500 0x100>;
226 clock-frequency = <0>;
227 interrupts = <0x2a 0x2>;
228 interrupt-parent = <&mpic>;
229 };
230
231 serial1: serial@4600 {
232 cell-index = <1>;
233 device_type = "serial";
234 compatible = "ns16550";
235 reg = <0x4600 0x100>;
236 clock-frequency = <0>;
237 interrupts = <0x1c 0x2>;
238 interrupt-parent = <&mpic>;
239 };
240
241 mpic: pic@40000 {
242 clock-frequency = <0>;
243 interrupt-controller;
244 #address-cells = <0>;
245 #interrupt-cells = <2>;
246 reg = <0x40000 0x40000>;
247 compatible = "chrp,open-pic";
248 device_type = "open-pic";
249 };
250
251 global-utilities@e0000 {
252 compatible = "fsl,mpc8641-guts";
253 reg = <0xe0000 0x1000>;
254 fsl,has-rstcr;
255 };
256 };
257
258 pci0: pcie@fef08000 {
259 compatible = "fsl,mpc8641-pcie";
260 device_type = "pci";
261 #interrupt-cells = <1>;
262 #size-cells = <2>;
263 #address-cells = <3>;
264 reg = <0xfef08000 0x1000>;
265 bus-range = <0x0 0xff>;
266 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000
267 0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>;
268 clock-frequency = <33333333>;
269 interrupt-parent = <&mpic>;
270 interrupts = <0x18 0x2>;
271 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
272 interrupt-map = <
273 0x0000 0x0 0x0 0x1 &mpic 0x0 0x1
274 0x0000 0x0 0x0 0x2 &mpic 0x1 0x1
275 0x0000 0x0 0x0 0x3 &mpic 0x2 0x1
276 0x0000 0x0 0x0 0x4 &mpic 0x3 0x1
277 >;
278
279 pcie@0 {
280 reg = <0 0 0 0 0>;
281 #size-cells = <2>;
282 #address-cells = <3>;
283 device_type = "pci";
284 ranges = <0x02000000 0x0 0x80000000
285 0x02000000 0x0 0x80000000
286 0x0 0x40000000
287
288 0x01000000 0x0 0x00000000
289 0x01000000 0x0 0x00000000
290 0x0 0x00400000>;
291 };
292 };
293};
diff --git a/arch/powerpc/boot/dts/glacier.dts b/arch/powerpc/boot/dts/glacier.dts
index 24cf0dba120c..f3787a27f634 100644
--- a/arch/powerpc/boot/dts/glacier.dts
+++ b/arch/powerpc/boot/dts/glacier.dts
@@ -14,7 +14,7 @@
14 #address-cells = <2>; 14 #address-cells = <2>;
15 #size-cells = <1>; 15 #size-cells = <1>;
16 model = "amcc,glacier"; 16 model = "amcc,glacier";
17 compatible = "amcc,glacier", "amcc,canyonlands"; 17 compatible = "amcc,glacier";
18 dcr-parent = <&{/cpus/cpu@0}>; 18 dcr-parent = <&{/cpus/cpu@0}>;
19 19
20 aliases { 20 aliases {
diff --git a/arch/powerpc/boot/dts/mgcoge.dts b/arch/powerpc/boot/dts/mgcoge.dts
new file mode 100644
index 000000000000..633255a97557
--- /dev/null
+++ b/arch/powerpc/boot/dts/mgcoge.dts
@@ -0,0 +1,174 @@
1/*
2 * Device Tree for the MGCOGE plattform from keymile
3 *
4 * Copyright 2008 DENX Software Engineering GmbH
5 * Heiko Schocher <hs@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13/dts-v1/;
14/ {
15 model = "MGCOGE";
16 compatible = "keymile,mgcoge";
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 aliases {
21 ethernet0 = &eth0;
22 serial0 = &smc2;
23 };
24
25 cpus {
26 #address-cells = <1>;
27 #size-cells = <0>;
28
29 PowerPC,8247@0 {
30 device_type = "cpu";
31 reg = <0>;
32 d-cache-line-size = <32>;
33 i-cache-line-size = <32>;
34 d-cache-size = <16384>;
35 i-cache-size = <16384>;
36 timebase-frequency = <0>; /* Filled in by U-Boot */
37 clock-frequency = <0>; /* Filled in by U-Boot */
38 bus-frequency = <0>; /* Filled in by U-Boot */
39 };
40 };
41
42 localbus@f0010100 {
43 compatible = "fsl,mpc8247-localbus",
44 "fsl,pq2-localbus",
45 "simple-bus";
46 #address-cells = <2>;
47 #size-cells = <1>;
48 reg = <0xf0010100 0x40>;
49
50 ranges = <0 0 0xfe000000 0x00400000
51 5 0 0x50000000 0x20000000
52 >; /* Filled in by U-Boot */
53
54 flash@0,0 {
55 compatible = "cfi-flash";
56 reg = <0 0x0 0x400000>;
57 #address-cells = <1>;
58 #size-cells = <1>;
59 bank-width = <1>;
60 device-width = <1>;
61 partition@0 {
62 label = "u-boot";
63 reg = <0 0x40000>;
64 };
65 partition@40000 {
66 label = "env";
67 reg = <0x40000 0x20000>;
68 };
69 partition@60000 {
70 label = "kernel";
71 reg = <0x60000 0x220000>;
72 };
73 partition@280000 {
74 label = "dtb";
75 reg = <0x280000 0x20000>;
76 };
77 };
78
79 flash@5,0 {
80 compatible = "cfi-flash";
81 reg = <5 0x0 0x2000000>;
82 #address-cells = <1>;
83 #size-cells = <1>;
84 bank-width = <2>;
85 device-width = <2>;
86 partition@0 {
87 label = "ramdisk";
88 reg = <0 0x7a0000>;
89 };
90 partition@7a0000 {
91 label = "user";
92 reg = <0x7a0000 0x1860000>;
93 };
94 };
95 };
96
97 memory {
98 device_type = "memory";
99 reg = <0 0>; /* Filled in by U-Boot */
100 };
101
102 soc@f0000000 {
103 #address-cells = <1>;
104 #size-cells = <1>;
105 compatible = "fsl,mpc8247-immr", "fsl,pq2-soc", "simple-bus";
106 ranges = <0x00000000 0xf0000000 0x00053000>;
107
108 // Temporary until code stops depending on it.
109 device_type = "soc";
110
111 cpm@119c0 {
112 #address-cells = <1>;
113 #size-cells = <1>;
114 #interrupt-cells = <2>;
115 compatible = "fsl,mpc8247-cpm", "fsl,cpm2",
116 "simple-bus";
117 reg = <0x119c0 0x30>;
118 ranges;
119
120 muram {
121 compatible = "fsl,cpm-muram";
122 #address-cells = <1>;
123 #size-cells = <1>;
124 ranges = <0 0 0x10000>;
125
126 data@0 {
127 compatible = "fsl,cpm-muram-data";
128 reg = <0x80 0x1f80 0x9800 0x800>;
129 };
130 };
131
132 brg@119f0 {
133 compatible = "fsl,mpc8247-brg",
134 "fsl,cpm2-brg",
135 "fsl,cpm-brg";
136 reg = <0x119f0 0x10 0x115f0 0x10>;
137 };
138
139 /* Monitor port/SMC2 */
140 smc2: serial@11a90 {
141 device_type = "serial";
142 compatible = "fsl,mpc8247-smc-uart",
143 "fsl,cpm2-smc-uart";
144 reg = <0x11a90 0x20 0x88fc 0x02>;
145 interrupts = <5 8>;
146 interrupt-parent = <&PIC>;
147 fsl,cpm-brg = <2>;
148 fsl,cpm-command = <0x21200000>;
149 current-speed = <0>; /* Filled in by U-Boot */
150 };
151
152 eth0: ethernet@11a60 {
153 device_type = "network";
154 compatible = "fsl,mpc8247-scc-enet",
155 "fsl,cpm2-scc-enet";
156 reg = <0x11a60 0x20 0x8300 0x100 0x11390 1>;
157 local-mac-address = [ 00 00 00 00 00 00 ]; /* Filled in by U-Boot */
158 interrupts = <43 8>;
159 interrupt-parent = <&PIC>;
160 linux,network-index = <0>;
161 fsl,cpm-command = <0xce00000>;
162 fixed-link = <0 0 10 0 0>;
163 };
164
165 };
166
167 PIC: interrupt-controller@10c00 {
168 #interrupt-cells = <2>;
169 interrupt-controller;
170 reg = <0x10c00 0x80>;
171 compatible = "fsl,mpc8247-pic", "fsl,pq2-pic";
172 };
173 };
174};
diff --git a/arch/powerpc/boot/dts/mgsuvd.dts b/arch/powerpc/boot/dts/mgsuvd.dts
new file mode 100644
index 000000000000..e4fc53ab42bd
--- /dev/null
+++ b/arch/powerpc/boot/dts/mgsuvd.dts
@@ -0,0 +1,163 @@
1/*
2 * MGSUVD Device Tree Source
3 *
4 * Copyright 2008 DENX Software Engineering GmbH
5 * Heiko Schocher <hs@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13/dts-v1/;
14/ {
15 model = "MGSUVD";
16 compatible = "keymile,mgsuvd";
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 cpus {
21 #address-cells = <1>;
22 #size-cells = <0>;
23
24 PowerPC,852@0 {
25 device_type = "cpu";
26 reg = <0>;
27 d-cache-line-size = <16>;
28 i-cache-line-size = <16>;
29 d-cache-size = <8192>;
30 i-cache-size = <8192>;
31 timebase-frequency = <0>; /* Filled in by u-boot */
32 bus-frequency = <0>; /* Filled in by u-boot */
33 clock-frequency = <0>; /* Filled in by u-boot */
34 interrupts = <15 2>; /* decrementer interrupt */
35 interrupt-parent = <&PIC>;
36 };
37 };
38
39 memory {
40 device_type = "memory";
41 reg = <00000000 0x4000000>; /* Filled in by u-boot */
42 };
43
44 localbus@fff00100 {
45 compatible = "fsl,mpc852-localbus", "fsl,pq1-localbus", "simple-bus";
46 #address-cells = <2>;
47 #size-cells = <1>;
48 reg = <0xfff00100 0x40>;
49
50 ranges = <0 0 0xf0000000 0x01000000>; /* Filled in by u-boot */
51
52 flash@0,0 {
53 compatible = "cfi-flash";
54 reg = <0 0 0x1000000>;
55 #address-cells = <1>;
56 #size-cells = <1>;
57 bank-width = <1>;
58 device-width = <1>;
59 partition@0 {
60 label = "u-boot";
61 reg = <0 0x80000>;
62 };
63 partition@80000 {
64 label = "env";
65 reg = <0x80000 0x20000>;
66 };
67 partition@a0000 {
68 label = "kernel";
69 reg = <0xa0000 0x1e0000>;
70 };
71 partition@280000 {
72 label = "dtb";
73 reg = <0x280000 0x20000>;
74 };
75 partition@2a0000 {
76 label = "root";
77 reg = <0x2a0000 0x500000>;
78 };
79 partition@7a0000 {
80 label = "user";
81 reg = <0x7a0000 0x860000>;
82 };
83 };
84 };
85
86 soc@fff00000 {
87 compatible = "fsl,mpc852", "fsl,pq1-soc", "simple-bus";
88 #address-cells = <1>;
89 #size-cells = <1>;
90 device_type = "soc";
91 ranges = <0 0xfff00000 0x00004000>;
92
93 PIC: interrupt-controller@0 {
94 interrupt-controller;
95 #interrupt-cells = <2>;
96 reg = <0 24>;
97 compatible = "fsl,mpc852-pic", "fsl,pq1-pic";
98 };
99
100 cpm@9c0 {
101 #address-cells = <1>;
102 #size-cells = <1>;
103 compatible = "fsl,mpc852-cpm", "fsl,cpm1", "simple-bus";
104 interrupts = <0>; /* cpm error interrupt */
105 interrupt-parent = <&CPM_PIC>;
106 reg = <0x9c0 10>;
107 ranges;
108
109 muram@2000 {
110 compatible = "fsl,cpm-muram";
111 #address-cells = <1>;
112 #size-cells = <1>;
113 ranges = <0 0x2000 0x2000>;
114
115 data@0 {
116 compatible = "fsl,cpm-muram-data";
117 reg = <0x800 0x1800>;
118 };
119 };
120
121 brg@9f0 {
122 compatible = "fsl,mpc852-brg",
123 "fsl,cpm1-brg",
124 "fsl,cpm-brg";
125 reg = <0x9f0 0x10>;
126 clock-frequency = <0>; /* Filled in by u-boot */
127 };
128
129 CPM_PIC: interrupt-controller@930 {
130 interrupt-controller;
131 #interrupt-cells = <1>;
132 interrupts = <5 2 0 2>;
133 interrupt-parent = <&PIC>;
134 reg = <0x930 0x20>;
135 compatible = "fsl,cpm1-pic";
136 };
137
138 /* MON-1 */
139 serial@a80 {
140 device_type = "serial";
141 compatible = "fsl,cpm1-smc-uart";
142 reg = <0xa80 0x10 0x3fc0 0x40>;
143 interrupts = <4>;
144 interrupt-parent = <&CPM_PIC>;
145 fsl,cpm-brg = <1>;
146 fsl,cpm-command = <0x0090>;
147 current-speed = <0>; /* Filled in by u-boot */
148 };
149
150 ethernet@a40 {
151 device_type = "network";
152 compatible = "fsl,mpc866-scc-enet",
153 "fsl,cpm1-scc-enet";
154 reg = <0xa40 0x18 0x3e00 0x100>;
155 local-mac-address = [ 00 00 00 00 00 00 ]; /* Filled in by u-boot */
156 interrupts = <28>;
157 interrupt-parent = <&CPM_PIC>;
158 fsl,cpm-command = <0x80>;
159 fixed-link = <0 0 10 0 0>;
160 };
161 };
162 };
163};
diff --git a/arch/powerpc/boot/dts/mpc5121ads.dts b/arch/powerpc/boot/dts/mpc5121ads.dts
index 1f9036c317b4..c2b8dbfab79e 100644
--- a/arch/powerpc/boot/dts/mpc5121ads.dts
+++ b/arch/powerpc/boot/dts/mpc5121ads.dts
@@ -403,7 +403,8 @@
403 #interrupt-cells = <1>; 403 #interrupt-cells = <1>;
404 #size-cells = <2>; 404 #size-cells = <2>;
405 #address-cells = <3>; 405 #address-cells = <3>;
406 reg = <0x80008500 0x100>; 406 reg = <0x80008500 0x100 /* internal registers */
407 0x80008300 0x8>; /* config space access registers */
407 compatible = "fsl,mpc5121-pci"; 408 compatible = "fsl,mpc5121-pci";
408 device_type = "pci"; 409 device_type = "pci";
409 }; 410 };
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
index 2a94ae0dc8b8..747f27676332 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -176,24 +176,28 @@
176 dma-channel@0 { 176 dma-channel@0 {
177 compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel"; 177 compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel";
178 reg = <0 0x80>; 178 reg = <0 0x80>;
179 cell-index = <0>;
179 interrupt-parent = <&ipic>; 180 interrupt-parent = <&ipic>;
180 interrupts = <71 8>; 181 interrupts = <71 8>;
181 }; 182 };
182 dma-channel@80 { 183 dma-channel@80 {
183 compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel"; 184 compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel";
184 reg = <0x80 0x80>; 185 reg = <0x80 0x80>;
186 cell-index = <1>;
185 interrupt-parent = <&ipic>; 187 interrupt-parent = <&ipic>;
186 interrupts = <71 8>; 188 interrupts = <71 8>;
187 }; 189 };
188 dma-channel@100 { 190 dma-channel@100 {
189 compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel"; 191 compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel";
190 reg = <0x100 0x80>; 192 reg = <0x100 0x80>;
193 cell-index = <2>;
191 interrupt-parent = <&ipic>; 194 interrupt-parent = <&ipic>;
192 interrupts = <71 8>; 195 interrupts = <71 8>;
193 }; 196 };
194 dma-channel@180 { 197 dma-channel@180 {
195 compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel"; 198 compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel";
196 reg = <0x180 0x28>; 199 reg = <0x180 0x28>;
200 cell-index = <3>;
197 interrupt-parent = <&ipic>; 201 interrupt-parent = <&ipic>;
198 interrupts = <71 8>; 202 interrupts = <71 8>;
199 }; 203 };
@@ -359,7 +363,8 @@
359 #interrupt-cells = <1>; 363 #interrupt-cells = <1>;
360 #size-cells = <2>; 364 #size-cells = <2>;
361 #address-cells = <3>; 365 #address-cells = <3>;
362 reg = <0xe0008500 0x100>; 366 reg = <0xe0008500 0x100 /* internal registers */
367 0xe0008300 0x8>; /* config space access registers */
363 compatible = "fsl,mpc8349-pci"; 368 compatible = "fsl,mpc8349-pci";
364 device_type = "pci"; 369 device_type = "pci";
365 }; 370 };
diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts
index f704513fb930..7449e54c1a90 100644
--- a/arch/powerpc/boot/dts/mpc8315erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8315erdb.dts
@@ -144,24 +144,28 @@
144 dma-channel@0 { 144 dma-channel@0 {
145 compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; 145 compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
146 reg = <0 0x80>; 146 reg = <0 0x80>;
147 cell-index = <0>;
147 interrupt-parent = <&ipic>; 148 interrupt-parent = <&ipic>;
148 interrupts = <71 8>; 149 interrupts = <71 8>;
149 }; 150 };
150 dma-channel@80 { 151 dma-channel@80 {
151 compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; 152 compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
152 reg = <0x80 0x80>; 153 reg = <0x80 0x80>;
154 cell-index = <1>;
153 interrupt-parent = <&ipic>; 155 interrupt-parent = <&ipic>;
154 interrupts = <71 8>; 156 interrupts = <71 8>;
155 }; 157 };
156 dma-channel@100 { 158 dma-channel@100 {
157 compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; 159 compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
158 reg = <0x100 0x80>; 160 reg = <0x100 0x80>;
161 cell-index = <2>;
159 interrupt-parent = <&ipic>; 162 interrupt-parent = <&ipic>;
160 interrupts = <71 8>; 163 interrupts = <71 8>;
161 }; 164 };
162 dma-channel@180 { 165 dma-channel@180 {
163 compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; 166 compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
164 reg = <0x180 0x28>; 167 reg = <0x180 0x28>;
168 cell-index = <3>;
165 interrupt-parent = <&ipic>; 169 interrupt-parent = <&ipic>;
166 interrupts = <71 8>; 170 interrupts = <71 8>;
167 }; 171 };
@@ -314,7 +318,8 @@
314 #interrupt-cells = <1>; 318 #interrupt-cells = <1>;
315 #size-cells = <2>; 319 #size-cells = <2>;
316 #address-cells = <3>; 320 #address-cells = <3>;
317 reg = <0xe0008500 0x100>; 321 reg = <0xe0008500 0x100 /* internal registers */
322 0xe0008300 0x8>; /* config space access registers */
318 compatible = "fsl,mpc8349-pci"; 323 compatible = "fsl,mpc8349-pci";
319 device_type = "pci"; 324 device_type = "pci";
320 }; 325 };
diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts
index fbc930410ff6..e4cc1768f241 100644
--- a/arch/powerpc/boot/dts/mpc832x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc832x_mds.dts
@@ -127,24 +127,28 @@
127 dma-channel@0 { 127 dma-channel@0 {
128 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; 128 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
129 reg = <0 0x80>; 129 reg = <0 0x80>;
130 cell-index = <0>;
130 interrupt-parent = <&ipic>; 131 interrupt-parent = <&ipic>;
131 interrupts = <71 8>; 132 interrupts = <71 8>;
132 }; 133 };
133 dma-channel@80 { 134 dma-channel@80 {
134 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; 135 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
135 reg = <0x80 0x80>; 136 reg = <0x80 0x80>;
137 cell-index = <1>;
136 interrupt-parent = <&ipic>; 138 interrupt-parent = <&ipic>;
137 interrupts = <71 8>; 139 interrupts = <71 8>;
138 }; 140 };
139 dma-channel@100 { 141 dma-channel@100 {
140 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; 142 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
141 reg = <0x100 0x80>; 143 reg = <0x100 0x80>;
144 cell-index = <2>;
142 interrupt-parent = <&ipic>; 145 interrupt-parent = <&ipic>;
143 interrupts = <71 8>; 146 interrupts = <71 8>;
144 }; 147 };
145 dma-channel@180 { 148 dma-channel@180 {
146 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; 149 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
147 reg = <0x180 0x28>; 150 reg = <0x180 0x28>;
151 cell-index = <3>;
148 interrupt-parent = <&ipic>; 152 interrupt-parent = <&ipic>;
149 interrupts = <71 8>; 153 interrupts = <71 8>;
150 }; 154 };
@@ -419,7 +423,8 @@
419 #interrupt-cells = <1>; 423 #interrupt-cells = <1>;
420 #size-cells = <2>; 424 #size-cells = <2>;
421 #address-cells = <3>; 425 #address-cells = <3>;
422 reg = <0xe0008500 0x100>; 426 reg = <0xe0008500 0x100 /* internal registers */
427 0xe0008300 0x8>; /* config space access registers */
423 compatible = "fsl,mpc8349-pci"; 428 compatible = "fsl,mpc8349-pci";
424 device_type = "pci"; 429 device_type = "pci";
425 }; 430 };
diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/boot/dts/mpc832x_rdb.dts
index b157d1885a28..226ff066652b 100644
--- a/arch/powerpc/boot/dts/mpc832x_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts
@@ -105,24 +105,28 @@
105 dma-channel@0 { 105 dma-channel@0 {
106 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; 106 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
107 reg = <0 0x80>; 107 reg = <0 0x80>;
108 cell-index = <0>;
108 interrupt-parent = <&ipic>; 109 interrupt-parent = <&ipic>;
109 interrupts = <71 8>; 110 interrupts = <71 8>;
110 }; 111 };
111 dma-channel@80 { 112 dma-channel@80 {
112 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; 113 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
113 reg = <0x80 0x80>; 114 reg = <0x80 0x80>;
115 cell-index = <1>;
114 interrupt-parent = <&ipic>; 116 interrupt-parent = <&ipic>;
115 interrupts = <71 8>; 117 interrupts = <71 8>;
116 }; 118 };
117 dma-channel@100 { 119 dma-channel@100 {
118 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; 120 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
119 reg = <0x100 0x80>; 121 reg = <0x100 0x80>;
122 cell-index = <2>;
120 interrupt-parent = <&ipic>; 123 interrupt-parent = <&ipic>;
121 interrupts = <71 8>; 124 interrupts = <71 8>;
122 }; 125 };
123 dma-channel@180 { 126 dma-channel@180 {
124 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; 127 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
125 reg = <0x180 0x28>; 128 reg = <0x180 0x28>;
129 cell-index = <3>;
126 interrupt-parent = <&ipic>; 130 interrupt-parent = <&ipic>;
127 interrupts = <71 8>; 131 interrupts = <71 8>;
128 }; 132 };
@@ -327,7 +331,8 @@
327 #interrupt-cells = <1>; 331 #interrupt-cells = <1>;
328 #size-cells = <2>; 332 #size-cells = <2>;
329 #address-cells = <3>; 333 #address-cells = <3>;
330 reg = <0xe0008500 0x100>; 334 reg = <0xe0008500 0x100 /* internal registers */
335 0xe0008300 0x8>; /* config space access registers */
331 compatible = "fsl,mpc8349-pci"; 336 compatible = "fsl,mpc8349-pci";
332 device_type = "pci"; 337 device_type = "pci";
333 }; 338 };
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index 700e076ef3f5..5cedf373a1d8 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -106,24 +106,28 @@
106 dma-channel@0 { 106 dma-channel@0 {
107 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 107 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
108 reg = <0 0x80>; 108 reg = <0 0x80>;
109 cell-index = <0>;
109 interrupt-parent = <&ipic>; 110 interrupt-parent = <&ipic>;
110 interrupts = <71 8>; 111 interrupts = <71 8>;
111 }; 112 };
112 dma-channel@80 { 113 dma-channel@80 {
113 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 114 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
114 reg = <0x80 0x80>; 115 reg = <0x80 0x80>;
116 cell-index = <1>;
115 interrupt-parent = <&ipic>; 117 interrupt-parent = <&ipic>;
116 interrupts = <71 8>; 118 interrupts = <71 8>;
117 }; 119 };
118 dma-channel@100 { 120 dma-channel@100 {
119 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 121 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
120 reg = <0x100 0x80>; 122 reg = <0x100 0x80>;
123 cell-index = <2>;
121 interrupt-parent = <&ipic>; 124 interrupt-parent = <&ipic>;
122 interrupts = <71 8>; 125 interrupts = <71 8>;
123 }; 126 };
124 dma-channel@180 { 127 dma-channel@180 {
125 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 128 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
126 reg = <0x180 0x28>; 129 reg = <0x180 0x28>;
130 cell-index = <3>;
127 interrupt-parent = <&ipic>; 131 interrupt-parent = <&ipic>;
128 interrupts = <71 8>; 132 interrupts = <71 8>;
129 }; 133 };
@@ -250,7 +254,8 @@
250 #interrupt-cells = <1>; 254 #interrupt-cells = <1>;
251 #size-cells = <2>; 255 #size-cells = <2>;
252 #address-cells = <3>; 256 #address-cells = <3>;
253 reg = <0xe0008500 0x100>; 257 reg = <0xe0008500 0x100 /* internal registers */
258 0xe0008300 0x8>; /* config space access registers */
254 compatible = "fsl,mpc8349-pci"; 259 compatible = "fsl,mpc8349-pci";
255 device_type = "pci"; 260 device_type = "pci";
256 }; 261 };
@@ -276,7 +281,8 @@
276 #interrupt-cells = <1>; 281 #interrupt-cells = <1>;
277 #size-cells = <2>; 282 #size-cells = <2>;
278 #address-cells = <3>; 283 #address-cells = <3>;
279 reg = <0xe0008600 0x100>; 284 reg = <0xe0008600 0x100 /* internal registers */
285 0xe0008380 0x8>; /* config space access registers */
280 compatible = "fsl,mpc8349-pci"; 286 compatible = "fsl,mpc8349-pci";
281 device_type = "pci"; 287 device_type = "pci";
282 }; 288 };
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
index cdd3063258ea..81ae1d3e9440 100644
--- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
@@ -104,24 +104,28 @@
104 dma-channel@0 { 104 dma-channel@0 {
105 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 105 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
106 reg = <0 0x80>; 106 reg = <0 0x80>;
107 cell-index = <0>;
107 interrupt-parent = <&ipic>; 108 interrupt-parent = <&ipic>;
108 interrupts = <71 8>; 109 interrupts = <71 8>;
109 }; 110 };
110 dma-channel@80 { 111 dma-channel@80 {
111 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 112 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
112 reg = <0x80 0x80>; 113 reg = <0x80 0x80>;
114 cell-index = <1>;
113 interrupt-parent = <&ipic>; 115 interrupt-parent = <&ipic>;
114 interrupts = <71 8>; 116 interrupts = <71 8>;
115 }; 117 };
116 dma-channel@100 { 118 dma-channel@100 {
117 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 119 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
118 reg = <0x100 0x80>; 120 reg = <0x100 0x80>;
121 cell-index = <2>;
119 interrupt-parent = <&ipic>; 122 interrupt-parent = <&ipic>;
120 interrupts = <71 8>; 123 interrupts = <71 8>;
121 }; 124 };
122 dma-channel@180 { 125 dma-channel@180 {
123 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 126 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
124 reg = <0x180 0x28>; 127 reg = <0x180 0x28>;
128 cell-index = <3>;
125 interrupt-parent = <&ipic>; 129 interrupt-parent = <&ipic>;
126 interrupts = <71 8>; 130 interrupts = <71 8>;
127 }; 131 };
@@ -224,7 +228,8 @@
224 #interrupt-cells = <1>; 228 #interrupt-cells = <1>;
225 #size-cells = <2>; 229 #size-cells = <2>;
226 #address-cells = <3>; 230 #address-cells = <3>;
227 reg = <0xe0008600 0x100>; 231 reg = <0xe0008600 0x100 /* internal registers */
232 0xe0008380 0x8>; /* config space access registers */
228 compatible = "fsl,mpc8349-pci"; 233 compatible = "fsl,mpc8349-pci";
229 device_type = "pci"; 234 device_type = "pci";
230 }; 235 };
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index 783241c00240..04bfde3ea605 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -116,24 +116,28 @@
116 dma-channel@0 { 116 dma-channel@0 {
117 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 117 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
118 reg = <0 0x80>; 118 reg = <0 0x80>;
119 cell-index = <0>;
119 interrupt-parent = <&ipic>; 120 interrupt-parent = <&ipic>;
120 interrupts = <71 8>; 121 interrupts = <71 8>;
121 }; 122 };
122 dma-channel@80 { 123 dma-channel@80 {
123 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 124 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
124 reg = <0x80 0x80>; 125 reg = <0x80 0x80>;
126 cell-index = <1>;
125 interrupt-parent = <&ipic>; 127 interrupt-parent = <&ipic>;
126 interrupts = <71 8>; 128 interrupts = <71 8>;
127 }; 129 };
128 dma-channel@100 { 130 dma-channel@100 {
129 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 131 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
130 reg = <0x100 0x80>; 132 reg = <0x100 0x80>;
133 cell-index = <2>;
131 interrupt-parent = <&ipic>; 134 interrupt-parent = <&ipic>;
132 interrupts = <71 8>; 135 interrupts = <71 8>;
133 }; 136 };
134 dma-channel@180 { 137 dma-channel@180 {
135 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 138 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
136 reg = <0x180 0x28>; 139 reg = <0x180 0x28>;
140 cell-index = <3>;
137 interrupt-parent = <&ipic>; 141 interrupt-parent = <&ipic>;
138 interrupts = <71 8>; 142 interrupts = <71 8>;
139 }; 143 };
@@ -311,7 +315,8 @@
311 #interrupt-cells = <1>; 315 #interrupt-cells = <1>;
312 #size-cells = <2>; 316 #size-cells = <2>;
313 #address-cells = <3>; 317 #address-cells = <3>;
314 reg = <0xe0008500 0x100>; 318 reg = <0xe0008500 0x100 /* internal registers */
319 0xe0008300 0x8>; /* config space access registers */
315 compatible = "fsl,mpc8349-pci"; 320 compatible = "fsl,mpc8349-pci";
316 device_type = "pci"; 321 device_type = "pci";
317 }; 322 };
@@ -372,7 +377,8 @@
372 #interrupt-cells = <1>; 377 #interrupt-cells = <1>;
373 #size-cells = <2>; 378 #size-cells = <2>;
374 #address-cells = <3>; 379 #address-cells = <3>;
375 reg = <0xe0008600 0x100>; 380 reg = <0xe0008600 0x100 /* internal registers */
381 0xe0008380 0x8>; /* config space access registers */
376 compatible = "fsl,mpc8349-pci"; 382 compatible = "fsl,mpc8349-pci";
377 device_type = "pci"; 383 device_type = "pci";
378 }; 384 };
diff --git a/arch/powerpc/boot/dts/mpc836x_mds.dts b/arch/powerpc/boot/dts/mpc836x_mds.dts
index a3b76a709951..66a12d2631fb 100644
--- a/arch/powerpc/boot/dts/mpc836x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc836x_mds.dts
@@ -52,9 +52,26 @@
52 reg = <0x00000000 0x10000000>; 52 reg = <0x00000000 0x10000000>;
53 }; 53 };
54 54
55 bcsr@f8000000 { 55 localbus@e0005000 {
56 device_type = "board-control"; 56 #address-cells = <2>;
57 reg = <0xf8000000 0x8000>; 57 #size-cells = <1>;
58 compatible = "fsl,mpc8360-localbus", "fsl,pq2pro-localbus",
59 "simple-bus";
60 reg = <0xe0005000 0xd8>;
61 ranges = <0 0 0xfe000000 0x02000000
62 1 0 0xf8000000 0x00008000>;
63
64 flash@0,0 {
65 compatible = "cfi-flash";
66 reg = <0 0 0x2000000>;
67 bank-width = <2>;
68 device-width = <1>;
69 };
70
71 bcsr@1,0 {
72 device_type = "board-control";
73 reg = <1 0 0x8000>;
74 };
58 }; 75 };
59 76
60 soc8360@e0000000 { 77 soc8360@e0000000 {
@@ -131,24 +148,28 @@
131 dma-channel@0 { 148 dma-channel@0 {
132 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; 149 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
133 reg = <0 0x80>; 150 reg = <0 0x80>;
151 cell-index = <0>;
134 interrupt-parent = <&ipic>; 152 interrupt-parent = <&ipic>;
135 interrupts = <71 8>; 153 interrupts = <71 8>;
136 }; 154 };
137 dma-channel@80 { 155 dma-channel@80 {
138 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; 156 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
139 reg = <0x80 0x80>; 157 reg = <0x80 0x80>;
158 cell-index = <1>;
140 interrupt-parent = <&ipic>; 159 interrupt-parent = <&ipic>;
141 interrupts = <71 8>; 160 interrupts = <71 8>;
142 }; 161 };
143 dma-channel@100 { 162 dma-channel@100 {
144 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; 163 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
145 reg = <0x100 0x80>; 164 reg = <0x100 0x80>;
165 cell-index = <2>;
146 interrupt-parent = <&ipic>; 166 interrupt-parent = <&ipic>;
147 interrupts = <71 8>; 167 interrupts = <71 8>;
148 }; 168 };
149 dma-channel@180 { 169 dma-channel@180 {
150 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; 170 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
151 reg = <0x180 0x28>; 171 reg = <0x180 0x28>;
172 cell-index = <3>;
152 interrupt-parent = <&ipic>; 173 interrupt-parent = <&ipic>;
153 interrupts = <71 8>; 174 interrupts = <71 8>;
154 }; 175 };
@@ -405,7 +426,8 @@
405 #interrupt-cells = <1>; 426 #interrupt-cells = <1>;
406 #size-cells = <2>; 427 #size-cells = <2>;
407 #address-cells = <3>; 428 #address-cells = <3>;
408 reg = <0xe0008500 0x100>; 429 reg = <0xe0008500 0x100 /* internal registers */
430 0xe0008300 0x8>; /* config space access registers */
409 compatible = "fsl,mpc8349-pci"; 431 compatible = "fsl,mpc8349-pci";
410 device_type = "pci"; 432 device_type = "pci";
411 }; 433 };
diff --git a/arch/powerpc/boot/dts/mpc836x_rdk.dts b/arch/powerpc/boot/dts/mpc836x_rdk.dts
index 89c9202f8bd7..decadf3d9e98 100644
--- a/arch/powerpc/boot/dts/mpc836x_rdk.dts
+++ b/arch/powerpc/boot/dts/mpc836x_rdk.dts
@@ -125,24 +125,28 @@
125 dma-channel@0 { 125 dma-channel@0 {
126 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; 126 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
127 reg = <0 0x80>; 127 reg = <0 0x80>;
128 cell-index = <0>;
128 interrupt-parent = <&ipic>; 129 interrupt-parent = <&ipic>;
129 interrupts = <71 8>; 130 interrupts = <71 8>;
130 }; 131 };
131 dma-channel@80 { 132 dma-channel@80 {
132 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; 133 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
133 reg = <0x80 0x80>; 134 reg = <0x80 0x80>;
135 cell-index = <1>;
134 interrupt-parent = <&ipic>; 136 interrupt-parent = <&ipic>;
135 interrupts = <71 8>; 137 interrupts = <71 8>;
136 }; 138 };
137 dma-channel@100 { 139 dma-channel@100 {
138 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; 140 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
139 reg = <0x100 0x80>; 141 reg = <0x100 0x80>;
142 cell-index = <2>;
140 interrupt-parent = <&ipic>; 143 interrupt-parent = <&ipic>;
141 interrupts = <71 8>; 144 interrupts = <71 8>;
142 }; 145 };
143 dma-channel@180 { 146 dma-channel@180 {
144 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; 147 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
145 reg = <0x180 0x28>; 148 reg = <0x180 0x28>;
149 cell-index = <3>;
146 interrupt-parent = <&ipic>; 150 interrupt-parent = <&ipic>;
147 interrupts = <71 8>; 151 interrupts = <71 8>;
148 }; 152 };
@@ -383,6 +387,18 @@
383 device-width = <1>; 387 device-width = <1>;
384 }; 388 };
385 389
390 upm@1,0 {
391 compatible = "fsl,upm-nand";
392 reg = <1 0 1>;
393 fsl,upm-addr-offset = <16>;
394 fsl,upm-cmd-offset = <8>;
395 gpios = <&qe_pio_e 18 0>;
396
397 flash {
398 compatible = "stm,nand512-a";
399 };
400 };
401
386 display@2,0 { 402 display@2,0 {
387 device_type = "display"; 403 device_type = "display";
388 compatible = "fujitsu,MB86277", "fujitsu,mint"; 404 compatible = "fujitsu,MB86277", "fujitsu,mint";
@@ -405,7 +421,8 @@
405 #interrupt-cells = <1>; 421 #interrupt-cells = <1>;
406 device_type = "pci"; 422 device_type = "pci";
407 compatible = "fsl,mpc8360-pci", "fsl,mpc8349-pci"; 423 compatible = "fsl,mpc8360-pci", "fsl,mpc8349-pci";
408 reg = <0xe0008500 0x100>; 424 reg = <0xe0008500 0x100 /* internal registers */
425 0xe0008300 0x8>; /* config space access registers */
409 ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000 426 ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000
410 0x42000000 0 0x80000000 0x80000000 0 0x10000000 427 0x42000000 0 0x80000000 0x80000000 0 0x10000000
411 0x01000000 0 0xe0300000 0xe0300000 0 0x00100000>; 428 0x01000000 0 0xe0300000 0xe0300000 0 0x00100000>;
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
index 432782b6d20a..0484561bd2c0 100644
--- a/arch/powerpc/boot/dts/mpc8377_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -136,6 +136,13 @@
136 interrupts = <14 0x8>; 136 interrupts = <14 0x8>;
137 interrupt-parent = <&ipic>; 137 interrupt-parent = <&ipic>;
138 dfsrr; 138 dfsrr;
139
140 rtc@68 {
141 compatible = "dallas,ds1374";
142 reg = <0x68>;
143 interrupts = <19 0x8>;
144 interrupt-parent = <&ipic>;
145 };
139 }; 146 };
140 147
141 i2c@3100 { 148 i2c@3100 {
@@ -246,24 +253,28 @@
246 dma-channel@0 { 253 dma-channel@0 {
247 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; 254 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
248 reg = <0 0x80>; 255 reg = <0 0x80>;
256 cell-index = <0>;
249 interrupt-parent = <&ipic>; 257 interrupt-parent = <&ipic>;
250 interrupts = <0x47 8>; 258 interrupts = <0x47 8>;
251 }; 259 };
252 dma-channel@80 { 260 dma-channel@80 {
253 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; 261 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
254 reg = <0x80 0x80>; 262 reg = <0x80 0x80>;
263 cell-index = <1>;
255 interrupt-parent = <&ipic>; 264 interrupt-parent = <&ipic>;
256 interrupts = <0x47 8>; 265 interrupts = <0x47 8>;
257 }; 266 };
258 dma-channel@100 { 267 dma-channel@100 {
259 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; 268 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
260 reg = <0x100 0x80>; 269 reg = <0x100 0x80>;
270 cell-index = <2>;
261 interrupt-parent = <&ipic>; 271 interrupt-parent = <&ipic>;
262 interrupts = <0x47 8>; 272 interrupts = <0x47 8>;
263 }; 273 };
264 dma-channel@180 { 274 dma-channel@180 {
265 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; 275 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
266 reg = <0x180 0x28>; 276 reg = <0x180 0x28>;
277 cell-index = <3>;
267 interrupt-parent = <&ipic>; 278 interrupt-parent = <&ipic>;
268 interrupts = <0x47 8>; 279 interrupts = <0x47 8>;
269 }; 280 };
@@ -374,7 +385,8 @@
374 #interrupt-cells = <1>; 385 #interrupt-cells = <1>;
375 #size-cells = <2>; 386 #size-cells = <2>;
376 #address-cells = <3>; 387 #address-cells = <3>;
377 reg = <0xe0008500 0x100>; 388 reg = <0xe0008500 0x100 /* internal registers */
389 0xe0008300 0x8>; /* config space access registers */
378 compatible = "fsl,mpc8349-pci"; 390 compatible = "fsl,mpc8349-pci";
379 device_type = "pci"; 391 device_type = "pci";
380 }; 392 };
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
index ed137aa83d5f..53191ba67aaa 100644
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -155,24 +155,28 @@
155 dma-channel@0 { 155 dma-channel@0 {
156 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; 156 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
157 reg = <0 0x80>; 157 reg = <0 0x80>;
158 cell-index = <0>;
158 interrupt-parent = <&ipic>; 159 interrupt-parent = <&ipic>;
159 interrupts = <71 8>; 160 interrupts = <71 8>;
160 }; 161 };
161 dma-channel@80 { 162 dma-channel@80 {
162 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; 163 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
163 reg = <0x80 0x80>; 164 reg = <0x80 0x80>;
165 cell-index = <1>;
164 interrupt-parent = <&ipic>; 166 interrupt-parent = <&ipic>;
165 interrupts = <71 8>; 167 interrupts = <71 8>;
166 }; 168 };
167 dma-channel@100 { 169 dma-channel@100 {
168 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; 170 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
169 reg = <0x100 0x80>; 171 reg = <0x100 0x80>;
172 cell-index = <2>;
170 interrupt-parent = <&ipic>; 173 interrupt-parent = <&ipic>;
171 interrupts = <71 8>; 174 interrupts = <71 8>;
172 }; 175 };
173 dma-channel@180 { 176 dma-channel@180 {
174 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; 177 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
175 reg = <0x180 0x28>; 178 reg = <0x180 0x28>;
179 cell-index = <3>;
176 interrupt-parent = <&ipic>; 180 interrupt-parent = <&ipic>;
177 interrupts = <71 8>; 181 interrupts = <71 8>;
178 }; 182 };
@@ -315,7 +319,8 @@
315 #interrupt-cells = <1>; 319 #interrupt-cells = <1>;
316 #size-cells = <2>; 320 #size-cells = <2>;
317 #address-cells = <3>; 321 #address-cells = <3>;
318 reg = <0xe0008500 0x100>; 322 reg = <0xe0008500 0x100 /* internal registers */
323 0xe0008300 0x8>; /* config space access registers */
319 compatible = "fsl,mpc8349-pci"; 324 compatible = "fsl,mpc8349-pci";
320 device_type = "pci"; 325 device_type = "pci";
321 }; 326 };
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
index ed32c8ddafe3..67a08d2e2ff2 100644
--- a/arch/powerpc/boot/dts/mpc8378_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -136,6 +136,13 @@
136 interrupts = <14 0x8>; 136 interrupts = <14 0x8>;
137 interrupt-parent = <&ipic>; 137 interrupt-parent = <&ipic>;
138 dfsrr; 138 dfsrr;
139
140 rtc@68 {
141 compatible = "dallas,ds1374";
142 reg = <0x68>;
143 interrupts = <19 0x8>;
144 interrupt-parent = <&ipic>;
145 };
139 }; 146 };
140 147
141 i2c@3100 { 148 i2c@3100 {
@@ -170,24 +177,28 @@
170 dma-channel@0 { 177 dma-channel@0 {
171 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; 178 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
172 reg = <0 0x80>; 179 reg = <0 0x80>;
180 cell-index = <0>;
173 interrupt-parent = <&ipic>; 181 interrupt-parent = <&ipic>;
174 interrupts = <71 8>; 182 interrupts = <71 8>;
175 }; 183 };
176 dma-channel@80 { 184 dma-channel@80 {
177 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; 185 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
178 reg = <0x80 0x80>; 186 reg = <0x80 0x80>;
187 cell-index = <1>;
179 interrupt-parent = <&ipic>; 188 interrupt-parent = <&ipic>;
180 interrupts = <71 8>; 189 interrupts = <71 8>;
181 }; 190 };
182 dma-channel@100 { 191 dma-channel@100 {
183 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; 192 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
184 reg = <0x100 0x80>; 193 reg = <0x100 0x80>;
194 cell-index = <2>;
185 interrupt-parent = <&ipic>; 195 interrupt-parent = <&ipic>;
186 interrupts = <71 8>; 196 interrupts = <71 8>;
187 }; 197 };
188 dma-channel@180 { 198 dma-channel@180 {
189 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; 199 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
190 reg = <0x180 0x28>; 200 reg = <0x180 0x28>;
201 cell-index = <3>;
191 interrupt-parent = <&ipic>; 202 interrupt-parent = <&ipic>;
192 interrupts = <71 8>; 203 interrupts = <71 8>;
193 }; 204 };
@@ -360,7 +371,8 @@
360 #interrupt-cells = <1>; 371 #interrupt-cells = <1>;
361 #size-cells = <2>; 372 #size-cells = <2>;
362 #address-cells = <3>; 373 #address-cells = <3>;
363 reg = <0xe0008500 0x100>; 374 reg = <0xe0008500 0x100 /* internal registers */
375 0xe0008300 0x8>; /* config space access registers */
364 compatible = "fsl,mpc8349-pci"; 376 compatible = "fsl,mpc8349-pci";
365 device_type = "pci"; 377 device_type = "pci";
366 }; 378 };
diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
index 34a7f2f935e1..4a09153d160c 100644
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -155,24 +155,28 @@
155 dma-channel@0 { 155 dma-channel@0 {
156 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; 156 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
157 reg = <0 0x80>; 157 reg = <0 0x80>;
158 cell-index = <0>;
158 interrupt-parent = <&ipic>; 159 interrupt-parent = <&ipic>;
159 interrupts = <71 8>; 160 interrupts = <71 8>;
160 }; 161 };
161 dma-channel@80 { 162 dma-channel@80 {
162 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; 163 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
163 reg = <0x80 0x80>; 164 reg = <0x80 0x80>;
165 cell-index = <1>;
164 interrupt-parent = <&ipic>; 166 interrupt-parent = <&ipic>;
165 interrupts = <71 8>; 167 interrupts = <71 8>;
166 }; 168 };
167 dma-channel@100 { 169 dma-channel@100 {
168 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; 170 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
169 reg = <0x100 0x80>; 171 reg = <0x100 0x80>;
172 cell-index = <2>;
170 interrupt-parent = <&ipic>; 173 interrupt-parent = <&ipic>;
171 interrupts = <71 8>; 174 interrupts = <71 8>;
172 }; 175 };
173 dma-channel@180 { 176 dma-channel@180 {
174 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; 177 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
175 reg = <0x180 0x28>; 178 reg = <0x180 0x28>;
179 cell-index = <3>;
176 interrupt-parent = <&ipic>; 180 interrupt-parent = <&ipic>;
177 interrupts = <71 8>; 181 interrupts = <71 8>;
178 }; 182 };
@@ -301,7 +305,8 @@
301 #interrupt-cells = <1>; 305 #interrupt-cells = <1>;
302 #size-cells = <2>; 306 #size-cells = <2>;
303 #address-cells = <3>; 307 #address-cells = <3>;
304 reg = <0xe0008500 0x100>; 308 reg = <0xe0008500 0x100 /* internal registers */
309 0xe0008300 0x8>; /* config space access registers */
305 compatible = "fsl,mpc8349-pci"; 310 compatible = "fsl,mpc8349-pci";
306 device_type = "pci"; 311 device_type = "pci";
307 }; 312 };
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts
index f4db9ed4a301..323370a2b5ff 100644
--- a/arch/powerpc/boot/dts/mpc8379_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
@@ -136,6 +136,13 @@
136 interrupts = <14 0x8>; 136 interrupts = <14 0x8>;
137 interrupt-parent = <&ipic>; 137 interrupt-parent = <&ipic>;
138 dfsrr; 138 dfsrr;
139
140 rtc@68 {
141 compatible = "dallas,ds1374";
142 reg = <0x68>;
143 interrupts = <19 0x8>;
144 interrupt-parent = <&ipic>;
145 };
139 }; 146 };
140 147
141 i2c@3100 { 148 i2c@3100 {
@@ -170,24 +177,28 @@
170 dma-channel@0 { 177 dma-channel@0 {
171 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; 178 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
172 reg = <0 0x80>; 179 reg = <0 0x80>;
180 cell-index = <0>;
173 interrupt-parent = <&ipic>; 181 interrupt-parent = <&ipic>;
174 interrupts = <71 8>; 182 interrupts = <71 8>;
175 }; 183 };
176 dma-channel@80 { 184 dma-channel@80 {
177 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; 185 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
178 reg = <0x80 0x80>; 186 reg = <0x80 0x80>;
187 cell-index = <1>;
179 interrupt-parent = <&ipic>; 188 interrupt-parent = <&ipic>;
180 interrupts = <71 8>; 189 interrupts = <71 8>;
181 }; 190 };
182 dma-channel@100 { 191 dma-channel@100 {
183 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; 192 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
184 reg = <0x100 0x80>; 193 reg = <0x100 0x80>;
194 cell-index = <2>;
185 interrupt-parent = <&ipic>; 195 interrupt-parent = <&ipic>;
186 interrupts = <71 8>; 196 interrupts = <71 8>;
187 }; 197 };
188 dma-channel@180 { 198 dma-channel@180 {
189 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; 199 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
190 reg = <0x180 0x28>; 200 reg = <0x180 0x28>;
201 cell-index = <3>;
191 interrupt-parent = <&ipic>; 202 interrupt-parent = <&ipic>;
192 interrupts = <71 8>; 203 interrupts = <71 8>;
193 }; 204 };
@@ -388,7 +399,8 @@
388 #interrupt-cells = <1>; 399 #interrupt-cells = <1>;
389 #size-cells = <2>; 400 #size-cells = <2>;
390 #address-cells = <3>; 401 #address-cells = <3>;
391 reg = <0xe0008500 0x100>; 402 reg = <0xe0008500 0x100 /* internal registers */
403 0xe0008300 0x8>; /* config space access registers */
392 compatible = "fsl,mpc8349-pci"; 404 compatible = "fsl,mpc8349-pci";
393 device_type = "pci"; 405 device_type = "pci";
394 }; 406 };
diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts
index e4d7030d50e5..bbd884ac9dc0 100644
--- a/arch/powerpc/boot/dts/mpc8379_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts
@@ -155,24 +155,28 @@
155 dma-channel@0 { 155 dma-channel@0 {
156 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; 156 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
157 reg = <0 0x80>; 157 reg = <0 0x80>;
158 cell-index = <0>;
158 interrupt-parent = <&ipic>; 159 interrupt-parent = <&ipic>;
159 interrupts = <71 8>; 160 interrupts = <71 8>;
160 }; 161 };
161 dma-channel@80 { 162 dma-channel@80 {
162 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; 163 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
163 reg = <0x80 0x80>; 164 reg = <0x80 0x80>;
165 cell-index = <1>;
164 interrupt-parent = <&ipic>; 166 interrupt-parent = <&ipic>;
165 interrupts = <71 8>; 167 interrupts = <71 8>;
166 }; 168 };
167 dma-channel@100 { 169 dma-channel@100 {
168 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; 170 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
169 reg = <0x100 0x80>; 171 reg = <0x100 0x80>;
172 cell-index = <2>;
170 interrupt-parent = <&ipic>; 173 interrupt-parent = <&ipic>;
171 interrupts = <71 8>; 174 interrupts = <71 8>;
172 }; 175 };
173 dma-channel@180 { 176 dma-channel@180 {
174 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; 177 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
175 reg = <0x180 0x28>; 178 reg = <0x180 0x28>;
179 cell-index = <3>;
176 interrupt-parent = <&ipic>; 180 interrupt-parent = <&ipic>;
177 interrupts = <71 8>; 181 interrupts = <71 8>;
178 }; 182 };
@@ -329,7 +333,8 @@
329 #interrupt-cells = <1>; 333 #interrupt-cells = <1>;
330 #size-cells = <2>; 334 #size-cells = <2>;
331 #address-cells = <3>; 335 #address-cells = <3>;
332 reg = <0xe0008500 0x100>; 336 reg = <0xe0008500 0x100 /* internal registers */
337 0xe0008300 0x8>; /* config space access registers */
333 compatible = "fsl,mpc8349-pci"; 338 compatible = "fsl,mpc8349-pci";
334 device_type = "pci"; 339 device_type = "pci";
335 }; 340 };
diff --git a/arch/powerpc/boot/dts/mpc8536ds.dts b/arch/powerpc/boot/dts/mpc8536ds.dts
index 1505d6855eff..93fdd99901b6 100644
--- a/arch/powerpc/boot/dts/mpc8536ds.dts
+++ b/arch/powerpc/boot/dts/mpc8536ds.dts
@@ -91,6 +91,8 @@
91 rtc@68 { 91 rtc@68 {
92 compatible = "dallas,ds3232"; 92 compatible = "dallas,ds3232";
93 reg = <0x68>; 93 reg = <0x68>;
94 interrupts = <0 0x1>;
95 interrupt-parent = <&mpic>;
94 }; 96 };
95 }; 97 };
96 98
diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
index 584a4f184eb2..f724d72c7b92 100644
--- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts
+++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
@@ -207,7 +207,7 @@
207 reg = <0xe4000 0x100>; 207 reg = <0xe4000 0x100>;
208 }; 208 };
209 209
210 i2s@16000 { 210 ssi@16000 {
211 compatible = "fsl,mpc8610-ssi"; 211 compatible = "fsl,mpc8610-ssi";
212 cell-index = <0>; 212 cell-index = <0>;
213 reg = <0x16000 0x100>; 213 reg = <0x16000 0x100>;
@@ -215,6 +215,8 @@
215 interrupts = <62 2>; 215 interrupts = <62 2>;
216 fsl,mode = "i2s-slave"; 216 fsl,mode = "i2s-slave";
217 codec-handle = <&cs4270>; 217 codec-handle = <&cs4270>;
218 fsl,playback-dma = <&dma00>;
219 fsl,capture-dma = <&dma01>;
218 }; 220 };
219 221
220 ssi@16100 { 222 ssi@16100 {
@@ -233,17 +235,17 @@
233 reg = <0x21300 0x4>; /* DMA general status register */ 235 reg = <0x21300 0x4>; /* DMA general status register */
234 ranges = <0x0 0x21100 0x200>; 236 ranges = <0x0 0x21100 0x200>;
235 237
236 dma-channel@0 { 238 dma00: dma-channel@0 {
237 compatible = "fsl,mpc8610-dma-channel", 239 compatible = "fsl,mpc8610-dma-channel",
238 "fsl,eloplus-dma-channel"; 240 "fsl,ssi-dma-channel";
239 cell-index = <0>; 241 cell-index = <0>;
240 reg = <0x0 0x80>; 242 reg = <0x0 0x80>;
241 interrupt-parent = <&mpic>; 243 interrupt-parent = <&mpic>;
242 interrupts = <20 2>; 244 interrupts = <20 2>;
243 }; 245 };
244 dma-channel@1 { 246 dma01: dma-channel@1 {
245 compatible = "fsl,mpc8610-dma-channel", 247 compatible = "fsl,mpc8610-dma-channel",
246 "fsl,eloplus-dma-channel"; 248 "fsl,ssi-dma-channel";
247 cell-index = <1>; 249 cell-index = <1>;
248 reg = <0x80 0x80>; 250 reg = <0x80 0x80>;
249 interrupt-parent = <&mpic>; 251 interrupt-parent = <&mpic>;
diff --git a/arch/powerpc/boot/dts/sbc8349.dts b/arch/powerpc/boot/dts/sbc8349.dts
index 45f789b56709..0f941f310e44 100644
--- a/arch/powerpc/boot/dts/sbc8349.dts
+++ b/arch/powerpc/boot/dts/sbc8349.dts
@@ -107,24 +107,28 @@
107 dma-channel@0 { 107 dma-channel@0 {
108 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 108 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
109 reg = <0 0x80>; 109 reg = <0 0x80>;
110 cell-index = <0>;
110 interrupt-parent = <&ipic>; 111 interrupt-parent = <&ipic>;
111 interrupts = <71 8>; 112 interrupts = <71 8>;
112 }; 113 };
113 dma-channel@80 { 114 dma-channel@80 {
114 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 115 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
115 reg = <0x80 0x80>; 116 reg = <0x80 0x80>;
117 cell-index = <1>;
116 interrupt-parent = <&ipic>; 118 interrupt-parent = <&ipic>;
117 interrupts = <71 8>; 119 interrupts = <71 8>;
118 }; 120 };
119 dma-channel@100 { 121 dma-channel@100 {
120 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 122 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
121 reg = <0x100 0x80>; 123 reg = <0x100 0x80>;
124 cell-index = <2>;
122 interrupt-parent = <&ipic>; 125 interrupt-parent = <&ipic>;
123 interrupts = <71 8>; 126 interrupts = <71 8>;
124 }; 127 };
125 dma-channel@180 { 128 dma-channel@180 {
126 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; 129 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
127 reg = <0x180 0x28>; 130 reg = <0x180 0x28>;
131 cell-index = <3>;
128 interrupt-parent = <&ipic>; 132 interrupt-parent = <&ipic>;
129 interrupts = <71 8>; 133 interrupts = <71 8>;
130 }; 134 };
@@ -268,7 +272,8 @@
268 #interrupt-cells = <1>; 272 #interrupt-cells = <1>;
269 #size-cells = <2>; 273 #size-cells = <2>;
270 #address-cells = <3>; 274 #address-cells = <3>;
271 reg = <0xe0008500 0x100>; 275 reg = <0xe0008500 0x100 /* internal registers */
276 0xe0008300 0x8>; /* config space access registers */
272 compatible = "fsl,mpc8349-pci"; 277 compatible = "fsl,mpc8349-pci";
273 device_type = "pci"; 278 device_type = "pci";
274 }; 279 };
diff --git a/arch/powerpc/boot/dts/sequoia.dts b/arch/powerpc/boot/dts/sequoia.dts
index 72d15f075d34..3b295e8df53f 100644
--- a/arch/powerpc/boot/dts/sequoia.dts
+++ b/arch/powerpc/boot/dts/sequoia.dts
@@ -246,13 +246,22 @@
246 }; 246 };
247 247
248 IIC0: i2c@ef600700 { 248 IIC0: i2c@ef600700 {
249 #address-cells = <1>;
250 #size-cells = <0>;
249 compatible = "ibm,iic-440epx", "ibm,iic"; 251 compatible = "ibm,iic-440epx", "ibm,iic";
250 reg = <0xef600700 0x00000014>; 252 reg = <0xef600700 0x00000014>;
251 interrupt-parent = <&UIC0>; 253 interrupt-parent = <&UIC0>;
252 interrupts = <0x2 0x4>; 254 interrupts = <0x2 0x4>;
255
256 hwmon@48 {
257 compatible = "adi,ad7414";
258 reg = <0x48>;
259 };
253 }; 260 };
254 261
255 IIC1: i2c@ef600800 { 262 IIC1: i2c@ef600800 {
263 #address-cells = <1>;
264 #size-cells = <0>;
256 compatible = "ibm,iic-440epx", "ibm,iic"; 265 compatible = "ibm,iic-440epx", "ibm,iic";
257 reg = <0xef600800 0x00000014>; 266 reg = <0xef600800 0x00000014>;
258 interrupt-parent = <&UIC0>; 267 interrupt-parent = <&UIC0>;
diff --git a/arch/powerpc/boot/dts/yosemite.dts b/arch/powerpc/boot/dts/yosemite.dts
index e39422aa0d85..1fa3cb4c4ebb 100644
--- a/arch/powerpc/boot/dts/yosemite.dts
+++ b/arch/powerpc/boot/dts/yosemite.dts
@@ -15,7 +15,7 @@
15 #address-cells = <2>; 15 #address-cells = <2>;
16 #size-cells = <1>; 16 #size-cells = <1>;
17 model = "amcc,yosemite"; 17 model = "amcc,yosemite";
18 compatible = "amcc,yosemite","amcc,bamboo"; 18 compatible = "amcc,yosemite";
19 dcr-parent = <&{/cpus/cpu@0}>; 19 dcr-parent = <&{/cpus/cpu@0}>;
20 20
21 aliases { 21 aliases {
diff --git a/arch/powerpc/boot/elf_util.c b/arch/powerpc/boot/elf_util.c
index 7454aa4cc20c..1567a0c0f05c 100644
--- a/arch/powerpc/boot/elf_util.c
+++ b/arch/powerpc/boot/elf_util.c
@@ -27,7 +27,8 @@ int parse_elf64(void *hdr, struct elf_info *info)
27 elf64->e_ident[EI_MAG3] == ELFMAG3 && 27 elf64->e_ident[EI_MAG3] == ELFMAG3 &&
28 elf64->e_ident[EI_CLASS] == ELFCLASS64 && 28 elf64->e_ident[EI_CLASS] == ELFCLASS64 &&
29 elf64->e_ident[EI_DATA] == ELFDATA2MSB && 29 elf64->e_ident[EI_DATA] == ELFDATA2MSB &&
30 elf64->e_type == ET_EXEC && 30 (elf64->e_type == ET_EXEC ||
31 elf64->e_type == ET_DYN) &&
31 elf64->e_machine == EM_PPC64)) 32 elf64->e_machine == EM_PPC64))
32 return 0; 33 return 0;
33 34
@@ -58,7 +59,8 @@ int parse_elf32(void *hdr, struct elf_info *info)
58 elf32->e_ident[EI_MAG3] == ELFMAG3 && 59 elf32->e_ident[EI_MAG3] == ELFMAG3 &&
59 elf32->e_ident[EI_CLASS] == ELFCLASS32 && 60 elf32->e_ident[EI_CLASS] == ELFCLASS32 &&
60 elf32->e_ident[EI_DATA] == ELFDATA2MSB && 61 elf32->e_ident[EI_DATA] == ELFDATA2MSB &&
61 elf32->e_type == ET_EXEC && 62 (elf32->e_type == ET_EXEC ||
63 elf32->e_type == ET_DYN) &&
62 elf32->e_machine == EM_PPC)) 64 elf32->e_machine == EM_PPC))
63 return 0; 65 return 0;
64 66
diff --git a/arch/powerpc/boot/libfdt/Makefile.libfdt b/arch/powerpc/boot/libfdt/Makefile.libfdt
index 82f9c6a8287b..6c42acfa21ec 100644
--- a/arch/powerpc/boot/libfdt/Makefile.libfdt
+++ b/arch/powerpc/boot/libfdt/Makefile.libfdt
@@ -3,12 +3,6 @@
3# This is not a complete Makefile of itself. Instead, it is designed to 3# This is not a complete Makefile of itself. Instead, it is designed to
4# be easily embeddable into other systems of Makefiles. 4# be easily embeddable into other systems of Makefiles.
5# 5#
6LIBFDT_SRCS = fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c
7LIBFDT_INCLUDES = fdt.h libfdt.h 6LIBFDT_INCLUDES = fdt.h libfdt.h
8LIBFDT_EXTRA = libfdt_internal.h 7LIBFDT_SRCS = fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c
9LIBFDT_LIB = libfdt/libfdt.a
10
11LIBFDT_OBJS = $(LIBFDT_SRCS:%.c=%.o) 8LIBFDT_OBJS = $(LIBFDT_SRCS:%.c=%.o)
12
13$(LIBFDT_objdir)/$(LIBFDT_LIB): $(addprefix $(LIBFDT_objdir)/,$(LIBFDT_OBJS))
14
diff --git a/arch/powerpc/boot/libfdt/fdt.c b/arch/powerpc/boot/libfdt/fdt.c
index 586a36136db2..2acaec5923ae 100644
--- a/arch/powerpc/boot/libfdt/fdt.c
+++ b/arch/powerpc/boot/libfdt/fdt.c
@@ -63,7 +63,7 @@ int fdt_check_header(const void *fdt)
63 return -FDT_ERR_BADVERSION; 63 return -FDT_ERR_BADVERSION;
64 if (fdt_last_comp_version(fdt) > FDT_LAST_SUPPORTED_VERSION) 64 if (fdt_last_comp_version(fdt) > FDT_LAST_SUPPORTED_VERSION)
65 return -FDT_ERR_BADVERSION; 65 return -FDT_ERR_BADVERSION;
66 } else if (fdt_magic(fdt) == SW_MAGIC) { 66 } else if (fdt_magic(fdt) == FDT_SW_MAGIC) {
67 /* Unfinished sequential-write blob */ 67 /* Unfinished sequential-write blob */
68 if (fdt_size_dt_struct(fdt) == 0) 68 if (fdt_size_dt_struct(fdt) == 0)
69 return -FDT_ERR_BADSTATE; 69 return -FDT_ERR_BADSTATE;
@@ -76,7 +76,7 @@ int fdt_check_header(const void *fdt)
76 76
77const void *fdt_offset_ptr(const void *fdt, int offset, int len) 77const void *fdt_offset_ptr(const void *fdt, int offset, int len)
78{ 78{
79 const void *p; 79 const char *p;
80 80
81 if (fdt_version(fdt) >= 0x11) 81 if (fdt_version(fdt) >= 0x11)
82 if (((offset + len) < offset) 82 if (((offset + len) < offset)
@@ -124,11 +124,59 @@ uint32_t fdt_next_tag(const void *fdt, int offset, int *nextoffset)
124 } 124 }
125 125
126 if (nextoffset) 126 if (nextoffset)
127 *nextoffset = ALIGN(offset, FDT_TAGSIZE); 127 *nextoffset = FDT_TAGALIGN(offset);
128 128
129 return tag; 129 return tag;
130} 130}
131 131
132int _fdt_check_node_offset(const void *fdt, int offset)
133{
134 if ((offset < 0) || (offset % FDT_TAGSIZE)
135 || (fdt_next_tag(fdt, offset, &offset) != FDT_BEGIN_NODE))
136 return -FDT_ERR_BADOFFSET;
137
138 return offset;
139}
140
141int fdt_next_node(const void *fdt, int offset, int *depth)
142{
143 int nextoffset = 0;
144 uint32_t tag;
145
146 if (offset >= 0)
147 if ((nextoffset = _fdt_check_node_offset(fdt, offset)) < 0)
148 return nextoffset;
149
150 do {
151 offset = nextoffset;
152 tag = fdt_next_tag(fdt, offset, &nextoffset);
153
154 switch (tag) {
155 case FDT_PROP:
156 case FDT_NOP:
157 break;
158
159 case FDT_BEGIN_NODE:
160 if (depth)
161 (*depth)++;
162 break;
163
164 case FDT_END_NODE:
165 if (depth)
166 (*depth)--;
167 break;
168
169 case FDT_END:
170 return -FDT_ERR_NOTFOUND;
171
172 default:
173 return -FDT_ERR_BADSTRUCTURE;
174 }
175 } while (tag != FDT_BEGIN_NODE);
176
177 return offset;
178}
179
132const char *_fdt_find_string(const char *strtab, int tabsize, const char *s) 180const char *_fdt_find_string(const char *strtab, int tabsize, const char *s)
133{ 181{
134 int len = strlen(s) + 1; 182 int len = strlen(s) + 1;
@@ -136,17 +184,14 @@ const char *_fdt_find_string(const char *strtab, int tabsize, const char *s)
136 const char *p; 184 const char *p;
137 185
138 for (p = strtab; p <= last; p++) 186 for (p = strtab; p <= last; p++)
139 if (memeq(p, s, len)) 187 if (memcmp(p, s, len) == 0)
140 return p; 188 return p;
141 return NULL; 189 return NULL;
142} 190}
143 191
144int fdt_move(const void *fdt, void *buf, int bufsize) 192int fdt_move(const void *fdt, void *buf, int bufsize)
145{ 193{
146 int err = fdt_check_header(fdt); 194 FDT_CHECK_HEADER(fdt);
147
148 if (err)
149 return err;
150 195
151 if (fdt_totalsize(fdt) > bufsize) 196 if (fdt_totalsize(fdt) > bufsize)
152 return -FDT_ERR_NOSPACE; 197 return -FDT_ERR_NOSPACE;
diff --git a/arch/powerpc/boot/libfdt/fdt_ro.c b/arch/powerpc/boot/libfdt/fdt_ro.c
index 12a37d59f96e..129b532bcc1a 100644
--- a/arch/powerpc/boot/libfdt/fdt_ro.c
+++ b/arch/powerpc/boot/libfdt/fdt_ro.c
@@ -55,17 +55,10 @@
55 55
56#include "libfdt_internal.h" 56#include "libfdt_internal.h"
57 57
58#define CHECK_HEADER(fdt) \ 58static int _fdt_nodename_eq(const void *fdt, int offset,
59 { \ 59 const char *s, int len)
60 int err; \
61 if ((err = fdt_check_header(fdt)) != 0) \
62 return err; \
63 }
64
65static int nodename_eq(const void *fdt, int offset,
66 const char *s, int len)
67{ 60{
68 const char *p = fdt_offset_ptr(fdt, offset, len+1); 61 const char *p = fdt_offset_ptr(fdt, offset + FDT_TAGSIZE, len+1);
69 62
70 if (! p) 63 if (! p)
71 /* short match */ 64 /* short match */
@@ -84,12 +77,12 @@ static int nodename_eq(const void *fdt, int offset,
84 77
85const char *fdt_string(const void *fdt, int stroffset) 78const char *fdt_string(const void *fdt, int stroffset)
86{ 79{
87 return (char *)fdt + fdt_off_dt_strings(fdt) + stroffset; 80 return (const char *)fdt + fdt_off_dt_strings(fdt) + stroffset;
88} 81}
89 82
90int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size) 83int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size)
91{ 84{
92 CHECK_HEADER(fdt); 85 FDT_CHECK_HEADER(fdt);
93 *address = fdt64_to_cpu(_fdt_mem_rsv(fdt, n)->address); 86 *address = fdt64_to_cpu(_fdt_mem_rsv(fdt, n)->address);
94 *size = fdt64_to_cpu(_fdt_mem_rsv(fdt, n)->size); 87 *size = fdt64_to_cpu(_fdt_mem_rsv(fdt, n)->size);
95 return 0; 88 return 0;
@@ -104,50 +97,24 @@ int fdt_num_mem_rsv(const void *fdt)
104 return i; 97 return i;
105} 98}
106 99
107int fdt_subnode_offset_namelen(const void *fdt, int parentoffset, 100int fdt_subnode_offset_namelen(const void *fdt, int offset,
108 const char *name, int namelen) 101 const char *name, int namelen)
109{ 102{
110 int level = 0; 103 int depth;
111 uint32_t tag;
112 int offset, nextoffset;
113
114 CHECK_HEADER(fdt);
115
116 tag = fdt_next_tag(fdt, parentoffset, &nextoffset);
117 if (tag != FDT_BEGIN_NODE)
118 return -FDT_ERR_BADOFFSET;
119
120 do {
121 offset = nextoffset;
122 tag = fdt_next_tag(fdt, offset, &nextoffset);
123
124 switch (tag) {
125 case FDT_END:
126 return -FDT_ERR_TRUNCATED;
127
128 case FDT_BEGIN_NODE:
129 level++;
130 if (level != 1)
131 continue;
132 if (nodename_eq(fdt, offset+FDT_TAGSIZE, name, namelen))
133 /* Found it! */
134 return offset;
135 break;
136
137 case FDT_END_NODE:
138 level--;
139 break;
140 104
141 case FDT_PROP: 105 FDT_CHECK_HEADER(fdt);
142 case FDT_NOP:
143 break;
144 106
145 default: 107 for (depth = 0;
146 return -FDT_ERR_BADSTRUCTURE; 108 offset >= 0;
147 } 109 offset = fdt_next_node(fdt, offset, &depth)) {
148 } while (level >= 0); 110 if (depth < 0)
111 return -FDT_ERR_NOTFOUND;
112 else if ((depth == 1)
113 && _fdt_nodename_eq(fdt, offset, name, namelen))
114 return offset;
115 }
149 116
150 return -FDT_ERR_NOTFOUND; 117 return offset; /* error */
151} 118}
152 119
153int fdt_subnode_offset(const void *fdt, int parentoffset, 120int fdt_subnode_offset(const void *fdt, int parentoffset,
@@ -162,7 +129,7 @@ int fdt_path_offset(const void *fdt, const char *path)
162 const char *p = path; 129 const char *p = path;
163 int offset = 0; 130 int offset = 0;
164 131
165 CHECK_HEADER(fdt); 132 FDT_CHECK_HEADER(fdt);
166 133
167 if (*path != '/') 134 if (*path != '/')
168 return -FDT_ERR_BADPATH; 135 return -FDT_ERR_BADPATH;
@@ -190,16 +157,12 @@ int fdt_path_offset(const void *fdt, const char *path)
190 157
191const char *fdt_get_name(const void *fdt, int nodeoffset, int *len) 158const char *fdt_get_name(const void *fdt, int nodeoffset, int *len)
192{ 159{
193 const struct fdt_node_header *nh; 160 const struct fdt_node_header *nh = _fdt_offset_ptr(fdt, nodeoffset);
194 int err; 161 int err;
195 162
196 if ((err = fdt_check_header(fdt)) != 0) 163 if (((err = fdt_check_header(fdt)) != 0)
197 goto fail; 164 || ((err = _fdt_check_node_offset(fdt, nodeoffset)) < 0))
198 165 goto fail;
199 err = -FDT_ERR_BADOFFSET;
200 nh = fdt_offset_ptr(fdt, nodeoffset, sizeof(*nh));
201 if (!nh || (fdt32_to_cpu(nh->tag) != FDT_BEGIN_NODE))
202 goto fail;
203 166
204 if (len) 167 if (len)
205 *len = strlen(nh->name); 168 *len = strlen(nh->name);
@@ -222,17 +185,11 @@ const struct fdt_property *fdt_get_property(const void *fdt,
222 int offset, nextoffset; 185 int offset, nextoffset;
223 int err; 186 int err;
224 187
225 if ((err = fdt_check_header(fdt)) != 0) 188 if (((err = fdt_check_header(fdt)) != 0)
226 goto fail; 189 || ((err = _fdt_check_node_offset(fdt, nodeoffset)) < 0))
227 190 goto fail;
228 err = -FDT_ERR_BADOFFSET;
229 if (nodeoffset % FDT_TAGSIZE)
230 goto fail;
231
232 tag = fdt_next_tag(fdt, nodeoffset, &nextoffset);
233 if (tag != FDT_BEGIN_NODE)
234 goto fail;
235 191
192 nextoffset = err;
236 do { 193 do {
237 offset = nextoffset; 194 offset = nextoffset;
238 195
@@ -253,7 +210,7 @@ const struct fdt_property *fdt_get_property(const void *fdt,
253 if (! prop) 210 if (! prop)
254 goto fail; 211 goto fail;
255 namestroff = fdt32_to_cpu(prop->nameoff); 212 namestroff = fdt32_to_cpu(prop->nameoff);
256 if (streq(fdt_string(fdt, namestroff), name)) { 213 if (strcmp(fdt_string(fdt, namestroff), name) == 0) {
257 /* Found it! */ 214 /* Found it! */
258 int len = fdt32_to_cpu(prop->len); 215 int len = fdt32_to_cpu(prop->len);
259 prop = fdt_offset_ptr(fdt, offset, 216 prop = fdt_offset_ptr(fdt, offset,
@@ -307,115 +264,91 @@ uint32_t fdt_get_phandle(const void *fdt, int nodeoffset)
307 264
308int fdt_get_path(const void *fdt, int nodeoffset, char *buf, int buflen) 265int fdt_get_path(const void *fdt, int nodeoffset, char *buf, int buflen)
309{ 266{
310 uint32_t tag; 267 int pdepth = 0, p = 0;
311 int p = 0, overflow = 0; 268 int offset, depth, namelen;
312 int offset, nextoffset, namelen;
313 const char *name; 269 const char *name;
314 270
315 CHECK_HEADER(fdt); 271 FDT_CHECK_HEADER(fdt);
316
317 tag = fdt_next_tag(fdt, 0, &nextoffset);
318 if (tag != FDT_BEGIN_NODE)
319 return -FDT_ERR_BADSTRUCTURE;
320 272
321 if (buflen < 2) 273 if (buflen < 2)
322 return -FDT_ERR_NOSPACE; 274 return -FDT_ERR_NOSPACE;
323 buf[0] = '/';
324 p = 1;
325 275
326 while (nextoffset <= nodeoffset) { 276 for (offset = 0, depth = 0;
327 offset = nextoffset; 277 (offset >= 0) && (offset <= nodeoffset);
328 tag = fdt_next_tag(fdt, offset, &nextoffset); 278 offset = fdt_next_node(fdt, offset, &depth)) {
329 switch (tag) { 279 if (pdepth < depth)
330 case FDT_END: 280 continue; /* overflowed buffer */
331 return -FDT_ERR_BADOFFSET;
332 281
333 case FDT_BEGIN_NODE: 282 while (pdepth > depth) {
334 name = fdt_get_name(fdt, offset, &namelen); 283 do {
335 if (!name) 284 p--;
336 return namelen; 285 } while (buf[p-1] != '/');
337 if (overflow || ((p + namelen + 1) > buflen)) { 286 pdepth--;
338 overflow++; 287 }
339 break; 288
340 } 289 name = fdt_get_name(fdt, offset, &namelen);
290 if (!name)
291 return namelen;
292 if ((p + namelen + 1) <= buflen) {
341 memcpy(buf + p, name, namelen); 293 memcpy(buf + p, name, namelen);
342 p += namelen; 294 p += namelen;
343 buf[p++] = '/'; 295 buf[p++] = '/';
344 break; 296 pdepth++;
345 297 }
346 case FDT_END_NODE:
347 if (overflow) {
348 overflow--;
349 break;
350 }
351 do {
352 p--;
353 } while (buf[p-1] != '/');
354 break;
355 298
356 case FDT_PROP: 299 if (offset == nodeoffset) {
357 case FDT_NOP: 300 if (pdepth < (depth + 1))
358 break; 301 return -FDT_ERR_NOSPACE;
359 302
360 default: 303 if (p > 1) /* special case so that root path is "/", not "" */
361 return -FDT_ERR_BADSTRUCTURE; 304 p--;
305 buf[p] = '\0';
306 return p;
362 } 307 }
363 } 308 }
364 309
365 if (overflow) 310 if ((offset == -FDT_ERR_NOTFOUND) || (offset >= 0))
366 return -FDT_ERR_NOSPACE; 311 return -FDT_ERR_BADOFFSET;
312 else if (offset == -FDT_ERR_BADOFFSET)
313 return -FDT_ERR_BADSTRUCTURE;
367 314
368 if (p > 1) /* special case so that root path is "/", not "" */ 315 return offset; /* error from fdt_next_node() */
369 p--;
370 buf[p] = '\0';
371 return p;
372} 316}
373 317
374int fdt_supernode_atdepth_offset(const void *fdt, int nodeoffset, 318int fdt_supernode_atdepth_offset(const void *fdt, int nodeoffset,
375 int supernodedepth, int *nodedepth) 319 int supernodedepth, int *nodedepth)
376{ 320{
377 int level = -1; 321 int offset, depth;
378 uint32_t tag;
379 int offset, nextoffset = 0;
380 int supernodeoffset = -FDT_ERR_INTERNAL; 322 int supernodeoffset = -FDT_ERR_INTERNAL;
381 323
382 CHECK_HEADER(fdt); 324 FDT_CHECK_HEADER(fdt);
383 325
384 if (supernodedepth < 0) 326 if (supernodedepth < 0)
385 return -FDT_ERR_NOTFOUND; 327 return -FDT_ERR_NOTFOUND;
386 328
387 do { 329 for (offset = 0, depth = 0;
388 offset = nextoffset; 330 (offset >= 0) && (offset <= nodeoffset);
389 tag = fdt_next_tag(fdt, offset, &nextoffset); 331 offset = fdt_next_node(fdt, offset, &depth)) {
390 switch (tag) { 332 if (depth == supernodedepth)
391 case FDT_END: 333 supernodeoffset = offset;
392 return -FDT_ERR_BADOFFSET;
393
394 case FDT_BEGIN_NODE:
395 level++;
396 if (level == supernodedepth)
397 supernodeoffset = offset;
398 break;
399
400 case FDT_END_NODE:
401 level--;
402 break;
403 334
404 case FDT_PROP: 335 if (offset == nodeoffset) {
405 case FDT_NOP: 336 if (nodedepth)
406 break; 337 *nodedepth = depth;
407 338
408 default: 339 if (supernodedepth > depth)
409 return -FDT_ERR_BADSTRUCTURE; 340 return -FDT_ERR_NOTFOUND;
341 else
342 return supernodeoffset;
410 } 343 }
411 } while (offset < nodeoffset); 344 }
412 345
413 if (nodedepth) 346 if ((offset == -FDT_ERR_NOTFOUND) || (offset >= 0))
414 *nodedepth = level; 347 return -FDT_ERR_BADOFFSET;
348 else if (offset == -FDT_ERR_BADOFFSET)
349 return -FDT_ERR_BADSTRUCTURE;
415 350
416 if (supernodedepth > level) 351 return offset; /* error from fdt_next_node() */
417 return -FDT_ERR_NOTFOUND;
418 return supernodeoffset;
419} 352}
420 353
421int fdt_node_depth(const void *fdt, int nodeoffset) 354int fdt_node_depth(const void *fdt, int nodeoffset)
@@ -443,51 +376,27 @@ int fdt_node_offset_by_prop_value(const void *fdt, int startoffset,
443 const char *propname, 376 const char *propname,
444 const void *propval, int proplen) 377 const void *propval, int proplen)
445{ 378{
446 uint32_t tag; 379 int offset;
447 int offset, nextoffset;
448 const void *val; 380 const void *val;
449 int len; 381 int len;
450 382
451 CHECK_HEADER(fdt); 383 FDT_CHECK_HEADER(fdt);
452
453 if (startoffset >= 0) {
454 tag = fdt_next_tag(fdt, startoffset, &nextoffset);
455 if (tag != FDT_BEGIN_NODE)
456 return -FDT_ERR_BADOFFSET;
457 } else {
458 nextoffset = 0;
459 }
460 384
461 /* FIXME: The algorithm here is pretty horrible: we scan each 385 /* FIXME: The algorithm here is pretty horrible: we scan each
462 * property of a node in fdt_getprop(), then if that didn't 386 * property of a node in fdt_getprop(), then if that didn't
463 * find what we want, we scan over them again making our way 387 * find what we want, we scan over them again making our way
464 * to the next node. Still it's the easiest to implement 388 * to the next node. Still it's the easiest to implement
465 * approach; performance can come later. */ 389 * approach; performance can come later. */
466 do { 390 for (offset = fdt_next_node(fdt, startoffset, NULL);
467 offset = nextoffset; 391 offset >= 0;
468 tag = fdt_next_tag(fdt, offset, &nextoffset); 392 offset = fdt_next_node(fdt, offset, NULL)) {
469 393 val = fdt_getprop(fdt, offset, propname, &len);
470 switch (tag) { 394 if (val && (len == proplen)
471 case FDT_BEGIN_NODE: 395 && (memcmp(val, propval, len) == 0))
472 val = fdt_getprop(fdt, offset, propname, &len); 396 return offset;
473 if (val 397 }
474 && (len == proplen)
475 && (memcmp(val, propval, len) == 0))
476 return offset;
477 break;
478
479 case FDT_PROP:
480 case FDT_END:
481 case FDT_END_NODE:
482 case FDT_NOP:
483 break;
484
485 default:
486 return -FDT_ERR_BADSTRUCTURE;
487 }
488 } while (tag != FDT_END);
489 398
490 return -FDT_ERR_NOTFOUND; 399 return offset; /* error from fdt_next_node() */
491} 400}
492 401
493int fdt_node_offset_by_phandle(const void *fdt, uint32_t phandle) 402int fdt_node_offset_by_phandle(const void *fdt, uint32_t phandle)
@@ -499,10 +408,10 @@ int fdt_node_offset_by_phandle(const void *fdt, uint32_t phandle)
499 &phandle, sizeof(phandle)); 408 &phandle, sizeof(phandle));
500} 409}
501 410
502int _stringlist_contains(const void *strlist, int listlen, const char *str) 411int _stringlist_contains(const char *strlist, int listlen, const char *str)
503{ 412{
504 int len = strlen(str); 413 int len = strlen(str);
505 const void *p; 414 const char *p;
506 415
507 while (listlen >= len) { 416 while (listlen >= len) {
508 if (memcmp(str, strlist, len+1) == 0) 417 if (memcmp(str, strlist, len+1) == 0)
@@ -534,50 +443,24 @@ int fdt_node_check_compatible(const void *fdt, int nodeoffset,
534int fdt_node_offset_by_compatible(const void *fdt, int startoffset, 443int fdt_node_offset_by_compatible(const void *fdt, int startoffset,
535 const char *compatible) 444 const char *compatible)
536{ 445{
537 uint32_t tag; 446 int offset, err;
538 int offset, nextoffset;
539 int err;
540
541 CHECK_HEADER(fdt);
542 447
543 if (startoffset >= 0) { 448 FDT_CHECK_HEADER(fdt);
544 tag = fdt_next_tag(fdt, startoffset, &nextoffset);
545 if (tag != FDT_BEGIN_NODE)
546 return -FDT_ERR_BADOFFSET;
547 } else {
548 nextoffset = 0;
549 }
550 449
551 /* FIXME: The algorithm here is pretty horrible: we scan each 450 /* FIXME: The algorithm here is pretty horrible: we scan each
552 * property of a node in fdt_node_check_compatible(), then if 451 * property of a node in fdt_node_check_compatible(), then if
553 * that didn't find what we want, we scan over them again 452 * that didn't find what we want, we scan over them again
554 * making our way to the next node. Still it's the easiest to 453 * making our way to the next node. Still it's the easiest to
555 * implement approach; performance can come later. */ 454 * implement approach; performance can come later. */
556 do { 455 for (offset = fdt_next_node(fdt, startoffset, NULL);
557 offset = nextoffset; 456 offset >= 0;
558 tag = fdt_next_tag(fdt, offset, &nextoffset); 457 offset = fdt_next_node(fdt, offset, NULL)) {
559 458 err = fdt_node_check_compatible(fdt, offset, compatible);
560 switch (tag) { 459 if ((err < 0) && (err != -FDT_ERR_NOTFOUND))
561 case FDT_BEGIN_NODE: 460 return err;
562 err = fdt_node_check_compatible(fdt, offset, 461 else if (err == 0)
563 compatible); 462 return offset;
564 if ((err < 0) 463 }
565 && (err != -FDT_ERR_NOTFOUND))
566 return err;
567 else if (err == 0)
568 return offset;
569 break;
570
571 case FDT_PROP:
572 case FDT_END:
573 case FDT_END_NODE:
574 case FDT_NOP:
575 break;
576
577 default:
578 return -FDT_ERR_BADSTRUCTURE;
579 }
580 } while (tag != FDT_END);
581 464
582 return -FDT_ERR_NOTFOUND; 465 return offset; /* error from fdt_next_node() */
583} 466}
diff --git a/arch/powerpc/boot/libfdt/fdt_rw.c b/arch/powerpc/boot/libfdt/fdt_rw.c
index 6673f8ec962a..8e7ec4cb7bcd 100644
--- a/arch/powerpc/boot/libfdt/fdt_rw.c
+++ b/arch/powerpc/boot/libfdt/fdt_rw.c
@@ -55,10 +55,10 @@
55 55
56#include "libfdt_internal.h" 56#include "libfdt_internal.h"
57 57
58static int _blocks_misordered(const void *fdt, 58static int _fdt_blocks_misordered(const void *fdt,
59 int mem_rsv_size, int struct_size) 59 int mem_rsv_size, int struct_size)
60{ 60{
61 return (fdt_off_mem_rsvmap(fdt) < ALIGN(sizeof(struct fdt_header), 8)) 61 return (fdt_off_mem_rsvmap(fdt) < FDT_ALIGN(sizeof(struct fdt_header), 8))
62 || (fdt_off_dt_struct(fdt) < 62 || (fdt_off_dt_struct(fdt) <
63 (fdt_off_mem_rsvmap(fdt) + mem_rsv_size)) 63 (fdt_off_mem_rsvmap(fdt) + mem_rsv_size))
64 || (fdt_off_dt_strings(fdt) < 64 || (fdt_off_dt_strings(fdt) <
@@ -67,16 +67,14 @@ static int _blocks_misordered(const void *fdt,
67 (fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt))); 67 (fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt)));
68} 68}
69 69
70static int rw_check_header(void *fdt) 70static int _fdt_rw_check_header(void *fdt)
71{ 71{
72 int err; 72 FDT_CHECK_HEADER(fdt);
73 73
74 if ((err = fdt_check_header(fdt)))
75 return err;
76 if (fdt_version(fdt) < 17) 74 if (fdt_version(fdt) < 17)
77 return -FDT_ERR_BADVERSION; 75 return -FDT_ERR_BADVERSION;
78 if (_blocks_misordered(fdt, sizeof(struct fdt_reserve_entry), 76 if (_fdt_blocks_misordered(fdt, sizeof(struct fdt_reserve_entry),
79 fdt_size_dt_struct(fdt))) 77 fdt_size_dt_struct(fdt)))
80 return -FDT_ERR_BADLAYOUT; 78 return -FDT_ERR_BADLAYOUT;
81 if (fdt_version(fdt) > 17) 79 if (fdt_version(fdt) > 17)
82 fdt_set_version(fdt, 17); 80 fdt_set_version(fdt, 17);
@@ -84,36 +82,37 @@ static int rw_check_header(void *fdt)
84 return 0; 82 return 0;
85} 83}
86 84
87#define RW_CHECK_HEADER(fdt) \ 85#define FDT_RW_CHECK_HEADER(fdt) \
88 { \ 86 { \
89 int err; \ 87 int err; \
90 if ((err = rw_check_header(fdt)) != 0) \ 88 if ((err = _fdt_rw_check_header(fdt)) != 0) \
91 return err; \ 89 return err; \
92 } 90 }
93 91
94static inline int _blob_data_size(void *fdt) 92static inline int _fdt_data_size(void *fdt)
95{ 93{
96 return fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt); 94 return fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt);
97} 95}
98 96
99static int _blob_splice(void *fdt, void *p, int oldlen, int newlen) 97static int _fdt_splice(void *fdt, void *splicepoint, int oldlen, int newlen)
100{ 98{
101 void *end = fdt + _blob_data_size(fdt); 99 char *p = splicepoint;
100 char *end = (char *)fdt + _fdt_data_size(fdt);
102 101
103 if (((p + oldlen) < p) || ((p + oldlen) > end)) 102 if (((p + oldlen) < p) || ((p + oldlen) > end))
104 return -FDT_ERR_BADOFFSET; 103 return -FDT_ERR_BADOFFSET;
105 if ((end - oldlen + newlen) > (fdt + fdt_totalsize(fdt))) 104 if ((end - oldlen + newlen) > ((char *)fdt + fdt_totalsize(fdt)))
106 return -FDT_ERR_NOSPACE; 105 return -FDT_ERR_NOSPACE;
107 memmove(p + newlen, p + oldlen, end - p - oldlen); 106 memmove(p + newlen, p + oldlen, end - p - oldlen);
108 return 0; 107 return 0;
109} 108}
110 109
111static int _blob_splice_mem_rsv(void *fdt, struct fdt_reserve_entry *p, 110static int _fdt_splice_mem_rsv(void *fdt, struct fdt_reserve_entry *p,
112 int oldn, int newn) 111 int oldn, int newn)
113{ 112{
114 int delta = (newn - oldn) * sizeof(*p); 113 int delta = (newn - oldn) * sizeof(*p);
115 int err; 114 int err;
116 err = _blob_splice(fdt, p, oldn * sizeof(*p), newn * sizeof(*p)); 115 err = _fdt_splice(fdt, p, oldn * sizeof(*p), newn * sizeof(*p));
117 if (err) 116 if (err)
118 return err; 117 return err;
119 fdt_set_off_dt_struct(fdt, fdt_off_dt_struct(fdt) + delta); 118 fdt_set_off_dt_struct(fdt, fdt_off_dt_struct(fdt) + delta);
@@ -121,13 +120,13 @@ static int _blob_splice_mem_rsv(void *fdt, struct fdt_reserve_entry *p,
121 return 0; 120 return 0;
122} 121}
123 122
124static int _blob_splice_struct(void *fdt, void *p, 123static int _fdt_splice_struct(void *fdt, void *p,
125 int oldlen, int newlen) 124 int oldlen, int newlen)
126{ 125{
127 int delta = newlen - oldlen; 126 int delta = newlen - oldlen;
128 int err; 127 int err;
129 128
130 if ((err = _blob_splice(fdt, p, oldlen, newlen))) 129 if ((err = _fdt_splice(fdt, p, oldlen, newlen)))
131 return err; 130 return err;
132 131
133 fdt_set_size_dt_struct(fdt, fdt_size_dt_struct(fdt) + delta); 132 fdt_set_size_dt_struct(fdt, fdt_size_dt_struct(fdt) + delta);
@@ -135,19 +134,20 @@ static int _blob_splice_struct(void *fdt, void *p,
135 return 0; 134 return 0;
136} 135}
137 136
138static int _blob_splice_string(void *fdt, int newlen) 137static int _fdt_splice_string(void *fdt, int newlen)
139{ 138{
140 void *p = fdt + fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt); 139 void *p = (char *)fdt
140 + fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt);
141 int err; 141 int err;
142 142
143 if ((err = _blob_splice(fdt, p, 0, newlen))) 143 if ((err = _fdt_splice(fdt, p, 0, newlen)))
144 return err; 144 return err;
145 145
146 fdt_set_size_dt_strings(fdt, fdt_size_dt_strings(fdt) + newlen); 146 fdt_set_size_dt_strings(fdt, fdt_size_dt_strings(fdt) + newlen);
147 return 0; 147 return 0;
148} 148}
149 149
150static int _find_add_string(void *fdt, const char *s) 150static int _fdt_find_add_string(void *fdt, const char *s)
151{ 151{
152 char *strtab = (char *)fdt + fdt_off_dt_strings(fdt); 152 char *strtab = (char *)fdt + fdt_off_dt_strings(fdt);
153 const char *p; 153 const char *p;
@@ -161,7 +161,7 @@ static int _find_add_string(void *fdt, const char *s)
161 return (p - strtab); 161 return (p - strtab);
162 162
163 new = strtab + fdt_size_dt_strings(fdt); 163 new = strtab + fdt_size_dt_strings(fdt);
164 err = _blob_splice_string(fdt, len); 164 err = _fdt_splice_string(fdt, len);
165 if (err) 165 if (err)
166 return err; 166 return err;
167 167
@@ -174,11 +174,10 @@ int fdt_add_mem_rsv(void *fdt, uint64_t address, uint64_t size)
174 struct fdt_reserve_entry *re; 174 struct fdt_reserve_entry *re;
175 int err; 175 int err;
176 176
177 if ((err = rw_check_header(fdt))) 177 FDT_RW_CHECK_HEADER(fdt);
178 return err;
179 178
180 re = _fdt_mem_rsv_w(fdt, fdt_num_mem_rsv(fdt)); 179 re = _fdt_mem_rsv_w(fdt, fdt_num_mem_rsv(fdt));
181 err = _blob_splice_mem_rsv(fdt, re, 0, 1); 180 err = _fdt_splice_mem_rsv(fdt, re, 0, 1);
182 if (err) 181 if (err)
183 return err; 182 return err;
184 183
@@ -192,19 +191,19 @@ int fdt_del_mem_rsv(void *fdt, int n)
192 struct fdt_reserve_entry *re = _fdt_mem_rsv_w(fdt, n); 191 struct fdt_reserve_entry *re = _fdt_mem_rsv_w(fdt, n);
193 int err; 192 int err;
194 193
195 if ((err = rw_check_header(fdt))) 194 FDT_RW_CHECK_HEADER(fdt);
196 return err; 195
197 if (n >= fdt_num_mem_rsv(fdt)) 196 if (n >= fdt_num_mem_rsv(fdt))
198 return -FDT_ERR_NOTFOUND; 197 return -FDT_ERR_NOTFOUND;
199 198
200 err = _blob_splice_mem_rsv(fdt, re, 1, 0); 199 err = _fdt_splice_mem_rsv(fdt, re, 1, 0);
201 if (err) 200 if (err)
202 return err; 201 return err;
203 return 0; 202 return 0;
204} 203}
205 204
206static int _resize_property(void *fdt, int nodeoffset, const char *name, int len, 205static int _fdt_resize_property(void *fdt, int nodeoffset, const char *name,
207 struct fdt_property **prop) 206 int len, struct fdt_property **prop)
208{ 207{
209 int oldlen; 208 int oldlen;
210 int err; 209 int err;
@@ -213,36 +212,33 @@ static int _resize_property(void *fdt, int nodeoffset, const char *name, int len
213 if (! (*prop)) 212 if (! (*prop))
214 return oldlen; 213 return oldlen;
215 214
216 if ((err = _blob_splice_struct(fdt, (*prop)->data, 215 if ((err = _fdt_splice_struct(fdt, (*prop)->data, FDT_TAGALIGN(oldlen),
217 ALIGN(oldlen, FDT_TAGSIZE), 216 FDT_TAGALIGN(len))))
218 ALIGN(len, FDT_TAGSIZE))))
219 return err; 217 return err;
220 218
221 (*prop)->len = cpu_to_fdt32(len); 219 (*prop)->len = cpu_to_fdt32(len);
222 return 0; 220 return 0;
223} 221}
224 222
225static int _add_property(void *fdt, int nodeoffset, const char *name, int len, 223static int _fdt_add_property(void *fdt, int nodeoffset, const char *name,
226 struct fdt_property **prop) 224 int len, struct fdt_property **prop)
227{ 225{
228 uint32_t tag;
229 int proplen; 226 int proplen;
230 int nextoffset; 227 int nextoffset;
231 int namestroff; 228 int namestroff;
232 int err; 229 int err;
233 230
234 tag = fdt_next_tag(fdt, nodeoffset, &nextoffset); 231 if ((nextoffset = _fdt_check_node_offset(fdt, nodeoffset)) < 0)
235 if (tag != FDT_BEGIN_NODE) 232 return nextoffset;
236 return -FDT_ERR_BADOFFSET;
237 233
238 namestroff = _find_add_string(fdt, name); 234 namestroff = _fdt_find_add_string(fdt, name);
239 if (namestroff < 0) 235 if (namestroff < 0)
240 return namestroff; 236 return namestroff;
241 237
242 *prop = _fdt_offset_ptr_w(fdt, nextoffset); 238 *prop = _fdt_offset_ptr_w(fdt, nextoffset);
243 proplen = sizeof(**prop) + ALIGN(len, FDT_TAGSIZE); 239 proplen = sizeof(**prop) + FDT_TAGALIGN(len);
244 240
245 err = _blob_splice_struct(fdt, *prop, 0, proplen); 241 err = _fdt_splice_struct(fdt, *prop, 0, proplen);
246 if (err) 242 if (err)
247 return err; 243 return err;
248 244
@@ -252,18 +248,40 @@ static int _add_property(void *fdt, int nodeoffset, const char *name, int len,
252 return 0; 248 return 0;
253} 249}
254 250
251int fdt_set_name(void *fdt, int nodeoffset, const char *name)
252{
253 char *namep;
254 int oldlen, newlen;
255 int err;
256
257 FDT_RW_CHECK_HEADER(fdt);
258
259 namep = (char *)(uintptr_t)fdt_get_name(fdt, nodeoffset, &oldlen);
260 if (!namep)
261 return oldlen;
262
263 newlen = strlen(name);
264
265 err = _fdt_splice_struct(fdt, namep, FDT_TAGALIGN(oldlen+1),
266 FDT_TAGALIGN(newlen+1));
267 if (err)
268 return err;
269
270 memcpy(namep, name, newlen+1);
271 return 0;
272}
273
255int fdt_setprop(void *fdt, int nodeoffset, const char *name, 274int fdt_setprop(void *fdt, int nodeoffset, const char *name,
256 const void *val, int len) 275 const void *val, int len)
257{ 276{
258 struct fdt_property *prop; 277 struct fdt_property *prop;
259 int err; 278 int err;
260 279
261 if ((err = rw_check_header(fdt))) 280 FDT_RW_CHECK_HEADER(fdt);
262 return err;
263 281
264 err = _resize_property(fdt, nodeoffset, name, len, &prop); 282 err = _fdt_resize_property(fdt, nodeoffset, name, len, &prop);
265 if (err == -FDT_ERR_NOTFOUND) 283 if (err == -FDT_ERR_NOTFOUND)
266 err = _add_property(fdt, nodeoffset, name, len, &prop); 284 err = _fdt_add_property(fdt, nodeoffset, name, len, &prop);
267 if (err) 285 if (err)
268 return err; 286 return err;
269 287
@@ -276,14 +294,14 @@ int fdt_delprop(void *fdt, int nodeoffset, const char *name)
276 struct fdt_property *prop; 294 struct fdt_property *prop;
277 int len, proplen; 295 int len, proplen;
278 296
279 RW_CHECK_HEADER(fdt); 297 FDT_RW_CHECK_HEADER(fdt);
280 298
281 prop = fdt_get_property_w(fdt, nodeoffset, name, &len); 299 prop = fdt_get_property_w(fdt, nodeoffset, name, &len);
282 if (! prop) 300 if (! prop)
283 return len; 301 return len;
284 302
285 proplen = sizeof(*prop) + ALIGN(len, FDT_TAGSIZE); 303 proplen = sizeof(*prop) + FDT_TAGALIGN(len);
286 return _blob_splice_struct(fdt, prop, proplen, 0); 304 return _fdt_splice_struct(fdt, prop, proplen, 0);
287} 305}
288 306
289int fdt_add_subnode_namelen(void *fdt, int parentoffset, 307int fdt_add_subnode_namelen(void *fdt, int parentoffset,
@@ -296,7 +314,7 @@ int fdt_add_subnode_namelen(void *fdt, int parentoffset,
296 uint32_t tag; 314 uint32_t tag;
297 uint32_t *endtag; 315 uint32_t *endtag;
298 316
299 RW_CHECK_HEADER(fdt); 317 FDT_RW_CHECK_HEADER(fdt);
300 318
301 offset = fdt_subnode_offset_namelen(fdt, parentoffset, name, namelen); 319 offset = fdt_subnode_offset_namelen(fdt, parentoffset, name, namelen);
302 if (offset >= 0) 320 if (offset >= 0)
@@ -309,19 +327,19 @@ int fdt_add_subnode_namelen(void *fdt, int parentoffset,
309 do { 327 do {
310 offset = nextoffset; 328 offset = nextoffset;
311 tag = fdt_next_tag(fdt, offset, &nextoffset); 329 tag = fdt_next_tag(fdt, offset, &nextoffset);
312 } while (tag == FDT_PROP); 330 } while ((tag == FDT_PROP) || (tag == FDT_NOP));
313 331
314 nh = _fdt_offset_ptr_w(fdt, offset); 332 nh = _fdt_offset_ptr_w(fdt, offset);
315 nodelen = sizeof(*nh) + ALIGN(namelen+1, FDT_TAGSIZE) + FDT_TAGSIZE; 333 nodelen = sizeof(*nh) + FDT_TAGALIGN(namelen+1) + FDT_TAGSIZE;
316 334
317 err = _blob_splice_struct(fdt, nh, 0, nodelen); 335 err = _fdt_splice_struct(fdt, nh, 0, nodelen);
318 if (err) 336 if (err)
319 return err; 337 return err;
320 338
321 nh->tag = cpu_to_fdt32(FDT_BEGIN_NODE); 339 nh->tag = cpu_to_fdt32(FDT_BEGIN_NODE);
322 memset(nh->name, 0, ALIGN(namelen+1, FDT_TAGSIZE)); 340 memset(nh->name, 0, FDT_TAGALIGN(namelen+1));
323 memcpy(nh->name, name, namelen); 341 memcpy(nh->name, name, namelen);
324 endtag = (uint32_t *)((void *)nh + nodelen - FDT_TAGSIZE); 342 endtag = (uint32_t *)((char *)nh + nodelen - FDT_TAGSIZE);
325 *endtag = cpu_to_fdt32(FDT_END_NODE); 343 *endtag = cpu_to_fdt32(FDT_END_NODE);
326 344
327 return offset; 345 return offset;
@@ -336,36 +354,36 @@ int fdt_del_node(void *fdt, int nodeoffset)
336{ 354{
337 int endoffset; 355 int endoffset;
338 356
339 RW_CHECK_HEADER(fdt); 357 FDT_RW_CHECK_HEADER(fdt);
340 358
341 endoffset = _fdt_node_end_offset(fdt, nodeoffset); 359 endoffset = _fdt_node_end_offset(fdt, nodeoffset);
342 if (endoffset < 0) 360 if (endoffset < 0)
343 return endoffset; 361 return endoffset;
344 362
345 return _blob_splice_struct(fdt, _fdt_offset_ptr_w(fdt, nodeoffset), 363 return _fdt_splice_struct(fdt, _fdt_offset_ptr_w(fdt, nodeoffset),
346 endoffset - nodeoffset, 0); 364 endoffset - nodeoffset, 0);
347} 365}
348 366
349static void _packblocks(const void *fdt, void *buf, 367static void _fdt_packblocks(const char *old, char *new,
350 int mem_rsv_size, int struct_size) 368 int mem_rsv_size, int struct_size)
351{ 369{
352 int mem_rsv_off, struct_off, strings_off; 370 int mem_rsv_off, struct_off, strings_off;
353 371
354 mem_rsv_off = ALIGN(sizeof(struct fdt_header), 8); 372 mem_rsv_off = FDT_ALIGN(sizeof(struct fdt_header), 8);
355 struct_off = mem_rsv_off + mem_rsv_size; 373 struct_off = mem_rsv_off + mem_rsv_size;
356 strings_off = struct_off + struct_size; 374 strings_off = struct_off + struct_size;
357 375
358 memmove(buf + mem_rsv_off, fdt + fdt_off_mem_rsvmap(fdt), mem_rsv_size); 376 memmove(new + mem_rsv_off, old + fdt_off_mem_rsvmap(old), mem_rsv_size);
359 fdt_set_off_mem_rsvmap(buf, mem_rsv_off); 377 fdt_set_off_mem_rsvmap(new, mem_rsv_off);
360 378
361 memmove(buf + struct_off, fdt + fdt_off_dt_struct(fdt), struct_size); 379 memmove(new + struct_off, old + fdt_off_dt_struct(old), struct_size);
362 fdt_set_off_dt_struct(buf, struct_off); 380 fdt_set_off_dt_struct(new, struct_off);
363 fdt_set_size_dt_struct(buf, struct_size); 381 fdt_set_size_dt_struct(new, struct_size);
364 382
365 memmove(buf + strings_off, fdt + fdt_off_dt_strings(fdt), 383 memmove(new + strings_off, old + fdt_off_dt_strings(old),
366 fdt_size_dt_strings(fdt)); 384 fdt_size_dt_strings(old));
367 fdt_set_off_dt_strings(buf, strings_off); 385 fdt_set_off_dt_strings(new, strings_off);
368 fdt_set_size_dt_strings(buf, fdt_size_dt_strings(fdt)); 386 fdt_set_size_dt_strings(new, fdt_size_dt_strings(old));
369} 387}
370 388
371int fdt_open_into(const void *fdt, void *buf, int bufsize) 389int fdt_open_into(const void *fdt, void *buf, int bufsize)
@@ -373,11 +391,11 @@ int fdt_open_into(const void *fdt, void *buf, int bufsize)
373 int err; 391 int err;
374 int mem_rsv_size, struct_size; 392 int mem_rsv_size, struct_size;
375 int newsize; 393 int newsize;
376 void *tmp; 394 const char *fdtstart = fdt;
395 const char *fdtend = fdtstart + fdt_totalsize(fdt);
396 char *tmp;
377 397
378 err = fdt_check_header(fdt); 398 FDT_CHECK_HEADER(fdt);
379 if (err)
380 return err;
381 399
382 mem_rsv_size = (fdt_num_mem_rsv(fdt)+1) 400 mem_rsv_size = (fdt_num_mem_rsv(fdt)+1)
383 * sizeof(struct fdt_reserve_entry); 401 * sizeof(struct fdt_reserve_entry);
@@ -390,7 +408,7 @@ int fdt_open_into(const void *fdt, void *buf, int bufsize)
390 ; 408 ;
391 } 409 }
392 410
393 if (!_blocks_misordered(fdt, mem_rsv_size, struct_size)) { 411 if (!_fdt_blocks_misordered(fdt, mem_rsv_size, struct_size)) {
394 /* no further work necessary */ 412 /* no further work necessary */
395 err = fdt_move(fdt, buf, bufsize); 413 err = fdt_move(fdt, buf, bufsize);
396 if (err) 414 if (err)
@@ -402,22 +420,23 @@ int fdt_open_into(const void *fdt, void *buf, int bufsize)
402 } 420 }
403 421
404 /* Need to reorder */ 422 /* Need to reorder */
405 newsize = ALIGN(sizeof(struct fdt_header), 8) + mem_rsv_size 423 newsize = FDT_ALIGN(sizeof(struct fdt_header), 8) + mem_rsv_size
406 + struct_size + fdt_size_dt_strings(fdt); 424 + struct_size + fdt_size_dt_strings(fdt);
407 425
408 if (bufsize < newsize) 426 if (bufsize < newsize)
409 return -FDT_ERR_NOSPACE; 427 return -FDT_ERR_NOSPACE;
410 428
411 if (((buf + newsize) <= fdt) 429 /* First attempt to build converted tree at beginning of buffer */
412 || (buf >= (fdt + fdt_totalsize(fdt)))) { 430 tmp = buf;
413 tmp = buf; 431 /* But if that overlaps with the old tree... */
414 } else { 432 if (((tmp + newsize) > fdtstart) && (tmp < fdtend)) {
415 tmp = (void *)fdt + fdt_totalsize(fdt); 433 /* Try right after the old tree instead */
416 if ((tmp + newsize) > (buf + bufsize)) 434 tmp = (char *)(uintptr_t)fdtend;
435 if ((tmp + newsize) > ((char *)buf + bufsize))
417 return -FDT_ERR_NOSPACE; 436 return -FDT_ERR_NOSPACE;
418 } 437 }
419 438
420 _packblocks(fdt, tmp, mem_rsv_size, struct_size); 439 _fdt_packblocks(fdt, tmp, mem_rsv_size, struct_size);
421 memmove(buf, tmp, newsize); 440 memmove(buf, tmp, newsize);
422 441
423 fdt_set_magic(buf, FDT_MAGIC); 442 fdt_set_magic(buf, FDT_MAGIC);
@@ -432,16 +451,13 @@ int fdt_open_into(const void *fdt, void *buf, int bufsize)
432int fdt_pack(void *fdt) 451int fdt_pack(void *fdt)
433{ 452{
434 int mem_rsv_size; 453 int mem_rsv_size;
435 int err;
436 454
437 err = rw_check_header(fdt); 455 FDT_RW_CHECK_HEADER(fdt);
438 if (err)
439 return err;
440 456
441 mem_rsv_size = (fdt_num_mem_rsv(fdt)+1) 457 mem_rsv_size = (fdt_num_mem_rsv(fdt)+1)
442 * sizeof(struct fdt_reserve_entry); 458 * sizeof(struct fdt_reserve_entry);
443 _packblocks(fdt, fdt, mem_rsv_size, fdt_size_dt_struct(fdt)); 459 _fdt_packblocks(fdt, fdt, mem_rsv_size, fdt_size_dt_struct(fdt));
444 fdt_set_totalsize(fdt, _blob_data_size(fdt)); 460 fdt_set_totalsize(fdt, _fdt_data_size(fdt));
445 461
446 return 0; 462 return 0;
447} 463}
diff --git a/arch/powerpc/boot/libfdt/fdt_strerror.c b/arch/powerpc/boot/libfdt/fdt_strerror.c
index f9d32ef5360a..e6c3ceee8c58 100644
--- a/arch/powerpc/boot/libfdt/fdt_strerror.c
+++ b/arch/powerpc/boot/libfdt/fdt_strerror.c
@@ -55,29 +55,29 @@
55 55
56#include "libfdt_internal.h" 56#include "libfdt_internal.h"
57 57
58struct errtabent { 58struct fdt_errtabent {
59 const char *str; 59 const char *str;
60}; 60};
61 61
62#define ERRTABENT(val) \ 62#define FDT_ERRTABENT(val) \
63 [(val)] = { .str = #val, } 63 [(val)] = { .str = #val, }
64 64
65static struct errtabent errtable[] = { 65static struct fdt_errtabent fdt_errtable[] = {
66 ERRTABENT(FDT_ERR_NOTFOUND), 66 FDT_ERRTABENT(FDT_ERR_NOTFOUND),
67 ERRTABENT(FDT_ERR_EXISTS), 67 FDT_ERRTABENT(FDT_ERR_EXISTS),
68 ERRTABENT(FDT_ERR_NOSPACE), 68 FDT_ERRTABENT(FDT_ERR_NOSPACE),
69 69
70 ERRTABENT(FDT_ERR_BADOFFSET), 70 FDT_ERRTABENT(FDT_ERR_BADOFFSET),
71 ERRTABENT(FDT_ERR_BADPATH), 71 FDT_ERRTABENT(FDT_ERR_BADPATH),
72 ERRTABENT(FDT_ERR_BADSTATE), 72 FDT_ERRTABENT(FDT_ERR_BADSTATE),
73 73
74 ERRTABENT(FDT_ERR_TRUNCATED), 74 FDT_ERRTABENT(FDT_ERR_TRUNCATED),
75 ERRTABENT(FDT_ERR_BADMAGIC), 75 FDT_ERRTABENT(FDT_ERR_BADMAGIC),
76 ERRTABENT(FDT_ERR_BADVERSION), 76 FDT_ERRTABENT(FDT_ERR_BADVERSION),
77 ERRTABENT(FDT_ERR_BADSTRUCTURE), 77 FDT_ERRTABENT(FDT_ERR_BADSTRUCTURE),
78 ERRTABENT(FDT_ERR_BADLAYOUT), 78 FDT_ERRTABENT(FDT_ERR_BADLAYOUT),
79}; 79};
80#define ERRTABSIZE (sizeof(errtable) / sizeof(errtable[0])) 80#define FDT_ERRTABSIZE (sizeof(fdt_errtable) / sizeof(fdt_errtable[0]))
81 81
82const char *fdt_strerror(int errval) 82const char *fdt_strerror(int errval)
83{ 83{
@@ -85,8 +85,8 @@ const char *fdt_strerror(int errval)
85 return "<valid offset/length>"; 85 return "<valid offset/length>";
86 else if (errval == 0) 86 else if (errval == 0)
87 return "<no error>"; 87 return "<no error>";
88 else if (errval > -ERRTABSIZE) { 88 else if (errval > -FDT_ERRTABSIZE) {
89 const char *s = errtable[-errval].str; 89 const char *s = fdt_errtable[-errval].str;
90 90
91 if (s) 91 if (s)
92 return s; 92 return s;
diff --git a/arch/powerpc/boot/libfdt/fdt_sw.c b/arch/powerpc/boot/libfdt/fdt_sw.c
index dda2de34b2e0..698329e0ccaf 100644
--- a/arch/powerpc/boot/libfdt/fdt_sw.c
+++ b/arch/powerpc/boot/libfdt/fdt_sw.c
@@ -55,14 +55,22 @@
55 55
56#include "libfdt_internal.h" 56#include "libfdt_internal.h"
57 57
58static int check_header_sw(void *fdt) 58static int _fdt_sw_check_header(void *fdt)
59{ 59{
60 if (fdt_magic(fdt) != SW_MAGIC) 60 if (fdt_magic(fdt) != FDT_SW_MAGIC)
61 return -FDT_ERR_BADMAGIC; 61 return -FDT_ERR_BADMAGIC;
62 /* FIXME: should check more details about the header state */
62 return 0; 63 return 0;
63} 64}
64 65
65static void *grab_space(void *fdt, int len) 66#define FDT_SW_CHECK_HEADER(fdt) \
67 { \
68 int err; \
69 if ((err = _fdt_sw_check_header(fdt)) != 0) \
70 return err; \
71 }
72
73static void *_fdt_grab_space(void *fdt, int len)
66{ 74{
67 int offset = fdt_size_dt_struct(fdt); 75 int offset = fdt_size_dt_struct(fdt);
68 int spaceleft; 76 int spaceleft;
@@ -86,13 +94,13 @@ int fdt_create(void *buf, int bufsize)
86 94
87 memset(buf, 0, bufsize); 95 memset(buf, 0, bufsize);
88 96
89 fdt_set_magic(fdt, SW_MAGIC); 97 fdt_set_magic(fdt, FDT_SW_MAGIC);
90 fdt_set_version(fdt, FDT_LAST_SUPPORTED_VERSION); 98 fdt_set_version(fdt, FDT_LAST_SUPPORTED_VERSION);
91 fdt_set_last_comp_version(fdt, FDT_FIRST_SUPPORTED_VERSION); 99 fdt_set_last_comp_version(fdt, FDT_FIRST_SUPPORTED_VERSION);
92 fdt_set_totalsize(fdt, bufsize); 100 fdt_set_totalsize(fdt, bufsize);
93 101
94 fdt_set_off_mem_rsvmap(fdt, ALIGN(sizeof(struct fdt_header), 102 fdt_set_off_mem_rsvmap(fdt, FDT_ALIGN(sizeof(struct fdt_header),
95 sizeof(struct fdt_reserve_entry))); 103 sizeof(struct fdt_reserve_entry)));
96 fdt_set_off_dt_struct(fdt, fdt_off_mem_rsvmap(fdt)); 104 fdt_set_off_dt_struct(fdt, fdt_off_mem_rsvmap(fdt));
97 fdt_set_off_dt_strings(fdt, bufsize); 105 fdt_set_off_dt_strings(fdt, bufsize);
98 106
@@ -102,11 +110,10 @@ int fdt_create(void *buf, int bufsize)
102int fdt_add_reservemap_entry(void *fdt, uint64_t addr, uint64_t size) 110int fdt_add_reservemap_entry(void *fdt, uint64_t addr, uint64_t size)
103{ 111{
104 struct fdt_reserve_entry *re; 112 struct fdt_reserve_entry *re;
105 int err = check_header_sw(fdt);
106 int offset; 113 int offset;
107 114
108 if (err) 115 FDT_SW_CHECK_HEADER(fdt);
109 return err; 116
110 if (fdt_size_dt_struct(fdt)) 117 if (fdt_size_dt_struct(fdt))
111 return -FDT_ERR_BADSTATE; 118 return -FDT_ERR_BADSTATE;
112 119
@@ -114,7 +121,7 @@ int fdt_add_reservemap_entry(void *fdt, uint64_t addr, uint64_t size)
114 if ((offset + sizeof(*re)) > fdt_totalsize(fdt)) 121 if ((offset + sizeof(*re)) > fdt_totalsize(fdt))
115 return -FDT_ERR_NOSPACE; 122 return -FDT_ERR_NOSPACE;
116 123
117 re = (struct fdt_reserve_entry *)(fdt + offset); 124 re = (struct fdt_reserve_entry *)((char *)fdt + offset);
118 re->address = cpu_to_fdt64(addr); 125 re->address = cpu_to_fdt64(addr);
119 re->size = cpu_to_fdt64(size); 126 re->size = cpu_to_fdt64(size);
120 127
@@ -131,13 +138,11 @@ int fdt_finish_reservemap(void *fdt)
131int fdt_begin_node(void *fdt, const char *name) 138int fdt_begin_node(void *fdt, const char *name)
132{ 139{
133 struct fdt_node_header *nh; 140 struct fdt_node_header *nh;
134 int err = check_header_sw(fdt);
135 int namelen = strlen(name) + 1; 141 int namelen = strlen(name) + 1;
136 142
137 if (err) 143 FDT_SW_CHECK_HEADER(fdt);
138 return err;
139 144
140 nh = grab_space(fdt, sizeof(*nh) + ALIGN(namelen, FDT_TAGSIZE)); 145 nh = _fdt_grab_space(fdt, sizeof(*nh) + FDT_TAGALIGN(namelen));
141 if (! nh) 146 if (! nh)
142 return -FDT_ERR_NOSPACE; 147 return -FDT_ERR_NOSPACE;
143 148
@@ -149,12 +154,10 @@ int fdt_begin_node(void *fdt, const char *name)
149int fdt_end_node(void *fdt) 154int fdt_end_node(void *fdt)
150{ 155{
151 uint32_t *en; 156 uint32_t *en;
152 int err = check_header_sw(fdt);
153 157
154 if (err) 158 FDT_SW_CHECK_HEADER(fdt);
155 return err;
156 159
157 en = grab_space(fdt, FDT_TAGSIZE); 160 en = _fdt_grab_space(fdt, FDT_TAGSIZE);
158 if (! en) 161 if (! en)
159 return -FDT_ERR_NOSPACE; 162 return -FDT_ERR_NOSPACE;
160 163
@@ -162,7 +165,7 @@ int fdt_end_node(void *fdt)
162 return 0; 165 return 0;
163} 166}
164 167
165static int find_add_string(void *fdt, const char *s) 168static int _fdt_find_add_string(void *fdt, const char *s)
166{ 169{
167 char *strtab = (char *)fdt + fdt_totalsize(fdt); 170 char *strtab = (char *)fdt + fdt_totalsize(fdt);
168 const char *p; 171 const char *p;
@@ -188,17 +191,15 @@ static int find_add_string(void *fdt, const char *s)
188int fdt_property(void *fdt, const char *name, const void *val, int len) 191int fdt_property(void *fdt, const char *name, const void *val, int len)
189{ 192{
190 struct fdt_property *prop; 193 struct fdt_property *prop;
191 int err = check_header_sw(fdt);
192 int nameoff; 194 int nameoff;
193 195
194 if (err) 196 FDT_SW_CHECK_HEADER(fdt);
195 return err;
196 197
197 nameoff = find_add_string(fdt, name); 198 nameoff = _fdt_find_add_string(fdt, name);
198 if (nameoff == 0) 199 if (nameoff == 0)
199 return -FDT_ERR_NOSPACE; 200 return -FDT_ERR_NOSPACE;
200 201
201 prop = grab_space(fdt, sizeof(*prop) + ALIGN(len, FDT_TAGSIZE)); 202 prop = _fdt_grab_space(fdt, sizeof(*prop) + FDT_TAGALIGN(len));
202 if (! prop) 203 if (! prop)
203 return -FDT_ERR_NOSPACE; 204 return -FDT_ERR_NOSPACE;
204 205
@@ -211,18 +212,16 @@ int fdt_property(void *fdt, const char *name, const void *val, int len)
211 212
212int fdt_finish(void *fdt) 213int fdt_finish(void *fdt)
213{ 214{
214 int err = check_header_sw(fdt);
215 char *p = (char *)fdt; 215 char *p = (char *)fdt;
216 uint32_t *end; 216 uint32_t *end;
217 int oldstroffset, newstroffset; 217 int oldstroffset, newstroffset;
218 uint32_t tag; 218 uint32_t tag;
219 int offset, nextoffset; 219 int offset, nextoffset;
220 220
221 if (err) 221 FDT_SW_CHECK_HEADER(fdt);
222 return err;
223 222
224 /* Add terminator */ 223 /* Add terminator */
225 end = grab_space(fdt, sizeof(*end)); 224 end = _fdt_grab_space(fdt, sizeof(*end));
226 if (! end) 225 if (! end)
227 return -FDT_ERR_NOSPACE; 226 return -FDT_ERR_NOSPACE;
228 *end = cpu_to_fdt32(FDT_END); 227 *end = cpu_to_fdt32(FDT_END);
diff --git a/arch/powerpc/boot/libfdt/fdt_wip.c b/arch/powerpc/boot/libfdt/fdt_wip.c
index 88e24b8318f4..a4652c6e787e 100644
--- a/arch/powerpc/boot/libfdt/fdt_wip.c
+++ b/arch/powerpc/boot/libfdt/fdt_wip.c
@@ -72,11 +72,11 @@ int fdt_setprop_inplace(void *fdt, int nodeoffset, const char *name,
72 return 0; 72 return 0;
73} 73}
74 74
75static void nop_region(void *start, int len) 75static void _fdt_nop_region(void *start, int len)
76{ 76{
77 uint32_t *p; 77 uint32_t *p;
78 78
79 for (p = start; (void *)p < (start + len); p++) 79 for (p = start; (char *)p < ((char *)start + len); p++)
80 *p = cpu_to_fdt32(FDT_NOP); 80 *p = cpu_to_fdt32(FDT_NOP);
81} 81}
82 82
@@ -89,7 +89,7 @@ int fdt_nop_property(void *fdt, int nodeoffset, const char *name)
89 if (! prop) 89 if (! prop)
90 return len; 90 return len;
91 91
92 nop_region(prop, len + sizeof(*prop)); 92 _fdt_nop_region(prop, len + sizeof(*prop));
93 93
94 return 0; 94 return 0;
95} 95}
@@ -139,6 +139,7 @@ int fdt_nop_node(void *fdt, int nodeoffset)
139 if (endoffset < 0) 139 if (endoffset < 0)
140 return endoffset; 140 return endoffset;
141 141
142 nop_region(fdt_offset_ptr_w(fdt, nodeoffset, 0), endoffset - nodeoffset); 142 _fdt_nop_region(fdt_offset_ptr_w(fdt, nodeoffset, 0),
143 endoffset - nodeoffset);
143 return 0; 144 return 0;
144} 145}
diff --git a/arch/powerpc/boot/libfdt/libfdt.h b/arch/powerpc/boot/libfdt/libfdt.h
index 6b2fb92ea357..ce80e4fb41b2 100644
--- a/arch/powerpc/boot/libfdt/libfdt.h
+++ b/arch/powerpc/boot/libfdt/libfdt.h
@@ -125,12 +125,18 @@
125const void *fdt_offset_ptr(const void *fdt, int offset, int checklen); 125const void *fdt_offset_ptr(const void *fdt, int offset, int checklen);
126static inline void *fdt_offset_ptr_w(void *fdt, int offset, int checklen) 126static inline void *fdt_offset_ptr_w(void *fdt, int offset, int checklen)
127{ 127{
128 return (void *)fdt_offset_ptr(fdt, offset, checklen); 128 return (void *)(uintptr_t)fdt_offset_ptr(fdt, offset, checklen);
129} 129}
130 130
131uint32_t fdt_next_tag(const void *fdt, int offset, int *nextoffset); 131uint32_t fdt_next_tag(const void *fdt, int offset, int *nextoffset);
132 132
133/**********************************************************************/ 133/**********************************************************************/
134/* Traversal functions */
135/**********************************************************************/
136
137int fdt_next_node(const void *fdt, int offset, int *depth);
138
139/**********************************************************************/
134/* General functions */ 140/* General functions */
135/**********************************************************************/ 141/**********************************************************************/
136 142
@@ -207,7 +213,7 @@ int fdt_move(const void *fdt, void *buf, int bufsize);
207/**********************************************************************/ 213/**********************************************************************/
208 214
209/** 215/**
210 * fdt_string - retreive a string from the strings block of a device tree 216 * fdt_string - retrieve a string from the strings block of a device tree
211 * @fdt: pointer to the device tree blob 217 * @fdt: pointer to the device tree blob
212 * @stroffset: offset of the string within the strings block (native endian) 218 * @stroffset: offset of the string within the strings block (native endian)
213 * 219 *
@@ -221,7 +227,7 @@ int fdt_move(const void *fdt, void *buf, int bufsize);
221const char *fdt_string(const void *fdt, int stroffset); 227const char *fdt_string(const void *fdt, int stroffset);
222 228
223/** 229/**
224 * fdt_num_mem_rsv - retreive the number of memory reserve map entries 230 * fdt_num_mem_rsv - retrieve the number of memory reserve map entries
225 * @fdt: pointer to the device tree blob 231 * @fdt: pointer to the device tree blob
226 * 232 *
227 * Returns the number of entries in the device tree blob's memory 233 * Returns the number of entries in the device tree blob's memory
@@ -234,7 +240,7 @@ const char *fdt_string(const void *fdt, int stroffset);
234int fdt_num_mem_rsv(const void *fdt); 240int fdt_num_mem_rsv(const void *fdt);
235 241
236/** 242/**
237 * fdt_get_mem_rsv - retreive one memory reserve map entry 243 * fdt_get_mem_rsv - retrieve one memory reserve map entry
238 * @fdt: pointer to the device tree blob 244 * @fdt: pointer to the device tree blob
239 * @address, @size: pointers to 64-bit variables 245 * @address, @size: pointers to 64-bit variables
240 * 246 *
@@ -314,7 +320,7 @@ int fdt_subnode_offset(const void *fdt, int parentoffset, const char *name);
314int fdt_path_offset(const void *fdt, const char *path); 320int fdt_path_offset(const void *fdt, const char *path);
315 321
316/** 322/**
317 * fdt_get_name - retreive the name of a given node 323 * fdt_get_name - retrieve the name of a given node
318 * @fdt: pointer to the device tree blob 324 * @fdt: pointer to the device tree blob
319 * @nodeoffset: structure block offset of the starting node 325 * @nodeoffset: structure block offset of the starting node
320 * @lenp: pointer to an integer variable (will be overwritten) or NULL 326 * @lenp: pointer to an integer variable (will be overwritten) or NULL
@@ -346,7 +352,7 @@ const char *fdt_get_name(const void *fdt, int nodeoffset, int *lenp);
346 * fdt_get_property() retrieves a pointer to the fdt_property 352 * fdt_get_property() retrieves a pointer to the fdt_property
347 * structure within the device tree blob corresponding to the property 353 * structure within the device tree blob corresponding to the property
348 * named 'name' of the node at offset nodeoffset. If lenp is 354 * named 'name' of the node at offset nodeoffset. If lenp is
349 * non-NULL, the length of the property value also returned, in the 355 * non-NULL, the length of the property value is also returned, in the
350 * integer pointed to by lenp. 356 * integer pointed to by lenp.
351 * 357 *
352 * returns: 358 * returns:
@@ -369,8 +375,8 @@ static inline struct fdt_property *fdt_get_property_w(void *fdt, int nodeoffset,
369 const char *name, 375 const char *name,
370 int *lenp) 376 int *lenp)
371{ 377{
372 return (struct fdt_property *)fdt_get_property(fdt, nodeoffset, 378 return (struct fdt_property *)(uintptr_t)
373 name, lenp); 379 fdt_get_property(fdt, nodeoffset, name, lenp);
374} 380}
375 381
376/** 382/**
@@ -383,7 +389,7 @@ static inline struct fdt_property *fdt_get_property_w(void *fdt, int nodeoffset,
383 * fdt_getprop() retrieves a pointer to the value of the property 389 * fdt_getprop() retrieves a pointer to the value of the property
384 * named 'name' of the node at offset nodeoffset (this will be a 390 * named 'name' of the node at offset nodeoffset (this will be a
385 * pointer to within the device blob itself, not a copy of the value). 391 * pointer to within the device blob itself, not a copy of the value).
386 * If lenp is non-NULL, the length of the property value also 392 * If lenp is non-NULL, the length of the property value is also
387 * returned, in the integer pointed to by lenp. 393 * returned, in the integer pointed to by lenp.
388 * 394 *
389 * returns: 395 * returns:
@@ -405,11 +411,11 @@ const void *fdt_getprop(const void *fdt, int nodeoffset,
405static inline void *fdt_getprop_w(void *fdt, int nodeoffset, 411static inline void *fdt_getprop_w(void *fdt, int nodeoffset,
406 const char *name, int *lenp) 412 const char *name, int *lenp)
407{ 413{
408 return (void *)fdt_getprop(fdt, nodeoffset, name, lenp); 414 return (void *)(uintptr_t)fdt_getprop(fdt, nodeoffset, name, lenp);
409} 415}
410 416
411/** 417/**
412 * fdt_get_phandle - retreive the phandle of a given node 418 * fdt_get_phandle - retrieve the phandle of a given node
413 * @fdt: pointer to the device tree blob 419 * @fdt: pointer to the device tree blob
414 * @nodeoffset: structure block offset of the node 420 * @nodeoffset: structure block offset of the node
415 * 421 *
@@ -417,7 +423,7 @@ static inline void *fdt_getprop_w(void *fdt, int nodeoffset,
417 * structure block offset nodeoffset. 423 * structure block offset nodeoffset.
418 * 424 *
419 * returns: 425 * returns:
420 * the phandle of the node at nodeoffset, on succes (!= 0, != -1) 426 * the phandle of the node at nodeoffset, on success (!= 0, != -1)
421 * 0, if the node has no phandle, or another error occurs 427 * 0, if the node has no phandle, or another error occurs
422 */ 428 */
423uint32_t fdt_get_phandle(const void *fdt, int nodeoffset); 429uint32_t fdt_get_phandle(const void *fdt, int nodeoffset);
@@ -516,7 +522,7 @@ int fdt_node_depth(const void *fdt, int nodeoffset);
516 * structure from the start to nodeoffset, *twice*. 522 * structure from the start to nodeoffset, *twice*.
517 * 523 *
518 * returns: 524 * returns:
519 * stucture block offset of the parent of the node at nodeoffset 525 * structure block offset of the parent of the node at nodeoffset
520 * (>=0), on success 526 * (>=0), on success
521 * -FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag 527 * -FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
522 * -FDT_ERR_BADMAGIC, 528 * -FDT_ERR_BADMAGIC,
@@ -573,7 +579,7 @@ int fdt_node_offset_by_prop_value(const void *fdt, int startoffset,
573 * @fdt: pointer to the device tree blob 579 * @fdt: pointer to the device tree blob
574 * @phandle: phandle value 580 * @phandle: phandle value
575 * 581 *
576 * fdt_node_offset_by_prop_value() returns the offset of the node 582 * fdt_node_offset_by_phandle() returns the offset of the node
577 * which has the given phandle value. If there is more than one node 583 * which has the given phandle value. If there is more than one node
578 * in the tree with the given phandle (an invalid tree), results are 584 * in the tree with the given phandle (an invalid tree), results are
579 * undefined. 585 * undefined.
@@ -655,8 +661,65 @@ int fdt_node_offset_by_compatible(const void *fdt, int startoffset,
655/* Write-in-place functions */ 661/* Write-in-place functions */
656/**********************************************************************/ 662/**********************************************************************/
657 663
664/**
665 * fdt_setprop_inplace - change a property's value, but not its size
666 * @fdt: pointer to the device tree blob
667 * @nodeoffset: offset of the node whose property to change
668 * @name: name of the property to change
669 * @val: pointer to data to replace the property value with
670 * @len: length of the property value
671 *
672 * fdt_setprop_inplace() replaces the value of a given property with
673 * the data in val, of length len. This function cannot change the
674 * size of a property, and so will only work if len is equal to the
675 * current length of the property.
676 *
677 * This function will alter only the bytes in the blob which contain
678 * the given property value, and will not alter or move any other part
679 * of the tree.
680 *
681 * returns:
682 * 0, on success
683 * -FDT_ERR_NOSPACE, if len is not equal to the property's current length
684 * -FDT_ERR_NOTFOUND, node does not have the named property
685 * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
686 * -FDT_ERR_BADMAGIC,
687 * -FDT_ERR_BADVERSION,
688 * -FDT_ERR_BADSTATE,
689 * -FDT_ERR_BADSTRUCTURE,
690 * -FDT_ERR_TRUNCATED, standard meanings
691 */
658int fdt_setprop_inplace(void *fdt, int nodeoffset, const char *name, 692int fdt_setprop_inplace(void *fdt, int nodeoffset, const char *name,
659 const void *val, int len); 693 const void *val, int len);
694
695/**
696 * fdt_setprop_inplace_cell - change the value of a single-cell property
697 * @fdt: pointer to the device tree blob
698 * @nodeoffset: offset of the node whose property to change
699 * @name: name of the property to change
700 * @val: cell (32-bit integer) value to replace the property with
701 *
702 * fdt_setprop_inplace_cell() replaces the value of a given property
703 * with the 32-bit integer cell value in val, converting val to
704 * big-endian if necessary. This function cannot change the size of a
705 * property, and so will only work if the property already exists and
706 * has length 4.
707 *
708 * This function will alter only the bytes in the blob which contain
709 * the given property value, and will not alter or move any other part
710 * of the tree.
711 *
712 * returns:
713 * 0, on success
714 * -FDT_ERR_NOSPACE, if the property's length is not equal to 4
715 * -FDT_ERR_NOTFOUND, node does not have the named property
716 * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
717 * -FDT_ERR_BADMAGIC,
718 * -FDT_ERR_BADVERSION,
719 * -FDT_ERR_BADSTATE,
720 * -FDT_ERR_BADSTRUCTURE,
721 * -FDT_ERR_TRUNCATED, standard meanings
722 */
660static inline int fdt_setprop_inplace_cell(void *fdt, int nodeoffset, 723static inline int fdt_setprop_inplace_cell(void *fdt, int nodeoffset,
661 const char *name, uint32_t val) 724 const char *name, uint32_t val)
662{ 725{
@@ -664,7 +727,54 @@ static inline int fdt_setprop_inplace_cell(void *fdt, int nodeoffset,
664 return fdt_setprop_inplace(fdt, nodeoffset, name, &val, sizeof(val)); 727 return fdt_setprop_inplace(fdt, nodeoffset, name, &val, sizeof(val));
665} 728}
666 729
730/**
731 * fdt_nop_property - replace a property with nop tags
732 * @fdt: pointer to the device tree blob
733 * @nodeoffset: offset of the node whose property to nop
734 * @name: name of the property to nop
735 *
736 * fdt_nop_property() will replace a given property's representation
737 * in the blob with FDT_NOP tags, effectively removing it from the
738 * tree.
739 *
740 * This function will alter only the bytes in the blob which contain
741 * the property, and will not alter or move any other part of the
742 * tree.
743 *
744 * returns:
745 * 0, on success
746 * -FDT_ERR_NOTFOUND, node does not have the named property
747 * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
748 * -FDT_ERR_BADMAGIC,
749 * -FDT_ERR_BADVERSION,
750 * -FDT_ERR_BADSTATE,
751 * -FDT_ERR_BADSTRUCTURE,
752 * -FDT_ERR_TRUNCATED, standard meanings
753 */
667int fdt_nop_property(void *fdt, int nodeoffset, const char *name); 754int fdt_nop_property(void *fdt, int nodeoffset, const char *name);
755
756/**
757 * fdt_nop_node - replace a node (subtree) with nop tags
758 * @fdt: pointer to the device tree blob
759 * @nodeoffset: offset of the node to nop
760 *
761 * fdt_nop_node() will replace a given node's representation in the
762 * blob, including all its subnodes, if any, with FDT_NOP tags,
763 * effectively removing it from the tree.
764 *
765 * This function will alter only the bytes in the blob which contain
766 * the node and its properties and subnodes, and will not alter or
767 * move any other part of the tree.
768 *
769 * returns:
770 * 0, on success
771 * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
772 * -FDT_ERR_BADMAGIC,
773 * -FDT_ERR_BADVERSION,
774 * -FDT_ERR_BADSTATE,
775 * -FDT_ERR_BADSTRUCTURE,
776 * -FDT_ERR_TRUNCATED, standard meanings
777 */
668int fdt_nop_node(void *fdt, int nodeoffset); 778int fdt_nop_node(void *fdt, int nodeoffset);
669 779
670/**********************************************************************/ 780/**********************************************************************/
@@ -693,23 +803,268 @@ int fdt_finish(void *fdt);
693int fdt_open_into(const void *fdt, void *buf, int bufsize); 803int fdt_open_into(const void *fdt, void *buf, int bufsize);
694int fdt_pack(void *fdt); 804int fdt_pack(void *fdt);
695 805
806/**
807 * fdt_add_mem_rsv - add one memory reserve map entry
808 * @fdt: pointer to the device tree blob
809 * @address, @size: 64-bit values (native endian)
810 *
811 * Adds a reserve map entry to the given blob reserving a region at
812 * address address of length size.
813 *
814 * This function will insert data into the reserve map and will
815 * therefore change the indexes of some entries in the table.
816 *
817 * returns:
818 * 0, on success
819 * -FDT_ERR_NOSPACE, there is insufficient free space in the blob to
820 * contain the new reservation entry
821 * -FDT_ERR_BADMAGIC,
822 * -FDT_ERR_BADVERSION,
823 * -FDT_ERR_BADSTATE,
824 * -FDT_ERR_BADSTRUCTURE,
825 * -FDT_ERR_BADLAYOUT,
826 * -FDT_ERR_TRUNCATED, standard meanings
827 */
696int fdt_add_mem_rsv(void *fdt, uint64_t address, uint64_t size); 828int fdt_add_mem_rsv(void *fdt, uint64_t address, uint64_t size);
829
830/**
831 * fdt_del_mem_rsv - remove a memory reserve map entry
832 * @fdt: pointer to the device tree blob
833 * @n: entry to remove
834 *
835 * fdt_del_mem_rsv() removes the n-th memory reserve map entry from
836 * the blob.
837 *
838 * This function will delete data from the reservation table and will
839 * therefore change the indexes of some entries in the table.
840 *
841 * returns:
842 * 0, on success
843 * -FDT_ERR_NOTFOUND, there is no entry of the given index (i.e. there
844 * are less than n+1 reserve map entries)
845 * -FDT_ERR_BADMAGIC,
846 * -FDT_ERR_BADVERSION,
847 * -FDT_ERR_BADSTATE,
848 * -FDT_ERR_BADSTRUCTURE,
849 * -FDT_ERR_BADLAYOUT,
850 * -FDT_ERR_TRUNCATED, standard meanings
851 */
697int fdt_del_mem_rsv(void *fdt, int n); 852int fdt_del_mem_rsv(void *fdt, int n);
698 853
854/**
855 * fdt_set_name - change the name of a given node
856 * @fdt: pointer to the device tree blob
857 * @nodeoffset: structure block offset of a node
858 * @name: name to give the node
859 *
860 * fdt_set_name() replaces the name (including unit address, if any)
861 * of the given node with the given string. NOTE: this function can't
862 * efficiently check if the new name is unique amongst the given
863 * node's siblings; results are undefined if this function is invoked
864 * with a name equal to one of the given node's siblings.
865 *
866 * This function may insert or delete data from the blob, and will
867 * therefore change the offsets of some existing nodes.
868 *
869 * returns:
870 * 0, on success
871 * -FDT_ERR_NOSPACE, there is insufficient free space in the blob
872 * to contain the new name
873 * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
874 * -FDT_ERR_BADMAGIC,
875 * -FDT_ERR_BADVERSION,
876 * -FDT_ERR_BADSTATE, standard meanings
877 */
878int fdt_set_name(void *fdt, int nodeoffset, const char *name);
879
880/**
881 * fdt_setprop - create or change a property
882 * @fdt: pointer to the device tree blob
883 * @nodeoffset: offset of the node whose property to change
884 * @name: name of the property to change
885 * @val: pointer to data to set the property value to
886 * @len: length of the property value
887 *
888 * fdt_setprop() sets the value of the named property in the given
889 * node to the given value and length, creating the property if it
890 * does not already exist.
891 *
892 * This function may insert or delete data from the blob, and will
893 * therefore change the offsets of some existing nodes.
894 *
895 * returns:
896 * 0, on success
897 * -FDT_ERR_NOSPACE, there is insufficient free space in the blob to
898 * contain the new property value
899 * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
900 * -FDT_ERR_BADLAYOUT,
901 * -FDT_ERR_BADMAGIC,
902 * -FDT_ERR_BADVERSION,
903 * -FDT_ERR_BADSTATE,
904 * -FDT_ERR_BADSTRUCTURE,
905 * -FDT_ERR_BADLAYOUT,
906 * -FDT_ERR_TRUNCATED, standard meanings
907 */
699int fdt_setprop(void *fdt, int nodeoffset, const char *name, 908int fdt_setprop(void *fdt, int nodeoffset, const char *name,
700 const void *val, int len); 909 const void *val, int len);
910
911/**
912 * fdt_setprop_cell - set a property to a single cell value
913 * @fdt: pointer to the device tree blob
914 * @nodeoffset: offset of the node whose property to change
915 * @name: name of the property to change
916 * @val: 32-bit integer value for the property (native endian)
917 *
918 * fdt_setprop_cell() sets the value of the named property in the
919 * given node to the given cell value (converting to big-endian if
920 * necessary), or creates a new property with that value if it does
921 * not already exist.
922 *
923 * This function may insert or delete data from the blob, and will
924 * therefore change the offsets of some existing nodes.
925 *
926 * returns:
927 * 0, on success
928 * -FDT_ERR_NOSPACE, there is insufficient free space in the blob to
929 * contain the new property value
930 * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
931 * -FDT_ERR_BADLAYOUT,
932 * -FDT_ERR_BADMAGIC,
933 * -FDT_ERR_BADVERSION,
934 * -FDT_ERR_BADSTATE,
935 * -FDT_ERR_BADSTRUCTURE,
936 * -FDT_ERR_BADLAYOUT,
937 * -FDT_ERR_TRUNCATED, standard meanings
938 */
701static inline int fdt_setprop_cell(void *fdt, int nodeoffset, const char *name, 939static inline int fdt_setprop_cell(void *fdt, int nodeoffset, const char *name,
702 uint32_t val) 940 uint32_t val)
703{ 941{
704 val = cpu_to_fdt32(val); 942 val = cpu_to_fdt32(val);
705 return fdt_setprop(fdt, nodeoffset, name, &val, sizeof(val)); 943 return fdt_setprop(fdt, nodeoffset, name, &val, sizeof(val));
706} 944}
945
946/**
947 * fdt_setprop_string - set a property to a string value
948 * @fdt: pointer to the device tree blob
949 * @nodeoffset: offset of the node whose property to change
950 * @name: name of the property to change
951 * @str: string value for the property
952 *
953 * fdt_setprop_string() sets the value of the named property in the
954 * given node to the given string value (using the length of the
955 * string to determine the new length of the property), or creates a
956 * new property with that value if it does not already exist.
957 *
958 * This function may insert or delete data from the blob, and will
959 * therefore change the offsets of some existing nodes.
960 *
961 * returns:
962 * 0, on success
963 * -FDT_ERR_NOSPACE, there is insufficient free space in the blob to
964 * contain the new property value
965 * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
966 * -FDT_ERR_BADLAYOUT,
967 * -FDT_ERR_BADMAGIC,
968 * -FDT_ERR_BADVERSION,
969 * -FDT_ERR_BADSTATE,
970 * -FDT_ERR_BADSTRUCTURE,
971 * -FDT_ERR_BADLAYOUT,
972 * -FDT_ERR_TRUNCATED, standard meanings
973 */
707#define fdt_setprop_string(fdt, nodeoffset, name, str) \ 974#define fdt_setprop_string(fdt, nodeoffset, name, str) \
708 fdt_setprop((fdt), (nodeoffset), (name), (str), strlen(str)+1) 975 fdt_setprop((fdt), (nodeoffset), (name), (str), strlen(str)+1)
976
977/**
978 * fdt_delprop - delete a property
979 * @fdt: pointer to the device tree blob
980 * @nodeoffset: offset of the node whose property to nop
981 * @name: name of the property to nop
982 *
983 * fdt_del_property() will delete the given property.
984 *
985 * This function will delete data from the blob, and will therefore
986 * change the offsets of some existing nodes.
987 *
988 * returns:
989 * 0, on success
990 * -FDT_ERR_NOTFOUND, node does not have the named property
991 * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
992 * -FDT_ERR_BADLAYOUT,
993 * -FDT_ERR_BADMAGIC,
994 * -FDT_ERR_BADVERSION,
995 * -FDT_ERR_BADSTATE,
996 * -FDT_ERR_BADSTRUCTURE,
997 * -FDT_ERR_TRUNCATED, standard meanings
998 */
709int fdt_delprop(void *fdt, int nodeoffset, const char *name); 999int fdt_delprop(void *fdt, int nodeoffset, const char *name);
1000
1001/**
1002 * fdt_add_subnode_namelen - creates a new node based on substring
1003 * @fdt: pointer to the device tree blob
1004 * @parentoffset: structure block offset of a node
1005 * @name: name of the subnode to locate
1006 * @namelen: number of characters of name to consider
1007 *
1008 * Identical to fdt_add_subnode(), but use only the first namelen
1009 * characters of name as the name of the new node. This is useful for
1010 * creating subnodes based on a portion of a larger string, such as a
1011 * full path.
1012 */
710int fdt_add_subnode_namelen(void *fdt, int parentoffset, 1013int fdt_add_subnode_namelen(void *fdt, int parentoffset,
711 const char *name, int namelen); 1014 const char *name, int namelen);
1015
1016/**
1017 * fdt_add_subnode - creates a new node
1018 * @fdt: pointer to the device tree blob
1019 * @parentoffset: structure block offset of a node
1020 * @name: name of the subnode to locate
1021 *
1022 * fdt_add_subnode() creates a new node as a subnode of the node at
1023 * structure block offset parentoffset, with the given name (which
1024 * should include the unit address, if any).
1025 *
1026 * This function will insert data into the blob, and will therefore
1027 * change the offsets of some existing nodes.
1028
1029 * returns:
1030 * structure block offset of the created nodeequested subnode (>=0), on success
1031 * -FDT_ERR_NOTFOUND, if the requested subnode does not exist
1032 * -FDT_ERR_BADOFFSET, if parentoffset did not point to an FDT_BEGIN_NODE tag
1033 * -FDT_ERR_EXISTS, if the node at parentoffset already has a subnode of
1034 * the given name
1035 * -FDT_ERR_NOSPACE, if there is insufficient free space in the
1036 * blob to contain the new node
1037 * -FDT_ERR_NOSPACE
1038 * -FDT_ERR_BADLAYOUT
1039 * -FDT_ERR_BADMAGIC,
1040 * -FDT_ERR_BADVERSION,
1041 * -FDT_ERR_BADSTATE,
1042 * -FDT_ERR_BADSTRUCTURE,
1043 * -FDT_ERR_TRUNCATED, standard meanings.
1044 */
712int fdt_add_subnode(void *fdt, int parentoffset, const char *name); 1045int fdt_add_subnode(void *fdt, int parentoffset, const char *name);
1046
1047/**
1048 * fdt_del_node - delete a node (subtree)
1049 * @fdt: pointer to the device tree blob
1050 * @nodeoffset: offset of the node to nop
1051 *
1052 * fdt_del_node() will remove the given node, including all its
1053 * subnodes if any, from the blob.
1054 *
1055 * This function will delete data from the blob, and will therefore
1056 * change the offsets of some existing nodes.
1057 *
1058 * returns:
1059 * 0, on success
1060 * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
1061 * -FDT_ERR_BADLAYOUT,
1062 * -FDT_ERR_BADMAGIC,
1063 * -FDT_ERR_BADVERSION,
1064 * -FDT_ERR_BADSTATE,
1065 * -FDT_ERR_BADSTRUCTURE,
1066 * -FDT_ERR_TRUNCATED, standard meanings
1067 */
713int fdt_del_node(void *fdt, int nodeoffset); 1068int fdt_del_node(void *fdt, int nodeoffset);
714 1069
715/**********************************************************************/ 1070/**********************************************************************/
diff --git a/arch/powerpc/boot/libfdt/libfdt_internal.h b/arch/powerpc/boot/libfdt/libfdt_internal.h
index 1e60936beb5b..46eb93e4af5c 100644
--- a/arch/powerpc/boot/libfdt/libfdt_internal.h
+++ b/arch/powerpc/boot/libfdt/libfdt_internal.h
@@ -52,38 +52,44 @@
52 */ 52 */
53#include <fdt.h> 53#include <fdt.h>
54 54
55#define ALIGN(x, a) (((x) + (a) - 1) & ~((a) - 1)) 55#define FDT_ALIGN(x, a) (((x) + (a) - 1) & ~((a) - 1))
56#define PALIGN(p, a) ((void *)ALIGN((unsigned long)(p), (a))) 56#define FDT_TAGALIGN(x) (FDT_ALIGN((x), FDT_TAGSIZE))
57 57
58#define memeq(p, q, n) (memcmp((p), (q), (n)) == 0) 58#define FDT_CHECK_HEADER(fdt) \
59#define streq(p, q) (strcmp((p), (q)) == 0) 59 { \
60 int err; \
61 if ((err = fdt_check_header(fdt)) != 0) \
62 return err; \
63 }
60 64
61uint32_t _fdt_next_tag(const void *fdt, int startoffset, int *nextoffset); 65uint32_t _fdt_next_tag(const void *fdt, int startoffset, int *nextoffset);
66int _fdt_check_node_offset(const void *fdt, int offset);
62const char *_fdt_find_string(const char *strtab, int tabsize, const char *s); 67const char *_fdt_find_string(const char *strtab, int tabsize, const char *s);
63int _fdt_node_end_offset(void *fdt, int nodeoffset); 68int _fdt_node_end_offset(void *fdt, int nodeoffset);
64 69
65static inline const void *_fdt_offset_ptr(const void *fdt, int offset) 70static inline const void *_fdt_offset_ptr(const void *fdt, int offset)
66{ 71{
67 return fdt + fdt_off_dt_struct(fdt) + offset; 72 return (const char *)fdt + fdt_off_dt_struct(fdt) + offset;
68} 73}
69 74
70static inline void *_fdt_offset_ptr_w(void *fdt, int offset) 75static inline void *_fdt_offset_ptr_w(void *fdt, int offset)
71{ 76{
72 return (void *)_fdt_offset_ptr(fdt, offset); 77 return (void *)(uintptr_t)_fdt_offset_ptr(fdt, offset);
73} 78}
74 79
75static inline const struct fdt_reserve_entry *_fdt_mem_rsv(const void *fdt, int n) 80static inline const struct fdt_reserve_entry *_fdt_mem_rsv(const void *fdt, int n)
76{ 81{
77 const struct fdt_reserve_entry *rsv_table = 82 const struct fdt_reserve_entry *rsv_table =
78 fdt + fdt_off_mem_rsvmap(fdt); 83 (const struct fdt_reserve_entry *)
84 ((const char *)fdt + fdt_off_mem_rsvmap(fdt));
79 85
80 return rsv_table + n; 86 return rsv_table + n;
81} 87}
82static inline struct fdt_reserve_entry *_fdt_mem_rsv_w(void *fdt, int n) 88static inline struct fdt_reserve_entry *_fdt_mem_rsv_w(void *fdt, int n)
83{ 89{
84 return (void *)_fdt_mem_rsv(fdt, n); 90 return (void *)(uintptr_t)_fdt_mem_rsv(fdt, n);
85} 91}
86 92
87#define SW_MAGIC (~FDT_MAGIC) 93#define FDT_SW_MAGIC (~FDT_MAGIC)
88 94
89#endif /* _LIBFDT_INTERNAL_H */ 95#endif /* _LIBFDT_INTERNAL_H */
diff --git a/arch/powerpc/boot/libfdt_env.h b/arch/powerpc/boot/libfdt_env.h
index a4b0fc959ece..c89fdb1b80e1 100644
--- a/arch/powerpc/boot/libfdt_env.h
+++ b/arch/powerpc/boot/libfdt_env.h
@@ -6,6 +6,7 @@
6 6
7typedef u32 uint32_t; 7typedef u32 uint32_t;
8typedef u64 uint64_t; 8typedef u64 uint64_t;
9typedef unsigned long uintptr_t;
9 10
10#define fdt16_to_cpu(x) (x) 11#define fdt16_to_cpu(x) (x)
11#define cpu_to_fdt16(x) (x) 12#define cpu_to_fdt16(x) (x)
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index 965c237c122d..ee0dc41d7c56 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -307,7 +307,9 @@ fi
307# post-processing needed for some platforms 307# post-processing needed for some platforms
308case "$platform" in 308case "$platform" in
309pseries|chrp) 309pseries|chrp)
310 $objbin/addnote "$ofile" 310 ${CROSS}objcopy -O binary -j .fakeelf "$kernel" "$ofile".rpanote
311 $objbin/addnote "$ofile" "$ofile".rpanote
312 rm -r "$ofile".rpanote
311 ;; 313 ;;
312coff) 314coff)
313 ${CROSS}objcopy -O aixcoff-rs6000 --set-start "$entry" "$ofile" 315 ${CROSS}objcopy -O aixcoff-rs6000 --set-start "$entry" "$ofile"
diff --git a/arch/powerpc/configs/44x/arches_defconfig b/arch/powerpc/configs/44x/arches_defconfig
new file mode 100644
index 000000000000..70f46078eb6a
--- /dev/null
+++ b/arch/powerpc/configs/44x/arches_defconfig
@@ -0,0 +1,767 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.27-rc5
4# Wed Oct 1 15:54:57 2008
5#
6# CONFIG_PPC64 is not set
7
8#
9# Processor support
10#
11# CONFIG_6xx is not set
12# CONFIG_PPC_85xx is not set
13# CONFIG_PPC_8xx is not set
14# CONFIG_40x is not set
15CONFIG_44x=y
16# CONFIG_E200 is not set
17CONFIG_PPC_FPU=y
18CONFIG_4xx=y
19CONFIG_BOOKE=y
20CONFIG_PTE_64BIT=y
21CONFIG_PHYS_64BIT=y
22# CONFIG_PPC_MM_SLICES is not set
23CONFIG_NOT_COHERENT_CACHE=y
24CONFIG_PPC32=y
25CONFIG_WORD_SIZE=32
26CONFIG_PPC_MERGE=y
27CONFIG_MMU=y
28CONFIG_GENERIC_CMOS_UPDATE=y
29CONFIG_GENERIC_TIME=y
30CONFIG_GENERIC_TIME_VSYSCALL=y
31CONFIG_GENERIC_CLOCKEVENTS=y
32CONFIG_GENERIC_HARDIRQS=y
33# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
34CONFIG_IRQ_PER_CPU=y
35CONFIG_STACKTRACE_SUPPORT=y
36CONFIG_HAVE_LATENCYTOP_SUPPORT=y
37CONFIG_LOCKDEP_SUPPORT=y
38CONFIG_RWSEM_XCHGADD_ALGORITHM=y
39CONFIG_ARCH_HAS_ILOG2_U32=y
40CONFIG_GENERIC_HWEIGHT=y
41CONFIG_GENERIC_CALIBRATE_DELAY=y
42CONFIG_GENERIC_FIND_NEXT_BIT=y
43# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
44CONFIG_PPC=y
45CONFIG_EARLY_PRINTK=y
46CONFIG_GENERIC_NVRAM=y
47CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
48CONFIG_ARCH_MAY_HAVE_PC_FDC=y
49CONFIG_PPC_OF=y
50CONFIG_OF=y
51CONFIG_PPC_UDBG_16550=y
52# CONFIG_GENERIC_TBSYNC is not set
53CONFIG_AUDIT_ARCH=y
54CONFIG_GENERIC_BUG=y
55# CONFIG_DEFAULT_UIMAGE is not set
56CONFIG_PPC_DCR_NATIVE=y
57# CONFIG_PPC_DCR_MMIO is not set
58CONFIG_PPC_DCR=y
59CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
60
61#
62# General setup
63#
64CONFIG_EXPERIMENTAL=y
65CONFIG_BROKEN_ON_SMP=y
66CONFIG_INIT_ENV_ARG_LIMIT=32
67CONFIG_LOCALVERSION=""
68CONFIG_LOCALVERSION_AUTO=y
69CONFIG_SWAP=y
70CONFIG_SYSVIPC=y
71CONFIG_SYSVIPC_SYSCTL=y
72CONFIG_POSIX_MQUEUE=y
73# CONFIG_BSD_PROCESS_ACCT is not set
74# CONFIG_TASKSTATS is not set
75# CONFIG_AUDIT is not set
76# CONFIG_IKCONFIG is not set
77CONFIG_LOG_BUF_SHIFT=14
78# CONFIG_CGROUPS is not set
79# CONFIG_GROUP_SCHED is not set
80CONFIG_SYSFS_DEPRECATED=y
81CONFIG_SYSFS_DEPRECATED_V2=y
82# CONFIG_RELAY is not set
83# CONFIG_NAMESPACES is not set
84CONFIG_BLK_DEV_INITRD=y
85CONFIG_INITRAMFS_SOURCE=""
86# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
87CONFIG_SYSCTL=y
88CONFIG_EMBEDDED=y
89CONFIG_SYSCTL_SYSCALL=y
90CONFIG_KALLSYMS=y
91# CONFIG_KALLSYMS_ALL is not set
92# CONFIG_KALLSYMS_EXTRA_PASS is not set
93CONFIG_HOTPLUG=y
94CONFIG_PRINTK=y
95CONFIG_BUG=y
96CONFIG_ELF_CORE=y
97CONFIG_COMPAT_BRK=y
98CONFIG_BASE_FULL=y
99CONFIG_FUTEX=y
100CONFIG_ANON_INODES=y
101CONFIG_EPOLL=y
102CONFIG_SIGNALFD=y
103CONFIG_TIMERFD=y
104CONFIG_EVENTFD=y
105CONFIG_SHMEM=y
106CONFIG_VM_EVENT_COUNTERS=y
107CONFIG_SLUB_DEBUG=y
108# CONFIG_SLAB is not set
109CONFIG_SLUB=y
110# CONFIG_SLOB is not set
111# CONFIG_PROFILING is not set
112# CONFIG_MARKERS is not set
113CONFIG_HAVE_OPROFILE=y
114# CONFIG_KPROBES is not set
115CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
116CONFIG_HAVE_IOREMAP_PROT=y
117CONFIG_HAVE_KPROBES=y
118CONFIG_HAVE_KRETPROBES=y
119CONFIG_HAVE_ARCH_TRACEHOOK=y
120# CONFIG_HAVE_DMA_ATTRS is not set
121# CONFIG_USE_GENERIC_SMP_HELPERS is not set
122# CONFIG_HAVE_CLK is not set
123CONFIG_PROC_PAGE_MONITOR=y
124# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
125CONFIG_SLABINFO=y
126CONFIG_RT_MUTEXES=y
127# CONFIG_TINY_SHMEM is not set
128CONFIG_BASE_SMALL=0
129CONFIG_MODULES=y
130# CONFIG_MODULE_FORCE_LOAD is not set
131CONFIG_MODULE_UNLOAD=y
132# CONFIG_MODULE_FORCE_UNLOAD is not set
133# CONFIG_MODVERSIONS is not set
134# CONFIG_MODULE_SRCVERSION_ALL is not set
135CONFIG_KMOD=y
136CONFIG_BLOCK=y
137CONFIG_LBD=y
138# CONFIG_BLK_DEV_IO_TRACE is not set
139# CONFIG_LSF is not set
140# CONFIG_BLK_DEV_BSG is not set
141# CONFIG_BLK_DEV_INTEGRITY is not set
142
143#
144# IO Schedulers
145#
146CONFIG_IOSCHED_NOOP=y
147CONFIG_IOSCHED_AS=y
148CONFIG_IOSCHED_DEADLINE=y
149CONFIG_IOSCHED_CFQ=y
150CONFIG_DEFAULT_AS=y
151# CONFIG_DEFAULT_DEADLINE is not set
152# CONFIG_DEFAULT_CFQ is not set
153# CONFIG_DEFAULT_NOOP is not set
154CONFIG_DEFAULT_IOSCHED="anticipatory"
155CONFIG_CLASSIC_RCU=y
156CONFIG_PPC4xx_PCI_EXPRESS=y
157
158#
159# Platform support
160#
161# CONFIG_PPC_CELL is not set
162# CONFIG_PPC_CELL_NATIVE is not set
163# CONFIG_PQ2ADS is not set
164# CONFIG_BAMBOO is not set
165# CONFIG_EBONY is not set
166# CONFIG_SAM440EP is not set
167# CONFIG_SEQUOIA is not set
168# CONFIG_TAISHAN is not set
169# CONFIG_KATMAI is not set
170# CONFIG_RAINIER is not set
171# CONFIG_WARP is not set
172CONFIG_ARCHES=y
173# CONFIG_CANYONLANDS is not set
174# CONFIG_GLACIER is not set
175# CONFIG_YOSEMITE is not set
176# CONFIG_XILINX_VIRTEX440_GENERIC_BOARD is not set
177CONFIG_PPC44x_SIMPLE=y
178CONFIG_460EX=y
179# CONFIG_IPIC is not set
180# CONFIG_MPIC is not set
181# CONFIG_MPIC_WEIRD is not set
182# CONFIG_PPC_I8259 is not set
183# CONFIG_PPC_RTAS is not set
184# CONFIG_MMIO_NVRAM is not set
185# CONFIG_PPC_MPC106 is not set
186# CONFIG_PPC_970_NAP is not set
187# CONFIG_PPC_INDIRECT_IO is not set
188# CONFIG_GENERIC_IOMAP is not set
189# CONFIG_CPU_FREQ is not set
190# CONFIG_FSL_ULI1575 is not set
191
192#
193# Kernel options
194#
195# CONFIG_HIGHMEM is not set
196CONFIG_TICK_ONESHOT=y
197CONFIG_NO_HZ=y
198CONFIG_HIGH_RES_TIMERS=y
199CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
200# CONFIG_HZ_100 is not set
201CONFIG_HZ_250=y
202# CONFIG_HZ_300 is not set
203# CONFIG_HZ_1000 is not set
204CONFIG_HZ=250
205CONFIG_SCHED_HRTICK=y
206CONFIG_PREEMPT_NONE=y
207# CONFIG_PREEMPT_VOLUNTARY is not set
208# CONFIG_PREEMPT is not set
209CONFIG_BINFMT_ELF=y
210# CONFIG_BINFMT_MISC is not set
211# CONFIG_MATH_EMULATION is not set
212# CONFIG_IOMMU_HELPER is not set
213CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
214CONFIG_ARCH_HAS_WALK_MEMORY=y
215CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
216CONFIG_ARCH_FLATMEM_ENABLE=y
217CONFIG_ARCH_POPULATES_NODE_MAP=y
218CONFIG_SELECT_MEMORY_MODEL=y
219CONFIG_FLATMEM_MANUAL=y
220# CONFIG_DISCONTIGMEM_MANUAL is not set
221# CONFIG_SPARSEMEM_MANUAL is not set
222CONFIG_FLATMEM=y
223CONFIG_FLAT_NODE_MEM_MAP=y
224# CONFIG_SPARSEMEM_STATIC is not set
225# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
226CONFIG_PAGEFLAGS_EXTENDED=y
227CONFIG_SPLIT_PTLOCK_CPUS=4
228CONFIG_MIGRATION=y
229CONFIG_RESOURCES_64BIT=y
230CONFIG_ZONE_DMA_FLAG=1
231CONFIG_BOUNCE=y
232CONFIG_VIRT_TO_BUS=y
233CONFIG_FORCE_MAX_ZONEORDER=11
234CONFIG_PROC_DEVICETREE=y
235CONFIG_CMDLINE_BOOL=y
236CONFIG_CMDLINE=""
237CONFIG_EXTRA_TARGETS=""
238CONFIG_SECCOMP=y
239CONFIG_ISA_DMA_API=y
240
241#
242# Bus options
243#
244CONFIG_ZONE_DMA=y
245CONFIG_PPC_INDIRECT_PCI=y
246CONFIG_4xx_SOC=y
247CONFIG_PPC_PCI_CHOICE=y
248CONFIG_PCI=y
249CONFIG_PCI_DOMAINS=y
250CONFIG_PCI_SYSCALL=y
251# CONFIG_PCIEPORTBUS is not set
252CONFIG_ARCH_SUPPORTS_MSI=y
253# CONFIG_PCI_MSI is not set
254CONFIG_PCI_LEGACY=y
255# CONFIG_PCI_DEBUG is not set
256# CONFIG_PCCARD is not set
257# CONFIG_HOTPLUG_PCI is not set
258# CONFIG_HAS_RAPIDIO is not set
259
260#
261# Advanced setup
262#
263# CONFIG_ADVANCED_OPTIONS is not set
264
265#
266# Default settings for advanced configuration options are used
267#
268CONFIG_LOWMEM_SIZE=0x30000000
269CONFIG_PAGE_OFFSET=0xc0000000
270CONFIG_KERNEL_START=0xc0000000
271CONFIG_PHYSICAL_START=0x00000000
272CONFIG_TASK_SIZE=0xc0000000
273CONFIG_CONSISTENT_START=0xff100000
274CONFIG_CONSISTENT_SIZE=0x00200000
275CONFIG_NET=y
276
277#
278# Networking options
279#
280CONFIG_PACKET=y
281# CONFIG_PACKET_MMAP is not set
282CONFIG_UNIX=y
283# CONFIG_NET_KEY is not set
284CONFIG_INET=y
285# CONFIG_IP_MULTICAST is not set
286# CONFIG_IP_ADVANCED_ROUTER is not set
287CONFIG_IP_FIB_HASH=y
288CONFIG_IP_PNP=y
289CONFIG_IP_PNP_DHCP=y
290CONFIG_IP_PNP_BOOTP=y
291# CONFIG_IP_PNP_RARP is not set
292# CONFIG_NET_IPIP is not set
293# CONFIG_NET_IPGRE is not set
294# CONFIG_ARPD is not set
295# CONFIG_SYN_COOKIES is not set
296# CONFIG_INET_AH is not set
297# CONFIG_INET_ESP is not set
298# CONFIG_INET_IPCOMP is not set
299# CONFIG_INET_XFRM_TUNNEL is not set
300# CONFIG_INET_TUNNEL is not set
301# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
302# CONFIG_INET_XFRM_MODE_TUNNEL is not set
303# CONFIG_INET_XFRM_MODE_BEET is not set
304# CONFIG_INET_LRO is not set
305CONFIG_INET_DIAG=y
306CONFIG_INET_TCP_DIAG=y
307# CONFIG_TCP_CONG_ADVANCED is not set
308CONFIG_TCP_CONG_CUBIC=y
309CONFIG_DEFAULT_TCP_CONG="cubic"
310# CONFIG_TCP_MD5SIG is not set
311# CONFIG_IPV6 is not set
312# CONFIG_NETWORK_SECMARK is not set
313# CONFIG_NETFILTER is not set
314# CONFIG_IP_DCCP is not set
315# CONFIG_IP_SCTP is not set
316# CONFIG_TIPC is not set
317# CONFIG_ATM is not set
318# CONFIG_BRIDGE is not set
319# CONFIG_VLAN_8021Q is not set
320# CONFIG_DECNET is not set
321# CONFIG_LLC2 is not set
322# CONFIG_IPX is not set
323# CONFIG_ATALK is not set
324# CONFIG_X25 is not set
325# CONFIG_LAPB is not set
326# CONFIG_ECONET is not set
327# CONFIG_WAN_ROUTER is not set
328# CONFIG_NET_SCHED is not set
329
330#
331# Network testing
332#
333# CONFIG_NET_PKTGEN is not set
334# CONFIG_HAMRADIO is not set
335# CONFIG_CAN is not set
336# CONFIG_IRDA is not set
337# CONFIG_BT is not set
338# CONFIG_AF_RXRPC is not set
339
340#
341# Wireless
342#
343# CONFIG_CFG80211 is not set
344# CONFIG_WIRELESS_EXT is not set
345# CONFIG_MAC80211 is not set
346# CONFIG_IEEE80211 is not set
347# CONFIG_RFKILL is not set
348# CONFIG_NET_9P is not set
349
350#
351# Device Drivers
352#
353
354#
355# Generic Driver Options
356#
357CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
358CONFIG_STANDALONE=y
359CONFIG_PREVENT_FIRMWARE_BUILD=y
360CONFIG_FW_LOADER=y
361CONFIG_FIRMWARE_IN_KERNEL=y
362CONFIG_EXTRA_FIRMWARE=""
363# CONFIG_DEBUG_DRIVER is not set
364# CONFIG_DEBUG_DEVRES is not set
365# CONFIG_SYS_HYPERVISOR is not set
366CONFIG_CONNECTOR=y
367CONFIG_PROC_EVENTS=y
368# CONFIG_MTD is not set
369CONFIG_OF_DEVICE=y
370# CONFIG_PARPORT is not set
371CONFIG_BLK_DEV=y
372# CONFIG_BLK_DEV_FD is not set
373# CONFIG_BLK_CPQ_DA is not set
374# CONFIG_BLK_CPQ_CISS_DA is not set
375# CONFIG_BLK_DEV_DAC960 is not set
376# CONFIG_BLK_DEV_UMEM is not set
377# CONFIG_BLK_DEV_COW_COMMON is not set
378# CONFIG_BLK_DEV_LOOP is not set
379# CONFIG_BLK_DEV_NBD is not set
380# CONFIG_BLK_DEV_SX8 is not set
381CONFIG_BLK_DEV_RAM=y
382CONFIG_BLK_DEV_RAM_COUNT=16
383CONFIG_BLK_DEV_RAM_SIZE=35000
384# CONFIG_BLK_DEV_XIP is not set
385# CONFIG_CDROM_PKTCDVD is not set
386# CONFIG_ATA_OVER_ETH is not set
387# CONFIG_XILINX_SYSACE is not set
388# CONFIG_BLK_DEV_HD is not set
389# CONFIG_MISC_DEVICES is not set
390CONFIG_HAVE_IDE=y
391# CONFIG_IDE is not set
392
393#
394# SCSI device support
395#
396# CONFIG_RAID_ATTRS is not set
397# CONFIG_SCSI is not set
398# CONFIG_SCSI_DMA is not set
399# CONFIG_SCSI_NETLINK is not set
400# CONFIG_ATA is not set
401# CONFIG_MD is not set
402# CONFIG_FUSION is not set
403
404#
405# IEEE 1394 (FireWire) support
406#
407
408#
409# Enable only one of the two stacks, unless you know what you are doing
410#
411# CONFIG_FIREWIRE is not set
412# CONFIG_IEEE1394 is not set
413# CONFIG_I2O is not set
414# CONFIG_MACINTOSH_DRIVERS is not set
415CONFIG_NETDEVICES=y
416# CONFIG_DUMMY is not set
417# CONFIG_BONDING is not set
418# CONFIG_MACVLAN is not set
419# CONFIG_EQUALIZER is not set
420# CONFIG_TUN is not set
421# CONFIG_VETH is not set
422# CONFIG_ARCNET is not set
423# CONFIG_PHYLIB is not set
424CONFIG_NET_ETHERNET=y
425# CONFIG_MII is not set
426# CONFIG_HAPPYMEAL is not set
427# CONFIG_SUNGEM is not set
428# CONFIG_CASSINI is not set
429# CONFIG_NET_VENDOR_3COM is not set
430# CONFIG_NET_TULIP is not set
431# CONFIG_HP100 is not set
432CONFIG_IBM_NEW_EMAC=y
433CONFIG_IBM_NEW_EMAC_RXB=256
434CONFIG_IBM_NEW_EMAC_TXB=256
435CONFIG_IBM_NEW_EMAC_POLL_WEIGHT=32
436CONFIG_IBM_NEW_EMAC_RX_COPY_THRESHOLD=256
437CONFIG_IBM_NEW_EMAC_RX_SKB_HEADROOM=0
438# CONFIG_IBM_NEW_EMAC_DEBUG is not set
439# CONFIG_IBM_NEW_EMAC_ZMII is not set
440# CONFIG_IBM_NEW_EMAC_RGMII is not set
441CONFIG_IBM_NEW_EMAC_TAH=y
442CONFIG_IBM_NEW_EMAC_EMAC4=y
443# CONFIG_NET_PCI is not set
444# CONFIG_B44 is not set
445# CONFIG_NETDEV_1000 is not set
446# CONFIG_NETDEV_10000 is not set
447# CONFIG_TR is not set
448
449#
450# Wireless LAN
451#
452# CONFIG_WLAN_PRE80211 is not set
453# CONFIG_WLAN_80211 is not set
454# CONFIG_IWLWIFI_LEDS is not set
455# CONFIG_WAN is not set
456# CONFIG_FDDI is not set
457# CONFIG_HIPPI is not set
458# CONFIG_PPP is not set
459# CONFIG_SLIP is not set
460# CONFIG_NETCONSOLE is not set
461# CONFIG_NETPOLL is not set
462# CONFIG_NET_POLL_CONTROLLER is not set
463# CONFIG_ISDN is not set
464# CONFIG_PHONE is not set
465
466#
467# Input device support
468#
469# CONFIG_INPUT is not set
470
471#
472# Hardware I/O ports
473#
474# CONFIG_SERIO is not set
475# CONFIG_GAMEPORT is not set
476
477#
478# Character devices
479#
480# CONFIG_VT is not set
481CONFIG_DEVKMEM=y
482# CONFIG_SERIAL_NONSTANDARD is not set
483# CONFIG_NOZOMI is not set
484
485#
486# Serial drivers
487#
488CONFIG_SERIAL_8250=y
489CONFIG_SERIAL_8250_CONSOLE=y
490# CONFIG_SERIAL_8250_PCI is not set
491CONFIG_SERIAL_8250_NR_UARTS=4
492CONFIG_SERIAL_8250_RUNTIME_UARTS=4
493CONFIG_SERIAL_8250_EXTENDED=y
494# CONFIG_SERIAL_8250_MANY_PORTS is not set
495CONFIG_SERIAL_8250_SHARE_IRQ=y
496# CONFIG_SERIAL_8250_DETECT_IRQ is not set
497# CONFIG_SERIAL_8250_RSA is not set
498
499#
500# Non-8250 serial port support
501#
502# CONFIG_SERIAL_UARTLITE is not set
503CONFIG_SERIAL_CORE=y
504CONFIG_SERIAL_CORE_CONSOLE=y
505# CONFIG_SERIAL_JSM is not set
506CONFIG_SERIAL_OF_PLATFORM=y
507CONFIG_UNIX98_PTYS=y
508CONFIG_LEGACY_PTYS=y
509CONFIG_LEGACY_PTY_COUNT=256
510# CONFIG_IPMI_HANDLER is not set
511# CONFIG_HW_RANDOM is not set
512# CONFIG_NVRAM is not set
513# CONFIG_GEN_RTC is not set
514# CONFIG_R3964 is not set
515# CONFIG_APPLICOM is not set
516# CONFIG_RAW_DRIVER is not set
517# CONFIG_TCG_TPM is not set
518CONFIG_DEVPORT=y
519# CONFIG_I2C is not set
520# CONFIG_SPI is not set
521CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
522# CONFIG_GPIOLIB is not set
523# CONFIG_W1 is not set
524# CONFIG_POWER_SUPPLY is not set
525# CONFIG_HWMON is not set
526# CONFIG_THERMAL is not set
527# CONFIG_THERMAL_HWMON is not set
528# CONFIG_WATCHDOG is not set
529
530#
531# Sonics Silicon Backplane
532#
533CONFIG_SSB_POSSIBLE=y
534# CONFIG_SSB is not set
535
536#
537# Multifunction device drivers
538#
539# CONFIG_MFD_CORE is not set
540# CONFIG_MFD_SM501 is not set
541# CONFIG_HTC_PASIC3 is not set
542# CONFIG_MFD_TMIO is not set
543
544#
545# Multimedia devices
546#
547
548#
549# Multimedia core support
550#
551# CONFIG_VIDEO_DEV is not set
552# CONFIG_DVB_CORE is not set
553# CONFIG_VIDEO_MEDIA is not set
554
555#
556# Multimedia drivers
557#
558CONFIG_DAB=y
559
560#
561# Graphics support
562#
563# CONFIG_AGP is not set
564# CONFIG_DRM is not set
565# CONFIG_VGASTATE is not set
566CONFIG_VIDEO_OUTPUT_CONTROL=m
567# CONFIG_FB is not set
568# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
569
570#
571# Display device support
572#
573# CONFIG_DISPLAY_SUPPORT is not set
574# CONFIG_SOUND is not set
575# CONFIG_USB_SUPPORT is not set
576# CONFIG_MMC is not set
577# CONFIG_MEMSTICK is not set
578# CONFIG_NEW_LEDS is not set
579# CONFIG_ACCESSIBILITY is not set
580# CONFIG_INFINIBAND is not set
581# CONFIG_EDAC is not set
582# CONFIG_RTC_CLASS is not set
583# CONFIG_DMADEVICES is not set
584# CONFIG_UIO is not set
585
586#
587# File systems
588#
589CONFIG_EXT2_FS=y
590# CONFIG_EXT2_FS_XATTR is not set
591# CONFIG_EXT2_FS_XIP is not set
592# CONFIG_EXT3_FS is not set
593# CONFIG_EXT4DEV_FS is not set
594# CONFIG_REISERFS_FS is not set
595# CONFIG_JFS_FS is not set
596# CONFIG_FS_POSIX_ACL is not set
597# CONFIG_XFS_FS is not set
598# CONFIG_OCFS2_FS is not set
599CONFIG_DNOTIFY=y
600CONFIG_INOTIFY=y
601CONFIG_INOTIFY_USER=y
602# CONFIG_QUOTA is not set
603# CONFIG_AUTOFS_FS is not set
604# CONFIG_AUTOFS4_FS is not set
605# CONFIG_FUSE_FS is not set
606
607#
608# CD-ROM/DVD Filesystems
609#
610# CONFIG_ISO9660_FS is not set
611# CONFIG_UDF_FS is not set
612
613#
614# DOS/FAT/NT Filesystems
615#
616# CONFIG_MSDOS_FS is not set
617# CONFIG_VFAT_FS is not set
618# CONFIG_NTFS_FS is not set
619
620#
621# Pseudo filesystems
622#
623CONFIG_PROC_FS=y
624CONFIG_PROC_KCORE=y
625CONFIG_PROC_SYSCTL=y
626CONFIG_SYSFS=y
627CONFIG_TMPFS=y
628# CONFIG_TMPFS_POSIX_ACL is not set
629# CONFIG_HUGETLB_PAGE is not set
630# CONFIG_CONFIGFS_FS is not set
631
632#
633# Miscellaneous filesystems
634#
635# CONFIG_ADFS_FS is not set
636# CONFIG_AFFS_FS is not set
637# CONFIG_HFS_FS is not set
638# CONFIG_HFSPLUS_FS is not set
639# CONFIG_BEFS_FS is not set
640# CONFIG_BFS_FS is not set
641# CONFIG_EFS_FS is not set
642CONFIG_CRAMFS=y
643# CONFIG_VXFS_FS is not set
644# CONFIG_MINIX_FS is not set
645# CONFIG_OMFS_FS is not set
646# CONFIG_HPFS_FS is not set
647# CONFIG_QNX4FS_FS is not set
648# CONFIG_ROMFS_FS is not set
649# CONFIG_SYSV_FS is not set
650# CONFIG_UFS_FS is not set
651CONFIG_NETWORK_FILESYSTEMS=y
652CONFIG_NFS_FS=y
653CONFIG_NFS_V3=y
654# CONFIG_NFS_V3_ACL is not set
655# CONFIG_NFS_V4 is not set
656CONFIG_ROOT_NFS=y
657# CONFIG_NFSD is not set
658CONFIG_LOCKD=y
659CONFIG_LOCKD_V4=y
660CONFIG_NFS_COMMON=y
661CONFIG_SUNRPC=y
662# CONFIG_RPCSEC_GSS_KRB5 is not set
663# CONFIG_RPCSEC_GSS_SPKM3 is not set
664# CONFIG_SMB_FS is not set
665# CONFIG_CIFS is not set
666# CONFIG_NCP_FS is not set
667# CONFIG_CODA_FS is not set
668# CONFIG_AFS_FS is not set
669
670#
671# Partition Types
672#
673# CONFIG_PARTITION_ADVANCED is not set
674CONFIG_MSDOS_PARTITION=y
675# CONFIG_NLS is not set
676# CONFIG_DLM is not set
677
678#
679# Library routines
680#
681CONFIG_BITREVERSE=y
682# CONFIG_GENERIC_FIND_FIRST_BIT is not set
683# CONFIG_CRC_CCITT is not set
684# CONFIG_CRC16 is not set
685# CONFIG_CRC_T10DIF is not set
686# CONFIG_CRC_ITU_T is not set
687CONFIG_CRC32=y
688# CONFIG_CRC7 is not set
689# CONFIG_LIBCRC32C is not set
690CONFIG_ZLIB_INFLATE=y
691CONFIG_PLIST=y
692CONFIG_HAS_IOMEM=y
693CONFIG_HAS_IOPORT=y
694CONFIG_HAS_DMA=y
695CONFIG_HAVE_LMB=y
696
697#
698# Kernel hacking
699#
700# CONFIG_PRINTK_TIME is not set
701CONFIG_ENABLE_WARN_DEPRECATED=y
702CONFIG_ENABLE_MUST_CHECK=y
703CONFIG_FRAME_WARN=1024
704CONFIG_MAGIC_SYSRQ=y
705# CONFIG_UNUSED_SYMBOLS is not set
706CONFIG_DEBUG_FS=y
707# CONFIG_HEADERS_CHECK is not set
708CONFIG_DEBUG_KERNEL=y
709# CONFIG_DEBUG_SHIRQ is not set
710CONFIG_DETECT_SOFTLOCKUP=y
711# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
712CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
713CONFIG_SCHED_DEBUG=y
714# CONFIG_SCHEDSTATS is not set
715# CONFIG_TIMER_STATS is not set
716# CONFIG_DEBUG_OBJECTS is not set
717# CONFIG_SLUB_DEBUG_ON is not set
718# CONFIG_SLUB_STATS is not set
719# CONFIG_DEBUG_RT_MUTEXES is not set
720# CONFIG_RT_MUTEX_TESTER is not set
721# CONFIG_DEBUG_SPINLOCK is not set
722# CONFIG_DEBUG_MUTEXES is not set
723# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
724# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
725# CONFIG_DEBUG_KOBJECT is not set
726# CONFIG_DEBUG_BUGVERBOSE is not set
727# CONFIG_DEBUG_INFO is not set
728# CONFIG_DEBUG_VM is not set
729# CONFIG_DEBUG_WRITECOUNT is not set
730# CONFIG_DEBUG_MEMORY_INIT is not set
731# CONFIG_DEBUG_LIST is not set
732# CONFIG_DEBUG_SG is not set
733# CONFIG_BOOT_PRINTK_DELAY is not set
734# CONFIG_RCU_TORTURE_TEST is not set
735# CONFIG_BACKTRACE_SELF_TEST is not set
736# CONFIG_FAULT_INJECTION is not set
737# CONFIG_LATENCYTOP is not set
738CONFIG_SYSCTL_SYSCALL_CHECK=y
739CONFIG_HAVE_FTRACE=y
740CONFIG_HAVE_DYNAMIC_FTRACE=y
741# CONFIG_FTRACE is not set
742# CONFIG_SCHED_TRACER is not set
743# CONFIG_CONTEXT_SWITCH_TRACER is not set
744# CONFIG_SAMPLES is not set
745CONFIG_HAVE_ARCH_KGDB=y
746# CONFIG_KGDB is not set
747# CONFIG_DEBUG_STACKOVERFLOW is not set
748# CONFIG_DEBUG_STACK_USAGE is not set
749# CONFIG_DEBUG_PAGEALLOC is not set
750# CONFIG_CODE_PATCHING_SELFTEST is not set
751# CONFIG_FTR_FIXUP_SELFTEST is not set
752# CONFIG_MSI_BITMAP_SELFTEST is not set
753# CONFIG_XMON is not set
754# CONFIG_IRQSTACKS is not set
755# CONFIG_VIRQ_DEBUG is not set
756# CONFIG_BDI_SWITCH is not set
757# CONFIG_PPC_EARLY_DEBUG is not set
758
759#
760# Security options
761#
762# CONFIG_KEYS is not set
763# CONFIG_SECURITY is not set
764# CONFIG_SECURITY_FILE_CAPABILITIES is not set
765# CONFIG_CRYPTO is not set
766# CONFIG_PPC_CLOCK is not set
767# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/configs/83xx/asp8347_defconfig b/arch/powerpc/configs/83xx/asp8347_defconfig
index 5e6780a088ce..0b1fa20f745c 100644
--- a/arch/powerpc/configs/83xx/asp8347_defconfig
+++ b/arch/powerpc/configs/83xx/asp8347_defconfig
@@ -164,11 +164,11 @@ CONFIG_CLASSIC_RCU=y
164# 164#
165CONFIG_PPC_MULTIPLATFORM=y 165CONFIG_PPC_MULTIPLATFORM=y
166CONFIG_CLASSIC32=y 166CONFIG_CLASSIC32=y
167CONFIG_PPC_CHRP=y 167# CONFIG_PPC_CHRP is not set
168# CONFIG_PPC_PMAC is not set
168# CONFIG_MPC5121_ADS is not set 169# CONFIG_MPC5121_ADS is not set
169# CONFIG_MPC5121_GENERIC is not set 170# CONFIG_MPC5121_GENERIC is not set
170# CONFIG_PPC_MPC52xx is not set 171# CONFIG_PPC_MPC52xx is not set
171CONFIG_PPC_PMAC=y
172# CONFIG_PPC_CELL is not set 172# CONFIG_PPC_CELL is not set
173# CONFIG_PPC_CELL_NATIVE is not set 173# CONFIG_PPC_CELL_NATIVE is not set
174# CONFIG_PPC_82xx is not set 174# CONFIG_PPC_82xx is not set
diff --git a/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig b/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig
index 2028337868b4..b7eae2bdf19c 100644
--- a/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig
+++ b/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig
@@ -163,11 +163,11 @@ CONFIG_CLASSIC_RCU=y
163# 163#
164CONFIG_PPC_MULTIPLATFORM=y 164CONFIG_PPC_MULTIPLATFORM=y
165CONFIG_CLASSIC32=y 165CONFIG_CLASSIC32=y
166CONFIG_PPC_CHRP=y 166# CONFIG_PPC_CHRP is not set
167# CONFIG_PPC_PMAC is not set
167# CONFIG_MPC5121_ADS is not set 168# CONFIG_MPC5121_ADS is not set
168# CONFIG_MPC5121_GENERIC is not set 169# CONFIG_MPC5121_GENERIC is not set
169# CONFIG_PPC_MPC52xx is not set 170# CONFIG_PPC_MPC52xx is not set
170CONFIG_PPC_PMAC=y
171# CONFIG_PPC_CELL is not set 171# CONFIG_PPC_CELL is not set
172# CONFIG_PPC_CELL_NATIVE is not set 172# CONFIG_PPC_CELL_NATIVE is not set
173# CONFIG_PPC_82xx is not set 173# CONFIG_PPC_82xx is not set
diff --git a/arch/powerpc/configs/83xx/mpc8315_rdb_defconfig b/arch/powerpc/configs/83xx/mpc8315_rdb_defconfig
index dd80eb0a87a1..b0a27a67d8c7 100644
--- a/arch/powerpc/configs/83xx/mpc8315_rdb_defconfig
+++ b/arch/powerpc/configs/83xx/mpc8315_rdb_defconfig
@@ -163,11 +163,11 @@ CONFIG_CLASSIC_RCU=y
163# 163#
164CONFIG_PPC_MULTIPLATFORM=y 164CONFIG_PPC_MULTIPLATFORM=y
165CONFIG_CLASSIC32=y 165CONFIG_CLASSIC32=y
166CONFIG_PPC_CHRP=y 166# CONFIG_PPC_CHRP is not set
167# CONFIG_PPC_PMAC is not set
167# CONFIG_MPC5121_ADS is not set 168# CONFIG_MPC5121_ADS is not set
168# CONFIG_MPC5121_GENERIC is not set 169# CONFIG_MPC5121_GENERIC is not set
169# CONFIG_PPC_MPC52xx is not set 170# CONFIG_PPC_MPC52xx is not set
170CONFIG_PPC_PMAC=y
171# CONFIG_PPC_CELL is not set 171# CONFIG_PPC_CELL is not set
172# CONFIG_PPC_CELL_NATIVE is not set 172# CONFIG_PPC_CELL_NATIVE is not set
173# CONFIG_PPC_82xx is not set 173# CONFIG_PPC_82xx is not set
diff --git a/arch/powerpc/configs/83xx/mpc832x_mds_defconfig b/arch/powerpc/configs/83xx/mpc832x_mds_defconfig
index bdf50c8a17e6..ad825bcddd1f 100644
--- a/arch/powerpc/configs/83xx/mpc832x_mds_defconfig
+++ b/arch/powerpc/configs/83xx/mpc832x_mds_defconfig
@@ -163,11 +163,11 @@ CONFIG_CLASSIC_RCU=y
163# 163#
164CONFIG_PPC_MULTIPLATFORM=y 164CONFIG_PPC_MULTIPLATFORM=y
165CONFIG_CLASSIC32=y 165CONFIG_CLASSIC32=y
166CONFIG_PPC_CHRP=y 166# CONFIG_PPC_CHRP is not set
167# CONFIG_PPC_PMAC is not set
167# CONFIG_MPC5121_ADS is not set 168# CONFIG_MPC5121_ADS is not set
168# CONFIG_MPC5121_GENERIC is not set 169# CONFIG_MPC5121_GENERIC is not set
169# CONFIG_PPC_MPC52xx is not set 170# CONFIG_PPC_MPC52xx is not set
170CONFIG_PPC_PMAC=y
171# CONFIG_PPC_CELL is not set 171# CONFIG_PPC_CELL is not set
172# CONFIG_PPC_CELL_NATIVE is not set 172# CONFIG_PPC_CELL_NATIVE is not set
173# CONFIG_PPC_82xx is not set 173# CONFIG_PPC_82xx is not set
diff --git a/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig b/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig
index 4eef8c95480e..38267501f44d 100644
--- a/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig
+++ b/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig
@@ -163,11 +163,11 @@ CONFIG_CLASSIC_RCU=y
163# 163#
164CONFIG_PPC_MULTIPLATFORM=y 164CONFIG_PPC_MULTIPLATFORM=y
165CONFIG_CLASSIC32=y 165CONFIG_CLASSIC32=y
166CONFIG_PPC_CHRP=y 166# CONFIG_PPC_CHRP is not set
167# CONFIG_PPC_PMAC is not set
167# CONFIG_MPC5121_ADS is not set 168# CONFIG_MPC5121_ADS is not set
168# CONFIG_MPC5121_GENERIC is not set 169# CONFIG_MPC5121_GENERIC is not set
169# CONFIG_PPC_MPC52xx is not set 170# CONFIG_PPC_MPC52xx is not set
170CONFIG_PPC_PMAC=y
171# CONFIG_PPC_CELL is not set 171# CONFIG_PPC_CELL is not set
172# CONFIG_PPC_CELL_NATIVE is not set 172# CONFIG_PPC_CELL_NATIVE is not set
173# CONFIG_PPC_82xx is not set 173# CONFIG_PPC_82xx is not set
diff --git a/arch/powerpc/configs/83xx/mpc834x_itx_defconfig b/arch/powerpc/configs/83xx/mpc834x_itx_defconfig
index 8d6513931850..90aab340e7ff 100644
--- a/arch/powerpc/configs/83xx/mpc834x_itx_defconfig
+++ b/arch/powerpc/configs/83xx/mpc834x_itx_defconfig
@@ -163,11 +163,11 @@ CONFIG_CLASSIC_RCU=y
163# 163#
164CONFIG_PPC_MULTIPLATFORM=y 164CONFIG_PPC_MULTIPLATFORM=y
165CONFIG_CLASSIC32=y 165CONFIG_CLASSIC32=y
166CONFIG_PPC_CHRP=y 166# CONFIG_PPC_CHRP is not set
167# CONFIG_PPC_PMAC is not set
167# CONFIG_MPC5121_ADS is not set 168# CONFIG_MPC5121_ADS is not set
168# CONFIG_MPC5121_GENERIC is not set 169# CONFIG_MPC5121_GENERIC is not set
169# CONFIG_PPC_MPC52xx is not set 170# CONFIG_PPC_MPC52xx is not set
170CONFIG_PPC_PMAC=y
171# CONFIG_PPC_CELL is not set 171# CONFIG_PPC_CELL is not set
172# CONFIG_PPC_CELL_NATIVE is not set 172# CONFIG_PPC_CELL_NATIVE is not set
173# CONFIG_PPC_82xx is not set 173# CONFIG_PPC_82xx is not set
diff --git a/arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig b/arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig
index a8afa39d6f76..7458a242d251 100644
--- a/arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig
+++ b/arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig
@@ -163,11 +163,11 @@ CONFIG_CLASSIC_RCU=y
163# 163#
164CONFIG_PPC_MULTIPLATFORM=y 164CONFIG_PPC_MULTIPLATFORM=y
165CONFIG_CLASSIC32=y 165CONFIG_CLASSIC32=y
166CONFIG_PPC_CHRP=y 166# CONFIG_PPC_CHRP is not set
167# CONFIG_PPC_PMAC is not set
167# CONFIG_MPC5121_ADS is not set 168# CONFIG_MPC5121_ADS is not set
168# CONFIG_MPC5121_GENERIC is not set 169# CONFIG_MPC5121_GENERIC is not set
169# CONFIG_PPC_MPC52xx is not set 170# CONFIG_PPC_MPC52xx is not set
170CONFIG_PPC_PMAC=y
171# CONFIG_PPC_CELL is not set 171# CONFIG_PPC_CELL is not set
172# CONFIG_PPC_CELL_NATIVE is not set 172# CONFIG_PPC_CELL_NATIVE is not set
173# CONFIG_PPC_82xx is not set 173# CONFIG_PPC_82xx is not set
diff --git a/arch/powerpc/configs/83xx/mpc834x_mds_defconfig b/arch/powerpc/configs/83xx/mpc834x_mds_defconfig
index 24c320a36670..1a92798938cf 100644
--- a/arch/powerpc/configs/83xx/mpc834x_mds_defconfig
+++ b/arch/powerpc/configs/83xx/mpc834x_mds_defconfig
@@ -163,11 +163,11 @@ CONFIG_CLASSIC_RCU=y
163# 163#
164CONFIG_PPC_MULTIPLATFORM=y 164CONFIG_PPC_MULTIPLATFORM=y
165CONFIG_CLASSIC32=y 165CONFIG_CLASSIC32=y
166CONFIG_PPC_CHRP=y 166# CONFIG_PPC_CHRP is not set
167# CONFIG_PPC_PMAC is not set
167# CONFIG_MPC5121_ADS is not set 168# CONFIG_MPC5121_ADS is not set
168# CONFIG_MPC5121_GENERIC is not set 169# CONFIG_MPC5121_GENERIC is not set
169# CONFIG_PPC_MPC52xx is not set 170# CONFIG_PPC_MPC52xx is not set
170CONFIG_PPC_PMAC=y
171# CONFIG_PPC_CELL is not set 171# CONFIG_PPC_CELL is not set
172# CONFIG_PPC_CELL_NATIVE is not set 172# CONFIG_PPC_CELL_NATIVE is not set
173# CONFIG_PPC_82xx is not set 173# CONFIG_PPC_82xx is not set
diff --git a/arch/powerpc/configs/83xx/mpc836x_mds_defconfig b/arch/powerpc/configs/83xx/mpc836x_mds_defconfig
index e029e9e14622..03d8cede0272 100644
--- a/arch/powerpc/configs/83xx/mpc836x_mds_defconfig
+++ b/arch/powerpc/configs/83xx/mpc836x_mds_defconfig
@@ -163,11 +163,11 @@ CONFIG_CLASSIC_RCU=y
163# 163#
164CONFIG_PPC_MULTIPLATFORM=y 164CONFIG_PPC_MULTIPLATFORM=y
165CONFIG_CLASSIC32=y 165CONFIG_CLASSIC32=y
166CONFIG_PPC_CHRP=y 166# CONFIG_PPC_CHRP is not set
167# CONFIG_PPC_PMAC is not set
167# CONFIG_MPC5121_ADS is not set 168# CONFIG_MPC5121_ADS is not set
168# CONFIG_MPC5121_GENERIC is not set 169# CONFIG_MPC5121_GENERIC is not set
169# CONFIG_PPC_MPC52xx is not set 170# CONFIG_PPC_MPC52xx is not set
170CONFIG_PPC_PMAC=y
171# CONFIG_PPC_CELL is not set 171# CONFIG_PPC_CELL is not set
172# CONFIG_PPC_CELL_NATIVE is not set 172# CONFIG_PPC_CELL_NATIVE is not set
173# CONFIG_PPC_82xx is not set 173# CONFIG_PPC_82xx is not set
@@ -383,7 +383,84 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
383# CONFIG_FW_LOADER is not set 383# CONFIG_FW_LOADER is not set
384# CONFIG_SYS_HYPERVISOR is not set 384# CONFIG_SYS_HYPERVISOR is not set
385# CONFIG_CONNECTOR is not set 385# CONFIG_CONNECTOR is not set
386# CONFIG_MTD is not set 386CONFIG_MTD=y
387# CONFIG_MTD_DEBUG is not set
388# CONFIG_MTD_CONCAT is not set
389CONFIG_MTD_PARTITIONS=y
390# CONFIG_MTD_REDBOOT_PARTS is not set
391CONFIG_MTD_CMDLINE_PARTS=y
392# CONFIG_MTD_OF_PARTS is not set
393# CONFIG_MTD_AR7_PARTS is not set
394
395#
396# User Modules And Translation Layers
397#
398CONFIG_MTD_CHAR=y
399CONFIG_MTD_BLKDEVS=y
400CONFIG_MTD_BLOCK=y
401# CONFIG_FTL is not set
402# CONFIG_NFTL is not set
403# CONFIG_INFTL is not set
404# CONFIG_RFD_FTL is not set
405# CONFIG_SSFDC is not set
406# CONFIG_MTD_OOPS is not set
407
408#
409# RAM/ROM/Flash chip drivers
410#
411CONFIG_MTD_CFI=y
412# CONFIG_MTD_JEDECPROBE is not set
413CONFIG_MTD_GEN_PROBE=y
414# CONFIG_MTD_CFI_ADV_OPTIONS is not set
415CONFIG_MTD_MAP_BANK_WIDTH_1=y
416CONFIG_MTD_MAP_BANK_WIDTH_2=y
417CONFIG_MTD_MAP_BANK_WIDTH_4=y
418# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
419# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
420# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
421CONFIG_MTD_CFI_I1=y
422CONFIG_MTD_CFI_I2=y
423# CONFIG_MTD_CFI_I4 is not set
424# CONFIG_MTD_CFI_I8 is not set
425# CONFIG_MTD_CFI_INTELEXT is not set
426CONFIG_MTD_CFI_AMDSTD=y
427# CONFIG_MTD_CFI_STAA is not set
428CONFIG_MTD_CFI_UTIL=y
429# CONFIG_MTD_RAM is not set
430# CONFIG_MTD_ROM is not set
431# CONFIG_MTD_ABSENT is not set
432
433#
434# Mapping drivers for chip access
435#
436# CONFIG_MTD_COMPLEX_MAPPINGS is not set
437# CONFIG_MTD_PHYSMAP is not set
438CONFIG_MTD_PHYSMAP_OF=y
439# CONFIG_MTD_INTEL_VR_NOR is not set
440# CONFIG_MTD_PLATRAM is not set
441
442#
443# Self-contained MTD device drivers
444#
445# CONFIG_MTD_PMC551 is not set
446# CONFIG_MTD_SLRAM is not set
447# CONFIG_MTD_PHRAM is not set
448# CONFIG_MTD_MTDRAM is not set
449# CONFIG_MTD_BLOCK2MTD is not set
450
451#
452# Disk-On-Chip Device Drivers
453#
454# CONFIG_MTD_DOC2000 is not set
455# CONFIG_MTD_DOC2001 is not set
456# CONFIG_MTD_DOC2001PLUS is not set
457# CONFIG_MTD_NAND is not set
458# CONFIG_MTD_ONENAND is not set
459
460#
461# UBI - Unsorted block images
462#
463# CONFIG_MTD_UBI is not set
387CONFIG_OF_DEVICE=y 464CONFIG_OF_DEVICE=y
388CONFIG_OF_I2C=y 465CONFIG_OF_I2C=y
389# CONFIG_PARPORT is not set 466# CONFIG_PARPORT is not set
diff --git a/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig b/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig
index 7d674be702fe..cdf84177370a 100644
--- a/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig
+++ b/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig
@@ -164,11 +164,11 @@ CONFIG_CLASSIC_RCU=y
164# 164#
165CONFIG_PPC_MULTIPLATFORM=y 165CONFIG_PPC_MULTIPLATFORM=y
166CONFIG_CLASSIC32=y 166CONFIG_CLASSIC32=y
167CONFIG_PPC_CHRP=y 167# CONFIG_PPC_CHRP is not set
168# CONFIG_PPC_PMAC is not set
168# CONFIG_MPC5121_ADS is not set 169# CONFIG_MPC5121_ADS is not set
169# CONFIG_MPC5121_GENERIC is not set 170# CONFIG_MPC5121_GENERIC is not set
170# CONFIG_PPC_MPC52xx is not set 171# CONFIG_PPC_MPC52xx is not set
171CONFIG_PPC_PMAC=y
172# CONFIG_PPC_CELL is not set 172# CONFIG_PPC_CELL is not set
173# CONFIG_PPC_CELL_NATIVE is not set 173# CONFIG_PPC_CELL_NATIVE is not set
174# CONFIG_PPC_82xx is not set 174# CONFIG_PPC_82xx is not set
diff --git a/arch/powerpc/configs/83xx/mpc837x_mds_defconfig b/arch/powerpc/configs/83xx/mpc837x_mds_defconfig
index de472022aa81..97e02d7a5b09 100644
--- a/arch/powerpc/configs/83xx/mpc837x_mds_defconfig
+++ b/arch/powerpc/configs/83xx/mpc837x_mds_defconfig
@@ -164,11 +164,11 @@ CONFIG_CLASSIC_RCU=y
164# 164#
165CONFIG_PPC_MULTIPLATFORM=y 165CONFIG_PPC_MULTIPLATFORM=y
166CONFIG_CLASSIC32=y 166CONFIG_CLASSIC32=y
167CONFIG_PPC_CHRP=y 167# CONFIG_PPC_CHRP is not set
168# CONFIG_PPC_PMAC is not set
168# CONFIG_MPC5121_ADS is not set 169# CONFIG_MPC5121_ADS is not set
169# CONFIG_MPC5121_GENERIC is not set 170# CONFIG_MPC5121_GENERIC is not set
170# CONFIG_PPC_MPC52xx is not set 171# CONFIG_PPC_MPC52xx is not set
171CONFIG_PPC_PMAC=y
172# CONFIG_PPC_CELL is not set 172# CONFIG_PPC_CELL is not set
173# CONFIG_PPC_CELL_NATIVE is not set 173# CONFIG_PPC_CELL_NATIVE is not set
174# CONFIG_PPC_82xx is not set 174# CONFIG_PPC_82xx is not set
diff --git a/arch/powerpc/configs/83xx/mpc837x_rdb_defconfig b/arch/powerpc/configs/83xx/mpc837x_rdb_defconfig
index e8d2d691d26c..5ac33054ce2c 100644
--- a/arch/powerpc/configs/83xx/mpc837x_rdb_defconfig
+++ b/arch/powerpc/configs/83xx/mpc837x_rdb_defconfig
@@ -164,11 +164,11 @@ CONFIG_CLASSIC_RCU=y
164# 164#
165CONFIG_PPC_MULTIPLATFORM=y 165CONFIG_PPC_MULTIPLATFORM=y
166CONFIG_CLASSIC32=y 166CONFIG_CLASSIC32=y
167CONFIG_PPC_CHRP=y 167# CONFIG_PPC_CHRP is not set
168# CONFIG_PPC_PMAC is not set
168# CONFIG_MPC5121_ADS is not set 169# CONFIG_MPC5121_ADS is not set
169# CONFIG_MPC5121_GENERIC is not set 170# CONFIG_MPC5121_GENERIC is not set
170# CONFIG_PPC_MPC52xx is not set 171# CONFIG_PPC_MPC52xx is not set
171CONFIG_PPC_PMAC=y
172# CONFIG_PPC_CELL is not set 172# CONFIG_PPC_CELL is not set
173# CONFIG_PPC_CELL_NATIVE is not set 173# CONFIG_PPC_CELL_NATIVE is not set
174# CONFIG_PPC_82xx is not set 174# CONFIG_PPC_82xx is not set
diff --git a/arch/powerpc/configs/83xx/sbc834x_defconfig b/arch/powerpc/configs/83xx/sbc834x_defconfig
index 9245a67da200..c359cc2a380e 100644
--- a/arch/powerpc/configs/83xx/sbc834x_defconfig
+++ b/arch/powerpc/configs/83xx/sbc834x_defconfig
@@ -162,11 +162,11 @@ CONFIG_CLASSIC_RCU=y
162# 162#
163CONFIG_PPC_MULTIPLATFORM=y 163CONFIG_PPC_MULTIPLATFORM=y
164CONFIG_CLASSIC32=y 164CONFIG_CLASSIC32=y
165CONFIG_PPC_CHRP=y 165# CONFIG_PPC_CHRP is not set
166# CONFIG_PPC_PMAC is not set
166# CONFIG_MPC5121_ADS is not set 167# CONFIG_MPC5121_ADS is not set
167# CONFIG_MPC5121_GENERIC is not set 168# CONFIG_MPC5121_GENERIC is not set
168# CONFIG_PPC_MPC52xx is not set 169# CONFIG_PPC_MPC52xx is not set
169CONFIG_PPC_PMAC=y
170# CONFIG_PPC_CELL is not set 170# CONFIG_PPC_CELL is not set
171# CONFIG_PPC_CELL_NATIVE is not set 171# CONFIG_PPC_CELL_NATIVE is not set
172# CONFIG_PPC_82xx is not set 172# CONFIG_PPC_82xx is not set
diff --git a/arch/powerpc/configs/86xx/gef_sbc610_defconfig b/arch/powerpc/configs/86xx/gef_sbc610_defconfig
new file mode 100644
index 000000000000..312d7afbbe44
--- /dev/null
+++ b/arch/powerpc/configs/86xx/gef_sbc610_defconfig
@@ -0,0 +1,1657 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.26-rc5
4# Wed Jun 11 12:06:53 2008
5#
6# CONFIG_PPC64 is not set
7
8#
9# Processor support
10#
11CONFIG_6xx=y
12# CONFIG_PPC_85xx is not set
13# CONFIG_PPC_8xx is not set
14# CONFIG_40x is not set
15# CONFIG_44x is not set
16# CONFIG_E200 is not set
17CONFIG_PPC_FPU=y
18CONFIG_ALTIVEC=y
19CONFIG_PPC_STD_MMU=y
20CONFIG_PPC_STD_MMU_32=y
21# CONFIG_PPC_MM_SLICES is not set
22CONFIG_SMP=y
23CONFIG_NR_CPUS=2
24CONFIG_PPC32=y
25CONFIG_WORD_SIZE=32
26CONFIG_PPC_MERGE=y
27CONFIG_MMU=y
28CONFIG_GENERIC_CMOS_UPDATE=y
29CONFIG_GENERIC_TIME=y
30CONFIG_GENERIC_TIME_VSYSCALL=y
31CONFIG_GENERIC_CLOCKEVENTS=y
32CONFIG_GENERIC_HARDIRQS=y
33# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
34CONFIG_IRQ_PER_CPU=y
35CONFIG_STACKTRACE_SUPPORT=y
36CONFIG_LOCKDEP_SUPPORT=y
37CONFIG_RWSEM_XCHGADD_ALGORITHM=y
38CONFIG_GENERIC_LOCKBREAK=y
39CONFIG_ARCH_HAS_ILOG2_U32=y
40CONFIG_GENERIC_HWEIGHT=y
41CONFIG_GENERIC_CALIBRATE_DELAY=y
42CONFIG_GENERIC_FIND_NEXT_BIT=y
43# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
44CONFIG_PPC=y
45CONFIG_EARLY_PRINTK=y
46CONFIG_GENERIC_NVRAM=y
47CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
48CONFIG_ARCH_MAY_HAVE_PC_FDC=y
49CONFIG_PPC_OF=y
50CONFIG_OF=y
51CONFIG_PPC_UDBG_16550=y
52CONFIG_GENERIC_TBSYNC=y
53CONFIG_AUDIT_ARCH=y
54CONFIG_GENERIC_BUG=y
55CONFIG_DEFAULT_UIMAGE=y
56# CONFIG_PPC_DCR_NATIVE is not set
57# CONFIG_PPC_DCR_MMIO is not set
58CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
59
60#
61# General setup
62#
63CONFIG_EXPERIMENTAL=y
64CONFIG_LOCK_KERNEL=y
65CONFIG_INIT_ENV_ARG_LIMIT=32
66CONFIG_LOCALVERSION=""
67CONFIG_LOCALVERSION_AUTO=y
68CONFIG_SWAP=y
69CONFIG_SYSVIPC=y
70CONFIG_SYSVIPC_SYSCTL=y
71CONFIG_POSIX_MQUEUE=y
72CONFIG_BSD_PROCESS_ACCT=y
73CONFIG_BSD_PROCESS_ACCT_V3=y
74# CONFIG_TASKSTATS is not set
75# CONFIG_AUDIT is not set
76CONFIG_IKCONFIG=y
77CONFIG_IKCONFIG_PROC=y
78CONFIG_LOG_BUF_SHIFT=14
79# CONFIG_CGROUPS is not set
80CONFIG_GROUP_SCHED=y
81CONFIG_FAIR_GROUP_SCHED=y
82# CONFIG_RT_GROUP_SCHED is not set
83CONFIG_USER_SCHED=y
84# CONFIG_CGROUP_SCHED is not set
85CONFIG_SYSFS_DEPRECATED=y
86CONFIG_SYSFS_DEPRECATED_V2=y
87CONFIG_RELAY=y
88# CONFIG_NAMESPACES is not set
89CONFIG_BLK_DEV_INITRD=y
90CONFIG_INITRAMFS_SOURCE=""
91# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
92CONFIG_SYSCTL=y
93CONFIG_EMBEDDED=y
94CONFIG_SYSCTL_SYSCALL=y
95CONFIG_SYSCTL_SYSCALL_CHECK=y
96CONFIG_KALLSYMS=y
97# CONFIG_KALLSYMS_ALL is not set
98# CONFIG_KALLSYMS_EXTRA_PASS is not set
99CONFIG_HOTPLUG=y
100CONFIG_PRINTK=y
101CONFIG_BUG=y
102CONFIG_ELF_CORE=y
103CONFIG_COMPAT_BRK=y
104CONFIG_BASE_FULL=y
105CONFIG_FUTEX=y
106CONFIG_ANON_INODES=y
107CONFIG_EPOLL=y
108CONFIG_SIGNALFD=y
109CONFIG_TIMERFD=y
110CONFIG_EVENTFD=y
111CONFIG_SHMEM=y
112CONFIG_VM_EVENT_COUNTERS=y
113CONFIG_SLAB=y
114# CONFIG_SLUB is not set
115# CONFIG_SLOB is not set
116# CONFIG_PROFILING is not set
117# CONFIG_MARKERS is not set
118CONFIG_HAVE_OPROFILE=y
119# CONFIG_KPROBES is not set
120CONFIG_HAVE_KPROBES=y
121CONFIG_HAVE_KRETPROBES=y
122# CONFIG_HAVE_DMA_ATTRS is not set
123CONFIG_PROC_PAGE_MONITOR=y
124CONFIG_SLABINFO=y
125CONFIG_RT_MUTEXES=y
126# CONFIG_TINY_SHMEM is not set
127CONFIG_BASE_SMALL=0
128CONFIG_MODULES=y
129# CONFIG_MODULE_FORCE_LOAD is not set
130CONFIG_MODULE_UNLOAD=y
131# CONFIG_MODULE_FORCE_UNLOAD is not set
132# CONFIG_MODVERSIONS is not set
133# CONFIG_MODULE_SRCVERSION_ALL is not set
134CONFIG_KMOD=y
135CONFIG_STOP_MACHINE=y
136CONFIG_BLOCK=y
137# CONFIG_LBD is not set
138# CONFIG_BLK_DEV_IO_TRACE is not set
139# CONFIG_LSF is not set
140# CONFIG_BLK_DEV_BSG is not set
141
142#
143# IO Schedulers
144#
145CONFIG_IOSCHED_NOOP=y
146CONFIG_IOSCHED_AS=y
147CONFIG_IOSCHED_DEADLINE=y
148CONFIG_IOSCHED_CFQ=y
149# CONFIG_DEFAULT_AS is not set
150# CONFIG_DEFAULT_DEADLINE is not set
151CONFIG_DEFAULT_CFQ=y
152# CONFIG_DEFAULT_NOOP is not set
153CONFIG_DEFAULT_IOSCHED="cfq"
154CONFIG_CLASSIC_RCU=y
155
156#
157# Platform support
158#
159CONFIG_PPC_MULTIPLATFORM=y
160CONFIG_CLASSIC32=y
161# CONFIG_PPC_CHRP is not set
162# CONFIG_PPC_PMAC is not set
163# CONFIG_PPC_82xx is not set
164# CONFIG_PPC_83xx is not set
165CONFIG_PPC_86xx=y
166# CONFIG_PPC_MPC512x is not set
167# CONFIG_PPC_MPC5121 is not set
168# CONFIG_PPC_CELL is not set
169# CONFIG_PPC_CELL_NATIVE is not set
170# CONFIG_PQ2ADS is not set
171# CONFIG_MPC8641_HPCN is not set
172# CONFIG_SBC8641D is not set
173# CONFIG_MPC8610_HPCD is not set
174CONFIG_GEF_SBC610=y
175CONFIG_MPC8641=y
176# CONFIG_IPIC is not set
177CONFIG_MPIC=y
178# CONFIG_MPIC_WEIRD is not set
179# CONFIG_PPC_I8259 is not set
180# CONFIG_PPC_RTAS is not set
181# CONFIG_MMIO_NVRAM is not set
182# CONFIG_PPC_MPC106 is not set
183# CONFIG_PPC_970_NAP is not set
184# CONFIG_PPC_INDIRECT_IO is not set
185# CONFIG_GENERIC_IOMAP is not set
186# CONFIG_CPU_FREQ is not set
187# CONFIG_FSL_ULI1575 is not set
188
189#
190# Kernel options
191#
192# CONFIG_HIGHMEM is not set
193CONFIG_TICK_ONESHOT=y
194# CONFIG_NO_HZ is not set
195CONFIG_HIGH_RES_TIMERS=y
196CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
197# CONFIG_HZ_100 is not set
198# CONFIG_HZ_250 is not set
199# CONFIG_HZ_300 is not set
200CONFIG_HZ_1000=y
201CONFIG_HZ=1000
202# CONFIG_SCHED_HRTICK is not set
203# CONFIG_PREEMPT_NONE is not set
204# CONFIG_PREEMPT_VOLUNTARY is not set
205CONFIG_PREEMPT=y
206# CONFIG_PREEMPT_RCU is not set
207CONFIG_BINFMT_ELF=y
208CONFIG_BINFMT_MISC=m
209# CONFIG_IOMMU_HELPER is not set
210CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
211CONFIG_ARCH_HAS_WALK_MEMORY=y
212CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
213CONFIG_IRQ_ALL_CPUS=y
214CONFIG_ARCH_FLATMEM_ENABLE=y
215CONFIG_ARCH_POPULATES_NODE_MAP=y
216CONFIG_SELECT_MEMORY_MODEL=y
217CONFIG_FLATMEM_MANUAL=y
218# CONFIG_DISCONTIGMEM_MANUAL is not set
219# CONFIG_SPARSEMEM_MANUAL is not set
220CONFIG_FLATMEM=y
221CONFIG_FLAT_NODE_MEM_MAP=y
222# CONFIG_SPARSEMEM_STATIC is not set
223# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
224CONFIG_PAGEFLAGS_EXTENDED=y
225CONFIG_SPLIT_PTLOCK_CPUS=4
226# CONFIG_RESOURCES_64BIT is not set
227CONFIG_ZONE_DMA_FLAG=1
228CONFIG_BOUNCE=y
229CONFIG_VIRT_TO_BUS=y
230CONFIG_FORCE_MAX_ZONEORDER=11
231# CONFIG_PROC_DEVICETREE is not set
232# CONFIG_CMDLINE_BOOL is not set
233# CONFIG_PM is not set
234CONFIG_SECCOMP=y
235CONFIG_ISA_DMA_API=y
236
237#
238# Bus options
239#
240CONFIG_ZONE_DMA=y
241CONFIG_GENERIC_ISA_DMA=y
242CONFIG_PPC_INDIRECT_PCI=y
243CONFIG_FSL_SOC=y
244CONFIG_FSL_PCI=y
245CONFIG_PCI=y
246CONFIG_PCI_DOMAINS=y
247CONFIG_PCI_SYSCALL=y
248CONFIG_PCIEPORTBUS=y
249CONFIG_PCIEAER=y
250# CONFIG_PCIEASPM is not set
251CONFIG_ARCH_SUPPORTS_MSI=y
252# CONFIG_PCI_MSI is not set
253CONFIG_PCI_LEGACY=y
254CONFIG_PCI_DEBUG=y
255# CONFIG_PCCARD is not set
256# CONFIG_HOTPLUG_PCI is not set
257CONFIG_HAS_RAPIDIO=y
258# CONFIG_RAPIDIO is not set
259
260#
261# Advanced setup
262#
263# CONFIG_ADVANCED_OPTIONS is not set
264
265#
266# Default settings for advanced configuration options are used
267#
268CONFIG_LOWMEM_SIZE=0x30000000
269CONFIG_PAGE_OFFSET=0xc0000000
270CONFIG_KERNEL_START=0xc0000000
271CONFIG_PHYSICAL_START=0x00000000
272CONFIG_TASK_SIZE=0xc0000000
273
274#
275# Networking
276#
277CONFIG_NET=y
278
279#
280# Networking options
281#
282CONFIG_PACKET=y
283CONFIG_PACKET_MMAP=y
284CONFIG_UNIX=y
285CONFIG_XFRM=y
286CONFIG_XFRM_USER=m
287# CONFIG_XFRM_SUB_POLICY is not set
288# CONFIG_XFRM_MIGRATE is not set
289# CONFIG_XFRM_STATISTICS is not set
290CONFIG_NET_KEY=m
291# CONFIG_NET_KEY_MIGRATE is not set
292CONFIG_INET=y
293CONFIG_IP_MULTICAST=y
294CONFIG_IP_ADVANCED_ROUTER=y
295CONFIG_ASK_IP_FIB_HASH=y
296# CONFIG_IP_FIB_TRIE is not set
297CONFIG_IP_FIB_HASH=y
298CONFIG_IP_MULTIPLE_TABLES=y
299CONFIG_IP_ROUTE_MULTIPATH=y
300CONFIG_IP_ROUTE_VERBOSE=y
301CONFIG_IP_PNP=y
302CONFIG_IP_PNP_DHCP=y
303CONFIG_IP_PNP_BOOTP=y
304CONFIG_IP_PNP_RARP=y
305CONFIG_NET_IPIP=m
306CONFIG_NET_IPGRE=m
307CONFIG_NET_IPGRE_BROADCAST=y
308CONFIG_IP_MROUTE=y
309CONFIG_IP_PIMSM_V1=y
310CONFIG_IP_PIMSM_V2=y
311# CONFIG_ARPD is not set
312CONFIG_SYN_COOKIES=y
313CONFIG_INET_AH=m
314CONFIG_INET_ESP=m
315CONFIG_INET_IPCOMP=m
316CONFIG_INET_XFRM_TUNNEL=m
317CONFIG_INET_TUNNEL=m
318CONFIG_INET_XFRM_MODE_TRANSPORT=y
319CONFIG_INET_XFRM_MODE_TUNNEL=y
320CONFIG_INET_XFRM_MODE_BEET=y
321# CONFIG_INET_LRO is not set
322CONFIG_INET_DIAG=y
323CONFIG_INET_TCP_DIAG=y
324# CONFIG_TCP_CONG_ADVANCED is not set
325CONFIG_TCP_CONG_CUBIC=y
326CONFIG_DEFAULT_TCP_CONG="cubic"
327# CONFIG_TCP_MD5SIG is not set
328# CONFIG_IP_VS is not set
329CONFIG_IPV6=m
330# CONFIG_IPV6_PRIVACY is not set
331# CONFIG_IPV6_ROUTER_PREF is not set
332# CONFIG_IPV6_OPTIMISTIC_DAD is not set
333CONFIG_INET6_AH=m
334CONFIG_INET6_ESP=m
335CONFIG_INET6_IPCOMP=m
336# CONFIG_IPV6_MIP6 is not set
337CONFIG_INET6_XFRM_TUNNEL=m
338CONFIG_INET6_TUNNEL=m
339CONFIG_INET6_XFRM_MODE_TRANSPORT=m
340CONFIG_INET6_XFRM_MODE_TUNNEL=m
341CONFIG_INET6_XFRM_MODE_BEET=m
342# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
343CONFIG_IPV6_SIT=m
344CONFIG_IPV6_NDISC_NODETYPE=y
345CONFIG_IPV6_TUNNEL=m
346# CONFIG_IPV6_MULTIPLE_TABLES is not set
347# CONFIG_IPV6_MROUTE is not set
348# CONFIG_NETLABEL is not set
349# CONFIG_NETWORK_SECMARK is not set
350CONFIG_NETFILTER=y
351# CONFIG_NETFILTER_DEBUG is not set
352CONFIG_NETFILTER_ADVANCED=y
353CONFIG_BRIDGE_NETFILTER=y
354
355#
356# Core Netfilter Configuration
357#
358# CONFIG_NETFILTER_NETLINK_QUEUE is not set
359# CONFIG_NETFILTER_NETLINK_LOG is not set
360# CONFIG_NF_CONNTRACK is not set
361CONFIG_NETFILTER_XTABLES=m
362# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set
363# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
364# CONFIG_NETFILTER_XT_TARGET_MARK is not set
365# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set
366# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
367# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set
368# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
369# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set
370# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
371# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set
372# CONFIG_NETFILTER_XT_MATCH_DCCP is not set
373# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
374# CONFIG_NETFILTER_XT_MATCH_ESP is not set
375# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set
376# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set
377# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set
378# CONFIG_NETFILTER_XT_MATCH_MAC is not set
379# CONFIG_NETFILTER_XT_MATCH_MARK is not set
380# CONFIG_NETFILTER_XT_MATCH_OWNER is not set
381# CONFIG_NETFILTER_XT_MATCH_POLICY is not set
382# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set
383# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
384# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set
385# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set
386# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set
387# CONFIG_NETFILTER_XT_MATCH_REALM is not set
388# CONFIG_NETFILTER_XT_MATCH_SCTP is not set
389# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set
390# CONFIG_NETFILTER_XT_MATCH_STRING is not set
391# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set
392# CONFIG_NETFILTER_XT_MATCH_TIME is not set
393# CONFIG_NETFILTER_XT_MATCH_U32 is not set
394# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set
395
396#
397# IP: Netfilter Configuration
398#
399CONFIG_IP_NF_QUEUE=m
400CONFIG_IP_NF_IPTABLES=m
401CONFIG_IP_NF_MATCH_RECENT=m
402CONFIG_IP_NF_MATCH_ECN=m
403# CONFIG_IP_NF_MATCH_AH is not set
404CONFIG_IP_NF_MATCH_TTL=m
405CONFIG_IP_NF_MATCH_ADDRTYPE=m
406CONFIG_IP_NF_FILTER=m
407CONFIG_IP_NF_TARGET_REJECT=m
408CONFIG_IP_NF_TARGET_LOG=m
409CONFIG_IP_NF_TARGET_ULOG=m
410CONFIG_IP_NF_MANGLE=m
411CONFIG_IP_NF_TARGET_ECN=m
412# CONFIG_IP_NF_TARGET_TTL is not set
413CONFIG_IP_NF_RAW=m
414CONFIG_IP_NF_ARPTABLES=m
415CONFIG_IP_NF_ARPFILTER=m
416CONFIG_IP_NF_ARP_MANGLE=m
417
418#
419# IPv6: Netfilter Configuration
420#
421CONFIG_IP6_NF_QUEUE=m
422CONFIG_IP6_NF_IPTABLES=m
423CONFIG_IP6_NF_MATCH_RT=m
424CONFIG_IP6_NF_MATCH_OPTS=m
425CONFIG_IP6_NF_MATCH_FRAG=m
426CONFIG_IP6_NF_MATCH_HL=m
427CONFIG_IP6_NF_MATCH_IPV6HEADER=m
428# CONFIG_IP6_NF_MATCH_AH is not set
429# CONFIG_IP6_NF_MATCH_MH is not set
430CONFIG_IP6_NF_MATCH_EUI64=m
431CONFIG_IP6_NF_FILTER=m
432CONFIG_IP6_NF_TARGET_LOG=m
433# CONFIG_IP6_NF_TARGET_REJECT is not set
434CONFIG_IP6_NF_MANGLE=m
435# CONFIG_IP6_NF_TARGET_HL is not set
436CONFIG_IP6_NF_RAW=m
437
438#
439# Bridge: Netfilter Configuration
440#
441# CONFIG_BRIDGE_NF_EBTABLES is not set
442# CONFIG_IP_DCCP is not set
443CONFIG_IP_SCTP=m
444# CONFIG_SCTP_DBG_MSG is not set
445# CONFIG_SCTP_DBG_OBJCNT is not set
446# CONFIG_SCTP_HMAC_NONE is not set
447# CONFIG_SCTP_HMAC_SHA1 is not set
448CONFIG_SCTP_HMAC_MD5=y
449CONFIG_TIPC=m
450# CONFIG_TIPC_ADVANCED is not set
451# CONFIG_TIPC_DEBUG is not set
452CONFIG_ATM=m
453CONFIG_ATM_CLIP=m
454# CONFIG_ATM_CLIP_NO_ICMP is not set
455CONFIG_ATM_LANE=m
456CONFIG_ATM_MPOA=m
457CONFIG_ATM_BR2684=m
458# CONFIG_ATM_BR2684_IPFILTER is not set
459CONFIG_BRIDGE=m
460CONFIG_VLAN_8021Q=m
461# CONFIG_DECNET is not set
462CONFIG_LLC=m
463# CONFIG_LLC2 is not set
464# CONFIG_IPX is not set
465# CONFIG_ATALK is not set
466# CONFIG_X25 is not set
467# CONFIG_LAPB is not set
468# CONFIG_ECONET is not set
469CONFIG_WAN_ROUTER=m
470CONFIG_NET_SCHED=y
471
472#
473# Queueing/Scheduling
474#
475CONFIG_NET_SCH_CBQ=m
476CONFIG_NET_SCH_HTB=m
477CONFIG_NET_SCH_HFSC=m
478CONFIG_NET_SCH_ATM=m
479CONFIG_NET_SCH_PRIO=m
480# CONFIG_NET_SCH_RR is not set
481CONFIG_NET_SCH_RED=m
482CONFIG_NET_SCH_SFQ=m
483CONFIG_NET_SCH_TEQL=m
484CONFIG_NET_SCH_TBF=m
485CONFIG_NET_SCH_GRED=m
486CONFIG_NET_SCH_DSMARK=m
487CONFIG_NET_SCH_NETEM=m
488
489#
490# Classification
491#
492CONFIG_NET_CLS=y
493# CONFIG_NET_CLS_BASIC is not set
494CONFIG_NET_CLS_TCINDEX=m
495CONFIG_NET_CLS_ROUTE4=m
496CONFIG_NET_CLS_ROUTE=y
497CONFIG_NET_CLS_FW=m
498CONFIG_NET_CLS_U32=m
499# CONFIG_CLS_U32_PERF is not set
500# CONFIG_CLS_U32_MARK is not set
501CONFIG_NET_CLS_RSVP=m
502CONFIG_NET_CLS_RSVP6=m
503# CONFIG_NET_CLS_FLOW is not set
504# CONFIG_NET_EMATCH is not set
505# CONFIG_NET_CLS_ACT is not set
506# CONFIG_NET_CLS_IND is not set
507CONFIG_NET_SCH_FIFO=y
508
509#
510# Network testing
511#
512CONFIG_NET_PKTGEN=m
513# CONFIG_HAMRADIO is not set
514# CONFIG_CAN is not set
515# CONFIG_IRDA is not set
516# CONFIG_BT is not set
517# CONFIG_AF_RXRPC is not set
518CONFIG_FIB_RULES=y
519
520#
521# Wireless
522#
523# CONFIG_CFG80211 is not set
524# CONFIG_WIRELESS_EXT is not set
525# CONFIG_MAC80211 is not set
526# CONFIG_IEEE80211 is not set
527# CONFIG_RFKILL is not set
528# CONFIG_NET_9P is not set
529
530#
531# Device Drivers
532#
533
534#
535# Generic Driver Options
536#
537CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
538CONFIG_STANDALONE=y
539CONFIG_PREVENT_FIRMWARE_BUILD=y
540# CONFIG_FW_LOADER is not set
541# CONFIG_DEBUG_DRIVER is not set
542# CONFIG_DEBUG_DEVRES is not set
543# CONFIG_SYS_HYPERVISOR is not set
544# CONFIG_CONNECTOR is not set
545CONFIG_MTD=y
546# CONFIG_MTD_DEBUG is not set
547CONFIG_MTD_CONCAT=y
548CONFIG_MTD_PARTITIONS=y
549# CONFIG_MTD_REDBOOT_PARTS is not set
550# CONFIG_MTD_CMDLINE_PARTS is not set
551# CONFIG_MTD_OF_PARTS is not set
552# CONFIG_MTD_AR7_PARTS is not set
553
554#
555# User Modules And Translation Layers
556#
557CONFIG_MTD_CHAR=y
558CONFIG_MTD_BLKDEVS=y
559CONFIG_MTD_BLOCK=y
560# CONFIG_FTL is not set
561# CONFIG_NFTL is not set
562# CONFIG_INFTL is not set
563# CONFIG_RFD_FTL is not set
564# CONFIG_SSFDC is not set
565# CONFIG_MTD_OOPS is not set
566
567#
568# RAM/ROM/Flash chip drivers
569#
570CONFIG_MTD_CFI=y
571# CONFIG_MTD_JEDECPROBE is not set
572CONFIG_MTD_GEN_PROBE=y
573CONFIG_MTD_CFI_ADV_OPTIONS=y
574# CONFIG_MTD_CFI_NOSWAP is not set
575# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
576CONFIG_MTD_CFI_LE_BYTE_SWAP=y
577# CONFIG_MTD_CFI_GEOMETRY is not set
578CONFIG_MTD_MAP_BANK_WIDTH_1=y
579CONFIG_MTD_MAP_BANK_WIDTH_2=y
580CONFIG_MTD_MAP_BANK_WIDTH_4=y
581# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
582# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
583# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
584CONFIG_MTD_CFI_I1=y
585CONFIG_MTD_CFI_I2=y
586# CONFIG_MTD_CFI_I4 is not set
587# CONFIG_MTD_CFI_I8 is not set
588# CONFIG_MTD_OTP is not set
589CONFIG_MTD_CFI_INTELEXT=y
590CONFIG_MTD_CFI_AMDSTD=y
591# CONFIG_MTD_CFI_STAA is not set
592CONFIG_MTD_CFI_UTIL=y
593# CONFIG_MTD_RAM is not set
594# CONFIG_MTD_ROM is not set
595# CONFIG_MTD_ABSENT is not set
596
597#
598# Mapping drivers for chip access
599#
600# CONFIG_MTD_COMPLEX_MAPPINGS is not set
601# CONFIG_MTD_PHYSMAP is not set
602CONFIG_MTD_PHYSMAP_OF=y
603# CONFIG_MTD_INTEL_VR_NOR is not set
604# CONFIG_MTD_PLATRAM is not set
605
606#
607# Self-contained MTD device drivers
608#
609# CONFIG_MTD_PMC551 is not set
610# CONFIG_MTD_SLRAM is not set
611# CONFIG_MTD_PHRAM is not set
612# CONFIG_MTD_MTDRAM is not set
613# CONFIG_MTD_BLOCK2MTD is not set
614
615#
616# Disk-On-Chip Device Drivers
617#
618# CONFIG_MTD_DOC2000 is not set
619# CONFIG_MTD_DOC2001 is not set
620# CONFIG_MTD_DOC2001PLUS is not set
621# CONFIG_MTD_NAND is not set
622# CONFIG_MTD_ONENAND is not set
623
624#
625# UBI - Unsorted block images
626#
627# CONFIG_MTD_UBI is not set
628CONFIG_OF_DEVICE=y
629CONFIG_OF_I2C=y
630# CONFIG_PARPORT is not set
631CONFIG_BLK_DEV=y
632# CONFIG_BLK_DEV_FD is not set
633# CONFIG_BLK_CPQ_DA is not set
634# CONFIG_BLK_CPQ_CISS_DA is not set
635# CONFIG_BLK_DEV_DAC960 is not set
636# CONFIG_BLK_DEV_UMEM is not set
637# CONFIG_BLK_DEV_COW_COMMON is not set
638CONFIG_BLK_DEV_LOOP=m
639CONFIG_BLK_DEV_CRYPTOLOOP=m
640CONFIG_BLK_DEV_NBD=m
641# CONFIG_BLK_DEV_SX8 is not set
642# CONFIG_BLK_DEV_UB is not set
643CONFIG_BLK_DEV_RAM=y
644CONFIG_BLK_DEV_RAM_COUNT=16
645CONFIG_BLK_DEV_RAM_SIZE=131072
646# CONFIG_BLK_DEV_XIP is not set
647# CONFIG_CDROM_PKTCDVD is not set
648# CONFIG_ATA_OVER_ETH is not set
649CONFIG_MISC_DEVICES=y
650# CONFIG_PHANTOM is not set
651# CONFIG_EEPROM_93CX6 is not set
652# CONFIG_SGI_IOC4 is not set
653# CONFIG_TIFM_CORE is not set
654# CONFIG_ENCLOSURE_SERVICES is not set
655CONFIG_HAVE_IDE=y
656# CONFIG_IDE is not set
657
658#
659# SCSI device support
660#
661# CONFIG_RAID_ATTRS is not set
662CONFIG_SCSI=y
663CONFIG_SCSI_DMA=y
664# CONFIG_SCSI_TGT is not set
665# CONFIG_SCSI_NETLINK is not set
666CONFIG_SCSI_PROC_FS=y
667
668#
669# SCSI support type (disk, tape, CD-ROM)
670#
671CONFIG_BLK_DEV_SD=y
672CONFIG_CHR_DEV_ST=y
673# CONFIG_CHR_DEV_OSST is not set
674CONFIG_BLK_DEV_SR=y
675# CONFIG_BLK_DEV_SR_VENDOR is not set
676# CONFIG_CHR_DEV_SG is not set
677# CONFIG_CHR_DEV_SCH is not set
678
679#
680# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
681#
682# CONFIG_SCSI_MULTI_LUN is not set
683# CONFIG_SCSI_CONSTANTS is not set
684# CONFIG_SCSI_LOGGING is not set
685# CONFIG_SCSI_SCAN_ASYNC is not set
686CONFIG_SCSI_WAIT_SCAN=m
687
688#
689# SCSI Transports
690#
691# CONFIG_SCSI_SPI_ATTRS is not set
692# CONFIG_SCSI_FC_ATTRS is not set
693# CONFIG_SCSI_ISCSI_ATTRS is not set
694# CONFIG_SCSI_SAS_LIBSAS is not set
695# CONFIG_SCSI_SRP_ATTRS is not set
696CONFIG_SCSI_LOWLEVEL=y
697# CONFIG_ISCSI_TCP is not set
698# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
699# CONFIG_SCSI_3W_9XXX is not set
700# CONFIG_SCSI_ACARD is not set
701# CONFIG_SCSI_AACRAID is not set
702# CONFIG_SCSI_AIC7XXX is not set
703# CONFIG_SCSI_AIC7XXX_OLD is not set
704# CONFIG_SCSI_AIC79XX is not set
705# CONFIG_SCSI_AIC94XX is not set
706# CONFIG_SCSI_DPT_I2O is not set
707# CONFIG_SCSI_ADVANSYS is not set
708# CONFIG_SCSI_ARCMSR is not set
709# CONFIG_MEGARAID_NEWGEN is not set
710# CONFIG_MEGARAID_LEGACY is not set
711# CONFIG_MEGARAID_SAS is not set
712# CONFIG_SCSI_HPTIOP is not set
713# CONFIG_SCSI_BUSLOGIC is not set
714# CONFIG_SCSI_DMX3191D is not set
715# CONFIG_SCSI_EATA is not set
716# CONFIG_SCSI_FUTURE_DOMAIN is not set
717# CONFIG_SCSI_GDTH is not set
718# CONFIG_SCSI_IPS is not set
719# CONFIG_SCSI_INITIO is not set
720# CONFIG_SCSI_INIA100 is not set
721# CONFIG_SCSI_MVSAS is not set
722# CONFIG_SCSI_STEX is not set
723# CONFIG_SCSI_SYM53C8XX_2 is not set
724# CONFIG_SCSI_IPR is not set
725# CONFIG_SCSI_QLOGIC_1280 is not set
726# CONFIG_SCSI_QLA_FC is not set
727# CONFIG_SCSI_QLA_ISCSI is not set
728# CONFIG_SCSI_LPFC is not set
729# CONFIG_SCSI_DC395x is not set
730# CONFIG_SCSI_DC390T is not set
731# CONFIG_SCSI_NSP32 is not set
732# CONFIG_SCSI_DEBUG is not set
733# CONFIG_SCSI_SRP is not set
734CONFIG_ATA=y
735# CONFIG_ATA_NONSTANDARD is not set
736CONFIG_SATA_PMP=y
737# CONFIG_SATA_AHCI is not set
738# CONFIG_SATA_SIL24 is not set
739# CONFIG_SATA_FSL is not set
740CONFIG_ATA_SFF=y
741# CONFIG_SATA_SVW is not set
742# CONFIG_ATA_PIIX is not set
743# CONFIG_SATA_MV is not set
744# CONFIG_SATA_NV is not set
745# CONFIG_PDC_ADMA is not set
746# CONFIG_SATA_QSTOR is not set
747# CONFIG_SATA_PROMISE is not set
748# CONFIG_SATA_SX4 is not set
749CONFIG_SATA_SIL=y
750# CONFIG_SATA_SIS is not set
751# CONFIG_SATA_ULI is not set
752# CONFIG_SATA_VIA is not set
753# CONFIG_SATA_VITESSE is not set
754# CONFIG_SATA_INIC162X is not set
755# CONFIG_PATA_ALI is not set
756# CONFIG_PATA_AMD is not set
757# CONFIG_PATA_ARTOP is not set
758# CONFIG_PATA_ATIIXP is not set
759# CONFIG_PATA_CMD640_PCI is not set
760# CONFIG_PATA_CMD64X is not set
761# CONFIG_PATA_CS5520 is not set
762# CONFIG_PATA_CS5530 is not set
763# CONFIG_PATA_CYPRESS is not set
764# CONFIG_PATA_EFAR is not set
765# CONFIG_ATA_GENERIC is not set
766# CONFIG_PATA_HPT366 is not set
767# CONFIG_PATA_HPT37X is not set
768# CONFIG_PATA_HPT3X2N is not set
769# CONFIG_PATA_HPT3X3 is not set
770# CONFIG_PATA_IT821X is not set
771# CONFIG_PATA_IT8213 is not set
772# CONFIG_PATA_JMICRON is not set
773# CONFIG_PATA_TRIFLEX is not set
774# CONFIG_PATA_MARVELL is not set
775# CONFIG_PATA_MPIIX is not set
776# CONFIG_PATA_OLDPIIX is not set
777# CONFIG_PATA_NETCELL is not set
778# CONFIG_PATA_NINJA32 is not set
779# CONFIG_PATA_NS87410 is not set
780# CONFIG_PATA_NS87415 is not set
781# CONFIG_PATA_OPTI is not set
782# CONFIG_PATA_OPTIDMA is not set
783# CONFIG_PATA_PDC_OLD is not set
784# CONFIG_PATA_RADISYS is not set
785# CONFIG_PATA_RZ1000 is not set
786# CONFIG_PATA_SC1200 is not set
787# CONFIG_PATA_SERVERWORKS is not set
788# CONFIG_PATA_PDC2027X is not set
789# CONFIG_PATA_SIL680 is not set
790# CONFIG_PATA_SIS is not set
791# CONFIG_PATA_VIA is not set
792# CONFIG_PATA_WINBOND is not set
793# CONFIG_PATA_PLATFORM is not set
794# CONFIG_PATA_SCH is not set
795# CONFIG_MD is not set
796# CONFIG_FUSION is not set
797
798#
799# IEEE 1394 (FireWire) support
800#
801# CONFIG_FIREWIRE is not set
802# CONFIG_IEEE1394 is not set
803# CONFIG_I2O is not set
804# CONFIG_MACINTOSH_DRIVERS is not set
805CONFIG_NETDEVICES=y
806# CONFIG_NETDEVICES_MULTIQUEUE is not set
807CONFIG_DUMMY=m
808CONFIG_BONDING=m
809# CONFIG_MACVLAN is not set
810# CONFIG_EQUALIZER is not set
811CONFIG_TUN=m
812# CONFIG_VETH is not set
813# CONFIG_ARCNET is not set
814CONFIG_PHYLIB=y
815
816#
817# MII PHY device drivers
818#
819CONFIG_MARVELL_PHY=y
820# CONFIG_DAVICOM_PHY is not set
821# CONFIG_QSEMI_PHY is not set
822# CONFIG_LXT_PHY is not set
823# CONFIG_CICADA_PHY is not set
824# CONFIG_VITESSE_PHY is not set
825# CONFIG_SMSC_PHY is not set
826# CONFIG_BROADCOM_PHY is not set
827# CONFIG_ICPLUS_PHY is not set
828# CONFIG_REALTEK_PHY is not set
829# CONFIG_FIXED_PHY is not set
830# CONFIG_MDIO_BITBANG is not set
831CONFIG_NET_ETHERNET=y
832CONFIG_MII=y
833# CONFIG_HAPPYMEAL is not set
834# CONFIG_SUNGEM is not set
835# CONFIG_CASSINI is not set
836# CONFIG_NET_VENDOR_3COM is not set
837# CONFIG_NET_TULIP is not set
838# CONFIG_HP100 is not set
839# CONFIG_IBM_NEW_EMAC_ZMII is not set
840# CONFIG_IBM_NEW_EMAC_RGMII is not set
841# CONFIG_IBM_NEW_EMAC_TAH is not set
842# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
843# CONFIG_NET_PCI is not set
844# CONFIG_B44 is not set
845CONFIG_NETDEV_1000=y
846# CONFIG_ACENIC is not set
847# CONFIG_DL2K is not set
848# CONFIG_E1000 is not set
849# CONFIG_E1000E is not set
850# CONFIG_E1000E_ENABLED is not set
851# CONFIG_IP1000 is not set
852# CONFIG_IGB is not set
853# CONFIG_NS83820 is not set
854# CONFIG_HAMACHI is not set
855# CONFIG_YELLOWFIN is not set
856# CONFIG_R8169 is not set
857# CONFIG_SIS190 is not set
858# CONFIG_SKGE is not set
859# CONFIG_SKY2 is not set
860# CONFIG_VIA_VELOCITY is not set
861# CONFIG_TIGON3 is not set
862# CONFIG_BNX2 is not set
863CONFIG_GIANFAR=y
864# CONFIG_GFAR_NAPI is not set
865# CONFIG_QLA3XXX is not set
866# CONFIG_ATL1 is not set
867# CONFIG_NETDEV_10000 is not set
868# CONFIG_TR is not set
869
870#
871# Wireless LAN
872#
873# CONFIG_WLAN_PRE80211 is not set
874# CONFIG_WLAN_80211 is not set
875# CONFIG_IWLWIFI_LEDS is not set
876
877#
878# USB Network Adapters
879#
880# CONFIG_USB_CATC is not set
881# CONFIG_USB_KAWETH is not set
882# CONFIG_USB_PEGASUS is not set
883# CONFIG_USB_RTL8150 is not set
884# CONFIG_USB_USBNET is not set
885# CONFIG_WAN is not set
886CONFIG_ATM_DRIVERS=y
887# CONFIG_ATM_DUMMY is not set
888# CONFIG_ATM_TCP is not set
889# CONFIG_ATM_LANAI is not set
890# CONFIG_ATM_ENI is not set
891# CONFIG_ATM_FIRESTREAM is not set
892# CONFIG_ATM_ZATM is not set
893# CONFIG_ATM_NICSTAR is not set
894# CONFIG_ATM_IDT77252 is not set
895# CONFIG_ATM_AMBASSADOR is not set
896# CONFIG_ATM_HORIZON is not set
897# CONFIG_ATM_IA is not set
898# CONFIG_ATM_FORE200E_MAYBE is not set
899# CONFIG_ATM_HE is not set
900# CONFIG_FDDI is not set
901# CONFIG_HIPPI is not set
902CONFIG_PPP=m
903CONFIG_PPP_MULTILINK=y
904CONFIG_PPP_FILTER=y
905CONFIG_PPP_ASYNC=m
906CONFIG_PPP_SYNC_TTY=m
907CONFIG_PPP_DEFLATE=m
908CONFIG_PPP_BSDCOMP=m
909# CONFIG_PPP_MPPE is not set
910CONFIG_PPPOE=m
911CONFIG_PPPOATM=m
912# CONFIG_PPPOL2TP is not set
913CONFIG_SLIP=m
914CONFIG_SLIP_COMPRESSED=y
915CONFIG_SLHC=m
916CONFIG_SLIP_SMART=y
917CONFIG_SLIP_MODE_SLIP6=y
918# CONFIG_NET_FC is not set
919CONFIG_NETCONSOLE=y
920# CONFIG_NETCONSOLE_DYNAMIC is not set
921CONFIG_NETPOLL=y
922CONFIG_NETPOLL_TRAP=y
923CONFIG_NET_POLL_CONTROLLER=y
924# CONFIG_ISDN is not set
925# CONFIG_PHONE is not set
926
927#
928# Input device support
929#
930CONFIG_INPUT=y
931# CONFIG_INPUT_FF_MEMLESS is not set
932# CONFIG_INPUT_POLLDEV is not set
933
934#
935# Userland interfaces
936#
937CONFIG_INPUT_MOUSEDEV=y
938CONFIG_INPUT_MOUSEDEV_PSAUX=y
939CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
940CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
941# CONFIG_INPUT_JOYDEV is not set
942# CONFIG_INPUT_EVDEV is not set
943# CONFIG_INPUT_EVBUG is not set
944
945#
946# Input Device Drivers
947#
948# CONFIG_INPUT_KEYBOARD is not set
949# CONFIG_INPUT_MOUSE is not set
950# CONFIG_INPUT_JOYSTICK is not set
951# CONFIG_INPUT_TABLET is not set
952# CONFIG_INPUT_TOUCHSCREEN is not set
953# CONFIG_INPUT_MISC is not set
954
955#
956# Hardware I/O ports
957#
958# CONFIG_SERIO is not set
959# CONFIG_GAMEPORT is not set
960
961#
962# Character devices
963#
964CONFIG_VT=y
965CONFIG_VT_CONSOLE=y
966CONFIG_HW_CONSOLE=y
967# CONFIG_VT_HW_CONSOLE_BINDING is not set
968CONFIG_DEVKMEM=y
969# CONFIG_SERIAL_NONSTANDARD is not set
970# CONFIG_NOZOMI is not set
971
972#
973# Serial drivers
974#
975CONFIG_SERIAL_8250=y
976CONFIG_SERIAL_8250_CONSOLE=y
977# CONFIG_SERIAL_8250_PCI is not set
978CONFIG_SERIAL_8250_NR_UARTS=2
979CONFIG_SERIAL_8250_RUNTIME_UARTS=2
980# CONFIG_SERIAL_8250_EXTENDED is not set
981
982#
983# Non-8250 serial port support
984#
985# CONFIG_SERIAL_UARTLITE is not set
986CONFIG_SERIAL_CORE=y
987CONFIG_SERIAL_CORE_CONSOLE=y
988# CONFIG_SERIAL_JSM is not set
989# CONFIG_SERIAL_OF_PLATFORM is not set
990CONFIG_UNIX98_PTYS=y
991# CONFIG_LEGACY_PTYS is not set
992# CONFIG_IPMI_HANDLER is not set
993CONFIG_HW_RANDOM=y
994# CONFIG_NVRAM is not set
995# CONFIG_R3964 is not set
996# CONFIG_APPLICOM is not set
997# CONFIG_RAW_DRIVER is not set
998# CONFIG_TCG_TPM is not set
999CONFIG_DEVPORT=y
1000CONFIG_I2C=y
1001CONFIG_I2C_BOARDINFO=y
1002CONFIG_I2C_CHARDEV=y
1003
1004#
1005# I2C Hardware Bus support
1006#
1007# CONFIG_I2C_ALI1535 is not set
1008# CONFIG_I2C_ALI1563 is not set
1009# CONFIG_I2C_ALI15X3 is not set
1010# CONFIG_I2C_AMD756 is not set
1011# CONFIG_I2C_AMD8111 is not set
1012# CONFIG_I2C_I801 is not set
1013# CONFIG_I2C_I810 is not set
1014# CONFIG_I2C_PIIX4 is not set
1015CONFIG_I2C_MPC=y
1016# CONFIG_I2C_NFORCE2 is not set
1017# CONFIG_I2C_OCORES is not set
1018# CONFIG_I2C_PARPORT_LIGHT is not set
1019# CONFIG_I2C_PROSAVAGE is not set
1020# CONFIG_I2C_SAVAGE4 is not set
1021# CONFIG_I2C_SIMTEC is not set
1022# CONFIG_I2C_SIS5595 is not set
1023# CONFIG_I2C_SIS630 is not set
1024# CONFIG_I2C_SIS96X is not set
1025# CONFIG_I2C_TAOS_EVM is not set
1026# CONFIG_I2C_STUB is not set
1027# CONFIG_I2C_TINY_USB is not set
1028# CONFIG_I2C_VIA is not set
1029# CONFIG_I2C_VIAPRO is not set
1030# CONFIG_I2C_VOODOO3 is not set
1031# CONFIG_I2C_PCA_PLATFORM is not set
1032
1033#
1034# Miscellaneous I2C Chip support
1035#
1036CONFIG_DS1682=y
1037# CONFIG_SENSORS_EEPROM is not set
1038# CONFIG_SENSORS_PCF8574 is not set
1039# CONFIG_PCF8575 is not set
1040# CONFIG_SENSORS_PCF8591 is not set
1041# CONFIG_SENSORS_MAX6875 is not set
1042# CONFIG_SENSORS_TSL2550 is not set
1043# CONFIG_I2C_DEBUG_CORE is not set
1044# CONFIG_I2C_DEBUG_ALGO is not set
1045# CONFIG_I2C_DEBUG_BUS is not set
1046# CONFIG_I2C_DEBUG_CHIP is not set
1047# CONFIG_SPI is not set
1048# CONFIG_W1 is not set
1049# CONFIG_POWER_SUPPLY is not set
1050CONFIG_HWMON=y
1051# CONFIG_HWMON_VID is not set
1052# CONFIG_SENSORS_AD7418 is not set
1053# CONFIG_SENSORS_ADM1021 is not set
1054# CONFIG_SENSORS_ADM1025 is not set
1055# CONFIG_SENSORS_ADM1026 is not set
1056# CONFIG_SENSORS_ADM1029 is not set
1057# CONFIG_SENSORS_ADM1031 is not set
1058# CONFIG_SENSORS_ADM9240 is not set
1059# CONFIG_SENSORS_ADT7470 is not set
1060# CONFIG_SENSORS_ADT7473 is not set
1061# CONFIG_SENSORS_ATXP1 is not set
1062# CONFIG_SENSORS_DS1621 is not set
1063# CONFIG_SENSORS_I5K_AMB is not set
1064# CONFIG_SENSORS_F71805F is not set
1065# CONFIG_SENSORS_F71882FG is not set
1066# CONFIG_SENSORS_F75375S is not set
1067# CONFIG_SENSORS_GL518SM is not set
1068# CONFIG_SENSORS_GL520SM is not set
1069# CONFIG_SENSORS_IT87 is not set
1070# CONFIG_SENSORS_LM63 is not set
1071# CONFIG_SENSORS_LM75 is not set
1072# CONFIG_SENSORS_LM77 is not set
1073# CONFIG_SENSORS_LM78 is not set
1074# CONFIG_SENSORS_LM80 is not set
1075# CONFIG_SENSORS_LM83 is not set
1076# CONFIG_SENSORS_LM85 is not set
1077# CONFIG_SENSORS_LM87 is not set
1078CONFIG_SENSORS_LM90=y
1079CONFIG_SENSORS_LM92=y
1080# CONFIG_SENSORS_LM93 is not set
1081# CONFIG_SENSORS_MAX1619 is not set
1082# CONFIG_SENSORS_MAX6650 is not set
1083# CONFIG_SENSORS_PC87360 is not set
1084# CONFIG_SENSORS_PC87427 is not set
1085# CONFIG_SENSORS_SIS5595 is not set
1086# CONFIG_SENSORS_DME1737 is not set
1087# CONFIG_SENSORS_SMSC47M1 is not set
1088# CONFIG_SENSORS_SMSC47M192 is not set
1089# CONFIG_SENSORS_SMSC47B397 is not set
1090# CONFIG_SENSORS_ADS7828 is not set
1091# CONFIG_SENSORS_THMC50 is not set
1092# CONFIG_SENSORS_VIA686A is not set
1093# CONFIG_SENSORS_VT1211 is not set
1094# CONFIG_SENSORS_VT8231 is not set
1095# CONFIG_SENSORS_W83781D is not set
1096# CONFIG_SENSORS_W83791D is not set
1097# CONFIG_SENSORS_W83792D is not set
1098# CONFIG_SENSORS_W83793 is not set
1099# CONFIG_SENSORS_W83L785TS is not set
1100# CONFIG_SENSORS_W83L786NG is not set
1101# CONFIG_SENSORS_W83627HF is not set
1102# CONFIG_SENSORS_W83627EHF is not set
1103# CONFIG_HWMON_DEBUG_CHIP is not set
1104# CONFIG_THERMAL is not set
1105CONFIG_WATCHDOG=y
1106# CONFIG_WATCHDOG_NOWAYOUT is not set
1107
1108#
1109# Watchdog Device Drivers
1110#
1111# CONFIG_SOFT_WATCHDOG is not set
1112
1113#
1114# PCI-based Watchdog Cards
1115#
1116# CONFIG_PCIPCWATCHDOG is not set
1117# CONFIG_WDTPCI is not set
1118
1119#
1120# USB-based Watchdog Cards
1121#
1122# CONFIG_USBPCWATCHDOG is not set
1123
1124#
1125# Sonics Silicon Backplane
1126#
1127CONFIG_SSB_POSSIBLE=y
1128# CONFIG_SSB is not set
1129
1130#
1131# Multifunction device drivers
1132#
1133# CONFIG_MFD_SM501 is not set
1134# CONFIG_HTC_PASIC3 is not set
1135
1136#
1137# Multimedia devices
1138#
1139
1140#
1141# Multimedia core support
1142#
1143# CONFIG_VIDEO_DEV is not set
1144# CONFIG_DVB_CORE is not set
1145# CONFIG_VIDEO_MEDIA is not set
1146
1147#
1148# Multimedia drivers
1149#
1150CONFIG_DAB=y
1151# CONFIG_USB_DABUSB is not set
1152
1153#
1154# Graphics support
1155#
1156# CONFIG_AGP is not set
1157# CONFIG_DRM is not set
1158# CONFIG_VGASTATE is not set
1159CONFIG_VIDEO_OUTPUT_CONTROL=m
1160# CONFIG_FB is not set
1161# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
1162
1163#
1164# Display device support
1165#
1166# CONFIG_DISPLAY_SUPPORT is not set
1167
1168#
1169# Console display driver support
1170#
1171CONFIG_VGA_CONSOLE=y
1172# CONFIG_VGACON_SOFT_SCROLLBACK is not set
1173CONFIG_DUMMY_CONSOLE=y
1174
1175#
1176# Sound
1177#
1178# CONFIG_SOUND is not set
1179CONFIG_HID_SUPPORT=y
1180CONFIG_HID=y
1181# CONFIG_HID_DEBUG is not set
1182# CONFIG_HIDRAW is not set
1183
1184#
1185# USB Input Devices
1186#
1187CONFIG_USB_HID=y
1188# CONFIG_USB_HIDINPUT_POWERBOOK is not set
1189# CONFIG_HID_FF is not set
1190# CONFIG_USB_HIDDEV is not set
1191CONFIG_USB_SUPPORT=y
1192CONFIG_USB_ARCH_HAS_HCD=y
1193CONFIG_USB_ARCH_HAS_OHCI=y
1194CONFIG_USB_ARCH_HAS_EHCI=y
1195CONFIG_USB=y
1196# CONFIG_USB_DEBUG is not set
1197# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
1198
1199#
1200# Miscellaneous USB options
1201#
1202# CONFIG_USB_DEVICEFS is not set
1203# CONFIG_USB_DEVICE_CLASS is not set
1204# CONFIG_USB_DYNAMIC_MINORS is not set
1205# CONFIG_USB_OTG is not set
1206# CONFIG_USB_OTG_WHITELIST is not set
1207# CONFIG_USB_OTG_BLACKLIST_HUB is not set
1208
1209#
1210# USB Host Controller Drivers
1211#
1212# CONFIG_USB_C67X00_HCD is not set
1213CONFIG_USB_EHCI_HCD=y
1214# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
1215# CONFIG_USB_EHCI_TT_NEWSCHED is not set
1216# CONFIG_USB_EHCI_FSL is not set
1217# CONFIG_USB_EHCI_HCD_PPC_OF is not set
1218# CONFIG_USB_ISP116X_HCD is not set
1219# CONFIG_USB_ISP1760_HCD is not set
1220CONFIG_USB_OHCI_HCD=y
1221# CONFIG_USB_OHCI_HCD_PPC_OF is not set
1222# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
1223# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
1224CONFIG_USB_OHCI_LITTLE_ENDIAN=y
1225# CONFIG_USB_UHCI_HCD is not set
1226# CONFIG_USB_SL811_HCD is not set
1227# CONFIG_USB_R8A66597_HCD is not set
1228
1229#
1230# USB Device Class drivers
1231#
1232# CONFIG_USB_ACM is not set
1233# CONFIG_USB_PRINTER is not set
1234# CONFIG_USB_WDM is not set
1235
1236#
1237# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
1238#
1239
1240#
1241# may also be needed; see USB_STORAGE Help for more information
1242#
1243CONFIG_USB_STORAGE=y
1244# CONFIG_USB_STORAGE_DEBUG is not set
1245# CONFIG_USB_STORAGE_DATAFAB is not set
1246# CONFIG_USB_STORAGE_FREECOM is not set
1247# CONFIG_USB_STORAGE_ISD200 is not set
1248# CONFIG_USB_STORAGE_DPCM is not set
1249# CONFIG_USB_STORAGE_USBAT is not set
1250# CONFIG_USB_STORAGE_SDDR09 is not set
1251# CONFIG_USB_STORAGE_SDDR55 is not set
1252# CONFIG_USB_STORAGE_JUMPSHOT is not set
1253# CONFIG_USB_STORAGE_ALAUDA is not set
1254# CONFIG_USB_STORAGE_ONETOUCH is not set
1255# CONFIG_USB_STORAGE_KARMA is not set
1256# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
1257# CONFIG_USB_LIBUSUAL is not set
1258
1259#
1260# USB Imaging devices
1261#
1262# CONFIG_USB_MDC800 is not set
1263# CONFIG_USB_MICROTEK is not set
1264# CONFIG_USB_MON is not set
1265
1266#
1267# USB port drivers
1268#
1269# CONFIG_USB_SERIAL is not set
1270
1271#
1272# USB Miscellaneous drivers
1273#
1274# CONFIG_USB_EMI62 is not set
1275# CONFIG_USB_EMI26 is not set
1276# CONFIG_USB_ADUTUX is not set
1277# CONFIG_USB_AUERSWALD is not set
1278# CONFIG_USB_RIO500 is not set
1279# CONFIG_USB_LEGOTOWER is not set
1280# CONFIG_USB_LCD is not set
1281# CONFIG_USB_BERRY_CHARGE is not set
1282# CONFIG_USB_LED is not set
1283# CONFIG_USB_CYPRESS_CY7C63 is not set
1284# CONFIG_USB_CYTHERM is not set
1285# CONFIG_USB_PHIDGET is not set
1286# CONFIG_USB_IDMOUSE is not set
1287# CONFIG_USB_FTDI_ELAN is not set
1288# CONFIG_USB_APPLEDISPLAY is not set
1289# CONFIG_USB_SISUSBVGA is not set
1290# CONFIG_USB_LD is not set
1291# CONFIG_USB_TRANCEVIBRATOR is not set
1292# CONFIG_USB_IOWARRIOR is not set
1293# CONFIG_USB_ISIGHTFW is not set
1294# CONFIG_USB_ATM is not set
1295# CONFIG_USB_GADGET is not set
1296# CONFIG_MMC is not set
1297# CONFIG_MEMSTICK is not set
1298# CONFIG_NEW_LEDS is not set
1299# CONFIG_ACCESSIBILITY is not set
1300# CONFIG_INFINIBAND is not set
1301# CONFIG_EDAC is not set
1302CONFIG_RTC_LIB=m
1303CONFIG_RTC_CLASS=m
1304
1305#
1306# RTC interfaces
1307#
1308CONFIG_RTC_INTF_SYSFS=y
1309# CONFIG_RTC_INTF_PROC is not set
1310CONFIG_RTC_INTF_DEV=y
1311# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1312# CONFIG_RTC_DRV_TEST is not set
1313
1314#
1315# I2C RTC drivers
1316#
1317# CONFIG_RTC_DRV_DS1307 is not set
1318# CONFIG_RTC_DRV_DS1374 is not set
1319# CONFIG_RTC_DRV_DS1672 is not set
1320# CONFIG_RTC_DRV_MAX6900 is not set
1321# CONFIG_RTC_DRV_RS5C372 is not set
1322# CONFIG_RTC_DRV_ISL1208 is not set
1323# CONFIG_RTC_DRV_X1205 is not set
1324# CONFIG_RTC_DRV_PCF8563 is not set
1325# CONFIG_RTC_DRV_PCF8583 is not set
1326# CONFIG_RTC_DRV_M41T80 is not set
1327# CONFIG_RTC_DRV_S35390A is not set
1328
1329#
1330# SPI RTC drivers
1331#
1332
1333#
1334# Platform RTC drivers
1335#
1336# CONFIG_RTC_DRV_CMOS is not set
1337# CONFIG_RTC_DRV_DS1511 is not set
1338# CONFIG_RTC_DRV_DS1553 is not set
1339# CONFIG_RTC_DRV_DS1742 is not set
1340# CONFIG_RTC_DRV_STK17TA8 is not set
1341# CONFIG_RTC_DRV_M48T86 is not set
1342# CONFIG_RTC_DRV_M48T59 is not set
1343# CONFIG_RTC_DRV_V3020 is not set
1344
1345#
1346# on-CPU RTC drivers
1347#
1348# CONFIG_RTC_DRV_PPC is not set
1349# CONFIG_DMADEVICES is not set
1350# CONFIG_UIO is not set
1351
1352#
1353# File systems
1354#
1355CONFIG_EXT2_FS=y
1356CONFIG_EXT2_FS_XATTR=y
1357CONFIG_EXT2_FS_POSIX_ACL=y
1358# CONFIG_EXT2_FS_SECURITY is not set
1359# CONFIG_EXT2_FS_XIP is not set
1360CONFIG_EXT3_FS=y
1361CONFIG_EXT3_FS_XATTR=y
1362CONFIG_EXT3_FS_POSIX_ACL=y
1363# CONFIG_EXT3_FS_SECURITY is not set
1364# CONFIG_EXT4DEV_FS is not set
1365CONFIG_JBD=y
1366CONFIG_FS_MBCACHE=y
1367# CONFIG_REISERFS_FS is not set
1368# CONFIG_JFS_FS is not set
1369CONFIG_FS_POSIX_ACL=y
1370# CONFIG_XFS_FS is not set
1371# CONFIG_OCFS2_FS is not set
1372CONFIG_DNOTIFY=y
1373CONFIG_INOTIFY=y
1374CONFIG_INOTIFY_USER=y
1375# CONFIG_QUOTA is not set
1376# CONFIG_AUTOFS_FS is not set
1377# CONFIG_AUTOFS4_FS is not set
1378# CONFIG_FUSE_FS is not set
1379
1380#
1381# CD-ROM/DVD Filesystems
1382#
1383# CONFIG_ISO9660_FS is not set
1384# CONFIG_UDF_FS is not set
1385
1386#
1387# DOS/FAT/NT Filesystems
1388#
1389CONFIG_FAT_FS=y
1390CONFIG_MSDOS_FS=y
1391CONFIG_VFAT_FS=y
1392CONFIG_FAT_DEFAULT_CODEPAGE=437
1393CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1394# CONFIG_NTFS_FS is not set
1395
1396#
1397# Pseudo filesystems
1398#
1399CONFIG_PROC_FS=y
1400CONFIG_PROC_KCORE=y
1401CONFIG_PROC_SYSCTL=y
1402CONFIG_SYSFS=y
1403CONFIG_TMPFS=y
1404# CONFIG_TMPFS_POSIX_ACL is not set
1405# CONFIG_HUGETLB_PAGE is not set
1406# CONFIG_CONFIGFS_FS is not set
1407
1408#
1409# Miscellaneous filesystems
1410#
1411# CONFIG_ADFS_FS is not set
1412# CONFIG_AFFS_FS is not set
1413# CONFIG_HFS_FS is not set
1414# CONFIG_HFSPLUS_FS is not set
1415# CONFIG_BEFS_FS is not set
1416# CONFIG_BFS_FS is not set
1417# CONFIG_EFS_FS is not set
1418# CONFIG_JFFS2_FS is not set
1419# CONFIG_CRAMFS is not set
1420# CONFIG_VXFS_FS is not set
1421# CONFIG_MINIX_FS is not set
1422# CONFIG_HPFS_FS is not set
1423# CONFIG_QNX4FS_FS is not set
1424# CONFIG_ROMFS_FS is not set
1425# CONFIG_SYSV_FS is not set
1426# CONFIG_UFS_FS is not set
1427CONFIG_NETWORK_FILESYSTEMS=y
1428CONFIG_NFS_FS=y
1429CONFIG_NFS_V3=y
1430# CONFIG_NFS_V3_ACL is not set
1431CONFIG_NFS_V4=y
1432# CONFIG_NFSD is not set
1433CONFIG_ROOT_NFS=y
1434CONFIG_LOCKD=y
1435CONFIG_LOCKD_V4=y
1436CONFIG_NFS_COMMON=y
1437CONFIG_SUNRPC=y
1438CONFIG_SUNRPC_GSS=y
1439# CONFIG_SUNRPC_BIND34 is not set
1440CONFIG_RPCSEC_GSS_KRB5=y
1441# CONFIG_RPCSEC_GSS_SPKM3 is not set
1442# CONFIG_SMB_FS is not set
1443CONFIG_CIFS=m
1444# CONFIG_CIFS_STATS is not set
1445# CONFIG_CIFS_WEAK_PW_HASH is not set
1446CONFIG_CIFS_XATTR=y
1447CONFIG_CIFS_POSIX=y
1448# CONFIG_CIFS_DEBUG2 is not set
1449# CONFIG_CIFS_EXPERIMENTAL is not set
1450# CONFIG_NCP_FS is not set
1451# CONFIG_CODA_FS is not set
1452# CONFIG_AFS_FS is not set
1453
1454#
1455# Partition Types
1456#
1457# CONFIG_PARTITION_ADVANCED is not set
1458CONFIG_MSDOS_PARTITION=y
1459CONFIG_NLS=y
1460CONFIG_NLS_DEFAULT="iso8859-1"
1461CONFIG_NLS_CODEPAGE_437=m
1462CONFIG_NLS_CODEPAGE_737=m
1463CONFIG_NLS_CODEPAGE_775=m
1464CONFIG_NLS_CODEPAGE_850=m
1465CONFIG_NLS_CODEPAGE_852=m
1466CONFIG_NLS_CODEPAGE_855=m
1467CONFIG_NLS_CODEPAGE_857=m
1468CONFIG_NLS_CODEPAGE_860=m
1469CONFIG_NLS_CODEPAGE_861=m
1470CONFIG_NLS_CODEPAGE_862=m
1471CONFIG_NLS_CODEPAGE_863=m
1472CONFIG_NLS_CODEPAGE_864=m
1473CONFIG_NLS_CODEPAGE_865=m
1474CONFIG_NLS_CODEPAGE_866=m
1475CONFIG_NLS_CODEPAGE_869=m
1476CONFIG_NLS_CODEPAGE_936=m
1477CONFIG_NLS_CODEPAGE_950=m
1478CONFIG_NLS_CODEPAGE_932=m
1479CONFIG_NLS_CODEPAGE_949=m
1480CONFIG_NLS_CODEPAGE_874=m
1481CONFIG_NLS_ISO8859_8=m
1482CONFIG_NLS_CODEPAGE_1250=m
1483CONFIG_NLS_CODEPAGE_1251=m
1484CONFIG_NLS_ASCII=m
1485CONFIG_NLS_ISO8859_1=m
1486CONFIG_NLS_ISO8859_2=m
1487CONFIG_NLS_ISO8859_3=m
1488CONFIG_NLS_ISO8859_4=m
1489CONFIG_NLS_ISO8859_5=m
1490CONFIG_NLS_ISO8859_6=m
1491CONFIG_NLS_ISO8859_7=m
1492CONFIG_NLS_ISO8859_9=m
1493CONFIG_NLS_ISO8859_13=m
1494CONFIG_NLS_ISO8859_14=m
1495CONFIG_NLS_ISO8859_15=m
1496CONFIG_NLS_KOI8_R=m
1497CONFIG_NLS_KOI8_U=m
1498CONFIG_NLS_UTF8=m
1499# CONFIG_DLM is not set
1500
1501#
1502# Library routines
1503#
1504CONFIG_BITREVERSE=y
1505# CONFIG_GENERIC_FIND_FIRST_BIT is not set
1506CONFIG_CRC_CCITT=m
1507# CONFIG_CRC16 is not set
1508# CONFIG_CRC_ITU_T is not set
1509CONFIG_CRC32=y
1510# CONFIG_CRC7 is not set
1511CONFIG_LIBCRC32C=m
1512CONFIG_ZLIB_INFLATE=m
1513CONFIG_ZLIB_DEFLATE=m
1514CONFIG_PLIST=y
1515CONFIG_HAS_IOMEM=y
1516CONFIG_HAS_IOPORT=y
1517CONFIG_HAS_DMA=y
1518CONFIG_HAVE_LMB=y
1519
1520#
1521# Kernel hacking
1522#
1523# CONFIG_PRINTK_TIME is not set
1524CONFIG_ENABLE_WARN_DEPRECATED=y
1525CONFIG_ENABLE_MUST_CHECK=y
1526CONFIG_FRAME_WARN=1024
1527CONFIG_MAGIC_SYSRQ=y
1528# CONFIG_UNUSED_SYMBOLS is not set
1529# CONFIG_DEBUG_FS is not set
1530# CONFIG_HEADERS_CHECK is not set
1531CONFIG_DEBUG_KERNEL=y
1532# CONFIG_DEBUG_SHIRQ is not set
1533CONFIG_DETECT_SOFTLOCKUP=y
1534CONFIG_SCHED_DEBUG=y
1535# CONFIG_SCHEDSTATS is not set
1536# CONFIG_TIMER_STATS is not set
1537# CONFIG_DEBUG_OBJECTS is not set
1538# CONFIG_DEBUG_SLAB is not set
1539# CONFIG_DEBUG_RT_MUTEXES is not set
1540# CONFIG_RT_MUTEX_TESTER is not set
1541# CONFIG_DEBUG_SPINLOCK is not set
1542# CONFIG_DEBUG_MUTEXES is not set
1543# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1544# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1545# CONFIG_DEBUG_KOBJECT is not set
1546# CONFIG_DEBUG_BUGVERBOSE is not set
1547CONFIG_DEBUG_INFO=y
1548# CONFIG_DEBUG_VM is not set
1549# CONFIG_DEBUG_WRITECOUNT is not set
1550# CONFIG_DEBUG_LIST is not set
1551# CONFIG_DEBUG_SG is not set
1552# CONFIG_BOOT_PRINTK_DELAY is not set
1553# CONFIG_RCU_TORTURE_TEST is not set
1554# CONFIG_BACKTRACE_SELF_TEST is not set
1555# CONFIG_FAULT_INJECTION is not set
1556# CONFIG_SAMPLES is not set
1557# CONFIG_DEBUG_STACKOVERFLOW is not set
1558# CONFIG_DEBUG_STACK_USAGE is not set
1559# CONFIG_DEBUG_PAGEALLOC is not set
1560CONFIG_DEBUGGER=y
1561# CONFIG_XMON is not set
1562# CONFIG_IRQSTACKS is not set
1563# CONFIG_BDI_SWITCH is not set
1564# CONFIG_PPC_EARLY_DEBUG is not set
1565
1566#
1567# Security options
1568#
1569# CONFIG_KEYS is not set
1570CONFIG_SECURITY=y
1571CONFIG_SECURITY_NETWORK=y
1572# CONFIG_SECURITY_NETWORK_XFRM is not set
1573CONFIG_SECURITY_CAPABILITIES=y
1574# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1575# CONFIG_SECURITY_ROOTPLUG is not set
1576CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
1577CONFIG_CRYPTO=y
1578
1579#
1580# Crypto core or helper
1581#
1582CONFIG_CRYPTO_ALGAPI=y
1583CONFIG_CRYPTO_AEAD=m
1584CONFIG_CRYPTO_BLKCIPHER=y
1585CONFIG_CRYPTO_HASH=y
1586CONFIG_CRYPTO_MANAGER=y
1587# CONFIG_CRYPTO_GF128MUL is not set
1588CONFIG_CRYPTO_NULL=m
1589# CONFIG_CRYPTO_CRYPTD is not set
1590CONFIG_CRYPTO_AUTHENC=m
1591CONFIG_CRYPTO_TEST=m
1592
1593#
1594# Authenticated Encryption with Associated Data
1595#
1596# CONFIG_CRYPTO_CCM is not set
1597# CONFIG_CRYPTO_GCM is not set
1598# CONFIG_CRYPTO_SEQIV is not set
1599
1600#
1601# Block modes
1602#
1603CONFIG_CRYPTO_CBC=y
1604# CONFIG_CRYPTO_CTR is not set
1605# CONFIG_CRYPTO_CTS is not set
1606CONFIG_CRYPTO_ECB=m
1607# CONFIG_CRYPTO_LRW is not set
1608CONFIG_CRYPTO_PCBC=m
1609# CONFIG_CRYPTO_XTS is not set
1610
1611#
1612# Hash modes
1613#
1614CONFIG_CRYPTO_HMAC=y
1615# CONFIG_CRYPTO_XCBC is not set
1616
1617#
1618# Digest
1619#
1620CONFIG_CRYPTO_CRC32C=m
1621CONFIG_CRYPTO_MD4=m
1622CONFIG_CRYPTO_MD5=y
1623CONFIG_CRYPTO_MICHAEL_MIC=m
1624CONFIG_CRYPTO_SHA1=m
1625CONFIG_CRYPTO_SHA256=m
1626CONFIG_CRYPTO_SHA512=m
1627# CONFIG_CRYPTO_TGR192 is not set
1628CONFIG_CRYPTO_WP512=m
1629
1630#
1631# Ciphers
1632#
1633CONFIG_CRYPTO_AES=m
1634CONFIG_CRYPTO_ANUBIS=m
1635CONFIG_CRYPTO_ARC4=m
1636CONFIG_CRYPTO_BLOWFISH=m
1637# CONFIG_CRYPTO_CAMELLIA is not set
1638CONFIG_CRYPTO_CAST5=m
1639CONFIG_CRYPTO_CAST6=m
1640CONFIG_CRYPTO_DES=y
1641# CONFIG_CRYPTO_FCRYPT is not set
1642CONFIG_CRYPTO_KHAZAD=m
1643# CONFIG_CRYPTO_SALSA20 is not set
1644# CONFIG_CRYPTO_SEED is not set
1645CONFIG_CRYPTO_SERPENT=m
1646CONFIG_CRYPTO_TEA=m
1647CONFIG_CRYPTO_TWOFISH=m
1648CONFIG_CRYPTO_TWOFISH_COMMON=m
1649
1650#
1651# Compression
1652#
1653CONFIG_CRYPTO_DEFLATE=m
1654# CONFIG_CRYPTO_LZO is not set
1655# CONFIG_CRYPTO_HW is not set
1656# CONFIG_PPC_CLOCK is not set
1657# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/configs/mpc8610_hpcd_defconfig b/arch/powerpc/configs/86xx/mpc8610_hpcd_defconfig
index 1a9990731eb0..c98c6ee44492 100644
--- a/arch/powerpc/configs/mpc8610_hpcd_defconfig
+++ b/arch/powerpc/configs/86xx/mpc8610_hpcd_defconfig
@@ -165,11 +165,11 @@ CONFIG_CLASSIC_RCU=y
165# 165#
166CONFIG_PPC_MULTIPLATFORM=y 166CONFIG_PPC_MULTIPLATFORM=y
167CONFIG_CLASSIC32=y 167CONFIG_CLASSIC32=y
168CONFIG_PPC_CHRP=y 168# CONFIG_PPC_CHRP is not set
169# CONFIG_PPC_PMAC is not set
169# CONFIG_MPC5121_ADS is not set 170# CONFIG_MPC5121_ADS is not set
170# CONFIG_MPC5121_GENERIC is not set 171# CONFIG_MPC5121_GENERIC is not set
171# CONFIG_PPC_MPC52xx is not set 172# CONFIG_PPC_MPC52xx is not set
172CONFIG_PPC_PMAC=y
173# CONFIG_PPC_CELL is not set 173# CONFIG_PPC_CELL is not set
174# CONFIG_PPC_CELL_NATIVE is not set 174# CONFIG_PPC_CELL_NATIVE is not set
175# CONFIG_PPC_82xx is not set 175# CONFIG_PPC_82xx is not set
diff --git a/arch/powerpc/configs/mpc8641_hpcn_defconfig b/arch/powerpc/configs/86xx/mpc8641_hpcn_defconfig
index ea09be31b6ea..444ddf98436d 100644
--- a/arch/powerpc/configs/mpc8641_hpcn_defconfig
+++ b/arch/powerpc/configs/86xx/mpc8641_hpcn_defconfig
@@ -167,11 +167,11 @@ CONFIG_CLASSIC_RCU=y
167# 167#
168CONFIG_PPC_MULTIPLATFORM=y 168CONFIG_PPC_MULTIPLATFORM=y
169CONFIG_CLASSIC32=y 169CONFIG_CLASSIC32=y
170CONFIG_PPC_CHRP=y 170# CONFIG_PPC_CHRP is not set
171# CONFIG_PPC_PMAC is not set
171# CONFIG_MPC5121_ADS is not set 172# CONFIG_MPC5121_ADS is not set
172# CONFIG_MPC5121_GENERIC is not set 173# CONFIG_MPC5121_GENERIC is not set
173# CONFIG_PPC_MPC52xx is not set 174# CONFIG_PPC_MPC52xx is not set
174CONFIG_PPC_PMAC=y
175# CONFIG_PPC_CELL is not set 175# CONFIG_PPC_CELL is not set
176# CONFIG_PPC_CELL_NATIVE is not set 176# CONFIG_PPC_CELL_NATIVE is not set
177# CONFIG_PPC_82xx is not set 177# CONFIG_PPC_82xx is not set
diff --git a/arch/powerpc/configs/sbc8641d_defconfig b/arch/powerpc/configs/86xx/sbc8641d_defconfig
index f545421f9857..d900f8f376cf 100644
--- a/arch/powerpc/configs/sbc8641d_defconfig
+++ b/arch/powerpc/configs/86xx/sbc8641d_defconfig
@@ -166,11 +166,11 @@ CONFIG_CLASSIC_RCU=y
166# 166#
167CONFIG_PPC_MULTIPLATFORM=y 167CONFIG_PPC_MULTIPLATFORM=y
168CONFIG_CLASSIC32=y 168CONFIG_CLASSIC32=y
169CONFIG_PPC_CHRP=y 169# CONFIG_PPC_CHRP is not set
170# CONFIG_PPC_PMAC is not set
170# CONFIG_MPC5121_ADS is not set 171# CONFIG_MPC5121_ADS is not set
171# CONFIG_MPC5121_GENERIC is not set 172# CONFIG_MPC5121_GENERIC is not set
172# CONFIG_PPC_MPC52xx is not set 173# CONFIG_PPC_MPC52xx is not set
173CONFIG_PPC_PMAC=y
174# CONFIG_PPC_CELL is not set 174# CONFIG_PPC_CELL is not set
175# CONFIG_PPC_CELL_NATIVE is not set 175# CONFIG_PPC_CELL_NATIVE is not set
176# CONFIG_PPC_82xx is not set 176# CONFIG_PPC_82xx is not set
diff --git a/arch/powerpc/configs/ep8248e_defconfig b/arch/powerpc/configs/ep8248e_defconfig
index ef0c6e800508..cd691f770810 100644
--- a/arch/powerpc/configs/ep8248e_defconfig
+++ b/arch/powerpc/configs/ep8248e_defconfig
@@ -150,11 +150,11 @@ CONFIG_CLASSIC_RCU=y
150# 150#
151CONFIG_PPC_MULTIPLATFORM=y 151CONFIG_PPC_MULTIPLATFORM=y
152CONFIG_CLASSIC32=y 152CONFIG_CLASSIC32=y
153CONFIG_PPC_CHRP=y 153# CONFIG_PPC_CHRP is not set
154# CONFIG_PPC_PMAC is not set
154# CONFIG_MPC5121_ADS is not set 155# CONFIG_MPC5121_ADS is not set
155# CONFIG_MPC5121_GENERIC is not set 156# CONFIG_MPC5121_GENERIC is not set
156# CONFIG_PPC_MPC52xx is not set 157# CONFIG_PPC_MPC52xx is not set
157CONFIG_PPC_PMAC=y
158# CONFIG_PPC_CELL is not set 158# CONFIG_PPC_CELL is not set
159# CONFIG_PPC_CELL_NATIVE is not set 159# CONFIG_PPC_CELL_NATIVE is not set
160CONFIG_PPC_82xx=y 160CONFIG_PPC_82xx=y
diff --git a/arch/powerpc/configs/mgcoge_defconfig b/arch/powerpc/configs/mgcoge_defconfig
new file mode 100644
index 000000000000..cc9eaba8c9c9
--- /dev/null
+++ b/arch/powerpc/configs/mgcoge_defconfig
@@ -0,0 +1,900 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.26-rc2
4# Thu May 22 08:18:47 2008
5#
6# CONFIG_PPC64 is not set
7
8#
9# Processor support
10#
11CONFIG_6xx=y
12# CONFIG_PPC_85xx is not set
13# CONFIG_PPC_8xx is not set
14# CONFIG_40x is not set
15# CONFIG_44x is not set
16# CONFIG_E200 is not set
17CONFIG_PPC_FPU=y
18CONFIG_PPC_STD_MMU=y
19CONFIG_PPC_STD_MMU_32=y
20# CONFIG_PPC_MM_SLICES is not set
21# CONFIG_SMP is not set
22CONFIG_PPC32=y
23CONFIG_WORD_SIZE=32
24CONFIG_PPC_MERGE=y
25CONFIG_MMU=y
26CONFIG_GENERIC_CMOS_UPDATE=y
27CONFIG_GENERIC_TIME=y
28CONFIG_GENERIC_TIME_VSYSCALL=y
29CONFIG_GENERIC_CLOCKEVENTS=y
30CONFIG_GENERIC_HARDIRQS=y
31# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
32CONFIG_IRQ_PER_CPU=y
33CONFIG_STACKTRACE_SUPPORT=y
34CONFIG_LOCKDEP_SUPPORT=y
35CONFIG_RWSEM_XCHGADD_ALGORITHM=y
36CONFIG_ARCH_HAS_ILOG2_U32=y
37CONFIG_GENERIC_HWEIGHT=y
38CONFIG_GENERIC_CALIBRATE_DELAY=y
39CONFIG_GENERIC_FIND_NEXT_BIT=y
40# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
41CONFIG_PPC=y
42CONFIG_EARLY_PRINTK=y
43CONFIG_GENERIC_NVRAM=y
44CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
45CONFIG_ARCH_MAY_HAVE_PC_FDC=y
46CONFIG_PPC_OF=y
47CONFIG_OF=y
48# CONFIG_PPC_UDBG_16550 is not set
49# CONFIG_GENERIC_TBSYNC is not set
50CONFIG_AUDIT_ARCH=y
51CONFIG_GENERIC_BUG=y
52# CONFIG_DEFAULT_UIMAGE is not set
53# CONFIG_PPC_DCR_NATIVE is not set
54# CONFIG_PPC_DCR_MMIO is not set
55CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
56
57#
58# General setup
59#
60# CONFIG_EXPERIMENTAL is not set
61CONFIG_BROKEN_ON_SMP=y
62CONFIG_INIT_ENV_ARG_LIMIT=32
63CONFIG_LOCALVERSION=""
64CONFIG_LOCALVERSION_AUTO=y
65CONFIG_SWAP=y
66CONFIG_SYSVIPC=y
67CONFIG_SYSVIPC_SYSCTL=y
68# CONFIG_BSD_PROCESS_ACCT is not set
69# CONFIG_TASKSTATS is not set
70# CONFIG_AUDIT is not set
71CONFIG_IKCONFIG=y
72CONFIG_IKCONFIG_PROC=y
73CONFIG_LOG_BUF_SHIFT=14
74# CONFIG_CGROUPS is not set
75CONFIG_SYSFS_DEPRECATED=y
76CONFIG_SYSFS_DEPRECATED_V2=y
77# CONFIG_RELAY is not set
78# CONFIG_NAMESPACES is not set
79CONFIG_BLK_DEV_INITRD=y
80CONFIG_INITRAMFS_SOURCE=""
81CONFIG_CC_OPTIMIZE_FOR_SIZE=y
82CONFIG_SYSCTL=y
83CONFIG_EMBEDDED=y
84CONFIG_SYSCTL_SYSCALL=y
85CONFIG_SYSCTL_SYSCALL_CHECK=y
86CONFIG_KALLSYMS=y
87CONFIG_KALLSYMS_ALL=y
88# CONFIG_KALLSYMS_EXTRA_PASS is not set
89CONFIG_HOTPLUG=y
90CONFIG_PRINTK=y
91CONFIG_BUG=y
92CONFIG_ELF_CORE=y
93CONFIG_COMPAT_BRK=y
94CONFIG_BASE_FULL=y
95CONFIG_FUTEX=y
96CONFIG_ANON_INODES=y
97CONFIG_EPOLL=y
98CONFIG_SIGNALFD=y
99CONFIG_TIMERFD=y
100CONFIG_EVENTFD=y
101CONFIG_SHMEM=y
102CONFIG_VM_EVENT_COUNTERS=y
103CONFIG_SLAB=y
104# CONFIG_SLUB is not set
105# CONFIG_SLOB is not set
106# CONFIG_PROFILING is not set
107# CONFIG_MARKERS is not set
108CONFIG_HAVE_OPROFILE=y
109CONFIG_HAVE_KPROBES=y
110CONFIG_HAVE_KRETPROBES=y
111# CONFIG_HAVE_DMA_ATTRS is not set
112CONFIG_PROC_PAGE_MONITOR=y
113CONFIG_SLABINFO=y
114CONFIG_RT_MUTEXES=y
115# CONFIG_TINY_SHMEM is not set
116CONFIG_BASE_SMALL=0
117# CONFIG_MODULES is not set
118CONFIG_BLOCK=y
119# CONFIG_LBD is not set
120# CONFIG_BLK_DEV_IO_TRACE is not set
121# CONFIG_LSF is not set
122
123#
124# IO Schedulers
125#
126CONFIG_IOSCHED_NOOP=y
127# CONFIG_IOSCHED_AS is not set
128CONFIG_IOSCHED_DEADLINE=y
129# CONFIG_IOSCHED_CFQ is not set
130# CONFIG_DEFAULT_AS is not set
131CONFIG_DEFAULT_DEADLINE=y
132# CONFIG_DEFAULT_CFQ is not set
133# CONFIG_DEFAULT_NOOP is not set
134CONFIG_DEFAULT_IOSCHED="deadline"
135CONFIG_CLASSIC_RCU=y
136
137#
138# Platform support
139#
140# CONFIG_PPC_MULTIPLATFORM is not set
141CONFIG_PPC_82xx=y
142# CONFIG_PPC_83xx is not set
143# CONFIG_PPC_86xx is not set
144# CONFIG_PPC_MPC512x is not set
145# CONFIG_PPC_MPC5121 is not set
146# CONFIG_PPC_CELL is not set
147# CONFIG_PPC_CELL_NATIVE is not set
148# CONFIG_MPC8272_ADS is not set
149# CONFIG_PQ2FADS is not set
150# CONFIG_EP8248E is not set
151CONFIG_MGCOGE=y
152# CONFIG_PQ2ADS is not set
153CONFIG_8260=y
154CONFIG_8272=y
155# CONFIG_IPIC is not set
156# CONFIG_MPIC is not set
157# CONFIG_MPIC_WEIRD is not set
158# CONFIG_PPC_I8259 is not set
159# CONFIG_PPC_RTAS is not set
160# CONFIG_MMIO_NVRAM is not set
161# CONFIG_PPC_MPC106 is not set
162# CONFIG_PPC_970_NAP is not set
163# CONFIG_PPC_INDIRECT_IO is not set
164# CONFIG_GENERIC_IOMAP is not set
165# CONFIG_CPU_FREQ is not set
166CONFIG_CPM2=y
167CONFIG_PPC_CPM_NEW_BINDING=y
168# CONFIG_FSL_ULI1575 is not set
169CONFIG_CPM=y
170
171#
172# Kernel options
173#
174# CONFIG_HIGHMEM is not set
175# CONFIG_TICK_ONESHOT is not set
176# CONFIG_NO_HZ is not set
177# CONFIG_HIGH_RES_TIMERS is not set
178CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
179# CONFIG_HZ_100 is not set
180CONFIG_HZ_250=y
181# CONFIG_HZ_300 is not set
182# CONFIG_HZ_1000 is not set
183CONFIG_HZ=250
184# CONFIG_SCHED_HRTICK is not set
185CONFIG_PREEMPT_NONE=y
186# CONFIG_PREEMPT_VOLUNTARY is not set
187# CONFIG_PREEMPT is not set
188CONFIG_BINFMT_ELF=y
189CONFIG_BINFMT_MISC=y
190# CONFIG_IOMMU_HELPER is not set
191CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
192CONFIG_ARCH_HAS_WALK_MEMORY=y
193CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
194CONFIG_ARCH_FLATMEM_ENABLE=y
195CONFIG_ARCH_POPULATES_NODE_MAP=y
196CONFIG_FLATMEM=y
197CONFIG_FLAT_NODE_MEM_MAP=y
198# CONFIG_SPARSEMEM_STATIC is not set
199# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
200CONFIG_PAGEFLAGS_EXTENDED=y
201CONFIG_SPLIT_PTLOCK_CPUS=4
202# CONFIG_RESOURCES_64BIT is not set
203CONFIG_ZONE_DMA_FLAG=1
204CONFIG_BOUNCE=y
205CONFIG_VIRT_TO_BUS=y
206CONFIG_FORCE_MAX_ZONEORDER=11
207CONFIG_PROC_DEVICETREE=y
208# CONFIG_CMDLINE_BOOL is not set
209# CONFIG_PM is not set
210# CONFIG_SECCOMP is not set
211CONFIG_ISA_DMA_API=y
212
213#
214# Bus options
215#
216CONFIG_ZONE_DMA=y
217CONFIG_FSL_SOC=y
218# CONFIG_PCI is not set
219# CONFIG_PCI_DOMAINS is not set
220# CONFIG_PCI_SYSCALL is not set
221# CONFIG_ARCH_SUPPORTS_MSI is not set
222# CONFIG_PCCARD is not set
223# CONFIG_HAS_RAPIDIO is not set
224
225#
226# Advanced setup
227#
228# CONFIG_ADVANCED_OPTIONS is not set
229
230#
231# Default settings for advanced configuration options are used
232#
233CONFIG_LOWMEM_SIZE=0x30000000
234CONFIG_PAGE_OFFSET=0xc0000000
235CONFIG_KERNEL_START=0xc0000000
236CONFIG_PHYSICAL_START=0x00000000
237CONFIG_TASK_SIZE=0xc0000000
238
239#
240# Networking
241#
242CONFIG_NET=y
243
244#
245# Networking options
246#
247CONFIG_PACKET=y
248# CONFIG_PACKET_MMAP is not set
249CONFIG_UNIX=y
250CONFIG_XFRM=y
251# CONFIG_XFRM_USER is not set
252# CONFIG_NET_KEY is not set
253CONFIG_INET=y
254CONFIG_IP_MULTICAST=y
255# CONFIG_IP_ADVANCED_ROUTER is not set
256CONFIG_IP_FIB_HASH=y
257CONFIG_IP_PNP=y
258CONFIG_IP_PNP_DHCP=y
259CONFIG_IP_PNP_BOOTP=y
260# CONFIG_IP_PNP_RARP is not set
261# CONFIG_NET_IPIP is not set
262# CONFIG_NET_IPGRE is not set
263# CONFIG_IP_MROUTE is not set
264CONFIG_SYN_COOKIES=y
265# CONFIG_INET_AH is not set
266# CONFIG_INET_ESP is not set
267# CONFIG_INET_IPCOMP is not set
268# CONFIG_INET_XFRM_TUNNEL is not set
269# CONFIG_INET_TUNNEL is not set
270CONFIG_INET_XFRM_MODE_TRANSPORT=y
271CONFIG_INET_XFRM_MODE_TUNNEL=y
272CONFIG_INET_XFRM_MODE_BEET=y
273# CONFIG_INET_LRO is not set
274CONFIG_INET_DIAG=y
275CONFIG_INET_TCP_DIAG=y
276# CONFIG_TCP_CONG_ADVANCED is not set
277CONFIG_TCP_CONG_CUBIC=y
278CONFIG_DEFAULT_TCP_CONG="cubic"
279# CONFIG_IP_VS is not set
280# CONFIG_IPV6 is not set
281# CONFIG_NETWORK_SECMARK is not set
282CONFIG_NETFILTER=y
283# CONFIG_NETFILTER_DEBUG is not set
284CONFIG_NETFILTER_ADVANCED=y
285
286#
287# Core Netfilter Configuration
288#
289# CONFIG_NETFILTER_NETLINK_QUEUE is not set
290# CONFIG_NETFILTER_NETLINK_LOG is not set
291# CONFIG_NF_CONNTRACK is not set
292# CONFIG_NETFILTER_XTABLES is not set
293
294#
295# IP: Netfilter Configuration
296#
297# CONFIG_IP_NF_QUEUE is not set
298# CONFIG_IP_NF_IPTABLES is not set
299# CONFIG_IP_NF_ARPTABLES is not set
300# CONFIG_ATM is not set
301# CONFIG_BRIDGE is not set
302# CONFIG_VLAN_8021Q is not set
303# CONFIG_DECNET is not set
304# CONFIG_LLC2 is not set
305# CONFIG_IPX is not set
306# CONFIG_ATALK is not set
307# CONFIG_NET_SCHED is not set
308
309#
310# Network testing
311#
312# CONFIG_NET_PKTGEN is not set
313# CONFIG_HAMRADIO is not set
314# CONFIG_CAN is not set
315# CONFIG_IRDA is not set
316# CONFIG_BT is not set
317
318#
319# Wireless
320#
321# CONFIG_CFG80211 is not set
322# CONFIG_WIRELESS_EXT is not set
323# CONFIG_MAC80211 is not set
324# CONFIG_IEEE80211 is not set
325# CONFIG_RFKILL is not set
326
327#
328# Device Drivers
329#
330
331#
332# Generic Driver Options
333#
334CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
335CONFIG_STANDALONE=y
336CONFIG_PREVENT_FIRMWARE_BUILD=y
337# CONFIG_FW_LOADER is not set
338# CONFIG_DEBUG_DRIVER is not set
339# CONFIG_DEBUG_DEVRES is not set
340# CONFIG_SYS_HYPERVISOR is not set
341# CONFIG_CONNECTOR is not set
342CONFIG_MTD=y
343# CONFIG_MTD_DEBUG is not set
344CONFIG_MTD_CONCAT=y
345CONFIG_MTD_PARTITIONS=y
346# CONFIG_MTD_REDBOOT_PARTS is not set
347CONFIG_MTD_CMDLINE_PARTS=y
348CONFIG_MTD_OF_PARTS=y
349# CONFIG_MTD_AR7_PARTS is not set
350
351#
352# User Modules And Translation Layers
353#
354CONFIG_MTD_CHAR=y
355CONFIG_MTD_BLKDEVS=y
356# CONFIG_MTD_BLOCK is not set
357# CONFIG_MTD_BLOCK_RO is not set
358# CONFIG_FTL is not set
359# CONFIG_NFTL is not set
360# CONFIG_INFTL is not set
361# CONFIG_RFD_FTL is not set
362# CONFIG_SSFDC is not set
363# CONFIG_MTD_OOPS is not set
364
365#
366# RAM/ROM/Flash chip drivers
367#
368CONFIG_MTD_CFI=y
369# CONFIG_MTD_JEDECPROBE is not set
370CONFIG_MTD_GEN_PROBE=y
371CONFIG_MTD_CFI_ADV_OPTIONS=y
372CONFIG_MTD_CFI_NOSWAP=y
373# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
374# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
375CONFIG_MTD_CFI_GEOMETRY=y
376CONFIG_MTD_MAP_BANK_WIDTH_1=y
377CONFIG_MTD_MAP_BANK_WIDTH_2=y
378# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
379# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
380# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
381# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
382CONFIG_MTD_CFI_I1=y
383CONFIG_MTD_CFI_I2=y
384# CONFIG_MTD_CFI_I4 is not set
385# CONFIG_MTD_CFI_I8 is not set
386# CONFIG_MTD_OTP is not set
387CONFIG_MTD_CFI_INTELEXT=y
388CONFIG_MTD_CFI_AMDSTD=y
389# CONFIG_MTD_CFI_STAA is not set
390CONFIG_MTD_CFI_UTIL=y
391# CONFIG_MTD_RAM is not set
392# CONFIG_MTD_ROM is not set
393# CONFIG_MTD_ABSENT is not set
394
395#
396# Mapping drivers for chip access
397#
398# CONFIG_MTD_COMPLEX_MAPPINGS is not set
399# CONFIG_MTD_PHYSMAP is not set
400CONFIG_MTD_PHYSMAP_OF=y
401# CONFIG_MTD_PLATRAM is not set
402
403#
404# Self-contained MTD device drivers
405#
406# CONFIG_MTD_SLRAM is not set
407# CONFIG_MTD_PHRAM is not set
408# CONFIG_MTD_MTDRAM is not set
409# CONFIG_MTD_BLOCK2MTD is not set
410
411#
412# Disk-On-Chip Device Drivers
413#
414# CONFIG_MTD_DOC2000 is not set
415# CONFIG_MTD_DOC2001 is not set
416# CONFIG_MTD_DOC2001PLUS is not set
417# CONFIG_MTD_NAND is not set
418# CONFIG_MTD_ONENAND is not set
419
420#
421# UBI - Unsorted block images
422#
423# CONFIG_MTD_UBI is not set
424CONFIG_OF_DEVICE=y
425# CONFIG_PARPORT is not set
426CONFIG_BLK_DEV=y
427# CONFIG_BLK_DEV_FD is not set
428# CONFIG_BLK_DEV_COW_COMMON is not set
429CONFIG_BLK_DEV_LOOP=y
430# CONFIG_BLK_DEV_CRYPTOLOOP is not set
431# CONFIG_BLK_DEV_NBD is not set
432CONFIG_BLK_DEV_RAM=y
433CONFIG_BLK_DEV_RAM_COUNT=16
434CONFIG_BLK_DEV_RAM_SIZE=4096
435# CONFIG_BLK_DEV_XIP is not set
436# CONFIG_CDROM_PKTCDVD is not set
437# CONFIG_ATA_OVER_ETH is not set
438# CONFIG_MISC_DEVICES is not set
439CONFIG_HAVE_IDE=y
440# CONFIG_IDE is not set
441
442#
443# SCSI device support
444#
445# CONFIG_RAID_ATTRS is not set
446# CONFIG_SCSI is not set
447# CONFIG_SCSI_DMA is not set
448# CONFIG_SCSI_NETLINK is not set
449# CONFIG_ATA is not set
450# CONFIG_MD is not set
451# CONFIG_MACINTOSH_DRIVERS is not set
452CONFIG_NETDEVICES=y
453# CONFIG_NETDEVICES_MULTIQUEUE is not set
454# CONFIG_DUMMY is not set
455# CONFIG_BONDING is not set
456# CONFIG_EQUALIZER is not set
457# CONFIG_TUN is not set
458# CONFIG_VETH is not set
459CONFIG_PHYLIB=y
460
461#
462# MII PHY device drivers
463#
464# CONFIG_MARVELL_PHY is not set
465# CONFIG_DAVICOM_PHY is not set
466# CONFIG_QSEMI_PHY is not set
467# CONFIG_LXT_PHY is not set
468# CONFIG_CICADA_PHY is not set
469# CONFIG_VITESSE_PHY is not set
470# CONFIG_SMSC_PHY is not set
471# CONFIG_BROADCOM_PHY is not set
472# CONFIG_ICPLUS_PHY is not set
473# CONFIG_REALTEK_PHY is not set
474CONFIG_FIXED_PHY=y
475# CONFIG_MDIO_BITBANG is not set
476CONFIG_NET_ETHERNET=y
477CONFIG_MII=y
478# CONFIG_IBM_NEW_EMAC_ZMII is not set
479# CONFIG_IBM_NEW_EMAC_RGMII is not set
480# CONFIG_IBM_NEW_EMAC_TAH is not set
481# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
482# CONFIG_B44 is not set
483CONFIG_FS_ENET=y
484CONFIG_FS_ENET_HAS_SCC=y
485# CONFIG_FS_ENET_HAS_FCC is not set
486# CONFIG_FS_ENET_MDIO_FCC is not set
487# CONFIG_NETDEV_1000 is not set
488# CONFIG_NETDEV_10000 is not set
489
490#
491# Wireless LAN
492#
493# CONFIG_WLAN_PRE80211 is not set
494# CONFIG_WLAN_80211 is not set
495# CONFIG_IWLWIFI_LEDS is not set
496# CONFIG_WAN is not set
497# CONFIG_PPP is not set
498# CONFIG_SLIP is not set
499# CONFIG_NETPOLL is not set
500# CONFIG_NET_POLL_CONTROLLER is not set
501# CONFIG_ISDN is not set
502# CONFIG_PHONE is not set
503
504#
505# Input device support
506#
507# CONFIG_INPUT is not set
508
509#
510# Hardware I/O ports
511#
512# CONFIG_SERIO is not set
513# CONFIG_GAMEPORT is not set
514
515#
516# Character devices
517#
518# CONFIG_VT is not set
519CONFIG_DEVKMEM=y
520# CONFIG_SERIAL_NONSTANDARD is not set
521
522#
523# Serial drivers
524#
525# CONFIG_SERIAL_8250 is not set
526
527#
528# Non-8250 serial port support
529#
530# CONFIG_SERIAL_UARTLITE is not set
531CONFIG_SERIAL_CORE=y
532CONFIG_SERIAL_CORE_CONSOLE=y
533CONFIG_SERIAL_CPM=y
534CONFIG_SERIAL_CPM_CONSOLE=y
535# CONFIG_SERIAL_CPM_SCC1 is not set
536# CONFIG_SERIAL_CPM_SCC2 is not set
537# CONFIG_SERIAL_CPM_SCC3 is not set
538# CONFIG_SERIAL_CPM_SCC4 is not set
539CONFIG_SERIAL_CPM_SMC1=y
540CONFIG_SERIAL_CPM_SMC2=y
541CONFIG_UNIX98_PTYS=y
542CONFIG_LEGACY_PTYS=y
543CONFIG_LEGACY_PTY_COUNT=256
544# CONFIG_IPMI_HANDLER is not set
545CONFIG_HW_RANDOM=y
546# CONFIG_NVRAM is not set
547# CONFIG_GEN_RTC is not set
548# CONFIG_R3964 is not set
549# CONFIG_RAW_DRIVER is not set
550# CONFIG_I2C is not set
551# CONFIG_SPI is not set
552# CONFIG_W1 is not set
553# CONFIG_POWER_SUPPLY is not set
554# CONFIG_HWMON is not set
555# CONFIG_THERMAL is not set
556# CONFIG_WATCHDOG is not set
557
558#
559# Sonics Silicon Backplane
560#
561CONFIG_SSB_POSSIBLE=y
562# CONFIG_SSB is not set
563
564#
565# Multifunction device drivers
566#
567# CONFIG_MFD_SM501 is not set
568# CONFIG_HTC_PASIC3 is not set
569
570#
571# Multimedia devices
572#
573
574#
575# Multimedia core support
576#
577# CONFIG_VIDEO_DEV is not set
578# CONFIG_DVB_CORE is not set
579# CONFIG_VIDEO_MEDIA is not set
580
581#
582# Multimedia drivers
583#
584# CONFIG_DAB is not set
585
586#
587# Graphics support
588#
589# CONFIG_VGASTATE is not set
590# CONFIG_VIDEO_OUTPUT_CONTROL is not set
591# CONFIG_FB is not set
592# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
593
594#
595# Display device support
596#
597# CONFIG_DISPLAY_SUPPORT is not set
598
599#
600# Sound
601#
602# CONFIG_SOUND is not set
603# CONFIG_USB_SUPPORT is not set
604# CONFIG_MMC is not set
605# CONFIG_MEMSTICK is not set
606# CONFIG_NEW_LEDS is not set
607# CONFIG_ACCESSIBILITY is not set
608# CONFIG_RTC_CLASS is not set
609# CONFIG_DMADEVICES is not set
610# CONFIG_UIO is not set
611
612#
613# File systems
614#
615CONFIG_EXT2_FS=y
616# CONFIG_EXT2_FS_XATTR is not set
617# CONFIG_EXT2_FS_XIP is not set
618CONFIG_EXT3_FS=y
619# CONFIG_EXT3_FS_XATTR is not set
620CONFIG_JBD=y
621# CONFIG_JBD_DEBUG is not set
622# CONFIG_REISERFS_FS is not set
623# CONFIG_JFS_FS is not set
624# CONFIG_FS_POSIX_ACL is not set
625# CONFIG_XFS_FS is not set
626# CONFIG_OCFS2_FS is not set
627CONFIG_DNOTIFY=y
628CONFIG_INOTIFY=y
629CONFIG_INOTIFY_USER=y
630# CONFIG_QUOTA is not set
631# CONFIG_AUTOFS_FS is not set
632CONFIG_AUTOFS4_FS=y
633# CONFIG_FUSE_FS is not set
634
635#
636# CD-ROM/DVD Filesystems
637#
638# CONFIG_ISO9660_FS is not set
639# CONFIG_UDF_FS is not set
640
641#
642# DOS/FAT/NT Filesystems
643#
644# CONFIG_MSDOS_FS is not set
645# CONFIG_VFAT_FS is not set
646# CONFIG_NTFS_FS is not set
647
648#
649# Pseudo filesystems
650#
651CONFIG_PROC_FS=y
652CONFIG_PROC_KCORE=y
653CONFIG_PROC_SYSCTL=y
654CONFIG_SYSFS=y
655CONFIG_TMPFS=y
656# CONFIG_TMPFS_POSIX_ACL is not set
657# CONFIG_HUGETLB_PAGE is not set
658# CONFIG_CONFIGFS_FS is not set
659
660#
661# Miscellaneous filesystems
662#
663# CONFIG_HFSPLUS_FS is not set
664CONFIG_JFFS2_FS=y
665CONFIG_JFFS2_FS_DEBUG=0
666CONFIG_JFFS2_FS_WRITEBUFFER=y
667# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
668# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
669CONFIG_JFFS2_ZLIB=y
670# CONFIG_JFFS2_LZO is not set
671CONFIG_JFFS2_RTIME=y
672# CONFIG_JFFS2_RUBIN is not set
673CONFIG_CRAMFS=y
674# CONFIG_VXFS_FS is not set
675# CONFIG_MINIX_FS is not set
676# CONFIG_HPFS_FS is not set
677# CONFIG_QNX4FS_FS is not set
678# CONFIG_ROMFS_FS is not set
679# CONFIG_SYSV_FS is not set
680# CONFIG_UFS_FS is not set
681CONFIG_NETWORK_FILESYSTEMS=y
682CONFIG_NFS_FS=y
683CONFIG_NFS_V3=y
684# CONFIG_NFS_V3_ACL is not set
685# CONFIG_NFSD is not set
686CONFIG_ROOT_NFS=y
687CONFIG_LOCKD=y
688CONFIG_LOCKD_V4=y
689CONFIG_NFS_COMMON=y
690CONFIG_SUNRPC=y
691# CONFIG_SMB_FS is not set
692# CONFIG_CIFS is not set
693# CONFIG_NCP_FS is not set
694# CONFIG_CODA_FS is not set
695
696#
697# Partition Types
698#
699CONFIG_PARTITION_ADVANCED=y
700# CONFIG_ACORN_PARTITION is not set
701# CONFIG_OSF_PARTITION is not set
702# CONFIG_AMIGA_PARTITION is not set
703# CONFIG_ATARI_PARTITION is not set
704# CONFIG_MAC_PARTITION is not set
705CONFIG_MSDOS_PARTITION=y
706# CONFIG_BSD_DISKLABEL is not set
707# CONFIG_MINIX_SUBPARTITION is not set
708# CONFIG_SOLARIS_X86_PARTITION is not set
709# CONFIG_UNIXWARE_DISKLABEL is not set
710# CONFIG_LDM_PARTITION is not set
711# CONFIG_SGI_PARTITION is not set
712# CONFIG_ULTRIX_PARTITION is not set
713# CONFIG_SUN_PARTITION is not set
714# CONFIG_KARMA_PARTITION is not set
715# CONFIG_EFI_PARTITION is not set
716# CONFIG_SYSV68_PARTITION is not set
717CONFIG_NLS=y
718CONFIG_NLS_DEFAULT="iso8859-1"
719CONFIG_NLS_CODEPAGE_437=y
720# CONFIG_NLS_CODEPAGE_737 is not set
721# CONFIG_NLS_CODEPAGE_775 is not set
722# CONFIG_NLS_CODEPAGE_850 is not set
723# CONFIG_NLS_CODEPAGE_852 is not set
724# CONFIG_NLS_CODEPAGE_855 is not set
725# CONFIG_NLS_CODEPAGE_857 is not set
726# CONFIG_NLS_CODEPAGE_860 is not set
727# CONFIG_NLS_CODEPAGE_861 is not set
728# CONFIG_NLS_CODEPAGE_862 is not set
729# CONFIG_NLS_CODEPAGE_863 is not set
730# CONFIG_NLS_CODEPAGE_864 is not set
731# CONFIG_NLS_CODEPAGE_865 is not set
732# CONFIG_NLS_CODEPAGE_866 is not set
733# CONFIG_NLS_CODEPAGE_869 is not set
734# CONFIG_NLS_CODEPAGE_936 is not set
735# CONFIG_NLS_CODEPAGE_950 is not set
736# CONFIG_NLS_CODEPAGE_932 is not set
737# CONFIG_NLS_CODEPAGE_949 is not set
738# CONFIG_NLS_CODEPAGE_874 is not set
739# CONFIG_NLS_ISO8859_8 is not set
740# CONFIG_NLS_CODEPAGE_1250 is not set
741# CONFIG_NLS_CODEPAGE_1251 is not set
742CONFIG_NLS_ASCII=y
743CONFIG_NLS_ISO8859_1=y
744# CONFIG_NLS_ISO8859_2 is not set
745# CONFIG_NLS_ISO8859_3 is not set
746# CONFIG_NLS_ISO8859_4 is not set
747# CONFIG_NLS_ISO8859_5 is not set
748# CONFIG_NLS_ISO8859_6 is not set
749# CONFIG_NLS_ISO8859_7 is not set
750# CONFIG_NLS_ISO8859_9 is not set
751# CONFIG_NLS_ISO8859_13 is not set
752# CONFIG_NLS_ISO8859_14 is not set
753# CONFIG_NLS_ISO8859_15 is not set
754# CONFIG_NLS_KOI8_R is not set
755# CONFIG_NLS_KOI8_U is not set
756CONFIG_NLS_UTF8=y
757
758#
759# Library routines
760#
761CONFIG_BITREVERSE=y
762# CONFIG_GENERIC_FIND_FIRST_BIT is not set
763# CONFIG_CRC_CCITT is not set
764# CONFIG_CRC16 is not set
765# CONFIG_CRC_ITU_T is not set
766CONFIG_CRC32=y
767# CONFIG_CRC7 is not set
768# CONFIG_LIBCRC32C is not set
769CONFIG_ZLIB_INFLATE=y
770CONFIG_ZLIB_DEFLATE=y
771CONFIG_PLIST=y
772CONFIG_HAS_IOMEM=y
773CONFIG_HAS_IOPORT=y
774CONFIG_HAS_DMA=y
775CONFIG_HAVE_LMB=y
776
777#
778# Kernel hacking
779#
780# CONFIG_PRINTK_TIME is not set
781CONFIG_ENABLE_WARN_DEPRECATED=y
782CONFIG_ENABLE_MUST_CHECK=y
783CONFIG_FRAME_WARN=1024
784CONFIG_MAGIC_SYSRQ=y
785# CONFIG_UNUSED_SYMBOLS is not set
786CONFIG_DEBUG_FS=y
787# CONFIG_HEADERS_CHECK is not set
788CONFIG_DEBUG_KERNEL=y
789# CONFIG_DEBUG_SHIRQ is not set
790# CONFIG_DETECT_SOFTLOCKUP is not set
791# CONFIG_SCHED_DEBUG is not set
792# CONFIG_SCHEDSTATS is not set
793# CONFIG_TIMER_STATS is not set
794# CONFIG_DEBUG_OBJECTS is not set
795# CONFIG_DEBUG_SLAB is not set
796# CONFIG_DEBUG_RT_MUTEXES is not set
797# CONFIG_RT_MUTEX_TESTER is not set
798# CONFIG_DEBUG_SPINLOCK is not set
799# CONFIG_DEBUG_MUTEXES is not set
800# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
801# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
802# CONFIG_DEBUG_KOBJECT is not set
803CONFIG_DEBUG_BUGVERBOSE=y
804CONFIG_DEBUG_INFO=y
805# CONFIG_DEBUG_VM is not set
806# CONFIG_DEBUG_WRITECOUNT is not set
807# CONFIG_DEBUG_LIST is not set
808# CONFIG_DEBUG_SG is not set
809# CONFIG_BOOT_PRINTK_DELAY is not set
810# CONFIG_BACKTRACE_SELF_TEST is not set
811# CONFIG_FAULT_INJECTION is not set
812# CONFIG_SAMPLES is not set
813# CONFIG_DEBUG_STACKOVERFLOW is not set
814# CONFIG_DEBUG_STACK_USAGE is not set
815# CONFIG_DEBUG_PAGEALLOC is not set
816# CONFIG_DEBUGGER is not set
817# CONFIG_KGDB_CONSOLE is not set
818# CONFIG_IRQSTACKS is not set
819# CONFIG_VIRQ_DEBUG is not set
820CONFIG_BDI_SWITCH=y
821# CONFIG_PPC_EARLY_DEBUG is not set
822
823#
824# Security options
825#
826# CONFIG_KEYS is not set
827# CONFIG_SECURITY is not set
828CONFIG_CRYPTO=y
829
830#
831# Crypto core or helper
832#
833CONFIG_CRYPTO_ALGAPI=y
834CONFIG_CRYPTO_BLKCIPHER=y
835CONFIG_CRYPTO_MANAGER=y
836# CONFIG_CRYPTO_NULL is not set
837# CONFIG_CRYPTO_CRYPTD is not set
838# CONFIG_CRYPTO_AUTHENC is not set
839
840#
841# Authenticated Encryption with Associated Data
842#
843# CONFIG_CRYPTO_CCM is not set
844# CONFIG_CRYPTO_GCM is not set
845# CONFIG_CRYPTO_SEQIV is not set
846
847#
848# Block modes
849#
850CONFIG_CRYPTO_CBC=y
851# CONFIG_CRYPTO_CTR is not set
852# CONFIG_CRYPTO_CTS is not set
853CONFIG_CRYPTO_ECB=y
854CONFIG_CRYPTO_PCBC=y
855
856#
857# Hash modes
858#
859# CONFIG_CRYPTO_HMAC is not set
860
861#
862# Digest
863#
864# CONFIG_CRYPTO_CRC32C is not set
865# CONFIG_CRYPTO_MD4 is not set
866CONFIG_CRYPTO_MD5=y
867# CONFIG_CRYPTO_MICHAEL_MIC is not set
868# CONFIG_CRYPTO_SHA1 is not set
869# CONFIG_CRYPTO_SHA256 is not set
870# CONFIG_CRYPTO_SHA512 is not set
871# CONFIG_CRYPTO_TGR192 is not set
872# CONFIG_CRYPTO_WP512 is not set
873
874#
875# Ciphers
876#
877# CONFIG_CRYPTO_AES is not set
878# CONFIG_CRYPTO_ANUBIS is not set
879# CONFIG_CRYPTO_ARC4 is not set
880# CONFIG_CRYPTO_BLOWFISH is not set
881# CONFIG_CRYPTO_CAMELLIA is not set
882# CONFIG_CRYPTO_CAST5 is not set
883# CONFIG_CRYPTO_CAST6 is not set
884CONFIG_CRYPTO_DES=y
885# CONFIG_CRYPTO_FCRYPT is not set
886# CONFIG_CRYPTO_KHAZAD is not set
887# CONFIG_CRYPTO_SEED is not set
888# CONFIG_CRYPTO_SERPENT is not set
889# CONFIG_CRYPTO_TEA is not set
890# CONFIG_CRYPTO_TWOFISH is not set
891
892#
893# Compression
894#
895# CONFIG_CRYPTO_DEFLATE is not set
896# CONFIG_CRYPTO_LZO is not set
897# CONFIG_CRYPTO_HW is not set
898# CONFIG_PPC_CLOCK is not set
899CONFIG_PPC_LIB_RHEAP=y
900# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/configs/mgsuvd_defconfig b/arch/powerpc/configs/mgsuvd_defconfig
new file mode 100644
index 000000000000..3cd6ce4be827
--- /dev/null
+++ b/arch/powerpc/configs/mgsuvd_defconfig
@@ -0,0 +1,872 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.26-rc2
4# Wed May 21 13:30:33 2008
5#
6# CONFIG_PPC64 is not set
7
8#
9# Processor support
10#
11# CONFIG_6xx is not set
12# CONFIG_PPC_85xx is not set
13CONFIG_PPC_8xx=y
14# CONFIG_40x is not set
15# CONFIG_44x is not set
16# CONFIG_E200 is not set
17CONFIG_8xx=y
18# CONFIG_PPC_MM_SLICES is not set
19CONFIG_NOT_COHERENT_CACHE=y
20CONFIG_PPC32=y
21CONFIG_WORD_SIZE=32
22CONFIG_PPC_MERGE=y
23CONFIG_MMU=y
24CONFIG_GENERIC_CMOS_UPDATE=y
25CONFIG_GENERIC_TIME=y
26CONFIG_GENERIC_TIME_VSYSCALL=y
27CONFIG_GENERIC_CLOCKEVENTS=y
28CONFIG_GENERIC_HARDIRQS=y
29# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
30CONFIG_IRQ_PER_CPU=y
31CONFIG_STACKTRACE_SUPPORT=y
32CONFIG_LOCKDEP_SUPPORT=y
33CONFIG_RWSEM_XCHGADD_ALGORITHM=y
34CONFIG_ARCH_HAS_ILOG2_U32=y
35CONFIG_GENERIC_HWEIGHT=y
36CONFIG_GENERIC_CALIBRATE_DELAY=y
37CONFIG_GENERIC_FIND_NEXT_BIT=y
38# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
39CONFIG_PPC=y
40CONFIG_EARLY_PRINTK=y
41CONFIG_GENERIC_NVRAM=y
42CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
43CONFIG_ARCH_MAY_HAVE_PC_FDC=y
44CONFIG_PPC_OF=y
45CONFIG_OF=y
46# CONFIG_PPC_UDBG_16550 is not set
47# CONFIG_GENERIC_TBSYNC is not set
48CONFIG_AUDIT_ARCH=y
49# CONFIG_DEFAULT_UIMAGE is not set
50# CONFIG_PPC_DCR_NATIVE is not set
51# CONFIG_PPC_DCR_MMIO is not set
52CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
53
54#
55# General setup
56#
57CONFIG_EXPERIMENTAL=y
58CONFIG_BROKEN_ON_SMP=y
59CONFIG_INIT_ENV_ARG_LIMIT=32
60CONFIG_LOCALVERSION=""
61CONFIG_LOCALVERSION_AUTO=y
62# CONFIG_SWAP is not set
63CONFIG_SYSVIPC=y
64CONFIG_SYSVIPC_SYSCTL=y
65# CONFIG_POSIX_MQUEUE is not set
66# CONFIG_BSD_PROCESS_ACCT is not set
67# CONFIG_TASKSTATS is not set
68# CONFIG_AUDIT is not set
69# CONFIG_IKCONFIG is not set
70CONFIG_LOG_BUF_SHIFT=17
71# CONFIG_CGROUPS is not set
72CONFIG_GROUP_SCHED=y
73CONFIG_FAIR_GROUP_SCHED=y
74# CONFIG_RT_GROUP_SCHED is not set
75CONFIG_USER_SCHED=y
76# CONFIG_CGROUP_SCHED is not set
77CONFIG_SYSFS_DEPRECATED=y
78CONFIG_SYSFS_DEPRECATED_V2=y
79# CONFIG_RELAY is not set
80# CONFIG_NAMESPACES is not set
81CONFIG_BLK_DEV_INITRD=y
82CONFIG_INITRAMFS_SOURCE=""
83# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
84CONFIG_SYSCTL=y
85CONFIG_EMBEDDED=y
86# CONFIG_SYSCTL_SYSCALL is not set
87CONFIG_KALLSYMS=y
88# CONFIG_KALLSYMS_EXTRA_PASS is not set
89# CONFIG_HOTPLUG is not set
90CONFIG_PRINTK=y
91# CONFIG_BUG is not set
92CONFIG_ELF_CORE=y
93CONFIG_COMPAT_BRK=y
94# CONFIG_BASE_FULL is not set
95CONFIG_FUTEX=y
96CONFIG_ANON_INODES=y
97# CONFIG_EPOLL is not set
98CONFIG_SIGNALFD=y
99CONFIG_TIMERFD=y
100CONFIG_EVENTFD=y
101CONFIG_SHMEM=y
102# CONFIG_VM_EVENT_COUNTERS is not set
103CONFIG_SLAB=y
104# CONFIG_SLUB is not set
105# CONFIG_SLOB is not set
106# CONFIG_PROFILING is not set
107# CONFIG_MARKERS is not set
108CONFIG_HAVE_OPROFILE=y
109CONFIG_HAVE_KPROBES=y
110CONFIG_HAVE_KRETPROBES=y
111# CONFIG_HAVE_DMA_ATTRS is not set
112CONFIG_PROC_PAGE_MONITOR=y
113CONFIG_SLABINFO=y
114CONFIG_RT_MUTEXES=y
115# CONFIG_TINY_SHMEM is not set
116CONFIG_BASE_SMALL=1
117# CONFIG_MODULES is not set
118CONFIG_BLOCK=y
119# CONFIG_LBD is not set
120# CONFIG_BLK_DEV_IO_TRACE is not set
121# CONFIG_LSF is not set
122# CONFIG_BLK_DEV_BSG is not set
123
124#
125# IO Schedulers
126#
127CONFIG_IOSCHED_NOOP=y
128CONFIG_IOSCHED_AS=y
129CONFIG_IOSCHED_DEADLINE=y
130CONFIG_IOSCHED_CFQ=y
131CONFIG_DEFAULT_AS=y
132# CONFIG_DEFAULT_DEADLINE is not set
133# CONFIG_DEFAULT_CFQ is not set
134# CONFIG_DEFAULT_NOOP is not set
135CONFIG_DEFAULT_IOSCHED="anticipatory"
136CONFIG_CLASSIC_RCU=y
137
138#
139# Platform support
140#
141# CONFIG_PPC_MPC512x is not set
142# CONFIG_PPC_MPC5121 is not set
143# CONFIG_PPC_CELL is not set
144# CONFIG_PPC_CELL_NATIVE is not set
145CONFIG_CPM1=y
146# CONFIG_MPC8XXFADS is not set
147# CONFIG_MPC86XADS is not set
148# CONFIG_MPC885ADS is not set
149# CONFIG_PPC_EP88XC is not set
150# CONFIG_PPC_ADDER875 is not set
151CONFIG_PPC_MGSUVD=y
152
153#
154# MPC8xx CPM Options
155#
156
157#
158# Generic MPC8xx Options
159#
160CONFIG_8xx_COPYBACK=y
161CONFIG_8xx_CPU6=y
162CONFIG_8xx_CPU15=y
163# CONFIG_NO_UCODE_PATCH is not set
164# CONFIG_USB_SOF_UCODE_PATCH is not set
165# CONFIG_I2C_SPI_UCODE_PATCH is not set
166CONFIG_I2C_SPI_SMC1_UCODE_PATCH=y
167CONFIG_UCODE_PATCH=y
168# CONFIG_PQ2ADS is not set
169# CONFIG_IPIC is not set
170# CONFIG_MPIC is not set
171# CONFIG_MPIC_WEIRD is not set
172# CONFIG_PPC_I8259 is not set
173# CONFIG_PPC_RTAS is not set
174# CONFIG_MMIO_NVRAM is not set
175# CONFIG_PPC_MPC106 is not set
176# CONFIG_PPC_970_NAP is not set
177# CONFIG_PPC_INDIRECT_IO is not set
178# CONFIG_GENERIC_IOMAP is not set
179# CONFIG_CPU_FREQ is not set
180CONFIG_PPC_CPM_NEW_BINDING=y
181# CONFIG_FSL_ULI1575 is not set
182CONFIG_CPM=y
183
184#
185# Kernel options
186#
187# CONFIG_HIGHMEM is not set
188# CONFIG_TICK_ONESHOT is not set
189# CONFIG_NO_HZ is not set
190# CONFIG_HIGH_RES_TIMERS is not set
191CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
192# CONFIG_HZ_100 is not set
193# CONFIG_HZ_250 is not set
194# CONFIG_HZ_300 is not set
195CONFIG_HZ_1000=y
196CONFIG_HZ=1000
197# CONFIG_SCHED_HRTICK is not set
198CONFIG_PREEMPT_NONE=y
199# CONFIG_PREEMPT_VOLUNTARY is not set
200# CONFIG_PREEMPT is not set
201CONFIG_BINFMT_ELF=y
202# CONFIG_BINFMT_MISC is not set
203CONFIG_MATH_EMULATION=y
204# CONFIG_IOMMU_HELPER is not set
205CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
206CONFIG_ARCH_HAS_WALK_MEMORY=y
207CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
208CONFIG_ARCH_FLATMEM_ENABLE=y
209CONFIG_ARCH_POPULATES_NODE_MAP=y
210CONFIG_SELECT_MEMORY_MODEL=y
211CONFIG_FLATMEM_MANUAL=y
212# CONFIG_DISCONTIGMEM_MANUAL is not set
213# CONFIG_SPARSEMEM_MANUAL is not set
214CONFIG_FLATMEM=y
215CONFIG_FLAT_NODE_MEM_MAP=y
216# CONFIG_SPARSEMEM_STATIC is not set
217# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
218CONFIG_PAGEFLAGS_EXTENDED=y
219CONFIG_SPLIT_PTLOCK_CPUS=4
220# CONFIG_RESOURCES_64BIT is not set
221CONFIG_ZONE_DMA_FLAG=1
222CONFIG_BOUNCE=y
223CONFIG_VIRT_TO_BUS=y
224CONFIG_FORCE_MAX_ZONEORDER=11
225# CONFIG_PROC_DEVICETREE is not set
226# CONFIG_CMDLINE_BOOL is not set
227# CONFIG_PM is not set
228# CONFIG_SECCOMP is not set
229CONFIG_ISA_DMA_API=y
230
231#
232# Bus options
233#
234CONFIG_ZONE_DMA=y
235CONFIG_FSL_SOC=y
236# CONFIG_PCI is not set
237# CONFIG_PCI_DOMAINS is not set
238# CONFIG_PCI_SYSCALL is not set
239# CONFIG_PCI_QSPAN is not set
240# CONFIG_ARCH_SUPPORTS_MSI is not set
241# CONFIG_HAS_RAPIDIO is not set
242
243#
244# Advanced setup
245#
246# CONFIG_ADVANCED_OPTIONS is not set
247
248#
249# Default settings for advanced configuration options are used
250#
251CONFIG_LOWMEM_SIZE=0x30000000
252CONFIG_PAGE_OFFSET=0xc0000000
253CONFIG_KERNEL_START=0xc0000000
254CONFIG_PHYSICAL_START=0x00000000
255CONFIG_TASK_SIZE=0x80000000
256CONFIG_CONSISTENT_START=0xfd000000
257CONFIG_CONSISTENT_SIZE=0x00200000
258
259#
260# Networking
261#
262CONFIG_NET=y
263
264#
265# Networking options
266#
267CONFIG_PACKET=y
268# CONFIG_PACKET_MMAP is not set
269CONFIG_UNIX=y
270CONFIG_XFRM=y
271# CONFIG_XFRM_USER is not set
272# CONFIG_XFRM_SUB_POLICY is not set
273# CONFIG_XFRM_MIGRATE is not set
274# CONFIG_XFRM_STATISTICS is not set
275# CONFIG_NET_KEY is not set
276CONFIG_INET=y
277CONFIG_IP_MULTICAST=y
278# CONFIG_IP_ADVANCED_ROUTER is not set
279CONFIG_IP_FIB_HASH=y
280CONFIG_IP_PNP=y
281# CONFIG_IP_PNP_DHCP is not set
282# CONFIG_IP_PNP_BOOTP is not set
283# CONFIG_IP_PNP_RARP is not set
284# CONFIG_NET_IPIP is not set
285# CONFIG_NET_IPGRE is not set
286# CONFIG_IP_MROUTE is not set
287# CONFIG_ARPD is not set
288CONFIG_SYN_COOKIES=y
289# CONFIG_INET_AH is not set
290# CONFIG_INET_ESP is not set
291# CONFIG_INET_IPCOMP is not set
292# CONFIG_INET_XFRM_TUNNEL is not set
293# CONFIG_INET_TUNNEL is not set
294CONFIG_INET_XFRM_MODE_TRANSPORT=y
295CONFIG_INET_XFRM_MODE_TUNNEL=y
296CONFIG_INET_XFRM_MODE_BEET=y
297# CONFIG_INET_LRO is not set
298CONFIG_INET_DIAG=y
299CONFIG_INET_TCP_DIAG=y
300# CONFIG_TCP_CONG_ADVANCED is not set
301CONFIG_TCP_CONG_CUBIC=y
302CONFIG_DEFAULT_TCP_CONG="cubic"
303# CONFIG_TCP_MD5SIG is not set
304# CONFIG_IPV6 is not set
305# CONFIG_NETWORK_SECMARK is not set
306# CONFIG_NETFILTER is not set
307# CONFIG_IP_DCCP is not set
308# CONFIG_IP_SCTP is not set
309# CONFIG_TIPC is not set
310# CONFIG_ATM is not set
311# CONFIG_BRIDGE is not set
312# CONFIG_VLAN_8021Q is not set
313# CONFIG_DECNET is not set
314# CONFIG_LLC2 is not set
315# CONFIG_IPX is not set
316# CONFIG_ATALK is not set
317# CONFIG_X25 is not set
318# CONFIG_LAPB is not set
319# CONFIG_ECONET is not set
320# CONFIG_WAN_ROUTER is not set
321# CONFIG_NET_SCHED is not set
322
323#
324# Network testing
325#
326# CONFIG_NET_PKTGEN is not set
327# CONFIG_HAMRADIO is not set
328# CONFIG_CAN is not set
329# CONFIG_IRDA is not set
330# CONFIG_BT is not set
331# CONFIG_AF_RXRPC is not set
332
333#
334# Wireless
335#
336# CONFIG_CFG80211 is not set
337# CONFIG_WIRELESS_EXT is not set
338# CONFIG_MAC80211 is not set
339# CONFIG_IEEE80211 is not set
340# CONFIG_RFKILL is not set
341# CONFIG_NET_9P is not set
342
343#
344# Device Drivers
345#
346
347#
348# Generic Driver Options
349#
350CONFIG_STANDALONE=y
351CONFIG_PREVENT_FIRMWARE_BUILD=y
352# CONFIG_SYS_HYPERVISOR is not set
353# CONFIG_CONNECTOR is not set
354CONFIG_MTD=y
355# CONFIG_MTD_DEBUG is not set
356# CONFIG_MTD_CONCAT is not set
357CONFIG_MTD_PARTITIONS=y
358# CONFIG_MTD_REDBOOT_PARTS is not set
359CONFIG_MTD_CMDLINE_PARTS=y
360CONFIG_MTD_OF_PARTS=y
361# CONFIG_MTD_AR7_PARTS is not set
362
363#
364# User Modules And Translation Layers
365#
366CONFIG_MTD_CHAR=y
367CONFIG_MTD_BLKDEVS=y
368CONFIG_MTD_BLOCK=y
369# CONFIG_FTL is not set
370# CONFIG_NFTL is not set
371# CONFIG_INFTL is not set
372# CONFIG_RFD_FTL is not set
373# CONFIG_SSFDC is not set
374# CONFIG_MTD_OOPS is not set
375
376#
377# RAM/ROM/Flash chip drivers
378#
379CONFIG_MTD_CFI=y
380# CONFIG_MTD_JEDECPROBE is not set
381CONFIG_MTD_GEN_PROBE=y
382CONFIG_MTD_CFI_ADV_OPTIONS=y
383CONFIG_MTD_CFI_NOSWAP=y
384# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
385# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
386CONFIG_MTD_CFI_GEOMETRY=y
387CONFIG_MTD_MAP_BANK_WIDTH_1=y
388CONFIG_MTD_MAP_BANK_WIDTH_2=y
389# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
390# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
391# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
392# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
393CONFIG_MTD_CFI_I1=y
394CONFIG_MTD_CFI_I2=y
395# CONFIG_MTD_CFI_I4 is not set
396# CONFIG_MTD_CFI_I8 is not set
397# CONFIG_MTD_OTP is not set
398CONFIG_MTD_CFI_INTELEXT=y
399CONFIG_MTD_CFI_AMDSTD=y
400CONFIG_MTD_CFI_STAA=y
401CONFIG_MTD_CFI_UTIL=y
402# CONFIG_MTD_RAM is not set
403# CONFIG_MTD_ROM is not set
404# CONFIG_MTD_ABSENT is not set
405
406#
407# Mapping drivers for chip access
408#
409# CONFIG_MTD_COMPLEX_MAPPINGS is not set
410# CONFIG_MTD_PHYSMAP is not set
411CONFIG_MTD_PHYSMAP_OF=y
412# CONFIG_MTD_CFI_FLAGADM is not set
413# CONFIG_MTD_PLATRAM is not set
414
415#
416# Self-contained MTD device drivers
417#
418# CONFIG_MTD_SLRAM is not set
419# CONFIG_MTD_PHRAM is not set
420# CONFIG_MTD_MTDRAM is not set
421# CONFIG_MTD_BLOCK2MTD is not set
422
423#
424# Disk-On-Chip Device Drivers
425#
426# CONFIG_MTD_DOC2000 is not set
427# CONFIG_MTD_DOC2001 is not set
428# CONFIG_MTD_DOC2001PLUS is not set
429# CONFIG_MTD_NAND is not set
430# CONFIG_MTD_ONENAND is not set
431
432#
433# UBI - Unsorted block images
434#
435# CONFIG_MTD_UBI is not set
436CONFIG_OF_DEVICE=y
437# CONFIG_PARPORT is not set
438CONFIG_BLK_DEV=y
439# CONFIG_BLK_DEV_FD is not set
440# CONFIG_BLK_DEV_COW_COMMON is not set
441CONFIG_BLK_DEV_LOOP=y
442# CONFIG_BLK_DEV_CRYPTOLOOP is not set
443# CONFIG_BLK_DEV_NBD is not set
444CONFIG_BLK_DEV_RAM=y
445CONFIG_BLK_DEV_RAM_COUNT=16
446CONFIG_BLK_DEV_RAM_SIZE=4096
447# CONFIG_BLK_DEV_XIP is not set
448# CONFIG_CDROM_PKTCDVD is not set
449# CONFIG_ATA_OVER_ETH is not set
450# CONFIG_MISC_DEVICES is not set
451CONFIG_HAVE_IDE=y
452# CONFIG_IDE is not set
453
454#
455# SCSI device support
456#
457# CONFIG_RAID_ATTRS is not set
458# CONFIG_SCSI is not set
459# CONFIG_SCSI_DMA is not set
460# CONFIG_SCSI_NETLINK is not set
461# CONFIG_ATA is not set
462# CONFIG_MD is not set
463# CONFIG_MACINTOSH_DRIVERS is not set
464CONFIG_NETDEVICES=y
465# CONFIG_NETDEVICES_MULTIQUEUE is not set
466# CONFIG_DUMMY is not set
467# CONFIG_BONDING is not set
468# CONFIG_MACVLAN is not set
469# CONFIG_EQUALIZER is not set
470# CONFIG_TUN is not set
471# CONFIG_VETH is not set
472CONFIG_PHYLIB=y
473
474#
475# MII PHY device drivers
476#
477# CONFIG_MARVELL_PHY is not set
478# CONFIG_DAVICOM_PHY is not set
479# CONFIG_QSEMI_PHY is not set
480# CONFIG_LXT_PHY is not set
481# CONFIG_CICADA_PHY is not set
482# CONFIG_VITESSE_PHY is not set
483# CONFIG_SMSC_PHY is not set
484# CONFIG_BROADCOM_PHY is not set
485# CONFIG_ICPLUS_PHY is not set
486# CONFIG_REALTEK_PHY is not set
487CONFIG_FIXED_PHY=y
488# CONFIG_MDIO_BITBANG is not set
489CONFIG_NET_ETHERNET=y
490CONFIG_MII=y
491# CONFIG_IBM_NEW_EMAC_ZMII is not set
492# CONFIG_IBM_NEW_EMAC_RGMII is not set
493# CONFIG_IBM_NEW_EMAC_TAH is not set
494# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
495# CONFIG_B44 is not set
496CONFIG_FS_ENET=y
497CONFIG_FS_ENET_HAS_SCC=y
498# CONFIG_FS_ENET_HAS_FEC is not set
499# CONFIG_FS_ENET_MDIO_FEC is not set
500# CONFIG_NETDEV_1000 is not set
501# CONFIG_NETDEV_10000 is not set
502
503#
504# Wireless LAN
505#
506# CONFIG_WLAN_PRE80211 is not set
507# CONFIG_WLAN_80211 is not set
508# CONFIG_IWLWIFI_LEDS is not set
509# CONFIG_WAN is not set
510# CONFIG_PPP is not set
511# CONFIG_SLIP is not set
512# CONFIG_NETCONSOLE is not set
513# CONFIG_NETPOLL is not set
514# CONFIG_NET_POLL_CONTROLLER is not set
515# CONFIG_ISDN is not set
516# CONFIG_PHONE is not set
517
518#
519# Input device support
520#
521# CONFIG_INPUT is not set
522
523#
524# Hardware I/O ports
525#
526# CONFIG_SERIO is not set
527# CONFIG_GAMEPORT is not set
528
529#
530# Character devices
531#
532# CONFIG_VT is not set
533CONFIG_DEVKMEM=y
534# CONFIG_SERIAL_NONSTANDARD is not set
535
536#
537# Serial drivers
538#
539# CONFIG_SERIAL_8250 is not set
540
541#
542# Non-8250 serial port support
543#
544# CONFIG_SERIAL_UARTLITE is not set
545CONFIG_SERIAL_CORE=y
546CONFIG_SERIAL_CORE_CONSOLE=y
547CONFIG_SERIAL_CPM=y
548CONFIG_SERIAL_CPM_CONSOLE=y
549# CONFIG_SERIAL_CPM_SCC1 is not set
550# CONFIG_SERIAL_CPM_SCC2 is not set
551# CONFIG_SERIAL_CPM_SCC3 is not set
552# CONFIG_SERIAL_CPM_SCC4 is not set
553CONFIG_SERIAL_CPM_SMC1=y
554# CONFIG_SERIAL_CPM_SMC2 is not set
555CONFIG_UNIX98_PTYS=y
556# CONFIG_LEGACY_PTYS is not set
557# CONFIG_IPMI_HANDLER is not set
558CONFIG_HW_RANDOM=y
559# CONFIG_NVRAM is not set
560CONFIG_GEN_RTC=y
561# CONFIG_GEN_RTC_X is not set
562# CONFIG_R3964 is not set
563# CONFIG_RAW_DRIVER is not set
564# CONFIG_TCG_TPM is not set
565# CONFIG_I2C is not set
566# CONFIG_SPI is not set
567# CONFIG_W1 is not set
568# CONFIG_POWER_SUPPLY is not set
569# CONFIG_HWMON is not set
570# CONFIG_THERMAL is not set
571# CONFIG_WATCHDOG is not set
572
573#
574# Sonics Silicon Backplane
575#
576CONFIG_SSB_POSSIBLE=y
577# CONFIG_SSB is not set
578
579#
580# Multifunction device drivers
581#
582# CONFIG_MFD_SM501 is not set
583# CONFIG_HTC_PASIC3 is not set
584
585#
586# Multimedia devices
587#
588
589#
590# Multimedia core support
591#
592# CONFIG_VIDEO_DEV is not set
593# CONFIG_DVB_CORE is not set
594# CONFIG_VIDEO_MEDIA is not set
595
596#
597# Multimedia drivers
598#
599# CONFIG_DAB is not set
600
601#
602# Graphics support
603#
604# CONFIG_VGASTATE is not set
605# CONFIG_VIDEO_OUTPUT_CONTROL is not set
606# CONFIG_FB is not set
607# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
608
609#
610# Display device support
611#
612# CONFIG_DISPLAY_SUPPORT is not set
613
614#
615# Sound
616#
617# CONFIG_SOUND is not set
618# CONFIG_USB_SUPPORT is not set
619# CONFIG_MMC is not set
620# CONFIG_MEMSTICK is not set
621# CONFIG_NEW_LEDS is not set
622# CONFIG_ACCESSIBILITY is not set
623# CONFIG_EDAC is not set
624# CONFIG_RTC_CLASS is not set
625# CONFIG_DMADEVICES is not set
626# CONFIG_UIO is not set
627
628#
629# File systems
630#
631CONFIG_EXT2_FS=y
632CONFIG_EXT2_FS_XATTR=y
633# CONFIG_EXT2_FS_POSIX_ACL is not set
634# CONFIG_EXT2_FS_SECURITY is not set
635# CONFIG_EXT2_FS_XIP is not set
636CONFIG_EXT3_FS=y
637CONFIG_EXT3_FS_XATTR=y
638# CONFIG_EXT3_FS_POSIX_ACL is not set
639# CONFIG_EXT3_FS_SECURITY is not set
640# CONFIG_EXT4DEV_FS is not set
641CONFIG_JBD=y
642# CONFIG_JBD_DEBUG is not set
643CONFIG_FS_MBCACHE=y
644# CONFIG_REISERFS_FS is not set
645# CONFIG_JFS_FS is not set
646# CONFIG_FS_POSIX_ACL is not set
647# CONFIG_XFS_FS is not set
648# CONFIG_OCFS2_FS is not set
649CONFIG_DNOTIFY=y
650CONFIG_INOTIFY=y
651CONFIG_INOTIFY_USER=y
652# CONFIG_QUOTA is not set
653# CONFIG_AUTOFS_FS is not set
654# CONFIG_AUTOFS4_FS is not set
655# CONFIG_FUSE_FS is not set
656
657#
658# CD-ROM/DVD Filesystems
659#
660# CONFIG_ISO9660_FS is not set
661# CONFIG_UDF_FS is not set
662
663#
664# DOS/FAT/NT Filesystems
665#
666# CONFIG_MSDOS_FS is not set
667# CONFIG_VFAT_FS is not set
668# CONFIG_NTFS_FS is not set
669
670#
671# Pseudo filesystems
672#
673CONFIG_PROC_FS=y
674# CONFIG_PROC_KCORE is not set
675CONFIG_PROC_SYSCTL=y
676CONFIG_SYSFS=y
677CONFIG_TMPFS=y
678# CONFIG_TMPFS_POSIX_ACL is not set
679# CONFIG_HUGETLB_PAGE is not set
680# CONFIG_CONFIGFS_FS is not set
681
682#
683# Miscellaneous filesystems
684#
685# CONFIG_ADFS_FS is not set
686# CONFIG_AFFS_FS is not set
687# CONFIG_HFS_FS is not set
688# CONFIG_HFSPLUS_FS is not set
689# CONFIG_BEFS_FS is not set
690# CONFIG_BFS_FS is not set
691# CONFIG_EFS_FS is not set
692CONFIG_JFFS2_FS=y
693CONFIG_JFFS2_FS_DEBUG=0
694CONFIG_JFFS2_FS_WRITEBUFFER=y
695# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
696# CONFIG_JFFS2_SUMMARY is not set
697# CONFIG_JFFS2_FS_XATTR is not set
698# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
699CONFIG_JFFS2_ZLIB=y
700# CONFIG_JFFS2_LZO is not set
701CONFIG_JFFS2_RTIME=y
702# CONFIG_JFFS2_RUBIN is not set
703CONFIG_CRAMFS=y
704# CONFIG_VXFS_FS is not set
705# CONFIG_MINIX_FS is not set
706# CONFIG_HPFS_FS is not set
707# CONFIG_QNX4FS_FS is not set
708# CONFIG_ROMFS_FS is not set
709# CONFIG_SYSV_FS is not set
710# CONFIG_UFS_FS is not set
711CONFIG_NETWORK_FILESYSTEMS=y
712CONFIG_NFS_FS=y
713CONFIG_NFS_V3=y
714# CONFIG_NFS_V3_ACL is not set
715# CONFIG_NFS_V4 is not set
716# CONFIG_NFSD is not set
717CONFIG_ROOT_NFS=y
718CONFIG_LOCKD=y
719CONFIG_LOCKD_V4=y
720CONFIG_NFS_COMMON=y
721CONFIG_SUNRPC=y
722# CONFIG_SUNRPC_BIND34 is not set
723# CONFIG_RPCSEC_GSS_KRB5 is not set
724# CONFIG_RPCSEC_GSS_SPKM3 is not set
725# CONFIG_SMB_FS is not set
726# CONFIG_CIFS is not set
727# CONFIG_NCP_FS is not set
728# CONFIG_CODA_FS is not set
729# CONFIG_AFS_FS is not set
730
731#
732# Partition Types
733#
734CONFIG_PARTITION_ADVANCED=y
735# CONFIG_ACORN_PARTITION is not set
736# CONFIG_OSF_PARTITION is not set
737# CONFIG_AMIGA_PARTITION is not set
738# CONFIG_ATARI_PARTITION is not set
739# CONFIG_MAC_PARTITION is not set
740CONFIG_MSDOS_PARTITION=y
741# CONFIG_BSD_DISKLABEL is not set
742# CONFIG_MINIX_SUBPARTITION is not set
743# CONFIG_SOLARIS_X86_PARTITION is not set
744# CONFIG_UNIXWARE_DISKLABEL is not set
745# CONFIG_LDM_PARTITION is not set
746# CONFIG_SGI_PARTITION is not set
747# CONFIG_ULTRIX_PARTITION is not set
748# CONFIG_SUN_PARTITION is not set
749# CONFIG_KARMA_PARTITION is not set
750# CONFIG_EFI_PARTITION is not set
751# CONFIG_SYSV68_PARTITION is not set
752# CONFIG_NLS is not set
753# CONFIG_DLM is not set
754
755#
756# Library routines
757#
758CONFIG_BITREVERSE=y
759# CONFIG_GENERIC_FIND_FIRST_BIT is not set
760CONFIG_CRC_CCITT=y
761# CONFIG_CRC16 is not set
762# CONFIG_CRC_ITU_T is not set
763CONFIG_CRC32=y
764# CONFIG_CRC7 is not set
765# CONFIG_LIBCRC32C is not set
766CONFIG_ZLIB_INFLATE=y
767CONFIG_ZLIB_DEFLATE=y
768CONFIG_PLIST=y
769CONFIG_HAS_IOMEM=y
770CONFIG_HAS_IOPORT=y
771CONFIG_HAS_DMA=y
772CONFIG_HAVE_LMB=y
773
774#
775# Kernel hacking
776#
777# CONFIG_PRINTK_TIME is not set
778CONFIG_ENABLE_WARN_DEPRECATED=y
779CONFIG_ENABLE_MUST_CHECK=y
780CONFIG_FRAME_WARN=1024
781# CONFIG_MAGIC_SYSRQ is not set
782# CONFIG_UNUSED_SYMBOLS is not set
783CONFIG_DEBUG_FS=y
784# CONFIG_HEADERS_CHECK is not set
785# CONFIG_DEBUG_KERNEL is not set
786# CONFIG_SAMPLES is not set
787# CONFIG_IRQSTACKS is not set
788# CONFIG_VIRQ_DEBUG is not set
789# CONFIG_PPC_EARLY_DEBUG is not set
790
791#
792# Security options
793#
794# CONFIG_KEYS is not set
795# CONFIG_SECURITY is not set
796# CONFIG_SECURITY_FILE_CAPABILITIES is not set
797CONFIG_CRYPTO=y
798
799#
800# Crypto core or helper
801#
802# CONFIG_CRYPTO_MANAGER is not set
803# CONFIG_CRYPTO_GF128MUL is not set
804# CONFIG_CRYPTO_NULL is not set
805# CONFIG_CRYPTO_CRYPTD is not set
806# CONFIG_CRYPTO_AUTHENC is not set
807
808#
809# Authenticated Encryption with Associated Data
810#
811# CONFIG_CRYPTO_CCM is not set
812# CONFIG_CRYPTO_GCM is not set
813# CONFIG_CRYPTO_SEQIV is not set
814
815#
816# Block modes
817#
818# CONFIG_CRYPTO_CBC is not set
819# CONFIG_CRYPTO_CTR is not set
820# CONFIG_CRYPTO_CTS is not set
821# CONFIG_CRYPTO_ECB is not set
822# CONFIG_CRYPTO_LRW is not set
823# CONFIG_CRYPTO_PCBC is not set
824# CONFIG_CRYPTO_XTS is not set
825
826#
827# Hash modes
828#
829# CONFIG_CRYPTO_HMAC is not set
830# CONFIG_CRYPTO_XCBC is not set
831
832#
833# Digest
834#
835# CONFIG_CRYPTO_CRC32C is not set
836# CONFIG_CRYPTO_MD4 is not set
837# CONFIG_CRYPTO_MD5 is not set
838# CONFIG_CRYPTO_MICHAEL_MIC is not set
839# CONFIG_CRYPTO_SHA1 is not set
840# CONFIG_CRYPTO_SHA256 is not set
841# CONFIG_CRYPTO_SHA512 is not set
842# CONFIG_CRYPTO_TGR192 is not set
843# CONFIG_CRYPTO_WP512 is not set
844
845#
846# Ciphers
847#
848# CONFIG_CRYPTO_AES is not set
849# CONFIG_CRYPTO_ANUBIS is not set
850# CONFIG_CRYPTO_ARC4 is not set
851# CONFIG_CRYPTO_BLOWFISH is not set
852# CONFIG_CRYPTO_CAMELLIA is not set
853# CONFIG_CRYPTO_CAST5 is not set
854# CONFIG_CRYPTO_CAST6 is not set
855# CONFIG_CRYPTO_DES is not set
856# CONFIG_CRYPTO_FCRYPT is not set
857# CONFIG_CRYPTO_KHAZAD is not set
858# CONFIG_CRYPTO_SALSA20 is not set
859# CONFIG_CRYPTO_SEED is not set
860# CONFIG_CRYPTO_SERPENT is not set
861# CONFIG_CRYPTO_TEA is not set
862# CONFIG_CRYPTO_TWOFISH is not set
863
864#
865# Compression
866#
867# CONFIG_CRYPTO_DEFLATE is not set
868# CONFIG_CRYPTO_LZO is not set
869CONFIG_CRYPTO_HW=y
870# CONFIG_PPC_CLOCK is not set
871CONFIG_PPC_LIB_RHEAP=y
872# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/configs/mpc8272_ads_defconfig b/arch/powerpc/configs/mpc8272_ads_defconfig
index 7c435c84c875..ff6f7c475f47 100644
--- a/arch/powerpc/configs/mpc8272_ads_defconfig
+++ b/arch/powerpc/configs/mpc8272_ads_defconfig
@@ -151,11 +151,11 @@ CONFIG_CLASSIC_RCU=y
151# 151#
152CONFIG_PPC_MULTIPLATFORM=y 152CONFIG_PPC_MULTIPLATFORM=y
153CONFIG_CLASSIC32=y 153CONFIG_CLASSIC32=y
154CONFIG_PPC_CHRP=y 154# CONFIG_PPC_CHRP is not set
155# CONFIG_PPC_PMAC is not set
155# CONFIG_MPC5121_ADS is not set 156# CONFIG_MPC5121_ADS is not set
156# CONFIG_MPC5121_GENERIC is not set 157# CONFIG_MPC5121_GENERIC is not set
157# CONFIG_PPC_MPC52xx is not set 158# CONFIG_PPC_MPC52xx is not set
158CONFIG_PPC_PMAC=y
159# CONFIG_PPC_CELL is not set 159# CONFIG_PPC_CELL is not set
160# CONFIG_PPC_CELL_NATIVE is not set 160# CONFIG_PPC_CELL_NATIVE is not set
161CONFIG_PPC_82xx=y 161CONFIG_PPC_82xx=y
diff --git a/arch/powerpc/configs/mpc83xx_defconfig b/arch/powerpc/configs/mpc83xx_defconfig
index 916e3df7cc45..991c9bda12a9 100644
--- a/arch/powerpc/configs/mpc83xx_defconfig
+++ b/arch/powerpc/configs/mpc83xx_defconfig
@@ -166,11 +166,11 @@ CONFIG_CLASSIC_RCU=y
166# 166#
167CONFIG_PPC_MULTIPLATFORM=y 167CONFIG_PPC_MULTIPLATFORM=y
168CONFIG_CLASSIC32=y 168CONFIG_CLASSIC32=y
169CONFIG_PPC_CHRP=y 169# CONFIG_PPC_CHRP is not set
170# CONFIG_PPC_PMAC is not set
170# CONFIG_MPC5121_ADS is not set 171# CONFIG_MPC5121_ADS is not set
171# CONFIG_MPC5121_GENERIC is not set 172# CONFIG_MPC5121_GENERIC is not set
172# CONFIG_PPC_MPC52xx is not set 173# CONFIG_PPC_MPC52xx is not set
173CONFIG_PPC_PMAC=y
174# CONFIG_PPC_CELL is not set 174# CONFIG_PPC_CELL is not set
175# CONFIG_PPC_CELL_NATIVE is not set 175# CONFIG_PPC_CELL_NATIVE is not set
176# CONFIG_PPC_82xx is not set 176# CONFIG_PPC_82xx is not set
diff --git a/arch/powerpc/configs/mpc86xx_defconfig b/arch/powerpc/configs/mpc86xx_defconfig
new file mode 100644
index 000000000000..9d4be820cf1f
--- /dev/null
+++ b/arch/powerpc/configs/mpc86xx_defconfig
@@ -0,0 +1,1646 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.27-rc5
4# Tue Sep 23 23:28:38 2008
5#
6# CONFIG_PPC64 is not set
7
8#
9# Processor support
10#
11CONFIG_6xx=y
12# CONFIG_PPC_85xx is not set
13# CONFIG_PPC_8xx is not set
14# CONFIG_40x is not set
15# CONFIG_44x is not set
16# CONFIG_E200 is not set
17CONFIG_PPC_FPU=y
18CONFIG_ALTIVEC=y
19CONFIG_PPC_STD_MMU=y
20CONFIG_PPC_STD_MMU_32=y
21# CONFIG_PPC_MM_SLICES is not set
22CONFIG_SMP=y
23CONFIG_NR_CPUS=2
24CONFIG_PPC32=y
25CONFIG_WORD_SIZE=32
26CONFIG_PPC_MERGE=y
27CONFIG_MMU=y
28CONFIG_GENERIC_CMOS_UPDATE=y
29CONFIG_GENERIC_TIME=y
30CONFIG_GENERIC_TIME_VSYSCALL=y
31CONFIG_GENERIC_CLOCKEVENTS=y
32CONFIG_GENERIC_HARDIRQS=y
33# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
34CONFIG_IRQ_PER_CPU=y
35CONFIG_STACKTRACE_SUPPORT=y
36CONFIG_HAVE_LATENCYTOP_SUPPORT=y
37CONFIG_LOCKDEP_SUPPORT=y
38CONFIG_RWSEM_XCHGADD_ALGORITHM=y
39CONFIG_ARCH_HAS_ILOG2_U32=y
40CONFIG_GENERIC_HWEIGHT=y
41CONFIG_GENERIC_CALIBRATE_DELAY=y
42CONFIG_GENERIC_FIND_NEXT_BIT=y
43# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
44CONFIG_PPC=y
45CONFIG_EARLY_PRINTK=y
46CONFIG_GENERIC_NVRAM=y
47CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
48CONFIG_ARCH_MAY_HAVE_PC_FDC=y
49CONFIG_PPC_OF=y
50CONFIG_OF=y
51CONFIG_PPC_UDBG_16550=y
52CONFIG_GENERIC_TBSYNC=y
53CONFIG_AUDIT_ARCH=y
54CONFIG_GENERIC_BUG=y
55CONFIG_DEFAULT_UIMAGE=y
56# CONFIG_PPC_DCR_NATIVE is not set
57# CONFIG_PPC_DCR_MMIO is not set
58CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
59
60#
61# General setup
62#
63CONFIG_EXPERIMENTAL=y
64CONFIG_LOCK_KERNEL=y
65CONFIG_INIT_ENV_ARG_LIMIT=32
66CONFIG_LOCALVERSION=""
67CONFIG_LOCALVERSION_AUTO=y
68CONFIG_SWAP=y
69CONFIG_SYSVIPC=y
70CONFIG_SYSVIPC_SYSCTL=y
71CONFIG_POSIX_MQUEUE=y
72CONFIG_BSD_PROCESS_ACCT=y
73# CONFIG_BSD_PROCESS_ACCT_V3 is not set
74# CONFIG_TASKSTATS is not set
75CONFIG_AUDIT=y
76# CONFIG_AUDITSYSCALL is not set
77CONFIG_IKCONFIG=y
78CONFIG_IKCONFIG_PROC=y
79CONFIG_LOG_BUF_SHIFT=14
80# CONFIG_CGROUPS is not set
81CONFIG_GROUP_SCHED=y
82# CONFIG_FAIR_GROUP_SCHED is not set
83# CONFIG_RT_GROUP_SCHED is not set
84CONFIG_USER_SCHED=y
85# CONFIG_CGROUP_SCHED is not set
86CONFIG_SYSFS_DEPRECATED=y
87CONFIG_SYSFS_DEPRECATED_V2=y
88# CONFIG_RELAY is not set
89# CONFIG_NAMESPACES is not set
90CONFIG_BLK_DEV_INITRD=y
91CONFIG_INITRAMFS_SOURCE=""
92# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
93CONFIG_SYSCTL=y
94CONFIG_EMBEDDED=y
95CONFIG_SYSCTL_SYSCALL=y
96CONFIG_KALLSYMS=y
97CONFIG_KALLSYMS_ALL=y
98CONFIG_KALLSYMS_EXTRA_PASS=y
99CONFIG_HOTPLUG=y
100CONFIG_PRINTK=y
101CONFIG_BUG=y
102CONFIG_ELF_CORE=y
103CONFIG_COMPAT_BRK=y
104CONFIG_BASE_FULL=y
105CONFIG_FUTEX=y
106CONFIG_ANON_INODES=y
107CONFIG_EPOLL=y
108CONFIG_SIGNALFD=y
109CONFIG_TIMERFD=y
110CONFIG_EVENTFD=y
111CONFIG_SHMEM=y
112CONFIG_VM_EVENT_COUNTERS=y
113CONFIG_SLUB_DEBUG=y
114# CONFIG_SLAB is not set
115CONFIG_SLUB=y
116# CONFIG_SLOB is not set
117# CONFIG_PROFILING is not set
118# CONFIG_MARKERS is not set
119CONFIG_HAVE_OPROFILE=y
120# CONFIG_KPROBES is not set
121CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
122CONFIG_HAVE_IOREMAP_PROT=y
123CONFIG_HAVE_KPROBES=y
124CONFIG_HAVE_KRETPROBES=y
125CONFIG_HAVE_ARCH_TRACEHOOK=y
126# CONFIG_HAVE_DMA_ATTRS is not set
127CONFIG_USE_GENERIC_SMP_HELPERS=y
128# CONFIG_HAVE_CLK is not set
129CONFIG_PROC_PAGE_MONITOR=y
130# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
131CONFIG_SLABINFO=y
132CONFIG_RT_MUTEXES=y
133# CONFIG_TINY_SHMEM is not set
134CONFIG_BASE_SMALL=0
135CONFIG_MODULES=y
136# CONFIG_MODULE_FORCE_LOAD is not set
137CONFIG_MODULE_UNLOAD=y
138CONFIG_MODULE_FORCE_UNLOAD=y
139CONFIG_MODVERSIONS=y
140# CONFIG_MODULE_SRCVERSION_ALL is not set
141CONFIG_KMOD=y
142CONFIG_STOP_MACHINE=y
143CONFIG_BLOCK=y
144CONFIG_LBD=y
145# CONFIG_BLK_DEV_IO_TRACE is not set
146# CONFIG_LSF is not set
147# CONFIG_BLK_DEV_BSG is not set
148# CONFIG_BLK_DEV_INTEGRITY is not set
149
150#
151# IO Schedulers
152#
153CONFIG_IOSCHED_NOOP=y
154CONFIG_IOSCHED_AS=y
155CONFIG_IOSCHED_DEADLINE=y
156CONFIG_IOSCHED_CFQ=y
157# CONFIG_DEFAULT_AS is not set
158# CONFIG_DEFAULT_DEADLINE is not set
159CONFIG_DEFAULT_CFQ=y
160# CONFIG_DEFAULT_NOOP is not set
161CONFIG_DEFAULT_IOSCHED="cfq"
162CONFIG_CLASSIC_RCU=y
163# CONFIG_MPC8xxx_GPIO is not set
164
165#
166# Platform support
167#
168CONFIG_PPC_MULTIPLATFORM=y
169CONFIG_CLASSIC32=y
170# CONFIG_PPC_CHRP is not set
171# CONFIG_MPC5121_ADS is not set
172# CONFIG_MPC5121_GENERIC is not set
173# CONFIG_PPC_MPC52xx is not set
174# CONFIG_PPC_PMAC is not set
175# CONFIG_PPC_CELL is not set
176# CONFIG_PPC_CELL_NATIVE is not set
177# CONFIG_PPC_82xx is not set
178# CONFIG_PQ2ADS is not set
179# CONFIG_PPC_83xx is not set
180CONFIG_PPC_86xx=y
181CONFIG_MPC8641_HPCN=y
182CONFIG_SBC8641D=y
183CONFIG_MPC8610_HPCD=y
184CONFIG_GEF_SBC610=y
185CONFIG_MPC8641=y
186CONFIG_MPC8610=y
187# CONFIG_IPIC is not set
188CONFIG_MPIC=y
189# CONFIG_MPIC_WEIRD is not set
190CONFIG_PPC_I8259=y
191# CONFIG_PPC_RTAS is not set
192# CONFIG_MMIO_NVRAM is not set
193# CONFIG_PPC_MPC106 is not set
194# CONFIG_PPC_970_NAP is not set
195# CONFIG_PPC_INDIRECT_IO is not set
196# CONFIG_GENERIC_IOMAP is not set
197# CONFIG_CPU_FREQ is not set
198# CONFIG_TAU is not set
199CONFIG_FSL_ULI1575=y
200
201#
202# Kernel options
203#
204CONFIG_HIGHMEM=y
205CONFIG_TICK_ONESHOT=y
206CONFIG_NO_HZ=y
207CONFIG_HIGH_RES_TIMERS=y
208CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
209# CONFIG_HZ_100 is not set
210# CONFIG_HZ_250 is not set
211# CONFIG_HZ_300 is not set
212CONFIG_HZ_1000=y
213CONFIG_HZ=1000
214CONFIG_SCHED_HRTICK=y
215CONFIG_PREEMPT_NONE=y
216# CONFIG_PREEMPT_VOLUNTARY is not set
217# CONFIG_PREEMPT is not set
218CONFIG_BINFMT_ELF=y
219CONFIG_BINFMT_MISC=m
220# CONFIG_IOMMU_HELPER is not set
221CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
222CONFIG_ARCH_HAS_WALK_MEMORY=y
223CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
224# CONFIG_KEXEC is not set
225# CONFIG_IRQ_ALL_CPUS is not set
226CONFIG_ARCH_FLATMEM_ENABLE=y
227CONFIG_ARCH_POPULATES_NODE_MAP=y
228CONFIG_SELECT_MEMORY_MODEL=y
229CONFIG_FLATMEM_MANUAL=y
230# CONFIG_DISCONTIGMEM_MANUAL is not set
231# CONFIG_SPARSEMEM_MANUAL is not set
232CONFIG_FLATMEM=y
233CONFIG_FLAT_NODE_MEM_MAP=y
234# CONFIG_SPARSEMEM_STATIC is not set
235# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
236CONFIG_PAGEFLAGS_EXTENDED=y
237CONFIG_SPLIT_PTLOCK_CPUS=4
238CONFIG_MIGRATION=y
239# CONFIG_RESOURCES_64BIT is not set
240CONFIG_ZONE_DMA_FLAG=1
241CONFIG_BOUNCE=y
242CONFIG_VIRT_TO_BUS=y
243CONFIG_FORCE_MAX_ZONEORDER=11
244CONFIG_PROC_DEVICETREE=y
245# CONFIG_CMDLINE_BOOL is not set
246CONFIG_EXTRA_TARGETS=""
247# CONFIG_PM is not set
248CONFIG_SECCOMP=y
249CONFIG_ISA_DMA_API=y
250
251#
252# Bus options
253#
254CONFIG_ZONE_DMA=y
255CONFIG_GENERIC_ISA_DMA=y
256CONFIG_PPC_INDIRECT_PCI=y
257CONFIG_FSL_SOC=y
258CONFIG_FSL_PCI=y
259CONFIG_PPC_PCI_CHOICE=y
260CONFIG_PCI=y
261CONFIG_PCI_DOMAINS=y
262CONFIG_PCI_SYSCALL=y
263# CONFIG_PCIEPORTBUS is not set
264CONFIG_ARCH_SUPPORTS_MSI=y
265# CONFIG_PCI_MSI is not set
266CONFIG_PCI_LEGACY=y
267# CONFIG_PCI_DEBUG is not set
268# CONFIG_PCCARD is not set
269# CONFIG_HOTPLUG_PCI is not set
270CONFIG_HAS_RAPIDIO=y
271# CONFIG_RAPIDIO is not set
272
273#
274# Advanced setup
275#
276# CONFIG_ADVANCED_OPTIONS is not set
277
278#
279# Default settings for advanced configuration options are used
280#
281CONFIG_LOWMEM_SIZE=0x30000000
282CONFIG_PAGE_OFFSET=0xc0000000
283CONFIG_KERNEL_START=0xc0000000
284CONFIG_PHYSICAL_START=0x00000000
285CONFIG_TASK_SIZE=0xc0000000
286CONFIG_NET=y
287
288#
289# Networking options
290#
291CONFIG_PACKET=y
292# CONFIG_PACKET_MMAP is not set
293CONFIG_UNIX=y
294CONFIG_XFRM=y
295CONFIG_XFRM_USER=y
296# CONFIG_XFRM_SUB_POLICY is not set
297# CONFIG_XFRM_MIGRATE is not set
298# CONFIG_XFRM_STATISTICS is not set
299CONFIG_NET_KEY=m
300# CONFIG_NET_KEY_MIGRATE is not set
301CONFIG_INET=y
302CONFIG_IP_MULTICAST=y
303CONFIG_IP_ADVANCED_ROUTER=y
304CONFIG_ASK_IP_FIB_HASH=y
305# CONFIG_IP_FIB_TRIE is not set
306CONFIG_IP_FIB_HASH=y
307CONFIG_IP_MULTIPLE_TABLES=y
308CONFIG_IP_ROUTE_MULTIPATH=y
309CONFIG_IP_ROUTE_VERBOSE=y
310CONFIG_IP_PNP=y
311CONFIG_IP_PNP_DHCP=y
312CONFIG_IP_PNP_BOOTP=y
313CONFIG_IP_PNP_RARP=y
314CONFIG_NET_IPIP=y
315CONFIG_NET_IPGRE=y
316CONFIG_NET_IPGRE_BROADCAST=y
317CONFIG_IP_MROUTE=y
318CONFIG_IP_PIMSM_V1=y
319CONFIG_IP_PIMSM_V2=y
320CONFIG_ARPD=y
321# CONFIG_SYN_COOKIES is not set
322# CONFIG_INET_AH is not set
323# CONFIG_INET_ESP is not set
324# CONFIG_INET_IPCOMP is not set
325# CONFIG_INET_XFRM_TUNNEL is not set
326CONFIG_INET_TUNNEL=y
327# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
328# CONFIG_INET_XFRM_MODE_TUNNEL is not set
329# CONFIG_INET_XFRM_MODE_BEET is not set
330# CONFIG_INET_LRO is not set
331CONFIG_INET_DIAG=y
332CONFIG_INET_TCP_DIAG=y
333# CONFIG_TCP_CONG_ADVANCED is not set
334CONFIG_TCP_CONG_CUBIC=y
335CONFIG_DEFAULT_TCP_CONG="cubic"
336# CONFIG_TCP_MD5SIG is not set
337CONFIG_IPV6=y
338# CONFIG_IPV6_PRIVACY is not set
339# CONFIG_IPV6_ROUTER_PREF is not set
340# CONFIG_IPV6_OPTIMISTIC_DAD is not set
341# CONFIG_INET6_AH is not set
342# CONFIG_INET6_ESP is not set
343# CONFIG_INET6_IPCOMP is not set
344# CONFIG_IPV6_MIP6 is not set
345# CONFIG_INET6_XFRM_TUNNEL is not set
346# CONFIG_INET6_TUNNEL is not set
347CONFIG_INET6_XFRM_MODE_TRANSPORT=y
348CONFIG_INET6_XFRM_MODE_TUNNEL=y
349CONFIG_INET6_XFRM_MODE_BEET=y
350# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
351CONFIG_IPV6_SIT=y
352CONFIG_IPV6_NDISC_NODETYPE=y
353# CONFIG_IPV6_TUNNEL is not set
354# CONFIG_IPV6_MULTIPLE_TABLES is not set
355# CONFIG_IPV6_MROUTE is not set
356# CONFIG_NETWORK_SECMARK is not set
357# CONFIG_NETFILTER is not set
358# CONFIG_IP_DCCP is not set
359CONFIG_IP_SCTP=m
360# CONFIG_SCTP_DBG_MSG is not set
361# CONFIG_SCTP_DBG_OBJCNT is not set
362# CONFIG_SCTP_HMAC_NONE is not set
363# CONFIG_SCTP_HMAC_SHA1 is not set
364CONFIG_SCTP_HMAC_MD5=y
365# CONFIG_TIPC is not set
366# CONFIG_ATM is not set
367# CONFIG_BRIDGE is not set
368# CONFIG_VLAN_8021Q is not set
369# CONFIG_DECNET is not set
370# CONFIG_LLC2 is not set
371# CONFIG_IPX is not set
372# CONFIG_ATALK is not set
373# CONFIG_X25 is not set
374# CONFIG_LAPB is not set
375# CONFIG_ECONET is not set
376# CONFIG_WAN_ROUTER is not set
377# CONFIG_NET_SCHED is not set
378
379#
380# Network testing
381#
382# CONFIG_NET_PKTGEN is not set
383# CONFIG_HAMRADIO is not set
384# CONFIG_CAN is not set
385# CONFIG_IRDA is not set
386# CONFIG_BT is not set
387# CONFIG_AF_RXRPC is not set
388CONFIG_FIB_RULES=y
389
390#
391# Wireless
392#
393# CONFIG_CFG80211 is not set
394# CONFIG_WIRELESS_EXT is not set
395# CONFIG_MAC80211 is not set
396# CONFIG_IEEE80211 is not set
397# CONFIG_RFKILL is not set
398# CONFIG_NET_9P is not set
399
400#
401# Device Drivers
402#
403
404#
405# Generic Driver Options
406#
407CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
408CONFIG_STANDALONE=y
409CONFIG_PREVENT_FIRMWARE_BUILD=y
410CONFIG_FW_LOADER=y
411CONFIG_FIRMWARE_IN_KERNEL=y
412CONFIG_EXTRA_FIRMWARE=""
413# CONFIG_DEBUG_DRIVER is not set
414# CONFIG_DEBUG_DEVRES is not set
415# CONFIG_SYS_HYPERVISOR is not set
416# CONFIG_CONNECTOR is not set
417# CONFIG_MTD is not set
418CONFIG_OF_DEVICE=y
419CONFIG_OF_I2C=y
420# CONFIG_PARPORT is not set
421CONFIG_BLK_DEV=y
422# CONFIG_BLK_DEV_FD is not set
423# CONFIG_BLK_CPQ_DA is not set
424# CONFIG_BLK_CPQ_CISS_DA is not set
425# CONFIG_BLK_DEV_DAC960 is not set
426# CONFIG_BLK_DEV_UMEM is not set
427# CONFIG_BLK_DEV_COW_COMMON is not set
428CONFIG_BLK_DEV_LOOP=y
429# CONFIG_BLK_DEV_CRYPTOLOOP is not set
430CONFIG_BLK_DEV_NBD=y
431# CONFIG_BLK_DEV_SX8 is not set
432# CONFIG_BLK_DEV_UB is not set
433CONFIG_BLK_DEV_RAM=y
434CONFIG_BLK_DEV_RAM_COUNT=16
435CONFIG_BLK_DEV_RAM_SIZE=131072
436# CONFIG_BLK_DEV_XIP is not set
437# CONFIG_CDROM_PKTCDVD is not set
438# CONFIG_ATA_OVER_ETH is not set
439# CONFIG_BLK_DEV_HD is not set
440CONFIG_MISC_DEVICES=y
441# CONFIG_PHANTOM is not set
442# CONFIG_EEPROM_93CX6 is not set
443# CONFIG_SGI_IOC4 is not set
444# CONFIG_TIFM_CORE is not set
445# CONFIG_ENCLOSURE_SERVICES is not set
446# CONFIG_HP_ILO is not set
447CONFIG_HAVE_IDE=y
448# CONFIG_IDE is not set
449
450#
451# SCSI device support
452#
453# CONFIG_RAID_ATTRS is not set
454CONFIG_SCSI=y
455CONFIG_SCSI_DMA=y
456# CONFIG_SCSI_TGT is not set
457# CONFIG_SCSI_NETLINK is not set
458CONFIG_SCSI_PROC_FS=y
459
460#
461# SCSI support type (disk, tape, CD-ROM)
462#
463CONFIG_BLK_DEV_SD=y
464CONFIG_CHR_DEV_ST=y
465# CONFIG_CHR_DEV_OSST is not set
466CONFIG_BLK_DEV_SR=y
467# CONFIG_BLK_DEV_SR_VENDOR is not set
468CONFIG_CHR_DEV_SG=y
469# CONFIG_CHR_DEV_SCH is not set
470
471#
472# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
473#
474CONFIG_SCSI_MULTI_LUN=y
475# CONFIG_SCSI_CONSTANTS is not set
476CONFIG_SCSI_LOGGING=y
477# CONFIG_SCSI_SCAN_ASYNC is not set
478CONFIG_SCSI_WAIT_SCAN=m
479
480#
481# SCSI Transports
482#
483# CONFIG_SCSI_SPI_ATTRS is not set
484# CONFIG_SCSI_FC_ATTRS is not set
485# CONFIG_SCSI_ISCSI_ATTRS is not set
486# CONFIG_SCSI_SAS_LIBSAS is not set
487# CONFIG_SCSI_SRP_ATTRS is not set
488CONFIG_SCSI_LOWLEVEL=y
489# CONFIG_ISCSI_TCP is not set
490# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
491# CONFIG_SCSI_3W_9XXX is not set
492# CONFIG_SCSI_ACARD is not set
493# CONFIG_SCSI_AACRAID is not set
494# CONFIG_SCSI_AIC7XXX is not set
495# CONFIG_SCSI_AIC7XXX_OLD is not set
496# CONFIG_SCSI_AIC79XX is not set
497# CONFIG_SCSI_AIC94XX is not set
498# CONFIG_SCSI_DPT_I2O is not set
499# CONFIG_SCSI_ADVANSYS is not set
500# CONFIG_SCSI_ARCMSR is not set
501# CONFIG_MEGARAID_NEWGEN is not set
502# CONFIG_MEGARAID_LEGACY is not set
503# CONFIG_MEGARAID_SAS is not set
504# CONFIG_SCSI_HPTIOP is not set
505# CONFIG_SCSI_BUSLOGIC is not set
506# CONFIG_SCSI_DMX3191D is not set
507# CONFIG_SCSI_EATA is not set
508# CONFIG_SCSI_FUTURE_DOMAIN is not set
509# CONFIG_SCSI_GDTH is not set
510# CONFIG_SCSI_IPS is not set
511# CONFIG_SCSI_INITIO is not set
512# CONFIG_SCSI_INIA100 is not set
513# CONFIG_SCSI_MVSAS is not set
514# CONFIG_SCSI_STEX is not set
515# CONFIG_SCSI_SYM53C8XX_2 is not set
516# CONFIG_SCSI_IPR is not set
517# CONFIG_SCSI_QLOGIC_1280 is not set
518# CONFIG_SCSI_QLA_FC is not set
519# CONFIG_SCSI_QLA_ISCSI is not set
520# CONFIG_SCSI_LPFC is not set
521# CONFIG_SCSI_DC395x is not set
522# CONFIG_SCSI_DC390T is not set
523# CONFIG_SCSI_NSP32 is not set
524# CONFIG_SCSI_DEBUG is not set
525# CONFIG_SCSI_SRP is not set
526# CONFIG_SCSI_DH is not set
527CONFIG_ATA=y
528# CONFIG_ATA_NONSTANDARD is not set
529CONFIG_SATA_PMP=y
530CONFIG_SATA_AHCI=y
531# CONFIG_SATA_SIL24 is not set
532# CONFIG_SATA_FSL is not set
533CONFIG_ATA_SFF=y
534# CONFIG_SATA_SVW is not set
535# CONFIG_ATA_PIIX is not set
536# CONFIG_SATA_MV is not set
537# CONFIG_SATA_NV is not set
538# CONFIG_PDC_ADMA is not set
539# CONFIG_SATA_QSTOR is not set
540# CONFIG_SATA_PROMISE is not set
541# CONFIG_SATA_SX4 is not set
542# CONFIG_SATA_SIL is not set
543# CONFIG_SATA_SIS is not set
544# CONFIG_SATA_ULI is not set
545# CONFIG_SATA_VIA is not set
546# CONFIG_SATA_VITESSE is not set
547# CONFIG_SATA_INIC162X is not set
548CONFIG_PATA_ALI=y
549# CONFIG_PATA_AMD is not set
550# CONFIG_PATA_ARTOP is not set
551# CONFIG_PATA_ATIIXP is not set
552# CONFIG_PATA_CMD640_PCI is not set
553# CONFIG_PATA_CMD64X is not set
554# CONFIG_PATA_CS5520 is not set
555# CONFIG_PATA_CS5530 is not set
556# CONFIG_PATA_CYPRESS is not set
557# CONFIG_PATA_EFAR is not set
558# CONFIG_ATA_GENERIC is not set
559# CONFIG_PATA_HPT366 is not set
560# CONFIG_PATA_HPT37X is not set
561# CONFIG_PATA_HPT3X2N is not set
562# CONFIG_PATA_HPT3X3 is not set
563# CONFIG_PATA_IT821X is not set
564# CONFIG_PATA_IT8213 is not set
565# CONFIG_PATA_JMICRON is not set
566# CONFIG_PATA_TRIFLEX is not set
567# CONFIG_PATA_MARVELL is not set
568# CONFIG_PATA_MPIIX is not set
569# CONFIG_PATA_OLDPIIX is not set
570# CONFIG_PATA_NETCELL is not set
571# CONFIG_PATA_NINJA32 is not set
572# CONFIG_PATA_NS87410 is not set
573# CONFIG_PATA_NS87415 is not set
574# CONFIG_PATA_OPTI is not set
575# CONFIG_PATA_OPTIDMA is not set
576# CONFIG_PATA_PDC_OLD is not set
577# CONFIG_PATA_RADISYS is not set
578# CONFIG_PATA_RZ1000 is not set
579# CONFIG_PATA_SC1200 is not set
580# CONFIG_PATA_SERVERWORKS is not set
581# CONFIG_PATA_PDC2027X is not set
582# CONFIG_PATA_SIL680 is not set
583# CONFIG_PATA_SIS is not set
584# CONFIG_PATA_VIA is not set
585# CONFIG_PATA_WINBOND is not set
586# CONFIG_PATA_PLATFORM is not set
587# CONFIG_PATA_SCH is not set
588# CONFIG_MD is not set
589# CONFIG_FUSION is not set
590
591#
592# IEEE 1394 (FireWire) support
593#
594
595#
596# Enable only one of the two stacks, unless you know what you are doing
597#
598# CONFIG_FIREWIRE is not set
599# CONFIG_IEEE1394 is not set
600# CONFIG_I2O is not set
601# CONFIG_MACINTOSH_DRIVERS is not set
602CONFIG_NETDEVICES=y
603CONFIG_DUMMY=y
604# CONFIG_BONDING is not set
605# CONFIG_MACVLAN is not set
606# CONFIG_EQUALIZER is not set
607# CONFIG_TUN is not set
608# CONFIG_VETH is not set
609# CONFIG_ARCNET is not set
610CONFIG_PHYLIB=y
611
612#
613# MII PHY device drivers
614#
615# CONFIG_MARVELL_PHY is not set
616# CONFIG_DAVICOM_PHY is not set
617# CONFIG_QSEMI_PHY is not set
618# CONFIG_LXT_PHY is not set
619# CONFIG_CICADA_PHY is not set
620CONFIG_VITESSE_PHY=y
621# CONFIG_SMSC_PHY is not set
622# CONFIG_BROADCOM_PHY is not set
623# CONFIG_ICPLUS_PHY is not set
624# CONFIG_REALTEK_PHY is not set
625# CONFIG_FIXED_PHY is not set
626# CONFIG_MDIO_BITBANG is not set
627CONFIG_NET_ETHERNET=y
628CONFIG_MII=y
629# CONFIG_HAPPYMEAL is not set
630# CONFIG_SUNGEM is not set
631# CONFIG_CASSINI is not set
632# CONFIG_NET_VENDOR_3COM is not set
633# CONFIG_NET_TULIP is not set
634# CONFIG_HP100 is not set
635# CONFIG_IBM_NEW_EMAC_ZMII is not set
636# CONFIG_IBM_NEW_EMAC_RGMII is not set
637# CONFIG_IBM_NEW_EMAC_TAH is not set
638# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
639# CONFIG_NET_PCI is not set
640# CONFIG_B44 is not set
641CONFIG_NETDEV_1000=y
642# CONFIG_ACENIC is not set
643# CONFIG_DL2K is not set
644# CONFIG_E1000 is not set
645# CONFIG_E1000E is not set
646# CONFIG_IP1000 is not set
647# CONFIG_IGB is not set
648# CONFIG_NS83820 is not set
649# CONFIG_HAMACHI is not set
650# CONFIG_YELLOWFIN is not set
651# CONFIG_R8169 is not set
652# CONFIG_SIS190 is not set
653# CONFIG_SKGE is not set
654# CONFIG_SKY2 is not set
655# CONFIG_VIA_VELOCITY is not set
656# CONFIG_TIGON3 is not set
657# CONFIG_BNX2 is not set
658CONFIG_GIANFAR=y
659# CONFIG_MV643XX_ETH is not set
660# CONFIG_QLA3XXX is not set
661# CONFIG_ATL1 is not set
662# CONFIG_ATL1E is not set
663CONFIG_NETDEV_10000=y
664# CONFIG_CHELSIO_T1 is not set
665# CONFIG_CHELSIO_T3 is not set
666# CONFIG_IXGBE is not set
667# CONFIG_IXGB is not set
668# CONFIG_S2IO is not set
669# CONFIG_MYRI10GE is not set
670# CONFIG_NETXEN_NIC is not set
671# CONFIG_NIU is not set
672# CONFIG_MLX4_CORE is not set
673# CONFIG_TEHUTI is not set
674# CONFIG_BNX2X is not set
675# CONFIG_SFC is not set
676# CONFIG_TR is not set
677
678#
679# Wireless LAN
680#
681# CONFIG_WLAN_PRE80211 is not set
682# CONFIG_WLAN_80211 is not set
683# CONFIG_IWLWIFI_LEDS is not set
684
685#
686# USB Network Adapters
687#
688# CONFIG_USB_CATC is not set
689# CONFIG_USB_KAWETH is not set
690# CONFIG_USB_PEGASUS is not set
691# CONFIG_USB_RTL8150 is not set
692# CONFIG_USB_USBNET is not set
693# CONFIG_WAN is not set
694# CONFIG_FDDI is not set
695# CONFIG_HIPPI is not set
696# CONFIG_PPP is not set
697# CONFIG_SLIP is not set
698# CONFIG_NET_FC is not set
699# CONFIG_NETCONSOLE is not set
700# CONFIG_NETPOLL is not set
701# CONFIG_NET_POLL_CONTROLLER is not set
702# CONFIG_ISDN is not set
703# CONFIG_PHONE is not set
704
705#
706# Input device support
707#
708CONFIG_INPUT=y
709# CONFIG_INPUT_FF_MEMLESS is not set
710# CONFIG_INPUT_POLLDEV is not set
711
712#
713# Userland interfaces
714#
715# CONFIG_INPUT_MOUSEDEV is not set
716# CONFIG_INPUT_JOYDEV is not set
717# CONFIG_INPUT_EVDEV is not set
718# CONFIG_INPUT_EVBUG is not set
719
720#
721# Input Device Drivers
722#
723# CONFIG_INPUT_KEYBOARD is not set
724# CONFIG_INPUT_MOUSE is not set
725# CONFIG_INPUT_JOYSTICK is not set
726# CONFIG_INPUT_TABLET is not set
727# CONFIG_INPUT_TOUCHSCREEN is not set
728# CONFIG_INPUT_MISC is not set
729
730#
731# Hardware I/O ports
732#
733CONFIG_SERIO=y
734CONFIG_SERIO_I8042=y
735CONFIG_SERIO_SERPORT=y
736# CONFIG_SERIO_PCIPS2 is not set
737CONFIG_SERIO_LIBPS2=y
738# CONFIG_SERIO_RAW is not set
739# CONFIG_SERIO_XILINX_XPS_PS2 is not set
740# CONFIG_GAMEPORT is not set
741
742#
743# Character devices
744#
745CONFIG_VT=y
746CONFIG_CONSOLE_TRANSLATIONS=y
747CONFIG_VT_CONSOLE=y
748CONFIG_HW_CONSOLE=y
749# CONFIG_VT_HW_CONSOLE_BINDING is not set
750CONFIG_DEVKMEM=y
751# CONFIG_SERIAL_NONSTANDARD is not set
752# CONFIG_NOZOMI is not set
753
754#
755# Serial drivers
756#
757CONFIG_SERIAL_8250=y
758CONFIG_SERIAL_8250_CONSOLE=y
759CONFIG_SERIAL_8250_PCI=y
760CONFIG_SERIAL_8250_NR_UARTS=2
761CONFIG_SERIAL_8250_RUNTIME_UARTS=2
762CONFIG_SERIAL_8250_EXTENDED=y
763CONFIG_SERIAL_8250_MANY_PORTS=y
764CONFIG_SERIAL_8250_SHARE_IRQ=y
765CONFIG_SERIAL_8250_DETECT_IRQ=y
766CONFIG_SERIAL_8250_RSA=y
767
768#
769# Non-8250 serial port support
770#
771# CONFIG_SERIAL_UARTLITE is not set
772CONFIG_SERIAL_CORE=y
773CONFIG_SERIAL_CORE_CONSOLE=y
774# CONFIG_SERIAL_JSM is not set
775# CONFIG_SERIAL_OF_PLATFORM is not set
776CONFIG_UNIX98_PTYS=y
777CONFIG_LEGACY_PTYS=y
778CONFIG_LEGACY_PTY_COUNT=256
779# CONFIG_IPMI_HANDLER is not set
780# CONFIG_HW_RANDOM is not set
781CONFIG_NVRAM=y
782# CONFIG_R3964 is not set
783# CONFIG_APPLICOM is not set
784# CONFIG_RAW_DRIVER is not set
785# CONFIG_TCG_TPM is not set
786CONFIG_DEVPORT=y
787CONFIG_I2C=y
788CONFIG_I2C_BOARDINFO=y
789# CONFIG_I2C_CHARDEV is not set
790CONFIG_I2C_HELPER_AUTO=y
791
792#
793# I2C Hardware Bus support
794#
795
796#
797# PC SMBus host controller drivers
798#
799# CONFIG_I2C_ALI1535 is not set
800# CONFIG_I2C_ALI1563 is not set
801# CONFIG_I2C_ALI15X3 is not set
802# CONFIG_I2C_AMD756 is not set
803# CONFIG_I2C_AMD8111 is not set
804# CONFIG_I2C_I801 is not set
805# CONFIG_I2C_ISCH is not set
806# CONFIG_I2C_PIIX4 is not set
807# CONFIG_I2C_NFORCE2 is not set
808# CONFIG_I2C_SIS5595 is not set
809# CONFIG_I2C_SIS630 is not set
810# CONFIG_I2C_SIS96X is not set
811# CONFIG_I2C_VIA is not set
812# CONFIG_I2C_VIAPRO is not set
813
814#
815# I2C system bus drivers (mostly embedded / system-on-chip)
816#
817CONFIG_I2C_MPC=y
818# CONFIG_I2C_OCORES is not set
819# CONFIG_I2C_SIMTEC is not set
820
821#
822# External I2C/SMBus adapter drivers
823#
824# CONFIG_I2C_PARPORT_LIGHT is not set
825# CONFIG_I2C_TAOS_EVM is not set
826# CONFIG_I2C_TINY_USB is not set
827
828#
829# Graphics adapter I2C/DDC channel drivers
830#
831# CONFIG_I2C_VOODOO3 is not set
832
833#
834# Other I2C/SMBus bus drivers
835#
836# CONFIG_I2C_PCA_PLATFORM is not set
837# CONFIG_I2C_STUB is not set
838
839#
840# Miscellaneous I2C Chip support
841#
842# CONFIG_DS1682 is not set
843# CONFIG_AT24 is not set
844CONFIG_SENSORS_EEPROM=y
845# CONFIG_SENSORS_PCF8574 is not set
846# CONFIG_PCF8575 is not set
847# CONFIG_SENSORS_PCA9539 is not set
848# CONFIG_SENSORS_PCF8591 is not set
849# CONFIG_SENSORS_MAX6875 is not set
850# CONFIG_SENSORS_TSL2550 is not set
851# CONFIG_I2C_DEBUG_CORE is not set
852# CONFIG_I2C_DEBUG_ALGO is not set
853# CONFIG_I2C_DEBUG_BUS is not set
854# CONFIG_I2C_DEBUG_CHIP is not set
855# CONFIG_SPI is not set
856CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
857# CONFIG_GPIOLIB is not set
858# CONFIG_W1 is not set
859# CONFIG_POWER_SUPPLY is not set
860# CONFIG_HWMON is not set
861# CONFIG_THERMAL is not set
862# CONFIG_THERMAL_HWMON is not set
863# CONFIG_WATCHDOG is not set
864
865#
866# Sonics Silicon Backplane
867#
868CONFIG_SSB_POSSIBLE=y
869# CONFIG_SSB is not set
870
871#
872# Multifunction device drivers
873#
874# CONFIG_MFD_CORE is not set
875# CONFIG_MFD_SM501 is not set
876# CONFIG_HTC_PASIC3 is not set
877# CONFIG_MFD_TMIO is not set
878
879#
880# Multimedia devices
881#
882
883#
884# Multimedia core support
885#
886# CONFIG_VIDEO_DEV is not set
887CONFIG_DVB_CORE=m
888CONFIG_VIDEO_MEDIA=m
889
890#
891# Multimedia drivers
892#
893# CONFIG_MEDIA_ATTACH is not set
894CONFIG_MEDIA_TUNER=m
895# CONFIG_MEDIA_TUNER_CUSTOMIZE is not set
896CONFIG_MEDIA_TUNER_SIMPLE=m
897CONFIG_MEDIA_TUNER_TDA8290=m
898CONFIG_MEDIA_TUNER_TDA9887=m
899CONFIG_MEDIA_TUNER_TEA5761=m
900CONFIG_MEDIA_TUNER_TEA5767=m
901CONFIG_MEDIA_TUNER_MT20XX=m
902CONFIG_MEDIA_TUNER_XC2028=m
903CONFIG_MEDIA_TUNER_XC5000=m
904CONFIG_DVB_CAPTURE_DRIVERS=y
905
906#
907# Supported SAA7146 based PCI Adapters
908#
909# CONFIG_TTPCI_EEPROM is not set
910# CONFIG_DVB_BUDGET_CORE is not set
911
912#
913# Supported USB Adapters
914#
915# CONFIG_DVB_USB is not set
916# CONFIG_DVB_TTUSB_BUDGET is not set
917# CONFIG_DVB_TTUSB_DEC is not set
918# CONFIG_DVB_CINERGYT2 is not set
919# CONFIG_DVB_SIANO_SMS1XXX is not set
920
921#
922# Supported FlexCopII (B2C2) Adapters
923#
924# CONFIG_DVB_B2C2_FLEXCOP is not set
925
926#
927# Supported BT878 Adapters
928#
929
930#
931# Supported Pluto2 Adapters
932#
933# CONFIG_DVB_PLUTO2 is not set
934
935#
936# Supported DVB Frontends
937#
938
939#
940# Customise DVB Frontends
941#
942# CONFIG_DVB_FE_CUSTOMISE is not set
943
944#
945# DVB-S (satellite) frontends
946#
947# CONFIG_DVB_CX24110 is not set
948# CONFIG_DVB_CX24123 is not set
949# CONFIG_DVB_MT312 is not set
950# CONFIG_DVB_S5H1420 is not set
951# CONFIG_DVB_STV0299 is not set
952# CONFIG_DVB_TDA8083 is not set
953# CONFIG_DVB_TDA10086 is not set
954# CONFIG_DVB_VES1X93 is not set
955# CONFIG_DVB_TUNER_ITD1000 is not set
956# CONFIG_DVB_TDA826X is not set
957# CONFIG_DVB_TUA6100 is not set
958
959#
960# DVB-T (terrestrial) frontends
961#
962# CONFIG_DVB_SP8870 is not set
963# CONFIG_DVB_SP887X is not set
964# CONFIG_DVB_CX22700 is not set
965# CONFIG_DVB_CX22702 is not set
966# CONFIG_DVB_DRX397XD is not set
967# CONFIG_DVB_L64781 is not set
968# CONFIG_DVB_TDA1004X is not set
969# CONFIG_DVB_NXT6000 is not set
970# CONFIG_DVB_MT352 is not set
971# CONFIG_DVB_ZL10353 is not set
972# CONFIG_DVB_DIB3000MB is not set
973# CONFIG_DVB_DIB3000MC is not set
974# CONFIG_DVB_DIB7000M is not set
975# CONFIG_DVB_DIB7000P is not set
976# CONFIG_DVB_TDA10048 is not set
977
978#
979# DVB-C (cable) frontends
980#
981# CONFIG_DVB_VES1820 is not set
982# CONFIG_DVB_TDA10021 is not set
983# CONFIG_DVB_TDA10023 is not set
984# CONFIG_DVB_STV0297 is not set
985
986#
987# ATSC (North American/Korean Terrestrial/Cable DTV) frontends
988#
989# CONFIG_DVB_NXT200X is not set
990# CONFIG_DVB_OR51211 is not set
991# CONFIG_DVB_OR51132 is not set
992# CONFIG_DVB_BCM3510 is not set
993# CONFIG_DVB_LGDT330X is not set
994# CONFIG_DVB_S5H1409 is not set
995# CONFIG_DVB_AU8522 is not set
996# CONFIG_DVB_S5H1411 is not set
997
998#
999# Digital terrestrial only tuners/PLL
1000#
1001# CONFIG_DVB_PLL is not set
1002# CONFIG_DVB_TUNER_DIB0070 is not set
1003
1004#
1005# SEC control devices for DVB-S
1006#
1007# CONFIG_DVB_LNBP21 is not set
1008# CONFIG_DVB_ISL6405 is not set
1009# CONFIG_DVB_ISL6421 is not set
1010CONFIG_DAB=y
1011# CONFIG_USB_DABUSB is not set
1012
1013#
1014# Graphics support
1015#
1016# CONFIG_AGP is not set
1017# CONFIG_DRM is not set
1018# CONFIG_VGASTATE is not set
1019CONFIG_VIDEO_OUTPUT_CONTROL=y
1020# CONFIG_FB is not set
1021# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
1022
1023#
1024# Display device support
1025#
1026# CONFIG_DISPLAY_SUPPORT is not set
1027
1028#
1029# Console display driver support
1030#
1031CONFIG_VGA_CONSOLE=y
1032# CONFIG_VGACON_SOFT_SCROLLBACK is not set
1033CONFIG_DUMMY_CONSOLE=y
1034CONFIG_SOUND=y
1035CONFIG_SND=y
1036CONFIG_SND_TIMER=y
1037CONFIG_SND_PCM=y
1038# CONFIG_SND_SEQUENCER is not set
1039CONFIG_SND_OSSEMUL=y
1040CONFIG_SND_MIXER_OSS=y
1041CONFIG_SND_PCM_OSS=y
1042CONFIG_SND_PCM_OSS_PLUGINS=y
1043# CONFIG_SND_DYNAMIC_MINORS is not set
1044# CONFIG_SND_SUPPORT_OLD_API is not set
1045CONFIG_SND_VERBOSE_PROCFS=y
1046# CONFIG_SND_VERBOSE_PRINTK is not set
1047# CONFIG_SND_DEBUG is not set
1048CONFIG_SND_VMASTER=y
1049CONFIG_SND_AC97_CODEC=y
1050CONFIG_SND_DRIVERS=y
1051# CONFIG_SND_DUMMY is not set
1052# CONFIG_SND_MTPAV is not set
1053# CONFIG_SND_SERIAL_U16550 is not set
1054# CONFIG_SND_MPU401 is not set
1055# CONFIG_SND_AC97_POWER_SAVE is not set
1056CONFIG_SND_PCI=y
1057# CONFIG_SND_AD1889 is not set
1058# CONFIG_SND_ALS300 is not set
1059# CONFIG_SND_ALS4000 is not set
1060# CONFIG_SND_ALI5451 is not set
1061# CONFIG_SND_ATIIXP is not set
1062# CONFIG_SND_ATIIXP_MODEM is not set
1063# CONFIG_SND_AU8810 is not set
1064# CONFIG_SND_AU8820 is not set
1065# CONFIG_SND_AU8830 is not set
1066# CONFIG_SND_AW2 is not set
1067# CONFIG_SND_AZT3328 is not set
1068# CONFIG_SND_BT87X is not set
1069# CONFIG_SND_CA0106 is not set
1070# CONFIG_SND_CMIPCI is not set
1071# CONFIG_SND_OXYGEN is not set
1072# CONFIG_SND_CS4281 is not set
1073# CONFIG_SND_CS46XX is not set
1074# CONFIG_SND_CS5530 is not set
1075# CONFIG_SND_DARLA20 is not set
1076# CONFIG_SND_GINA20 is not set
1077# CONFIG_SND_LAYLA20 is not set
1078# CONFIG_SND_DARLA24 is not set
1079# CONFIG_SND_GINA24 is not set
1080# CONFIG_SND_LAYLA24 is not set
1081# CONFIG_SND_MONA is not set
1082# CONFIG_SND_MIA is not set
1083# CONFIG_SND_ECHO3G is not set
1084# CONFIG_SND_INDIGO is not set
1085# CONFIG_SND_INDIGOIO is not set
1086# CONFIG_SND_INDIGODJ is not set
1087# CONFIG_SND_EMU10K1 is not set
1088# CONFIG_SND_EMU10K1X is not set
1089# CONFIG_SND_ENS1370 is not set
1090# CONFIG_SND_ENS1371 is not set
1091# CONFIG_SND_ES1938 is not set
1092# CONFIG_SND_ES1968 is not set
1093# CONFIG_SND_FM801 is not set
1094# CONFIG_SND_HDA_INTEL is not set
1095# CONFIG_SND_HDSP is not set
1096# CONFIG_SND_HDSPM is not set
1097# CONFIG_SND_HIFIER is not set
1098# CONFIG_SND_ICE1712 is not set
1099# CONFIG_SND_ICE1724 is not set
1100CONFIG_SND_INTEL8X0=y
1101# CONFIG_SND_INTEL8X0M is not set
1102# CONFIG_SND_KORG1212 is not set
1103# CONFIG_SND_MAESTRO3 is not set
1104# CONFIG_SND_MIXART is not set
1105# CONFIG_SND_NM256 is not set
1106# CONFIG_SND_PCXHR is not set
1107# CONFIG_SND_RIPTIDE is not set
1108# CONFIG_SND_RME32 is not set
1109# CONFIG_SND_RME96 is not set
1110# CONFIG_SND_RME9652 is not set
1111# CONFIG_SND_SONICVIBES is not set
1112# CONFIG_SND_TRIDENT is not set
1113# CONFIG_SND_VIA82XX is not set
1114# CONFIG_SND_VIA82XX_MODEM is not set
1115# CONFIG_SND_VIRTUOSO is not set
1116# CONFIG_SND_VX222 is not set
1117# CONFIG_SND_YMFPCI is not set
1118CONFIG_SND_PPC=y
1119CONFIG_SND_USB=y
1120# CONFIG_SND_USB_AUDIO is not set
1121# CONFIG_SND_USB_USX2Y is not set
1122# CONFIG_SND_USB_CAIAQ is not set
1123# CONFIG_SND_SOC is not set
1124# CONFIG_SOUND_PRIME is not set
1125CONFIG_AC97_BUS=y
1126CONFIG_HID_SUPPORT=y
1127CONFIG_HID=y
1128# CONFIG_HID_DEBUG is not set
1129# CONFIG_HIDRAW is not set
1130
1131#
1132# USB Input Devices
1133#
1134CONFIG_USB_HID=y
1135# CONFIG_USB_HIDINPUT_POWERBOOK is not set
1136# CONFIG_HID_FF is not set
1137# CONFIG_USB_HIDDEV is not set
1138CONFIG_USB_SUPPORT=y
1139CONFIG_USB_ARCH_HAS_HCD=y
1140CONFIG_USB_ARCH_HAS_OHCI=y
1141CONFIG_USB_ARCH_HAS_EHCI=y
1142CONFIG_USB=y
1143# CONFIG_USB_DEBUG is not set
1144# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
1145
1146#
1147# Miscellaneous USB options
1148#
1149CONFIG_USB_DEVICEFS=y
1150CONFIG_USB_DEVICE_CLASS=y
1151# CONFIG_USB_DYNAMIC_MINORS is not set
1152# CONFIG_USB_OTG is not set
1153# CONFIG_USB_OTG_WHITELIST is not set
1154# CONFIG_USB_OTG_BLACKLIST_HUB is not set
1155CONFIG_USB_MON=y
1156
1157#
1158# USB Host Controller Drivers
1159#
1160# CONFIG_USB_C67X00_HCD is not set
1161CONFIG_USB_EHCI_HCD=y
1162# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
1163# CONFIG_USB_EHCI_TT_NEWSCHED is not set
1164# CONFIG_USB_EHCI_FSL is not set
1165CONFIG_USB_EHCI_HCD_PPC_OF=y
1166# CONFIG_USB_ISP116X_HCD is not set
1167# CONFIG_USB_ISP1760_HCD is not set
1168CONFIG_USB_OHCI_HCD=y
1169CONFIG_USB_OHCI_HCD_PPC_OF=y
1170CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
1171CONFIG_USB_OHCI_HCD_PPC_OF_LE=y
1172CONFIG_USB_OHCI_HCD_PCI=y
1173CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y
1174CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y
1175CONFIG_USB_OHCI_LITTLE_ENDIAN=y
1176# CONFIG_USB_UHCI_HCD is not set
1177# CONFIG_USB_SL811_HCD is not set
1178# CONFIG_USB_R8A66597_HCD is not set
1179
1180#
1181# USB Device Class drivers
1182#
1183# CONFIG_USB_ACM is not set
1184# CONFIG_USB_PRINTER is not set
1185# CONFIG_USB_WDM is not set
1186
1187#
1188# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
1189#
1190
1191#
1192# may also be needed; see USB_STORAGE Help for more information
1193#
1194CONFIG_USB_STORAGE=y
1195# CONFIG_USB_STORAGE_DEBUG is not set
1196# CONFIG_USB_STORAGE_DATAFAB is not set
1197# CONFIG_USB_STORAGE_FREECOM is not set
1198# CONFIG_USB_STORAGE_ISD200 is not set
1199# CONFIG_USB_STORAGE_DPCM is not set
1200# CONFIG_USB_STORAGE_USBAT is not set
1201# CONFIG_USB_STORAGE_SDDR09 is not set
1202# CONFIG_USB_STORAGE_SDDR55 is not set
1203# CONFIG_USB_STORAGE_JUMPSHOT is not set
1204# CONFIG_USB_STORAGE_ALAUDA is not set
1205# CONFIG_USB_STORAGE_ONETOUCH is not set
1206# CONFIG_USB_STORAGE_KARMA is not set
1207# CONFIG_USB_STORAGE_SIERRA is not set
1208# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
1209# CONFIG_USB_LIBUSUAL is not set
1210
1211#
1212# USB Imaging devices
1213#
1214# CONFIG_USB_MDC800 is not set
1215# CONFIG_USB_MICROTEK is not set
1216
1217#
1218# USB port drivers
1219#
1220# CONFIG_USB_SERIAL is not set
1221
1222#
1223# USB Miscellaneous drivers
1224#
1225# CONFIG_USB_EMI62 is not set
1226# CONFIG_USB_EMI26 is not set
1227# CONFIG_USB_ADUTUX is not set
1228# CONFIG_USB_RIO500 is not set
1229# CONFIG_USB_LEGOTOWER is not set
1230# CONFIG_USB_LCD is not set
1231# CONFIG_USB_BERRY_CHARGE is not set
1232# CONFIG_USB_LED is not set
1233# CONFIG_USB_CYPRESS_CY7C63 is not set
1234# CONFIG_USB_CYTHERM is not set
1235# CONFIG_USB_PHIDGET is not set
1236# CONFIG_USB_IDMOUSE is not set
1237# CONFIG_USB_FTDI_ELAN is not set
1238# CONFIG_USB_APPLEDISPLAY is not set
1239# CONFIG_USB_SISUSBVGA is not set
1240# CONFIG_USB_LD is not set
1241# CONFIG_USB_TRANCEVIBRATOR is not set
1242# CONFIG_USB_IOWARRIOR is not set
1243# CONFIG_USB_TEST is not set
1244# CONFIG_USB_ISIGHTFW is not set
1245# CONFIG_USB_GADGET is not set
1246# CONFIG_MMC is not set
1247# CONFIG_MEMSTICK is not set
1248# CONFIG_NEW_LEDS is not set
1249# CONFIG_ACCESSIBILITY is not set
1250# CONFIG_INFINIBAND is not set
1251# CONFIG_EDAC is not set
1252CONFIG_RTC_LIB=y
1253CONFIG_RTC_CLASS=y
1254CONFIG_RTC_HCTOSYS=y
1255CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1256# CONFIG_RTC_DEBUG is not set
1257
1258#
1259# RTC interfaces
1260#
1261CONFIG_RTC_INTF_SYSFS=y
1262CONFIG_RTC_INTF_PROC=y
1263CONFIG_RTC_INTF_DEV=y
1264# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1265# CONFIG_RTC_DRV_TEST is not set
1266
1267#
1268# I2C RTC drivers
1269#
1270# CONFIG_RTC_DRV_DS1307 is not set
1271# CONFIG_RTC_DRV_DS1374 is not set
1272# CONFIG_RTC_DRV_DS1672 is not set
1273# CONFIG_RTC_DRV_MAX6900 is not set
1274# CONFIG_RTC_DRV_RS5C372 is not set
1275# CONFIG_RTC_DRV_ISL1208 is not set
1276# CONFIG_RTC_DRV_X1205 is not set
1277# CONFIG_RTC_DRV_PCF8563 is not set
1278# CONFIG_RTC_DRV_PCF8583 is not set
1279# CONFIG_RTC_DRV_M41T80 is not set
1280# CONFIG_RTC_DRV_S35390A is not set
1281# CONFIG_RTC_DRV_FM3130 is not set
1282
1283#
1284# SPI RTC drivers
1285#
1286
1287#
1288# Platform RTC drivers
1289#
1290CONFIG_RTC_DRV_CMOS=y
1291# CONFIG_RTC_DRV_DS1511 is not set
1292# CONFIG_RTC_DRV_DS1553 is not set
1293# CONFIG_RTC_DRV_DS1742 is not set
1294# CONFIG_RTC_DRV_STK17TA8 is not set
1295# CONFIG_RTC_DRV_M48T86 is not set
1296# CONFIG_RTC_DRV_M48T59 is not set
1297# CONFIG_RTC_DRV_V3020 is not set
1298
1299#
1300# on-CPU RTC drivers
1301#
1302# CONFIG_RTC_DRV_PPC is not set
1303# CONFIG_DMADEVICES is not set
1304# CONFIG_UIO is not set
1305
1306#
1307# File systems
1308#
1309CONFIG_EXT2_FS=y
1310# CONFIG_EXT2_FS_XATTR is not set
1311# CONFIG_EXT2_FS_XIP is not set
1312CONFIG_EXT3_FS=y
1313CONFIG_EXT3_FS_XATTR=y
1314# CONFIG_EXT3_FS_POSIX_ACL is not set
1315# CONFIG_EXT3_FS_SECURITY is not set
1316# CONFIG_EXT4DEV_FS is not set
1317CONFIG_JBD=y
1318CONFIG_FS_MBCACHE=y
1319# CONFIG_REISERFS_FS is not set
1320# CONFIG_JFS_FS is not set
1321# CONFIG_FS_POSIX_ACL is not set
1322# CONFIG_XFS_FS is not set
1323# CONFIG_OCFS2_FS is not set
1324CONFIG_DNOTIFY=y
1325CONFIG_INOTIFY=y
1326CONFIG_INOTIFY_USER=y
1327# CONFIG_QUOTA is not set
1328# CONFIG_AUTOFS_FS is not set
1329# CONFIG_AUTOFS4_FS is not set
1330# CONFIG_FUSE_FS is not set
1331
1332#
1333# CD-ROM/DVD Filesystems
1334#
1335CONFIG_ISO9660_FS=m
1336CONFIG_JOLIET=y
1337CONFIG_ZISOFS=y
1338CONFIG_UDF_FS=m
1339CONFIG_UDF_NLS=y
1340
1341#
1342# DOS/FAT/NT Filesystems
1343#
1344CONFIG_FAT_FS=y
1345CONFIG_MSDOS_FS=m
1346CONFIG_VFAT_FS=y
1347CONFIG_FAT_DEFAULT_CODEPAGE=437
1348CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1349CONFIG_NTFS_FS=y
1350# CONFIG_NTFS_DEBUG is not set
1351# CONFIG_NTFS_RW is not set
1352
1353#
1354# Pseudo filesystems
1355#
1356CONFIG_PROC_FS=y
1357CONFIG_PROC_KCORE=y
1358CONFIG_PROC_SYSCTL=y
1359CONFIG_SYSFS=y
1360CONFIG_TMPFS=y
1361# CONFIG_TMPFS_POSIX_ACL is not set
1362# CONFIG_HUGETLB_PAGE is not set
1363# CONFIG_CONFIGFS_FS is not set
1364
1365#
1366# Miscellaneous filesystems
1367#
1368CONFIG_ADFS_FS=m
1369# CONFIG_ADFS_FS_RW is not set
1370CONFIG_AFFS_FS=m
1371CONFIG_HFS_FS=m
1372CONFIG_HFSPLUS_FS=m
1373CONFIG_BEFS_FS=m
1374# CONFIG_BEFS_DEBUG is not set
1375CONFIG_BFS_FS=m
1376CONFIG_EFS_FS=m
1377CONFIG_CRAMFS=y
1378CONFIG_VXFS_FS=m
1379# CONFIG_MINIX_FS is not set
1380# CONFIG_OMFS_FS is not set
1381CONFIG_HPFS_FS=m
1382CONFIG_QNX4FS_FS=m
1383# CONFIG_ROMFS_FS is not set
1384CONFIG_SYSV_FS=m
1385CONFIG_UFS_FS=m
1386# CONFIG_UFS_FS_WRITE is not set
1387# CONFIG_UFS_DEBUG is not set
1388CONFIG_NETWORK_FILESYSTEMS=y
1389CONFIG_NFS_FS=y
1390CONFIG_NFS_V3=y
1391# CONFIG_NFS_V3_ACL is not set
1392CONFIG_NFS_V4=y
1393CONFIG_ROOT_NFS=y
1394CONFIG_NFSD=y
1395# CONFIG_NFSD_V3 is not set
1396# CONFIG_NFSD_V4 is not set
1397CONFIG_LOCKD=y
1398CONFIG_LOCKD_V4=y
1399CONFIG_EXPORTFS=y
1400CONFIG_NFS_COMMON=y
1401CONFIG_SUNRPC=y
1402CONFIG_SUNRPC_GSS=y
1403CONFIG_RPCSEC_GSS_KRB5=y
1404# CONFIG_RPCSEC_GSS_SPKM3 is not set
1405# CONFIG_SMB_FS is not set
1406# CONFIG_CIFS is not set
1407# CONFIG_NCP_FS is not set
1408# CONFIG_CODA_FS is not set
1409# CONFIG_AFS_FS is not set
1410
1411#
1412# Partition Types
1413#
1414CONFIG_PARTITION_ADVANCED=y
1415# CONFIG_ACORN_PARTITION is not set
1416# CONFIG_OSF_PARTITION is not set
1417# CONFIG_AMIGA_PARTITION is not set
1418# CONFIG_ATARI_PARTITION is not set
1419CONFIG_MAC_PARTITION=y
1420CONFIG_MSDOS_PARTITION=y
1421# CONFIG_BSD_DISKLABEL is not set
1422# CONFIG_MINIX_SUBPARTITION is not set
1423# CONFIG_SOLARIS_X86_PARTITION is not set
1424# CONFIG_UNIXWARE_DISKLABEL is not set
1425# CONFIG_LDM_PARTITION is not set
1426# CONFIG_SGI_PARTITION is not set
1427# CONFIG_ULTRIX_PARTITION is not set
1428# CONFIG_SUN_PARTITION is not set
1429# CONFIG_KARMA_PARTITION is not set
1430# CONFIG_EFI_PARTITION is not set
1431# CONFIG_SYSV68_PARTITION is not set
1432CONFIG_NLS=y
1433CONFIG_NLS_DEFAULT="iso8859-1"
1434# CONFIG_NLS_CODEPAGE_437 is not set
1435# CONFIG_NLS_CODEPAGE_737 is not set
1436# CONFIG_NLS_CODEPAGE_775 is not set
1437# CONFIG_NLS_CODEPAGE_850 is not set
1438# CONFIG_NLS_CODEPAGE_852 is not set
1439# CONFIG_NLS_CODEPAGE_855 is not set
1440# CONFIG_NLS_CODEPAGE_857 is not set
1441# CONFIG_NLS_CODEPAGE_860 is not set
1442# CONFIG_NLS_CODEPAGE_861 is not set
1443# CONFIG_NLS_CODEPAGE_862 is not set
1444# CONFIG_NLS_CODEPAGE_863 is not set
1445# CONFIG_NLS_CODEPAGE_864 is not set
1446# CONFIG_NLS_CODEPAGE_865 is not set
1447# CONFIG_NLS_CODEPAGE_866 is not set
1448# CONFIG_NLS_CODEPAGE_869 is not set
1449# CONFIG_NLS_CODEPAGE_936 is not set
1450# CONFIG_NLS_CODEPAGE_950 is not set
1451# CONFIG_NLS_CODEPAGE_932 is not set
1452# CONFIG_NLS_CODEPAGE_949 is not set
1453# CONFIG_NLS_CODEPAGE_874 is not set
1454# CONFIG_NLS_ISO8859_8 is not set
1455# CONFIG_NLS_CODEPAGE_1250 is not set
1456# CONFIG_NLS_CODEPAGE_1251 is not set
1457# CONFIG_NLS_ASCII is not set
1458# CONFIG_NLS_ISO8859_1 is not set
1459# CONFIG_NLS_ISO8859_2 is not set
1460# CONFIG_NLS_ISO8859_3 is not set
1461# CONFIG_NLS_ISO8859_4 is not set
1462# CONFIG_NLS_ISO8859_5 is not set
1463# CONFIG_NLS_ISO8859_6 is not set
1464# CONFIG_NLS_ISO8859_7 is not set
1465# CONFIG_NLS_ISO8859_9 is not set
1466# CONFIG_NLS_ISO8859_13 is not set
1467# CONFIG_NLS_ISO8859_14 is not set
1468# CONFIG_NLS_ISO8859_15 is not set
1469# CONFIG_NLS_KOI8_R is not set
1470# CONFIG_NLS_KOI8_U is not set
1471CONFIG_NLS_UTF8=m
1472# CONFIG_DLM is not set
1473
1474#
1475# Library routines
1476#
1477CONFIG_BITREVERSE=y
1478# CONFIG_GENERIC_FIND_FIRST_BIT is not set
1479# CONFIG_CRC_CCITT is not set
1480# CONFIG_CRC16 is not set
1481CONFIG_CRC_T10DIF=y
1482CONFIG_CRC_ITU_T=m
1483CONFIG_CRC32=y
1484# CONFIG_CRC7 is not set
1485CONFIG_LIBCRC32C=m
1486CONFIG_ZLIB_INFLATE=y
1487CONFIG_PLIST=y
1488CONFIG_HAS_IOMEM=y
1489CONFIG_HAS_IOPORT=y
1490CONFIG_HAS_DMA=y
1491CONFIG_HAVE_LMB=y
1492
1493#
1494# Kernel hacking
1495#
1496# CONFIG_PRINTK_TIME is not set
1497CONFIG_ENABLE_WARN_DEPRECATED=y
1498CONFIG_ENABLE_MUST_CHECK=y
1499CONFIG_FRAME_WARN=1024
1500# CONFIG_MAGIC_SYSRQ is not set
1501# CONFIG_UNUSED_SYMBOLS is not set
1502# CONFIG_DEBUG_FS is not set
1503# CONFIG_HEADERS_CHECK is not set
1504CONFIG_DEBUG_KERNEL=y
1505# CONFIG_DEBUG_SHIRQ is not set
1506CONFIG_DETECT_SOFTLOCKUP=y
1507# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
1508CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
1509CONFIG_SCHED_DEBUG=y
1510# CONFIG_SCHEDSTATS is not set
1511# CONFIG_TIMER_STATS is not set
1512# CONFIG_DEBUG_OBJECTS is not set
1513# CONFIG_SLUB_DEBUG_ON is not set
1514# CONFIG_SLUB_STATS is not set
1515# CONFIG_DEBUG_RT_MUTEXES is not set
1516# CONFIG_RT_MUTEX_TESTER is not set
1517# CONFIG_DEBUG_SPINLOCK is not set
1518# CONFIG_DEBUG_MUTEXES is not set
1519# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1520# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1521# CONFIG_DEBUG_KOBJECT is not set
1522# CONFIG_DEBUG_HIGHMEM is not set
1523# CONFIG_DEBUG_BUGVERBOSE is not set
1524CONFIG_DEBUG_INFO=y
1525# CONFIG_DEBUG_VM is not set
1526# CONFIG_DEBUG_WRITECOUNT is not set
1527# CONFIG_DEBUG_MEMORY_INIT is not set
1528# CONFIG_DEBUG_LIST is not set
1529# CONFIG_DEBUG_SG is not set
1530# CONFIG_BOOT_PRINTK_DELAY is not set
1531# CONFIG_RCU_TORTURE_TEST is not set
1532# CONFIG_BACKTRACE_SELF_TEST is not set
1533# CONFIG_FAULT_INJECTION is not set
1534# CONFIG_LATENCYTOP is not set
1535CONFIG_SYSCTL_SYSCALL_CHECK=y
1536CONFIG_HAVE_FTRACE=y
1537CONFIG_HAVE_DYNAMIC_FTRACE=y
1538# CONFIG_FTRACE is not set
1539# CONFIG_SCHED_TRACER is not set
1540# CONFIG_CONTEXT_SWITCH_TRACER is not set
1541# CONFIG_SAMPLES is not set
1542CONFIG_HAVE_ARCH_KGDB=y
1543# CONFIG_KGDB is not set
1544# CONFIG_DEBUG_STACKOVERFLOW is not set
1545# CONFIG_DEBUG_STACK_USAGE is not set
1546# CONFIG_DEBUG_PAGEALLOC is not set
1547# CONFIG_CODE_PATCHING_SELFTEST is not set
1548# CONFIG_FTR_FIXUP_SELFTEST is not set
1549# CONFIG_MSI_BITMAP_SELFTEST is not set
1550# CONFIG_XMON is not set
1551# CONFIG_IRQSTACKS is not set
1552# CONFIG_BDI_SWITCH is not set
1553# CONFIG_BOOTX_TEXT is not set
1554# CONFIG_PPC_EARLY_DEBUG is not set
1555
1556#
1557# Security options
1558#
1559# CONFIG_KEYS is not set
1560# CONFIG_SECURITY is not set
1561# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1562CONFIG_CRYPTO=y
1563
1564#
1565# Crypto core or helper
1566#
1567CONFIG_CRYPTO_ALGAPI=y
1568CONFIG_CRYPTO_BLKCIPHER=y
1569CONFIG_CRYPTO_HASH=y
1570CONFIG_CRYPTO_MANAGER=y
1571# CONFIG_CRYPTO_GF128MUL is not set
1572# CONFIG_CRYPTO_NULL is not set
1573# CONFIG_CRYPTO_CRYPTD is not set
1574# CONFIG_CRYPTO_AUTHENC is not set
1575# CONFIG_CRYPTO_TEST is not set
1576
1577#
1578# Authenticated Encryption with Associated Data
1579#
1580# CONFIG_CRYPTO_CCM is not set
1581# CONFIG_CRYPTO_GCM is not set
1582# CONFIG_CRYPTO_SEQIV is not set
1583
1584#
1585# Block modes
1586#
1587CONFIG_CRYPTO_CBC=y
1588# CONFIG_CRYPTO_CTR is not set
1589# CONFIG_CRYPTO_CTS is not set
1590# CONFIG_CRYPTO_ECB is not set
1591# CONFIG_CRYPTO_LRW is not set
1592CONFIG_CRYPTO_PCBC=m
1593# CONFIG_CRYPTO_XTS is not set
1594
1595#
1596# Hash modes
1597#
1598CONFIG_CRYPTO_HMAC=y
1599# CONFIG_CRYPTO_XCBC is not set
1600
1601#
1602# Digest
1603#
1604# CONFIG_CRYPTO_CRC32C is not set
1605# CONFIG_CRYPTO_MD4 is not set
1606CONFIG_CRYPTO_MD5=y
1607# CONFIG_CRYPTO_MICHAEL_MIC is not set
1608# CONFIG_CRYPTO_RMD128 is not set
1609# CONFIG_CRYPTO_RMD160 is not set
1610# CONFIG_CRYPTO_RMD256 is not set
1611# CONFIG_CRYPTO_RMD320 is not set
1612CONFIG_CRYPTO_SHA1=m
1613# CONFIG_CRYPTO_SHA256 is not set
1614# CONFIG_CRYPTO_SHA512 is not set
1615# CONFIG_CRYPTO_TGR192 is not set
1616# CONFIG_CRYPTO_WP512 is not set
1617
1618#
1619# Ciphers
1620#
1621# CONFIG_CRYPTO_AES is not set
1622# CONFIG_CRYPTO_ANUBIS is not set
1623# CONFIG_CRYPTO_ARC4 is not set
1624# CONFIG_CRYPTO_BLOWFISH is not set
1625# CONFIG_CRYPTO_CAMELLIA is not set
1626# CONFIG_CRYPTO_CAST5 is not set
1627# CONFIG_CRYPTO_CAST6 is not set
1628CONFIG_CRYPTO_DES=y
1629# CONFIG_CRYPTO_FCRYPT is not set
1630# CONFIG_CRYPTO_KHAZAD is not set
1631# CONFIG_CRYPTO_SALSA20 is not set
1632# CONFIG_CRYPTO_SEED is not set
1633# CONFIG_CRYPTO_SERPENT is not set
1634# CONFIG_CRYPTO_TEA is not set
1635# CONFIG_CRYPTO_TWOFISH is not set
1636
1637#
1638# Compression
1639#
1640# CONFIG_CRYPTO_DEFLATE is not set
1641# CONFIG_CRYPTO_LZO is not set
1642CONFIG_CRYPTO_HW=y
1643# CONFIG_CRYPTO_DEV_HIFN_795X is not set
1644# CONFIG_CRYPTO_DEV_TALITOS is not set
1645# CONFIG_PPC_CLOCK is not set
1646# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/configs/pq2fads_defconfig b/arch/powerpc/configs/pq2fads_defconfig
index b390b7476649..7e17862c38b8 100644
--- a/arch/powerpc/configs/pq2fads_defconfig
+++ b/arch/powerpc/configs/pq2fads_defconfig
@@ -152,11 +152,11 @@ CONFIG_CLASSIC_RCU=y
152# 152#
153CONFIG_PPC_MULTIPLATFORM=y 153CONFIG_PPC_MULTIPLATFORM=y
154CONFIG_CLASSIC32=y 154CONFIG_CLASSIC32=y
155CONFIG_PPC_CHRP=y 155# CONFIG_PPC_CHRP is not set
156# CONFIG_PPC_PMAC is not set
156# CONFIG_MPC5121_ADS is not set 157# CONFIG_MPC5121_ADS is not set
157# CONFIG_MPC5121_GENERIC is not set 158# CONFIG_MPC5121_GENERIC is not set
158# CONFIG_PPC_MPC52xx is not set 159# CONFIG_PPC_MPC52xx is not set
159CONFIG_PPC_PMAC=y
160# CONFIG_PPC_CELL is not set 160# CONFIG_PPC_CELL is not set
161# CONFIG_PPC_CELL_NATIVE is not set 161# CONFIG_PPC_CELL_NATIVE is not set
162CONFIG_PPC_82xx=y 162CONFIG_PPC_82xx=y
diff --git a/arch/powerpc/include/asm/a.out.h b/arch/powerpc/include/asm/a.out.h
deleted file mode 100644
index 89cead6b176e..000000000000
--- a/arch/powerpc/include/asm/a.out.h
+++ /dev/null
@@ -1,20 +0,0 @@
1#ifndef _ASM_POWERPC_A_OUT_H
2#define _ASM_POWERPC_A_OUT_H
3
4struct exec
5{
6 unsigned long a_info; /* Use macros N_MAGIC, etc for access */
7 unsigned a_text; /* length of text, in bytes */
8 unsigned a_data; /* length of data, in bytes */
9 unsigned a_bss; /* length of uninitialized data area for file, in bytes */
10 unsigned a_syms; /* length of symbol table data in file, in bytes */
11 unsigned a_entry; /* start address */
12 unsigned a_trsize; /* length of relocation info for text, in bytes */
13 unsigned a_drsize; /* length of relocation info for data, in bytes */
14};
15
16#define N_TRSIZE(a) ((a).a_trsize)
17#define N_DRSIZE(a) ((a).a_drsize)
18#define N_SYMSIZE(a) ((a).a_syms)
19
20#endif /* _ASM_POWERPC_A_OUT_H */
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
index ef8a248dfd55..1e94b07a020e 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -62,6 +62,7 @@ enum powerpc_pmc_type {
62 PPC_PMC_DEFAULT = 0, 62 PPC_PMC_DEFAULT = 0,
63 PPC_PMC_IBM = 1, 63 PPC_PMC_IBM = 1,
64 PPC_PMC_PA6T = 2, 64 PPC_PMC_PA6T = 2,
65 PPC_PMC_G4 = 3,
65}; 66};
66 67
67struct pt_regs; 68struct pt_regs;
@@ -192,6 +193,7 @@ extern const char *powerpc_base_platform;
192#define CPU_FTR_NO_SLBIE_B LONG_ASM_CONST(0x0008000000000000) 193#define CPU_FTR_NO_SLBIE_B LONG_ASM_CONST(0x0008000000000000)
193#define CPU_FTR_VSX LONG_ASM_CONST(0x0010000000000000) 194#define CPU_FTR_VSX LONG_ASM_CONST(0x0010000000000000)
194#define CPU_FTR_SAO LONG_ASM_CONST(0x0020000000000000) 195#define CPU_FTR_SAO LONG_ASM_CONST(0x0020000000000000)
196#define CPU_FTR_CP_USE_DCBTZ LONG_ASM_CONST(0x0040000000000000)
195 197
196#ifndef __ASSEMBLY__ 198#ifndef __ASSEMBLY__
197 199
@@ -387,10 +389,11 @@ extern const char *powerpc_base_platform;
387 CPU_FTR_MMCRA | CPU_FTR_CTRL) 389 CPU_FTR_MMCRA | CPU_FTR_CTRL)
388#define CPU_FTRS_POWER4 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ 390#define CPU_FTRS_POWER4 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
389 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ 391 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
390 CPU_FTR_MMCRA) 392 CPU_FTR_MMCRA | CPU_FTR_CP_USE_DCBTZ)
391#define CPU_FTRS_PPC970 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ 393#define CPU_FTRS_PPC970 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
392 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ 394 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
393 CPU_FTR_ALTIVEC_COMP | CPU_FTR_CAN_NAP | CPU_FTR_MMCRA) 395 CPU_FTR_ALTIVEC_COMP | CPU_FTR_CAN_NAP | CPU_FTR_MMCRA | \
396 CPU_FTR_CP_USE_DCBTZ)
394#define CPU_FTRS_POWER5 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ 397#define CPU_FTRS_POWER5 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
395 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ 398 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
396 CPU_FTR_MMCRA | CPU_FTR_SMT | \ 399 CPU_FTR_MMCRA | CPU_FTR_SMT | \
@@ -411,7 +414,8 @@ extern const char *powerpc_base_platform;
411#define CPU_FTRS_CELL (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ 414#define CPU_FTRS_CELL (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
412 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ 415 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
413 CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \ 416 CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
414 CPU_FTR_PAUSE_ZERO | CPU_FTR_CI_LARGE_PAGE | CPU_FTR_CELL_TB_BUG) 417 CPU_FTR_PAUSE_ZERO | CPU_FTR_CI_LARGE_PAGE | \
418 CPU_FTR_CELL_TB_BUG | CPU_FTR_CP_USE_DCBTZ)
415#define CPU_FTRS_PA6T (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ 419#define CPU_FTRS_PA6T (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
416 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \ 420 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \
417 CPU_FTR_ALTIVEC_COMP | CPU_FTR_CI_LARGE_PAGE | \ 421 CPU_FTR_ALTIVEC_COMP | CPU_FTR_CI_LARGE_PAGE | \
diff --git a/arch/powerpc/include/asm/dcr-regs.h b/arch/powerpc/include/asm/dcr-regs.h
index f15296cf3598..828e3aa1f2fc 100644
--- a/arch/powerpc/include/asm/dcr-regs.h
+++ b/arch/powerpc/include/asm/dcr-regs.h
@@ -68,6 +68,13 @@
68#define SDR0_UART3 0x0123 68#define SDR0_UART3 0x0123
69#define SDR0_CUST0 0x4000 69#define SDR0_CUST0 0x4000
70 70
71/* SDR for 405EZ */
72#define DCRN_SDR_ICINTSTAT 0x4510
73#define ICINTSTAT_ICRX 0x80000000
74#define ICINTSTAT_ICTX0 0x40000000
75#define ICINTSTAT_ICTX1 0x20000000
76#define ICINTSTAT_ICTX 0x60000000
77
71/* SDRs (460EX/460GT) */ 78/* SDRs (460EX/460GT) */
72#define SDR0_ETH_CFG 0x4103 79#define SDR0_ETH_CFG 0x4103
73#define SDR0_ETH_CFG_ECS 0x00000100 /* EMAC int clk source */ 80#define SDR0_ETH_CFG_ECS 0x00000100 /* EMAC int clk source */
diff --git a/arch/powerpc/include/asm/device.h b/arch/powerpc/include/asm/device.h
index 228ab2a315b9..dfd504caccc1 100644
--- a/arch/powerpc/include/asm/device.h
+++ b/arch/powerpc/include/asm/device.h
@@ -16,9 +16,6 @@ struct dev_archdata {
16 /* DMA operations on that device */ 16 /* DMA operations on that device */
17 struct dma_mapping_ops *dma_ops; 17 struct dma_mapping_ops *dma_ops;
18 void *dma_data; 18 void *dma_data;
19
20 /* NUMA node if applicable */
21 int numa_node;
22}; 19};
23 20
24#endif /* _ASM_POWERPC_DEVICE_H */ 21#endif /* _ASM_POWERPC_DEVICE_H */
diff --git a/arch/powerpc/include/asm/dma-mapping.h b/arch/powerpc/include/asm/dma-mapping.h
index c7ca45f97dd2..fddb229bd74f 100644
--- a/arch/powerpc/include/asm/dma-mapping.h
+++ b/arch/powerpc/include/asm/dma-mapping.h
@@ -44,8 +44,6 @@ extern void __dma_sync_page(struct page *page, unsigned long offset,
44 44
45#endif /* ! CONFIG_NOT_COHERENT_CACHE */ 45#endif /* ! CONFIG_NOT_COHERENT_CACHE */
46 46
47#ifdef CONFIG_PPC64
48
49static inline unsigned long device_to_mask(struct device *dev) 47static inline unsigned long device_to_mask(struct device *dev)
50{ 48{
51 if (dev->dma_mask && *dev->dma_mask) 49 if (dev->dma_mask && *dev->dma_mask)
@@ -76,8 +74,24 @@ struct dma_mapping_ops {
76 struct dma_attrs *attrs); 74 struct dma_attrs *attrs);
77 int (*dma_supported)(struct device *dev, u64 mask); 75 int (*dma_supported)(struct device *dev, u64 mask);
78 int (*set_dma_mask)(struct device *dev, u64 dma_mask); 76 int (*set_dma_mask)(struct device *dev, u64 dma_mask);
77 dma_addr_t (*map_page)(struct device *dev, struct page *page,
78 unsigned long offset, size_t size,
79 enum dma_data_direction direction,
80 struct dma_attrs *attrs);
81 void (*unmap_page)(struct device *dev,
82 dma_addr_t dma_address, size_t size,
83 enum dma_data_direction direction,
84 struct dma_attrs *attrs);
79}; 85};
80 86
87/*
88 * Available generic sets of operations
89 */
90#ifdef CONFIG_PPC64
91extern struct dma_mapping_ops dma_iommu_ops;
92#endif
93extern struct dma_mapping_ops dma_direct_ops;
94
81static inline struct dma_mapping_ops *get_dma_ops(struct device *dev) 95static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
82{ 96{
83 /* We don't handle the NULL dev case for ISA for now. We could 97 /* We don't handle the NULL dev case for ISA for now. We could
@@ -85,8 +99,19 @@ static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
85 * only ISA DMA device we support is the floppy and we have a hack 99 * only ISA DMA device we support is the floppy and we have a hack
86 * in the floppy driver directly to get a device for us. 100 * in the floppy driver directly to get a device for us.
87 */ 101 */
88 if (unlikely(dev == NULL || dev->archdata.dma_ops == NULL)) 102
103 if (unlikely(dev == NULL) || dev->archdata.dma_ops == NULL) {
104#ifdef CONFIG_PPC64
89 return NULL; 105 return NULL;
106#else
107 /* Use default on 32-bit if dma_ops is not set up */
108 /* TODO: Long term, we should fix drivers so that dev and
109 * archdata dma_ops are set up for all buses.
110 */
111 return &dma_direct_ops;
112#endif
113 }
114
90 return dev->archdata.dma_ops; 115 return dev->archdata.dma_ops;
91} 116}
92 117
@@ -123,6 +148,12 @@ static inline int dma_set_mask(struct device *dev, u64 dma_mask)
123 return 0; 148 return 0;
124} 149}
125 150
151/*
152 * TODO: map_/unmap_single will ideally go away, to be completely
153 * replaced by map/unmap_page. Until then, we allow dma_ops to have
154 * one or the other, or both by checking to see if the specific
155 * function requested exists; and if not, falling back on the other set.
156 */
126static inline dma_addr_t dma_map_single_attrs(struct device *dev, 157static inline dma_addr_t dma_map_single_attrs(struct device *dev,
127 void *cpu_addr, 158 void *cpu_addr,
128 size_t size, 159 size_t size,
@@ -132,7 +163,14 @@ static inline dma_addr_t dma_map_single_attrs(struct device *dev,
132 struct dma_mapping_ops *dma_ops = get_dma_ops(dev); 163 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
133 164
134 BUG_ON(!dma_ops); 165 BUG_ON(!dma_ops);
135 return dma_ops->map_single(dev, cpu_addr, size, direction, attrs); 166
167 if (dma_ops->map_single)
168 return dma_ops->map_single(dev, cpu_addr, size, direction,
169 attrs);
170
171 return dma_ops->map_page(dev, virt_to_page(cpu_addr),
172 (unsigned long)cpu_addr % PAGE_SIZE, size,
173 direction, attrs);
136} 174}
137 175
138static inline void dma_unmap_single_attrs(struct device *dev, 176static inline void dma_unmap_single_attrs(struct device *dev,
@@ -144,7 +182,13 @@ static inline void dma_unmap_single_attrs(struct device *dev,
144 struct dma_mapping_ops *dma_ops = get_dma_ops(dev); 182 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
145 183
146 BUG_ON(!dma_ops); 184 BUG_ON(!dma_ops);
147 dma_ops->unmap_single(dev, dma_addr, size, direction, attrs); 185
186 if (dma_ops->unmap_single) {
187 dma_ops->unmap_single(dev, dma_addr, size, direction, attrs);
188 return;
189 }
190
191 dma_ops->unmap_page(dev, dma_addr, size, direction, attrs);
148} 192}
149 193
150static inline dma_addr_t dma_map_page_attrs(struct device *dev, 194static inline dma_addr_t dma_map_page_attrs(struct device *dev,
@@ -156,8 +200,13 @@ static inline dma_addr_t dma_map_page_attrs(struct device *dev,
156 struct dma_mapping_ops *dma_ops = get_dma_ops(dev); 200 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
157 201
158 BUG_ON(!dma_ops); 202 BUG_ON(!dma_ops);
203
204 if (dma_ops->map_page)
205 return dma_ops->map_page(dev, page, offset, size, direction,
206 attrs);
207
159 return dma_ops->map_single(dev, page_address(page) + offset, size, 208 return dma_ops->map_single(dev, page_address(page) + offset, size,
160 direction, attrs); 209 direction, attrs);
161} 210}
162 211
163static inline void dma_unmap_page_attrs(struct device *dev, 212static inline void dma_unmap_page_attrs(struct device *dev,
@@ -169,6 +218,12 @@ static inline void dma_unmap_page_attrs(struct device *dev,
169 struct dma_mapping_ops *dma_ops = get_dma_ops(dev); 218 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
170 219
171 BUG_ON(!dma_ops); 220 BUG_ON(!dma_ops);
221
222 if (dma_ops->unmap_page) {
223 dma_ops->unmap_page(dev, dma_address, size, direction, attrs);
224 return;
225 }
226
172 dma_ops->unmap_single(dev, dma_address, size, direction, attrs); 227 dma_ops->unmap_single(dev, dma_address, size, direction, attrs);
173} 228}
174 229
@@ -253,126 +308,6 @@ static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
253 dma_unmap_sg_attrs(dev, sg, nhwentries, direction, NULL); 308 dma_unmap_sg_attrs(dev, sg, nhwentries, direction, NULL);
254} 309}
255 310
256/*
257 * Available generic sets of operations
258 */
259extern struct dma_mapping_ops dma_iommu_ops;
260extern struct dma_mapping_ops dma_direct_ops;
261
262#else /* CONFIG_PPC64 */
263
264#define dma_supported(dev, mask) (1)
265
266static inline int dma_set_mask(struct device *dev, u64 dma_mask)
267{
268 if (!dev->dma_mask || !dma_supported(dev, mask))
269 return -EIO;
270
271 *dev->dma_mask = dma_mask;
272
273 return 0;
274}
275
276static inline void *dma_alloc_coherent(struct device *dev, size_t size,
277 dma_addr_t * dma_handle,
278 gfp_t gfp)
279{
280#ifdef CONFIG_NOT_COHERENT_CACHE
281 return __dma_alloc_coherent(size, dma_handle, gfp);
282#else
283 void *ret;
284 /* ignore region specifiers */
285 gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
286
287 if (dev == NULL || dev->coherent_dma_mask < 0xffffffff)
288 gfp |= GFP_DMA;
289
290 ret = (void *)__get_free_pages(gfp, get_order(size));
291
292 if (ret != NULL) {
293 memset(ret, 0, size);
294 *dma_handle = virt_to_bus(ret);
295 }
296
297 return ret;
298#endif
299}
300
301static inline void
302dma_free_coherent(struct device *dev, size_t size, void *vaddr,
303 dma_addr_t dma_handle)
304{
305#ifdef CONFIG_NOT_COHERENT_CACHE
306 __dma_free_coherent(size, vaddr);
307#else
308 free_pages((unsigned long)vaddr, get_order(size));
309#endif
310}
311
312static inline dma_addr_t
313dma_map_single(struct device *dev, void *ptr, size_t size,
314 enum dma_data_direction direction)
315{
316 BUG_ON(direction == DMA_NONE);
317
318 __dma_sync(ptr, size, direction);
319
320 return virt_to_bus(ptr);
321}
322
323static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
324 size_t size,
325 enum dma_data_direction direction)
326{
327 /* We do nothing. */
328}
329
330static inline dma_addr_t
331dma_map_page(struct device *dev, struct page *page,
332 unsigned long offset, size_t size,
333 enum dma_data_direction direction)
334{
335 BUG_ON(direction == DMA_NONE);
336
337 __dma_sync_page(page, offset, size, direction);
338
339 return page_to_bus(page) + offset;
340}
341
342static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
343 size_t size,
344 enum dma_data_direction direction)
345{
346 /* We do nothing. */
347}
348
349static inline int
350dma_map_sg(struct device *dev, struct scatterlist *sgl, int nents,
351 enum dma_data_direction direction)
352{
353 struct scatterlist *sg;
354 int i;
355
356 BUG_ON(direction == DMA_NONE);
357
358 for_each_sg(sgl, sg, nents, i) {
359 BUG_ON(!sg_page(sg));
360 __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction);
361 sg->dma_address = page_to_bus(sg_page(sg)) + sg->offset;
362 }
363
364 return nents;
365}
366
367static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
368 int nhwentries,
369 enum dma_data_direction direction)
370{
371 /* We don't do anything here. */
372}
373
374#endif /* CONFIG_PPC64 */
375
376static inline void dma_sync_single_for_cpu(struct device *dev, 311static inline void dma_sync_single_for_cpu(struct device *dev,
377 dma_addr_t dma_handle, size_t size, 312 dma_addr_t dma_handle, size_t size,
378 enum dma_data_direction direction) 313 enum dma_data_direction direction)
diff --git a/arch/powerpc/include/asm/elf.h b/arch/powerpc/include/asm/elf.h
index 64c6ee22eefd..d812929390e4 100644
--- a/arch/powerpc/include/asm/elf.h
+++ b/arch/powerpc/include/asm/elf.h
@@ -232,7 +232,7 @@ typedef elf_vrregset_t elf_fpxregset_t;
232#endif /* __powerpc64__ */ 232#endif /* __powerpc64__ */
233 233
234#ifdef __powerpc64__ 234#ifdef __powerpc64__
235# define SET_PERSONALITY(ex, ibcs2) \ 235# define SET_PERSONALITY(ex) \
236do { \ 236do { \
237 unsigned long new_flags = 0; \ 237 unsigned long new_flags = 0; \
238 if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \ 238 if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \
@@ -256,7 +256,7 @@ do { \
256# define elf_read_implies_exec(ex, exec_stk) (test_thread_flag(TIF_32BIT) ? \ 256# define elf_read_implies_exec(ex, exec_stk) (test_thread_flag(TIF_32BIT) ? \
257 (exec_stk != EXSTACK_DISABLE_X) : 0) 257 (exec_stk != EXSTACK_DISABLE_X) : 0)
258#else 258#else
259# define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX) 259# define SET_PERSONALITY(ex) set_personality(PER_LINUX)
260#endif /* __powerpc64__ */ 260#endif /* __powerpc64__ */
261 261
262extern int dcache_bsize; 262extern int dcache_bsize;
diff --git a/arch/powerpc/include/asm/exception.h b/arch/powerpc/include/asm/exception.h
index 329148b5acc6..d3d4534e3c74 100644
--- a/arch/powerpc/include/asm/exception.h
+++ b/arch/powerpc/include/asm/exception.h
@@ -53,14 +53,8 @@
53 * low halfword of the address, but for Kdump we need the whole low 53 * low halfword of the address, but for Kdump we need the whole low
54 * word. 54 * word.
55 */ 55 */
56#ifdef CONFIG_CRASH_DUMP
57#define LOAD_HANDLER(reg, label) \ 56#define LOAD_HANDLER(reg, label) \
58 oris reg,reg,(label)@h; /* virt addr of handler ... */ \ 57 addi reg,reg,(label)-_stext; /* virt addr of handler ... */
59 ori reg,reg,(label)@l; /* .. and the rest */
60#else
61#define LOAD_HANDLER(reg, label) \
62 ori reg,reg,(label)@l; /* virt addr of handler ... */
63#endif
64 58
65#define EXCEPTION_PROLOG_1(area) \ 59#define EXCEPTION_PROLOG_1(area) \
66 mfspr r13,SPRN_SPRG3; /* get paca address into r13 */ \ 60 mfspr r13,SPRN_SPRG3; /* get paca address into r13 */ \
@@ -72,37 +66,12 @@
72 std r9,area+EX_R13(r13); \ 66 std r9,area+EX_R13(r13); \
73 mfcr r9 67 mfcr r9
74 68
75/*
76 * Equal to EXCEPTION_PROLOG_PSERIES, except that it forces 64bit mode.
77 * The firmware calls the registered system_reset_fwnmi and
78 * machine_check_fwnmi handlers in 32bit mode if the cpu happens to run
79 * a 32bit application at the time of the event.
80 * This firmware bug is present on POWER4 and JS20.
81 */
82#define EXCEPTION_PROLOG_PSERIES_FORCE_64BIT(area, label) \
83 EXCEPTION_PROLOG_1(area); \
84 clrrdi r12,r13,32; /* get high part of &label */ \
85 mfmsr r10; \
86 /* force 64bit mode */ \
87 li r11,5; /* MSR_SF_LG|MSR_ISF_LG */ \
88 rldimi r10,r11,61,0; /* insert into top 3 bits */ \
89 /* done 64bit mode */ \
90 mfspr r11,SPRN_SRR0; /* save SRR0 */ \
91 LOAD_HANDLER(r12,label) \
92 ori r10,r10,MSR_IR|MSR_DR|MSR_RI; \
93 mtspr SPRN_SRR0,r12; \
94 mfspr r12,SPRN_SRR1; /* and SRR1 */ \
95 mtspr SPRN_SRR1,r10; \
96 rfid; \
97 b . /* prevent speculative execution */
98
99#define EXCEPTION_PROLOG_PSERIES(area, label) \ 69#define EXCEPTION_PROLOG_PSERIES(area, label) \
100 EXCEPTION_PROLOG_1(area); \ 70 EXCEPTION_PROLOG_1(area); \
101 clrrdi r12,r13,32; /* get high part of &label */ \ 71 ld r12,PACAKBASE(r13); /* get high part of &label */ \
102 mfmsr r10; \ 72 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
103 mfspr r11,SPRN_SRR0; /* save SRR0 */ \ 73 mfspr r11,SPRN_SRR0; /* save SRR0 */ \
104 LOAD_HANDLER(r12,label) \ 74 LOAD_HANDLER(r12,label) \
105 ori r10,r10,MSR_IR|MSR_DR|MSR_RI; \
106 mtspr SPRN_SRR0,r12; \ 75 mtspr SPRN_SRR0,r12; \
107 mfspr r12,SPRN_SRR1; /* and SRR1 */ \ 76 mfspr r12,SPRN_SRR1; /* and SRR1 */ \
108 mtspr SPRN_SRR1,r10; \ 77 mtspr SPRN_SRR1,r10; \
@@ -210,11 +179,10 @@ label##_pSeries: \
210 std r10,PACA_EXGEN+EX_R13(r13); \ 179 std r10,PACA_EXGEN+EX_R13(r13); \
211 std r11,PACA_EXGEN+EX_R11(r13); \ 180 std r11,PACA_EXGEN+EX_R11(r13); \
212 std r12,PACA_EXGEN+EX_R12(r13); \ 181 std r12,PACA_EXGEN+EX_R12(r13); \
213 clrrdi r12,r13,32; /* get high part of &label */ \ 182 ld r12,PACAKBASE(r13); /* get high part of &label */ \
214 mfmsr r10; \ 183 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
215 mfspr r11,SPRN_SRR0; /* save SRR0 */ \ 184 mfspr r11,SPRN_SRR0; /* save SRR0 */ \
216 LOAD_HANDLER(r12,label##_common) \ 185 LOAD_HANDLER(r12,label##_common) \
217 ori r10,r10,MSR_IR|MSR_DR|MSR_RI; \
218 mtspr SPRN_SRR0,r12; \ 186 mtspr SPRN_SRR0,r12; \
219 mfspr r12,SPRN_SRR1; /* and SRR1 */ \ 187 mfspr r12,SPRN_SRR1; /* and SRR1 */ \
220 mtspr SPRN_SRR1,r10; \ 188 mtspr SPRN_SRR1,r10; \
diff --git a/arch/powerpc/include/asm/fsl_lbc.h b/arch/powerpc/include/asm/fsl_lbc.h
index 303f5484c050..63a4f779f531 100644
--- a/arch/powerpc/include/asm/fsl_lbc.h
+++ b/arch/powerpc/include/asm/fsl_lbc.h
@@ -23,9 +23,9 @@
23#ifndef __ASM_FSL_LBC_H 23#ifndef __ASM_FSL_LBC_H
24#define __ASM_FSL_LBC_H 24#define __ASM_FSL_LBC_H
25 25
26#include <linux/compiler.h>
26#include <linux/types.h> 27#include <linux/types.h>
27#include <linux/spinlock.h> 28#include <linux/io.h>
28#include <asm/io.h>
29 29
30struct fsl_lbc_bank { 30struct fsl_lbc_bank {
31 __be32 br; /**< Base Register */ 31 __be32 br; /**< Base Register */
@@ -227,9 +227,6 @@ struct fsl_lbc_regs {
227 u8 res8[0xF00]; 227 u8 res8[0xF00];
228}; 228};
229 229
230extern struct fsl_lbc_regs __iomem *fsl_lbc_regs;
231extern spinlock_t fsl_lbc_lock;
232
233/* 230/*
234 * FSL UPM routines 231 * FSL UPM routines
235 */ 232 */
@@ -268,44 +265,7 @@ static inline void fsl_upm_end_pattern(struct fsl_upm *upm)
268 cpu_relax(); 265 cpu_relax();
269} 266}
270 267
271/** 268extern int fsl_upm_run_pattern(struct fsl_upm *upm, void __iomem *io_base,
272 * fsl_upm_run_pattern - actually run an UPM pattern 269 u32 mar);
273 * @upm: pointer to the fsl_upm structure obtained via fsl_upm_find
274 * @io_base: remapped pointer to where memory access should happen
275 * @mar: MAR register content during pattern execution
276 *
277 * This function triggers dummy write to the memory specified by the io_base,
278 * thus UPM pattern actually executed. Note that mar usage depends on the
279 * pre-programmed AMX bits in the UPM RAM.
280 */
281static inline int fsl_upm_run_pattern(struct fsl_upm *upm,
282 void __iomem *io_base, u32 mar)
283{
284 int ret = 0;
285 unsigned long flags;
286
287 spin_lock_irqsave(&fsl_lbc_lock, flags);
288
289 out_be32(&fsl_lbc_regs->mar, mar << (32 - upm->width));
290
291 switch (upm->width) {
292 case 8:
293 out_8(io_base, 0x0);
294 break;
295 case 16:
296 out_be16(io_base, 0x0);
297 break;
298 case 32:
299 out_be32(io_base, 0x0);
300 break;
301 default:
302 ret = -EINVAL;
303 break;
304 }
305
306 spin_unlock_irqrestore(&fsl_lbc_lock, flags);
307
308 return ret;
309}
310 270
311#endif /* __ASM_FSL_LBC_H */ 271#endif /* __ASM_FSL_LBC_H */
diff --git a/arch/powerpc/include/asm/highmem.h b/arch/powerpc/include/asm/highmem.h
index 5d99b6489d56..91c589520c0a 100644
--- a/arch/powerpc/include/asm/highmem.h
+++ b/arch/powerpc/include/asm/highmem.h
@@ -84,7 +84,7 @@ static inline void *kmap_atomic_prot(struct page *page, enum km_type type, pgpro
84#ifdef CONFIG_DEBUG_HIGHMEM 84#ifdef CONFIG_DEBUG_HIGHMEM
85 BUG_ON(!pte_none(*(kmap_pte-idx))); 85 BUG_ON(!pte_none(*(kmap_pte-idx)));
86#endif 86#endif
87 set_pte_at(&init_mm, vaddr, kmap_pte-idx, mk_pte(page, prot)); 87 __set_pte_at(&init_mm, vaddr, kmap_pte-idx, mk_pte(page, prot));
88 flush_tlb_page(NULL, vaddr); 88 flush_tlb_page(NULL, vaddr);
89 89
90 return (void*) vaddr; 90 return (void*) vaddr;
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index 77c7fa025e65..08266d2728b3 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -711,7 +711,7 @@ static inline void * phys_to_virt(unsigned long address)
711/* 711/*
712 * Change "struct page" to physical address. 712 * Change "struct page" to physical address.
713 */ 713 */
714#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) 714#define page_to_phys(page) ((phys_addr_t)page_to_pfn(page) << PAGE_SHIFT)
715 715
716/* We do NOT want virtual merging, it would put too much pressure on 716/* We do NOT want virtual merging, it would put too much pressure on
717 * our iommu allocator. Instead, we want drivers to be smart enough 717 * our iommu allocator. Instead, we want drivers to be smart enough
diff --git a/arch/powerpc/include/asm/irq.h b/arch/powerpc/include/asm/irq.h
index a372f76836c2..0a5137676e1b 100644
--- a/arch/powerpc/include/asm/irq.h
+++ b/arch/powerpc/include/asm/irq.h
@@ -236,15 +236,27 @@ extern unsigned int irq_find_mapping(struct irq_host *host,
236extern unsigned int irq_create_direct_mapping(struct irq_host *host); 236extern unsigned int irq_create_direct_mapping(struct irq_host *host);
237 237
238/** 238/**
239 * irq_radix_revmap - Find a linux virq from a hw irq number. 239 * irq_radix_revmap_insert - Insert a hw irq to linux virq number mapping.
240 * @host: host owning this hardware interrupt
241 * @virq: linux irq number
242 * @hwirq: hardware irq number in that host space
243 *
244 * This is for use by irq controllers that use a radix tree reverse
245 * mapping for fast lookup.
246 */
247extern void irq_radix_revmap_insert(struct irq_host *host, unsigned int virq,
248 irq_hw_number_t hwirq);
249
250/**
251 * irq_radix_revmap_lookup - Find a linux virq from a hw irq number.
240 * @host: host owning this hardware interrupt 252 * @host: host owning this hardware interrupt
241 * @hwirq: hardware irq number in that host space 253 * @hwirq: hardware irq number in that host space
242 * 254 *
243 * This is a fast path, for use by irq controller code that uses radix tree 255 * This is a fast path, for use by irq controller code that uses radix tree
244 * revmaps 256 * revmaps
245 */ 257 */
246extern unsigned int irq_radix_revmap(struct irq_host *host, 258extern unsigned int irq_radix_revmap_lookup(struct irq_host *host,
247 irq_hw_number_t hwirq); 259 irq_hw_number_t hwirq);
248 260
249/** 261/**
250 * irq_linear_revmap - Find a linux virq from a hw irq number. 262 * irq_linear_revmap - Find a linux virq from a hw irq number.
diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h
index 2655e2a4831e..34b52b7180cd 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -81,11 +81,17 @@ struct kvm_vcpu_arch {
81 struct tlbe shadow_tlb[PPC44x_TLB_SIZE]; 81 struct tlbe shadow_tlb[PPC44x_TLB_SIZE];
82 /* Pages which are referenced in the shadow TLB. */ 82 /* Pages which are referenced in the shadow TLB. */
83 struct page *shadow_pages[PPC44x_TLB_SIZE]; 83 struct page *shadow_pages[PPC44x_TLB_SIZE];
84 /* Copy of the host's TLB. */ 84
85 struct tlbe host_tlb[PPC44x_TLB_SIZE]; 85 /* Track which TLB entries we've modified in the current exit. */
86 u8 shadow_tlb_mod[PPC44x_TLB_SIZE];
86 87
87 u32 host_stack; 88 u32 host_stack;
88 u32 host_pid; 89 u32 host_pid;
90 u32 host_dbcr0;
91 u32 host_dbcr1;
92 u32 host_dbcr2;
93 u32 host_iac[4];
94 u32 host_msr;
89 95
90 u64 fpr[32]; 96 u64 fpr[32];
91 u32 gpr[32]; 97 u32 gpr[32];
@@ -123,7 +129,11 @@ struct kvm_vcpu_arch {
123 u32 ivor[16]; 129 u32 ivor[16];
124 u32 ivpr; 130 u32 ivpr;
125 u32 pir; 131 u32 pir;
132
133 u32 shadow_pid;
126 u32 pid; 134 u32 pid;
135 u32 swap_pid;
136
127 u32 pvr; 137 u32 pvr;
128 u32 ccr0; 138 u32 ccr0;
129 u32 ccr1; 139 u32 ccr1;
diff --git a/arch/powerpc/include/asm/kvm_ppc.h b/arch/powerpc/include/asm/kvm_ppc.h
index a8b068792260..8931ba729d2b 100644
--- a/arch/powerpc/include/asm/kvm_ppc.h
+++ b/arch/powerpc/include/asm/kvm_ppc.h
@@ -64,6 +64,10 @@ extern void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gfn_t gfn,
64extern void kvmppc_mmu_invalidate(struct kvm_vcpu *vcpu, gva_t eaddr, 64extern void kvmppc_mmu_invalidate(struct kvm_vcpu *vcpu, gva_t eaddr,
65 gva_t eend, u32 asid); 65 gva_t eend, u32 asid);
66extern void kvmppc_mmu_priv_switch(struct kvm_vcpu *vcpu, int usermode); 66extern void kvmppc_mmu_priv_switch(struct kvm_vcpu *vcpu, int usermode);
67extern void kvmppc_mmu_switch_pid(struct kvm_vcpu *vcpu, u32 pid);
68
69/* XXX Book E specific */
70extern void kvmppc_tlbe_set_modified(struct kvm_vcpu *vcpu, unsigned int i);
67 71
68extern void kvmppc_check_and_deliver_interrupts(struct kvm_vcpu *vcpu); 72extern void kvmppc_check_and_deliver_interrupts(struct kvm_vcpu *vcpu);
69 73
@@ -92,4 +96,12 @@ static inline void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
92 kvm_vcpu_block(vcpu); 96 kvm_vcpu_block(vcpu);
93} 97}
94 98
99static inline void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 new_pid)
100{
101 if (vcpu->arch.pid != new_pid) {
102 vcpu->arch.pid = new_pid;
103 vcpu->arch.swap_pid = 1;
104 }
105}
106
95#endif /* __POWERPC_KVM_PPC_H__ */ 107#endif /* __POWERPC_KVM_PPC_H__ */
diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h
index 893aafd87fde..2740c44ff717 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -88,8 +88,6 @@ struct machdep_calls {
88 unsigned long (*tce_get)(struct iommu_table *tbl, 88 unsigned long (*tce_get)(struct iommu_table *tbl,
89 long index); 89 long index);
90 void (*tce_flush)(struct iommu_table *tbl); 90 void (*tce_flush)(struct iommu_table *tbl);
91 void (*pci_dma_dev_setup)(struct pci_dev *dev);
92 void (*pci_dma_bus_setup)(struct pci_bus *bus);
93 91
94 void __iomem * (*ioremap)(phys_addr_t addr, unsigned long size, 92 void __iomem * (*ioremap)(phys_addr_t addr, unsigned long size,
95 unsigned long flags); 93 unsigned long flags);
@@ -101,6 +99,9 @@ struct machdep_calls {
101#endif 99#endif
102#endif /* CONFIG_PPC64 */ 100#endif /* CONFIG_PPC64 */
103 101
102 void (*pci_dma_dev_setup)(struct pci_dev *dev);
103 void (*pci_dma_bus_setup)(struct pci_bus *bus);
104
104 int (*probe)(void); 105 int (*probe)(void);
105 void (*setup_arch)(void); /* Optional, may be NULL */ 106 void (*setup_arch)(void); /* Optional, may be NULL */
106 void (*init_early)(void); 107 void (*init_early)(void);
diff --git a/arch/powerpc/include/asm/mman.h b/arch/powerpc/include/asm/mman.h
index 9209f755763e..e7b99bac9f48 100644
--- a/arch/powerpc/include/asm/mman.h
+++ b/arch/powerpc/include/asm/mman.h
@@ -44,7 +44,7 @@ static inline unsigned long arch_calc_vm_prot_bits(unsigned long prot)
44 44
45static inline pgprot_t arch_vm_get_page_prot(unsigned long vm_flags) 45static inline pgprot_t arch_vm_get_page_prot(unsigned long vm_flags)
46{ 46{
47 return (vm_flags & VM_SAO) ? __pgprot(_PAGE_SAO) : 0; 47 return (vm_flags & VM_SAO) ? __pgprot(_PAGE_SAO) : __pgprot(0);
48} 48}
49#define arch_vm_get_page_prot(vm_flags) arch_vm_get_page_prot(vm_flags) 49#define arch_vm_get_page_prot(vm_flags) arch_vm_get_page_prot(vm_flags)
50 50
diff --git a/arch/powerpc/include/asm/mmu-hash64.h b/arch/powerpc/include/asm/mmu-hash64.h
index c2df53c5ceb9..5a441742ffba 100644
--- a/arch/powerpc/include/asm/mmu-hash64.h
+++ b/arch/powerpc/include/asm/mmu-hash64.h
@@ -437,7 +437,7 @@ typedef struct {
437 }) 437 })
438#endif /* 1 */ 438#endif /* 1 */
439 439
440/* This is only valid for addresses >= KERNELBASE */ 440/* This is only valid for addresses >= PAGE_OFFSET */
441static inline unsigned long get_kernel_vsid(unsigned long ea, int ssize) 441static inline unsigned long get_kernel_vsid(unsigned long ea, int ssize)
442{ 442{
443 if (ssize == MMU_SEGSIZE_256M) 443 if (ssize == MMU_SEGSIZE_256M)
diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index fe566a348a86..34d9ac433ace 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -5,6 +5,7 @@
5#include <linux/irq.h> 5#include <linux/irq.h>
6#include <linux/sysdev.h> 6#include <linux/sysdev.h>
7#include <asm/dcr.h> 7#include <asm/dcr.h>
8#include <asm/msi_bitmap.h>
8 9
9/* 10/*
10 * Global registers 11 * Global registers
@@ -301,8 +302,7 @@ struct mpic
301#endif 302#endif
302 303
303#ifdef CONFIG_PCI_MSI 304#ifdef CONFIG_PCI_MSI
304 spinlock_t bitmap_lock; 305 struct msi_bitmap msi_bitmap;
305 unsigned long *hwirq_bitmap;
306#endif 306#endif
307 307
308#ifdef CONFIG_MPIC_BROKEN_REGREAD 308#ifdef CONFIG_MPIC_BROKEN_REGREAD
diff --git a/arch/powerpc/include/asm/msi_bitmap.h b/arch/powerpc/include/asm/msi_bitmap.h
new file mode 100644
index 000000000000..97ac3f46ae0d
--- /dev/null
+++ b/arch/powerpc/include/asm/msi_bitmap.h
@@ -0,0 +1,35 @@
1#ifndef _POWERPC_SYSDEV_MSI_BITMAP_H
2#define _POWERPC_SYSDEV_MSI_BITMAP_H
3
4/*
5 * Copyright 2008, Michael Ellerman, IBM Corporation.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2 of the
10 * License.
11 *
12 */
13
14#include <linux/of.h>
15#include <asm/irq.h>
16
17struct msi_bitmap {
18 struct device_node *of_node;
19 unsigned long *bitmap;
20 spinlock_t lock;
21 unsigned int irq_count;
22};
23
24int msi_bitmap_alloc_hwirqs(struct msi_bitmap *bmp, int num);
25void msi_bitmap_free_hwirqs(struct msi_bitmap *bmp, unsigned int offset,
26 unsigned int num);
27void msi_bitmap_reserve_hwirq(struct msi_bitmap *bmp, unsigned int hwirq);
28
29int msi_bitmap_reserve_dt_hwirqs(struct msi_bitmap *bmp);
30
31int msi_bitmap_alloc(struct msi_bitmap *bmp, unsigned int irq_count,
32 struct device_node *of_node);
33void msi_bitmap_free(struct msi_bitmap *bmp);
34
35#endif /* _POWERPC_SYSDEV_MSI_BITMAP_H */
diff --git a/arch/powerpc/include/asm/of_device.h b/arch/powerpc/include/asm/of_device.h
index 3c123990ca2e..a64debf177dc 100644
--- a/arch/powerpc/include/asm/of_device.h
+++ b/arch/powerpc/include/asm/of_device.h
@@ -24,8 +24,5 @@ extern struct of_device *of_device_alloc(struct device_node *np,
24extern int of_device_uevent(struct device *dev, 24extern int of_device_uevent(struct device *dev,
25 struct kobj_uevent_env *env); 25 struct kobj_uevent_env *env);
26 26
27/* This is just here during the transition */
28#include <linux/of_device.h>
29
30#endif /* __KERNEL__ */ 27#endif /* __KERNEL__ */
31#endif /* _ASM_POWERPC_OF_DEVICE_H */ 28#endif /* _ASM_POWERPC_OF_DEVICE_H */
diff --git a/arch/powerpc/include/asm/of_platform.h b/arch/powerpc/include/asm/of_platform.h
index 18659ef72139..53b46507ffde 100644
--- a/arch/powerpc/include/asm/of_platform.h
+++ b/arch/powerpc/include/asm/of_platform.h
@@ -11,9 +11,6 @@
11 * 11 *
12 */ 12 */
13 13
14/* This is just here during the transition */
15#include <linux/of_platform.h>
16
17/* Platform drivers register/unregister */ 14/* Platform drivers register/unregister */
18static inline int of_register_platform_driver(struct of_platform_driver *drv) 15static inline int of_register_platform_driver(struct of_platform_driver *drv)
19{ 16{
diff --git a/arch/powerpc/include/asm/paca.h b/arch/powerpc/include/asm/paca.h
index 6493a395508b..082b3aedf145 100644
--- a/arch/powerpc/include/asm/paca.h
+++ b/arch/powerpc/include/asm/paca.h
@@ -62,6 +62,8 @@ struct paca_struct {
62 u16 paca_index; /* Logical processor number */ 62 u16 paca_index; /* Logical processor number */
63 63
64 u64 kernel_toc; /* Kernel TOC address */ 64 u64 kernel_toc; /* Kernel TOC address */
65 u64 kernelbase; /* Base address of kernel */
66 u64 kernel_msr; /* MSR while running in kernel */
65 u64 stab_real; /* Absolute address of segment table */ 67 u64 stab_real; /* Absolute address of segment table */
66 u64 stab_addr; /* Virtual address of segment table */ 68 u64 stab_addr; /* Virtual address of segment table */
67 void *emergency_sp; /* pointer to emergency stack */ 69 void *emergency_sp; /* pointer to emergency stack */
diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h
index e088545cb3f5..64e144505f65 100644
--- a/arch/powerpc/include/asm/page.h
+++ b/arch/powerpc/include/asm/page.h
@@ -71,15 +71,21 @@
71#define PAGE_OFFSET ASM_CONST(CONFIG_PAGE_OFFSET) 71#define PAGE_OFFSET ASM_CONST(CONFIG_PAGE_OFFSET)
72#define LOAD_OFFSET ASM_CONST((CONFIG_KERNEL_START-CONFIG_PHYSICAL_START)) 72#define LOAD_OFFSET ASM_CONST((CONFIG_KERNEL_START-CONFIG_PHYSICAL_START))
73 73
74#if defined(CONFIG_RELOCATABLE) && defined(CONFIG_FLATMEM) 74#if defined(CONFIG_RELOCATABLE)
75#ifndef __ASSEMBLY__ 75#ifndef __ASSEMBLY__
76extern phys_addr_t memstart_addr; 76extern phys_addr_t memstart_addr;
77extern phys_addr_t kernstart_addr; 77extern phys_addr_t kernstart_addr;
78#endif 78#endif
79#define PHYSICAL_START kernstart_addr 79#define PHYSICAL_START kernstart_addr
80#define MEMORY_START memstart_addr
81#else 80#else
82#define PHYSICAL_START ASM_CONST(CONFIG_PHYSICAL_START) 81#define PHYSICAL_START ASM_CONST(CONFIG_PHYSICAL_START)
82#endif
83
84#ifdef CONFIG_PPC64
85#define MEMORY_START 0UL
86#elif defined(CONFIG_RELOCATABLE)
87#define MEMORY_START memstart_addr
88#else
83#define MEMORY_START (PHYSICAL_START + PAGE_OFFSET - KERNELBASE) 89#define MEMORY_START (PHYSICAL_START + PAGE_OFFSET - KERNELBASE)
84#endif 90#endif
85 91
@@ -92,8 +98,8 @@ extern phys_addr_t kernstart_addr;
92#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) 98#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
93#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) 99#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
94 100
95#define __va(x) ((void *)((unsigned long)(x) - PHYSICAL_START + KERNELBASE)) 101#define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET - MEMORY_START))
96#define __pa(x) ((unsigned long)(x) + PHYSICAL_START - KERNELBASE) 102#define __pa(x) ((unsigned long)(x) - PAGE_OFFSET + MEMORY_START)
97 103
98/* 104/*
99 * Unfortunately the PLT is in the BSS in the PPC32 ELF ABI, 105 * Unfortunately the PLT is in the BSS in the PPC32 ELF ABI,
diff --git a/arch/powerpc/include/asm/page_32.h b/arch/powerpc/include/asm/page_32.h
index ebfae530a379..d77072a32cc6 100644
--- a/arch/powerpc/include/asm/page_32.h
+++ b/arch/powerpc/include/asm/page_32.h
@@ -13,10 +13,16 @@
13#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES 13#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
14#endif 14#endif
15 15
16#ifdef CONFIG_PTE_64BIT
17#define PTE_FLAGS_OFFSET 4 /* offset of PTE flags, in bytes */
18#else
19#define PTE_FLAGS_OFFSET 0
20#endif
21
16#ifndef __ASSEMBLY__ 22#ifndef __ASSEMBLY__
17/* 23/*
18 * The basic type of a PTE - 64 bits for those CPUs with > 32 bit 24 * The basic type of a PTE - 64 bits for those CPUs with > 32 bit
19 * physical addressing. For now this just the IBM PPC440. 25 * physical addressing.
20 */ 26 */
21#ifdef CONFIG_PTE_64BIT 27#ifdef CONFIG_PTE_64BIT
22typedef unsigned long long pte_basic_t; 28typedef unsigned long long pte_basic_t;
diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h
index a05a942b1c25..0e52c7828ea4 100644
--- a/arch/powerpc/include/asm/pci.h
+++ b/arch/powerpc/include/asm/pci.h
@@ -60,6 +60,14 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
60 return channel ? 15 : 14; 60 return channel ? 15 : 14;
61} 61}
62 62
63#ifdef CONFIG_PCI
64extern void set_pci_dma_ops(struct dma_mapping_ops *dma_ops);
65extern struct dma_mapping_ops *get_pci_dma_ops(void);
66#else /* CONFIG_PCI */
67#define set_pci_dma_ops(d)
68#define get_pci_dma_ops() NULL
69#endif
70
63#ifdef CONFIG_PPC64 71#ifdef CONFIG_PPC64
64 72
65/* 73/*
@@ -70,9 +78,6 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
70#define PCI_DISABLE_MWI 78#define PCI_DISABLE_MWI
71 79
72#ifdef CONFIG_PCI 80#ifdef CONFIG_PCI
73extern void set_pci_dma_ops(struct dma_mapping_ops *dma_ops);
74extern struct dma_mapping_ops *get_pci_dma_ops(void);
75
76static inline void pci_dma_burst_advice(struct pci_dev *pdev, 81static inline void pci_dma_burst_advice(struct pci_dev *pdev,
77 enum pci_dma_burst_strategy *strat, 82 enum pci_dma_burst_strategy *strat,
78 unsigned long *strategy_parameter) 83 unsigned long *strategy_parameter)
@@ -89,9 +94,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
89 *strat = PCI_DMA_BURST_MULTIPLE; 94 *strat = PCI_DMA_BURST_MULTIPLE;
90 *strategy_parameter = cacheline_size; 95 *strategy_parameter = cacheline_size;
91} 96}
92#else /* CONFIG_PCI */
93#define set_pci_dma_ops(d)
94#define get_pci_dma_ops() NULL
95#endif 97#endif
96 98
97#else /* 32-bit */ 99#else /* 32-bit */
diff --git a/arch/powerpc/include/asm/pgtable-ppc32.h b/arch/powerpc/include/asm/pgtable-ppc32.h
index 6fe39e327047..6ab7c67cb5ab 100644
--- a/arch/powerpc/include/asm/pgtable-ppc32.h
+++ b/arch/powerpc/include/asm/pgtable-ppc32.h
@@ -261,6 +261,7 @@ extern int icache_44x_need_flush;
261#define _PAGE_HWEXEC 0x00000004 /* H: Execute permission */ 261#define _PAGE_HWEXEC 0x00000004 /* H: Execute permission */
262#define _PAGE_ACCESSED 0x00000008 /* S: Page referenced */ 262#define _PAGE_ACCESSED 0x00000008 /* S: Page referenced */
263#define _PAGE_DIRTY 0x00000010 /* S: Page dirty */ 263#define _PAGE_DIRTY 0x00000010 /* S: Page dirty */
264#define _PAGE_SPECIAL 0x00000020 /* S: Special page */
264#define _PAGE_USER 0x00000040 /* S: User page */ 265#define _PAGE_USER 0x00000040 /* S: User page */
265#define _PAGE_ENDIAN 0x00000080 /* H: E bit */ 266#define _PAGE_ENDIAN 0x00000080 /* H: E bit */
266#define _PAGE_GUARDED 0x00000100 /* H: G bit */ 267#define _PAGE_GUARDED 0x00000100 /* H: G bit */
@@ -276,6 +277,7 @@ extern int icache_44x_need_flush;
276/* ERPN in a PTE never gets cleared, ignore it */ 277/* ERPN in a PTE never gets cleared, ignore it */
277#define _PTE_NONE_MASK 0xffffffff00000000ULL 278#define _PTE_NONE_MASK 0xffffffff00000000ULL
278 279
280#define __HAVE_ARCH_PTE_SPECIAL
279 281
280#elif defined(CONFIG_FSL_BOOKE) 282#elif defined(CONFIG_FSL_BOOKE)
281/* 283/*
@@ -305,6 +307,7 @@ extern int icache_44x_need_flush;
305#define _PAGE_COHERENT 0x00100 /* H: M bit */ 307#define _PAGE_COHERENT 0x00100 /* H: M bit */
306#define _PAGE_NO_CACHE 0x00200 /* H: I bit */ 308#define _PAGE_NO_CACHE 0x00200 /* H: I bit */
307#define _PAGE_WRITETHRU 0x00400 /* H: W bit */ 309#define _PAGE_WRITETHRU 0x00400 /* H: W bit */
310#define _PAGE_SPECIAL 0x00800 /* S: Special page */
308 311
309#ifdef CONFIG_PTE_64BIT 312#ifdef CONFIG_PTE_64BIT
310/* ERPN in a PTE never gets cleared, ignore it */ 313/* ERPN in a PTE never gets cleared, ignore it */
@@ -315,6 +318,8 @@ extern int icache_44x_need_flush;
315#define _PMD_PRESENT_MASK (PAGE_MASK) 318#define _PMD_PRESENT_MASK (PAGE_MASK)
316#define _PMD_BAD (~PAGE_MASK) 319#define _PMD_BAD (~PAGE_MASK)
317 320
321#define __HAVE_ARCH_PTE_SPECIAL
322
318#elif defined(CONFIG_8xx) 323#elif defined(CONFIG_8xx)
319/* Definitions for 8xx embedded chips. */ 324/* Definitions for 8xx embedded chips. */
320#define _PAGE_PRESENT 0x0001 /* Page is valid */ 325#define _PAGE_PRESENT 0x0001 /* Page is valid */
@@ -362,8 +367,14 @@ extern int icache_44x_need_flush;
362#define _PAGE_ACCESSED 0x100 /* R: page referenced */ 367#define _PAGE_ACCESSED 0x100 /* R: page referenced */
363#define _PAGE_EXEC 0x200 /* software: i-cache coherency required */ 368#define _PAGE_EXEC 0x200 /* software: i-cache coherency required */
364#define _PAGE_RW 0x400 /* software: user write access allowed */ 369#define _PAGE_RW 0x400 /* software: user write access allowed */
370#define _PAGE_SPECIAL 0x800 /* software: Special page */
365 371
372#ifdef CONFIG_PTE_64BIT
373/* We never clear the high word of the pte */
374#define _PTE_NONE_MASK (0xffffffff00000000ULL | _PAGE_HASHPTE)
375#else
366#define _PTE_NONE_MASK _PAGE_HASHPTE 376#define _PTE_NONE_MASK _PAGE_HASHPTE
377#endif
367 378
368#define _PMD_PRESENT 0 379#define _PMD_PRESENT 0
369#define _PMD_PRESENT_MASK (PAGE_MASK) 380#define _PMD_PRESENT_MASK (PAGE_MASK)
@@ -372,6 +383,8 @@ extern int icache_44x_need_flush;
372/* Hash table based platforms need atomic updates of the linux PTE */ 383/* Hash table based platforms need atomic updates of the linux PTE */
373#define PTE_ATOMIC_UPDATES 1 384#define PTE_ATOMIC_UPDATES 1
374 385
386#define __HAVE_ARCH_PTE_SPECIAL
387
375#endif 388#endif
376 389
377/* 390/*
@@ -404,6 +417,9 @@ extern int icache_44x_need_flush;
404#ifndef _PAGE_WRITETHRU 417#ifndef _PAGE_WRITETHRU
405#define _PAGE_WRITETHRU 0 418#define _PAGE_WRITETHRU 0
406#endif 419#endif
420#ifndef _PAGE_SPECIAL
421#define _PAGE_SPECIAL 0
422#endif
407#ifndef _PMD_PRESENT_MASK 423#ifndef _PMD_PRESENT_MASK
408#define _PMD_PRESENT_MASK _PMD_PRESENT 424#define _PMD_PRESENT_MASK _PMD_PRESENT
409#endif 425#endif
@@ -415,11 +431,11 @@ extern int icache_44x_need_flush;
415#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY) 431#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
416 432
417 433
418#define PAGE_PROT_BITS __pgprot(_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \ 434#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
419 _PAGE_WRITETHRU | _PAGE_ENDIAN | \ 435 _PAGE_WRITETHRU | _PAGE_ENDIAN | \
420 _PAGE_USER | _PAGE_ACCESSED | \ 436 _PAGE_USER | _PAGE_ACCESSED | \
421 _PAGE_RW | _PAGE_HWWRITE | _PAGE_DIRTY | \ 437 _PAGE_RW | _PAGE_HWWRITE | _PAGE_DIRTY | \
422 _PAGE_EXEC | _PAGE_HWEXEC) 438 _PAGE_EXEC | _PAGE_HWEXEC)
423/* 439/*
424 * Note: the _PAGE_COHERENT bit automatically gets set in the hardware 440 * Note: the _PAGE_COHERENT bit automatically gets set in the hardware
425 * PTE if CONFIG_SMP is defined (hash_page does this); there is no need 441 * PTE if CONFIG_SMP is defined (hash_page does this); there is no need
@@ -517,7 +533,8 @@ extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
517 533
518#define pte_none(pte) ((pte_val(pte) & ~_PTE_NONE_MASK) == 0) 534#define pte_none(pte) ((pte_val(pte) & ~_PTE_NONE_MASK) == 0)
519#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT) 535#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
520#define pte_clear(mm,addr,ptep) do { set_pte_at((mm), (addr), (ptep), __pte(0)); } while (0) 536#define pte_clear(mm, addr, ptep) \
537 do { pte_update(ptep, ~_PAGE_HASHPTE, 0); } while (0)
521 538
522#define pmd_none(pmd) (!pmd_val(pmd)) 539#define pmd_none(pmd) (!pmd_val(pmd))
523#define pmd_bad(pmd) (pmd_val(pmd) & _PMD_BAD) 540#define pmd_bad(pmd) (pmd_val(pmd) & _PMD_BAD)
@@ -533,7 +550,7 @@ static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW; }
533static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; } 550static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
534static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; } 551static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
535static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; } 552static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
536static inline int pte_special(pte_t pte) { return 0; } 553static inline int pte_special(pte_t pte) { return pte_val(pte) & _PAGE_SPECIAL; }
537 554
538static inline void pte_uncache(pte_t pte) { pte_val(pte) |= _PAGE_NO_CACHE; } 555static inline void pte_uncache(pte_t pte) { pte_val(pte) |= _PAGE_NO_CACHE; }
539static inline void pte_cache(pte_t pte) { pte_val(pte) &= ~_PAGE_NO_CACHE; } 556static inline void pte_cache(pte_t pte) { pte_val(pte) &= ~_PAGE_NO_CACHE; }
@@ -552,10 +569,10 @@ static inline pte_t pte_mkdirty(pte_t pte) {
552static inline pte_t pte_mkyoung(pte_t pte) { 569static inline pte_t pte_mkyoung(pte_t pte) {
553 pte_val(pte) |= _PAGE_ACCESSED; return pte; } 570 pte_val(pte) |= _PAGE_ACCESSED; return pte; }
554static inline pte_t pte_mkspecial(pte_t pte) { 571static inline pte_t pte_mkspecial(pte_t pte) {
555 return pte; } 572 pte_val(pte) |= _PAGE_SPECIAL; return pte; }
556static inline unsigned long pte_pgprot(pte_t pte) 573static inline pgprot_t pte_pgprot(pte_t pte)
557{ 574{
558 return __pgprot(pte_val(pte)) & PAGE_PROT_BITS; 575 return __pgprot(pte_val(pte) & PAGE_PROT_BITS);
559} 576}
560 577
561static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 578static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
@@ -575,6 +592,10 @@ extern int flush_hash_pages(unsigned context, unsigned long va,
575extern void add_hash_page(unsigned context, unsigned long va, 592extern void add_hash_page(unsigned context, unsigned long va,
576 unsigned long pmdval); 593 unsigned long pmdval);
577 594
595/* Flush an entry from the TLB/hash table */
596extern void flush_hash_entry(struct mm_struct *mm, pte_t *ptep,
597 unsigned long address);
598
578/* 599/*
579 * Atomic PTE updates. 600 * Atomic PTE updates.
580 * 601 *
@@ -612,9 +633,6 @@ static inline unsigned long pte_update(pte_t *p,
612 return old; 633 return old;
613} 634}
614#else /* CONFIG_PTE_64BIT */ 635#else /* CONFIG_PTE_64BIT */
615/* TODO: Change that to only modify the low word and move set_pte_at()
616 * out of line
617 */
618static inline unsigned long long pte_update(pte_t *p, 636static inline unsigned long long pte_update(pte_t *p,
619 unsigned long clr, 637 unsigned long clr,
620 unsigned long set) 638 unsigned long set)
@@ -652,14 +670,36 @@ static inline unsigned long long pte_update(pte_t *p,
652 * On machines which use an MMU hash table we avoid changing the 670 * On machines which use an MMU hash table we avoid changing the
653 * _PAGE_HASHPTE bit. 671 * _PAGE_HASHPTE bit.
654 */ 672 */
655static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, 673
674static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
656 pte_t *ptep, pte_t pte) 675 pte_t *ptep, pte_t pte)
657{ 676{
658#if _PAGE_HASHPTE != 0 677#if (_PAGE_HASHPTE != 0) && defined(CONFIG_SMP) && !defined(CONFIG_PTE_64BIT)
659 pte_update(ptep, ~_PAGE_HASHPTE, pte_val(pte) & ~_PAGE_HASHPTE); 678 pte_update(ptep, ~_PAGE_HASHPTE, pte_val(pte) & ~_PAGE_HASHPTE);
679#elif defined(CONFIG_PTE_64BIT) && defined(CONFIG_SMP)
680#if _PAGE_HASHPTE != 0
681 if (pte_val(*ptep) & _PAGE_HASHPTE)
682 flush_hash_entry(mm, ptep, addr);
683#endif
684 __asm__ __volatile__("\
685 stw%U0%X0 %2,%0\n\
686 eieio\n\
687 stw%U0%X0 %L2,%1"
688 : "=m" (*ptep), "=m" (*((unsigned char *)ptep+4))
689 : "r" (pte) : "memory");
660#else 690#else
661 *ptep = pte; 691 *ptep = __pte((pte_val(*ptep) & _PAGE_HASHPTE)
692 | (pte_val(pte) & ~_PAGE_HASHPTE));
693#endif
694}
695
696static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
697 pte_t *ptep, pte_t pte)
698{
699#if defined(CONFIG_PTE_64BIT) && defined(CONFIG_SMP)
700 WARN_ON(pte_present(*ptep));
662#endif 701#endif
702 __set_pte_at(mm, addr, ptep, pte);
663} 703}
664 704
665/* 705/*
diff --git a/arch/powerpc/include/asm/pgtable-ppc64.h b/arch/powerpc/include/asm/pgtable-ppc64.h
index 4597c491e9b5..4c0a8c62859d 100644
--- a/arch/powerpc/include/asm/pgtable-ppc64.h
+++ b/arch/powerpc/include/asm/pgtable-ppc64.h
@@ -117,10 +117,10 @@
117#define PAGE_AGP __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_NO_CACHE) 117#define PAGE_AGP __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_NO_CACHE)
118#define HAVE_PAGE_AGP 118#define HAVE_PAGE_AGP
119 119
120#define PAGE_PROT_BITS __pgprot(_PAGE_GUARDED | _PAGE_COHERENT | \ 120#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | \
121 _PAGE_NO_CACHE | _PAGE_WRITETHRU | \ 121 _PAGE_NO_CACHE | _PAGE_WRITETHRU | \
122 _PAGE_4K_PFN | _PAGE_RW | _PAGE_USER | \ 122 _PAGE_4K_PFN | _PAGE_RW | _PAGE_USER | \
123 _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_EXEC) 123 _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_EXEC)
124/* PTEIDX nibble */ 124/* PTEIDX nibble */
125#define _PTEIDX_SECONDARY 0x8 125#define _PTEIDX_SECONDARY 0x8
126#define _PTEIDX_GROUP_IX 0x7 126#define _PTEIDX_GROUP_IX 0x7
@@ -264,9 +264,9 @@ static inline pte_t pte_mkhuge(pte_t pte) {
264 return pte; } 264 return pte; }
265static inline pte_t pte_mkspecial(pte_t pte) { 265static inline pte_t pte_mkspecial(pte_t pte) {
266 pte_val(pte) |= _PAGE_SPECIAL; return pte; } 266 pte_val(pte) |= _PAGE_SPECIAL; return pte; }
267static inline unsigned long pte_pgprot(pte_t pte) 267static inline pgprot_t pte_pgprot(pte_t pte)
268{ 268{
269 return __pgprot(pte_val(pte)) & PAGE_PROT_BITS; 269 return __pgprot(pte_val(pte) & PAGE_PROT_BITS);
270} 270}
271 271
272/* Atomic PTE updates */ 272/* Atomic PTE updates */
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index 0966899d974b..c4a029ccb4d3 100644
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -268,7 +268,7 @@ n:
268 * Loads the value of the constant expression 'expr' into register 'rn' 268 * Loads the value of the constant expression 'expr' into register 'rn'
269 * using immediate instructions only. Use this when it's important not 269 * using immediate instructions only. Use this when it's important not
270 * to reference other data (i.e. on ppc64 when the TOC pointer is not 270 * to reference other data (i.e. on ppc64 when the TOC pointer is not
271 * valid). 271 * valid) and when 'expr' is a constant or absolute address.
272 * 272 *
273 * LOAD_REG_ADDR(rn, name) 273 * LOAD_REG_ADDR(rn, name)
274 * Loads the address of label 'name' into register 'rn'. Use this when 274 * Loads the address of label 'name' into register 'rn'. Use this when
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index be980f4ee495..67453766bff1 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -109,6 +109,7 @@
109#define SPRN_EVPR 0x3D6 /* Exception Vector Prefix Register */ 109#define SPRN_EVPR 0x3D6 /* Exception Vector Prefix Register */
110#define SPRN_L1CSR0 0x3F2 /* L1 Cache Control and Status Register 0 */ 110#define SPRN_L1CSR0 0x3F2 /* L1 Cache Control and Status Register 0 */
111#define SPRN_L1CSR1 0x3F3 /* L1 Cache Control and Status Register 1 */ 111#define SPRN_L1CSR1 0x3F3 /* L1 Cache Control and Status Register 1 */
112#define SPRN_MMUCSR0 0x3F4 /* MMU Control and Status Register 0 */
112#define SPRN_PIT 0x3DB /* Programmable Interval Timer */ 113#define SPRN_PIT 0x3DB /* Programmable Interval Timer */
113#define SPRN_BUCSR 0x3F5 /* Branch Unit Control and Status */ 114#define SPRN_BUCSR 0x3F5 /* Branch Unit Control and Status */
114#define SPRN_L2CSR0 0x3F9 /* L2 Data Cache Control and Status Register 0 */ 115#define SPRN_L2CSR0 0x3F9 /* L2 Data Cache Control and Status Register 0 */
@@ -410,6 +411,12 @@
410#define L2CSR0_L2LOA 0x00000080 /* L2 Cache Lock Overflow Allocate */ 411#define L2CSR0_L2LOA 0x00000080 /* L2 Cache Lock Overflow Allocate */
411#define L2CSR0_L2LO 0x00000020 /* L2 Cache Lock Overflow */ 412#define L2CSR0_L2LO 0x00000020 /* L2 Cache Lock Overflow */
412 413
414/* Bit definitions for MMUCSR0 */
415#define MMUCSR0_TLB1FI 0x00000002 /* TLB1 Flash invalidate */
416#define MMUCSR0_TLB0FI 0x00000004 /* TLB0 Flash invalidate */
417#define MMUCSR0_TLB2FI 0x00000040 /* TLB2 Flash invalidate */
418#define MMUCSR0_TLB3FI 0x00000020 /* TLB3 Flash invalidate */
419
413/* Bit definitions for SGR. */ 420/* Bit definitions for SGR. */
414#define SGR_NORMAL 0 /* Speculative fetching allowed. */ 421#define SGR_NORMAL 0 /* Speculative fetching allowed. */
415#define SGR_GUARDED 1 /* Speculative fetching disallowed. */ 422#define SGR_GUARDED 1 /* Speculative fetching disallowed. */
diff --git a/arch/powerpc/include/asm/sections.h b/arch/powerpc/include/asm/sections.h
index 07956f3e7844..6fbce725c710 100644
--- a/arch/powerpc/include/asm/sections.h
+++ b/arch/powerpc/include/asm/sections.h
@@ -18,6 +18,12 @@ static inline int in_kernel_text(unsigned long addr)
18 return 0; 18 return 0;
19} 19}
20 20
21static inline int overlaps_kernel_text(unsigned long start, unsigned long end)
22{
23 return start < (unsigned long)__init_end &&
24 (unsigned long)_stext < end;
25}
26
21#undef dereference_function_descriptor 27#undef dereference_function_descriptor
22static inline void *dereference_function_descriptor(void *ptr) 28static inline void *dereference_function_descriptor(void *ptr)
23{ 29{
diff --git a/arch/powerpc/math-emu/sfp-machine.h b/arch/powerpc/include/asm/sfp-machine.h
index 4b17d83cfcdd..ced34f1dc8f8 100644
--- a/arch/powerpc/math-emu/sfp-machine.h
+++ b/arch/powerpc/include/asm/sfp-machine.h
@@ -79,27 +79,44 @@
79 * #define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv_64(D,R,X,Y) 79 * #define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv_64(D,R,X,Y)
80 */ 80 */
81 81
82#define _FP_MUL_MEAT_S(R,X,Y) _FP_MUL_MEAT_1_wide(S,R,X,Y,umul_ppmm) 82#define _FP_MUL_MEAT_S(R,X,Y) _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
83#define _FP_MUL_MEAT_D(R,X,Y) _FP_MUL_MEAT_2_wide(D,R,X,Y,umul_ppmm) 83#define _FP_MUL_MEAT_D(R,X,Y) _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
84 84
85#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_udiv(S,R,X,Y) 85#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_udiv(S,R,X,Y)
86#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv_64(D,R,X,Y) 86#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y)
87 87
88/* These macros define what NaN looks like. They're supposed to expand to 88/* These macros define what NaN looks like. They're supposed to expand to
89 * a comma-separated set of 32bit unsigned ints that encode NaN. 89 * a comma-separated set of 32bit unsigned ints that encode NaN.
90 */ 90 */
91#define _FP_NANFRAC_S _FP_QNANBIT_S 91#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1)
92#define _FP_NANFRAC_D _FP_QNANBIT_D, 0 92#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1), -1
93#define _FP_NANFRAC_Q _FP_QNANBIT_Q, 0, 0, 0 93#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
94#define _FP_NANSIGN_S 0
95#define _FP_NANSIGN_D 0
96#define _FP_NANSIGN_Q 0
94 97
95#define _FP_KEEPNANFRACP 1 98#define _FP_KEEPNANFRACP 1
96 99
100/* Exception flags. We use the bit positions of the appropriate bits
101 in the FPSCR, which also correspond to the FE_* bits. This makes
102 everything easier ;-). */
103#define FP_EX_INVALID (1 << (31 - 2))
104#define FP_EX_INVALID_SNAN EFLAG_VXSNAN
105#define FP_EX_INVALID_ISI EFLAG_VXISI
106#define FP_EX_INVALID_IDI EFLAG_VXIDI
107#define FP_EX_INVALID_ZDZ EFLAG_VXZDZ
108#define FP_EX_INVALID_IMZ EFLAG_VXIMZ
109#define FP_EX_OVERFLOW (1 << (31 - 3))
110#define FP_EX_UNDERFLOW (1 << (31 - 4))
111#define FP_EX_DIVZERO (1 << (31 - 5))
112#define FP_EX_INEXACT (1 << (31 - 6))
113
97/* This macro appears to be called when both X and Y are NaNs, and 114/* This macro appears to be called when both X and Y are NaNs, and
98 * has to choose one and copy it to R. i386 goes for the larger of the 115 * has to choose one and copy it to R. i386 goes for the larger of the
99 * two, sparc64 just picks Y. I don't understand this at all so I'll 116 * two, sparc64 just picks Y. I don't understand this at all so I'll
100 * go with sparc64 because it's shorter :-> -- PMM 117 * go with sparc64 because it's shorter :-> -- PMM
101 */ 118 */
102#define _FP_CHOOSENAN(fs, wc, R, X, Y) \ 119#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \
103 do { \ 120 do { \
104 R##_s = Y##_s; \ 121 R##_s = Y##_s; \
105 _FP_FRAC_COPY_##wc(R,Y); \ 122 _FP_FRAC_COPY_##wc(R,Y); \
@@ -107,62 +124,6 @@
107 } while (0) 124 } while (0)
108 125
109 126
110extern void fp_unpack_d(long *, unsigned long *, unsigned long *,
111 long *, long *, void *);
112extern int fp_pack_d(void *, long, unsigned long, unsigned long, long, long);
113extern int fp_pack_ds(void *, long, unsigned long, unsigned long, long, long);
114
115#define __FP_UNPACK_RAW_1(fs, X, val) \
116 do { \
117 union _FP_UNION_##fs *_flo = \
118 (union _FP_UNION_##fs *)val; \
119 \
120 X##_f = _flo->bits.frac; \
121 X##_e = _flo->bits.exp; \
122 X##_s = _flo->bits.sign; \
123 } while (0)
124
125#define __FP_UNPACK_RAW_2(fs, X, val) \
126 do { \
127 union _FP_UNION_##fs *_flo = \
128 (union _FP_UNION_##fs *)val; \
129 \
130 X##_f0 = _flo->bits.frac0; \
131 X##_f1 = _flo->bits.frac1; \
132 X##_e = _flo->bits.exp; \
133 X##_s = _flo->bits.sign; \
134 } while (0)
135
136#define __FP_UNPACK_S(X,val) \
137 do { \
138 __FP_UNPACK_RAW_1(S,X,val); \
139 _FP_UNPACK_CANONICAL(S,1,X); \
140 } while (0)
141
142#define __FP_UNPACK_D(X,val) \
143 fp_unpack_d(&X##_s, &X##_f1, &X##_f0, &X##_e, &X##_c, val)
144
145#define __FP_PACK_RAW_1(fs, val, X) \
146 do { \
147 union _FP_UNION_##fs *_flo = \
148 (union _FP_UNION_##fs *)val; \
149 \
150 _flo->bits.frac = X##_f; \
151 _flo->bits.exp = X##_e; \
152 _flo->bits.sign = X##_s; \
153 } while (0)
154
155#define __FP_PACK_RAW_2(fs, val, X) \
156 do { \
157 union _FP_UNION_##fs *_flo = \
158 (union _FP_UNION_##fs *)val; \
159 \
160 _flo->bits.frac0 = X##_f0; \
161 _flo->bits.frac1 = X##_f1; \
162 _flo->bits.exp = X##_e; \
163 _flo->bits.sign = X##_s; \
164 } while (0)
165
166#include <linux/kernel.h> 127#include <linux/kernel.h>
167#include <linux/sched.h> 128#include <linux/sched.h>
168 129
@@ -182,15 +143,30 @@ extern int fp_pack_ds(void *, long, unsigned long, unsigned long, long, long);
182#define __FP_PACK_S(val,X) \ 143#define __FP_PACK_S(val,X) \
183({ int __exc = _FP_PACK_CANONICAL(S,1,X); \ 144({ int __exc = _FP_PACK_CANONICAL(S,1,X); \
184 if(!__exc || !__FPU_TRAP_P(__exc)) \ 145 if(!__exc || !__FPU_TRAP_P(__exc)) \
185 __FP_PACK_RAW_1(S,val,X); \ 146 _FP_PACK_RAW_1_P(S,val,X); \
186 __exc; \ 147 __exc; \
187}) 148})
188 149
189#define __FP_PACK_D(val,X) \ 150#define __FP_PACK_D(val,X) \
190 fp_pack_d(val, X##_s, X##_f1, X##_f0, X##_e, X##_c) 151 do { \
191 152 _FP_PACK_CANONICAL(D, 2, X); \
192#define __FP_PACK_DS(val,X) \ 153 if (!FP_CUR_EXCEPTIONS || !__FPU_TRAP_P(FP_CUR_EXCEPTIONS)) \
193 fp_pack_ds(val, X##_s, X##_f1, X##_f0, X##_e, X##_c) 154 _FP_PACK_RAW_2_P(D, val, X); \
155 } while (0)
156
157#define __FP_PACK_DS(val,X) \
158 do { \
159 FP_DECL_S(__X); \
160 FP_CONV(S, D, 1, 2, __X, X); \
161 _FP_PACK_CANONICAL(S, 1, __X); \
162 if (!FP_CUR_EXCEPTIONS || !__FPU_TRAP_P(FP_CUR_EXCEPTIONS)) { \
163 _FP_UNPACK_CANONICAL(S, 1, __X); \
164 FP_CONV(D, S, 2, 1, X, __X); \
165 _FP_PACK_CANONICAL(D, 2, X); \
166 if (!FP_CUR_EXCEPTIONS || !__FPU_TRAP_P(FP_CUR_EXCEPTIONS)) \
167 _FP_PACK_RAW_2_P(D, val, X); \
168 } \
169 } while (0)
194 170
195/* Obtain the current rounding mode. */ 171/* Obtain the current rounding mode. */
196#define FP_ROUNDMODE \ 172#define FP_ROUNDMODE \
diff --git a/arch/powerpc/include/asm/smp.h b/arch/powerpc/include/asm/smp.h
index 4d28e1e4521b..1866cec4f967 100644
--- a/arch/powerpc/include/asm/smp.h
+++ b/arch/powerpc/include/asm/smp.h
@@ -56,9 +56,16 @@ extern int smp_hw_index[];
56 56
57#define raw_smp_processor_id() (current_thread_info()->cpu) 57#define raw_smp_processor_id() (current_thread_info()->cpu)
58#define hard_smp_processor_id() (smp_hw_index[smp_processor_id()]) 58#define hard_smp_processor_id() (smp_hw_index[smp_processor_id()])
59#define get_hard_smp_processor_id(cpu) (smp_hw_index[(cpu)]) 59
60#define set_hard_smp_processor_id(cpu, phys)\ 60static inline int get_hard_smp_processor_id(int cpu)
61 (smp_hw_index[(cpu)] = (phys)) 61{
62 return smp_hw_index[cpu];
63}
64
65static inline void set_hard_smp_processor_id(int cpu, int phys)
66{
67 smp_hw_index[cpu] = phys;
68}
62#endif 69#endif
63 70
64DECLARE_PER_CPU(cpumask_t, cpu_sibling_map); 71DECLARE_PER_CPU(cpumask_t, cpu_sibling_map);
@@ -86,15 +93,21 @@ extern void __cpu_die(unsigned int cpu);
86 93
87#else 94#else
88/* for UP */ 95/* for UP */
89#define hard_smp_processor_id() 0 96#define hard_smp_processor_id() get_hard_smp_processor_id(0)
90#define smp_setup_cpu_maps() 97#define smp_setup_cpu_maps()
91 98
92#endif /* CONFIG_SMP */ 99#endif /* CONFIG_SMP */
93 100
94#ifdef CONFIG_PPC64 101#ifdef CONFIG_PPC64
95#define get_hard_smp_processor_id(CPU) (paca[(CPU)].hw_cpu_id) 102static inline int get_hard_smp_processor_id(int cpu)
96#define set_hard_smp_processor_id(CPU, VAL) \ 103{
97 do { (paca[(CPU)].hw_cpu_id = (VAL)); } while (0) 104 return paca[cpu].hw_cpu_id;
105}
106
107static inline void set_hard_smp_processor_id(int cpu, int phys)
108{
109 paca[cpu].hw_cpu_id = phys;
110}
98 111
99extern void smp_release_cpus(void); 112extern void smp_release_cpus(void);
100 113
@@ -102,10 +115,17 @@ extern void smp_release_cpus(void);
102/* 32-bit */ 115/* 32-bit */
103#ifndef CONFIG_SMP 116#ifndef CONFIG_SMP
104extern int boot_cpuid_phys; 117extern int boot_cpuid_phys;
105#define get_hard_smp_processor_id(cpu) boot_cpuid_phys 118static inline int get_hard_smp_processor_id(int cpu)
106#define set_hard_smp_processor_id(cpu, phys) 119{
107#endif 120 return boot_cpuid_phys;
108#endif 121}
122
123static inline void set_hard_smp_processor_id(int cpu, int phys)
124{
125 boot_cpuid_phys = phys;
126}
127#endif /* !CONFIG_SMP */
128#endif /* !CONFIG_PPC64 */
109 129
110extern int smt_enabled_at_boot; 130extern int smt_enabled_at_boot;
111 131
diff --git a/arch/powerpc/include/asm/statfs.h b/arch/powerpc/include/asm/statfs.h
index 67024026c10d..5244834583a4 100644
--- a/arch/powerpc/include/asm/statfs.h
+++ b/arch/powerpc/include/asm/statfs.h
@@ -1,60 +1,6 @@
1#ifndef _ASM_POWERPC_STATFS_H 1#ifndef _ASM_POWERPC_STATFS_H
2#define _ASM_POWERPC_STATFS_H 2#define _ASM_POWERPC_STATFS_H
3 3
4/* For ppc32 we just use the generic definitions, not so simple on ppc64 */
5
6#ifndef __powerpc64__
7#include <asm-generic/statfs.h> 4#include <asm-generic/statfs.h>
8#else
9
10#ifndef __KERNEL_STRICT_NAMES
11#include <linux/types.h>
12typedef __kernel_fsid_t fsid_t;
13#endif
14
15/*
16 * We're already 64-bit, so duplicate the definition
17 */
18struct statfs {
19 long f_type;
20 long f_bsize;
21 long f_blocks;
22 long f_bfree;
23 long f_bavail;
24 long f_files;
25 long f_ffree;
26 __kernel_fsid_t f_fsid;
27 long f_namelen;
28 long f_frsize;
29 long f_spare[5];
30};
31
32struct statfs64 {
33 long f_type;
34 long f_bsize;
35 long f_blocks;
36 long f_bfree;
37 long f_bavail;
38 long f_files;
39 long f_ffree;
40 __kernel_fsid_t f_fsid;
41 long f_namelen;
42 long f_frsize;
43 long f_spare[5];
44};
45 5
46struct compat_statfs64 {
47 __u32 f_type;
48 __u32 f_bsize;
49 __u64 f_blocks;
50 __u64 f_bfree;
51 __u64 f_bavail;
52 __u64 f_files;
53 __u64 f_ffree;
54 __kernel_fsid_t f_fsid;
55 __u32 f_namelen;
56 __u32 f_frsize;
57 __u32 f_spare[5];
58};
59#endif /* ! __powerpc64__ */
60#endif 6#endif
diff --git a/arch/powerpc/include/asm/systbl.h b/arch/powerpc/include/asm/systbl.h
index f6cc7a43b4fa..803def236654 100644
--- a/arch/powerpc/include/asm/systbl.h
+++ b/arch/powerpc/include/asm/systbl.h
@@ -32,7 +32,7 @@ COMPAT_SYS_SPU(stime)
32COMPAT_SYS(ptrace) 32COMPAT_SYS(ptrace)
33SYSCALL_SPU(alarm) 33SYSCALL_SPU(alarm)
34OLDSYS(fstat) 34OLDSYS(fstat)
35COMPAT_SYS(pause) 35SYSCALL(pause)
36COMPAT_SYS(utime) 36COMPAT_SYS(utime)
37SYSCALL(ni_syscall) 37SYSCALL(ni_syscall)
38SYSCALL(ni_syscall) 38SYSCALL(ni_syscall)
diff --git a/arch/powerpc/include/asm/tlbflush.h b/arch/powerpc/include/asm/tlbflush.h
index 361cd5c7a32b..a2c6bfd85fb7 100644
--- a/arch/powerpc/include/asm/tlbflush.h
+++ b/arch/powerpc/include/asm/tlbflush.h
@@ -29,6 +29,9 @@
29#include <linux/mm.h> 29#include <linux/mm.h>
30 30
31extern void _tlbie(unsigned long address, unsigned int pid); 31extern void _tlbie(unsigned long address, unsigned int pid);
32extern void _tlbil_all(void);
33extern void _tlbil_pid(unsigned int pid);
34extern void _tlbil_va(unsigned long address, unsigned int pid);
32 35
33#if defined(CONFIG_40x) || defined(CONFIG_8xx) 36#if defined(CONFIG_40x) || defined(CONFIG_8xx)
34#define _tlbia() asm volatile ("tlbia; sync" : : : "memory") 37#define _tlbia() asm volatile ("tlbia; sync" : : : "memory")
@@ -38,31 +41,31 @@ extern void _tlbia(void);
38 41
39static inline void flush_tlb_mm(struct mm_struct *mm) 42static inline void flush_tlb_mm(struct mm_struct *mm)
40{ 43{
41 _tlbia(); 44 _tlbil_pid(mm->context.id);
42} 45}
43 46
44static inline void flush_tlb_page(struct vm_area_struct *vma, 47static inline void flush_tlb_page(struct vm_area_struct *vma,
45 unsigned long vmaddr) 48 unsigned long vmaddr)
46{ 49{
47 _tlbie(vmaddr, vma ? vma->vm_mm->context.id : 0); 50 _tlbil_va(vmaddr, vma ? vma->vm_mm->context.id : 0);
48} 51}
49 52
50static inline void flush_tlb_page_nohash(struct vm_area_struct *vma, 53static inline void flush_tlb_page_nohash(struct vm_area_struct *vma,
51 unsigned long vmaddr) 54 unsigned long vmaddr)
52{ 55{
53 _tlbie(vmaddr, vma ? vma->vm_mm->context.id : 0); 56 flush_tlb_page(vma, vmaddr);
54} 57}
55 58
56static inline void flush_tlb_range(struct vm_area_struct *vma, 59static inline void flush_tlb_range(struct vm_area_struct *vma,
57 unsigned long start, unsigned long end) 60 unsigned long start, unsigned long end)
58{ 61{
59 _tlbia(); 62 _tlbil_pid(vma->vm_mm->context.id);
60} 63}
61 64
62static inline void flush_tlb_kernel_range(unsigned long start, 65static inline void flush_tlb_kernel_range(unsigned long start,
63 unsigned long end) 66 unsigned long end)
64{ 67{
65 _tlbia(); 68 _tlbil_pid(0);
66} 69}
67 70
68#elif defined(CONFIG_PPC32) 71#elif defined(CONFIG_PPC32)
diff --git a/arch/powerpc/include/asm/types.h b/arch/powerpc/include/asm/types.h
index d3374bc865ba..c004c13f291e 100644
--- a/arch/powerpc/include/asm/types.h
+++ b/arch/powerpc/include/asm/types.h
@@ -48,14 +48,7 @@ typedef struct {
48 48
49typedef __vector128 vector128; 49typedef __vector128 vector128;
50 50
51/* Physical address used by some IO functions */ 51#if defined(__powerpc64__) || defined(CONFIG_PHYS_64BIT)
52#if defined(CONFIG_PPC64) || defined(CONFIG_PHYS_64BIT)
53typedef u64 phys_addr_t;
54#else
55typedef u32 phys_addr_t;
56#endif
57
58#ifdef __powerpc64__
59typedef u64 dma_addr_t; 52typedef u64 dma_addr_t;
60#else 53#else
61typedef u32 dma_addr_t; 54typedef u32 dma_addr_t;
diff --git a/arch/powerpc/kernel/.gitignore b/arch/powerpc/kernel/.gitignore
new file mode 100644
index 000000000000..c5f676c3c224
--- /dev/null
+++ b/arch/powerpc/kernel/.gitignore
@@ -0,0 +1 @@
vmlinux.lds
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index 946daea780f1..fdb58253fa5b 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -28,13 +28,14 @@ endif
28obj-y := cputable.o ptrace.o syscalls.o \ 28obj-y := cputable.o ptrace.o syscalls.o \
29 irq.o align.o signal_32.o pmc.o vdso.o \ 29 irq.o align.o signal_32.o pmc.o vdso.o \
30 init_task.o process.o systbl.o idle.o \ 30 init_task.o process.o systbl.o idle.o \
31 signal.o 31 signal.o sysfs.o
32obj-y += vdso32/ 32obj-y += vdso32/
33obj-$(CONFIG_PPC64) += setup_64.o sys_ppc32.o \ 33obj-$(CONFIG_PPC64) += setup_64.o sys_ppc32.o \
34 signal_64.o ptrace32.o \ 34 signal_64.o ptrace32.o \
35 paca.o cpu_setup_ppc970.o \ 35 paca.o cpu_setup_ppc970.o \
36 cpu_setup_pa6t.o \ 36 cpu_setup_pa6t.o \
37 firmware.o sysfs.o nvram_64.o 37 firmware.o nvram_64.o
38obj64-$(CONFIG_RELOCATABLE) += reloc_64.o
38obj-$(CONFIG_PPC64) += vdso64/ 39obj-$(CONFIG_PPC64) += vdso64/
39obj-$(CONFIG_ALTIVEC) += vecemu.o vector.o 40obj-$(CONFIG_ALTIVEC) += vecemu.o vector.o
40obj-$(CONFIG_PPC_970_NAP) += idle_power4.o 41obj-$(CONFIG_PPC_970_NAP) += idle_power4.o
@@ -69,10 +70,10 @@ extra-$(CONFIG_8xx) := head_8xx.o
69extra-y += vmlinux.lds 70extra-y += vmlinux.lds
70 71
71obj-y += time.o prom.o traps.o setup-common.o \ 72obj-y += time.o prom.o traps.o setup-common.o \
72 udbg.o misc.o io.o \ 73 udbg.o misc.o io.o dma.o \
73 misc_$(CONFIG_WORD_SIZE).o 74 misc_$(CONFIG_WORD_SIZE).o
74obj-$(CONFIG_PPC32) += entry_32.o setup_32.o 75obj-$(CONFIG_PPC32) += entry_32.o setup_32.o
75obj-$(CONFIG_PPC64) += dma_64.o iommu.o 76obj-$(CONFIG_PPC64) += dma-iommu.o iommu.o
76obj-$(CONFIG_KGDB) += kgdb.o 77obj-$(CONFIG_KGDB) += kgdb.o
77obj-$(CONFIG_PPC_MULTIPLATFORM) += prom_init.o 78obj-$(CONFIG_PPC_MULTIPLATFORM) += prom_init.o
78obj-$(CONFIG_MODULES) += ppc_ksyms.o 79obj-$(CONFIG_MODULES) += ppc_ksyms.o
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index 92768d3006f7..75c5dd0138fd 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -122,6 +122,8 @@ int main(void)
122 DEFINE(PACASTABRR, offsetof(struct paca_struct, stab_rr)); 122 DEFINE(PACASTABRR, offsetof(struct paca_struct, stab_rr));
123 DEFINE(PACAR1, offsetof(struct paca_struct, saved_r1)); 123 DEFINE(PACAR1, offsetof(struct paca_struct, saved_r1));
124 DEFINE(PACATOC, offsetof(struct paca_struct, kernel_toc)); 124 DEFINE(PACATOC, offsetof(struct paca_struct, kernel_toc));
125 DEFINE(PACAKBASE, offsetof(struct paca_struct, kernelbase));
126 DEFINE(PACAKMSR, offsetof(struct paca_struct, kernel_msr));
125 DEFINE(PACASOFTIRQEN, offsetof(struct paca_struct, soft_enabled)); 127 DEFINE(PACASOFTIRQEN, offsetof(struct paca_struct, soft_enabled));
126 DEFINE(PACAHARDIRQEN, offsetof(struct paca_struct, hard_enabled)); 128 DEFINE(PACAHARDIRQEN, offsetof(struct paca_struct, hard_enabled));
127 DEFINE(PACASLBCACHE, offsetof(struct paca_struct, slb_cache)); 129 DEFINE(PACASLBCACHE, offsetof(struct paca_struct, slb_cache));
@@ -350,14 +352,15 @@ int main(void)
350#endif 352#endif
351 353
352 DEFINE(PGD_TABLE_SIZE, PGD_TABLE_SIZE); 354 DEFINE(PGD_TABLE_SIZE, PGD_TABLE_SIZE);
355 DEFINE(PTE_SIZE, sizeof(pte_t));
353 356
354#ifdef CONFIG_KVM 357#ifdef CONFIG_KVM
355 DEFINE(TLBE_BYTES, sizeof(struct tlbe)); 358 DEFINE(TLBE_BYTES, sizeof(struct tlbe));
356 359
357 DEFINE(VCPU_HOST_STACK, offsetof(struct kvm_vcpu, arch.host_stack)); 360 DEFINE(VCPU_HOST_STACK, offsetof(struct kvm_vcpu, arch.host_stack));
358 DEFINE(VCPU_HOST_PID, offsetof(struct kvm_vcpu, arch.host_pid)); 361 DEFINE(VCPU_HOST_PID, offsetof(struct kvm_vcpu, arch.host_pid));
359 DEFINE(VCPU_HOST_TLB, offsetof(struct kvm_vcpu, arch.host_tlb));
360 DEFINE(VCPU_SHADOW_TLB, offsetof(struct kvm_vcpu, arch.shadow_tlb)); 362 DEFINE(VCPU_SHADOW_TLB, offsetof(struct kvm_vcpu, arch.shadow_tlb));
363 DEFINE(VCPU_SHADOW_MOD, offsetof(struct kvm_vcpu, arch.shadow_tlb_mod));
361 DEFINE(VCPU_GPRS, offsetof(struct kvm_vcpu, arch.gpr)); 364 DEFINE(VCPU_GPRS, offsetof(struct kvm_vcpu, arch.gpr));
362 DEFINE(VCPU_LR, offsetof(struct kvm_vcpu, arch.lr)); 365 DEFINE(VCPU_LR, offsetof(struct kvm_vcpu, arch.lr));
363 DEFINE(VCPU_CR, offsetof(struct kvm_vcpu, arch.cr)); 366 DEFINE(VCPU_CR, offsetof(struct kvm_vcpu, arch.cr));
@@ -369,7 +372,7 @@ int main(void)
369 DEFINE(VCPU_SPRG5, offsetof(struct kvm_vcpu, arch.sprg5)); 372 DEFINE(VCPU_SPRG5, offsetof(struct kvm_vcpu, arch.sprg5));
370 DEFINE(VCPU_SPRG6, offsetof(struct kvm_vcpu, arch.sprg6)); 373 DEFINE(VCPU_SPRG6, offsetof(struct kvm_vcpu, arch.sprg6));
371 DEFINE(VCPU_SPRG7, offsetof(struct kvm_vcpu, arch.sprg7)); 374 DEFINE(VCPU_SPRG7, offsetof(struct kvm_vcpu, arch.sprg7));
372 DEFINE(VCPU_PID, offsetof(struct kvm_vcpu, arch.pid)); 375 DEFINE(VCPU_SHADOW_PID, offsetof(struct kvm_vcpu, arch.shadow_pid));
373 376
374 DEFINE(VCPU_LAST_INST, offsetof(struct kvm_vcpu, arch.last_inst)); 377 DEFINE(VCPU_LAST_INST, offsetof(struct kvm_vcpu, arch.last_inst));
375 DEFINE(VCPU_FAULT_DEAR, offsetof(struct kvm_vcpu, arch.fault_dear)); 378 DEFINE(VCPU_FAULT_DEAR, offsetof(struct kvm_vcpu, arch.fault_dear));
diff --git a/arch/powerpc/kernel/btext.c b/arch/powerpc/kernel/btext.c
index d8f0329b1344..26e58630ed7b 100644
--- a/arch/powerpc/kernel/btext.c
+++ b/arch/powerpc/kernel/btext.c
@@ -442,28 +442,26 @@ void btext_drawtext(const char *c, unsigned int len)
442 442
443void btext_drawhex(unsigned long v) 443void btext_drawhex(unsigned long v)
444{ 444{
445 char *hex_table = "0123456789abcdef";
446
447 if (!boot_text_mapped) 445 if (!boot_text_mapped)
448 return; 446 return;
449#ifdef CONFIG_PPC64 447#ifdef CONFIG_PPC64
450 btext_drawchar(hex_table[(v >> 60) & 0x0000000FUL]); 448 btext_drawchar(hex_asc_hi(v >> 56));
451 btext_drawchar(hex_table[(v >> 56) & 0x0000000FUL]); 449 btext_drawchar(hex_asc_lo(v >> 56));
452 btext_drawchar(hex_table[(v >> 52) & 0x0000000FUL]); 450 btext_drawchar(hex_asc_hi(v >> 48));
453 btext_drawchar(hex_table[(v >> 48) & 0x0000000FUL]); 451 btext_drawchar(hex_asc_lo(v >> 48));
454 btext_drawchar(hex_table[(v >> 44) & 0x0000000FUL]); 452 btext_drawchar(hex_asc_hi(v >> 40));
455 btext_drawchar(hex_table[(v >> 40) & 0x0000000FUL]); 453 btext_drawchar(hex_asc_lo(v >> 40));
456 btext_drawchar(hex_table[(v >> 36) & 0x0000000FUL]); 454 btext_drawchar(hex_asc_hi(v >> 32));
457 btext_drawchar(hex_table[(v >> 32) & 0x0000000FUL]); 455 btext_drawchar(hex_asc_lo(v >> 32));
458#endif 456#endif
459 btext_drawchar(hex_table[(v >> 28) & 0x0000000FUL]); 457 btext_drawchar(hex_asc_hi(v >> 24));
460 btext_drawchar(hex_table[(v >> 24) & 0x0000000FUL]); 458 btext_drawchar(hex_asc_lo(v >> 24));
461 btext_drawchar(hex_table[(v >> 20) & 0x0000000FUL]); 459 btext_drawchar(hex_asc_hi(v >> 16));
462 btext_drawchar(hex_table[(v >> 16) & 0x0000000FUL]); 460 btext_drawchar(hex_asc_lo(v >> 16));
463 btext_drawchar(hex_table[(v >> 12) & 0x0000000FUL]); 461 btext_drawchar(hex_asc_hi(v >> 8));
464 btext_drawchar(hex_table[(v >> 8) & 0x0000000FUL]); 462 btext_drawchar(hex_asc_lo(v >> 8));
465 btext_drawchar(hex_table[(v >> 4) & 0x0000000FUL]); 463 btext_drawchar(hex_asc_hi(v));
466 btext_drawchar(hex_table[(v >> 0) & 0x0000000FUL]); 464 btext_drawchar(hex_asc_lo(v));
467 btext_drawchar(' '); 465 btext_drawchar(' ');
468} 466}
469 467
diff --git a/arch/powerpc/kernel/cpu_setup_ppc970.S b/arch/powerpc/kernel/cpu_setup_ppc970.S
index bf118c385752..27f2507279d8 100644
--- a/arch/powerpc/kernel/cpu_setup_ppc970.S
+++ b/arch/powerpc/kernel/cpu_setup_ppc970.S
@@ -110,7 +110,7 @@ load_hids:
110 isync 110 isync
111 111
112 /* Save away cpu state */ 112 /* Save away cpu state */
113 LOAD_REG_IMMEDIATE(r5,cpu_state_storage) 113 LOAD_REG_ADDR(r5,cpu_state_storage)
114 114
115 /* Save HID0,1,4 and 5 */ 115 /* Save HID0,1,4 and 5 */
116 mfspr r3,SPRN_HID0 116 mfspr r3,SPRN_HID0
@@ -134,7 +134,7 @@ _GLOBAL(__restore_cpu_ppc970)
134 rldicl. r0,r0,4,63 134 rldicl. r0,r0,4,63
135 beqlr 135 beqlr
136 136
137 LOAD_REG_IMMEDIATE(r5,cpu_state_storage) 137 LOAD_REG_ADDR(r5,cpu_state_storage)
138 /* Before accessing memory, we make sure rm_ci is clear */ 138 /* Before accessing memory, we make sure rm_ci is clear */
139 li r0,0 139 li r0,0
140 mfspr r3,SPRN_HID4 140 mfspr r3,SPRN_HID4
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 25c273c761d1..e70d0483fb4e 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -610,6 +610,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
610 .icache_bsize = 32, 610 .icache_bsize = 32,
611 .dcache_bsize = 32, 611 .dcache_bsize = 32,
612 .num_pmcs = 4, 612 .num_pmcs = 4,
613 .pmc_type = PPC_PMC_IBM,
613 .cpu_setup = __setup_cpu_750cx, 614 .cpu_setup = __setup_cpu_750cx,
614 .machine_check = machine_check_generic, 615 .machine_check = machine_check_generic,
615 .platform = "ppc750", 616 .platform = "ppc750",
@@ -623,6 +624,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
623 .icache_bsize = 32, 624 .icache_bsize = 32,
624 .dcache_bsize = 32, 625 .dcache_bsize = 32,
625 .num_pmcs = 4, 626 .num_pmcs = 4,
627 .pmc_type = PPC_PMC_IBM,
626 .cpu_setup = __setup_cpu_750cx, 628 .cpu_setup = __setup_cpu_750cx,
627 .machine_check = machine_check_generic, 629 .machine_check = machine_check_generic,
628 .platform = "ppc750", 630 .platform = "ppc750",
@@ -636,6 +638,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
636 .icache_bsize = 32, 638 .icache_bsize = 32,
637 .dcache_bsize = 32, 639 .dcache_bsize = 32,
638 .num_pmcs = 4, 640 .num_pmcs = 4,
641 .pmc_type = PPC_PMC_IBM,
639 .cpu_setup = __setup_cpu_750cx, 642 .cpu_setup = __setup_cpu_750cx,
640 .machine_check = machine_check_generic, 643 .machine_check = machine_check_generic,
641 .platform = "ppc750", 644 .platform = "ppc750",
@@ -649,6 +652,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
649 .icache_bsize = 32, 652 .icache_bsize = 32,
650 .dcache_bsize = 32, 653 .dcache_bsize = 32,
651 .num_pmcs = 4, 654 .num_pmcs = 4,
655 .pmc_type = PPC_PMC_IBM,
652 .cpu_setup = __setup_cpu_750, 656 .cpu_setup = __setup_cpu_750,
653 .machine_check = machine_check_generic, 657 .machine_check = machine_check_generic,
654 .platform = "ppc750", 658 .platform = "ppc750",
@@ -662,6 +666,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
662 .icache_bsize = 32, 666 .icache_bsize = 32,
663 .dcache_bsize = 32, 667 .dcache_bsize = 32,
664 .num_pmcs = 4, 668 .num_pmcs = 4,
669 .pmc_type = PPC_PMC_IBM,
665 .cpu_setup = __setup_cpu_750, 670 .cpu_setup = __setup_cpu_750,
666 .machine_check = machine_check_generic, 671 .machine_check = machine_check_generic,
667 .platform = "ppc750", 672 .platform = "ppc750",
@@ -675,6 +680,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
675 .icache_bsize = 32, 680 .icache_bsize = 32,
676 .dcache_bsize = 32, 681 .dcache_bsize = 32,
677 .num_pmcs = 4, 682 .num_pmcs = 4,
683 .pmc_type = PPC_PMC_IBM,
678 .cpu_setup = __setup_cpu_750, 684 .cpu_setup = __setup_cpu_750,
679 .machine_check = machine_check_generic, 685 .machine_check = machine_check_generic,
680 .platform = "ppc750", 686 .platform = "ppc750",
@@ -688,6 +694,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
688 .icache_bsize = 32, 694 .icache_bsize = 32,
689 .dcache_bsize = 32, 695 .dcache_bsize = 32,
690 .num_pmcs = 4, 696 .num_pmcs = 4,
697 .pmc_type = PPC_PMC_IBM,
691 .cpu_setup = __setup_cpu_750, 698 .cpu_setup = __setup_cpu_750,
692 .machine_check = machine_check_generic, 699 .machine_check = machine_check_generic,
693 .platform = "ppc750", 700 .platform = "ppc750",
@@ -701,6 +708,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
701 .icache_bsize = 32, 708 .icache_bsize = 32,
702 .dcache_bsize = 32, 709 .dcache_bsize = 32,
703 .num_pmcs = 4, 710 .num_pmcs = 4,
711 .pmc_type = PPC_PMC_IBM,
704 .cpu_setup = __setup_cpu_750fx, 712 .cpu_setup = __setup_cpu_750fx,
705 .machine_check = machine_check_generic, 713 .machine_check = machine_check_generic,
706 .platform = "ppc750", 714 .platform = "ppc750",
@@ -714,6 +722,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
714 .icache_bsize = 32, 722 .icache_bsize = 32,
715 .dcache_bsize = 32, 723 .dcache_bsize = 32,
716 .num_pmcs = 4, 724 .num_pmcs = 4,
725 .pmc_type = PPC_PMC_IBM,
717 .cpu_setup = __setup_cpu_750fx, 726 .cpu_setup = __setup_cpu_750fx,
718 .machine_check = machine_check_generic, 727 .machine_check = machine_check_generic,
719 .platform = "ppc750", 728 .platform = "ppc750",
@@ -727,6 +736,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
727 .icache_bsize = 32, 736 .icache_bsize = 32,
728 .dcache_bsize = 32, 737 .dcache_bsize = 32,
729 .num_pmcs = 4, 738 .num_pmcs = 4,
739 .pmc_type = PPC_PMC_IBM,
730 .cpu_setup = __setup_cpu_750, 740 .cpu_setup = __setup_cpu_750,
731 .machine_check = machine_check_generic, 741 .machine_check = machine_check_generic,
732 .platform = "ppc750", 742 .platform = "ppc750",
@@ -741,6 +751,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
741 .icache_bsize = 32, 751 .icache_bsize = 32,
742 .dcache_bsize = 32, 752 .dcache_bsize = 32,
743 .num_pmcs = 4, 753 .num_pmcs = 4,
754 .pmc_type = PPC_PMC_G4,
744 .cpu_setup = __setup_cpu_7400, 755 .cpu_setup = __setup_cpu_7400,
745 .machine_check = machine_check_generic, 756 .machine_check = machine_check_generic,
746 .platform = "ppc7400", 757 .platform = "ppc7400",
@@ -755,6 +766,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
755 .icache_bsize = 32, 766 .icache_bsize = 32,
756 .dcache_bsize = 32, 767 .dcache_bsize = 32,
757 .num_pmcs = 4, 768 .num_pmcs = 4,
769 .pmc_type = PPC_PMC_G4,
758 .cpu_setup = __setup_cpu_7400, 770 .cpu_setup = __setup_cpu_7400,
759 .machine_check = machine_check_generic, 771 .machine_check = machine_check_generic,
760 .platform = "ppc7400", 772 .platform = "ppc7400",
@@ -769,6 +781,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
769 .icache_bsize = 32, 781 .icache_bsize = 32,
770 .dcache_bsize = 32, 782 .dcache_bsize = 32,
771 .num_pmcs = 4, 783 .num_pmcs = 4,
784 .pmc_type = PPC_PMC_G4,
772 .cpu_setup = __setup_cpu_7410, 785 .cpu_setup = __setup_cpu_7410,
773 .machine_check = machine_check_generic, 786 .machine_check = machine_check_generic,
774 .platform = "ppc7400", 787 .platform = "ppc7400",
@@ -783,6 +796,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
783 .icache_bsize = 32, 796 .icache_bsize = 32,
784 .dcache_bsize = 32, 797 .dcache_bsize = 32,
785 .num_pmcs = 6, 798 .num_pmcs = 6,
799 .pmc_type = PPC_PMC_G4,
786 .cpu_setup = __setup_cpu_745x, 800 .cpu_setup = __setup_cpu_745x,
787 .oprofile_cpu_type = "ppc/7450", 801 .oprofile_cpu_type = "ppc/7450",
788 .oprofile_type = PPC_OPROFILE_G4, 802 .oprofile_type = PPC_OPROFILE_G4,
@@ -799,6 +813,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
799 .icache_bsize = 32, 813 .icache_bsize = 32,
800 .dcache_bsize = 32, 814 .dcache_bsize = 32,
801 .num_pmcs = 6, 815 .num_pmcs = 6,
816 .pmc_type = PPC_PMC_G4,
802 .cpu_setup = __setup_cpu_745x, 817 .cpu_setup = __setup_cpu_745x,
803 .oprofile_cpu_type = "ppc/7450", 818 .oprofile_cpu_type = "ppc/7450",
804 .oprofile_type = PPC_OPROFILE_G4, 819 .oprofile_type = PPC_OPROFILE_G4,
@@ -815,6 +830,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
815 .icache_bsize = 32, 830 .icache_bsize = 32,
816 .dcache_bsize = 32, 831 .dcache_bsize = 32,
817 .num_pmcs = 6, 832 .num_pmcs = 6,
833 .pmc_type = PPC_PMC_G4,
818 .cpu_setup = __setup_cpu_745x, 834 .cpu_setup = __setup_cpu_745x,
819 .oprofile_cpu_type = "ppc/7450", 835 .oprofile_cpu_type = "ppc/7450",
820 .oprofile_type = PPC_OPROFILE_G4, 836 .oprofile_type = PPC_OPROFILE_G4,
@@ -831,6 +847,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
831 .icache_bsize = 32, 847 .icache_bsize = 32,
832 .dcache_bsize = 32, 848 .dcache_bsize = 32,
833 .num_pmcs = 6, 849 .num_pmcs = 6,
850 .pmc_type = PPC_PMC_G4,
834 .cpu_setup = __setup_cpu_745x, 851 .cpu_setup = __setup_cpu_745x,
835 .oprofile_cpu_type = "ppc/7450", 852 .oprofile_cpu_type = "ppc/7450",
836 .oprofile_type = PPC_OPROFILE_G4, 853 .oprofile_type = PPC_OPROFILE_G4,
@@ -847,6 +864,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
847 .icache_bsize = 32, 864 .icache_bsize = 32,
848 .dcache_bsize = 32, 865 .dcache_bsize = 32,
849 .num_pmcs = 6, 866 .num_pmcs = 6,
867 .pmc_type = PPC_PMC_G4,
850 .cpu_setup = __setup_cpu_745x, 868 .cpu_setup = __setup_cpu_745x,
851 .oprofile_cpu_type = "ppc/7450", 869 .oprofile_cpu_type = "ppc/7450",
852 .oprofile_type = PPC_OPROFILE_G4, 870 .oprofile_type = PPC_OPROFILE_G4,
@@ -863,6 +881,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
863 .icache_bsize = 32, 881 .icache_bsize = 32,
864 .dcache_bsize = 32, 882 .dcache_bsize = 32,
865 .num_pmcs = 6, 883 .num_pmcs = 6,
884 .pmc_type = PPC_PMC_G4,
866 .cpu_setup = __setup_cpu_745x, 885 .cpu_setup = __setup_cpu_745x,
867 .oprofile_cpu_type = "ppc/7450", 886 .oprofile_cpu_type = "ppc/7450",
868 .oprofile_type = PPC_OPROFILE_G4, 887 .oprofile_type = PPC_OPROFILE_G4,
@@ -879,6 +898,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
879 .icache_bsize = 32, 898 .icache_bsize = 32,
880 .dcache_bsize = 32, 899 .dcache_bsize = 32,
881 .num_pmcs = 6, 900 .num_pmcs = 6,
901 .pmc_type = PPC_PMC_G4,
882 .cpu_setup = __setup_cpu_745x, 902 .cpu_setup = __setup_cpu_745x,
883 .oprofile_cpu_type = "ppc/7450", 903 .oprofile_cpu_type = "ppc/7450",
884 .oprofile_type = PPC_OPROFILE_G4, 904 .oprofile_type = PPC_OPROFILE_G4,
@@ -895,6 +915,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
895 .icache_bsize = 32, 915 .icache_bsize = 32,
896 .dcache_bsize = 32, 916 .dcache_bsize = 32,
897 .num_pmcs = 6, 917 .num_pmcs = 6,
918 .pmc_type = PPC_PMC_G4,
898 .cpu_setup = __setup_cpu_745x, 919 .cpu_setup = __setup_cpu_745x,
899 .oprofile_cpu_type = "ppc/7450", 920 .oprofile_cpu_type = "ppc/7450",
900 .oprofile_type = PPC_OPROFILE_G4, 921 .oprofile_type = PPC_OPROFILE_G4,
@@ -910,6 +931,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
910 .icache_bsize = 32, 931 .icache_bsize = 32,
911 .dcache_bsize = 32, 932 .dcache_bsize = 32,
912 .num_pmcs = 6, 933 .num_pmcs = 6,
934 .pmc_type = PPC_PMC_G4,
913 .cpu_setup = __setup_cpu_745x, 935 .cpu_setup = __setup_cpu_745x,
914 .oprofile_cpu_type = "ppc/7450", 936 .oprofile_cpu_type = "ppc/7450",
915 .oprofile_type = PPC_OPROFILE_G4, 937 .oprofile_type = PPC_OPROFILE_G4,
@@ -926,6 +948,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
926 .icache_bsize = 32, 948 .icache_bsize = 32,
927 .dcache_bsize = 32, 949 .dcache_bsize = 32,
928 .num_pmcs = 6, 950 .num_pmcs = 6,
951 .pmc_type = PPC_PMC_G4,
929 .cpu_setup = __setup_cpu_745x, 952 .cpu_setup = __setup_cpu_745x,
930 .oprofile_cpu_type = "ppc/7450", 953 .oprofile_cpu_type = "ppc/7450",
931 .oprofile_type = PPC_OPROFILE_G4, 954 .oprofile_type = PPC_OPROFILE_G4,
@@ -942,6 +965,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
942 .icache_bsize = 32, 965 .icache_bsize = 32,
943 .dcache_bsize = 32, 966 .dcache_bsize = 32,
944 .num_pmcs = 6, 967 .num_pmcs = 6,
968 .pmc_type = PPC_PMC_G4,
945 .cpu_setup = __setup_cpu_745x, 969 .cpu_setup = __setup_cpu_745x,
946 .oprofile_cpu_type = "ppc/7450", 970 .oprofile_cpu_type = "ppc/7450",
947 .oprofile_type = PPC_OPROFILE_G4, 971 .oprofile_type = PPC_OPROFILE_G4,
diff --git a/arch/powerpc/kernel/dma_64.c b/arch/powerpc/kernel/dma-iommu.c
index ae5708e3a312..49248f89ce23 100644
--- a/arch/powerpc/kernel/dma_64.c
+++ b/arch/powerpc/kernel/dma-iommu.c
@@ -2,14 +2,10 @@
2 * Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corporation 2 * Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corporation
3 * 3 *
4 * Provide default implementations of the DMA mapping callbacks for 4 * Provide default implementations of the DMA mapping callbacks for
5 * directly mapped busses and busses using the iommu infrastructure 5 * busses using the iommu infrastructure
6 */ 6 */
7 7
8#include <linux/device.h>
9#include <linux/dma-mapping.h>
10#include <asm/bug.h>
11#include <asm/iommu.h> 8#include <asm/iommu.h>
12#include <asm/abs_addr.h>
13 9
14/* 10/*
15 * Generic iommu implementation 11 * Generic iommu implementation
@@ -24,7 +20,7 @@ static void *dma_iommu_alloc_coherent(struct device *dev, size_t size,
24{ 20{
25 return iommu_alloc_coherent(dev, dev->archdata.dma_data, size, 21 return iommu_alloc_coherent(dev, dev->archdata.dma_data, size,
26 dma_handle, device_to_mask(dev), flag, 22 dma_handle, device_to_mask(dev), flag,
27 dev->archdata.numa_node); 23 dev_to_node(dev));
28} 24}
29 25
30static void dma_iommu_free_coherent(struct device *dev, size_t size, 26static void dma_iommu_free_coherent(struct device *dev, size_t size,
@@ -105,96 +101,3 @@ struct dma_mapping_ops dma_iommu_ops = {
105 .dma_supported = dma_iommu_dma_supported, 101 .dma_supported = dma_iommu_dma_supported,
106}; 102};
107EXPORT_SYMBOL(dma_iommu_ops); 103EXPORT_SYMBOL(dma_iommu_ops);
108
109/*
110 * Generic direct DMA implementation
111 *
112 * This implementation supports a per-device offset that can be applied if
113 * the address at which memory is visible to devices is not 0. Platform code
114 * can set archdata.dma_data to an unsigned long holding the offset. By
115 * default the offset is zero.
116 */
117
118static unsigned long get_dma_direct_offset(struct device *dev)
119{
120 return (unsigned long)dev->archdata.dma_data;
121}
122
123static void *dma_direct_alloc_coherent(struct device *dev, size_t size,
124 dma_addr_t *dma_handle, gfp_t flag)
125{
126 struct page *page;
127 void *ret;
128 int node = dev->archdata.numa_node;
129
130 page = alloc_pages_node(node, flag, get_order(size));
131 if (page == NULL)
132 return NULL;
133 ret = page_address(page);
134 memset(ret, 0, size);
135 *dma_handle = virt_to_abs(ret) + get_dma_direct_offset(dev);
136
137 return ret;
138}
139
140static void dma_direct_free_coherent(struct device *dev, size_t size,
141 void *vaddr, dma_addr_t dma_handle)
142{
143 free_pages((unsigned long)vaddr, get_order(size));
144}
145
146static dma_addr_t dma_direct_map_single(struct device *dev, void *ptr,
147 size_t size,
148 enum dma_data_direction direction,
149 struct dma_attrs *attrs)
150{
151 return virt_to_abs(ptr) + get_dma_direct_offset(dev);
152}
153
154static void dma_direct_unmap_single(struct device *dev, dma_addr_t dma_addr,
155 size_t size,
156 enum dma_data_direction direction,
157 struct dma_attrs *attrs)
158{
159}
160
161static int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl,
162 int nents, enum dma_data_direction direction,
163 struct dma_attrs *attrs)
164{
165 struct scatterlist *sg;
166 int i;
167
168 for_each_sg(sgl, sg, nents, i) {
169 sg->dma_address = sg_phys(sg) + get_dma_direct_offset(dev);
170 sg->dma_length = sg->length;
171 }
172
173 return nents;
174}
175
176static void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sg,
177 int nents, enum dma_data_direction direction,
178 struct dma_attrs *attrs)
179{
180}
181
182static int dma_direct_dma_supported(struct device *dev, u64 mask)
183{
184 /* Could be improved to check for memory though it better be
185 * done via some global so platforms can set the limit in case
186 * they have limited DMA windows
187 */
188 return mask >= DMA_32BIT_MASK;
189}
190
191struct dma_mapping_ops dma_direct_ops = {
192 .alloc_coherent = dma_direct_alloc_coherent,
193 .free_coherent = dma_direct_free_coherent,
194 .map_single = dma_direct_map_single,
195 .unmap_single = dma_direct_unmap_single,
196 .map_sg = dma_direct_map_sg,
197 .unmap_sg = dma_direct_unmap_sg,
198 .dma_supported = dma_direct_dma_supported,
199};
200EXPORT_SYMBOL(dma_direct_ops);
diff --git a/arch/powerpc/kernel/dma.c b/arch/powerpc/kernel/dma.c
new file mode 100644
index 000000000000..1562daf8839a
--- /dev/null
+++ b/arch/powerpc/kernel/dma.c
@@ -0,0 +1,131 @@
1/*
2 * Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corporation
3 *
4 * Provide default implementations of the DMA mapping callbacks for
5 * directly mapped busses.
6 */
7
8#include <linux/device.h>
9#include <linux/dma-mapping.h>
10#include <asm/bug.h>
11#include <asm/abs_addr.h>
12
13/*
14 * Generic direct DMA implementation
15 *
16 * This implementation supports a per-device offset that can be applied if
17 * the address at which memory is visible to devices is not 0. Platform code
18 * can set archdata.dma_data to an unsigned long holding the offset. By
19 * default the offset is PCI_DRAM_OFFSET.
20 */
21
22static unsigned long get_dma_direct_offset(struct device *dev)
23{
24 if (dev)
25 return (unsigned long)dev->archdata.dma_data;
26
27 return PCI_DRAM_OFFSET;
28}
29
30void *dma_direct_alloc_coherent(struct device *dev, size_t size,
31 dma_addr_t *dma_handle, gfp_t flag)
32{
33 void *ret;
34#ifdef CONFIG_NOT_COHERENT_CACHE
35 ret = __dma_alloc_coherent(size, dma_handle, flag);
36 if (ret == NULL)
37 return NULL;
38 *dma_handle += get_dma_direct_offset(dev);
39 return ret;
40#else
41 struct page *page;
42 int node = dev_to_node(dev);
43
44 /* ignore region specifiers */
45 flag &= ~(__GFP_HIGHMEM);
46
47 page = alloc_pages_node(node, flag, get_order(size));
48 if (page == NULL)
49 return NULL;
50 ret = page_address(page);
51 memset(ret, 0, size);
52 *dma_handle = virt_to_abs(ret) + get_dma_direct_offset(dev);
53
54 return ret;
55#endif
56}
57
58void dma_direct_free_coherent(struct device *dev, size_t size,
59 void *vaddr, dma_addr_t dma_handle)
60{
61#ifdef CONFIG_NOT_COHERENT_CACHE
62 __dma_free_coherent(size, vaddr);
63#else
64 free_pages((unsigned long)vaddr, get_order(size));
65#endif
66}
67
68static int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl,
69 int nents, enum dma_data_direction direction,
70 struct dma_attrs *attrs)
71{
72 struct scatterlist *sg;
73 int i;
74
75 for_each_sg(sgl, sg, nents, i) {
76 sg->dma_address = sg_phys(sg) + get_dma_direct_offset(dev);
77 sg->dma_length = sg->length;
78 }
79
80 return nents;
81}
82
83static void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sg,
84 int nents, enum dma_data_direction direction,
85 struct dma_attrs *attrs)
86{
87}
88
89static int dma_direct_dma_supported(struct device *dev, u64 mask)
90{
91#ifdef CONFIG_PPC64
92 /* Could be improved to check for memory though it better be
93 * done via some global so platforms can set the limit in case
94 * they have limited DMA windows
95 */
96 return mask >= DMA_32BIT_MASK;
97#else
98 return 1;
99#endif
100}
101
102static inline dma_addr_t dma_direct_map_page(struct device *dev,
103 struct page *page,
104 unsigned long offset,
105 size_t size,
106 enum dma_data_direction dir,
107 struct dma_attrs *attrs)
108{
109 BUG_ON(dir == DMA_NONE);
110 __dma_sync_page(page, offset, size, dir);
111 return page_to_phys(page) + offset + get_dma_direct_offset(dev);
112}
113
114static inline void dma_direct_unmap_page(struct device *dev,
115 dma_addr_t dma_address,
116 size_t size,
117 enum dma_data_direction direction,
118 struct dma_attrs *attrs)
119{
120}
121
122struct dma_mapping_ops dma_direct_ops = {
123 .alloc_coherent = dma_direct_alloc_coherent,
124 .free_coherent = dma_direct_free_coherent,
125 .map_sg = dma_direct_map_sg,
126 .unmap_sg = dma_direct_unmap_sg,
127 .dma_supported = dma_direct_dma_supported,
128 .map_page = dma_direct_map_page,
129 .unmap_page = dma_direct_unmap_page,
130};
131EXPORT_SYMBOL(dma_direct_ops);
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 2d802e97097c..fd8b4bae9b04 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -512,31 +512,12 @@ _GLOBAL(ret_from_except_lite)
512#endif 512#endif
513 513
514restore: 514restore:
515 ld r5,SOFTE(r1)
516#ifdef CONFIG_PPC_ISERIES
517BEGIN_FW_FTR_SECTION 515BEGIN_FW_FTR_SECTION
518 cmpdi 0,r5,0 516 ld r5,SOFTE(r1)
519 beq 4f 517FW_FTR_SECTION_ELSE
520 /* Check for pending interrupts (iSeries) */ 518 b iseries_check_pending_irqs
521 ld r3,PACALPPACAPTR(r13) 519ALT_FW_FTR_SECTION_END_IFCLR(FW_FEATURE_ISERIES)
522 ld r3,LPPACAANYINT(r3) 5202:
523 cmpdi r3,0
524 beq+ 4f /* skip do_IRQ if no interrupts */
525
526 li r3,0
527 stb r3,PACASOFTIRQEN(r13) /* ensure we are soft-disabled */
528#ifdef CONFIG_TRACE_IRQFLAGS
529 bl .trace_hardirqs_off
530 mfmsr r10
531#endif
532 ori r10,r10,MSR_EE
533 mtmsrd r10 /* hard-enable again */
534 addi r3,r1,STACK_FRAME_OVERHEAD
535 bl .do_IRQ
536 b .ret_from_except_lite /* loop back and handle more */
5374:
538END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
539#endif
540 TRACE_AND_RESTORE_IRQ(r5); 521 TRACE_AND_RESTORE_IRQ(r5);
541 522
542 /* extract EE bit and use it to restore paca->hard_enabled */ 523 /* extract EE bit and use it to restore paca->hard_enabled */
@@ -592,6 +573,30 @@ END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
592 rfid 573 rfid
593 b . /* prevent speculative execution */ 574 b . /* prevent speculative execution */
594 575
576iseries_check_pending_irqs:
577#ifdef CONFIG_PPC_ISERIES
578 ld r5,SOFTE(r1)
579 cmpdi 0,r5,0
580 beq 2b
581 /* Check for pending interrupts (iSeries) */
582 ld r3,PACALPPACAPTR(r13)
583 ld r3,LPPACAANYINT(r3)
584 cmpdi r3,0
585 beq+ 2b /* skip do_IRQ if no interrupts */
586
587 li r3,0
588 stb r3,PACASOFTIRQEN(r13) /* ensure we are soft-disabled */
589#ifdef CONFIG_TRACE_IRQFLAGS
590 bl .trace_hardirqs_off
591 mfmsr r10
592#endif
593 ori r10,r10,MSR_EE
594 mtmsrd r10 /* hard-enable again */
595 addi r3,r1,STACK_FRAME_OVERHEAD
596 bl .do_IRQ
597 b .ret_from_except_lite /* loop back and handle more */
598#endif
599
595do_work: 600do_work:
596#ifdef CONFIG_PREEMPT 601#ifdef CONFIG_PREEMPT
597 andi. r0,r3,MSR_PR /* Returning to user mode? */ 602 andi. r0,r3,MSR_PR /* Returning to user mode? */
@@ -685,10 +690,6 @@ _GLOBAL(enter_rtas)
685 std r7,_DAR(r1) 690 std r7,_DAR(r1)
686 mfdsisr r8 691 mfdsisr r8
687 std r8,_DSISR(r1) 692 std r8,_DSISR(r1)
688 mfsrr0 r9
689 std r9,_SRR0(r1)
690 mfsrr1 r10
691 std r10,_SRR1(r1)
692 693
693 /* Temporary workaround to clear CR until RTAS can be modified to 694 /* Temporary workaround to clear CR until RTAS can be modified to
694 * ignore all bits. 695 * ignore all bits.
@@ -749,6 +750,10 @@ _STATIC(rtas_return_loc)
749 mfspr r4,SPRN_SPRG3 /* Get PACA */ 750 mfspr r4,SPRN_SPRG3 /* Get PACA */
750 clrldi r4,r4,2 /* convert to realmode address */ 751 clrldi r4,r4,2 /* convert to realmode address */
751 752
753 bcl 20,31,$+4
7540: mflr r3
755 ld r3,(1f-0b)(r3) /* get &.rtas_restore_regs */
756
752 mfmsr r6 757 mfmsr r6
753 li r0,MSR_RI 758 li r0,MSR_RI
754 andc r6,r6,r0 759 andc r6,r6,r0
@@ -756,7 +761,6 @@ _STATIC(rtas_return_loc)
756 mtmsrd r6 761 mtmsrd r6
757 762
758 ld r1,PACAR1(r4) /* Restore our SP */ 763 ld r1,PACAR1(r4) /* Restore our SP */
759 LOAD_REG_IMMEDIATE(r3,.rtas_restore_regs)
760 ld r4,PACASAVEDMSR(r4) /* Restore our MSR */ 764 ld r4,PACASAVEDMSR(r4) /* Restore our MSR */
761 765
762 mtspr SPRN_SRR0,r3 766 mtspr SPRN_SRR0,r3
@@ -764,6 +768,9 @@ _STATIC(rtas_return_loc)
764 rfid 768 rfid
765 b . /* prevent speculative execution */ 769 b . /* prevent speculative execution */
766 770
771 .align 3
7721: .llong .rtas_restore_regs
773
767_STATIC(rtas_restore_regs) 774_STATIC(rtas_restore_regs)
768 /* relocation is on at this point */ 775 /* relocation is on at this point */
769 REST_GPR(2, r1) /* Restore the TOC */ 776 REST_GPR(2, r1) /* Restore the TOC */
@@ -783,10 +790,6 @@ _STATIC(rtas_restore_regs)
783 mtdar r7 790 mtdar r7
784 ld r8,_DSISR(r1) 791 ld r8,_DSISR(r1)
785 mtdsisr r8 792 mtdsisr r8
786 ld r9,_SRR0(r1)
787 mtsrr0 r9
788 ld r10,_SRR1(r1)
789 mtsrr1 r10
790 793
791 addi r1,r1,RTAS_FRAME_SIZE /* Unstack our frame */ 794 addi r1,r1,RTAS_FRAME_SIZE /* Unstack our frame */
792 ld r0,16(r1) /* get return address */ 795 ld r0,16(r1) /* get return address */
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index 8bb657519299..0c326823c6d4 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -110,6 +110,12 @@ __start:
110#ifdef CONFIG_PPC_MULTIPLATFORM 110#ifdef CONFIG_PPC_MULTIPLATFORM
111 cmpwi 0,r5,0 111 cmpwi 0,r5,0
112 beq 1f 112 beq 1f
113
114 /* find out where we are now */
115 bcl 20,31,$+4
1160: mflr r8 /* r8 = runtime addr here */
117 addis r8,r8,(_stext - 0b)@ha
118 addi r8,r8,(_stext - 0b)@l /* current runtime base addr */
113 bl prom_init 119 bl prom_init
114 trap 120 trap
115#endif 121#endif
@@ -369,13 +375,13 @@ i##n: \
369DataAccess: 375DataAccess:
370 EXCEPTION_PROLOG 376 EXCEPTION_PROLOG
371 mfspr r10,SPRN_DSISR 377 mfspr r10,SPRN_DSISR
378 stw r10,_DSISR(r11)
372 andis. r0,r10,0xa470 /* weird error? */ 379 andis. r0,r10,0xa470 /* weird error? */
373 bne 1f /* if not, try to put a PTE */ 380 bne 1f /* if not, try to put a PTE */
374 mfspr r4,SPRN_DAR /* into the hash table */ 381 mfspr r4,SPRN_DAR /* into the hash table */
375 rlwinm r3,r10,32-15,21,21 /* DSISR_STORE -> _PAGE_RW */ 382 rlwinm r3,r10,32-15,21,21 /* DSISR_STORE -> _PAGE_RW */
376 bl hash_page 383 bl hash_page
3771: stw r10,_DSISR(r11) 3841: lwz r5,_DSISR(r11) /* get DSISR value */
378 mr r5,r10
379 mfspr r4,SPRN_DAR 385 mfspr r4,SPRN_DAR
380 EXC_XFER_EE_LITE(0x300, handle_page_fault) 386 EXC_XFER_EE_LITE(0x300, handle_page_fault)
381 387
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index cc8fb474d520..84856bee33a5 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -82,7 +82,11 @@ END_FTR_SECTION(0, 1)
82 /* Catch branch to 0 in real mode */ 82 /* Catch branch to 0 in real mode */
83 trap 83 trap
84 84
85 /* Secondary processors spin on this value until it goes to 1. */ 85 /* Secondary processors spin on this value until it becomes nonzero.
86 * When it does it contains the real address of the descriptor
87 * of the function that the cpu should jump to to continue
88 * initialization.
89 */
86 .globl __secondary_hold_spinloop 90 .globl __secondary_hold_spinloop
87__secondary_hold_spinloop: 91__secondary_hold_spinloop:
88 .llong 0x0 92 .llong 0x0
@@ -109,8 +113,11 @@ __secondary_hold_acknowledge:
109 * before the bulk of the kernel has been relocated. This code 113 * before the bulk of the kernel has been relocated. This code
110 * is relocated to physical address 0x60 before prom_init is run. 114 * is relocated to physical address 0x60 before prom_init is run.
111 * All of it must fit below the first exception vector at 0x100. 115 * All of it must fit below the first exception vector at 0x100.
116 * Use .globl here not _GLOBAL because we want __secondary_hold
117 * to be the actual text address, not a descriptor.
112 */ 118 */
113_GLOBAL(__secondary_hold) 119 .globl __secondary_hold
120__secondary_hold:
114 mfmsr r24 121 mfmsr r24
115 ori r24,r24,MSR_RI 122 ori r24,r24,MSR_RI
116 mtmsrd r24 /* RI on */ 123 mtmsrd r24 /* RI on */
@@ -121,16 +128,16 @@ _GLOBAL(__secondary_hold)
121 /* Tell the master cpu we're here */ 128 /* Tell the master cpu we're here */
122 /* Relocation is off & we are located at an address less */ 129 /* Relocation is off & we are located at an address less */
123 /* than 0x100, so only need to grab low order offset. */ 130 /* than 0x100, so only need to grab low order offset. */
124 std r24,__secondary_hold_acknowledge@l(0) 131 std r24,__secondary_hold_acknowledge-_stext(0)
125 sync 132 sync
126 133
127 /* All secondary cpus wait here until told to start. */ 134 /* All secondary cpus wait here until told to start. */
128100: ld r4,__secondary_hold_spinloop@l(0) 135100: ld r4,__secondary_hold_spinloop-_stext(0)
129 cmpdi 0,r4,1 136 cmpdi 0,r4,0
130 bne 100b 137 beq 100b
131 138
132#if defined(CONFIG_SMP) || defined(CONFIG_KEXEC) 139#if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
133 LOAD_REG_IMMEDIATE(r4, .generic_secondary_smp_init) 140 ld r4,0(r4) /* deref function descriptor */
134 mtctr r4 141 mtctr r4
135 mr r3,r24 142 mr r3,r24
136 bctr 143 bctr
@@ -147,6 +154,10 @@ exception_marker:
147/* 154/*
148 * This is the start of the interrupt handlers for pSeries 155 * This is the start of the interrupt handlers for pSeries
149 * This code runs with relocation off. 156 * This code runs with relocation off.
157 * Code from here to __end_interrupts gets copied down to real
158 * address 0x100 when we are running a relocatable kernel.
159 * Therefore any relative branches in this section must only
160 * branch to labels in this section.
150 */ 161 */
151 . = 0x100 162 . = 0x100
152 .globl __start_interrupts 163 .globl __start_interrupts
@@ -200,7 +211,20 @@ data_access_slb_pSeries:
200 mfspr r10,SPRN_SPRG1 211 mfspr r10,SPRN_SPRG1
201 std r10,PACA_EXSLB+EX_R13(r13) 212 std r10,PACA_EXSLB+EX_R13(r13)
202 mfspr r12,SPRN_SRR1 /* and SRR1 */ 213 mfspr r12,SPRN_SRR1 /* and SRR1 */
203 b .slb_miss_realmode /* Rel. branch works in real mode */ 214#ifndef CONFIG_RELOCATABLE
215 b .slb_miss_realmode
216#else
217 /*
218 * We can't just use a direct branch to .slb_miss_realmode
219 * because the distance from here to there depends on where
220 * the kernel ends up being put.
221 */
222 mfctr r11
223 ld r10,PACAKBASE(r13)
224 LOAD_HANDLER(r10, .slb_miss_realmode)
225 mtctr r10
226 bctr
227#endif
204 228
205 STD_EXCEPTION_PSERIES(0x400, instruction_access) 229 STD_EXCEPTION_PSERIES(0x400, instruction_access)
206 230
@@ -225,7 +249,15 @@ instruction_access_slb_pSeries:
225 mfspr r10,SPRN_SPRG1 249 mfspr r10,SPRN_SPRG1
226 std r10,PACA_EXSLB+EX_R13(r13) 250 std r10,PACA_EXSLB+EX_R13(r13)
227 mfspr r12,SPRN_SRR1 /* and SRR1 */ 251 mfspr r12,SPRN_SRR1 /* and SRR1 */
228 b .slb_miss_realmode /* Rel. branch works in real mode */ 252#ifndef CONFIG_RELOCATABLE
253 b .slb_miss_realmode
254#else
255 mfctr r11
256 ld r10,PACAKBASE(r13)
257 LOAD_HANDLER(r10, .slb_miss_realmode)
258 mtctr r10
259 bctr
260#endif
229 261
230 MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt) 262 MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt)
231 STD_EXCEPTION_PSERIES(0x600, alignment) 263 STD_EXCEPTION_PSERIES(0x600, alignment)
@@ -244,14 +276,12 @@ BEGIN_FTR_SECTION
244 beq- 1f 276 beq- 1f
245END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) 277END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE)
246 mr r9,r13 278 mr r9,r13
247 mfmsr r10
248 mfspr r13,SPRN_SPRG3 279 mfspr r13,SPRN_SPRG3
249 mfspr r11,SPRN_SRR0 280 mfspr r11,SPRN_SRR0
250 clrrdi r12,r13,32 281 ld r12,PACAKBASE(r13)
251 oris r12,r12,system_call_common@h 282 ld r10,PACAKMSR(r13)
252 ori r12,r12,system_call_common@l 283 LOAD_HANDLER(r12, system_call_entry)
253 mtspr SPRN_SRR0,r12 284 mtspr SPRN_SRR0,r12
254 ori r10,r10,MSR_IR|MSR_DR|MSR_RI
255 mfspr r12,SPRN_SRR1 285 mfspr r12,SPRN_SRR1
256 mtspr SPRN_SRR1,r10 286 mtspr SPRN_SRR1,r10
257 rfid 287 rfid
@@ -325,16 +355,32 @@ do_stab_bolted_pSeries:
325 mfspr r12,SPRN_SPRG2 355 mfspr r12,SPRN_SPRG2
326 EXCEPTION_PROLOG_PSERIES(PACA_EXSLB, .do_stab_bolted) 356 EXCEPTION_PROLOG_PSERIES(PACA_EXSLB, .do_stab_bolted)
327 357
358#ifdef CONFIG_PPC_PSERIES
359/*
360 * Vectors for the FWNMI option. Share common code.
361 */
362 .globl system_reset_fwnmi
363 .align 7
364system_reset_fwnmi:
365 HMT_MEDIUM
366 mtspr SPRN_SPRG1,r13 /* save r13 */
367 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common)
368
369 .globl machine_check_fwnmi
370 .align 7
371machine_check_fwnmi:
372 HMT_MEDIUM
373 mtspr SPRN_SPRG1,r13 /* save r13 */
374 EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common)
375
376#endif /* CONFIG_PPC_PSERIES */
377
378#ifdef __DISABLED__
328/* 379/*
329 * We have some room here we use that to put
330 * the peries slb miss user trampoline code so it's reasonably
331 * away from slb_miss_user_common to avoid problems with rfid
332 *
333 * This is used for when the SLB miss handler has to go virtual, 380 * This is used for when the SLB miss handler has to go virtual,
334 * which doesn't happen for now anymore but will once we re-implement 381 * which doesn't happen for now anymore but will once we re-implement
335 * dynamic VSIDs for shared page tables 382 * dynamic VSIDs for shared page tables
336 */ 383 */
337#ifdef __DISABLED__
338slb_miss_user_pseries: 384slb_miss_user_pseries:
339 std r10,PACA_EXGEN+EX_R10(r13) 385 std r10,PACA_EXGEN+EX_R10(r13)
340 std r11,PACA_EXGEN+EX_R11(r13) 386 std r11,PACA_EXGEN+EX_R11(r13)
@@ -357,25 +403,17 @@ slb_miss_user_pseries:
357 b . /* prevent spec. execution */ 403 b . /* prevent spec. execution */
358#endif /* __DISABLED__ */ 404#endif /* __DISABLED__ */
359 405
360#ifdef CONFIG_PPC_PSERIES 406 .align 7
407 .globl __end_interrupts
408__end_interrupts:
409
361/* 410/*
362 * Vectors for the FWNMI option. Share common code. 411 * Code from here down to __end_handlers is invoked from the
412 * exception prologs above. Because the prologs assemble the
413 * addresses of these handlers using the LOAD_HANDLER macro,
414 * which uses an addi instruction, these handlers must be in
415 * the first 32k of the kernel image.
363 */ 416 */
364 .globl system_reset_fwnmi
365 .align 7
366system_reset_fwnmi:
367 HMT_MEDIUM
368 mtspr SPRN_SPRG1,r13 /* save r13 */
369 EXCEPTION_PROLOG_PSERIES_FORCE_64BIT(PACA_EXGEN, system_reset_common)
370
371 .globl machine_check_fwnmi
372 .align 7
373machine_check_fwnmi:
374 HMT_MEDIUM
375 mtspr SPRN_SPRG1,r13 /* save r13 */
376 EXCEPTION_PROLOG_PSERIES_FORCE_64BIT(PACA_EXMC, machine_check_common)
377
378#endif /* CONFIG_PPC_PSERIES */
379 417
380/*** Common interrupt handlers ***/ 418/*** Common interrupt handlers ***/
381 419
@@ -414,6 +452,10 @@ machine_check_common:
414 STD_EXCEPTION_COMMON(0x1800, cbe_thermal, .cbe_thermal_exception) 452 STD_EXCEPTION_COMMON(0x1800, cbe_thermal, .cbe_thermal_exception)
415#endif /* CONFIG_CBE_RAS */ 453#endif /* CONFIG_CBE_RAS */
416 454
455 .align 7
456system_call_entry:
457 b system_call_common
458
417/* 459/*
418 * Here we have detected that the kernel stack pointer is bad. 460 * Here we have detected that the kernel stack pointer is bad.
419 * R9 contains the saved CR, r13 points to the paca, 461 * R9 contains the saved CR, r13 points to the paca,
@@ -457,65 +499,6 @@ bad_stack:
457 b 1b 499 b 1b
458 500
459/* 501/*
460 * Return from an exception with minimal checks.
461 * The caller is assumed to have done EXCEPTION_PROLOG_COMMON.
462 * If interrupts have been enabled, or anything has been
463 * done that might have changed the scheduling status of
464 * any task or sent any task a signal, you should use
465 * ret_from_except or ret_from_except_lite instead of this.
466 */
467fast_exc_return_irq: /* restores irq state too */
468 ld r3,SOFTE(r1)
469 TRACE_AND_RESTORE_IRQ(r3);
470 ld r12,_MSR(r1)
471 rldicl r4,r12,49,63 /* get MSR_EE to LSB */
472 stb r4,PACAHARDIRQEN(r13) /* restore paca->hard_enabled */
473 b 1f
474
475 .globl fast_exception_return
476fast_exception_return:
477 ld r12,_MSR(r1)
4781: ld r11,_NIP(r1)
479 andi. r3,r12,MSR_RI /* check if RI is set */
480 beq- unrecov_fer
481
482#ifdef CONFIG_VIRT_CPU_ACCOUNTING
483 andi. r3,r12,MSR_PR
484 beq 2f
485 ACCOUNT_CPU_USER_EXIT(r3, r4)
4862:
487#endif
488
489 ld r3,_CCR(r1)
490 ld r4,_LINK(r1)
491 ld r5,_CTR(r1)
492 ld r6,_XER(r1)
493 mtcr r3
494 mtlr r4
495 mtctr r5
496 mtxer r6
497 REST_GPR(0, r1)
498 REST_8GPRS(2, r1)
499
500 mfmsr r10
501 rldicl r10,r10,48,1 /* clear EE */
502 rldicr r10,r10,16,61 /* clear RI (LE is 0 already) */
503 mtmsrd r10,1
504
505 mtspr SPRN_SRR1,r12
506 mtspr SPRN_SRR0,r11
507 REST_4GPRS(10, r1)
508 ld r1,GPR1(r1)
509 rfid
510 b . /* prevent speculative execution */
511
512unrecov_fer:
513 bl .save_nvgprs
5141: addi r3,r1,STACK_FRAME_OVERHEAD
515 bl .unrecoverable_exception
516 b 1b
517
518/*
519 * Here r13 points to the paca, r9 contains the saved CR, 502 * Here r13 points to the paca, r9 contains the saved CR,
520 * SRR0 and SRR1 are saved in r11 and r12, 503 * SRR0 and SRR1 are saved in r11 and r12,
521 * r9 - r13 are saved in paca->exgen. 504 * r9 - r13 are saved in paca->exgen.
@@ -616,6 +599,9 @@ unrecov_user_slb:
616 */ 599 */
617_GLOBAL(slb_miss_realmode) 600_GLOBAL(slb_miss_realmode)
618 mflr r10 601 mflr r10
602#ifdef CONFIG_RELOCATABLE
603 mtctr r11
604#endif
619 605
620 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */ 606 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
621 std r10,PACA_EXSLB+EX_LR(r13) /* save LR */ 607 std r10,PACA_EXSLB+EX_LR(r13) /* save LR */
@@ -666,11 +652,10 @@ BEGIN_FW_FTR_SECTION
666END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES) 652END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
667#endif /* CONFIG_PPC_ISERIES */ 653#endif /* CONFIG_PPC_ISERIES */
668 mfspr r11,SPRN_SRR0 654 mfspr r11,SPRN_SRR0
669 clrrdi r10,r13,32 655 ld r10,PACAKBASE(r13)
670 LOAD_HANDLER(r10,unrecov_slb) 656 LOAD_HANDLER(r10,unrecov_slb)
671 mtspr SPRN_SRR0,r10 657 mtspr SPRN_SRR0,r10
672 mfmsr r10 658 ld r10,PACAKMSR(r13)
673 ori r10,r10,MSR_IR|MSR_DR|MSR_RI
674 mtspr SPRN_SRR1,r10 659 mtspr SPRN_SRR1,r10
675 rfid 660 rfid
676 b . 661 b .
@@ -766,6 +751,85 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
766 bl .altivec_unavailable_exception 751 bl .altivec_unavailable_exception
767 b .ret_from_except 752 b .ret_from_except
768 753
754 .align 7
755 .globl vsx_unavailable_common
756vsx_unavailable_common:
757 EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN)
758#ifdef CONFIG_VSX
759BEGIN_FTR_SECTION
760 bne .load_up_vsx
7611:
762END_FTR_SECTION_IFSET(CPU_FTR_VSX)
763#endif
764 bl .save_nvgprs
765 addi r3,r1,STACK_FRAME_OVERHEAD
766 ENABLE_INTS
767 bl .vsx_unavailable_exception
768 b .ret_from_except
769
770 .align 7
771 .globl __end_handlers
772__end_handlers:
773
774/*
775 * Return from an exception with minimal checks.
776 * The caller is assumed to have done EXCEPTION_PROLOG_COMMON.
777 * If interrupts have been enabled, or anything has been
778 * done that might have changed the scheduling status of
779 * any task or sent any task a signal, you should use
780 * ret_from_except or ret_from_except_lite instead of this.
781 */
782fast_exc_return_irq: /* restores irq state too */
783 ld r3,SOFTE(r1)
784 TRACE_AND_RESTORE_IRQ(r3);
785 ld r12,_MSR(r1)
786 rldicl r4,r12,49,63 /* get MSR_EE to LSB */
787 stb r4,PACAHARDIRQEN(r13) /* restore paca->hard_enabled */
788 b 1f
789
790 .globl fast_exception_return
791fast_exception_return:
792 ld r12,_MSR(r1)
7931: ld r11,_NIP(r1)
794 andi. r3,r12,MSR_RI /* check if RI is set */
795 beq- unrecov_fer
796
797#ifdef CONFIG_VIRT_CPU_ACCOUNTING
798 andi. r3,r12,MSR_PR
799 beq 2f
800 ACCOUNT_CPU_USER_EXIT(r3, r4)
8012:
802#endif
803
804 ld r3,_CCR(r1)
805 ld r4,_LINK(r1)
806 ld r5,_CTR(r1)
807 ld r6,_XER(r1)
808 mtcr r3
809 mtlr r4
810 mtctr r5
811 mtxer r6
812 REST_GPR(0, r1)
813 REST_8GPRS(2, r1)
814
815 mfmsr r10
816 rldicl r10,r10,48,1 /* clear EE */
817 rldicr r10,r10,16,61 /* clear RI (LE is 0 already) */
818 mtmsrd r10,1
819
820 mtspr SPRN_SRR1,r12
821 mtspr SPRN_SRR0,r11
822 REST_4GPRS(10, r1)
823 ld r1,GPR1(r1)
824 rfid
825 b . /* prevent speculative execution */
826
827unrecov_fer:
828 bl .save_nvgprs
8291: addi r3,r1,STACK_FRAME_OVERHEAD
830 bl .unrecoverable_exception
831 b 1b
832
769#ifdef CONFIG_ALTIVEC 833#ifdef CONFIG_ALTIVEC
770/* 834/*
771 * load_up_altivec(unused, unused, tsk) 835 * load_up_altivec(unused, unused, tsk)
@@ -840,22 +904,6 @@ _STATIC(load_up_altivec)
840 blr 904 blr
841#endif /* CONFIG_ALTIVEC */ 905#endif /* CONFIG_ALTIVEC */
842 906
843 .align 7
844 .globl vsx_unavailable_common
845vsx_unavailable_common:
846 EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN)
847#ifdef CONFIG_VSX
848BEGIN_FTR_SECTION
849 bne .load_up_vsx
8501:
851END_FTR_SECTION_IFSET(CPU_FTR_VSX)
852#endif
853 bl .save_nvgprs
854 addi r3,r1,STACK_FRAME_OVERHEAD
855 ENABLE_INTS
856 bl .vsx_unavailable_exception
857 b .ret_from_except
858
859#ifdef CONFIG_VSX 907#ifdef CONFIG_VSX
860/* 908/*
861 * load_up_vsx(unused, unused, tsk) 909 * load_up_vsx(unused, unused, tsk)
@@ -1175,11 +1223,14 @@ _GLOBAL(generic_secondary_smp_init)
1175 /* turn on 64-bit mode */ 1223 /* turn on 64-bit mode */
1176 bl .enable_64b_mode 1224 bl .enable_64b_mode
1177 1225
1226 /* get the TOC pointer (real address) */
1227 bl .relative_toc
1228
1178 /* Set up a paca value for this processor. Since we have the 1229 /* Set up a paca value for this processor. Since we have the
1179 * physical cpu id in r24, we need to search the pacas to find 1230 * physical cpu id in r24, we need to search the pacas to find
1180 * which logical id maps to our physical one. 1231 * which logical id maps to our physical one.
1181 */ 1232 */
1182 LOAD_REG_IMMEDIATE(r13, paca) /* Get base vaddr of paca array */ 1233 LOAD_REG_ADDR(r13, paca) /* Get base vaddr of paca array */
1183 li r5,0 /* logical cpu id */ 1234 li r5,0 /* logical cpu id */
11841: lhz r6,PACAHWCPUID(r13) /* Load HW procid from paca */ 12351: lhz r6,PACAHWCPUID(r13) /* Load HW procid from paca */
1185 cmpw r6,r24 /* Compare to our id */ 1236 cmpw r6,r24 /* Compare to our id */
@@ -1208,7 +1259,7 @@ _GLOBAL(generic_secondary_smp_init)
1208 sync /* order paca.run and cur_cpu_spec */ 1259 sync /* order paca.run and cur_cpu_spec */
1209 1260
1210 /* See if we need to call a cpu state restore handler */ 1261 /* See if we need to call a cpu state restore handler */
1211 LOAD_REG_IMMEDIATE(r23, cur_cpu_spec) 1262 LOAD_REG_ADDR(r23, cur_cpu_spec)
1212 ld r23,0(r23) 1263 ld r23,0(r23)
1213 ld r23,CPU_SPEC_RESTORE(r23) 1264 ld r23,CPU_SPEC_RESTORE(r23)
1214 cmpdi 0,r23,0 1265 cmpdi 0,r23,0
@@ -1224,10 +1275,15 @@ _GLOBAL(generic_secondary_smp_init)
1224 b __secondary_start 1275 b __secondary_start
1225#endif 1276#endif
1226 1277
1278/*
1279 * Turn the MMU off.
1280 * Assumes we're mapped EA == RA if the MMU is on.
1281 */
1227_STATIC(__mmu_off) 1282_STATIC(__mmu_off)
1228 mfmsr r3 1283 mfmsr r3
1229 andi. r0,r3,MSR_IR|MSR_DR 1284 andi. r0,r3,MSR_IR|MSR_DR
1230 beqlr 1285 beqlr
1286 mflr r4
1231 andc r3,r3,r0 1287 andc r3,r3,r0
1232 mtspr SPRN_SRR0,r4 1288 mtspr SPRN_SRR0,r4
1233 mtspr SPRN_SRR1,r3 1289 mtspr SPRN_SRR1,r3
@@ -1248,6 +1304,18 @@ _STATIC(__mmu_off)
1248 * 1304 *
1249 */ 1305 */
1250_GLOBAL(__start_initialization_multiplatform) 1306_GLOBAL(__start_initialization_multiplatform)
1307 /* Make sure we are running in 64 bits mode */
1308 bl .enable_64b_mode
1309
1310 /* Get TOC pointer (current runtime address) */
1311 bl .relative_toc
1312
1313 /* find out where we are now */
1314 bcl 20,31,$+4
13150: mflr r26 /* r26 = runtime addr here */
1316 addis r26,r26,(_stext - 0b)@ha
1317 addi r26,r26,(_stext - 0b)@l /* current runtime base addr */
1318
1251 /* 1319 /*
1252 * Are we booted from a PROM Of-type client-interface ? 1320 * Are we booted from a PROM Of-type client-interface ?
1253 */ 1321 */
@@ -1259,9 +1327,6 @@ _GLOBAL(__start_initialization_multiplatform)
1259 mr r31,r3 1327 mr r31,r3
1260 mr r30,r4 1328 mr r30,r4
1261 1329
1262 /* Make sure we are running in 64 bits mode */
1263 bl .enable_64b_mode
1264
1265 /* Setup some critical 970 SPRs before switching MMU off */ 1330 /* Setup some critical 970 SPRs before switching MMU off */
1266 mfspr r0,SPRN_PVR 1331 mfspr r0,SPRN_PVR
1267 srwi r0,r0,16 1332 srwi r0,r0,16
@@ -1276,9 +1341,7 @@ _GLOBAL(__start_initialization_multiplatform)
12761: bl .__cpu_preinit_ppc970 13411: bl .__cpu_preinit_ppc970
12772: 13422:
1278 1343
1279 /* Switch off MMU if not already */ 1344 /* Switch off MMU if not already off */
1280 LOAD_REG_IMMEDIATE(r4, .__after_prom_start - KERNELBASE)
1281 add r4,r4,r30
1282 bl .__mmu_off 1345 bl .__mmu_off
1283 b .__after_prom_start 1346 b .__after_prom_start
1284 1347
@@ -1293,22 +1356,15 @@ _INIT_STATIC(__boot_from_prom)
1293 /* 1356 /*
1294 * Align the stack to 16-byte boundary 1357 * Align the stack to 16-byte boundary
1295 * Depending on the size and layout of the ELF sections in the initial 1358 * Depending on the size and layout of the ELF sections in the initial
1296 * boot binary, the stack pointer will be unalignet on PowerMac 1359 * boot binary, the stack pointer may be unaligned on PowerMac
1297 */ 1360 */
1298 rldicr r1,r1,0,59 1361 rldicr r1,r1,0,59
1299 1362
1300 /* Make sure we are running in 64 bits mode */ 1363#ifdef CONFIG_RELOCATABLE
1301 bl .enable_64b_mode 1364 /* Relocate code for where we are now */
1302 1365 mr r3,r26
1303 /* put a relocation offset into r3 */ 1366 bl .relocate
1304 bl .reloc_offset 1367#endif
1305
1306 LOAD_REG_IMMEDIATE(r2,__toc_start)
1307 addi r2,r2,0x4000
1308 addi r2,r2,0x4000
1309
1310 /* Relocate the TOC from a virt addr to a real addr */
1311 add r2,r2,r3
1312 1368
1313 /* Restore parameters */ 1369 /* Restore parameters */
1314 mr r3,r31 1370 mr r3,r31
@@ -1318,60 +1374,51 @@ _INIT_STATIC(__boot_from_prom)
1318 mr r7,r27 1374 mr r7,r27
1319 1375
1320 /* Do all of the interaction with OF client interface */ 1376 /* Do all of the interaction with OF client interface */
1377 mr r8,r26
1321 bl .prom_init 1378 bl .prom_init
1322 /* We never return */ 1379 /* We never return */
1323 trap 1380 trap
1324 1381
1325_STATIC(__after_prom_start) 1382_STATIC(__after_prom_start)
1383#ifdef CONFIG_RELOCATABLE
1384 /* process relocations for the final address of the kernel */
1385 lis r25,PAGE_OFFSET@highest /* compute virtual base of kernel */
1386 sldi r25,r25,32
1387 mr r3,r25
1388 bl .relocate
1389#endif
1326 1390
1327/* 1391/*
1328 * We need to run with __start at physical address PHYSICAL_START. 1392 * We need to run with _stext at physical address PHYSICAL_START.
1329 * This will leave some code in the first 256B of 1393 * This will leave some code in the first 256B of
1330 * real memory, which are reserved for software use. 1394 * real memory, which are reserved for software use.
1331 * The remainder of the first page is loaded with the fixed
1332 * interrupt vectors. The next two pages are filled with
1333 * unknown exception placeholders.
1334 * 1395 *
1335 * Note: This process overwrites the OF exception vectors. 1396 * Note: This process overwrites the OF exception vectors.
1336 * r26 == relocation offset
1337 * r27 == KERNELBASE
1338 */ 1397 */
1339 bl .reloc_offset 1398 li r3,0 /* target addr */
1340 mr r26,r3 1399 mr. r4,r26 /* In some cases the loader may */
1341 LOAD_REG_IMMEDIATE(r27, KERNELBASE) 1400 beq 9f /* have already put us at zero */
1342 1401 lis r5,(copy_to_here - _stext)@ha
1343 LOAD_REG_IMMEDIATE(r3, PHYSICAL_START) /* target addr */ 1402 addi r5,r5,(copy_to_here - _stext)@l /* # bytes of memory to copy */
1344
1345 // XXX FIXME: Use phys returned by OF (r30)
1346 add r4,r27,r26 /* source addr */
1347 /* current address of _start */
1348 /* i.e. where we are running */
1349 /* the source addr */
1350
1351 cmpdi r4,0 /* In some cases the loader may */
1352 bne 1f
1353 b .start_here_multiplatform /* have already put us at zero */
1354 /* so we can skip the copy. */
13551: LOAD_REG_IMMEDIATE(r5,copy_to_here) /* # bytes of memory to copy */
1356 sub r5,r5,r27
1357
1358 li r6,0x100 /* Start offset, the first 0x100 */ 1403 li r6,0x100 /* Start offset, the first 0x100 */
1359 /* bytes were copied earlier. */ 1404 /* bytes were copied earlier. */
1360 1405
1361 bl .copy_and_flush /* copy the first n bytes */ 1406 bl .copy_and_flush /* copy the first n bytes */
1362 /* this includes the code being */ 1407 /* this includes the code being */
1363 /* executed here. */ 1408 /* executed here. */
1364 1409 addis r8,r3,(4f - _stext)@ha /* Jump to the copy of this code */
1365 LOAD_REG_IMMEDIATE(r0, 4f) /* Jump to the copy of this code */ 1410 addi r8,r8,(4f - _stext)@l /* that we just made */
1366 mtctr r0 /* that we just made/relocated */ 1411 mtctr r8
1367 bctr 1412 bctr
1368 1413
13694: LOAD_REG_IMMEDIATE(r5,klimit) 14144: /* Now copy the rest of the kernel up to _end */
1370 add r5,r5,r26 1415 addis r5,r26,(p_end - _stext)@ha
1371 ld r5,0(r5) /* get the value of klimit */ 1416 ld r5,(p_end - _stext)@l(r5) /* get _end */
1372 sub r5,r5,r27
1373 bl .copy_and_flush /* copy the rest */ 1417 bl .copy_and_flush /* copy the rest */
1374 b .start_here_multiplatform 1418
14199: b .start_here_multiplatform
1420
1421p_end: .llong _end - _stext
1375 1422
1376/* 1423/*
1377 * Copy routine used to copy the kernel to start at physical address 0 1424 * Copy routine used to copy the kernel to start at physical address 0
@@ -1436,6 +1483,9 @@ _GLOBAL(pmac_secondary_start)
1436 /* turn on 64-bit mode */ 1483 /* turn on 64-bit mode */
1437 bl .enable_64b_mode 1484 bl .enable_64b_mode
1438 1485
1486 /* get TOC pointer (real address) */
1487 bl .relative_toc
1488
1439 /* Copy some CPU settings from CPU 0 */ 1489 /* Copy some CPU settings from CPU 0 */
1440 bl .__restore_cpu_ppc970 1490 bl .__restore_cpu_ppc970
1441 1491
@@ -1445,10 +1495,10 @@ _GLOBAL(pmac_secondary_start)
1445 mtmsrd r3 /* RI on */ 1495 mtmsrd r3 /* RI on */
1446 1496
1447 /* Set up a paca value for this processor. */ 1497 /* Set up a paca value for this processor. */
1448 LOAD_REG_IMMEDIATE(r4, paca) /* Get base vaddr of paca array */ 1498 LOAD_REG_ADDR(r4,paca) /* Get base vaddr of paca array */
1449 mulli r13,r24,PACA_SIZE /* Calculate vaddr of right paca */ 1499 mulli r13,r24,PACA_SIZE /* Calculate vaddr of right paca */
1450 add r13,r13,r4 /* for this processor. */ 1500 add r13,r13,r4 /* for this processor. */
1451 mtspr SPRN_SPRG3,r13 /* Save vaddr of paca in SPRG3 */ 1501 mtspr SPRN_SPRG3,r13 /* Save vaddr of paca in SPRG3 */
1452 1502
1453 /* Create a temp kernel stack for use before relocation is on. */ 1503 /* Create a temp kernel stack for use before relocation is on. */
1454 ld r1,PACAEMERGSP(r13) 1504 ld r1,PACAEMERGSP(r13)
@@ -1476,9 +1526,6 @@ __secondary_start:
1476 /* Set thread priority to MEDIUM */ 1526 /* Set thread priority to MEDIUM */
1477 HMT_MEDIUM 1527 HMT_MEDIUM
1478 1528
1479 /* Load TOC */
1480 ld r2,PACATOC(r13)
1481
1482 /* Do early setup for that CPU (stab, slb, hash table pointer) */ 1529 /* Do early setup for that CPU (stab, slb, hash table pointer) */
1483 bl .early_setup_secondary 1530 bl .early_setup_secondary
1484 1531
@@ -1515,9 +1562,11 @@ END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES)
1515 1562
1516/* 1563/*
1517 * Running with relocation on at this point. All we want to do is 1564 * Running with relocation on at this point. All we want to do is
1518 * zero the stack back-chain pointer before going into C code. 1565 * zero the stack back-chain pointer and get the TOC virtual address
1566 * before going into C code.
1519 */ 1567 */
1520_GLOBAL(start_secondary_prolog) 1568_GLOBAL(start_secondary_prolog)
1569 ld r2,PACATOC(r13)
1521 li r3,0 1570 li r3,0
1522 std r3,0(r1) /* Zero the stack frame pointer */ 1571 std r3,0(r1) /* Zero the stack frame pointer */
1523 bl .start_secondary 1572 bl .start_secondary
@@ -1529,34 +1578,46 @@ _GLOBAL(start_secondary_prolog)
1529 */ 1578 */
1530_GLOBAL(enable_64b_mode) 1579_GLOBAL(enable_64b_mode)
1531 mfmsr r11 /* grab the current MSR */ 1580 mfmsr r11 /* grab the current MSR */
1532 li r12,1 1581 li r12,(MSR_SF | MSR_ISF)@highest
1533 rldicr r12,r12,MSR_SF_LG,(63-MSR_SF_LG) 1582 sldi r12,r12,48
1534 or r11,r11,r12
1535 li r12,1
1536 rldicr r12,r12,MSR_ISF_LG,(63-MSR_ISF_LG)
1537 or r11,r11,r12 1583 or r11,r11,r12
1538 mtmsrd r11 1584 mtmsrd r11
1539 isync 1585 isync
1540 blr 1586 blr
1541 1587
1542/* 1588/*
1589 * This puts the TOC pointer into r2, offset by 0x8000 (as expected
1590 * by the toolchain). It computes the correct value for wherever we
1591 * are running at the moment, using position-independent code.
1592 */
1593_GLOBAL(relative_toc)
1594 mflr r0
1595 bcl 20,31,$+4
15960: mflr r9
1597 ld r2,(p_toc - 0b)(r9)
1598 add r2,r2,r9
1599 mtlr r0
1600 blr
1601
1602p_toc: .llong __toc_start + 0x8000 - 0b
1603
1604/*
1543 * This is where the main kernel code starts. 1605 * This is where the main kernel code starts.
1544 */ 1606 */
1545_INIT_STATIC(start_here_multiplatform) 1607_INIT_STATIC(start_here_multiplatform)
1546 /* get a new offset, now that the kernel has moved. */ 1608 /* set up the TOC (real address) */
1547 bl .reloc_offset 1609 bl .relative_toc
1548 mr r26,r3
1549 1610
1550 /* Clear out the BSS. It may have been done in prom_init, 1611 /* Clear out the BSS. It may have been done in prom_init,
1551 * already but that's irrelevant since prom_init will soon 1612 * already but that's irrelevant since prom_init will soon
1552 * be detached from the kernel completely. Besides, we need 1613 * be detached from the kernel completely. Besides, we need
1553 * to clear it now for kexec-style entry. 1614 * to clear it now for kexec-style entry.
1554 */ 1615 */
1555 LOAD_REG_IMMEDIATE(r11,__bss_stop) 1616 LOAD_REG_ADDR(r11,__bss_stop)
1556 LOAD_REG_IMMEDIATE(r8,__bss_start) 1617 LOAD_REG_ADDR(r8,__bss_start)
1557 sub r11,r11,r8 /* bss size */ 1618 sub r11,r11,r8 /* bss size */
1558 addi r11,r11,7 /* round up to an even double word */ 1619 addi r11,r11,7 /* round up to an even double word */
1559 rldicl. r11,r11,61,3 /* shift right by 3 */ 1620 srdi. r11,r11,3 /* shift right by 3 */
1560 beq 4f 1621 beq 4f
1561 addi r8,r8,-8 1622 addi r8,r8,-8
1562 li r0,0 1623 li r0,0
@@ -1569,35 +1630,35 @@ _INIT_STATIC(start_here_multiplatform)
1569 ori r6,r6,MSR_RI 1630 ori r6,r6,MSR_RI
1570 mtmsrd r6 /* RI on */ 1631 mtmsrd r6 /* RI on */
1571 1632
1572 /* The following gets the stack and TOC set up with the regs */ 1633#ifdef CONFIG_RELOCATABLE
1634 /* Save the physical address we're running at in kernstart_addr */
1635 LOAD_REG_ADDR(r4, kernstart_addr)
1636 clrldi r0,r25,2
1637 std r0,0(r4)
1638#endif
1639
1640 /* The following gets the stack set up with the regs */
1573 /* pointing to the real addr of the kernel stack. This is */ 1641 /* pointing to the real addr of the kernel stack. This is */
1574 /* all done to support the C function call below which sets */ 1642 /* all done to support the C function call below which sets */
1575 /* up the htab. This is done because we have relocated the */ 1643 /* up the htab. This is done because we have relocated the */
1576 /* kernel but are still running in real mode. */ 1644 /* kernel but are still running in real mode. */
1577 1645
1578 LOAD_REG_IMMEDIATE(r3,init_thread_union) 1646 LOAD_REG_ADDR(r3,init_thread_union)
1579 add r3,r3,r26
1580 1647
1581 /* set up a stack pointer (physical address) */ 1648 /* set up a stack pointer */
1582 addi r1,r3,THREAD_SIZE 1649 addi r1,r3,THREAD_SIZE
1583 li r0,0 1650 li r0,0
1584 stdu r0,-STACK_FRAME_OVERHEAD(r1) 1651 stdu r0,-STACK_FRAME_OVERHEAD(r1)
1585 1652
1586 /* set up the TOC (physical address) */
1587 LOAD_REG_IMMEDIATE(r2,__toc_start)
1588 addi r2,r2,0x4000
1589 addi r2,r2,0x4000
1590 add r2,r2,r26
1591
1592 /* Do very early kernel initializations, including initial hash table, 1653 /* Do very early kernel initializations, including initial hash table,
1593 * stab and slb setup before we turn on relocation. */ 1654 * stab and slb setup before we turn on relocation. */
1594 1655
1595 /* Restore parameters passed from prom_init/kexec */ 1656 /* Restore parameters passed from prom_init/kexec */
1596 mr r3,r31 1657 mr r3,r31
1597 bl .early_setup 1658 bl .early_setup /* also sets r13 and SPRG3 */
1598 1659
1599 LOAD_REG_IMMEDIATE(r3, .start_here_common) 1660 LOAD_REG_ADDR(r3, .start_here_common)
1600 LOAD_REG_IMMEDIATE(r4, MSR_KERNEL) 1661 ld r4,PACAKMSR(r13)
1601 mtspr SPRN_SRR0,r3 1662 mtspr SPRN_SRR0,r3
1602 mtspr SPRN_SRR1,r4 1663 mtspr SPRN_SRR1,r4
1603 rfid 1664 rfid
@@ -1606,20 +1667,10 @@ _INIT_STATIC(start_here_multiplatform)
1606 /* This is where all platforms converge execution */ 1667 /* This is where all platforms converge execution */
1607_INIT_GLOBAL(start_here_common) 1668_INIT_GLOBAL(start_here_common)
1608 /* relocation is on at this point */ 1669 /* relocation is on at this point */
1670 std r1,PACAKSAVE(r13)
1609 1671
1610 /* The following code sets up the SP and TOC now that we are */ 1672 /* Load the TOC (virtual address) */
1611 /* running with translation enabled. */
1612
1613 LOAD_REG_IMMEDIATE(r3,init_thread_union)
1614
1615 /* set up the stack */
1616 addi r1,r3,THREAD_SIZE
1617 li r0,0
1618 stdu r0,-STACK_FRAME_OVERHEAD(r1)
1619
1620 /* Load the TOC */
1621 ld r2,PACATOC(r13) 1673 ld r2,PACATOC(r13)
1622 std r1,PACAKSAVE(r13)
1623 1674
1624 bl .setup_system 1675 bl .setup_system
1625 1676
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index 3cb52fa0eda3..590304c24dad 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -422,7 +422,6 @@ skpinv: addi r6,r6,1 /* Increment */
422 * r12 is pointer to the pte 422 * r12 is pointer to the pte
423 */ 423 */
424#ifdef CONFIG_PTE_64BIT 424#ifdef CONFIG_PTE_64BIT
425#define PTE_FLAGS_OFFSET 4
426#define FIND_PTE \ 425#define FIND_PTE \
427 rlwinm r12, r10, 13, 19, 29; /* Compute pgdir/pmd offset */ \ 426 rlwinm r12, r10, 13, 19, 29; /* Compute pgdir/pmd offset */ \
428 lwzx r11, r12, r11; /* Get pgd/pmd entry */ \ 427 lwzx r11, r12, r11; /* Get pgd/pmd entry */ \
@@ -431,7 +430,6 @@ skpinv: addi r6,r6,1 /* Increment */
431 rlwimi r12, r10, 23, 20, 28; /* Compute pte address */ \ 430 rlwimi r12, r10, 23, 20, 28; /* Compute pte address */ \
432 lwz r11, 4(r12); /* Get pte entry */ 431 lwz r11, 4(r12); /* Get pte entry */
433#else 432#else
434#define PTE_FLAGS_OFFSET 0
435#define FIND_PTE \ 433#define FIND_PTE \
436 rlwimi r11, r10, 12, 20, 29; /* Create L1 (pgdir/pmd) address */ \ 434 rlwimi r11, r10, 12, 20, 29; /* Create L1 (pgdir/pmd) address */ \
437 lwz r11, 0(r11); /* Get L1 entry */ \ 435 lwz r11, 0(r11); /* Get L1 entry */ \
@@ -579,13 +577,19 @@ interrupt_base:
579 577
580 FIND_PTE 578 FIND_PTE
581 andc. r13,r13,r11 /* Check permission */ 579 andc. r13,r13,r11 /* Check permission */
582 bne 2f /* Bail if permission mismach */
583 580
584#ifdef CONFIG_PTE_64BIT 581#ifdef CONFIG_PTE_64BIT
585 lwz r13, 0(r12) 582#ifdef CONFIG_SMP
583 subf r10,r11,r12 /* create false data dep */
584 lwzx r13,r11,r10 /* Get upper pte bits */
585#else
586 lwz r13,0(r12) /* Get upper pte bits */
587#endif
586#endif 588#endif
587 589
588 /* Jump to common tlb load */ 590 bne 2f /* Bail if permission/valid mismach */
591
592 /* Jump to common tlb load */
589 b finish_tlb_load 593 b finish_tlb_load
5902: 5942:
591 /* The bailout. Restore registers to pre-exception conditions 595 /* The bailout. Restore registers to pre-exception conditions
@@ -640,12 +644,18 @@ interrupt_base:
640 644
641 FIND_PTE 645 FIND_PTE
642 andc. r13,r13,r11 /* Check permission */ 646 andc. r13,r13,r11 /* Check permission */
643 bne 2f /* Bail if permission mismach */
644 647
645#ifdef CONFIG_PTE_64BIT 648#ifdef CONFIG_PTE_64BIT
646 lwz r13, 0(r12) 649#ifdef CONFIG_SMP
650 subf r10,r11,r12 /* create false data dep */
651 lwzx r13,r11,r10 /* Get upper pte bits */
652#else
653 lwz r13,0(r12) /* Get upper pte bits */
654#endif
647#endif 655#endif
648 656
657 bne 2f /* Bail if permission mismach */
658
649 /* Jump to common TLB load point */ 659 /* Jump to common TLB load point */
650 b finish_tlb_load 660 b finish_tlb_load
651 661
@@ -702,7 +712,7 @@ interrupt_base:
702/* 712/*
703 * Both the instruction and data TLB miss get to this 713 * Both the instruction and data TLB miss get to this
704 * point to load the TLB. 714 * point to load the TLB.
705 * r10 - EA of fault 715 * r10 - available to use
706 * r11 - TLB (info from Linux PTE) 716 * r11 - TLB (info from Linux PTE)
707 * r12 - available to use 717 * r12 - available to use
708 * r13 - upper bits of PTE (if PTE_64BIT) or available to use 718 * r13 - upper bits of PTE (if PTE_64BIT) or available to use
diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c
index 550a19399bfa..ea1ba89f9c90 100644
--- a/arch/powerpc/kernel/iommu.c
+++ b/arch/powerpc/kernel/iommu.c
@@ -51,17 +51,6 @@ static int protect4gb = 1;
51 51
52static void __iommu_free(struct iommu_table *, dma_addr_t, unsigned int); 52static void __iommu_free(struct iommu_table *, dma_addr_t, unsigned int);
53 53
54static inline unsigned long iommu_num_pages(unsigned long vaddr,
55 unsigned long slen)
56{
57 unsigned long npages;
58
59 npages = IOMMU_PAGE_ALIGN(vaddr + slen) - (vaddr & IOMMU_PAGE_MASK);
60 npages >>= IOMMU_PAGE_SHIFT;
61
62 return npages;
63}
64
65static int __init setup_protect4gb(char *str) 54static int __init setup_protect4gb(char *str)
66{ 55{
67 if (strcmp(str, "on") == 0) 56 if (strcmp(str, "on") == 0)
@@ -325,7 +314,7 @@ int iommu_map_sg(struct device *dev, struct iommu_table *tbl,
325 } 314 }
326 /* Allocate iommu entries for that segment */ 315 /* Allocate iommu entries for that segment */
327 vaddr = (unsigned long) sg_virt(s); 316 vaddr = (unsigned long) sg_virt(s);
328 npages = iommu_num_pages(vaddr, slen); 317 npages = iommu_num_pages(vaddr, slen, IOMMU_PAGE_SIZE);
329 align = 0; 318 align = 0;
330 if (IOMMU_PAGE_SHIFT < PAGE_SHIFT && slen >= PAGE_SIZE && 319 if (IOMMU_PAGE_SHIFT < PAGE_SHIFT && slen >= PAGE_SIZE &&
331 (vaddr & ~PAGE_MASK) == 0) 320 (vaddr & ~PAGE_MASK) == 0)
@@ -418,7 +407,8 @@ int iommu_map_sg(struct device *dev, struct iommu_table *tbl,
418 unsigned long vaddr, npages; 407 unsigned long vaddr, npages;
419 408
420 vaddr = s->dma_address & IOMMU_PAGE_MASK; 409 vaddr = s->dma_address & IOMMU_PAGE_MASK;
421 npages = iommu_num_pages(s->dma_address, s->dma_length); 410 npages = iommu_num_pages(s->dma_address, s->dma_length,
411 IOMMU_PAGE_SIZE);
422 __iommu_free(tbl, vaddr, npages); 412 __iommu_free(tbl, vaddr, npages);
423 s->dma_address = DMA_ERROR_CODE; 413 s->dma_address = DMA_ERROR_CODE;
424 s->dma_length = 0; 414 s->dma_length = 0;
@@ -452,7 +442,8 @@ void iommu_unmap_sg(struct iommu_table *tbl, struct scatterlist *sglist,
452 442
453 if (sg->dma_length == 0) 443 if (sg->dma_length == 0)
454 break; 444 break;
455 npages = iommu_num_pages(dma_handle, sg->dma_length); 445 npages = iommu_num_pages(dma_handle, sg->dma_length,
446 IOMMU_PAGE_SIZE);
456 __iommu_free(tbl, dma_handle, npages); 447 __iommu_free(tbl, dma_handle, npages);
457 sg = sg_next(sg); 448 sg = sg_next(sg);
458 } 449 }
@@ -584,7 +575,7 @@ dma_addr_t iommu_map_single(struct device *dev, struct iommu_table *tbl,
584 BUG_ON(direction == DMA_NONE); 575 BUG_ON(direction == DMA_NONE);
585 576
586 uaddr = (unsigned long)vaddr; 577 uaddr = (unsigned long)vaddr;
587 npages = iommu_num_pages(uaddr, size); 578 npages = iommu_num_pages(uaddr, size, IOMMU_PAGE_SIZE);
588 579
589 if (tbl) { 580 if (tbl) {
590 align = 0; 581 align = 0;
@@ -617,7 +608,7 @@ void iommu_unmap_single(struct iommu_table *tbl, dma_addr_t dma_handle,
617 BUG_ON(direction == DMA_NONE); 608 BUG_ON(direction == DMA_NONE);
618 609
619 if (tbl) { 610 if (tbl) {
620 npages = iommu_num_pages(dma_handle, size); 611 npages = iommu_num_pages(dma_handle, size, IOMMU_PAGE_SIZE);
621 iommu_free(tbl, dma_handle, npages); 612 iommu_free(tbl, dma_handle, npages);
622 } 613 }
623} 614}
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index d972decf0324..ac222d0ab12e 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -439,8 +439,8 @@ void do_softirq(void)
439 439
440static LIST_HEAD(irq_hosts); 440static LIST_HEAD(irq_hosts);
441static DEFINE_SPINLOCK(irq_big_lock); 441static DEFINE_SPINLOCK(irq_big_lock);
442static DEFINE_PER_CPU(unsigned int, irq_radix_reader); 442static unsigned int revmap_trees_allocated;
443static unsigned int irq_radix_writer; 443static DEFINE_MUTEX(revmap_trees_mutex);
444struct irq_map_entry irq_map[NR_IRQS]; 444struct irq_map_entry irq_map[NR_IRQS];
445static unsigned int irq_virq_count = NR_IRQS; 445static unsigned int irq_virq_count = NR_IRQS;
446static struct irq_host *irq_default_host; 446static struct irq_host *irq_default_host;
@@ -583,57 +583,6 @@ void irq_set_virq_count(unsigned int count)
583 irq_virq_count = count; 583 irq_virq_count = count;
584} 584}
585 585
586/* radix tree not lockless safe ! we use a brlock-type mecanism
587 * for now, until we can use a lockless radix tree
588 */
589static void irq_radix_wrlock(unsigned long *flags)
590{
591 unsigned int cpu, ok;
592
593 spin_lock_irqsave(&irq_big_lock, *flags);
594 irq_radix_writer = 1;
595 smp_mb();
596 do {
597 barrier();
598 ok = 1;
599 for_each_possible_cpu(cpu) {
600 if (per_cpu(irq_radix_reader, cpu)) {
601 ok = 0;
602 break;
603 }
604 }
605 if (!ok)
606 cpu_relax();
607 } while(!ok);
608}
609
610static void irq_radix_wrunlock(unsigned long flags)
611{
612 smp_wmb();
613 irq_radix_writer = 0;
614 spin_unlock_irqrestore(&irq_big_lock, flags);
615}
616
617static void irq_radix_rdlock(unsigned long *flags)
618{
619 local_irq_save(*flags);
620 __get_cpu_var(irq_radix_reader) = 1;
621 smp_mb();
622 if (likely(irq_radix_writer == 0))
623 return;
624 __get_cpu_var(irq_radix_reader) = 0;
625 smp_wmb();
626 spin_lock(&irq_big_lock);
627 __get_cpu_var(irq_radix_reader) = 1;
628 spin_unlock(&irq_big_lock);
629}
630
631static void irq_radix_rdunlock(unsigned long flags)
632{
633 __get_cpu_var(irq_radix_reader) = 0;
634 local_irq_restore(flags);
635}
636
637static int irq_setup_virq(struct irq_host *host, unsigned int virq, 586static int irq_setup_virq(struct irq_host *host, unsigned int virq,
638 irq_hw_number_t hwirq) 587 irq_hw_number_t hwirq)
639{ 588{
@@ -788,7 +737,6 @@ void irq_dispose_mapping(unsigned int virq)
788{ 737{
789 struct irq_host *host; 738 struct irq_host *host;
790 irq_hw_number_t hwirq; 739 irq_hw_number_t hwirq;
791 unsigned long flags;
792 740
793 if (virq == NO_IRQ) 741 if (virq == NO_IRQ)
794 return; 742 return;
@@ -821,12 +769,16 @@ void irq_dispose_mapping(unsigned int virq)
821 host->revmap_data.linear.revmap[hwirq] = NO_IRQ; 769 host->revmap_data.linear.revmap[hwirq] = NO_IRQ;
822 break; 770 break;
823 case IRQ_HOST_MAP_TREE: 771 case IRQ_HOST_MAP_TREE:
824 /* Check if radix tree allocated yet */ 772 /*
825 if (host->revmap_data.tree.gfp_mask == 0) 773 * Check if radix tree allocated yet, if not then nothing to
774 * remove.
775 */
776 smp_rmb();
777 if (revmap_trees_allocated < 1)
826 break; 778 break;
827 irq_radix_wrlock(&flags); 779 mutex_lock(&revmap_trees_mutex);
828 radix_tree_delete(&host->revmap_data.tree, hwirq); 780 radix_tree_delete(&host->revmap_data.tree, hwirq);
829 irq_radix_wrunlock(flags); 781 mutex_unlock(&revmap_trees_mutex);
830 break; 782 break;
831 } 783 }
832 784
@@ -875,43 +827,62 @@ unsigned int irq_find_mapping(struct irq_host *host,
875EXPORT_SYMBOL_GPL(irq_find_mapping); 827EXPORT_SYMBOL_GPL(irq_find_mapping);
876 828
877 829
878unsigned int irq_radix_revmap(struct irq_host *host, 830unsigned int irq_radix_revmap_lookup(struct irq_host *host,
879 irq_hw_number_t hwirq) 831 irq_hw_number_t hwirq)
880{ 832{
881 struct radix_tree_root *tree;
882 struct irq_map_entry *ptr; 833 struct irq_map_entry *ptr;
883 unsigned int virq; 834 unsigned int virq;
884 unsigned long flags;
885 835
886 WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE); 836 WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE);
887 837
888 /* Check if the radix tree exist yet. We test the value of 838 /*
889 * the gfp_mask for that. Sneaky but saves another int in the 839 * Check if the radix tree exists and has bee initialized.
890 * structure. If not, we fallback to slow mode 840 * If not, we fallback to slow mode
891 */ 841 */
892 tree = &host->revmap_data.tree; 842 if (revmap_trees_allocated < 2)
893 if (tree->gfp_mask == 0)
894 return irq_find_mapping(host, hwirq); 843 return irq_find_mapping(host, hwirq);
895 844
896 /* Now try to resolve */ 845 /* Now try to resolve */
897 irq_radix_rdlock(&flags); 846 /*
898 ptr = radix_tree_lookup(tree, hwirq); 847 * No rcu_read_lock(ing) needed, the ptr returned can't go under us
899 irq_radix_rdunlock(flags); 848 * as it's referencing an entry in the static irq_map table.
849 */
850 ptr = radix_tree_lookup(&host->revmap_data.tree, hwirq);
900 851
901 /* Found it, return */ 852 /*
902 if (ptr) { 853 * If found in radix tree, then fine.
854 * Else fallback to linear lookup - this should not happen in practice
855 * as it means that we failed to insert the node in the radix tree.
856 */
857 if (ptr)
903 virq = ptr - irq_map; 858 virq = ptr - irq_map;
904 return virq; 859 else
905 } 860 virq = irq_find_mapping(host, hwirq);
861
862 return virq;
863}
864
865void irq_radix_revmap_insert(struct irq_host *host, unsigned int virq,
866 irq_hw_number_t hwirq)
867{
868
869 WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE);
870
871 /*
872 * Check if the radix tree exists yet.
873 * If not, then the irq will be inserted into the tree when it gets
874 * initialized.
875 */
876 smp_rmb();
877 if (revmap_trees_allocated < 1)
878 return;
906 879
907 /* If not there, try to insert it */
908 virq = irq_find_mapping(host, hwirq);
909 if (virq != NO_IRQ) { 880 if (virq != NO_IRQ) {
910 irq_radix_wrlock(&flags); 881 mutex_lock(&revmap_trees_mutex);
911 radix_tree_insert(tree, hwirq, &irq_map[virq]); 882 radix_tree_insert(&host->revmap_data.tree, hwirq,
912 irq_radix_wrunlock(flags); 883 &irq_map[virq]);
884 mutex_unlock(&revmap_trees_mutex);
913 } 885 }
914 return virq;
915} 886}
916 887
917unsigned int irq_linear_revmap(struct irq_host *host, 888unsigned int irq_linear_revmap(struct irq_host *host,
@@ -1020,14 +991,44 @@ void irq_early_init(void)
1020static int irq_late_init(void) 991static int irq_late_init(void)
1021{ 992{
1022 struct irq_host *h; 993 struct irq_host *h;
1023 unsigned long flags; 994 unsigned int i;
1024 995
1025 irq_radix_wrlock(&flags); 996 /*
997 * No mutual exclusion with respect to accessors of the tree is needed
998 * here as the synchronization is done via the state variable
999 * revmap_trees_allocated.
1000 */
1026 list_for_each_entry(h, &irq_hosts, link) { 1001 list_for_each_entry(h, &irq_hosts, link) {
1027 if (h->revmap_type == IRQ_HOST_MAP_TREE) 1002 if (h->revmap_type == IRQ_HOST_MAP_TREE)
1028 INIT_RADIX_TREE(&h->revmap_data.tree, GFP_ATOMIC); 1003 INIT_RADIX_TREE(&h->revmap_data.tree, GFP_KERNEL);
1004 }
1005
1006 /*
1007 * Make sure the radix trees inits are visible before setting
1008 * the flag
1009 */
1010 smp_wmb();
1011 revmap_trees_allocated = 1;
1012
1013 /*
1014 * Insert the reverse mapping for those interrupts already present
1015 * in irq_map[].
1016 */
1017 mutex_lock(&revmap_trees_mutex);
1018 for (i = 0; i < irq_virq_count; i++) {
1019 if (irq_map[i].host &&
1020 (irq_map[i].host->revmap_type == IRQ_HOST_MAP_TREE))
1021 radix_tree_insert(&irq_map[i].host->revmap_data.tree,
1022 irq_map[i].hwirq, &irq_map[i]);
1029 } 1023 }
1030 irq_radix_wrunlock(flags); 1024 mutex_unlock(&revmap_trees_mutex);
1025
1026 /*
1027 * Make sure the radix trees insertions are visible before setting
1028 * the flag
1029 */
1030 smp_wmb();
1031 revmap_trees_allocated = 2;
1031 1032
1032 return 0; 1033 return 0;
1033} 1034}
diff --git a/arch/powerpc/kernel/lparcfg.c b/arch/powerpc/kernel/lparcfg.c
index b3eef30b5131..d051e8cbcd03 100644
--- a/arch/powerpc/kernel/lparcfg.c
+++ b/arch/powerpc/kernel/lparcfg.c
@@ -510,10 +510,10 @@ static ssize_t update_ppp(u64 *entitlement, u8 *weight)
510 return -EINVAL; 510 return -EINVAL;
511 511
512 pr_debug("%s: current_entitled = %lu, current_weight = %u\n", 512 pr_debug("%s: current_entitled = %lu, current_weight = %u\n",
513 __FUNCTION__, ppp_data.entitlement, ppp_data.weight); 513 __func__, ppp_data.entitlement, ppp_data.weight);
514 514
515 pr_debug("%s: new_entitled = %lu, new_weight = %u\n", 515 pr_debug("%s: new_entitled = %lu, new_weight = %u\n",
516 __FUNCTION__, new_entitled, new_weight); 516 __func__, new_entitled, new_weight);
517 517
518 retval = plpar_hcall_norets(H_SET_PPP, new_entitled, new_weight); 518 retval = plpar_hcall_norets(H_SET_PPP, new_entitled, new_weight);
519 return retval; 519 return retval;
@@ -556,10 +556,10 @@ static ssize_t update_mpp(u64 *entitlement, u8 *weight)
556 return -EINVAL; 556 return -EINVAL;
557 557
558 pr_debug("%s: current_entitled = %lu, current_weight = %u\n", 558 pr_debug("%s: current_entitled = %lu, current_weight = %u\n",
559 __FUNCTION__, mpp_data.entitled_mem, mpp_data.mem_weight); 559 __func__, mpp_data.entitled_mem, mpp_data.mem_weight);
560 560
561 pr_debug("%s: new_entitled = %lu, new_weight = %u\n", 561 pr_debug("%s: new_entitled = %lu, new_weight = %u\n",
562 __FUNCTION__, new_entitled, new_weight); 562 __func__, new_entitled, new_weight);
563 563
564 rc = plpar_hcall_norets(H_SET_MPP, new_entitled, new_weight); 564 rc = plpar_hcall_norets(H_SET_MPP, new_entitled, new_weight);
565 return rc; 565 return rc;
diff --git a/arch/powerpc/kernel/misc.S b/arch/powerpc/kernel/misc.S
index 85cb6f340846..2d29752cbe16 100644
--- a/arch/powerpc/kernel/misc.S
+++ b/arch/powerpc/kernel/misc.S
@@ -31,11 +31,14 @@ _GLOBAL(reloc_offset)
31 mflr r0 31 mflr r0
32 bl 1f 32 bl 1f
331: mflr r3 331: mflr r3
34 LOAD_REG_IMMEDIATE(r4,1b) 34 PPC_LL r4,(2f-1b)(r3)
35 subf r3,r4,r3 35 subf r3,r4,r3
36 mtlr r0 36 mtlr r0
37 blr 37 blr
38 38
39 .align 3
402: PPC_LONG 1b
41
39/* 42/*
40 * add_reloc_offset(x) returns x + reloc_offset(). 43 * add_reloc_offset(x) returns x + reloc_offset().
41 */ 44 */
@@ -43,12 +46,15 @@ _GLOBAL(add_reloc_offset)
43 mflr r0 46 mflr r0
44 bl 1f 47 bl 1f
451: mflr r5 481: mflr r5
46 LOAD_REG_IMMEDIATE(r4,1b) 49 PPC_LL r4,(2f-1b)(r5)
47 subf r5,r4,r5 50 subf r5,r4,r5
48 add r3,r3,r5 51 add r3,r3,r5
49 mtlr r0 52 mtlr r0
50 blr 53 blr
51 54
55 .align 3
562: PPC_LONG 1b
57
52_GLOBAL(kernel_execve) 58_GLOBAL(kernel_execve)
53 li r0,__NR_execve 59 li r0,__NR_execve
54 sc 60 sc
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index 7a6dfbca7682..6a9b4bf0d173 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -274,6 +274,10 @@ _GLOBAL(real_writeb)
274/* 274/*
275 * Flush MMU TLB 275 * Flush MMU TLB
276 */ 276 */
277#ifndef CONFIG_FSL_BOOKE
278_GLOBAL(_tlbil_all)
279_GLOBAL(_tlbil_pid)
280#endif
277_GLOBAL(_tlbia) 281_GLOBAL(_tlbia)
278#if defined(CONFIG_40x) 282#if defined(CONFIG_40x)
279 sync /* Flush to memory before changing mapping */ 283 sync /* Flush to memory before changing mapping */
@@ -344,6 +348,9 @@ _GLOBAL(_tlbia)
344/* 348/*
345 * Flush MMU TLB for a particular address 349 * Flush MMU TLB for a particular address
346 */ 350 */
351#ifndef CONFIG_FSL_BOOKE
352_GLOBAL(_tlbil_va)
353#endif
347_GLOBAL(_tlbie) 354_GLOBAL(_tlbie)
348#if defined(CONFIG_40x) 355#if defined(CONFIG_40x)
349 /* We run the search with interrupts disabled because we have to change 356 /* We run the search with interrupts disabled because we have to change
@@ -436,6 +443,53 @@ _GLOBAL(_tlbie)
436#endif /* ! CONFIG_40x */ 443#endif /* ! CONFIG_40x */
437 blr 444 blr
438 445
446#if defined(CONFIG_FSL_BOOKE)
447/*
448 * Flush MMU TLB, but only on the local processor (no broadcast)
449 */
450_GLOBAL(_tlbil_all)
451#define MMUCSR0_TLBFI (MMUCSR0_TLB0FI | MMUCSR0_TLB1FI | \
452 MMUCSR0_TLB2FI | MMUCSR0_TLB3FI)
453 li r3,(MMUCSR0_TLBFI)@l
454 mtspr SPRN_MMUCSR0, r3
4551:
456 mfspr r3,SPRN_MMUCSR0
457 andi. r3,r3,MMUCSR0_TLBFI@l
458 bne 1b
459 blr
460
461/*
462 * Flush MMU TLB for a particular process id, but only on the local processor
463 * (no broadcast)
464 */
465_GLOBAL(_tlbil_pid)
466/* we currently do an invalidate all since we don't have per pid invalidate */
467 li r3,(MMUCSR0_TLBFI)@l
468 mtspr SPRN_MMUCSR0, r3
4691:
470 mfspr r3,SPRN_MMUCSR0
471 andi. r3,r3,MMUCSR0_TLBFI@l
472 bne 1b
473 blr
474
475/*
476 * Flush MMU TLB for a particular address, but only on the local processor
477 * (no broadcast)
478 */
479_GLOBAL(_tlbil_va)
480 slwi r4,r4,16
481 mtspr SPRN_MAS6,r4 /* assume AS=0 for now */
482 tlbsx 0,r3
483 mfspr r4,SPRN_MAS1 /* check valid */
484 andis. r3,r4,MAS1_VALID@h
485 beqlr
486 rlwinm r4,r4,0,1,31
487 mtspr SPRN_MAS1,r4
488 tlbwe
489 blr
490#endif /* CONFIG_FSL_BOOKE */
491
492
439/* 493/*
440 * Flush instruction cache. 494 * Flush instruction cache.
441 * This is a no-op on the 601. 495 * This is a no-op on the 601.
@@ -846,8 +900,10 @@ _GLOBAL(kernel_thread)
846 li r4,0 /* new sp (unused) */ 900 li r4,0 /* new sp (unused) */
847 li r0,__NR_clone 901 li r0,__NR_clone
848 sc 902 sc
849 cmpwi 0,r3,0 /* parent or child? */ 903 bns+ 1f /* did system call indicate error? */
850 bne 1f /* return if parent */ 904 neg r3,r3 /* if so, make return code negative */
9051: cmpwi 0,r3,0 /* parent or child? */
906 bne 2f /* return if parent */
851 li r0,0 /* make top-level stack frame */ 907 li r0,0 /* make top-level stack frame */
852 stwu r0,-16(r1) 908 stwu r0,-16(r1)
853 mtlr r30 /* fn addr in lr */ 909 mtlr r30 /* fn addr in lr */
@@ -857,7 +913,7 @@ _GLOBAL(kernel_thread)
857 li r0,__NR_exit /* exit if function returns */ 913 li r0,__NR_exit /* exit if function returns */
858 li r3,0 914 li r3,0
859 sc 915 sc
8601: lwz r30,8(r1) 9162: lwz r30,8(r1)
861 lwz r31,12(r1) 917 lwz r31,12(r1)
862 addi r1,r1,16 918 addi r1,r1,16
863 blr 919 blr
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
index 4dd70cf7bb4e..3053fe5c62f2 100644
--- a/arch/powerpc/kernel/misc_64.S
+++ b/arch/powerpc/kernel/misc_64.S
@@ -426,8 +426,10 @@ _GLOBAL(kernel_thread)
426 li r4,0 /* new sp (unused) */ 426 li r4,0 /* new sp (unused) */
427 li r0,__NR_clone 427 li r0,__NR_clone
428 sc 428 sc
429 cmpdi 0,r3,0 /* parent or child? */ 429 bns+ 1f /* did system call indicate error? */
430 bne 1f /* return if parent */ 430 neg r3,r3 /* if so, make return code negative */
4311: cmpdi 0,r3,0 /* parent or child? */
432 bne 2f /* return if parent */
431 li r0,0 433 li r0,0
432 stdu r0,-STACK_FRAME_OVERHEAD(r1) 434 stdu r0,-STACK_FRAME_OVERHEAD(r1)
433 ld r2,8(r29) 435 ld r2,8(r29)
@@ -438,7 +440,7 @@ _GLOBAL(kernel_thread)
438 li r0,__NR_exit /* exit after child exits */ 440 li r0,__NR_exit /* exit after child exits */
439 li r3,0 441 li r3,0
440 sc 442 sc
4411: addi r1,r1,STACK_FRAME_OVERHEAD 4432: addi r1,r1,STACK_FRAME_OVERHEAD
442 ld r29,-24(r1) 444 ld r29,-24(r1)
443 ld r30,-16(r1) 445 ld r30,-16(r1)
444 blr 446 blr
diff --git a/arch/powerpc/kernel/of_device.c b/arch/powerpc/kernel/of_device.c
index e9be908f199b..93ae5b169f41 100644
--- a/arch/powerpc/kernel/of_device.c
+++ b/arch/powerpc/kernel/of_device.c
@@ -78,7 +78,7 @@ struct of_device *of_device_alloc(struct device_node *np,
78 dev->dev.parent = parent; 78 dev->dev.parent = parent;
79 dev->dev.release = of_release_dev; 79 dev->dev.release = of_release_dev;
80 dev->dev.archdata.of_node = np; 80 dev->dev.archdata.of_node = np;
81 dev->dev.archdata.numa_node = of_node_to_nid(np); 81 set_dev_node(&dev->dev, of_node_to_nid(np));
82 82
83 if (bus_id) 83 if (bus_id)
84 strlcpy(dev->dev.bus_id, bus_id, BUS_ID_SIZE); 84 strlcpy(dev->dev.bus_id, bus_id, BUS_ID_SIZE);
diff --git a/arch/powerpc/kernel/paca.c b/arch/powerpc/kernel/paca.c
index c9bf17eec31b..48a347133f41 100644
--- a/arch/powerpc/kernel/paca.c
+++ b/arch/powerpc/kernel/paca.c
@@ -12,6 +12,7 @@
12 12
13#include <asm/lppaca.h> 13#include <asm/lppaca.h>
14#include <asm/paca.h> 14#include <asm/paca.h>
15#include <asm/sections.h>
15 16
16/* This symbol is provided by the linker - let it fill in the paca 17/* This symbol is provided by the linker - let it fill in the paca
17 * field correctly */ 18 * field correctly */
@@ -79,6 +80,8 @@ void __init initialise_pacas(void)
79 new_paca->lock_token = 0x8000; 80 new_paca->lock_token = 0x8000;
80 new_paca->paca_index = cpu; 81 new_paca->paca_index = cpu;
81 new_paca->kernel_toc = kernel_toc; 82 new_paca->kernel_toc = kernel_toc;
83 new_paca->kernelbase = (unsigned long) _stext;
84 new_paca->kernel_msr = MSR_KERNEL;
82 new_paca->hw_cpu_id = 0xffff; 85 new_paca->hw_cpu_id = 0xffff;
83 new_paca->slb_shadow_ptr = &slb_shadow[cpu]; 86 new_paca->slb_shadow_ptr = &slb_shadow[cpu];
84 new_paca->__current = &init_task; 87 new_paca->__current = &init_task;
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index ea0c61e09b76..01ce8c38bae6 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -56,6 +56,34 @@ resource_size_t isa_mem_base;
56/* Default PCI flags is 0 */ 56/* Default PCI flags is 0 */
57unsigned int ppc_pci_flags; 57unsigned int ppc_pci_flags;
58 58
59static struct dma_mapping_ops *pci_dma_ops;
60
61void set_pci_dma_ops(struct dma_mapping_ops *dma_ops)
62{
63 pci_dma_ops = dma_ops;
64}
65
66struct dma_mapping_ops *get_pci_dma_ops(void)
67{
68 return pci_dma_ops;
69}
70EXPORT_SYMBOL(get_pci_dma_ops);
71
72int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
73{
74 return dma_set_mask(&dev->dev, mask);
75}
76
77int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
78{
79 int rc;
80
81 rc = dma_set_mask(&dev->dev, mask);
82 dev->dev.coherent_dma_mask = dev->dma_mask;
83
84 return rc;
85}
86
59struct pci_controller *pcibios_alloc_controller(struct device_node *dev) 87struct pci_controller *pcibios_alloc_controller(struct device_node *dev)
60{ 88{
61 struct pci_controller *phb; 89 struct pci_controller *phb;
@@ -180,6 +208,26 @@ char __devinit *pcibios_setup(char *str)
180 return str; 208 return str;
181} 209}
182 210
211void __devinit pcibios_setup_new_device(struct pci_dev *dev)
212{
213 struct dev_archdata *sd = &dev->dev.archdata;
214
215 sd->of_node = pci_device_to_OF_node(dev);
216
217 DBG("PCI: device %s OF node: %s\n", pci_name(dev),
218 sd->of_node ? sd->of_node->full_name : "<none>");
219
220 sd->dma_ops = pci_dma_ops;
221#ifdef CONFIG_PPC32
222 sd->dma_data = (void *)PCI_DRAM_OFFSET;
223#endif
224 set_dev_node(&dev->dev, pcibus_to_node(dev->bus));
225
226 if (ppc_md.pci_dma_dev_setup)
227 ppc_md.pci_dma_dev_setup(dev);
228}
229EXPORT_SYMBOL(pcibios_setup_new_device);
230
183/* 231/*
184 * Reads the interrupt pin to determine if interrupt is use by card. 232 * Reads the interrupt pin to determine if interrupt is use by card.
185 * If the interrupt is used, then gets the interrupt line from the 233 * If the interrupt is used, then gets the interrupt line from the
@@ -371,7 +419,7 @@ pgprot_t pci_phys_mem_access_prot(struct file *file,
371 struct pci_dev *pdev = NULL; 419 struct pci_dev *pdev = NULL;
372 struct resource *found = NULL; 420 struct resource *found = NULL;
373 unsigned long prot = pgprot_val(protection); 421 unsigned long prot = pgprot_val(protection);
374 unsigned long offset = pfn << PAGE_SHIFT; 422 resource_size_t offset = ((resource_size_t)pfn) << PAGE_SHIFT;
375 int i; 423 int i;
376 424
377 if (page_is_ram(pfn)) 425 if (page_is_ram(pfn))
@@ -422,7 +470,8 @@ pgprot_t pci_phys_mem_access_prot(struct file *file,
422int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, 470int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
423 enum pci_mmap_state mmap_state, int write_combine) 471 enum pci_mmap_state mmap_state, int write_combine)
424{ 472{
425 resource_size_t offset = vma->vm_pgoff << PAGE_SHIFT; 473 resource_size_t offset =
474 ((resource_size_t)vma->vm_pgoff) << PAGE_SHIFT;
426 struct resource *rp; 475 struct resource *rp;
427 int ret; 476 int ret;
428 477
@@ -731,11 +780,6 @@ static void __devinit fixup_resource(struct resource *res, struct pci_dev *dev)
731 780
732 res->start = (res->start + offset) & mask; 781 res->start = (res->start + offset) & mask;
733 res->end = (res->end + offset) & mask; 782 res->end = (res->end + offset) & mask;
734
735 pr_debug("PCI:%s %016llx-%016llx\n",
736 pci_name(dev),
737 (unsigned long long)res->start,
738 (unsigned long long)res->end);
739} 783}
740 784
741 785
@@ -781,6 +825,11 @@ static void __devinit pcibios_fixup_resources(struct pci_dev *dev)
781 (unsigned int)res->flags); 825 (unsigned int)res->flags);
782 826
783 fixup_resource(res, dev); 827 fixup_resource(res, dev);
828
829 pr_debug("PCI:%s %016llx-%016llx\n",
830 pci_name(dev),
831 (unsigned long long)res->start,
832 (unsigned long long)res->end);
784 } 833 }
785 834
786 /* Call machine specific resource fixup */ 835 /* Call machine specific resource fixup */
@@ -789,58 +838,127 @@ static void __devinit pcibios_fixup_resources(struct pci_dev *dev)
789} 838}
790DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pcibios_fixup_resources); 839DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pcibios_fixup_resources);
791 840
792static void __devinit __pcibios_fixup_bus(struct pci_bus *bus) 841/* This function tries to figure out if a bridge resource has been initialized
842 * by the firmware or not. It doesn't have to be absolutely bullet proof, but
843 * things go more smoothly when it gets it right. It should covers cases such
844 * as Apple "closed" bridge resources and bare-metal pSeries unassigned bridges
845 */
846static int __devinit pcibios_uninitialized_bridge_resource(struct pci_bus *bus,
847 struct resource *res)
793{ 848{
794 struct pci_controller *hose = pci_bus_to_host(bus); 849 struct pci_controller *hose = pci_bus_to_host(bus);
795 struct pci_dev *dev = bus->self; 850 struct pci_dev *dev = bus->self;
851 resource_size_t offset;
852 u16 command;
853 int i;
796 854
797 pr_debug("PCI: Fixup bus %d (%s)\n", bus->number, dev ? pci_name(dev) : "PHB"); 855 /* We don't do anything if PCI_PROBE_ONLY is set */
856 if (ppc_pci_flags & PPC_PCI_PROBE_ONLY)
857 return 0;
798 858
799 /* Fixup PCI<->PCI bridges. Host bridges are handled separately, for 859 /* Job is a bit different between memory and IO */
800 * now differently between 32 and 64 bits. 860 if (res->flags & IORESOURCE_MEM) {
801 */ 861 /* If the BAR is non-0 (res != pci_mem_offset) then it's probably been
802 if (dev != NULL) { 862 * initialized by somebody
803 struct resource *res; 863 */
804 int i; 864 if (res->start != hose->pci_mem_offset)
865 return 0;
805 866
806 for (i = 0; i < PCI_BUS_NUM_RESOURCES; ++i) { 867 /* The BAR is 0, let's check if memory decoding is enabled on
807 if ((res = bus->resource[i]) == NULL) 868 * the bridge. If not, we consider it unassigned
808 continue; 869 */
809 if (!res->flags) 870 pci_read_config_word(dev, PCI_COMMAND, &command);
810 continue; 871 if ((command & PCI_COMMAND_MEMORY) == 0)
811 if (i >= 3 && bus->self->transparent) 872 return 1;
812 continue;
813 /* On PowerMac, Apple leaves bridge windows open over
814 * an inaccessible region of memory space (0...fffff)
815 * which is somewhat bogus, but that's what they think
816 * means disabled...
817 *
818 * We clear those to force them to be reallocated later
819 *
820 * We detect such regions by the fact that the base is
821 * equal to the pci_mem_offset of the host bridge and
822 * their size is smaller than 1M.
823 */
824 if (res->flags & IORESOURCE_MEM &&
825 res->start == hose->pci_mem_offset &&
826 res->end < 0x100000) {
827 printk(KERN_INFO
828 "PCI: Closing bogus Apple Firmware"
829 " region %d on bus 0x%02x\n",
830 i, bus->number);
831 res->flags = 0;
832 continue;
833 }
834 873
835 pr_debug("PCI:%s Bus rsrc %d %016llx-%016llx [%x] fixup...\n", 874 /* Memory decoding is enabled and the BAR is 0. If any of the bridge
836 pci_name(dev), i, 875 * resources covers that starting address (0 then it's good enough for
837 (unsigned long long)res->start,\ 876 * us for memory
838 (unsigned long long)res->end, 877 */
839 (unsigned int)res->flags); 878 for (i = 0; i < 3; i++) {
879 if ((hose->mem_resources[i].flags & IORESOURCE_MEM) &&
880 hose->mem_resources[i].start == hose->pci_mem_offset)
881 return 0;
882 }
840 883
841 fixup_resource(res, dev); 884 /* Well, it starts at 0 and we know it will collide so we may as
885 * well consider it as unassigned. That covers the Apple case.
886 */
887 return 1;
888 } else {
889 /* If the BAR is non-0, then we consider it assigned */
890 offset = (unsigned long)hose->io_base_virt - _IO_BASE;
891 if (((res->start - offset) & 0xfffffffful) != 0)
892 return 0;
893
894 /* Here, we are a bit different than memory as typically IO space
895 * starting at low addresses -is- valid. What we do instead if that
896 * we consider as unassigned anything that doesn't have IO enabled
897 * in the PCI command register, and that's it.
898 */
899 pci_read_config_word(dev, PCI_COMMAND, &command);
900 if (command & PCI_COMMAND_IO)
901 return 0;
902
903 /* It's starting at 0 and IO is disabled in the bridge, consider
904 * it unassigned
905 */
906 return 1;
907 }
908}
909
910/* Fixup resources of a PCI<->PCI bridge */
911static void __devinit pcibios_fixup_bridge(struct pci_bus *bus)
912{
913 struct resource *res;
914 int i;
915
916 struct pci_dev *dev = bus->self;
917
918 for (i = 0; i < PCI_BUS_NUM_RESOURCES; ++i) {
919 if ((res = bus->resource[i]) == NULL)
920 continue;
921 if (!res->flags)
922 continue;
923 if (i >= 3 && bus->self->transparent)
924 continue;
925
926 pr_debug("PCI:%s Bus rsrc %d %016llx-%016llx [%x] fixup...\n",
927 pci_name(dev), i,
928 (unsigned long long)res->start,\
929 (unsigned long long)res->end,
930 (unsigned int)res->flags);
931
932 /* Perform fixup */
933 fixup_resource(res, dev);
934
935 /* Try to detect uninitialized P2P bridge resources,
936 * and clear them out so they get re-assigned later
937 */
938 if (pcibios_uninitialized_bridge_resource(bus, res)) {
939 res->flags = 0;
940 pr_debug("PCI:%s (unassigned)\n", pci_name(dev));
941 } else {
942
943 pr_debug("PCI:%s %016llx-%016llx\n",
944 pci_name(dev),
945 (unsigned long long)res->start,
946 (unsigned long long)res->end);
842 } 947 }
843 } 948 }
949}
950
951static void __devinit __pcibios_fixup_bus(struct pci_bus *bus)
952{
953 struct pci_dev *dev = bus->self;
954
955 pr_debug("PCI: Fixup bus %d (%s)\n", bus->number, dev ? pci_name(dev) : "PHB");
956
957 /* Fixup PCI<->PCI bridges. Host bridges are handled separately, for
958 * now differently between 32 and 64 bits.
959 */
960 if (dev != NULL)
961 pcibios_fixup_bridge(bus);
844 962
845 /* Additional setup that is different between 32 and 64 bits for now */ 963 /* Additional setup that is different between 32 and 64 bits for now */
846 pcibios_do_bus_setup(bus); 964 pcibios_do_bus_setup(bus);
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c
index 88db4ffaf11c..131b1dfa68c6 100644
--- a/arch/powerpc/kernel/pci_32.c
+++ b/arch/powerpc/kernel/pci_32.c
@@ -53,12 +53,19 @@ LIST_HEAD(hose_list);
53 53
54static int pci_bus_count; 54static int pci_bus_count;
55 55
56/* This will remain NULL for now, until isa-bridge.c is made common
57 * to both 32-bit and 64-bit.
58 */
59struct pci_dev *isa_bridge_pcidev;
60EXPORT_SYMBOL_GPL(isa_bridge_pcidev);
61
56static void 62static void
57fixup_hide_host_resource_fsl(struct pci_dev* dev) 63fixup_hide_host_resource_fsl(struct pci_dev *dev)
58{ 64{
59 int i, class = dev->class >> 8; 65 int i, class = dev->class >> 8;
60 66
61 if ((class == PCI_CLASS_PROCESSOR_POWERPC) && 67 if ((class == PCI_CLASS_PROCESSOR_POWERPC ||
68 class == PCI_CLASS_BRIDGE_OTHER) &&
62 (dev->hdr_type == PCI_HEADER_TYPE_NORMAL) && 69 (dev->hdr_type == PCI_HEADER_TYPE_NORMAL) &&
63 (dev->bus->parent == NULL)) { 70 (dev->bus->parent == NULL)) {
64 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 71 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
@@ -424,6 +431,7 @@ void __devinit pcibios_do_bus_setup(struct pci_bus *bus)
424 unsigned long io_offset; 431 unsigned long io_offset;
425 struct resource *res; 432 struct resource *res;
426 int i; 433 int i;
434 struct pci_dev *dev;
427 435
428 /* Hookup PHB resources */ 436 /* Hookup PHB resources */
429 io_offset = (unsigned long)hose->io_base_virt - isa_io_base; 437 io_offset = (unsigned long)hose->io_base_virt - isa_io_base;
@@ -457,6 +465,12 @@ void __devinit pcibios_do_bus_setup(struct pci_bus *bus)
457 bus->resource[i+1] = res; 465 bus->resource[i+1] = res;
458 } 466 }
459 } 467 }
468
469 if (ppc_md.pci_dma_bus_setup)
470 ppc_md.pci_dma_bus_setup(bus);
471
472 list_for_each_entry(dev, &bus->devices, bus_list)
473 pcibios_setup_new_device(dev);
460} 474}
461 475
462/* the next one is stolen from the alpha port... */ 476/* the next one is stolen from the alpha port... */
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index 30eedfc5a566..8247cff1cb3e 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -52,35 +52,6 @@ EXPORT_SYMBOL(pci_io_base);
52 52
53LIST_HEAD(hose_list); 53LIST_HEAD(hose_list);
54 54
55static struct dma_mapping_ops *pci_dma_ops;
56
57void set_pci_dma_ops(struct dma_mapping_ops *dma_ops)
58{
59 pci_dma_ops = dma_ops;
60}
61
62struct dma_mapping_ops *get_pci_dma_ops(void)
63{
64 return pci_dma_ops;
65}
66EXPORT_SYMBOL(get_pci_dma_ops);
67
68
69int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
70{
71 return dma_set_mask(&dev->dev, mask);
72}
73
74int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
75{
76 int rc;
77
78 rc = dma_set_mask(&dev->dev, mask);
79 dev->dev.coherent_dma_mask = dev->dma_mask;
80
81 return rc;
82}
83
84static void fixup_broken_pcnet32(struct pci_dev* dev) 55static void fixup_broken_pcnet32(struct pci_dev* dev)
85{ 56{
86 if ((dev->class>>8 == PCI_CLASS_NETWORK_ETHERNET)) { 57 if ((dev->class>>8 == PCI_CLASS_NETWORK_ETHERNET)) {
@@ -548,26 +519,6 @@ int __devinit pcibios_map_io_space(struct pci_bus *bus)
548} 519}
549EXPORT_SYMBOL_GPL(pcibios_map_io_space); 520EXPORT_SYMBOL_GPL(pcibios_map_io_space);
550 521
551void __devinit pcibios_setup_new_device(struct pci_dev *dev)
552{
553 struct dev_archdata *sd = &dev->dev.archdata;
554
555 sd->of_node = pci_device_to_OF_node(dev);
556
557 DBG("PCI: device %s OF node: %s\n", pci_name(dev),
558 sd->of_node ? sd->of_node->full_name : "<none>");
559
560 sd->dma_ops = pci_dma_ops;
561#ifdef CONFIG_NUMA
562 sd->numa_node = pcibus_to_node(dev->bus);
563#else
564 sd->numa_node = -1;
565#endif
566 if (ppc_md.pci_dma_dev_setup)
567 ppc_md.pci_dma_dev_setup(dev);
568}
569EXPORT_SYMBOL(pcibios_setup_new_device);
570
571void __devinit pcibios_do_bus_setup(struct pci_bus *bus) 522void __devinit pcibios_do_bus_setup(struct pci_bus *bus)
572{ 523{
573 struct pci_dev *dev; 524 struct pci_dev *dev;
diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c
index e1ea4fe5cfbd..8edc2359c419 100644
--- a/arch/powerpc/kernel/ppc_ksyms.c
+++ b/arch/powerpc/kernel/ppc_ksyms.c
@@ -119,6 +119,9 @@ EXPORT_SYMBOL(flush_instruction_cache);
119EXPORT_SYMBOL(flush_tlb_kernel_range); 119EXPORT_SYMBOL(flush_tlb_kernel_range);
120EXPORT_SYMBOL(flush_tlb_page); 120EXPORT_SYMBOL(flush_tlb_page);
121EXPORT_SYMBOL(_tlbie); 121EXPORT_SYMBOL(_tlbie);
122#if defined(CONFIG_4xx) || defined(CONFIG_8xx) || defined(CONFIG_FSL_BOOKE)
123EXPORT_SYMBOL(_tlbil_va);
124#endif
122#endif 125#endif
123EXPORT_SYMBOL(__flush_icache_range); 126EXPORT_SYMBOL(__flush_icache_range);
124EXPORT_SYMBOL(flush_dcache_range); 127EXPORT_SYMBOL(flush_dcache_range);
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 87d83c56b31e..3a2dc7e6586a 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -888,9 +888,10 @@ static u64 __init dt_mem_next_cell(int s, cell_t **cellp)
888 */ 888 */
889static int __init early_init_dt_scan_drconf_memory(unsigned long node) 889static int __init early_init_dt_scan_drconf_memory(unsigned long node)
890{ 890{
891 cell_t *dm, *ls; 891 cell_t *dm, *ls, *usm;
892 unsigned long l, n, flags; 892 unsigned long l, n, flags;
893 u64 base, size, lmb_size; 893 u64 base, size, lmb_size;
894 unsigned int is_kexec_kdump = 0, rngs;
894 895
895 ls = (cell_t *)of_get_flat_dt_prop(node, "ibm,lmb-size", &l); 896 ls = (cell_t *)of_get_flat_dt_prop(node, "ibm,lmb-size", &l);
896 if (ls == NULL || l < dt_root_size_cells * sizeof(cell_t)) 897 if (ls == NULL || l < dt_root_size_cells * sizeof(cell_t))
@@ -905,6 +906,12 @@ static int __init early_init_dt_scan_drconf_memory(unsigned long node)
905 if (l < (n * (dt_root_addr_cells + 4) + 1) * sizeof(cell_t)) 906 if (l < (n * (dt_root_addr_cells + 4) + 1) * sizeof(cell_t))
906 return 0; 907 return 0;
907 908
909 /* check if this is a kexec/kdump kernel. */
910 usm = (cell_t *)of_get_flat_dt_prop(node, "linux,drconf-usable-memory",
911 &l);
912 if (usm != NULL)
913 is_kexec_kdump = 1;
914
908 for (; n != 0; --n) { 915 for (; n != 0; --n) {
909 base = dt_mem_next_cell(dt_root_addr_cells, &dm); 916 base = dt_mem_next_cell(dt_root_addr_cells, &dm);
910 flags = dm[3]; 917 flags = dm[3];
@@ -915,13 +922,34 @@ static int __init early_init_dt_scan_drconf_memory(unsigned long node)
915 if ((flags & 0x80) || !(flags & 0x8)) 922 if ((flags & 0x80) || !(flags & 0x8))
916 continue; 923 continue;
917 size = lmb_size; 924 size = lmb_size;
918 if (iommu_is_off) { 925 rngs = 1;
919 if (base >= 0x80000000ul) 926 if (is_kexec_kdump) {
927 /*
928 * For each lmb in ibm,dynamic-memory, a corresponding
929 * entry in linux,drconf-usable-memory property contains
930 * a counter 'p' followed by 'p' (base, size) duple.
931 * Now read the counter from
932 * linux,drconf-usable-memory property
933 */
934 rngs = dt_mem_next_cell(dt_root_size_cells, &usm);
935 if (!rngs) /* there are no (base, size) duple */
920 continue; 936 continue;
921 if ((base + size) > 0x80000000ul)
922 size = 0x80000000ul - base;
923 } 937 }
924 lmb_add(base, size); 938 do {
939 if (is_kexec_kdump) {
940 base = dt_mem_next_cell(dt_root_addr_cells,
941 &usm);
942 size = dt_mem_next_cell(dt_root_size_cells,
943 &usm);
944 }
945 if (iommu_is_off) {
946 if (base >= 0x80000000ul)
947 continue;
948 if ((base + size) > 0x80000000ul)
949 size = 0x80000000ul - base;
950 }
951 lmb_add(base, size);
952 } while (--rngs);
925 } 953 }
926 lmb_dump_all(); 954 lmb_dump_all();
927 return 0; 955 return 0;
@@ -1164,6 +1192,9 @@ void __init early_init_devtree(void *params)
1164 1192
1165 /* Reserve LMB regions used by kernel, initrd, dt, etc... */ 1193 /* Reserve LMB regions used by kernel, initrd, dt, etc... */
1166 lmb_reserve(PHYSICAL_START, __pa(klimit) - PHYSICAL_START); 1194 lmb_reserve(PHYSICAL_START, __pa(klimit) - PHYSICAL_START);
1195 /* If relocatable, reserve first 32k for interrupt vectors etc. */
1196 if (PHYSICAL_START > MEMORY_START)
1197 lmb_reserve(MEMORY_START, 0x8000);
1167 reserve_kdump_trampoline(); 1198 reserve_kdump_trampoline();
1168 reserve_crashkernel(); 1199 reserve_crashkernel();
1169 early_reserve_mem(); 1200 early_reserve_mem();
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index b72849ac7db3..2fdbc18ae94a 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -732,7 +732,7 @@ static struct fake_elf {
732 u32 ignore_me; 732 u32 ignore_me;
733 } rpadesc; 733 } rpadesc;
734 } rpanote; 734 } rpanote;
735} fake_elf = { 735} fake_elf __section(.fakeelf) = {
736 .elfhdr = { 736 .elfhdr = {
737 .e_ident = { 0x7f, 'E', 'L', 'F', 737 .e_ident = { 0x7f, 'E', 'L', 'F',
738 ELFCLASS32, ELFDATA2MSB, EV_CURRENT }, 738 ELFCLASS32, ELFDATA2MSB, EV_CURRENT },
@@ -774,13 +774,13 @@ static struct fake_elf {
774 .type = 0x12759999, 774 .type = 0x12759999,
775 .name = "IBM,RPA-Client-Config", 775 .name = "IBM,RPA-Client-Config",
776 .rpadesc = { 776 .rpadesc = {
777 .lpar_affinity = 0, 777 .lpar_affinity = 1,
778 .min_rmo_size = 64, /* in megabytes */ 778 .min_rmo_size = 128, /* in megabytes */
779 .min_rmo_percent = 0, 779 .min_rmo_percent = 0,
780 .max_pft_size = 48, /* 2^48 bytes max PFT size */ 780 .max_pft_size = 46, /* 2^46 bytes max PFT size */
781 .splpar = 1, 781 .splpar = 1,
782 .min_load = ~0U, 782 .min_load = ~0U,
783 .new_mem_def = 0 783 .new_mem_def = 1
784 } 784 }
785 } 785 }
786}; 786};
@@ -1321,7 +1321,7 @@ static void __init prom_initialize_tce_table(void)
1321 * 1321 *
1322 * -- Cort 1322 * -- Cort
1323 */ 1323 */
1324extern void __secondary_hold(void); 1324extern char __secondary_hold;
1325extern unsigned long __secondary_hold_spinloop; 1325extern unsigned long __secondary_hold_spinloop;
1326extern unsigned long __secondary_hold_acknowledge; 1326extern unsigned long __secondary_hold_acknowledge;
1327 1327
@@ -1342,13 +1342,7 @@ static void __init prom_hold_cpus(void)
1342 = (void *) LOW_ADDR(__secondary_hold_spinloop); 1342 = (void *) LOW_ADDR(__secondary_hold_spinloop);
1343 unsigned long *acknowledge 1343 unsigned long *acknowledge
1344 = (void *) LOW_ADDR(__secondary_hold_acknowledge); 1344 = (void *) LOW_ADDR(__secondary_hold_acknowledge);
1345#ifdef CONFIG_PPC64
1346 /* __secondary_hold is actually a descriptor, not the text address */
1347 unsigned long secondary_hold
1348 = __pa(*PTRRELOC((unsigned long *)__secondary_hold));
1349#else
1350 unsigned long secondary_hold = LOW_ADDR(__secondary_hold); 1345 unsigned long secondary_hold = LOW_ADDR(__secondary_hold);
1351#endif
1352 1346
1353 prom_debug("prom_hold_cpus: start...\n"); 1347 prom_debug("prom_hold_cpus: start...\n");
1354 prom_debug(" 1) spinloop = 0x%x\n", (unsigned long)spinloop); 1348 prom_debug(" 1) spinloop = 0x%x\n", (unsigned long)spinloop);
@@ -2315,13 +2309,14 @@ static void __init prom_check_initrd(unsigned long r3, unsigned long r4)
2315 2309
2316unsigned long __init prom_init(unsigned long r3, unsigned long r4, 2310unsigned long __init prom_init(unsigned long r3, unsigned long r4,
2317 unsigned long pp, 2311 unsigned long pp,
2318 unsigned long r6, unsigned long r7) 2312 unsigned long r6, unsigned long r7,
2313 unsigned long kbase)
2319{ 2314{
2320 struct prom_t *_prom; 2315 struct prom_t *_prom;
2321 unsigned long hdr; 2316 unsigned long hdr;
2322 unsigned long offset = reloc_offset();
2323 2317
2324#ifdef CONFIG_PPC32 2318#ifdef CONFIG_PPC32
2319 unsigned long offset = reloc_offset();
2325 reloc_got2(offset); 2320 reloc_got2(offset);
2326#endif 2321#endif
2327 2322
@@ -2355,9 +2350,11 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
2355 */ 2350 */
2356 RELOC(of_platform) = prom_find_machine_type(); 2351 RELOC(of_platform) = prom_find_machine_type();
2357 2352
2353#ifndef CONFIG_RELOCATABLE
2358 /* Bail if this is a kdump kernel. */ 2354 /* Bail if this is a kdump kernel. */
2359 if (PHYSICAL_START > 0) 2355 if (PHYSICAL_START > 0)
2360 prom_panic("Error: You can't boot a kdump kernel from OF!\n"); 2356 prom_panic("Error: You can't boot a kdump kernel from OF!\n");
2357#endif
2361 2358
2362 /* 2359 /*
2363 * Check for an initrd 2360 * Check for an initrd
@@ -2377,7 +2374,7 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
2377 * Copy the CPU hold code 2374 * Copy the CPU hold code
2378 */ 2375 */
2379 if (RELOC(of_platform) != PLATFORM_POWERMAC) 2376 if (RELOC(of_platform) != PLATFORM_POWERMAC)
2380 copy_and_flush(0, KERNELBASE + offset, 0x100, 0); 2377 copy_and_flush(0, kbase, 0x100, 0);
2381 2378
2382 /* 2379 /*
2383 * Do early parsing of command line 2380 * Do early parsing of command line
@@ -2480,7 +2477,7 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
2480 reloc_got2(-offset); 2477 reloc_got2(-offset);
2481#endif 2478#endif
2482 2479
2483 __start(hdr, KERNELBASE + offset, 0); 2480 __start(hdr, kbase, 0);
2484 2481
2485 return 0; 2482 return 0;
2486} 2483}
diff --git a/arch/powerpc/kernel/reloc_64.S b/arch/powerpc/kernel/reloc_64.S
new file mode 100644
index 000000000000..b47a0e1ab001
--- /dev/null
+++ b/arch/powerpc/kernel/reloc_64.S
@@ -0,0 +1,87 @@
1/*
2 * Code to process dynamic relocations in the kernel.
3 *
4 * Copyright 2008 Paul Mackerras, IBM Corp.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <asm/ppc_asm.h>
13
14RELA = 7
15RELACOUNT = 0x6ffffff9
16R_PPC64_RELATIVE = 22
17
18/*
19 * r3 = desired final address of kernel
20 */
21_GLOBAL(relocate)
22 mflr r0
23 bcl 20,31,$+4
240: mflr r12 /* r12 has runtime addr of label 0 */
25 mtlr r0
26 ld r11,(p_dyn - 0b)(r12)
27 add r11,r11,r12 /* r11 has runtime addr of .dynamic section */
28 ld r9,(p_rela - 0b)(r12)
29 add r9,r9,r12 /* r9 has runtime addr of .rela.dyn section */
30 ld r10,(p_st - 0b)(r12)
31 add r10,r10,r12 /* r10 has runtime addr of _stext */
32
33 /*
34 * Scan the dynamic section for the RELA and RELACOUNT entries.
35 */
36 li r7,0
37 li r8,0
381: ld r6,0(r11) /* get tag */
39 cmpdi r6,0
40 beq 4f /* end of list */
41 cmpdi r6,RELA
42 bne 2f
43 ld r7,8(r11) /* get RELA pointer in r7 */
44 b 3f
452: addis r6,r6,(-RELACOUNT)@ha
46 cmpdi r6,RELACOUNT@l
47 bne 3f
48 ld r8,8(r11) /* get RELACOUNT value in r8 */
493: addi r11,r11,16
50 b 1b
514: cmpdi r7,0 /* check we have both RELA and RELACOUNT */
52 cmpdi cr1,r8,0
53 beq 6f
54 beq cr1,6f
55
56 /*
57 * Work out linktime address of _stext and hence the
58 * relocation offset to be applied.
59 * cur_offset [r7] = rela.run [r9] - rela.link [r7]
60 * _stext.link [r10] = _stext.run [r10] - cur_offset [r7]
61 * final_offset [r3] = _stext.final [r3] - _stext.link [r10]
62 */
63 subf r7,r7,r9 /* cur_offset */
64 subf r10,r7,r10
65 subf r3,r10,r3 /* final_offset */
66
67 /*
68 * Run through the list of relocations and process the
69 * R_PPC64_RELATIVE ones.
70 */
71 mtctr r8
725: lwz r0,12(9) /* ELF64_R_TYPE(reloc->r_info) */
73 cmpwi r0,R_PPC64_RELATIVE
74 bne 6f
75 ld r6,0(r9) /* reloc->r_offset */
76 ld r0,16(r9) /* reloc->r_addend */
77 add r0,r0,r3
78 stdx r0,r7,r6
79 addi r9,r9,24
80 bdnz 5b
81
826: blr
83
84p_dyn: .llong __dynamic_start - 0b
85p_rela: .llong __rela_dyn_start - 0b
86p_st: .llong _stext - 0b
87
diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c
index 9cc5a52711e5..5ec56ff03e86 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -254,8 +254,21 @@ static int show_cpuinfo(struct seq_file *m, void *v)
254 /* If we are a Freescale core do a simple check so 254 /* If we are a Freescale core do a simple check so
255 * we dont have to keep adding cases in the future */ 255 * we dont have to keep adding cases in the future */
256 if (PVR_VER(pvr) & 0x8000) { 256 if (PVR_VER(pvr) & 0x8000) {
257 maj = PVR_MAJ(pvr); 257 switch (PVR_VER(pvr)) {
258 min = PVR_MIN(pvr); 258 case 0x8000: /* 7441/7450/7451, Voyager */
259 case 0x8001: /* 7445/7455, Apollo 6 */
260 case 0x8002: /* 7447/7457, Apollo 7 */
261 case 0x8003: /* 7447A, Apollo 7 PM */
262 case 0x8004: /* 7448, Apollo 8 */
263 case 0x800c: /* 7410, Nitro */
264 maj = ((pvr >> 8) & 0xF);
265 min = PVR_MIN(pvr);
266 break;
267 default: /* e500/book-e */
268 maj = PVR_MAJ(pvr);
269 min = PVR_MIN(pvr);
270 break;
271 }
259 } else { 272 } else {
260 switch (PVR_VER(pvr)) { 273 switch (PVR_VER(pvr)) {
261 case 0x0020: /* 403 family */ 274 case 0x0020: /* 403 family */
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index 066e65c59b58..c1a27626a940 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -111,7 +111,7 @@ notrace unsigned long __init early_init(unsigned long dt_ptr)
111 * This is called very early on the boot process, after a minimal 111 * This is called very early on the boot process, after a minimal
112 * MMU environment has been set up but before MMU_init is called. 112 * MMU environment has been set up but before MMU_init is called.
113 */ 113 */
114notrace void __init machine_init(unsigned long dt_ptr, unsigned long phys) 114notrace void __init machine_init(unsigned long dt_ptr)
115{ 115{
116 /* Enable early debugging if any specified (see udbg.h) */ 116 /* Enable early debugging if any specified (see udbg.h) */
117 udbg_early_init(); 117 udbg_early_init();
@@ -209,23 +209,12 @@ EXPORT_SYMBOL(nvram_sync);
209 209
210#endif /* CONFIG_NVRAM */ 210#endif /* CONFIG_NVRAM */
211 211
212static DEFINE_PER_CPU(struct cpu, cpu_devices);
213
214int __init ppc_init(void) 212int __init ppc_init(void)
215{ 213{
216 int cpu;
217
218 /* clear the progress line */ 214 /* clear the progress line */
219 if (ppc_md.progress) 215 if (ppc_md.progress)
220 ppc_md.progress(" ", 0xffff); 216 ppc_md.progress(" ", 0xffff);
221 217
222 /* register CPU devices */
223 for_each_possible_cpu(cpu) {
224 struct cpu *c = &per_cpu(cpu_devices, cpu);
225 c->hotpluggable = 1;
226 register_cpu(c, cpu);
227 }
228
229 /* call platform init */ 218 /* call platform init */
230 if (ppc_md.init != NULL) { 219 if (ppc_md.init != NULL) {
231 ppc_md.init(); 220 ppc_md.init();
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 8b25f51f03bf..843c0af210d0 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -255,9 +255,11 @@ void early_setup_secondary(void)
255#endif /* CONFIG_SMP */ 255#endif /* CONFIG_SMP */
256 256
257#if defined(CONFIG_SMP) || defined(CONFIG_KEXEC) 257#if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
258extern unsigned long __secondary_hold_spinloop;
259extern void generic_secondary_smp_init(void);
260
258void smp_release_cpus(void) 261void smp_release_cpus(void)
259{ 262{
260 extern unsigned long __secondary_hold_spinloop;
261 unsigned long *ptr; 263 unsigned long *ptr;
262 264
263 DBG(" -> smp_release_cpus()\n"); 265 DBG(" -> smp_release_cpus()\n");
@@ -266,12 +268,11 @@ void smp_release_cpus(void)
266 * all now so they can start to spin on their individual paca 268 * all now so they can start to spin on their individual paca
267 * spinloops. For non SMP kernels, the secondary cpus never get out 269 * spinloops. For non SMP kernels, the secondary cpus never get out
268 * of the common spinloop. 270 * of the common spinloop.
269 * This is useless but harmless on iSeries, secondaries are already 271 */
270 * waiting on their paca spinloops. */
271 272
272 ptr = (unsigned long *)((unsigned long)&__secondary_hold_spinloop 273 ptr = (unsigned long *)((unsigned long)&__secondary_hold_spinloop
273 - PHYSICAL_START); 274 - PHYSICAL_START);
274 *ptr = 1; 275 *ptr = __pa(generic_secondary_smp_init);
275 mb(); 276 mb();
276 277
277 DBG(" <- smp_release_cpus()\n"); 278 DBG(" <- smp_release_cpus()\n");
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index c27b10a1bd79..ff9f7010097d 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -101,8 +101,7 @@ void smp_message_recv(int msg)
101 generic_smp_call_function_interrupt(); 101 generic_smp_call_function_interrupt();
102 break; 102 break;
103 case PPC_MSG_RESCHEDULE: 103 case PPC_MSG_RESCHEDULE:
104 /* XXX Do we have to do this? */ 104 /* we notice need_resched on exit */
105 set_need_resched();
106 break; 105 break;
107 case PPC_MSG_CALL_FUNC_SINGLE: 106 case PPC_MSG_CALL_FUNC_SINGLE:
108 generic_smp_call_function_single_interrupt(); 107 generic_smp_call_function_single_interrupt();
diff --git a/arch/powerpc/kernel/softemu8xx.c b/arch/powerpc/kernel/softemu8xx.c
index c906c4bf6835..23c8c5e7dc4d 100644
--- a/arch/powerpc/kernel/softemu8xx.c
+++ b/arch/powerpc/kernel/softemu8xx.c
@@ -23,7 +23,6 @@
23#include <linux/ptrace.h> 23#include <linux/ptrace.h>
24#include <linux/slab.h> 24#include <linux/slab.h>
25#include <linux/user.h> 25#include <linux/user.h>
26#include <linux/a.out.h>
27#include <linux/interrupt.h> 26#include <linux/interrupt.h>
28 27
29#include <asm/pgtable.h> 28#include <asm/pgtable.h>
diff --git a/arch/powerpc/kernel/swsusp_asm64.S b/arch/powerpc/kernel/swsusp_asm64.S
index e092c3cbdb9b..86ac1d90d02b 100644
--- a/arch/powerpc/kernel/swsusp_asm64.S
+++ b/arch/powerpc/kernel/swsusp_asm64.S
@@ -133,7 +133,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
133 133
134 cmpdi r12,0 134 cmpdi r12,0
135 beq- nothing_to_copy 135 beq- nothing_to_copy
136 li r15,512 136 li r15,PAGE_SIZE>>3
137copyloop: 137copyloop:
138 ld r13,pbe_address(r12) 138 ld r13,pbe_address(r12)
139 ld r14,pbe_orig_address(r12) 139 ld r14,pbe_orig_address(r12)
diff --git a/arch/powerpc/kernel/sys_ppc32.c b/arch/powerpc/kernel/sys_ppc32.c
index d98634c76060..bb1cfcfdbbbb 100644
--- a/arch/powerpc/kernel/sys_ppc32.c
+++ b/arch/powerpc/kernel/sys_ppc32.c
@@ -61,42 +61,6 @@ asmlinkage long ppc32_select(u32 n, compat_ulong_t __user *inp,
61 return compat_sys_select((int)n, inp, outp, exp, compat_ptr(tvp_x)); 61 return compat_sys_select((int)n, inp, outp, exp, compat_ptr(tvp_x));
62} 62}
63 63
64int cp_compat_stat(struct kstat *stat, struct compat_stat __user *statbuf)
65{
66 compat_ino_t ino;
67 long err;
68
69 if (stat->size > MAX_NON_LFS || !new_valid_dev(stat->dev) ||
70 !new_valid_dev(stat->rdev))
71 return -EOVERFLOW;
72
73 ino = stat->ino;
74 if (sizeof(ino) < sizeof(stat->ino) && ino != stat->ino)
75 return -EOVERFLOW;
76
77 err = access_ok(VERIFY_WRITE, statbuf, sizeof(*statbuf)) ? 0 : -EFAULT;
78 err |= __put_user(new_encode_dev(stat->dev), &statbuf->st_dev);
79 err |= __put_user(ino, &statbuf->st_ino);
80 err |= __put_user(stat->mode, &statbuf->st_mode);
81 err |= __put_user(stat->nlink, &statbuf->st_nlink);
82 err |= __put_user(stat->uid, &statbuf->st_uid);
83 err |= __put_user(stat->gid, &statbuf->st_gid);
84 err |= __put_user(new_encode_dev(stat->rdev), &statbuf->st_rdev);
85 err |= __put_user(stat->size, &statbuf->st_size);
86 err |= __put_user(stat->atime.tv_sec, &statbuf->st_atime);
87 err |= __put_user(stat->atime.tv_nsec, &statbuf->st_atime_nsec);
88 err |= __put_user(stat->mtime.tv_sec, &statbuf->st_mtime);
89 err |= __put_user(stat->mtime.tv_nsec, &statbuf->st_mtime_nsec);
90 err |= __put_user(stat->ctime.tv_sec, &statbuf->st_ctime);
91 err |= __put_user(stat->ctime.tv_nsec, &statbuf->st_ctime_nsec);
92 err |= __put_user(stat->blksize, &statbuf->st_blksize);
93 err |= __put_user(stat->blocks, &statbuf->st_blocks);
94 err |= __put_user(0, &statbuf->__unused4[0]);
95 err |= __put_user(0, &statbuf->__unused4[1]);
96
97 return err;
98}
99
100/* Note: it is necessary to treat option as an unsigned int, 64/* Note: it is necessary to treat option as an unsigned int,
101 * with the corresponding cast to a signed int to insure that the 65 * with the corresponding cast to a signed int to insure that the
102 * proper conversion (sign extension) between the register representation of a signed int (msr in 32-bit mode) 66 * proper conversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
@@ -107,77 +71,6 @@ asmlinkage long compat_sys_sysfs(u32 option, u32 arg1, u32 arg2)
107 return sys_sysfs((int)option, arg1, arg2); 71 return sys_sysfs((int)option, arg1, arg2);
108} 72}
109 73
110asmlinkage long compat_sys_pause(void)
111{
112 current->state = TASK_INTERRUPTIBLE;
113 schedule();
114
115 return -ERESTARTNOHAND;
116}
117
118static inline long get_ts32(struct timespec *o, struct compat_timeval __user *i)
119{
120 long usec;
121
122 if (!access_ok(VERIFY_READ, i, sizeof(*i)))
123 return -EFAULT;
124 if (__get_user(o->tv_sec, &i->tv_sec))
125 return -EFAULT;
126 if (__get_user(usec, &i->tv_usec))
127 return -EFAULT;
128 o->tv_nsec = usec * 1000;
129 return 0;
130}
131
132static inline long put_tv32(struct compat_timeval __user *o, struct timeval *i)
133{
134 return (!access_ok(VERIFY_WRITE, o, sizeof(*o)) ||
135 (__put_user(i->tv_sec, &o->tv_sec) |
136 __put_user(i->tv_usec, &o->tv_usec)));
137}
138
139
140
141
142/* Translations due to time_t size differences. Which affects all
143 sorts of things, like timeval and itimerval. */
144extern struct timezone sys_tz;
145
146asmlinkage long compat_sys_gettimeofday(struct compat_timeval __user *tv, struct timezone __user *tz)
147{
148 if (tv) {
149 struct timeval ktv;
150 do_gettimeofday(&ktv);
151 if (put_tv32(tv, &ktv))
152 return -EFAULT;
153 }
154 if (tz) {
155 if (copy_to_user(tz, &sys_tz, sizeof(sys_tz)))
156 return -EFAULT;
157 }
158
159 return 0;
160}
161
162
163
164asmlinkage long compat_sys_settimeofday(struct compat_timeval __user *tv, struct timezone __user *tz)
165{
166 struct timespec kts;
167 struct timezone ktz;
168
169 if (tv) {
170 if (get_ts32(&kts, tv))
171 return -EFAULT;
172 }
173 if (tz) {
174 if (copy_from_user(&ktz, tz, sizeof(ktz)))
175 return -EFAULT;
176 }
177
178 return do_sys_settimeofday(tv ? &kts : NULL, tz ? &ktz : NULL);
179}
180
181#ifdef CONFIG_SYSVIPC 74#ifdef CONFIG_SYSVIPC
182long compat_sys_ipc(u32 call, u32 first, u32 second, u32 third, compat_uptr_t ptr, 75long compat_sys_ipc(u32 call, u32 first, u32 second, u32 third, compat_uptr_t ptr,
183 u32 fifth) 76 u32 fifth)
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c
index 56d172d16e56..86a2ffccef25 100644
--- a/arch/powerpc/kernel/sysfs.c
+++ b/arch/powerpc/kernel/sysfs.c
@@ -15,18 +15,24 @@
15#include <asm/firmware.h> 15#include <asm/firmware.h>
16#include <asm/hvcall.h> 16#include <asm/hvcall.h>
17#include <asm/prom.h> 17#include <asm/prom.h>
18#include <asm/paca.h>
19#include <asm/lppaca.h>
20#include <asm/machdep.h> 18#include <asm/machdep.h>
21#include <asm/smp.h> 19#include <asm/smp.h>
22 20
21#ifdef CONFIG_PPC64
22#include <asm/paca.h>
23#include <asm/lppaca.h>
24#endif
25
23static DEFINE_PER_CPU(struct cpu, cpu_devices); 26static DEFINE_PER_CPU(struct cpu, cpu_devices);
24 27
25static DEFINE_PER_CPU(struct kobject *, cache_toplevel); 28static DEFINE_PER_CPU(struct kobject *, cache_toplevel);
26 29
27/* SMT stuff */ 30/*
31 * SMT snooze delay stuff, 64-bit only for now
32 */
33
34#ifdef CONFIG_PPC64
28 35
29#ifdef CONFIG_PPC_MULTIPLATFORM
30/* Time in microseconds we delay before sleeping in the idle loop */ 36/* Time in microseconds we delay before sleeping in the idle loop */
31DEFINE_PER_CPU(unsigned long, smt_snooze_delay) = { 100 }; 37DEFINE_PER_CPU(unsigned long, smt_snooze_delay) = { 100 };
32 38
@@ -106,7 +112,7 @@ static int __init setup_smt_snooze_delay(char *str)
106} 112}
107__setup("smt-snooze-delay=", setup_smt_snooze_delay); 113__setup("smt-snooze-delay=", setup_smt_snooze_delay);
108 114
109#endif /* CONFIG_PPC_MULTIPLATFORM */ 115#endif /* CONFIG_PPC64 */
110 116
111/* 117/*
112 * Enabling PMCs will slow partition context switch times so we only do 118 * Enabling PMCs will slow partition context switch times so we only do
@@ -115,7 +121,7 @@ __setup("smt-snooze-delay=", setup_smt_snooze_delay);
115 121
116static DEFINE_PER_CPU(char, pmcs_enabled); 122static DEFINE_PER_CPU(char, pmcs_enabled);
117 123
118void ppc64_enable_pmcs(void) 124void ppc_enable_pmcs(void)
119{ 125{
120 /* Only need to enable them once */ 126 /* Only need to enable them once */
121 if (__get_cpu_var(pmcs_enabled)) 127 if (__get_cpu_var(pmcs_enabled))
@@ -126,8 +132,9 @@ void ppc64_enable_pmcs(void)
126 if (ppc_md.enable_pmcs) 132 if (ppc_md.enable_pmcs)
127 ppc_md.enable_pmcs(); 133 ppc_md.enable_pmcs();
128} 134}
129EXPORT_SYMBOL(ppc64_enable_pmcs); 135EXPORT_SYMBOL(ppc_enable_pmcs);
130 136
137#if defined(CONFIG_6xx) || defined(CONFIG_PPC64)
131/* XXX convert to rusty's on_one_cpu */ 138/* XXX convert to rusty's on_one_cpu */
132static unsigned long run_on_cpu(unsigned long cpu, 139static unsigned long run_on_cpu(unsigned long cpu,
133 unsigned long (*func)(unsigned long), 140 unsigned long (*func)(unsigned long),
@@ -146,6 +153,7 @@ static unsigned long run_on_cpu(unsigned long cpu,
146 153
147 return ret; 154 return ret;
148} 155}
156#endif
149 157
150#define SYSFS_PMCSETUP(NAME, ADDRESS) \ 158#define SYSFS_PMCSETUP(NAME, ADDRESS) \
151static unsigned long read_##NAME(unsigned long junk) \ 159static unsigned long read_##NAME(unsigned long junk) \
@@ -154,7 +162,7 @@ static unsigned long read_##NAME(unsigned long junk) \
154} \ 162} \
155static unsigned long write_##NAME(unsigned long val) \ 163static unsigned long write_##NAME(unsigned long val) \
156{ \ 164{ \
157 ppc64_enable_pmcs(); \ 165 ppc_enable_pmcs(); \
158 mtspr(ADDRESS, val); \ 166 mtspr(ADDRESS, val); \
159 return 0; \ 167 return 0; \
160} \ 168} \
@@ -184,28 +192,53 @@ static ssize_t __used \
184 * that are implemented on the current processor 192 * that are implemented on the current processor
185 */ 193 */
186 194
195#if defined(CONFIG_PPC64)
196#define HAS_PPC_PMC_CLASSIC 1
197#define HAS_PPC_PMC_IBM 1
198#define HAS_PPC_PMC_PA6T 1
199#elif defined(CONFIG_6xx)
200#define HAS_PPC_PMC_CLASSIC 1
201#define HAS_PPC_PMC_IBM 1
202#define HAS_PPC_PMC_G4 1
203#endif
204
205
206#ifdef HAS_PPC_PMC_CLASSIC
187SYSFS_PMCSETUP(mmcr0, SPRN_MMCR0); 207SYSFS_PMCSETUP(mmcr0, SPRN_MMCR0);
188SYSFS_PMCSETUP(mmcr1, SPRN_MMCR1); 208SYSFS_PMCSETUP(mmcr1, SPRN_MMCR1);
189SYSFS_PMCSETUP(mmcra, SPRN_MMCRA);
190SYSFS_PMCSETUP(pmc1, SPRN_PMC1); 209SYSFS_PMCSETUP(pmc1, SPRN_PMC1);
191SYSFS_PMCSETUP(pmc2, SPRN_PMC2); 210SYSFS_PMCSETUP(pmc2, SPRN_PMC2);
192SYSFS_PMCSETUP(pmc3, SPRN_PMC3); 211SYSFS_PMCSETUP(pmc3, SPRN_PMC3);
193SYSFS_PMCSETUP(pmc4, SPRN_PMC4); 212SYSFS_PMCSETUP(pmc4, SPRN_PMC4);
194SYSFS_PMCSETUP(pmc5, SPRN_PMC5); 213SYSFS_PMCSETUP(pmc5, SPRN_PMC5);
195SYSFS_PMCSETUP(pmc6, SPRN_PMC6); 214SYSFS_PMCSETUP(pmc6, SPRN_PMC6);
215
216#ifdef HAS_PPC_PMC_G4
217SYSFS_PMCSETUP(mmcr2, SPRN_MMCR2);
218#endif
219
220#ifdef CONFIG_PPC64
196SYSFS_PMCSETUP(pmc7, SPRN_PMC7); 221SYSFS_PMCSETUP(pmc7, SPRN_PMC7);
197SYSFS_PMCSETUP(pmc8, SPRN_PMC8); 222SYSFS_PMCSETUP(pmc8, SPRN_PMC8);
223
224SYSFS_PMCSETUP(mmcra, SPRN_MMCRA);
198SYSFS_PMCSETUP(purr, SPRN_PURR); 225SYSFS_PMCSETUP(purr, SPRN_PURR);
199SYSFS_PMCSETUP(spurr, SPRN_SPURR); 226SYSFS_PMCSETUP(spurr, SPRN_SPURR);
200SYSFS_PMCSETUP(dscr, SPRN_DSCR); 227SYSFS_PMCSETUP(dscr, SPRN_DSCR);
201 228
229static SYSDEV_ATTR(mmcra, 0600, show_mmcra, store_mmcra);
230static SYSDEV_ATTR(spurr, 0600, show_spurr, NULL);
231static SYSDEV_ATTR(dscr, 0600, show_dscr, store_dscr);
232static SYSDEV_ATTR(purr, 0600, show_purr, store_purr);
233#endif /* CONFIG_PPC64 */
234
235#ifdef HAS_PPC_PMC_PA6T
202SYSFS_PMCSETUP(pa6t_pmc0, SPRN_PA6T_PMC0); 236SYSFS_PMCSETUP(pa6t_pmc0, SPRN_PA6T_PMC0);
203SYSFS_PMCSETUP(pa6t_pmc1, SPRN_PA6T_PMC1); 237SYSFS_PMCSETUP(pa6t_pmc1, SPRN_PA6T_PMC1);
204SYSFS_PMCSETUP(pa6t_pmc2, SPRN_PA6T_PMC2); 238SYSFS_PMCSETUP(pa6t_pmc2, SPRN_PA6T_PMC2);
205SYSFS_PMCSETUP(pa6t_pmc3, SPRN_PA6T_PMC3); 239SYSFS_PMCSETUP(pa6t_pmc3, SPRN_PA6T_PMC3);
206SYSFS_PMCSETUP(pa6t_pmc4, SPRN_PA6T_PMC4); 240SYSFS_PMCSETUP(pa6t_pmc4, SPRN_PA6T_PMC4);
207SYSFS_PMCSETUP(pa6t_pmc5, SPRN_PA6T_PMC5); 241SYSFS_PMCSETUP(pa6t_pmc5, SPRN_PA6T_PMC5);
208
209#ifdef CONFIG_DEBUG_KERNEL 242#ifdef CONFIG_DEBUG_KERNEL
210SYSFS_PMCSETUP(hid0, SPRN_HID0); 243SYSFS_PMCSETUP(hid0, SPRN_HID0);
211SYSFS_PMCSETUP(hid1, SPRN_HID1); 244SYSFS_PMCSETUP(hid1, SPRN_HID1);
@@ -236,28 +269,37 @@ SYSFS_PMCSETUP(tsr1, SPRN_PA6T_TSR1);
236SYSFS_PMCSETUP(tsr2, SPRN_PA6T_TSR2); 269SYSFS_PMCSETUP(tsr2, SPRN_PA6T_TSR2);
237SYSFS_PMCSETUP(tsr3, SPRN_PA6T_TSR3); 270SYSFS_PMCSETUP(tsr3, SPRN_PA6T_TSR3);
238#endif /* CONFIG_DEBUG_KERNEL */ 271#endif /* CONFIG_DEBUG_KERNEL */
272#endif /* HAS_PPC_PMC_PA6T */
239 273
240static SYSDEV_ATTR(mmcra, 0600, show_mmcra, store_mmcra); 274#ifdef HAS_PPC_PMC_IBM
241static SYSDEV_ATTR(spurr, 0600, show_spurr, NULL);
242static SYSDEV_ATTR(dscr, 0600, show_dscr, store_dscr);
243static SYSDEV_ATTR(purr, 0600, show_purr, store_purr);
244
245static struct sysdev_attribute ibm_common_attrs[] = { 275static struct sysdev_attribute ibm_common_attrs[] = {
246 _SYSDEV_ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0), 276 _SYSDEV_ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
247 _SYSDEV_ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1), 277 _SYSDEV_ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
248}; 278};
279#endif /* HAS_PPC_PMC_G4 */
280
281#ifdef HAS_PPC_PMC_G4
282static struct sysdev_attribute g4_common_attrs[] = {
283 _SYSDEV_ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
284 _SYSDEV_ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
285 _SYSDEV_ATTR(mmcr2, 0600, show_mmcr2, store_mmcr2),
286};
287#endif /* HAS_PPC_PMC_G4 */
249 288
250static struct sysdev_attribute ibm_pmc_attrs[] = { 289static struct sysdev_attribute classic_pmc_attrs[] = {
251 _SYSDEV_ATTR(pmc1, 0600, show_pmc1, store_pmc1), 290 _SYSDEV_ATTR(pmc1, 0600, show_pmc1, store_pmc1),
252 _SYSDEV_ATTR(pmc2, 0600, show_pmc2, store_pmc2), 291 _SYSDEV_ATTR(pmc2, 0600, show_pmc2, store_pmc2),
253 _SYSDEV_ATTR(pmc3, 0600, show_pmc3, store_pmc3), 292 _SYSDEV_ATTR(pmc3, 0600, show_pmc3, store_pmc3),
254 _SYSDEV_ATTR(pmc4, 0600, show_pmc4, store_pmc4), 293 _SYSDEV_ATTR(pmc4, 0600, show_pmc4, store_pmc4),
255 _SYSDEV_ATTR(pmc5, 0600, show_pmc5, store_pmc5), 294 _SYSDEV_ATTR(pmc5, 0600, show_pmc5, store_pmc5),
256 _SYSDEV_ATTR(pmc6, 0600, show_pmc6, store_pmc6), 295 _SYSDEV_ATTR(pmc6, 0600, show_pmc6, store_pmc6),
296#ifdef CONFIG_PPC64
257 _SYSDEV_ATTR(pmc7, 0600, show_pmc7, store_pmc7), 297 _SYSDEV_ATTR(pmc7, 0600, show_pmc7, store_pmc7),
258 _SYSDEV_ATTR(pmc8, 0600, show_pmc8, store_pmc8), 298 _SYSDEV_ATTR(pmc8, 0600, show_pmc8, store_pmc8),
299#endif
259}; 300};
260 301
302#ifdef HAS_PPC_PMC_PA6T
261static struct sysdev_attribute pa6t_attrs[] = { 303static struct sysdev_attribute pa6t_attrs[] = {
262 _SYSDEV_ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0), 304 _SYSDEV_ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
263 _SYSDEV_ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1), 305 _SYSDEV_ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
@@ -298,6 +340,8 @@ static struct sysdev_attribute pa6t_attrs[] = {
298 _SYSDEV_ATTR(tsr3, 0600, show_tsr3, store_tsr3), 340 _SYSDEV_ATTR(tsr3, 0600, show_tsr3, store_tsr3),
299#endif /* CONFIG_DEBUG_KERNEL */ 341#endif /* CONFIG_DEBUG_KERNEL */
300}; 342};
343#endif /* HAS_PPC_PMC_PA6T */
344#endif /* HAS_PPC_PMC_CLASSIC */
301 345
302struct cache_desc { 346struct cache_desc {
303 struct kobject kobj; 347 struct kobject kobj;
@@ -588,23 +632,36 @@ static void __cpuinit register_cpu_online(unsigned int cpu)
588 struct sysdev_attribute *attrs, *pmc_attrs; 632 struct sysdev_attribute *attrs, *pmc_attrs;
589 int i, nattrs; 633 int i, nattrs;
590 634
635#ifdef CONFIG_PPC64
591 if (!firmware_has_feature(FW_FEATURE_ISERIES) && 636 if (!firmware_has_feature(FW_FEATURE_ISERIES) &&
592 cpu_has_feature(CPU_FTR_SMT)) 637 cpu_has_feature(CPU_FTR_SMT))
593 sysdev_create_file(s, &attr_smt_snooze_delay); 638 sysdev_create_file(s, &attr_smt_snooze_delay);
639#endif
594 640
595 /* PMC stuff */ 641 /* PMC stuff */
596 switch (cur_cpu_spec->pmc_type) { 642 switch (cur_cpu_spec->pmc_type) {
643#ifdef HAS_PPC_PMC_IBM
597 case PPC_PMC_IBM: 644 case PPC_PMC_IBM:
598 attrs = ibm_common_attrs; 645 attrs = ibm_common_attrs;
599 nattrs = sizeof(ibm_common_attrs) / sizeof(struct sysdev_attribute); 646 nattrs = sizeof(ibm_common_attrs) / sizeof(struct sysdev_attribute);
600 pmc_attrs = ibm_pmc_attrs; 647 pmc_attrs = classic_pmc_attrs;
601 break; 648 break;
649#endif /* HAS_PPC_PMC_IBM */
650#ifdef HAS_PPC_PMC_G4
651 case PPC_PMC_G4:
652 attrs = g4_common_attrs;
653 nattrs = sizeof(g4_common_attrs) / sizeof(struct sysdev_attribute);
654 pmc_attrs = classic_pmc_attrs;
655 break;
656#endif /* HAS_PPC_PMC_G4 */
657#ifdef HAS_PPC_PMC_PA6T
602 case PPC_PMC_PA6T: 658 case PPC_PMC_PA6T:
603 /* PA Semi starts counting at PMC0 */ 659 /* PA Semi starts counting at PMC0 */
604 attrs = pa6t_attrs; 660 attrs = pa6t_attrs;
605 nattrs = sizeof(pa6t_attrs) / sizeof(struct sysdev_attribute); 661 nattrs = sizeof(pa6t_attrs) / sizeof(struct sysdev_attribute);
606 pmc_attrs = NULL; 662 pmc_attrs = NULL;
607 break; 663 break;
664#endif /* HAS_PPC_PMC_PA6T */
608 default: 665 default:
609 attrs = NULL; 666 attrs = NULL;
610 nattrs = 0; 667 nattrs = 0;
@@ -618,6 +675,7 @@ static void __cpuinit register_cpu_online(unsigned int cpu)
618 for (i = 0; i < cur_cpu_spec->num_pmcs; i++) 675 for (i = 0; i < cur_cpu_spec->num_pmcs; i++)
619 sysdev_create_file(s, &pmc_attrs[i]); 676 sysdev_create_file(s, &pmc_attrs[i]);
620 677
678#ifdef CONFIG_PPC64
621 if (cpu_has_feature(CPU_FTR_MMCRA)) 679 if (cpu_has_feature(CPU_FTR_MMCRA))
622 sysdev_create_file(s, &attr_mmcra); 680 sysdev_create_file(s, &attr_mmcra);
623 681
@@ -629,6 +687,7 @@ static void __cpuinit register_cpu_online(unsigned int cpu)
629 687
630 if (cpu_has_feature(CPU_FTR_DSCR)) 688 if (cpu_has_feature(CPU_FTR_DSCR))
631 sysdev_create_file(s, &attr_dscr); 689 sysdev_create_file(s, &attr_dscr);
690#endif /* CONFIG_PPC64 */
632 691
633 create_cache_info(s); 692 create_cache_info(s);
634} 693}
@@ -641,16 +700,9 @@ static void remove_cache_info(struct sys_device *sysdev)
641 int cpu = sysdev->id; 700 int cpu = sysdev->id;
642 701
643 cache_desc = per_cpu(cache_desc, cpu); 702 cache_desc = per_cpu(cache_desc, cpu);
644 if (cache_desc != NULL) { 703 if (cache_desc != NULL)
645 sysfs_remove_file(&cache_desc->kobj, &cache_size_attr.attr);
646 sysfs_remove_file(&cache_desc->kobj, &cache_line_size_attr.attr);
647 sysfs_remove_file(&cache_desc->kobj, &cache_type_attr.attr);
648 sysfs_remove_file(&cache_desc->kobj, &cache_level_attr.attr);
649 sysfs_remove_file(&cache_desc->kobj, &cache_nr_sets_attr.attr);
650 sysfs_remove_file(&cache_desc->kobj, &cache_assoc_attr.attr);
651
652 kobject_put(&cache_desc->kobj); 704 kobject_put(&cache_desc->kobj);
653 } 705
654 cache_toplevel = per_cpu(cache_toplevel, cpu); 706 cache_toplevel = per_cpu(cache_toplevel, cpu);
655 if (cache_toplevel != NULL) 707 if (cache_toplevel != NULL)
656 kobject_put(cache_toplevel); 708 kobject_put(cache_toplevel);
@@ -671,17 +723,28 @@ static void unregister_cpu_online(unsigned int cpu)
671 723
672 /* PMC stuff */ 724 /* PMC stuff */
673 switch (cur_cpu_spec->pmc_type) { 725 switch (cur_cpu_spec->pmc_type) {
726#ifdef HAS_PPC_PMC_IBM
674 case PPC_PMC_IBM: 727 case PPC_PMC_IBM:
675 attrs = ibm_common_attrs; 728 attrs = ibm_common_attrs;
676 nattrs = sizeof(ibm_common_attrs) / sizeof(struct sysdev_attribute); 729 nattrs = sizeof(ibm_common_attrs) / sizeof(struct sysdev_attribute);
677 pmc_attrs = ibm_pmc_attrs; 730 pmc_attrs = classic_pmc_attrs;
731 break;
732#endif /* HAS_PPC_PMC_IBM */
733#ifdef HAS_PPC_PMC_G4
734 case PPC_PMC_G4:
735 attrs = g4_common_attrs;
736 nattrs = sizeof(g4_common_attrs) / sizeof(struct sysdev_attribute);
737 pmc_attrs = classic_pmc_attrs;
678 break; 738 break;
739#endif /* HAS_PPC_PMC_G4 */
740#ifdef HAS_PPC_PMC_PA6T
679 case PPC_PMC_PA6T: 741 case PPC_PMC_PA6T:
680 /* PA Semi starts counting at PMC0 */ 742 /* PA Semi starts counting at PMC0 */
681 attrs = pa6t_attrs; 743 attrs = pa6t_attrs;
682 nattrs = sizeof(pa6t_attrs) / sizeof(struct sysdev_attribute); 744 nattrs = sizeof(pa6t_attrs) / sizeof(struct sysdev_attribute);
683 pmc_attrs = NULL; 745 pmc_attrs = NULL;
684 break; 746 break;
747#endif /* HAS_PPC_PMC_PA6T */
685 default: 748 default:
686 attrs = NULL; 749 attrs = NULL;
687 nattrs = 0; 750 nattrs = 0;
@@ -695,6 +758,7 @@ static void unregister_cpu_online(unsigned int cpu)
695 for (i = 0; i < cur_cpu_spec->num_pmcs; i++) 758 for (i = 0; i < cur_cpu_spec->num_pmcs; i++)
696 sysdev_remove_file(s, &pmc_attrs[i]); 759 sysdev_remove_file(s, &pmc_attrs[i]);
697 760
761#ifdef CONFIG_PPC64
698 if (cpu_has_feature(CPU_FTR_MMCRA)) 762 if (cpu_has_feature(CPU_FTR_MMCRA))
699 sysdev_remove_file(s, &attr_mmcra); 763 sysdev_remove_file(s, &attr_mmcra);
700 764
@@ -706,6 +770,7 @@ static void unregister_cpu_online(unsigned int cpu)
706 770
707 if (cpu_has_feature(CPU_FTR_DSCR)) 771 if (cpu_has_feature(CPU_FTR_DSCR))
708 sysdev_remove_file(s, &attr_dscr); 772 sysdev_remove_file(s, &attr_dscr);
773#endif /* CONFIG_PPC64 */
709 774
710 remove_cache_info(s); 775 remove_cache_info(s);
711} 776}
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 81ccb8dd1a54..f5def6cf5cd6 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -23,7 +23,6 @@
23#include <linux/ptrace.h> 23#include <linux/ptrace.h>
24#include <linux/slab.h> 24#include <linux/slab.h>
25#include <linux/user.h> 25#include <linux/user.h>
26#include <linux/a.out.h>
27#include <linux/interrupt.h> 26#include <linux/interrupt.h>
28#include <linux/init.h> 27#include <linux/init.h>
29#include <linux/module.h> 28#include <linux/module.h>
diff --git a/arch/powerpc/kernel/vio.c b/arch/powerpc/kernel/vio.c
index 2750fbab1975..434c92a85c03 100644
--- a/arch/powerpc/kernel/vio.c
+++ b/arch/powerpc/kernel/vio.c
@@ -1232,7 +1232,7 @@ struct vio_dev *vio_register_device_node(struct device_node *of_node)
1232 else 1232 else
1233 viodev->dev.archdata.dma_ops = &dma_iommu_ops; 1233 viodev->dev.archdata.dma_ops = &dma_iommu_ops;
1234 viodev->dev.archdata.dma_data = vio_build_iommu_table(viodev); 1234 viodev->dev.archdata.dma_data = vio_build_iommu_table(viodev);
1235 viodev->dev.archdata.numa_node = of_node_to_nid(of_node); 1235 set_dev_node(&viodev->dev, of_node_to_nid(of_node));
1236 1236
1237 /* init generic 'struct device' fields: */ 1237 /* init generic 'struct device' fields: */
1238 viodev->dev.parent = &vio_bus_device.dev; 1238 viodev->dev.parent = &vio_bus_device.dev;
diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S
index 9f6c1ca1739e..b39c27ed7919 100644
--- a/arch/powerpc/kernel/vmlinux.lds.S
+++ b/arch/powerpc/kernel/vmlinux.lds.S
@@ -187,6 +187,24 @@ SECTIONS
187 *(.machine.desc) 187 *(.machine.desc)
188 __machine_desc_end = . ; 188 __machine_desc_end = . ;
189 } 189 }
190 . = ALIGN(8);
191 .dynsym : AT(ADDR(.dynsym) - LOAD_OFFSET) { *(.dynsym) }
192 .dynstr : AT(ADDR(.dynstr) - LOAD_OFFSET) { *(.dynstr) }
193 .dynamic : AT(ADDR(.dynamic) - LOAD_OFFSET)
194 {
195 __dynamic_start = .;
196 *(.dynamic)
197 }
198 .hash : AT(ADDR(.hash) - LOAD_OFFSET) { *(.hash) }
199 .interp : AT(ADDR(.interp) - LOAD_OFFSET) { *(.interp) }
200 .rela.dyn : AT(ADDR(.rela.dyn) - LOAD_OFFSET)
201 {
202 __rela_dyn_start = .;
203 *(.rela*)
204 }
205
206 /* Fake ELF header containing RPA note; for addnote */
207 .fakeelf : AT(ADDR(.fakeelf) - LOAD_OFFSET) { *(.fakeelf) }
190 208
191 /* freed after init ends here */ 209 /* freed after init ends here */
192 . = ALIGN(PAGE_SIZE); 210 . = ALIGN(PAGE_SIZE);
diff --git a/arch/powerpc/kvm/44x_tlb.c b/arch/powerpc/kvm/44x_tlb.c
index 5a5602da5091..2e227a412bc2 100644
--- a/arch/powerpc/kvm/44x_tlb.c
+++ b/arch/powerpc/kvm/44x_tlb.c
@@ -19,6 +19,7 @@
19 19
20#include <linux/types.h> 20#include <linux/types.h>
21#include <linux/string.h> 21#include <linux/string.h>
22#include <linux/kvm.h>
22#include <linux/kvm_host.h> 23#include <linux/kvm_host.h>
23#include <linux/highmem.h> 24#include <linux/highmem.h>
24#include <asm/mmu-44x.h> 25#include <asm/mmu-44x.h>
@@ -109,7 +110,6 @@ static int kvmppc_44x_tlbe_is_writable(struct tlbe *tlbe)
109 return tlbe->word2 & (PPC44x_TLB_SW|PPC44x_TLB_UW); 110 return tlbe->word2 & (PPC44x_TLB_SW|PPC44x_TLB_UW);
110} 111}
111 112
112/* Must be called with mmap_sem locked for writing. */
113static void kvmppc_44x_shadow_release(struct kvm_vcpu *vcpu, 113static void kvmppc_44x_shadow_release(struct kvm_vcpu *vcpu,
114 unsigned int index) 114 unsigned int index)
115{ 115{
@@ -124,6 +124,11 @@ static void kvmppc_44x_shadow_release(struct kvm_vcpu *vcpu,
124 } 124 }
125} 125}
126 126
127void kvmppc_tlbe_set_modified(struct kvm_vcpu *vcpu, unsigned int i)
128{
129 vcpu->arch.shadow_tlb_mod[i] = 1;
130}
131
127/* Caller must ensure that the specified guest TLB entry is safe to insert into 132/* Caller must ensure that the specified guest TLB entry is safe to insert into
128 * the shadow TLB. */ 133 * the shadow TLB. */
129void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gfn_t gfn, u64 asid, 134void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gfn_t gfn, u64 asid,
@@ -142,19 +147,16 @@ void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gfn_t gfn, u64 asid,
142 stlbe = &vcpu->arch.shadow_tlb[victim]; 147 stlbe = &vcpu->arch.shadow_tlb[victim];
143 148
144 /* Get reference to new page. */ 149 /* Get reference to new page. */
145 down_read(&current->mm->mmap_sem);
146 new_page = gfn_to_page(vcpu->kvm, gfn); 150 new_page = gfn_to_page(vcpu->kvm, gfn);
147 if (is_error_page(new_page)) { 151 if (is_error_page(new_page)) {
148 printk(KERN_ERR "Couldn't get guest page for gfn %lx!\n", gfn); 152 printk(KERN_ERR "Couldn't get guest page for gfn %lx!\n", gfn);
149 kvm_release_page_clean(new_page); 153 kvm_release_page_clean(new_page);
150 up_read(&current->mm->mmap_sem);
151 return; 154 return;
152 } 155 }
153 hpaddr = page_to_phys(new_page); 156 hpaddr = page_to_phys(new_page);
154 157
155 /* Drop reference to old page. */ 158 /* Drop reference to old page. */
156 kvmppc_44x_shadow_release(vcpu, victim); 159 kvmppc_44x_shadow_release(vcpu, victim);
157 up_read(&current->mm->mmap_sem);
158 160
159 vcpu->arch.shadow_pages[victim] = new_page; 161 vcpu->arch.shadow_pages[victim] = new_page;
160 162
@@ -164,27 +166,30 @@ void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gfn_t gfn, u64 asid,
164 166
165 /* XXX what about AS? */ 167 /* XXX what about AS? */
166 168
167 stlbe->tid = asid & 0xff; 169 stlbe->tid = !(asid & 0xff);
168 170
169 /* Force TS=1 for all guest mappings. */ 171 /* Force TS=1 for all guest mappings. */
170 /* For now we hardcode 4KB mappings, but it will be important to 172 /* For now we hardcode 4KB mappings, but it will be important to
171 * use host large pages in the future. */ 173 * use host large pages in the future. */
172 stlbe->word0 = (gvaddr & PAGE_MASK) | PPC44x_TLB_VALID | PPC44x_TLB_TS 174 stlbe->word0 = (gvaddr & PAGE_MASK) | PPC44x_TLB_VALID | PPC44x_TLB_TS
173 | PPC44x_TLB_4K; 175 | PPC44x_TLB_4K;
174
175 stlbe->word1 = (hpaddr & 0xfffffc00) | ((hpaddr >> 32) & 0xf); 176 stlbe->word1 = (hpaddr & 0xfffffc00) | ((hpaddr >> 32) & 0xf);
176 stlbe->word2 = kvmppc_44x_tlb_shadow_attrib(flags, 177 stlbe->word2 = kvmppc_44x_tlb_shadow_attrib(flags,
177 vcpu->arch.msr & MSR_PR); 178 vcpu->arch.msr & MSR_PR);
179 kvmppc_tlbe_set_modified(vcpu, victim);
180
181 KVMTRACE_5D(STLB_WRITE, vcpu, victim,
182 stlbe->tid, stlbe->word0, stlbe->word1, stlbe->word2,
183 handler);
178} 184}
179 185
180void kvmppc_mmu_invalidate(struct kvm_vcpu *vcpu, gva_t eaddr, 186void kvmppc_mmu_invalidate(struct kvm_vcpu *vcpu, gva_t eaddr,
181 gva_t eend, u32 asid) 187 gva_t eend, u32 asid)
182{ 188{
183 unsigned int pid = asid & 0xff; 189 unsigned int pid = !(asid & 0xff);
184 int i; 190 int i;
185 191
186 /* XXX Replace loop with fancy data structures. */ 192 /* XXX Replace loop with fancy data structures. */
187 down_write(&current->mm->mmap_sem);
188 for (i = 0; i <= tlb_44x_hwater; i++) { 193 for (i = 0; i <= tlb_44x_hwater; i++) {
189 struct tlbe *stlbe = &vcpu->arch.shadow_tlb[i]; 194 struct tlbe *stlbe = &vcpu->arch.shadow_tlb[i];
190 unsigned int tid; 195 unsigned int tid;
@@ -204,21 +209,35 @@ void kvmppc_mmu_invalidate(struct kvm_vcpu *vcpu, gva_t eaddr,
204 209
205 kvmppc_44x_shadow_release(vcpu, i); 210 kvmppc_44x_shadow_release(vcpu, i);
206 stlbe->word0 = 0; 211 stlbe->word0 = 0;
212 kvmppc_tlbe_set_modified(vcpu, i);
213 KVMTRACE_5D(STLB_INVAL, vcpu, i,
214 stlbe->tid, stlbe->word0, stlbe->word1,
215 stlbe->word2, handler);
207 } 216 }
208 up_write(&current->mm->mmap_sem);
209} 217}
210 218
211/* Invalidate all mappings, so that when they fault back in they will get the 219/* Invalidate all mappings on the privilege switch after PID has been changed.
212 * proper permission bits. */ 220 * The guest always runs with PID=1, so we must clear the entire TLB when
221 * switching address spaces. */
213void kvmppc_mmu_priv_switch(struct kvm_vcpu *vcpu, int usermode) 222void kvmppc_mmu_priv_switch(struct kvm_vcpu *vcpu, int usermode)
214{ 223{
215 int i; 224 int i;
216 225
217 /* XXX Replace loop with fancy data structures. */ 226 if (vcpu->arch.swap_pid) {
218 down_write(&current->mm->mmap_sem); 227 /* XXX Replace loop with fancy data structures. */
219 for (i = 0; i <= tlb_44x_hwater; i++) { 228 for (i = 0; i <= tlb_44x_hwater; i++) {
220 kvmppc_44x_shadow_release(vcpu, i); 229 struct tlbe *stlbe = &vcpu->arch.shadow_tlb[i];
221 vcpu->arch.shadow_tlb[i].word0 = 0; 230
231 /* Future optimization: clear only userspace mappings. */
232 kvmppc_44x_shadow_release(vcpu, i);
233 stlbe->word0 = 0;
234 kvmppc_tlbe_set_modified(vcpu, i);
235 KVMTRACE_5D(STLB_INVAL, vcpu, i,
236 stlbe->tid, stlbe->word0, stlbe->word1,
237 stlbe->word2, handler);
238 }
239 vcpu->arch.swap_pid = 0;
222 } 240 }
223 up_write(&current->mm->mmap_sem); 241
242 vcpu->arch.shadow_pid = !usermode;
224} 243}
diff --git a/arch/powerpc/kvm/Kconfig b/arch/powerpc/kvm/Kconfig
index 6b076010213b..53aaa66b25e5 100644
--- a/arch/powerpc/kvm/Kconfig
+++ b/arch/powerpc/kvm/Kconfig
@@ -37,6 +37,17 @@ config KVM_BOOKE_HOST
37 Provides host support for KVM on Book E PowerPC processors. Currently 37 Provides host support for KVM on Book E PowerPC processors. Currently
38 this works on 440 processors only. 38 this works on 440 processors only.
39 39
40config KVM_TRACE
41 bool "KVM trace support"
42 depends on KVM && MARKERS && SYSFS
43 select RELAY
44 select DEBUG_FS
45 default n
46 ---help---
47 This option allows reading a trace of kvm-related events through
48 relayfs. Note the ABI is not considered stable and will be
49 modified in future updates.
50
40source drivers/virtio/Kconfig 51source drivers/virtio/Kconfig
41 52
42endif # VIRTUALIZATION 53endif # VIRTUALIZATION
diff --git a/arch/powerpc/kvm/Makefile b/arch/powerpc/kvm/Makefile
index 04e3449e1f42..2a5d4397ac4b 100644
--- a/arch/powerpc/kvm/Makefile
+++ b/arch/powerpc/kvm/Makefile
@@ -4,9 +4,11 @@
4 4
5EXTRA_CFLAGS += -Ivirt/kvm -Iarch/powerpc/kvm 5EXTRA_CFLAGS += -Ivirt/kvm -Iarch/powerpc/kvm
6 6
7common-objs = $(addprefix ../../../virt/kvm/, kvm_main.o coalesced_mmio.o) 7common-objs-y = $(addprefix ../../../virt/kvm/, kvm_main.o coalesced_mmio.o)
8 8
9kvm-objs := $(common-objs) powerpc.o emulate.o booke_guest.o 9common-objs-$(CONFIG_KVM_TRACE) += $(addprefix ../../../virt/kvm/, kvm_trace.o)
10
11kvm-objs := $(common-objs-y) powerpc.o emulate.o booke_guest.o
10obj-$(CONFIG_KVM) += kvm.o 12obj-$(CONFIG_KVM) += kvm.o
11 13
12AFLAGS_booke_interrupts.o := -I$(obj) 14AFLAGS_booke_interrupts.o := -I$(obj)
diff --git a/arch/powerpc/kvm/booke_guest.c b/arch/powerpc/kvm/booke_guest.c
index 9c8ad850c6e3..7b2591e26bae 100644
--- a/arch/powerpc/kvm/booke_guest.c
+++ b/arch/powerpc/kvm/booke_guest.c
@@ -410,6 +410,21 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
410 break; 410 break;
411 } 411 }
412 412
413 case BOOKE_INTERRUPT_DEBUG: {
414 u32 dbsr;
415
416 vcpu->arch.pc = mfspr(SPRN_CSRR0);
417
418 /* clear IAC events in DBSR register */
419 dbsr = mfspr(SPRN_DBSR);
420 dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4;
421 mtspr(SPRN_DBSR, dbsr);
422
423 run->exit_reason = KVM_EXIT_DEBUG;
424 r = RESUME_HOST;
425 break;
426 }
427
413 default: 428 default:
414 printk(KERN_EMERG "exit_nr %d\n", exit_nr); 429 printk(KERN_EMERG "exit_nr %d\n", exit_nr);
415 BUG(); 430 BUG();
@@ -471,6 +486,8 @@ int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
471 vcpu->arch.msr = 0; 486 vcpu->arch.msr = 0;
472 vcpu->arch.gpr[1] = (16<<20) - 8; /* -8 for the callee-save LR slot */ 487 vcpu->arch.gpr[1] = (16<<20) - 8; /* -8 for the callee-save LR slot */
473 488
489 vcpu->arch.shadow_pid = 1;
490
474 /* Eye-catching number so we know if the guest takes an interrupt 491 /* Eye-catching number so we know if the guest takes an interrupt
475 * before it's programmed its own IVPR. */ 492 * before it's programmed its own IVPR. */
476 vcpu->arch.ivpr = 0x55550000; 493 vcpu->arch.ivpr = 0x55550000;
diff --git a/arch/powerpc/kvm/booke_interrupts.S b/arch/powerpc/kvm/booke_interrupts.S
index 3b653b5309b8..95e165baf85f 100644
--- a/arch/powerpc/kvm/booke_interrupts.S
+++ b/arch/powerpc/kvm/booke_interrupts.S
@@ -42,7 +42,8 @@
42#define HOST_STACK_LR (HOST_STACK_SIZE + 4) /* In caller stack frame. */ 42#define HOST_STACK_LR (HOST_STACK_SIZE + 4) /* In caller stack frame. */
43 43
44#define NEED_INST_MASK ((1<<BOOKE_INTERRUPT_PROGRAM) | \ 44#define NEED_INST_MASK ((1<<BOOKE_INTERRUPT_PROGRAM) | \
45 (1<<BOOKE_INTERRUPT_DTLB_MISS)) 45 (1<<BOOKE_INTERRUPT_DTLB_MISS) | \
46 (1<<BOOKE_INTERRUPT_DEBUG))
46 47
47#define NEED_DEAR_MASK ((1<<BOOKE_INTERRUPT_DATA_STORAGE) | \ 48#define NEED_DEAR_MASK ((1<<BOOKE_INTERRUPT_DATA_STORAGE) | \
48 (1<<BOOKE_INTERRUPT_DTLB_MISS)) 49 (1<<BOOKE_INTERRUPT_DTLB_MISS))
@@ -331,51 +332,57 @@ lightweight_exit:
331 332
332 mfspr r3, SPRN_PID 333 mfspr r3, SPRN_PID
333 stw r3, VCPU_HOST_PID(r4) 334 stw r3, VCPU_HOST_PID(r4)
334 lwz r3, VCPU_PID(r4) 335 lwz r3, VCPU_SHADOW_PID(r4)
335 mtspr SPRN_PID, r3 336 mtspr SPRN_PID, r3
336 337
337 /* Prevent all TLB updates. */ 338 /* Prevent all asynchronous TLB updates. */
338 mfmsr r5 339 mfmsr r5
339 lis r6, (MSR_EE|MSR_CE|MSR_ME|MSR_DE)@h 340 lis r6, (MSR_EE|MSR_CE|MSR_ME|MSR_DE)@h
340 ori r6, r6, (MSR_EE|MSR_CE|MSR_ME|MSR_DE)@l 341 ori r6, r6, (MSR_EE|MSR_CE|MSR_ME|MSR_DE)@l
341 andc r6, r5, r6 342 andc r6, r5, r6
342 mtmsr r6 343 mtmsr r6
343 344
344 /* Save the host's non-pinned TLB mappings, and load the guest mappings 345 /* Load the guest mappings, leaving the host's "pinned" kernel mappings
345 * over them. Leave the host's "pinned" kernel mappings in place. */ 346 * in place. */
346 /* XXX optimization: use generation count to avoid swapping unmodified
347 * entries. */
348 mfspr r10, SPRN_MMUCR /* Save host MMUCR. */ 347 mfspr r10, SPRN_MMUCR /* Save host MMUCR. */
349 lis r8, tlb_44x_hwater@ha 348 li r5, PPC44x_TLB_SIZE
350 lwz r8, tlb_44x_hwater@l(r8) 349 lis r5, tlb_44x_hwater@ha
351 addi r3, r4, VCPU_HOST_TLB - 4 350 lwz r5, tlb_44x_hwater@l(r5)
352 addi r9, r4, VCPU_SHADOW_TLB - 4 351 mtctr r5
353 li r6, 0 352 addi r9, r4, VCPU_SHADOW_TLB
353 addi r5, r4, VCPU_SHADOW_MOD
354 li r3, 0
3541: 3551:
355 /* Save host entry. */ 356 lbzx r7, r3, r5
356 tlbre r7, r6, PPC44x_TLB_PAGEID 357 cmpwi r7, 0
357 mfspr r5, SPRN_MMUCR 358 beq 3f
358 stwu r5, 4(r3) 359
359 stwu r7, 4(r3)
360 tlbre r7, r6, PPC44x_TLB_XLAT
361 stwu r7, 4(r3)
362 tlbre r7, r6, PPC44x_TLB_ATTRIB
363 stwu r7, 4(r3)
364 /* Load guest entry. */ 360 /* Load guest entry. */
365 lwzu r7, 4(r9) 361 mulli r11, r3, TLBE_BYTES
362 add r11, r11, r9
363 lwz r7, 0(r11)
366 mtspr SPRN_MMUCR, r7 364 mtspr SPRN_MMUCR, r7
367 lwzu r7, 4(r9) 365 lwz r7, 4(r11)
368 tlbwe r7, r6, PPC44x_TLB_PAGEID 366 tlbwe r7, r3, PPC44x_TLB_PAGEID
369 lwzu r7, 4(r9) 367 lwz r7, 8(r11)
370 tlbwe r7, r6, PPC44x_TLB_XLAT 368 tlbwe r7, r3, PPC44x_TLB_XLAT
371 lwzu r7, 4(r9) 369 lwz r7, 12(r11)
372 tlbwe r7, r6, PPC44x_TLB_ATTRIB 370 tlbwe r7, r3, PPC44x_TLB_ATTRIB
373 /* Increment index. */ 3713:
374 addi r6, r6, 1 372 addi r3, r3, 1 /* Increment index. */
375 cmpw r6, r8 373 bdnz 1b
376 blt 1b 374
377 mtspr SPRN_MMUCR, r10 /* Restore host MMUCR. */ 375 mtspr SPRN_MMUCR, r10 /* Restore host MMUCR. */
378 376
377 /* Clear bitmap of modified TLB entries */
378 li r5, PPC44x_TLB_SIZE>>2
379 mtctr r5
380 addi r5, r4, VCPU_SHADOW_MOD - 4
381 li r6, 0
3821:
383 stwu r6, 4(r5)
384 bdnz 1b
385
379 iccci 0, 0 /* XXX hack */ 386 iccci 0, 0 /* XXX hack */
380 387
381 /* Load some guest volatiles. */ 388 /* Load some guest volatiles. */
@@ -431,6 +438,14 @@ lightweight_exit:
431 oris r3, r3, KVMPPC_MSR_MASK@h 438 oris r3, r3, KVMPPC_MSR_MASK@h
432 ori r3, r3, KVMPPC_MSR_MASK@l 439 ori r3, r3, KVMPPC_MSR_MASK@l
433 mtsrr1 r3 440 mtsrr1 r3
441
442 /* Clear any debug events which occurred since we disabled MSR[DE].
443 * XXX This gives us a 3-instruction window in which a breakpoint
444 * intended for guest context could fire in the host instead. */
445 lis r3, 0xffff
446 ori r3, r3, 0xffff
447 mtspr SPRN_DBSR, r3
448
434 lwz r3, VCPU_GPR(r3)(r4) 449 lwz r3, VCPU_GPR(r3)(r4)
435 lwz r4, VCPU_GPR(r4)(r4) 450 lwz r4, VCPU_GPR(r4)(r4)
436 rfi 451 rfi
diff --git a/arch/powerpc/kvm/emulate.c b/arch/powerpc/kvm/emulate.c
index 8c605d0a5488..0fce4fbdc20d 100644
--- a/arch/powerpc/kvm/emulate.c
+++ b/arch/powerpc/kvm/emulate.c
@@ -170,6 +170,10 @@ static int kvmppc_emul_tlbwe(struct kvm_vcpu *vcpu, u32 inst)
170 kvmppc_mmu_map(vcpu, eaddr, raddr >> PAGE_SHIFT, asid, flags); 170 kvmppc_mmu_map(vcpu, eaddr, raddr >> PAGE_SHIFT, asid, flags);
171 } 171 }
172 172
173 KVMTRACE_5D(GTLB_WRITE, vcpu, index,
174 tlbe->tid, tlbe->word0, tlbe->word1, tlbe->word2,
175 handler);
176
173 return EMULATE_DONE; 177 return EMULATE_DONE;
174} 178}
175 179
@@ -504,7 +508,7 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
504 case SPRN_MMUCR: 508 case SPRN_MMUCR:
505 vcpu->arch.mmucr = vcpu->arch.gpr[rs]; break; 509 vcpu->arch.mmucr = vcpu->arch.gpr[rs]; break;
506 case SPRN_PID: 510 case SPRN_PID:
507 vcpu->arch.pid = vcpu->arch.gpr[rs]; break; 511 kvmppc_set_pid(vcpu, vcpu->arch.gpr[rs]); break;
508 case SPRN_CCR0: 512 case SPRN_CCR0:
509 vcpu->arch.ccr0 = vcpu->arch.gpr[rs]; break; 513 vcpu->arch.ccr0 = vcpu->arch.gpr[rs]; break;
510 case SPRN_CCR1: 514 case SPRN_CCR1:
@@ -765,6 +769,8 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
765 break; 769 break;
766 } 770 }
767 771
772 KVMTRACE_3D(PPC_INSTR, vcpu, inst, vcpu->arch.pc, emulated, entryexit);
773
768 if (advance) 774 if (advance)
769 vcpu->arch.pc += 4; /* Advance past emulated instruction. */ 775 vcpu->arch.pc += 4; /* Advance past emulated instruction. */
770 776
diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c
index 53826a5f6c06..90a6fc422b23 100644
--- a/arch/powerpc/kvm/powerpc.c
+++ b/arch/powerpc/kvm/powerpc.c
@@ -27,6 +27,7 @@
27#include <asm/cputable.h> 27#include <asm/cputable.h>
28#include <asm/uaccess.h> 28#include <asm/uaccess.h>
29#include <asm/kvm_ppc.h> 29#include <asm/kvm_ppc.h>
30#include <asm/tlbflush.h>
30 31
31 32
32gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn) 33gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
@@ -239,18 +240,114 @@ void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
239{ 240{
240} 241}
241 242
243/* Note: clearing MSR[DE] just means that the debug interrupt will not be
244 * delivered *immediately*. Instead, it simply sets the appropriate DBSR bits.
245 * If those DBSR bits are still set when MSR[DE] is re-enabled, the interrupt
246 * will be delivered as an "imprecise debug event" (which is indicated by
247 * DBSR[IDE].
248 */
249static void kvmppc_disable_debug_interrupts(void)
250{
251 mtmsr(mfmsr() & ~MSR_DE);
252}
253
254static void kvmppc_restore_host_debug_state(struct kvm_vcpu *vcpu)
255{
256 kvmppc_disable_debug_interrupts();
257
258 mtspr(SPRN_IAC1, vcpu->arch.host_iac[0]);
259 mtspr(SPRN_IAC2, vcpu->arch.host_iac[1]);
260 mtspr(SPRN_IAC3, vcpu->arch.host_iac[2]);
261 mtspr(SPRN_IAC4, vcpu->arch.host_iac[3]);
262 mtspr(SPRN_DBCR1, vcpu->arch.host_dbcr1);
263 mtspr(SPRN_DBCR2, vcpu->arch.host_dbcr2);
264 mtspr(SPRN_DBCR0, vcpu->arch.host_dbcr0);
265 mtmsr(vcpu->arch.host_msr);
266}
267
268static void kvmppc_load_guest_debug_registers(struct kvm_vcpu *vcpu)
269{
270 struct kvm_guest_debug *dbg = &vcpu->guest_debug;
271 u32 dbcr0 = 0;
272
273 vcpu->arch.host_msr = mfmsr();
274 kvmppc_disable_debug_interrupts();
275
276 /* Save host debug register state. */
277 vcpu->arch.host_iac[0] = mfspr(SPRN_IAC1);
278 vcpu->arch.host_iac[1] = mfspr(SPRN_IAC2);
279 vcpu->arch.host_iac[2] = mfspr(SPRN_IAC3);
280 vcpu->arch.host_iac[3] = mfspr(SPRN_IAC4);
281 vcpu->arch.host_dbcr0 = mfspr(SPRN_DBCR0);
282 vcpu->arch.host_dbcr1 = mfspr(SPRN_DBCR1);
283 vcpu->arch.host_dbcr2 = mfspr(SPRN_DBCR2);
284
285 /* set registers up for guest */
286
287 if (dbg->bp[0]) {
288 mtspr(SPRN_IAC1, dbg->bp[0]);
289 dbcr0 |= DBCR0_IAC1 | DBCR0_IDM;
290 }
291 if (dbg->bp[1]) {
292 mtspr(SPRN_IAC2, dbg->bp[1]);
293 dbcr0 |= DBCR0_IAC2 | DBCR0_IDM;
294 }
295 if (dbg->bp[2]) {
296 mtspr(SPRN_IAC3, dbg->bp[2]);
297 dbcr0 |= DBCR0_IAC3 | DBCR0_IDM;
298 }
299 if (dbg->bp[3]) {
300 mtspr(SPRN_IAC4, dbg->bp[3]);
301 dbcr0 |= DBCR0_IAC4 | DBCR0_IDM;
302 }
303
304 mtspr(SPRN_DBCR0, dbcr0);
305 mtspr(SPRN_DBCR1, 0);
306 mtspr(SPRN_DBCR2, 0);
307}
308
242void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 309void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
243{ 310{
311 int i;
312
313 if (vcpu->guest_debug.enabled)
314 kvmppc_load_guest_debug_registers(vcpu);
315
316 /* Mark every guest entry in the shadow TLB entry modified, so that they
317 * will all be reloaded on the next vcpu run (instead of being
318 * demand-faulted). */
319 for (i = 0; i <= tlb_44x_hwater; i++)
320 kvmppc_tlbe_set_modified(vcpu, i);
244} 321}
245 322
246void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu) 323void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
247{ 324{
325 if (vcpu->guest_debug.enabled)
326 kvmppc_restore_host_debug_state(vcpu);
327
328 /* Don't leave guest TLB entries resident when being de-scheduled. */
329 /* XXX It would be nice to differentiate between heavyweight exit and
330 * sched_out here, since we could avoid the TLB flush for heavyweight
331 * exits. */
332 _tlbia();
248} 333}
249 334
250int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu, 335int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
251 struct kvm_debug_guest *dbg) 336 struct kvm_debug_guest *dbg)
252{ 337{
253 return -ENOTSUPP; 338 int i;
339
340 vcpu->guest_debug.enabled = dbg->enabled;
341 if (vcpu->guest_debug.enabled) {
342 for (i=0; i < ARRAY_SIZE(vcpu->guest_debug.bp); i++) {
343 if (dbg->breakpoints[i].enabled)
344 vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address;
345 else
346 vcpu->guest_debug.bp[i] = 0;
347 }
348 }
349
350 return 0;
254} 351}
255 352
256static void kvmppc_complete_dcr_load(struct kvm_vcpu *vcpu, 353static void kvmppc_complete_dcr_load(struct kvm_vcpu *vcpu,
diff --git a/arch/powerpc/lib/copypage_64.S b/arch/powerpc/lib/copypage_64.S
index f9837f44ac0b..75f3267fdc30 100644
--- a/arch/powerpc/lib/copypage_64.S
+++ b/arch/powerpc/lib/copypage_64.S
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2002 Paul Mackerras, IBM Corp. 2 * Copyright (C) 2008 Mark Nelson, IBM Corp.
3 * 3 *
4 * This program is free software; you can redistribute it and/or 4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License 5 * modify it under the terms of the GNU General Public License
@@ -8,112 +8,100 @@
8 */ 8 */
9#include <asm/processor.h> 9#include <asm/processor.h>
10#include <asm/ppc_asm.h> 10#include <asm/ppc_asm.h>
11#include <asm/asm-offsets.h>
12
13 .section ".toc","aw"
14PPC64_CACHES:
15 .tc ppc64_caches[TC],ppc64_caches
16 .section ".text"
17
11 18
12_GLOBAL(copy_4K_page) 19_GLOBAL(copy_4K_page)
13 std r31,-8(1) 20 li r5,4096 /* 4K page size */
14 std r30,-16(1) 21BEGIN_FTR_SECTION
15 std r29,-24(1) 22 ld r10,PPC64_CACHES@toc(r2)
16 std r28,-32(1) 23 lwz r11,DCACHEL1LOGLINESIZE(r10) /* log2 of cache line size */
17 std r27,-40(1) 24 lwz r12,DCACHEL1LINESIZE(r10) /* get cache line size */
18 std r26,-48(1) 25 li r9,0
19 std r25,-56(1) 26 srd r8,r5,r11
20 std r24,-64(1) 27
21 std r23,-72(1) 28 mtctr r8
22 std r22,-80(1) 29setup:
23 std r21,-88(1) 30 dcbt r9,r4
24 std r20,-96(1) 31 dcbz r9,r3
25 li r5,4096/32 - 1 32 add r9,r9,r12
33 bdnz setup
34END_FTR_SECTION_IFSET(CPU_FTR_CP_USE_DCBTZ)
26 addi r3,r3,-8 35 addi r3,r3,-8
27 li r12,5 36 srdi r8,r5,7 /* page is copied in 128 byte strides */
280: addi r5,r5,-24 37 addi r8,r8,-1 /* one stride copied outside loop */
29 mtctr r12 38
30 ld r22,640(4) 39 mtctr r8
31 ld r21,512(4) 40
32 ld r20,384(4) 41 ld r5,0(r4)
33 ld r11,256(4) 42 ld r6,8(r4)
34 ld r9,128(4) 43 ld r7,16(r4)
35 ld r7,0(4) 44 ldu r8,24(r4)
36 ld r25,648(4) 451: std r5,8(r3)
37 ld r24,520(4) 46 ld r9,8(r4)
38 ld r23,392(4) 47 std r6,16(r3)
39 ld r10,264(4) 48 ld r10,16(r4)
40 ld r8,136(4) 49 std r7,24(r3)
41 ldu r6,8(4) 50 ld r11,24(r4)
42 cmpwi r5,24 51 std r8,32(r3)
431: std r22,648(3) 52 ld r12,32(r4)
44 std r21,520(3) 53 std r9,40(r3)
45 std r20,392(3) 54 ld r5,40(r4)
46 std r11,264(3) 55 std r10,48(r3)
47 std r9,136(3) 56 ld r6,48(r4)
48 std r7,8(3) 57 std r11,56(r3)
49 ld r28,648(4) 58 ld r7,56(r4)
50 ld r27,520(4) 59 std r12,64(r3)
51 ld r26,392(4) 60 ld r8,64(r4)
52 ld r31,264(4) 61 std r5,72(r3)
53 ld r30,136(4) 62 ld r9,72(r4)
54 ld r29,8(4) 63 std r6,80(r3)
55 std r25,656(3) 64 ld r10,80(r4)
56 std r24,528(3) 65 std r7,88(r3)
57 std r23,400(3) 66 ld r11,88(r4)
58 std r10,272(3) 67 std r8,96(r3)
59 std r8,144(3) 68 ld r12,96(r4)
60 std r6,16(3) 69 std r9,104(r3)
61 ld r22,656(4) 70 ld r5,104(r4)
62 ld r21,528(4) 71 std r10,112(r3)
63 ld r20,400(4) 72 ld r6,112(r4)
64 ld r11,272(4) 73 std r11,120(r3)
65 ld r9,144(4) 74 ld r7,120(r4)
66 ld r7,16(4) 75 stdu r12,128(r3)
67 std r28,664(3) 76 ldu r8,128(r4)
68 std r27,536(3)
69 std r26,408(3)
70 std r31,280(3)
71 std r30,152(3)
72 stdu r29,24(3)
73 ld r25,664(4)
74 ld r24,536(4)
75 ld r23,408(4)
76 ld r10,280(4)
77 ld r8,152(4)
78 ldu r6,24(4)
79 bdnz 1b 77 bdnz 1b
80 std r22,648(3) 78
81 std r21,520(3) 79 std r5,8(r3)
82 std r20,392(3) 80 ld r9,8(r4)
83 std r11,264(3) 81 std r6,16(r3)
84 std r9,136(3) 82 ld r10,16(r4)
85 std r7,8(3) 83 std r7,24(r3)
86 addi r4,r4,640 84 ld r11,24(r4)
87 addi r3,r3,648 85 std r8,32(r3)
88 bge 0b 86 ld r12,32(r4)
89 mtctr r5 87 std r9,40(r3)
90 ld r7,0(4) 88 ld r5,40(r4)
91 ld r8,8(4) 89 std r10,48(r3)
92 ldu r9,16(4) 90 ld r6,48(r4)
933: ld r10,8(4) 91 std r11,56(r3)
94 std r7,8(3) 92 ld r7,56(r4)
95 ld r7,16(4) 93 std r12,64(r3)
96 std r8,16(3) 94 ld r8,64(r4)
97 ld r8,24(4) 95 std r5,72(r3)
98 std r9,24(3) 96 ld r9,72(r4)
99 ldu r9,32(4) 97 std r6,80(r3)
100 stdu r10,32(3) 98 ld r10,80(r4)
101 bdnz 3b 99 std r7,88(r3)
1024: ld r10,8(4) 100 ld r11,88(r4)
103 std r7,8(3) 101 std r8,96(r3)
104 std r8,16(3) 102 ld r12,96(r4)
105 std r9,24(3) 103 std r9,104(r3)
106 std r10,32(3) 104 std r10,112(r3)
1079: ld r20,-96(1) 105 std r11,120(r3)
108 ld r21,-88(1) 106 std r12,128(r3)
109 ld r22,-80(1)
110 ld r23,-72(1)
111 ld r24,-64(1)
112 ld r25,-56(1)
113 ld r26,-48(1)
114 ld r27,-40(1)
115 ld r28,-32(1)
116 ld r29,-24(1)
117 ld r30,-16(1)
118 ld r31,-8(1)
119 blr 107 blr
diff --git a/arch/powerpc/lib/dma-noncoherent.c b/arch/powerpc/lib/dma-noncoherent.c
index 5d83907f6591..31734c0969cd 100644
--- a/arch/powerpc/lib/dma-noncoherent.c
+++ b/arch/powerpc/lib/dma-noncoherent.c
@@ -203,7 +203,7 @@ __dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp)
203 /* 203 /*
204 * Set the "dma handle" 204 * Set the "dma handle"
205 */ 205 */
206 *handle = page_to_bus(page); 206 *handle = page_to_phys(page);
207 207
208 do { 208 do {
209 BUG_ON(!pte_none(*pte)); 209 BUG_ON(!pte_none(*pte));
diff --git a/arch/powerpc/math-emu/Makefile b/arch/powerpc/math-emu/Makefile
index 29bc9126241b..03aa98dd9f0a 100644
--- a/arch/powerpc/math-emu/Makefile
+++ b/arch/powerpc/math-emu/Makefile
@@ -4,13 +4,14 @@ obj-y := math.o fmr.o lfd.o stfd.o
4obj-$(CONFIG_MATH_EMULATION) += fabs.o fadd.o fadds.o fcmpo.o fcmpu.o \ 4obj-$(CONFIG_MATH_EMULATION) += fabs.o fadd.o fadds.o fcmpo.o fcmpu.o \
5 fctiw.o fctiwz.o fdiv.o fdivs.o \ 5 fctiw.o fctiwz.o fdiv.o fdivs.o \
6 fmadd.o fmadds.o fmsub.o fmsubs.o \ 6 fmadd.o fmadds.o fmsub.o fmsubs.o \
7 fmul.o fmuls.o fnabs.o fneg.o types.o \ 7 fmul.o fmuls.o fnabs.o fneg.o \
8 fnmadd.o fnmadds.o fnmsub.o fnmsubs.o \ 8 fnmadd.o fnmadds.o fnmsub.o fnmsubs.o \
9 fres.o frsp.o frsqrte.o fsel.o lfs.o \ 9 fres.o frsp.o frsqrte.o fsel.o lfs.o \
10 fsqrt.o fsqrts.o fsub.o fsubs.o \ 10 fsqrt.o fsqrts.o fsub.o fsubs.o \
11 mcrfs.o mffs.o mtfsb0.o mtfsb1.o \ 11 mcrfs.o mffs.o mtfsb0.o mtfsb1.o \
12 mtfsf.o mtfsfi.o stfiwx.o stfs.o \ 12 mtfsf.o mtfsfi.o stfiwx.o stfs.o
13 udivmodti4.o
14 13
15CFLAGS_fabs.o = -fno-builtin-fabs 14CFLAGS_fabs.o = -fno-builtin-fabs
16CFLAGS_math.o = -fno-builtin-fabs 15CFLAGS_math.o = -fno-builtin-fabs
16
17EXTRA_CFLAGS = -I. -Iinclude/math-emu -w
diff --git a/arch/powerpc/math-emu/double.h b/arch/powerpc/math-emu/double.h
deleted file mode 100644
index ffba8b67f059..000000000000
--- a/arch/powerpc/math-emu/double.h
+++ /dev/null
@@ -1,129 +0,0 @@
1/*
2 * Definitions for IEEE Double Precision
3 */
4
5#if _FP_W_TYPE_SIZE < 32
6#error "Here's a nickel kid. Go buy yourself a real computer."
7#endif
8
9#if _FP_W_TYPE_SIZE < 64
10#define _FP_FRACTBITS_D (2 * _FP_W_TYPE_SIZE)
11#else
12#define _FP_FRACTBITS_D _FP_W_TYPE_SIZE
13#endif
14
15#define _FP_FRACBITS_D 53
16#define _FP_FRACXBITS_D (_FP_FRACTBITS_D - _FP_FRACBITS_D)
17#define _FP_WFRACBITS_D (_FP_WORKBITS + _FP_FRACBITS_D)
18#define _FP_WFRACXBITS_D (_FP_FRACTBITS_D - _FP_WFRACBITS_D)
19#define _FP_EXPBITS_D 11
20#define _FP_EXPBIAS_D 1023
21#define _FP_EXPMAX_D 2047
22
23#define _FP_QNANBIT_D \
24 ((_FP_W_TYPE)1 << ((_FP_FRACBITS_D-2) % _FP_W_TYPE_SIZE))
25#define _FP_IMPLBIT_D \
26 ((_FP_W_TYPE)1 << ((_FP_FRACBITS_D-1) % _FP_W_TYPE_SIZE))
27#define _FP_OVERFLOW_D \
28 ((_FP_W_TYPE)1 << (_FP_WFRACBITS_D % _FP_W_TYPE_SIZE))
29
30#if _FP_W_TYPE_SIZE < 64
31
32union _FP_UNION_D
33{
34 double flt;
35 struct {
36#if __BYTE_ORDER == __BIG_ENDIAN
37 unsigned sign : 1;
38 unsigned exp : _FP_EXPBITS_D;
39 unsigned frac1 : _FP_FRACBITS_D - (_FP_IMPLBIT_D != 0) - _FP_W_TYPE_SIZE;
40 unsigned frac0 : _FP_W_TYPE_SIZE;
41#else
42 unsigned frac0 : _FP_W_TYPE_SIZE;
43 unsigned frac1 : _FP_FRACBITS_D - (_FP_IMPLBIT_D != 0) - _FP_W_TYPE_SIZE;
44 unsigned exp : _FP_EXPBITS_D;
45 unsigned sign : 1;
46#endif
47 } bits __attribute__((packed));
48};
49
50#define FP_DECL_D(X) _FP_DECL(2,X)
51#define FP_UNPACK_RAW_D(X,val) _FP_UNPACK_RAW_2(D,X,val)
52#define FP_PACK_RAW_D(val,X) _FP_PACK_RAW_2(D,val,X)
53
54#define FP_UNPACK_D(X,val) \
55 do { \
56 _FP_UNPACK_RAW_2(D,X,val); \
57 _FP_UNPACK_CANONICAL(D,2,X); \
58 } while (0)
59
60#define FP_PACK_D(val,X) \
61 do { \
62 _FP_PACK_CANONICAL(D,2,X); \
63 _FP_PACK_RAW_2(D,val,X); \
64 } while (0)
65
66#define FP_NEG_D(R,X) _FP_NEG(D,2,R,X)
67#define FP_ADD_D(R,X,Y) _FP_ADD(D,2,R,X,Y)
68#define FP_SUB_D(R,X,Y) _FP_SUB(D,2,R,X,Y)
69#define FP_MUL_D(R,X,Y) _FP_MUL(D,2,R,X,Y)
70#define FP_DIV_D(R,X,Y) _FP_DIV(D,2,R,X,Y)
71#define FP_SQRT_D(R,X) _FP_SQRT(D,2,R,X)
72
73#define FP_CMP_D(r,X,Y,un) _FP_CMP(D,2,r,X,Y,un)
74#define FP_CMP_EQ_D(r,X,Y) _FP_CMP_EQ(D,2,r,X,Y)
75
76#define FP_TO_INT_D(r,X,rsz,rsg) _FP_TO_INT(D,2,r,X,rsz,rsg)
77#define FP_FROM_INT_D(X,r,rs,rt) _FP_FROM_INT(D,2,X,r,rs,rt)
78
79#else
80
81union _FP_UNION_D
82{
83 double flt;
84 struct {
85#if __BYTE_ORDER == __BIG_ENDIAN
86 unsigned sign : 1;
87 unsigned exp : _FP_EXPBITS_D;
88 unsigned long frac : _FP_FRACBITS_D - (_FP_IMPLBIT_D != 0);
89#else
90 unsigned long frac : _FP_FRACBITS_D - (_FP_IMPLBIT_D != 0);
91 unsigned exp : _FP_EXPBITS_D;
92 unsigned sign : 1;
93#endif
94 } bits __attribute__((packed));
95};
96
97#define FP_DECL_D(X) _FP_DECL(1,X)
98#define FP_UNPACK_RAW_D(X,val) _FP_UNPACK_RAW_1(D,X,val)
99#define FP_PACK_RAW_D(val,X) _FP_PACK_RAW_1(D,val,X)
100
101#define FP_UNPACK_D(X,val) \
102 do { \
103 _FP_UNPACK_RAW_1(D,X,val); \
104 _FP_UNPACK_CANONICAL(D,1,X); \
105 } while (0)
106
107#define FP_PACK_D(val,X) \
108 do { \
109 _FP_PACK_CANONICAL(D,1,X); \
110 _FP_PACK_RAW_1(D,val,X); \
111 } while (0)
112
113#define FP_NEG_D(R,X) _FP_NEG(D,1,R,X)
114#define FP_ADD_D(R,X,Y) _FP_ADD(D,1,R,X,Y)
115#define FP_SUB_D(R,X,Y) _FP_SUB(D,1,R,X,Y)
116#define FP_MUL_D(R,X,Y) _FP_MUL(D,1,R,X,Y)
117#define FP_DIV_D(R,X,Y) _FP_DIV(D,1,R,X,Y)
118#define FP_SQRT_D(R,X) _FP_SQRT(D,1,R,X)
119
120/* The implementation of _FP_MUL_D and _FP_DIV_D should be chosen by
121 the target machine. */
122
123#define FP_CMP_D(r,X,Y,un) _FP_CMP(D,1,r,X,Y,un)
124#define FP_CMP_EQ_D(r,X,Y) _FP_CMP_EQ(D,1,r,X,Y)
125
126#define FP_TO_INT_D(r,X,rsz,rsg) _FP_TO_INT(D,1,r,X,rsz,rsg)
127#define FP_FROM_INT_D(X,r,rs,rt) _FP_FROM_INT(D,1,X,r,rs,rt)
128
129#endif /* W_TYPE_SIZE < 64 */
diff --git a/arch/powerpc/math-emu/fadd.c b/arch/powerpc/math-emu/fadd.c
index 7befbbf2c332..04d3b4aa32ce 100644
--- a/arch/powerpc/math-emu/fadd.c
+++ b/arch/powerpc/math-emu/fadd.c
@@ -2,8 +2,9 @@
2#include <linux/errno.h> 2#include <linux/errno.h>
3#include <asm/uaccess.h> 3#include <asm/uaccess.h>
4 4
5#include "soft-fp.h" 5#include <asm/sfp-machine.h>
6#include "double.h" 6#include <math-emu/soft-fp.h>
7#include <math-emu/double.h>
7 8
8int 9int
9fadd(void *frD, void *frA, void *frB) 10fadd(void *frD, void *frA, void *frB)
@@ -11,28 +12,28 @@ fadd(void *frD, void *frA, void *frB)
11 FP_DECL_D(A); 12 FP_DECL_D(A);
12 FP_DECL_D(B); 13 FP_DECL_D(B);
13 FP_DECL_D(R); 14 FP_DECL_D(R);
15 FP_DECL_EX;
14 int ret = 0; 16 int ret = 0;
15 17
16#ifdef DEBUG 18#ifdef DEBUG
17 printk("%s: %p %p %p\n", __func__, frD, frA, frB); 19 printk("%s: %p %p %p\n", __func__, frD, frA, frB);
18#endif 20#endif
19 21
20 __FP_UNPACK_D(A, frA); 22 FP_UNPACK_DP(A, frA);
21 __FP_UNPACK_D(B, frB); 23 FP_UNPACK_DP(B, frB);
22 24
23#ifdef DEBUG 25#ifdef DEBUG
24 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c); 26 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
25 printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c); 27 printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
26#endif 28#endif
27 29
28 if (A_s != B_s && A_c == FP_CLS_INF && B_c == FP_CLS_INF)
29 ret |= EFLAG_VXISI;
30
31 FP_ADD_D(R, A, B); 30 FP_ADD_D(R, A, B);
32 31
33#ifdef DEBUG 32#ifdef DEBUG
34 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c); 33 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
35#endif 34#endif
36 35
37 return (ret | __FP_PACK_D(frD, R)); 36 __FP_PACK_D(frD, R);
37
38 return FP_CUR_EXCEPTIONS;
38} 39}
diff --git a/arch/powerpc/math-emu/fadds.c b/arch/powerpc/math-emu/fadds.c
index 2b346b38b480..5930f40a8687 100644
--- a/arch/powerpc/math-emu/fadds.c
+++ b/arch/powerpc/math-emu/fadds.c
@@ -2,9 +2,10 @@
2#include <linux/errno.h> 2#include <linux/errno.h>
3#include <asm/uaccess.h> 3#include <asm/uaccess.h>
4 4
5#include "soft-fp.h" 5#include <asm/sfp-machine.h>
6#include "double.h" 6#include <math-emu/soft-fp.h>
7#include "single.h" 7#include <math-emu/double.h>
8#include <math-emu/single.h>
8 9
9int 10int
10fadds(void *frD, void *frA, void *frB) 11fadds(void *frD, void *frA, void *frB)
@@ -12,28 +13,27 @@ fadds(void *frD, void *frA, void *frB)
12 FP_DECL_D(A); 13 FP_DECL_D(A);
13 FP_DECL_D(B); 14 FP_DECL_D(B);
14 FP_DECL_D(R); 15 FP_DECL_D(R);
15 int ret = 0; 16 FP_DECL_EX;
16 17
17#ifdef DEBUG 18#ifdef DEBUG
18 printk("%s: %p %p %p\n", __func__, frD, frA, frB); 19 printk("%s: %p %p %p\n", __func__, frD, frA, frB);
19#endif 20#endif
20 21
21 __FP_UNPACK_D(A, frA); 22 FP_UNPACK_DP(A, frA);
22 __FP_UNPACK_D(B, frB); 23 FP_UNPACK_DP(B, frB);
23 24
24#ifdef DEBUG 25#ifdef DEBUG
25 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c); 26 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
26 printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c); 27 printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
27#endif 28#endif
28 29
29 if (A_s != B_s && A_c == FP_CLS_INF && B_c == FP_CLS_INF)
30 ret |= EFLAG_VXISI;
31
32 FP_ADD_D(R, A, B); 30 FP_ADD_D(R, A, B);
33 31
34#ifdef DEBUG 32#ifdef DEBUG
35 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c); 33 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
36#endif 34#endif
37 35
38 return (ret | __FP_PACK_DS(frD, R)); 36 __FP_PACK_DS(frD, R);
37
38 return FP_CUR_EXCEPTIONS;
39} 39}
diff --git a/arch/powerpc/math-emu/fcmpo.c b/arch/powerpc/math-emu/fcmpo.c
index 36d689044c63..b5dc4498cd71 100644
--- a/arch/powerpc/math-emu/fcmpo.c
+++ b/arch/powerpc/math-emu/fcmpo.c
@@ -2,14 +2,16 @@
2#include <linux/errno.h> 2#include <linux/errno.h>
3#include <asm/uaccess.h> 3#include <asm/uaccess.h>
4 4
5#include "soft-fp.h" 5#include <asm/sfp-machine.h>
6#include "double.h" 6#include <math-emu/soft-fp.h>
7#include <math-emu/double.h>
7 8
8int 9int
9fcmpo(u32 *ccr, int crfD, void *frA, void *frB) 10fcmpo(u32 *ccr, int crfD, void *frA, void *frB)
10{ 11{
11 FP_DECL_D(A); 12 FP_DECL_D(A);
12 FP_DECL_D(B); 13 FP_DECL_D(B);
14 FP_DECL_EX;
13 int code[4] = { (1 << 3), (1 << 1), (1 << 2), (1 << 0) }; 15 int code[4] = { (1 << 3), (1 << 1), (1 << 2), (1 << 0) };
14 long cmp; 16 long cmp;
15 int ret = 0; 17 int ret = 0;
@@ -18,8 +20,8 @@ fcmpo(u32 *ccr, int crfD, void *frA, void *frB)
18 printk("%s: %p (%08x) %d %p %p\n", __func__, ccr, *ccr, crfD, frA, frB); 20 printk("%s: %p (%08x) %d %p %p\n", __func__, ccr, *ccr, crfD, frA, frB);
19#endif 21#endif
20 22
21 __FP_UNPACK_D(A, frA); 23 FP_UNPACK_DP(A, frA);
22 __FP_UNPACK_D(B, frB); 24 FP_UNPACK_DP(B, frB);
23 25
24#ifdef DEBUG 26#ifdef DEBUG
25 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c); 27 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
diff --git a/arch/powerpc/math-emu/fcmpu.c b/arch/powerpc/math-emu/fcmpu.c
index 53d93894f2a6..d4fb1babc6ad 100644
--- a/arch/powerpc/math-emu/fcmpu.c
+++ b/arch/powerpc/math-emu/fcmpu.c
@@ -2,14 +2,16 @@
2#include <linux/errno.h> 2#include <linux/errno.h>
3#include <asm/uaccess.h> 3#include <asm/uaccess.h>
4 4
5#include "soft-fp.h" 5#include <asm/sfp-machine.h>
6#include "double.h" 6#include <math-emu/soft-fp.h>
7#include <math-emu/double.h>
7 8
8int 9int
9fcmpu(u32 *ccr, int crfD, void *frA, void *frB) 10fcmpu(u32 *ccr, int crfD, void *frA, void *frB)
10{ 11{
11 FP_DECL_D(A); 12 FP_DECL_D(A);
12 FP_DECL_D(B); 13 FP_DECL_D(B);
14 FP_DECL_EX;
13 int code[4] = { (1 << 3), (1 << 1), (1 << 2), (1 << 0) }; 15 int code[4] = { (1 << 3), (1 << 1), (1 << 2), (1 << 0) };
14 long cmp; 16 long cmp;
15 17
@@ -17,8 +19,8 @@ fcmpu(u32 *ccr, int crfD, void *frA, void *frB)
17 printk("%s: %p (%08x) %d %p %p\n", __func__, ccr, *ccr, crfD, frA, frB); 19 printk("%s: %p (%08x) %d %p %p\n", __func__, ccr, *ccr, crfD, frA, frB);
18#endif 20#endif
19 21
20 __FP_UNPACK_D(A, frA); 22 FP_UNPACK_DP(A, frA);
21 __FP_UNPACK_D(B, frB); 23 FP_UNPACK_DP(B, frB);
22 24
23#ifdef DEBUG 25#ifdef DEBUG
24 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c); 26 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
diff --git a/arch/powerpc/math-emu/fctiw.c b/arch/powerpc/math-emu/fctiw.c
index fcd7a95e021d..f694440ddc00 100644
--- a/arch/powerpc/math-emu/fctiw.c
+++ b/arch/powerpc/math-emu/fctiw.c
@@ -2,16 +2,18 @@
2#include <linux/errno.h> 2#include <linux/errno.h>
3#include <asm/uaccess.h> 3#include <asm/uaccess.h>
4 4
5#include "soft-fp.h" 5#include <asm/sfp-machine.h>
6#include "double.h" 6#include <math-emu/soft-fp.h>
7#include <math-emu/double.h>
7 8
8int 9int
9fctiw(u32 *frD, void *frB) 10fctiw(u32 *frD, void *frB)
10{ 11{
11 FP_DECL_D(B); 12 FP_DECL_D(B);
13 FP_DECL_EX;
12 unsigned int r; 14 unsigned int r;
13 15
14 __FP_UNPACK_D(B, frB); 16 FP_UNPACK_DP(B, frB);
15 FP_TO_INT_D(r, B, 32, 1); 17 FP_TO_INT_D(r, B, 32, 1);
16 frD[1] = r; 18 frD[1] = r;
17 19
diff --git a/arch/powerpc/math-emu/fctiwz.c b/arch/powerpc/math-emu/fctiwz.c
index 1514d59e146e..71e782fd4fe3 100644
--- a/arch/powerpc/math-emu/fctiwz.c
+++ b/arch/powerpc/math-emu/fctiwz.c
@@ -2,13 +2,15 @@
2#include <linux/errno.h> 2#include <linux/errno.h>
3#include <asm/uaccess.h> 3#include <asm/uaccess.h>
4 4
5#include "soft-fp.h" 5#include <asm/sfp-machine.h>
6#include "double.h" 6#include <math-emu/soft-fp.h>
7#include <math-emu/double.h>
7 8
8int 9int
9fctiwz(u32 *frD, void *frB) 10fctiwz(u32 *frD, void *frB)
10{ 11{
11 FP_DECL_D(B); 12 FP_DECL_D(B);
13 FP_DECL_EX;
12 u32 fpscr; 14 u32 fpscr;
13 unsigned int r; 15 unsigned int r;
14 16
@@ -16,7 +18,7 @@ fctiwz(u32 *frD, void *frB)
16 __FPU_FPSCR &= ~(3); 18 __FPU_FPSCR &= ~(3);
17 __FPU_FPSCR |= FP_RND_ZERO; 19 __FPU_FPSCR |= FP_RND_ZERO;
18 20
19 __FP_UNPACK_D(B, frB); 21 FP_UNPACK_DP(B, frB);
20 FP_TO_INT_D(r, B, 32, 1); 22 FP_TO_INT_D(r, B, 32, 1);
21 frD[1] = r; 23 frD[1] = r;
22 24
diff --git a/arch/powerpc/math-emu/fdiv.c b/arch/powerpc/math-emu/fdiv.c
index 18a20fe396b0..2db15097d98e 100644
--- a/arch/powerpc/math-emu/fdiv.c
+++ b/arch/powerpc/math-emu/fdiv.c
@@ -2,8 +2,9 @@
2#include <linux/errno.h> 2#include <linux/errno.h>
3#include <asm/uaccess.h> 3#include <asm/uaccess.h>
4 4
5#include "soft-fp.h" 5#include <asm/sfp-machine.h>
6#include "double.h" 6#include <math-emu/soft-fp.h>
7#include <math-emu/double.h>
7 8
8int 9int
9fdiv(void *frD, void *frA, void *frB) 10fdiv(void *frD, void *frA, void *frB)
@@ -11,14 +12,15 @@ fdiv(void *frD, void *frA, void *frB)
11 FP_DECL_D(A); 12 FP_DECL_D(A);
12 FP_DECL_D(B); 13 FP_DECL_D(B);
13 FP_DECL_D(R); 14 FP_DECL_D(R);
15 FP_DECL_EX;
14 int ret = 0; 16 int ret = 0;
15 17
16#ifdef DEBUG 18#ifdef DEBUG
17 printk("%s: %p %p %p\n", __func__, frD, frA, frB); 19 printk("%s: %p %p %p\n", __func__, frD, frA, frB);
18#endif 20#endif
19 21
20 __FP_UNPACK_D(A, frA); 22 FP_UNPACK_DP(A, frA);
21 __FP_UNPACK_D(B, frB); 23 FP_UNPACK_DP(B, frB);
22 24
23#ifdef DEBUG 25#ifdef DEBUG
24 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c); 26 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
@@ -49,5 +51,7 @@ fdiv(void *frD, void *frA, void *frB)
49 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c); 51 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
50#endif 52#endif
51 53
52 return (ret | __FP_PACK_D(frD, R)); 54 __FP_PACK_D(frD, R);
55
56 return FP_CUR_EXCEPTIONS;
53} 57}
diff --git a/arch/powerpc/math-emu/fdivs.c b/arch/powerpc/math-emu/fdivs.c
index 24feed689c35..797f6a9a20b5 100644
--- a/arch/powerpc/math-emu/fdivs.c
+++ b/arch/powerpc/math-emu/fdivs.c
@@ -2,9 +2,10 @@
2#include <linux/errno.h> 2#include <linux/errno.h>
3#include <asm/uaccess.h> 3#include <asm/uaccess.h>
4 4
5#include "soft-fp.h" 5#include <asm/sfp-machine.h>
6#include "double.h" 6#include <math-emu/soft-fp.h>
7#include "single.h" 7#include <math-emu/double.h>
8#include <math-emu/single.h>
8 9
9int 10int
10fdivs(void *frD, void *frA, void *frB) 11fdivs(void *frD, void *frA, void *frB)
@@ -12,14 +13,15 @@ fdivs(void *frD, void *frA, void *frB)
12 FP_DECL_D(A); 13 FP_DECL_D(A);
13 FP_DECL_D(B); 14 FP_DECL_D(B);
14 FP_DECL_D(R); 15 FP_DECL_D(R);
16 FP_DECL_EX;
15 int ret = 0; 17 int ret = 0;
16 18
17#ifdef DEBUG 19#ifdef DEBUG
18 printk("%s: %p %p %p\n", __func__, frD, frA, frB); 20 printk("%s: %p %p %p\n", __func__, frD, frA, frB);
19#endif 21#endif
20 22
21 __FP_UNPACK_D(A, frA); 23 FP_UNPACK_DP(A, frA);
22 __FP_UNPACK_D(B, frB); 24 FP_UNPACK_DP(B, frB);
23 25
24#ifdef DEBUG 26#ifdef DEBUG
25 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c); 27 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
@@ -51,5 +53,7 @@ fdivs(void *frD, void *frA, void *frB)
51 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c); 53 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
52#endif 54#endif
53 55
54 return (ret | __FP_PACK_DS(frD, R)); 56 __FP_PACK_DS(frD, R);
57
58 return FP_CUR_EXCEPTIONS;
55} 59}
diff --git a/arch/powerpc/math-emu/fmadd.c b/arch/powerpc/math-emu/fmadd.c
index dedb465fdc68..925313aa6f82 100644
--- a/arch/powerpc/math-emu/fmadd.c
+++ b/arch/powerpc/math-emu/fmadd.c
@@ -2,8 +2,9 @@
2#include <linux/errno.h> 2#include <linux/errno.h>
3#include <asm/uaccess.h> 3#include <asm/uaccess.h>
4 4
5#include "soft-fp.h" 5#include <asm/sfp-machine.h>
6#include "double.h" 6#include <math-emu/soft-fp.h>
7#include <math-emu/double.h>
7 8
8int 9int
9fmadd(void *frD, void *frA, void *frB, void *frC) 10fmadd(void *frD, void *frA, void *frB, void *frC)
@@ -13,15 +14,16 @@ fmadd(void *frD, void *frA, void *frB, void *frC)
13 FP_DECL_D(B); 14 FP_DECL_D(B);
14 FP_DECL_D(C); 15 FP_DECL_D(C);
15 FP_DECL_D(T); 16 FP_DECL_D(T);
17 FP_DECL_EX;
16 int ret = 0; 18 int ret = 0;
17 19
18#ifdef DEBUG 20#ifdef DEBUG
19 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC); 21 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC);
20#endif 22#endif
21 23
22 __FP_UNPACK_D(A, frA); 24 FP_UNPACK_DP(A, frA);
23 __FP_UNPACK_D(B, frB); 25 FP_UNPACK_DP(B, frB);
24 __FP_UNPACK_D(C, frC); 26 FP_UNPACK_DP(C, frC);
25 27
26#ifdef DEBUG 28#ifdef DEBUG
27 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c); 29 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
@@ -44,5 +46,7 @@ fmadd(void *frD, void *frA, void *frB, void *frC)
44 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c); 46 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
45#endif 47#endif
46 48
47 return (ret | __FP_PACK_D(frD, R)); 49 __FP_PACK_D(frD, R);
50
51 return FP_CUR_EXCEPTIONS;
48} 52}
diff --git a/arch/powerpc/math-emu/fmadds.c b/arch/powerpc/math-emu/fmadds.c
index 6bbb56d5502c..aea80ef79399 100644
--- a/arch/powerpc/math-emu/fmadds.c
+++ b/arch/powerpc/math-emu/fmadds.c
@@ -2,9 +2,10 @@
2#include <linux/errno.h> 2#include <linux/errno.h>
3#include <asm/uaccess.h> 3#include <asm/uaccess.h>
4 4
5#include "soft-fp.h" 5#include <asm/sfp-machine.h>
6#include "double.h" 6#include <math-emu/soft-fp.h>
7#include "single.h" 7#include <math-emu/double.h>
8#include <math-emu/single.h>
8 9
9int 10int
10fmadds(void *frD, void *frA, void *frB, void *frC) 11fmadds(void *frD, void *frA, void *frB, void *frC)
@@ -14,15 +15,16 @@ fmadds(void *frD, void *frA, void *frB, void *frC)
14 FP_DECL_D(B); 15 FP_DECL_D(B);
15 FP_DECL_D(C); 16 FP_DECL_D(C);
16 FP_DECL_D(T); 17 FP_DECL_D(T);
18 FP_DECL_EX;
17 int ret = 0; 19 int ret = 0;
18 20
19#ifdef DEBUG 21#ifdef DEBUG
20 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC); 22 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC);
21#endif 23#endif
22 24
23 __FP_UNPACK_D(A, frA); 25 FP_UNPACK_DP(A, frA);
24 __FP_UNPACK_D(B, frB); 26 FP_UNPACK_DP(B, frB);
25 __FP_UNPACK_D(C, frC); 27 FP_UNPACK_DP(C, frC);
26 28
27#ifdef DEBUG 29#ifdef DEBUG
28 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c); 30 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
@@ -45,5 +47,7 @@ fmadds(void *frD, void *frA, void *frB, void *frC)
45 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c); 47 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
46#endif 48#endif
47 49
48 return (ret | __FP_PACK_DS(frD, R)); 50 __FP_PACK_DS(frD, R);
51
52 return FP_CUR_EXCEPTIONS;
49} 53}
diff --git a/arch/powerpc/math-emu/fmsub.c b/arch/powerpc/math-emu/fmsub.c
index f311e2c7e67e..a644d525fca6 100644
--- a/arch/powerpc/math-emu/fmsub.c
+++ b/arch/powerpc/math-emu/fmsub.c
@@ -2,8 +2,9 @@
2#include <linux/errno.h> 2#include <linux/errno.h>
3#include <asm/uaccess.h> 3#include <asm/uaccess.h>
4 4
5#include "soft-fp.h" 5#include <asm/sfp-machine.h>
6#include "double.h" 6#include <math-emu/soft-fp.h>
7#include <math-emu/double.h>
7 8
8int 9int
9fmsub(void *frD, void *frA, void *frB, void *frC) 10fmsub(void *frD, void *frA, void *frB, void *frC)
@@ -13,15 +14,16 @@ fmsub(void *frD, void *frA, void *frB, void *frC)
13 FP_DECL_D(B); 14 FP_DECL_D(B);
14 FP_DECL_D(C); 15 FP_DECL_D(C);
15 FP_DECL_D(T); 16 FP_DECL_D(T);
17 FP_DECL_EX;
16 int ret = 0; 18 int ret = 0;
17 19
18#ifdef DEBUG 20#ifdef DEBUG
19 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC); 21 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC);
20#endif 22#endif
21 23
22 __FP_UNPACK_D(A, frA); 24 FP_UNPACK_DP(A, frA);
23 __FP_UNPACK_D(B, frB); 25 FP_UNPACK_DP(B, frB);
24 __FP_UNPACK_D(C, frC); 26 FP_UNPACK_DP(C, frC);
25 27
26#ifdef DEBUG 28#ifdef DEBUG
27 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c); 29 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
@@ -47,5 +49,7 @@ fmsub(void *frD, void *frA, void *frB, void *frC)
47 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c); 49 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
48#endif 50#endif
49 51
50 return (ret | __FP_PACK_D(frD, R)); 52 __FP_PACK_D(frD, R);
53
54 return FP_CUR_EXCEPTIONS;
51} 55}
diff --git a/arch/powerpc/math-emu/fmsubs.c b/arch/powerpc/math-emu/fmsubs.c
index 81a716d3ee2e..2fdeeb9bb569 100644
--- a/arch/powerpc/math-emu/fmsubs.c
+++ b/arch/powerpc/math-emu/fmsubs.c
@@ -2,9 +2,10 @@
2#include <linux/errno.h> 2#include <linux/errno.h>
3#include <asm/uaccess.h> 3#include <asm/uaccess.h>
4 4
5#include "soft-fp.h" 5#include <asm/sfp-machine.h>
6#include "double.h" 6#include <math-emu/soft-fp.h>
7#include "single.h" 7#include <math-emu/double.h>
8#include <math-emu/single.h>
8 9
9int 10int
10fmsubs(void *frD, void *frA, void *frB, void *frC) 11fmsubs(void *frD, void *frA, void *frB, void *frC)
@@ -14,15 +15,16 @@ fmsubs(void *frD, void *frA, void *frB, void *frC)
14 FP_DECL_D(B); 15 FP_DECL_D(B);
15 FP_DECL_D(C); 16 FP_DECL_D(C);
16 FP_DECL_D(T); 17 FP_DECL_D(T);
18 FP_DECL_EX;
17 int ret = 0; 19 int ret = 0;
18 20
19#ifdef DEBUG 21#ifdef DEBUG
20 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC); 22 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC);
21#endif 23#endif
22 24
23 __FP_UNPACK_D(A, frA); 25 FP_UNPACK_DP(A, frA);
24 __FP_UNPACK_D(B, frB); 26 FP_UNPACK_DP(B, frB);
25 __FP_UNPACK_D(C, frC); 27 FP_UNPACK_DP(C, frC);
26 28
27#ifdef DEBUG 29#ifdef DEBUG
28 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c); 30 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
@@ -48,5 +50,7 @@ fmsubs(void *frD, void *frA, void *frB, void *frC)
48 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c); 50 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
49#endif 51#endif
50 52
51 return (ret | __FP_PACK_DS(frD, R)); 53 __FP_PACK_DS(frD, R);
54
55 return FP_CUR_EXCEPTIONS;
52} 56}
diff --git a/arch/powerpc/math-emu/fmul.c b/arch/powerpc/math-emu/fmul.c
index 2f3d32784a04..391fd17d3440 100644
--- a/arch/powerpc/math-emu/fmul.c
+++ b/arch/powerpc/math-emu/fmul.c
@@ -2,8 +2,9 @@
2#include <linux/errno.h> 2#include <linux/errno.h>
3#include <asm/uaccess.h> 3#include <asm/uaccess.h>
4 4
5#include "soft-fp.h" 5#include <asm/sfp-machine.h>
6#include "double.h" 6#include <math-emu/soft-fp.h>
7#include <math-emu/double.h>
7 8
8int 9int
9fmul(void *frD, void *frA, void *frB) 10fmul(void *frD, void *frA, void *frB)
@@ -11,14 +12,15 @@ fmul(void *frD, void *frA, void *frB)
11 FP_DECL_D(A); 12 FP_DECL_D(A);
12 FP_DECL_D(B); 13 FP_DECL_D(B);
13 FP_DECL_D(R); 14 FP_DECL_D(R);
15 FP_DECL_EX;
14 int ret = 0; 16 int ret = 0;
15 17
16#ifdef DEBUG 18#ifdef DEBUG
17 printk("%s: %p %p %p\n", __func__, frD, frA, frB); 19 printk("%s: %p %p %p\n", __func__, frD, frA, frB);
18#endif 20#endif
19 21
20 __FP_UNPACK_D(A, frA); 22 FP_UNPACK_DP(A, frA);
21 __FP_UNPACK_D(B, frB); 23 FP_UNPACK_DP(B, frB);
22 24
23#ifdef DEBUG 25#ifdef DEBUG
24 printk("A: %ld %lu %lu %ld (%ld) [%08lx.%08lx %lx]\n", 26 printk("A: %ld %lu %lu %ld (%ld) [%08lx.%08lx %lx]\n",
@@ -38,5 +40,7 @@ fmul(void *frD, void *frA, void *frB)
38 R_s, R_f1, R_f0, R_e, R_c, R_f1, R_f0, R_e + 1023); 40 R_s, R_f1, R_f0, R_e, R_c, R_f1, R_f0, R_e + 1023);
39#endif 41#endif
40 42
41 return (ret | __FP_PACK_D(frD, R)); 43 __FP_PACK_D(frD, R);
44
45 return FP_CUR_EXCEPTIONS;
42} 46}
diff --git a/arch/powerpc/math-emu/fmuls.c b/arch/powerpc/math-emu/fmuls.c
index 962b5883f784..2d3ec5f7da20 100644
--- a/arch/powerpc/math-emu/fmuls.c
+++ b/arch/powerpc/math-emu/fmuls.c
@@ -2,9 +2,10 @@
2#include <linux/errno.h> 2#include <linux/errno.h>
3#include <asm/uaccess.h> 3#include <asm/uaccess.h>
4 4
5#include "soft-fp.h" 5#include <asm/sfp-machine.h>
6#include "double.h" 6#include <math-emu/soft-fp.h>
7#include "single.h" 7#include <math-emu/double.h>
8#include <math-emu/single.h>
8 9
9int 10int
10fmuls(void *frD, void *frA, void *frB) 11fmuls(void *frD, void *frA, void *frB)
@@ -12,14 +13,15 @@ fmuls(void *frD, void *frA, void *frB)
12 FP_DECL_D(A); 13 FP_DECL_D(A);
13 FP_DECL_D(B); 14 FP_DECL_D(B);
14 FP_DECL_D(R); 15 FP_DECL_D(R);
16 FP_DECL_EX;
15 int ret = 0; 17 int ret = 0;
16 18
17#ifdef DEBUG 19#ifdef DEBUG
18 printk("%s: %p %p %p\n", __func__, frD, frA, frB); 20 printk("%s: %p %p %p\n", __func__, frD, frA, frB);
19#endif 21#endif
20 22
21 __FP_UNPACK_D(A, frA); 23 FP_UNPACK_DP(A, frA);
22 __FP_UNPACK_D(B, frB); 24 FP_UNPACK_DP(B, frB);
23 25
24#ifdef DEBUG 26#ifdef DEBUG
25 printk("A: %ld %lu %lu %ld (%ld) [%08lx.%08lx %lx]\n", 27 printk("A: %ld %lu %lu %ld (%ld) [%08lx.%08lx %lx]\n",
@@ -39,5 +41,7 @@ fmuls(void *frD, void *frA, void *frB)
39 R_s, R_f1, R_f0, R_e, R_c, R_f1, R_f0, R_e + 1023); 41 R_s, R_f1, R_f0, R_e, R_c, R_f1, R_f0, R_e + 1023);
40#endif 42#endif
41 43
42 return (ret | __FP_PACK_DS(frD, R)); 44 __FP_PACK_DS(frD, R);
45
46 return FP_CUR_EXCEPTIONS;
43} 47}
diff --git a/arch/powerpc/math-emu/fnmadd.c b/arch/powerpc/math-emu/fnmadd.c
index 8cf7827c4fb5..2497b86494e5 100644
--- a/arch/powerpc/math-emu/fnmadd.c
+++ b/arch/powerpc/math-emu/fnmadd.c
@@ -2,8 +2,9 @@
2#include <linux/errno.h> 2#include <linux/errno.h>
3#include <asm/uaccess.h> 3#include <asm/uaccess.h>
4 4
5#include "soft-fp.h" 5#include <asm/sfp-machine.h>
6#include "double.h" 6#include <math-emu/soft-fp.h>
7#include <math-emu/double.h>
7 8
8int 9int
9fnmadd(void *frD, void *frA, void *frB, void *frC) 10fnmadd(void *frD, void *frA, void *frB, void *frC)
@@ -13,15 +14,16 @@ fnmadd(void *frD, void *frA, void *frB, void *frC)
13 FP_DECL_D(B); 14 FP_DECL_D(B);
14 FP_DECL_D(C); 15 FP_DECL_D(C);
15 FP_DECL_D(T); 16 FP_DECL_D(T);
17 FP_DECL_EX;
16 int ret = 0; 18 int ret = 0;
17 19
18#ifdef DEBUG 20#ifdef DEBUG
19 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC); 21 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC);
20#endif 22#endif
21 23
22 __FP_UNPACK_D(A, frA); 24 FP_UNPACK_DP(A, frA);
23 __FP_UNPACK_D(B, frB); 25 FP_UNPACK_DP(B, frB);
24 __FP_UNPACK_D(C, frC); 26 FP_UNPACK_DP(C, frC);
25 27
26#ifdef DEBUG 28#ifdef DEBUG
27 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c); 29 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
@@ -47,5 +49,7 @@ fnmadd(void *frD, void *frA, void *frB, void *frC)
47 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c); 49 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
48#endif 50#endif
49 51
50 return (ret | __FP_PACK_D(frD, R)); 52 __FP_PACK_D(frD, R);
53
54 return FP_CUR_EXCEPTIONS;
51} 55}
diff --git a/arch/powerpc/math-emu/fnmadds.c b/arch/powerpc/math-emu/fnmadds.c
index f1c4f0f0d807..ee9d71e0b376 100644
--- a/arch/powerpc/math-emu/fnmadds.c
+++ b/arch/powerpc/math-emu/fnmadds.c
@@ -2,9 +2,10 @@
2#include <linux/errno.h> 2#include <linux/errno.h>
3#include <asm/uaccess.h> 3#include <asm/uaccess.h>
4 4
5#include "soft-fp.h" 5#include <asm/sfp-machine.h>
6#include "double.h" 6#include <math-emu/soft-fp.h>
7#include "single.h" 7#include <math-emu/double.h>
8#include <math-emu/single.h>
8 9
9int 10int
10fnmadds(void *frD, void *frA, void *frB, void *frC) 11fnmadds(void *frD, void *frA, void *frB, void *frC)
@@ -14,15 +15,16 @@ fnmadds(void *frD, void *frA, void *frB, void *frC)
14 FP_DECL_D(B); 15 FP_DECL_D(B);
15 FP_DECL_D(C); 16 FP_DECL_D(C);
16 FP_DECL_D(T); 17 FP_DECL_D(T);
18 FP_DECL_EX;
17 int ret = 0; 19 int ret = 0;
18 20
19#ifdef DEBUG 21#ifdef DEBUG
20 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC); 22 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC);
21#endif 23#endif
22 24
23 __FP_UNPACK_D(A, frA); 25 FP_UNPACK_DP(A, frA);
24 __FP_UNPACK_D(B, frB); 26 FP_UNPACK_DP(B, frB);
25 __FP_UNPACK_D(C, frC); 27 FP_UNPACK_DP(C, frC);
26 28
27#ifdef DEBUG 29#ifdef DEBUG
28 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c); 30 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
@@ -48,5 +50,7 @@ fnmadds(void *frD, void *frA, void *frB, void *frC)
48 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c); 50 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
49#endif 51#endif
50 52
51 return (ret | __FP_PACK_DS(frD, R)); 53 __FP_PACK_DS(frD, R);
54
55 return FP_CUR_EXCEPTIONS;
52} 56}
diff --git a/arch/powerpc/math-emu/fnmsub.c b/arch/powerpc/math-emu/fnmsub.c
index 98944e6e2601..3885a77acc93 100644
--- a/arch/powerpc/math-emu/fnmsub.c
+++ b/arch/powerpc/math-emu/fnmsub.c
@@ -2,8 +2,9 @@
2#include <linux/errno.h> 2#include <linux/errno.h>
3#include <asm/uaccess.h> 3#include <asm/uaccess.h>
4 4
5#include "soft-fp.h" 5#include <asm/sfp-machine.h>
6#include "double.h" 6#include <math-emu/soft-fp.h>
7#include <math-emu/double.h>
7 8
8int 9int
9fnmsub(void *frD, void *frA, void *frB, void *frC) 10fnmsub(void *frD, void *frA, void *frB, void *frC)
@@ -13,15 +14,16 @@ fnmsub(void *frD, void *frA, void *frB, void *frC)
13 FP_DECL_D(B); 14 FP_DECL_D(B);
14 FP_DECL_D(C); 15 FP_DECL_D(C);
15 FP_DECL_D(T); 16 FP_DECL_D(T);
17 FP_DECL_EX;
16 int ret = 0; 18 int ret = 0;
17 19
18#ifdef DEBUG 20#ifdef DEBUG
19 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC); 21 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC);
20#endif 22#endif
21 23
22 __FP_UNPACK_D(A, frA); 24 FP_UNPACK_DP(A, frA);
23 __FP_UNPACK_D(B, frB); 25 FP_UNPACK_DP(B, frB);
24 __FP_UNPACK_D(C, frC); 26 FP_UNPACK_DP(C, frC);
25 27
26#ifdef DEBUG 28#ifdef DEBUG
27 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c); 29 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
@@ -50,5 +52,7 @@ fnmsub(void *frD, void *frA, void *frB, void *frC)
50 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c); 52 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
51#endif 53#endif
52 54
53 return (ret | __FP_PACK_D(frD, R)); 55 __FP_PACK_D(frD, R);
56
57 return FP_CUR_EXCEPTIONS;
54} 58}
diff --git a/arch/powerpc/math-emu/fnmsubs.c b/arch/powerpc/math-emu/fnmsubs.c
index b20f4eb63fb9..f835dfeb0fd1 100644
--- a/arch/powerpc/math-emu/fnmsubs.c
+++ b/arch/powerpc/math-emu/fnmsubs.c
@@ -2,9 +2,10 @@
2#include <linux/errno.h> 2#include <linux/errno.h>
3#include <asm/uaccess.h> 3#include <asm/uaccess.h>
4 4
5#include "soft-fp.h" 5#include <asm/sfp-machine.h>
6#include "double.h" 6#include <math-emu/soft-fp.h>
7#include "single.h" 7#include <math-emu/double.h>
8#include <math-emu/single.h>
8 9
9int 10int
10fnmsubs(void *frD, void *frA, void *frB, void *frC) 11fnmsubs(void *frD, void *frA, void *frB, void *frC)
@@ -14,15 +15,16 @@ fnmsubs(void *frD, void *frA, void *frB, void *frC)
14 FP_DECL_D(B); 15 FP_DECL_D(B);
15 FP_DECL_D(C); 16 FP_DECL_D(C);
16 FP_DECL_D(T); 17 FP_DECL_D(T);
18 FP_DECL_EX;
17 int ret = 0; 19 int ret = 0;
18 20
19#ifdef DEBUG 21#ifdef DEBUG
20 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC); 22 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC);
21#endif 23#endif
22 24
23 __FP_UNPACK_D(A, frA); 25 FP_UNPACK_DP(A, frA);
24 __FP_UNPACK_D(B, frB); 26 FP_UNPACK_DP(B, frB);
25 __FP_UNPACK_D(C, frC); 27 FP_UNPACK_DP(C, frC);
26 28
27#ifdef DEBUG 29#ifdef DEBUG
28 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c); 30 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
@@ -51,5 +53,7 @@ fnmsubs(void *frD, void *frA, void *frB, void *frC)
51 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c); 53 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
52#endif 54#endif
53 55
54 return (ret | __FP_PACK_DS(frD, R)); 56 __FP_PACK_DS(frD, R);
57
58 return FP_CUR_EXCEPTIONS;
55} 59}
diff --git a/arch/powerpc/math-emu/frsp.c b/arch/powerpc/math-emu/frsp.c
index 724ccbc0468e..ddcc14664b1a 100644
--- a/arch/powerpc/math-emu/frsp.c
+++ b/arch/powerpc/math-emu/frsp.c
@@ -2,24 +2,28 @@
2#include <linux/errno.h> 2#include <linux/errno.h>
3#include <asm/uaccess.h> 3#include <asm/uaccess.h>
4 4
5#include "soft-fp.h" 5#include <asm/sfp-machine.h>
6#include "double.h" 6#include <math-emu/soft-fp.h>
7#include "single.h" 7#include <math-emu/double.h>
8#include <math-emu/single.h>
8 9
9int 10int
10frsp(void *frD, void *frB) 11frsp(void *frD, void *frB)
11{ 12{
12 FP_DECL_D(B); 13 FP_DECL_D(B);
14 FP_DECL_EX;
13 15
14#ifdef DEBUG 16#ifdef DEBUG
15 printk("%s: D %p, B %p\n", __func__, frD, frB); 17 printk("%s: D %p, B %p\n", __func__, frD, frB);
16#endif 18#endif
17 19
18 __FP_UNPACK_D(B, frB); 20 FP_UNPACK_DP(B, frB);
19 21
20#ifdef DEBUG 22#ifdef DEBUG
21 printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c); 23 printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
22#endif 24#endif
23 25
24 return __FP_PACK_DS(frD, B); 26 __FP_PACK_DS(frD, B);
27
28 return FP_CUR_EXCEPTIONS;
25} 29}
diff --git a/arch/powerpc/math-emu/fsel.c b/arch/powerpc/math-emu/fsel.c
index ecb5f28eb1f3..1b0c14498032 100644
--- a/arch/powerpc/math-emu/fsel.c
+++ b/arch/powerpc/math-emu/fsel.c
@@ -2,19 +2,21 @@
2#include <linux/errno.h> 2#include <linux/errno.h>
3#include <asm/uaccess.h> 3#include <asm/uaccess.h>
4 4
5#include "soft-fp.h" 5#include <asm/sfp-machine.h>
6#include "double.h" 6#include <math-emu/soft-fp.h>
7#include <math-emu/double.h>
7 8
8int 9int
9fsel(u32 *frD, void *frA, u32 *frB, u32 *frC) 10fsel(u32 *frD, void *frA, u32 *frB, u32 *frC)
10{ 11{
11 FP_DECL_D(A); 12 FP_DECL_D(A);
13 FP_DECL_EX;
12 14
13#ifdef DEBUG 15#ifdef DEBUG
14 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC); 16 printk("%s: %p %p %p %p\n", __func__, frD, frA, frB, frC);
15#endif 17#endif
16 18
17 __FP_UNPACK_D(A, frA); 19 FP_UNPACK_DP(A, frA);
18 20
19#ifdef DEBUG 21#ifdef DEBUG
20 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c); 22 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
diff --git a/arch/powerpc/math-emu/fsqrt.c b/arch/powerpc/math-emu/fsqrt.c
index 38ec2b752e9d..3e90072693a0 100644
--- a/arch/powerpc/math-emu/fsqrt.c
+++ b/arch/powerpc/math-emu/fsqrt.c
@@ -2,21 +2,23 @@
2#include <linux/errno.h> 2#include <linux/errno.h>
3#include <asm/uaccess.h> 3#include <asm/uaccess.h>
4 4
5#include "soft-fp.h" 5#include <asm/sfp-machine.h>
6#include "double.h" 6#include <math-emu/soft-fp.h>
7#include <math-emu/double.h>
7 8
8int 9int
9fsqrt(void *frD, void *frB) 10fsqrt(void *frD, void *frB)
10{ 11{
11 FP_DECL_D(B); 12 FP_DECL_D(B);
12 FP_DECL_D(R); 13 FP_DECL_D(R);
14 FP_DECL_EX;
13 int ret = 0; 15 int ret = 0;
14 16
15#ifdef DEBUG 17#ifdef DEBUG
16 printk("%s: %p %p %p %p\n", __func__, frD, frB); 18 printk("%s: %p %p %p %p\n", __func__, frD, frB);
17#endif 19#endif
18 20
19 __FP_UNPACK_D(B, frB); 21 FP_UNPACK_DP(B, frB);
20 22
21#ifdef DEBUG 23#ifdef DEBUG
22 printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c); 24 printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
@@ -33,5 +35,7 @@ fsqrt(void *frD, void *frB)
33 printk("R: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c); 35 printk("R: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
34#endif 36#endif
35 37
36 return (ret | __FP_PACK_D(frD, R)); 38 __FP_PACK_D(frD, R);
39
40 return FP_CUR_EXCEPTIONS;
37} 41}
diff --git a/arch/powerpc/math-emu/fsqrts.c b/arch/powerpc/math-emu/fsqrts.c
index 335263e06ee5..2843be986e2e 100644
--- a/arch/powerpc/math-emu/fsqrts.c
+++ b/arch/powerpc/math-emu/fsqrts.c
@@ -2,22 +2,24 @@
2#include <linux/errno.h> 2#include <linux/errno.h>
3#include <asm/uaccess.h> 3#include <asm/uaccess.h>
4 4
5#include "soft-fp.h" 5#include <asm/sfp-machine.h>
6#include "double.h" 6#include <math-emu/soft-fp.h>
7#include "single.h" 7#include <math-emu/double.h>
8#include <math-emu/single.h>
8 9
9int 10int
10fsqrts(void *frD, void *frB) 11fsqrts(void *frD, void *frB)
11{ 12{
12 FP_DECL_D(B); 13 FP_DECL_D(B);
13 FP_DECL_D(R); 14 FP_DECL_D(R);
15 FP_DECL_EX;
14 int ret = 0; 16 int ret = 0;
15 17
16#ifdef DEBUG 18#ifdef DEBUG
17 printk("%s: %p %p %p %p\n", __func__, frD, frB); 19 printk("%s: %p %p %p %p\n", __func__, frD, frB);
18#endif 20#endif
19 21
20 __FP_UNPACK_D(B, frB); 22 FP_UNPACK_DP(B, frB);
21 23
22#ifdef DEBUG 24#ifdef DEBUG
23 printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c); 25 printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
@@ -34,5 +36,7 @@ fsqrts(void *frD, void *frB)
34 printk("R: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c); 36 printk("R: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
35#endif 37#endif
36 38
37 return (ret | __FP_PACK_DS(frD, R)); 39 __FP_PACK_DS(frD, R);
40
41 return FP_CUR_EXCEPTIONS;
38} 42}
diff --git a/arch/powerpc/math-emu/fsub.c b/arch/powerpc/math-emu/fsub.c
index 208d20fc52a5..78b09446a0e1 100644
--- a/arch/powerpc/math-emu/fsub.c
+++ b/arch/powerpc/math-emu/fsub.c
@@ -2,8 +2,9 @@
2#include <linux/errno.h> 2#include <linux/errno.h>
3#include <asm/uaccess.h> 3#include <asm/uaccess.h>
4 4
5#include "soft-fp.h" 5#include <asm/sfp-machine.h>
6#include "double.h" 6#include <math-emu/soft-fp.h>
7#include <math-emu/double.h>
7 8
8int 9int
9fsub(void *frD, void *frA, void *frB) 10fsub(void *frD, void *frA, void *frB)
@@ -11,14 +12,15 @@ fsub(void *frD, void *frA, void *frB)
11 FP_DECL_D(A); 12 FP_DECL_D(A);
12 FP_DECL_D(B); 13 FP_DECL_D(B);
13 FP_DECL_D(R); 14 FP_DECL_D(R);
15 FP_DECL_EX;
14 int ret = 0; 16 int ret = 0;
15 17
16#ifdef DEBUG 18#ifdef DEBUG
17 printk("%s: %p %p %p\n", __func__, frD, frA, frB); 19 printk("%s: %p %p %p\n", __func__, frD, frA, frB);
18#endif 20#endif
19 21
20 __FP_UNPACK_D(A, frA); 22 FP_UNPACK_DP(A, frA);
21 __FP_UNPACK_D(B, frB); 23 FP_UNPACK_DP(B, frB);
22 24
23#ifdef DEBUG 25#ifdef DEBUG
24 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c); 26 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
@@ -37,5 +39,7 @@ fsub(void *frD, void *frA, void *frB)
37 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c); 39 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
38#endif 40#endif
39 41
40 return (ret | __FP_PACK_D(frD, R)); 42 __FP_PACK_D(frD, R);
43
44 return FP_CUR_EXCEPTIONS;
41} 45}
diff --git a/arch/powerpc/math-emu/fsubs.c b/arch/powerpc/math-emu/fsubs.c
index 0e61b808c44b..d3bf90863cf2 100644
--- a/arch/powerpc/math-emu/fsubs.c
+++ b/arch/powerpc/math-emu/fsubs.c
@@ -2,9 +2,10 @@
2#include <linux/errno.h> 2#include <linux/errno.h>
3#include <asm/uaccess.h> 3#include <asm/uaccess.h>
4 4
5#include "soft-fp.h" 5#include <asm/sfp-machine.h>
6#include "double.h" 6#include <math-emu/soft-fp.h>
7#include "single.h" 7#include <math-emu/double.h>
8#include <math-emu/single.h>
8 9
9int 10int
10fsubs(void *frD, void *frA, void *frB) 11fsubs(void *frD, void *frA, void *frB)
@@ -12,14 +13,15 @@ fsubs(void *frD, void *frA, void *frB)
12 FP_DECL_D(A); 13 FP_DECL_D(A);
13 FP_DECL_D(B); 14 FP_DECL_D(B);
14 FP_DECL_D(R); 15 FP_DECL_D(R);
16 FP_DECL_EX;
15 int ret = 0; 17 int ret = 0;
16 18
17#ifdef DEBUG 19#ifdef DEBUG
18 printk("%s: %p %p %p\n", __func__, frD, frA, frB); 20 printk("%s: %p %p %p\n", __func__, frD, frA, frB);
19#endif 21#endif
20 22
21 __FP_UNPACK_D(A, frA); 23 FP_UNPACK_DP(A, frA);
22 __FP_UNPACK_D(B, frB); 24 FP_UNPACK_DP(B, frB);
23 25
24#ifdef DEBUG 26#ifdef DEBUG
25 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c); 27 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
@@ -38,5 +40,7 @@ fsubs(void *frD, void *frA, void *frB)
38 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c); 40 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
39#endif 41#endif
40 42
41 return (ret | __FP_PACK_DS(frD, R)); 43 __FP_PACK_DS(frD, R);
44
45 return FP_CUR_EXCEPTIONS;
42} 46}
diff --git a/arch/powerpc/math-emu/lfd.c b/arch/powerpc/math-emu/lfd.c
index 6ec90b57c61a..79ac76d596c3 100644
--- a/arch/powerpc/math-emu/lfd.c
+++ b/arch/powerpc/math-emu/lfd.c
@@ -2,8 +2,8 @@
2#include <linux/errno.h> 2#include <linux/errno.h>
3#include <asm/uaccess.h> 3#include <asm/uaccess.h>
4 4
5#include "sfp-machine.h" 5#include <asm/sfp-machine.h>
6#include "double.h" 6#include <math-emu/double.h>
7 7
8int 8int
9lfd(void *frD, void *ea) 9lfd(void *frD, void *ea)
diff --git a/arch/powerpc/math-emu/lfs.c b/arch/powerpc/math-emu/lfs.c
index 6f18ebe3a7ff..434ed27be8db 100644
--- a/arch/powerpc/math-emu/lfs.c
+++ b/arch/powerpc/math-emu/lfs.c
@@ -2,15 +2,17 @@
2#include <linux/errno.h> 2#include <linux/errno.h>
3#include <asm/uaccess.h> 3#include <asm/uaccess.h>
4 4
5#include "soft-fp.h" 5#include <asm/sfp-machine.h>
6#include "double.h" 6#include <math-emu/soft-fp.h>
7#include "single.h" 7#include <math-emu/double.h>
8#include <math-emu/single.h>
8 9
9int 10int
10lfs(void *frD, void *ea) 11lfs(void *frD, void *ea)
11{ 12{
12 FP_DECL_D(R); 13 FP_DECL_D(R);
13 FP_DECL_S(A); 14 FP_DECL_S(A);
15 FP_DECL_EX;
14 float f; 16 float f;
15 17
16#ifdef DEBUG 18#ifdef DEBUG
@@ -20,7 +22,7 @@ lfs(void *frD, void *ea)
20 if (copy_from_user(&f, ea, sizeof(float))) 22 if (copy_from_user(&f, ea, sizeof(float)))
21 return -EFAULT; 23 return -EFAULT;
22 24
23 __FP_UNPACK_S(A, &f); 25 FP_UNPACK_S(A, f);
24 26
25#ifdef DEBUG 27#ifdef DEBUG
26 printk("A: %ld %lu %ld (%ld) [%08lx]\n", A_s, A_f, A_e, A_c, 28 printk("A: %ld %lu %ld (%ld) [%08lx]\n", A_s, A_f, A_e, A_c,
@@ -33,5 +35,12 @@ lfs(void *frD, void *ea)
33 printk("R: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c); 35 printk("R: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
34#endif 36#endif
35 37
36 return __FP_PACK_D(frD, R); 38 if (R_c == FP_CLS_NAN) {
39 R_e = _FP_EXPMAX_D;
40 _FP_PACK_RAW_2_P(D, frD, R);
41 } else {
42 __FP_PACK_D(frD, R);
43 }
44
45 return 0;
37} 46}
diff --git a/arch/powerpc/math-emu/math.c b/arch/powerpc/math-emu/math.c
index 29e545e0272e..164d55935bd8 100644
--- a/arch/powerpc/math-emu/math.c
+++ b/arch/powerpc/math-emu/math.c
@@ -8,8 +8,8 @@
8#include <asm/uaccess.h> 8#include <asm/uaccess.h>
9#include <asm/reg.h> 9#include <asm/reg.h>
10 10
11#include "sfp-machine.h" 11#include <asm/sfp-machine.h>
12#include "double.h" 12#include <math-emu/double.h>
13 13
14#define FLOATFUNC(x) extern int x(void *, void *, void *, void *) 14#define FLOATFUNC(x) extern int x(void *, void *, void *, void *)
15 15
@@ -168,6 +168,8 @@ record_exception(struct pt_regs *regs, int eflag)
168 fpscr |= FPSCR_ZX; 168 fpscr |= FPSCR_ZX;
169 if (eflag & EFLAG_INEXACT) 169 if (eflag & EFLAG_INEXACT)
170 fpscr |= FPSCR_XX; 170 fpscr |= FPSCR_XX;
171 if (eflag & EFLAG_INVALID)
172 fpscr |= FPSCR_VX;
171 if (eflag & EFLAG_VXSNAN) 173 if (eflag & EFLAG_VXSNAN)
172 fpscr |= FPSCR_VXSNAN; 174 fpscr |= FPSCR_VXSNAN;
173 if (eflag & EFLAG_VXISI) 175 if (eflag & EFLAG_VXISI)
@@ -188,7 +190,7 @@ record_exception(struct pt_regs *regs, int eflag)
188 fpscr |= FPSCR_VXCVI; 190 fpscr |= FPSCR_VXCVI;
189 } 191 }
190 192
191 fpscr &= ~(FPSCR_VX); 193// fpscr &= ~(FPSCR_VX);
192 if (fpscr & (FPSCR_VXSNAN | FPSCR_VXISI | FPSCR_VXIDI | 194 if (fpscr & (FPSCR_VXSNAN | FPSCR_VXISI | FPSCR_VXIDI |
193 FPSCR_VXZDZ | FPSCR_VXIMZ | FPSCR_VXVC | 195 FPSCR_VXZDZ | FPSCR_VXIMZ | FPSCR_VXVC |
194 FPSCR_VXSOFT | FPSCR_VXSQRT | FPSCR_VXCVI)) 196 FPSCR_VXSOFT | FPSCR_VXSQRT | FPSCR_VXCVI))
diff --git a/arch/powerpc/math-emu/mcrfs.c b/arch/powerpc/math-emu/mcrfs.c
index 41ba247faf89..e948d5708e2b 100644
--- a/arch/powerpc/math-emu/mcrfs.c
+++ b/arch/powerpc/math-emu/mcrfs.c
@@ -2,7 +2,8 @@
2#include <linux/errno.h> 2#include <linux/errno.h>
3#include <asm/uaccess.h> 3#include <asm/uaccess.h>
4 4
5#include "soft-fp.h" 5#include <asm/sfp-machine.h>
6#include <math-emu/soft-fp.h>
6 7
7int 8int
8mcrfs(u32 *ccr, u32 crfD, u32 crfS) 9mcrfs(u32 *ccr, u32 crfD, u32 crfS)
diff --git a/arch/powerpc/math-emu/mffs.c b/arch/powerpc/math-emu/mffs.c
index b0e2106e6eb6..5526cf96ede5 100644
--- a/arch/powerpc/math-emu/mffs.c
+++ b/arch/powerpc/math-emu/mffs.c
@@ -2,7 +2,8 @@
2#include <linux/errno.h> 2#include <linux/errno.h>
3#include <asm/uaccess.h> 3#include <asm/uaccess.h>
4 4
5#include "soft-fp.h" 5#include <asm/sfp-machine.h>
6#include <math-emu/soft-fp.h>
6 7
7int 8int
8mffs(u32 *frD) 9mffs(u32 *frD)
diff --git a/arch/powerpc/math-emu/mtfsb0.c b/arch/powerpc/math-emu/mtfsb0.c
index d3062350ea21..bc985585bca8 100644
--- a/arch/powerpc/math-emu/mtfsb0.c
+++ b/arch/powerpc/math-emu/mtfsb0.c
@@ -2,7 +2,8 @@
2#include <linux/errno.h> 2#include <linux/errno.h>
3#include <asm/uaccess.h> 3#include <asm/uaccess.h>
4 4
5#include "soft-fp.h" 5#include <asm/sfp-machine.h>
6#include <math-emu/soft-fp.h>
6 7
7int 8int
8mtfsb0(int crbD) 9mtfsb0(int crbD)
diff --git a/arch/powerpc/math-emu/mtfsb1.c b/arch/powerpc/math-emu/mtfsb1.c
index 2e948704b56e..fe6ed5ac85b3 100644
--- a/arch/powerpc/math-emu/mtfsb1.c
+++ b/arch/powerpc/math-emu/mtfsb1.c
@@ -2,7 +2,8 @@
2#include <linux/errno.h> 2#include <linux/errno.h>
3#include <asm/uaccess.h> 3#include <asm/uaccess.h>
4 4
5#include "soft-fp.h" 5#include <asm/sfp-machine.h>
6#include <math-emu/soft-fp.h>
6 7
7int 8int
8mtfsb1(int crbD) 9mtfsb1(int crbD)
diff --git a/arch/powerpc/math-emu/mtfsf.c b/arch/powerpc/math-emu/mtfsf.c
index 48014d8e3af1..dbce92e4f046 100644
--- a/arch/powerpc/math-emu/mtfsf.c
+++ b/arch/powerpc/math-emu/mtfsf.c
@@ -2,12 +2,14 @@
2#include <linux/errno.h> 2#include <linux/errno.h>
3#include <asm/uaccess.h> 3#include <asm/uaccess.h>
4 4
5#include "soft-fp.h" 5#include <asm/sfp-machine.h>
6#include <math-emu/soft-fp.h>
6 7
7int 8int
8mtfsf(unsigned int FM, u32 *frB) 9mtfsf(unsigned int FM, u32 *frB)
9{ 10{
10 u32 mask; 11 u32 mask;
12 u32 fpscr;
11 13
12 if (FM == 0) 14 if (FM == 0)
13 return 0; 15 return 0;
@@ -37,6 +39,22 @@ mtfsf(unsigned int FM, u32 *frB)
37 __FPU_FPSCR &= ~(mask); 39 __FPU_FPSCR &= ~(mask);
38 __FPU_FPSCR |= (frB[1] & mask); 40 __FPU_FPSCR |= (frB[1] & mask);
39 41
42 __FPU_FPSCR &= ~(FPSCR_VX);
43 if (__FPU_FPSCR & (FPSCR_VXSNAN | FPSCR_VXISI | FPSCR_VXIDI |
44 FPSCR_VXZDZ | FPSCR_VXIMZ | FPSCR_VXVC |
45 FPSCR_VXSOFT | FPSCR_VXSQRT | FPSCR_VXCVI))
46 __FPU_FPSCR |= FPSCR_VX;
47
48 fpscr = __FPU_FPSCR;
49 fpscr &= ~(FPSCR_FEX);
50 if (((fpscr & FPSCR_VX) && (fpscr & FPSCR_VE)) ||
51 ((fpscr & FPSCR_OX) && (fpscr & FPSCR_OE)) ||
52 ((fpscr & FPSCR_UX) && (fpscr & FPSCR_UE)) ||
53 ((fpscr & FPSCR_ZX) && (fpscr & FPSCR_ZE)) ||
54 ((fpscr & FPSCR_XX) && (fpscr & FPSCR_XE)))
55 fpscr |= FPSCR_FEX;
56 __FPU_FPSCR = fpscr;
57
40#ifdef DEBUG 58#ifdef DEBUG
41 printk("%s: %02x %p: %08lx\n", __func__, FM, frB, __FPU_FPSCR); 59 printk("%s: %02x %p: %08lx\n", __func__, FM, frB, __FPU_FPSCR);
42#endif 60#endif
diff --git a/arch/powerpc/math-emu/mtfsfi.c b/arch/powerpc/math-emu/mtfsfi.c
index 031e20093549..fd2acc26813b 100644
--- a/arch/powerpc/math-emu/mtfsfi.c
+++ b/arch/powerpc/math-emu/mtfsfi.c
@@ -2,7 +2,8 @@
2#include <linux/errno.h> 2#include <linux/errno.h>
3#include <asm/uaccess.h> 3#include <asm/uaccess.h>
4 4
5#include "soft-fp.h" 5#include <asm/sfp-machine.h>
6#include <math-emu/soft-fp.h>
6 7
7int 8int
8mtfsfi(unsigned int crfD, unsigned int IMM) 9mtfsfi(unsigned int crfD, unsigned int IMM)
diff --git a/arch/powerpc/math-emu/op-1.h b/arch/powerpc/math-emu/op-1.h
deleted file mode 100644
index c92fa95f562e..000000000000
--- a/arch/powerpc/math-emu/op-1.h
+++ /dev/null
@@ -1,245 +0,0 @@
1/*
2 * Basic one-word fraction declaration and manipulation.
3 */
4
5#define _FP_FRAC_DECL_1(X) _FP_W_TYPE X##_f
6#define _FP_FRAC_COPY_1(D,S) (D##_f = S##_f)
7#define _FP_FRAC_SET_1(X,I) (X##_f = I)
8#define _FP_FRAC_HIGH_1(X) (X##_f)
9#define _FP_FRAC_LOW_1(X) (X##_f)
10#define _FP_FRAC_WORD_1(X,w) (X##_f)
11
12#define _FP_FRAC_ADDI_1(X,I) (X##_f += I)
13#define _FP_FRAC_SLL_1(X,N) \
14 do { \
15 if (__builtin_constant_p(N) && (N) == 1) \
16 X##_f += X##_f; \
17 else \
18 X##_f <<= (N); \
19 } while (0)
20#define _FP_FRAC_SRL_1(X,N) (X##_f >>= N)
21
22/* Right shift with sticky-lsb. */
23#define _FP_FRAC_SRS_1(X,N,sz) __FP_FRAC_SRS_1(X##_f, N, sz)
24
25#define __FP_FRAC_SRS_1(X,N,sz) \
26 (X = (X >> (N) | (__builtin_constant_p(N) && (N) == 1 \
27 ? X & 1 : (X << (_FP_W_TYPE_SIZE - (N))) != 0)))
28
29#define _FP_FRAC_ADD_1(R,X,Y) (R##_f = X##_f + Y##_f)
30#define _FP_FRAC_SUB_1(R,X,Y) (R##_f = X##_f - Y##_f)
31#define _FP_FRAC_CLZ_1(z, X) __FP_CLZ(z, X##_f)
32
33/* Predicates */
34#define _FP_FRAC_NEGP_1(X) ((_FP_WS_TYPE)X##_f < 0)
35#define _FP_FRAC_ZEROP_1(X) (X##_f == 0)
36#define _FP_FRAC_OVERP_1(fs,X) (X##_f & _FP_OVERFLOW_##fs)
37#define _FP_FRAC_EQ_1(X, Y) (X##_f == Y##_f)
38#define _FP_FRAC_GE_1(X, Y) (X##_f >= Y##_f)
39#define _FP_FRAC_GT_1(X, Y) (X##_f > Y##_f)
40
41#define _FP_ZEROFRAC_1 0
42#define _FP_MINFRAC_1 1
43
44/*
45 * Unpack the raw bits of a native fp value. Do not classify or
46 * normalize the data.
47 */
48
49#define _FP_UNPACK_RAW_1(fs, X, val) \
50 do { \
51 union _FP_UNION_##fs _flo; _flo.flt = (val); \
52 \
53 X##_f = _flo.bits.frac; \
54 X##_e = _flo.bits.exp; \
55 X##_s = _flo.bits.sign; \
56 } while (0)
57
58
59/*
60 * Repack the raw bits of a native fp value.
61 */
62
63#define _FP_PACK_RAW_1(fs, val, X) \
64 do { \
65 union _FP_UNION_##fs _flo; \
66 \
67 _flo.bits.frac = X##_f; \
68 _flo.bits.exp = X##_e; \
69 _flo.bits.sign = X##_s; \
70 \
71 (val) = _flo.flt; \
72 } while (0)
73
74
75/*
76 * Multiplication algorithms:
77 */
78
79/* Basic. Assuming the host word size is >= 2*FRACBITS, we can do the
80 multiplication immediately. */
81
82#define _FP_MUL_MEAT_1_imm(fs, R, X, Y) \
83 do { \
84 R##_f = X##_f * Y##_f; \
85 /* Normalize since we know where the msb of the multiplicands \
86 were (bit B), we know that the msb of the of the product is \
87 at either 2B or 2B-1. */ \
88 _FP_FRAC_SRS_1(R, _FP_WFRACBITS_##fs-1, 2*_FP_WFRACBITS_##fs); \
89 } while (0)
90
91/* Given a 1W * 1W => 2W primitive, do the extended multiplication. */
92
93#define _FP_MUL_MEAT_1_wide(fs, R, X, Y, doit) \
94 do { \
95 _FP_W_TYPE _Z_f0, _Z_f1; \
96 doit(_Z_f1, _Z_f0, X##_f, Y##_f); \
97 /* Normalize since we know where the msb of the multiplicands \
98 were (bit B), we know that the msb of the of the product is \
99 at either 2B or 2B-1. */ \
100 _FP_FRAC_SRS_2(_Z, _FP_WFRACBITS_##fs-1, 2*_FP_WFRACBITS_##fs); \
101 R##_f = _Z_f0; \
102 } while (0)
103
104/* Finally, a simple widening multiply algorithm. What fun! */
105
106#define _FP_MUL_MEAT_1_hard(fs, R, X, Y) \
107 do { \
108 _FP_W_TYPE _xh, _xl, _yh, _yl, _z_f0, _z_f1, _a_f0, _a_f1; \
109 \
110 /* split the words in half */ \
111 _xh = X##_f >> (_FP_W_TYPE_SIZE/2); \
112 _xl = X##_f & (((_FP_W_TYPE)1 << (_FP_W_TYPE_SIZE/2)) - 1); \
113 _yh = Y##_f >> (_FP_W_TYPE_SIZE/2); \
114 _yl = Y##_f & (((_FP_W_TYPE)1 << (_FP_W_TYPE_SIZE/2)) - 1); \
115 \
116 /* multiply the pieces */ \
117 _z_f0 = _xl * _yl; \
118 _a_f0 = _xh * _yl; \
119 _a_f1 = _xl * _yh; \
120 _z_f1 = _xh * _yh; \
121 \
122 /* reassemble into two full words */ \
123 if ((_a_f0 += _a_f1) < _a_f1) \
124 _z_f1 += (_FP_W_TYPE)1 << (_FP_W_TYPE_SIZE/2); \
125 _a_f1 = _a_f0 >> (_FP_W_TYPE_SIZE/2); \
126 _a_f0 = _a_f0 << (_FP_W_TYPE_SIZE/2); \
127 _FP_FRAC_ADD_2(_z, _z, _a); \
128 \
129 /* normalize */ \
130 _FP_FRAC_SRS_2(_z, _FP_WFRACBITS_##fs - 1, 2*_FP_WFRACBITS_##fs); \
131 R##_f = _z_f0; \
132 } while (0)
133
134
135/*
136 * Division algorithms:
137 */
138
139/* Basic. Assuming the host word size is >= 2*FRACBITS, we can do the
140 division immediately. Give this macro either _FP_DIV_HELP_imm for
141 C primitives or _FP_DIV_HELP_ldiv for the ISO function. Which you
142 choose will depend on what the compiler does with divrem4. */
143
144#define _FP_DIV_MEAT_1_imm(fs, R, X, Y, doit) \
145 do { \
146 _FP_W_TYPE _q, _r; \
147 X##_f <<= (X##_f < Y##_f \
148 ? R##_e--, _FP_WFRACBITS_##fs \
149 : _FP_WFRACBITS_##fs - 1); \
150 doit(_q, _r, X##_f, Y##_f); \
151 R##_f = _q | (_r != 0); \
152 } while (0)
153
154/* GCC's longlong.h defines a 2W / 1W => (1W,1W) primitive udiv_qrnnd
155 that may be useful in this situation. This first is for a primitive
156 that requires normalization, the second for one that does not. Look
157 for UDIV_NEEDS_NORMALIZATION to tell which your machine needs. */
158
159#define _FP_DIV_MEAT_1_udiv_norm(fs, R, X, Y) \
160 do { \
161 _FP_W_TYPE _nh, _nl, _q, _r; \
162 \
163 /* Normalize Y -- i.e. make the most significant bit set. */ \
164 Y##_f <<= _FP_WFRACXBITS_##fs - 1; \
165 \
166 /* Shift X op correspondingly high, that is, up one full word. */ \
167 if (X##_f <= Y##_f) \
168 { \
169 _nl = 0; \
170 _nh = X##_f; \
171 } \
172 else \
173 { \
174 R##_e++; \
175 _nl = X##_f << (_FP_W_TYPE_SIZE-1); \
176 _nh = X##_f >> 1; \
177 } \
178 \
179 udiv_qrnnd(_q, _r, _nh, _nl, Y##_f); \
180 R##_f = _q | (_r != 0); \
181 } while (0)
182
183#define _FP_DIV_MEAT_1_udiv(fs, R, X, Y) \
184 do { \
185 _FP_W_TYPE _nh, _nl, _q, _r; \
186 if (X##_f < Y##_f) \
187 { \
188 R##_e--; \
189 _nl = X##_f << _FP_WFRACBITS_##fs; \
190 _nh = X##_f >> _FP_WFRACXBITS_##fs; \
191 } \
192 else \
193 { \
194 _nl = X##_f << (_FP_WFRACBITS_##fs - 1); \
195 _nh = X##_f >> (_FP_WFRACXBITS_##fs + 1); \
196 } \
197 udiv_qrnnd(_q, _r, _nh, _nl, Y##_f); \
198 R##_f = _q | (_r != 0); \
199 } while (0)
200
201
202/*
203 * Square root algorithms:
204 * We have just one right now, maybe Newton approximation
205 * should be added for those machines where division is fast.
206 */
207
208#define _FP_SQRT_MEAT_1(R, S, T, X, q) \
209 do { \
210 while (q) \
211 { \
212 T##_f = S##_f + q; \
213 if (T##_f <= X##_f) \
214 { \
215 S##_f = T##_f + q; \
216 X##_f -= T##_f; \
217 R##_f += q; \
218 } \
219 _FP_FRAC_SLL_1(X, 1); \
220 q >>= 1; \
221 } \
222 } while (0)
223
224/*
225 * Assembly/disassembly for converting to/from integral types.
226 * No shifting or overflow handled here.
227 */
228
229#define _FP_FRAC_ASSEMBLE_1(r, X, rsize) (r = X##_f)
230#define _FP_FRAC_DISASSEMBLE_1(X, r, rsize) (X##_f = r)
231
232
233/*
234 * Convert FP values between word sizes
235 */
236
237#define _FP_FRAC_CONV_1_1(dfs, sfs, D, S) \
238 do { \
239 D##_f = S##_f; \
240 if (_FP_WFRACBITS_##sfs > _FP_WFRACBITS_##dfs) \
241 _FP_FRAC_SRS_1(D, (_FP_WFRACBITS_##sfs-_FP_WFRACBITS_##dfs), \
242 _FP_WFRACBITS_##sfs); \
243 else \
244 D##_f <<= _FP_WFRACBITS_##dfs - _FP_WFRACBITS_##sfs; \
245 } while (0)
diff --git a/arch/powerpc/math-emu/op-2.h b/arch/powerpc/math-emu/op-2.h
deleted file mode 100644
index 7d6f17cc2929..000000000000
--- a/arch/powerpc/math-emu/op-2.h
+++ /dev/null
@@ -1,434 +0,0 @@
1/*
2 * Basic two-word fraction declaration and manipulation.
3 */
4
5#define _FP_FRAC_DECL_2(X) _FP_W_TYPE X##_f0, X##_f1
6#define _FP_FRAC_COPY_2(D,S) (D##_f0 = S##_f0, D##_f1 = S##_f1)
7#define _FP_FRAC_SET_2(X,I) __FP_FRAC_SET_2(X, I)
8#define _FP_FRAC_HIGH_2(X) (X##_f1)
9#define _FP_FRAC_LOW_2(X) (X##_f0)
10#define _FP_FRAC_WORD_2(X,w) (X##_f##w)
11
12#define _FP_FRAC_SLL_2(X,N) \
13 do { \
14 if ((N) < _FP_W_TYPE_SIZE) \
15 { \
16 if (__builtin_constant_p(N) && (N) == 1) \
17 { \
18 X##_f1 = X##_f1 + X##_f1 + (((_FP_WS_TYPE)(X##_f0)) < 0); \
19 X##_f0 += X##_f0; \
20 } \
21 else \
22 { \
23 X##_f1 = X##_f1 << (N) | X##_f0 >> (_FP_W_TYPE_SIZE - (N)); \
24 X##_f0 <<= (N); \
25 } \
26 } \
27 else \
28 { \
29 X##_f1 = X##_f0 << ((N) - _FP_W_TYPE_SIZE); \
30 X##_f0 = 0; \
31 } \
32 } while (0)
33
34#define _FP_FRAC_SRL_2(X,N) \
35 do { \
36 if ((N) < _FP_W_TYPE_SIZE) \
37 { \
38 X##_f0 = X##_f0 >> (N) | X##_f1 << (_FP_W_TYPE_SIZE - (N)); \
39 X##_f1 >>= (N); \
40 } \
41 else \
42 { \
43 X##_f0 = X##_f1 >> ((N) - _FP_W_TYPE_SIZE); \
44 X##_f1 = 0; \
45 } \
46 } while (0)
47
48/* Right shift with sticky-lsb. */
49#define _FP_FRAC_SRS_2(X,N,sz) \
50 do { \
51 if ((N) < _FP_W_TYPE_SIZE) \
52 { \
53 X##_f0 = (X##_f1 << (_FP_W_TYPE_SIZE - (N)) | X##_f0 >> (N) | \
54 (__builtin_constant_p(N) && (N) == 1 \
55 ? X##_f0 & 1 \
56 : (X##_f0 << (_FP_W_TYPE_SIZE - (N))) != 0)); \
57 X##_f1 >>= (N); \
58 } \
59 else \
60 { \
61 X##_f0 = (X##_f1 >> ((N) - _FP_W_TYPE_SIZE) | \
62 (((X##_f1 << (2 * _FP_W_TYPE_SIZE - (N))) | \
63 X##_f0) != 0)); \
64 X##_f1 = 0; \
65 } \
66 } while (0)
67
68#define _FP_FRAC_ADDI_2(X,I) \
69 __FP_FRAC_ADDI_2(X##_f1, X##_f0, I)
70
71#define _FP_FRAC_ADD_2(R,X,Y) \
72 __FP_FRAC_ADD_2(R##_f1, R##_f0, X##_f1, X##_f0, Y##_f1, Y##_f0)
73
74#define _FP_FRAC_SUB_2(R,X,Y) \
75 __FP_FRAC_SUB_2(R##_f1, R##_f0, X##_f1, X##_f0, Y##_f1, Y##_f0)
76
77#define _FP_FRAC_CLZ_2(R,X) \
78 do { \
79 if (X##_f1) \
80 __FP_CLZ(R,X##_f1); \
81 else \
82 { \
83 __FP_CLZ(R,X##_f0); \
84 R += _FP_W_TYPE_SIZE; \
85 } \
86 } while(0)
87
88/* Predicates */
89#define _FP_FRAC_NEGP_2(X) ((_FP_WS_TYPE)X##_f1 < 0)
90#define _FP_FRAC_ZEROP_2(X) ((X##_f1 | X##_f0) == 0)
91#define _FP_FRAC_OVERP_2(fs,X) (X##_f1 & _FP_OVERFLOW_##fs)
92#define _FP_FRAC_EQ_2(X, Y) (X##_f1 == Y##_f1 && X##_f0 == Y##_f0)
93#define _FP_FRAC_GT_2(X, Y) \
94 ((X##_f1 > Y##_f1) || (X##_f1 == Y##_f1 && X##_f0 > Y##_f0))
95#define _FP_FRAC_GE_2(X, Y) \
96 ((X##_f1 > Y##_f1) || (X##_f1 == Y##_f1 && X##_f0 >= Y##_f0))
97
98#define _FP_ZEROFRAC_2 0, 0
99#define _FP_MINFRAC_2 0, 1
100
101/*
102 * Internals
103 */
104
105#define __FP_FRAC_SET_2(X,I1,I0) (X##_f0 = I0, X##_f1 = I1)
106
107#define __FP_CLZ_2(R, xh, xl) \
108 do { \
109 if (xh) \
110 __FP_CLZ(R,xl); \
111 else \
112 { \
113 __FP_CLZ(R,xl); \
114 R += _FP_W_TYPE_SIZE; \
115 } \
116 } while(0)
117
118#if 0
119
120#ifndef __FP_FRAC_ADDI_2
121#define __FP_FRAC_ADDI_2(xh, xl, i) \
122 (xh += ((xl += i) < i))
123#endif
124#ifndef __FP_FRAC_ADD_2
125#define __FP_FRAC_ADD_2(rh, rl, xh, xl, yh, yl) \
126 (rh = xh + yh + ((rl = xl + yl) < xl))
127#endif
128#ifndef __FP_FRAC_SUB_2
129#define __FP_FRAC_SUB_2(rh, rl, xh, xl, yh, yl) \
130 (rh = xh - yh - ((rl = xl - yl) > xl))
131#endif
132
133#else
134
135#undef __FP_FRAC_ADDI_2
136#define __FP_FRAC_ADDI_2(xh, xl, i) add_ssaaaa(xh, xl, xh, xl, 0, i)
137#undef __FP_FRAC_ADD_2
138#define __FP_FRAC_ADD_2 add_ssaaaa
139#undef __FP_FRAC_SUB_2
140#define __FP_FRAC_SUB_2 sub_ddmmss
141
142#endif
143
144/*
145 * Unpack the raw bits of a native fp value. Do not classify or
146 * normalize the data.
147 */
148
149#define _FP_UNPACK_RAW_2(fs, X, val) \
150 do { \
151 union _FP_UNION_##fs _flo; _flo.flt = (val); \
152 \
153 X##_f0 = _flo.bits.frac0; \
154 X##_f1 = _flo.bits.frac1; \
155 X##_e = _flo.bits.exp; \
156 X##_s = _flo.bits.sign; \
157 } while (0)
158
159
160/*
161 * Repack the raw bits of a native fp value.
162 */
163
164#define _FP_PACK_RAW_2(fs, val, X) \
165 do { \
166 union _FP_UNION_##fs _flo; \
167 \
168 _flo.bits.frac0 = X##_f0; \
169 _flo.bits.frac1 = X##_f1; \
170 _flo.bits.exp = X##_e; \
171 _flo.bits.sign = X##_s; \
172 \
173 (val) = _flo.flt; \
174 } while (0)
175
176
177/*
178 * Multiplication algorithms:
179 */
180
181/* Given a 1W * 1W => 2W primitive, do the extended multiplication. */
182
183#define _FP_MUL_MEAT_2_wide(fs, R, X, Y, doit) \
184 do { \
185 _FP_FRAC_DECL_4(_z); _FP_FRAC_DECL_2(_b); _FP_FRAC_DECL_2(_c); \
186 \
187 doit(_FP_FRAC_WORD_4(_z,1), _FP_FRAC_WORD_4(_z,0), X##_f0, Y##_f0); \
188 doit(_b_f1, _b_f0, X##_f0, Y##_f1); \
189 doit(_c_f1, _c_f0, X##_f1, Y##_f0); \
190 doit(_FP_FRAC_WORD_4(_z,3), _FP_FRAC_WORD_4(_z,2), X##_f1, Y##_f1); \
191 \
192 __FP_FRAC_ADD_4(_FP_FRAC_WORD_4(_z,3),_FP_FRAC_WORD_4(_z,2), \
193 _FP_FRAC_WORD_4(_z,1),_FP_FRAC_WORD_4(_z,0), \
194 0, _b_f1, _b_f0, 0, \
195 _FP_FRAC_WORD_4(_z,3),_FP_FRAC_WORD_4(_z,2), \
196 _FP_FRAC_WORD_4(_z,1),_FP_FRAC_WORD_4(_z,0)); \
197 __FP_FRAC_ADD_4(_FP_FRAC_WORD_4(_z,3),_FP_FRAC_WORD_4(_z,2), \
198 _FP_FRAC_WORD_4(_z,1),_FP_FRAC_WORD_4(_z,0), \
199 0, _c_f1, _c_f0, 0, \
200 _FP_FRAC_WORD_4(_z,3),_FP_FRAC_WORD_4(_z,2), \
201 _FP_FRAC_WORD_4(_z,1),_FP_FRAC_WORD_4(_z,0)); \
202 \
203 /* Normalize since we know where the msb of the multiplicands \
204 were (bit B), we know that the msb of the of the product is \
205 at either 2B or 2B-1. */ \
206 _FP_FRAC_SRS_4(_z, _FP_WFRACBITS_##fs-1, 2*_FP_WFRACBITS_##fs); \
207 R##_f0 = _FP_FRAC_WORD_4(_z,0); \
208 R##_f1 = _FP_FRAC_WORD_4(_z,1); \
209 } while (0)
210
211/* This next macro appears to be totally broken. Fortunately nowhere
212 * seems to use it :-> The problem is that we define _z[4] but
213 * then use it in _FP_FRAC_SRS_4, which will attempt to access
214 * _z_f[n] which will cause an error. The fix probably involves
215 * declaring it with _FP_FRAC_DECL_4, see previous macro. -- PMM 02/1998
216 */
217#define _FP_MUL_MEAT_2_gmp(fs, R, X, Y) \
218 do { \
219 _FP_W_TYPE _x[2], _y[2], _z[4]; \
220 _x[0] = X##_f0; _x[1] = X##_f1; \
221 _y[0] = Y##_f0; _y[1] = Y##_f1; \
222 \
223 mpn_mul_n(_z, _x, _y, 2); \
224 \
225 /* Normalize since we know where the msb of the multiplicands \
226 were (bit B), we know that the msb of the of the product is \
227 at either 2B or 2B-1. */ \
228 _FP_FRAC_SRS_4(_z, _FP_WFRACBITS##_fs-1, 2*_FP_WFRACBITS_##fs); \
229 R##_f0 = _z[0]; \
230 R##_f1 = _z[1]; \
231 } while (0)
232
233
234/*
235 * Division algorithms:
236 * This seems to be giving me difficulties -- PMM
237 * Look, NetBSD seems to be able to comment algorithms. Can't you?
238 * I've thrown printks at the problem.
239 * This now appears to work, but I still don't really know why.
240 * Also, I don't think the result is properly normalised...
241 */
242
243#define _FP_DIV_MEAT_2_udiv_64(fs, R, X, Y) \
244 do { \
245 extern void _fp_udivmodti4(_FP_W_TYPE q[2], _FP_W_TYPE r[2], \
246 _FP_W_TYPE n1, _FP_W_TYPE n0, \
247 _FP_W_TYPE d1, _FP_W_TYPE d0); \
248 _FP_W_TYPE _n_f3, _n_f2, _n_f1, _n_f0, _r_f1, _r_f0; \
249 _FP_W_TYPE _q_f1, _q_f0, _m_f1, _m_f0; \
250 _FP_W_TYPE _rmem[2], _qmem[2]; \
251 /* I think this check is to ensure that the result is normalised. \
252 * Assuming X,Y normalised (ie in [1.0,2.0)) X/Y will be in \
253 * [0.5,2.0). Furthermore, it will be less than 1.0 iff X < Y. \
254 * In this case we tweak things. (this is based on comments in \
255 * the NetBSD FPU emulation code. ) \
256 * We know X,Y are normalised because we ensure this as part of \
257 * the unpacking process. -- PMM \
258 */ \
259 if (_FP_FRAC_GT_2(X, Y)) \
260 { \
261/* R##_e++; */ \
262 _n_f3 = X##_f1 >> 1; \
263 _n_f2 = X##_f1 << (_FP_W_TYPE_SIZE - 1) | X##_f0 >> 1; \
264 _n_f1 = X##_f0 << (_FP_W_TYPE_SIZE - 1); \
265 _n_f0 = 0; \
266 } \
267 else \
268 { \
269 R##_e--; \
270 _n_f3 = X##_f1; \
271 _n_f2 = X##_f0; \
272 _n_f1 = _n_f0 = 0; \
273 } \
274 \
275 /* Normalize, i.e. make the most significant bit of the \
276 denominator set. CHANGED: - 1 to nothing -- PMM */ \
277 _FP_FRAC_SLL_2(Y, _FP_WFRACXBITS_##fs /* -1 */); \
278 \
279 /* Do the 256/128 bit division given the 128-bit _fp_udivmodtf4 \
280 primitive snagged from libgcc2.c. */ \
281 \
282 _fp_udivmodti4(_qmem, _rmem, _n_f3, _n_f2, 0, Y##_f1); \
283 _q_f1 = _qmem[0]; \
284 umul_ppmm(_m_f1, _m_f0, _q_f1, Y##_f0); \
285 _r_f1 = _rmem[0]; \
286 _r_f0 = _n_f1; \
287 if (_FP_FRAC_GT_2(_m, _r)) \
288 { \
289 _q_f1--; \
290 _FP_FRAC_ADD_2(_r, _r, Y); \
291 if (_FP_FRAC_GE_2(_r, Y) && _FP_FRAC_GT_2(_m, _r)) \
292 { \
293 _q_f1--; \
294 _FP_FRAC_ADD_2(_r, _r, Y); \
295 } \
296 } \
297 _FP_FRAC_SUB_2(_r, _r, _m); \
298 \
299 _fp_udivmodti4(_qmem, _rmem, _r_f1, _r_f0, 0, Y##_f1); \
300 _q_f0 = _qmem[0]; \
301 umul_ppmm(_m_f1, _m_f0, _q_f0, Y##_f0); \
302 _r_f1 = _rmem[0]; \
303 _r_f0 = _n_f0; \
304 if (_FP_FRAC_GT_2(_m, _r)) \
305 { \
306 _q_f0--; \
307 _FP_FRAC_ADD_2(_r, _r, Y); \
308 if (_FP_FRAC_GE_2(_r, Y) && _FP_FRAC_GT_2(_m, _r)) \
309 { \
310 _q_f0--; \
311 _FP_FRAC_ADD_2(_r, _r, Y); \
312 } \
313 } \
314 _FP_FRAC_SUB_2(_r, _r, _m); \
315 \
316 R##_f1 = _q_f1; \
317 R##_f0 = _q_f0 | ((_r_f1 | _r_f0) != 0); \
318 /* adjust so answer is normalized again. I'm not sure what the \
319 * final sz param should be. In practice it's never used since \
320 * N is 1 which is always going to be < _FP_W_TYPE_SIZE... \
321 */ \
322 /* _FP_FRAC_SRS_2(R,1,_FP_WFRACBITS_##fs); */ \
323 } while (0)
324
325
326#define _FP_DIV_MEAT_2_gmp(fs, R, X, Y) \
327 do { \
328 _FP_W_TYPE _x[4], _y[2], _z[4]; \
329 _y[0] = Y##_f0; _y[1] = Y##_f1; \
330 _x[0] = _x[3] = 0; \
331 if (_FP_FRAC_GT_2(X, Y)) \
332 { \
333 R##_e++; \
334 _x[1] = (X##_f0 << (_FP_WFRACBITS-1 - _FP_W_TYPE_SIZE) | \
335 X##_f1 >> (_FP_W_TYPE_SIZE - \
336 (_FP_WFRACBITS-1 - _FP_W_TYPE_SIZE))); \
337 _x[2] = X##_f1 << (_FP_WFRACBITS-1 - _FP_W_TYPE_SIZE); \
338 } \
339 else \
340 { \
341 _x[1] = (X##_f0 << (_FP_WFRACBITS - _FP_W_TYPE_SIZE) | \
342 X##_f1 >> (_FP_W_TYPE_SIZE - \
343 (_FP_WFRACBITS - _FP_W_TYPE_SIZE))); \
344 _x[2] = X##_f1 << (_FP_WFRACBITS - _FP_W_TYPE_SIZE); \
345 } \
346 \
347 (void) mpn_divrem (_z, 0, _x, 4, _y, 2); \
348 R##_f1 = _z[1]; \
349 R##_f0 = _z[0] | ((_x[0] | _x[1]) != 0); \
350 } while (0)
351
352
353/*
354 * Square root algorithms:
355 * We have just one right now, maybe Newton approximation
356 * should be added for those machines where division is fast.
357 */
358
359#define _FP_SQRT_MEAT_2(R, S, T, X, q) \
360 do { \
361 while (q) \
362 { \
363 T##_f1 = S##_f1 + q; \
364 if (T##_f1 <= X##_f1) \
365 { \
366 S##_f1 = T##_f1 + q; \
367 X##_f1 -= T##_f1; \
368 R##_f1 += q; \
369 } \
370 _FP_FRAC_SLL_2(X, 1); \
371 q >>= 1; \
372 } \
373 q = (_FP_W_TYPE)1 << (_FP_W_TYPE_SIZE - 1); \
374 while (q) \
375 { \
376 T##_f0 = S##_f0 + q; \
377 T##_f1 = S##_f1; \
378 if (T##_f1 < X##_f1 || \
379 (T##_f1 == X##_f1 && T##_f0 < X##_f0)) \
380 { \
381 S##_f0 = T##_f0 + q; \
382 if (((_FP_WS_TYPE)T##_f0) < 0 && \
383 ((_FP_WS_TYPE)S##_f0) >= 0) \
384 S##_f1++; \
385 _FP_FRAC_SUB_2(X, X, T); \
386 R##_f0 += q; \
387 } \
388 _FP_FRAC_SLL_2(X, 1); \
389 q >>= 1; \
390 } \
391 } while (0)
392
393
394/*
395 * Assembly/disassembly for converting to/from integral types.
396 * No shifting or overflow handled here.
397 */
398
399#define _FP_FRAC_ASSEMBLE_2(r, X, rsize) \
400 do { \
401 if (rsize <= _FP_W_TYPE_SIZE) \
402 r = X##_f0; \
403 else \
404 { \
405 r = X##_f1; \
406 r <<= _FP_W_TYPE_SIZE; \
407 r += X##_f0; \
408 } \
409 } while (0)
410
411#define _FP_FRAC_DISASSEMBLE_2(X, r, rsize) \
412 do { \
413 X##_f0 = r; \
414 X##_f1 = (rsize <= _FP_W_TYPE_SIZE ? 0 : r >> _FP_W_TYPE_SIZE); \
415 } while (0)
416
417/*
418 * Convert FP values between word sizes
419 */
420
421#define _FP_FRAC_CONV_1_2(dfs, sfs, D, S) \
422 do { \
423 _FP_FRAC_SRS_2(S, (_FP_WFRACBITS_##sfs - _FP_WFRACBITS_##dfs), \
424 _FP_WFRACBITS_##sfs); \
425 D##_f = S##_f0; \
426 } while (0)
427
428#define _FP_FRAC_CONV_2_1(dfs, sfs, D, S) \
429 do { \
430 D##_f0 = S##_f; \
431 D##_f1 = 0; \
432 _FP_FRAC_SLL_2(D, (_FP_WFRACBITS_##dfs - _FP_WFRACBITS_##sfs)); \
433 } while (0)
434
diff --git a/arch/powerpc/math-emu/op-4.h b/arch/powerpc/math-emu/op-4.h
deleted file mode 100644
index c9ae626070da..000000000000
--- a/arch/powerpc/math-emu/op-4.h
+++ /dev/null
@@ -1,317 +0,0 @@
1/*
2 * Basic four-word fraction declaration and manipulation.
3 *
4 * When adding quadword support for 32 bit machines, we need
5 * to be a little careful as double multiply uses some of these
6 * macros: (in op-2.h)
7 * _FP_MUL_MEAT_2_wide() uses _FP_FRAC_DECL_4, _FP_FRAC_WORD_4,
8 * _FP_FRAC_ADD_4, _FP_FRAC_SRS_4
9 * _FP_MUL_MEAT_2_gmp() uses _FP_FRAC_SRS_4 (and should use
10 * _FP_FRAC_DECL_4: it appears to be broken and is not used
11 * anywhere anyway. )
12 *
13 * I've now fixed all the macros that were here from the sparc64 code.
14 * [*none* of the shift macros were correct!] -- PMM 02/1998
15 *
16 * The only quadword stuff that remains to be coded is:
17 * 1) the conversion to/from ints, which requires
18 * that we check (in op-common.h) that the following do the right thing
19 * for quadwords: _FP_TO_INT(Q,4,r,X,rsz,rsg), _FP_FROM_INT(Q,4,X,r,rs,rt)
20 * 2) multiply, divide and sqrt, which require:
21 * _FP_MUL_MEAT_4_*(R,X,Y), _FP_DIV_MEAT_4_*(R,X,Y), _FP_SQRT_MEAT_4(R,S,T,X,q),
22 * This also needs _FP_MUL_MEAT_Q and _FP_DIV_MEAT_Q to be defined to
23 * some suitable _FP_MUL_MEAT_4_* macros in sfp-machine.h.
24 * [we're free to choose whatever FP_MUL_MEAT_4_* macros we need for
25 * these; they are used nowhere else. ]
26 */
27
28#define _FP_FRAC_DECL_4(X) _FP_W_TYPE X##_f[4]
29#define _FP_FRAC_COPY_4(D,S) \
30 (D##_f[0] = S##_f[0], D##_f[1] = S##_f[1], \
31 D##_f[2] = S##_f[2], D##_f[3] = S##_f[3])
32/* The _FP_FRAC_SET_n(X,I) macro is intended for use with another
33 * macro such as _FP_ZEROFRAC_n which returns n comma separated values.
34 * The result is that we get an expansion of __FP_FRAC_SET_n(X,I0,I1,I2,I3)
35 * which just assigns the In values to the array X##_f[].
36 * This is why the number of parameters doesn't appear to match
37 * at first glance... -- PMM
38 */
39#define _FP_FRAC_SET_4(X,I) __FP_FRAC_SET_4(X, I)
40#define _FP_FRAC_HIGH_4(X) (X##_f[3])
41#define _FP_FRAC_LOW_4(X) (X##_f[0])
42#define _FP_FRAC_WORD_4(X,w) (X##_f[w])
43
44#define _FP_FRAC_SLL_4(X,N) \
45 do { \
46 _FP_I_TYPE _up, _down, _skip, _i; \
47 _skip = (N) / _FP_W_TYPE_SIZE; \
48 _up = (N) % _FP_W_TYPE_SIZE; \
49 _down = _FP_W_TYPE_SIZE - _up; \
50 for (_i = 3; _i > _skip; --_i) \
51 X##_f[_i] = X##_f[_i-_skip] << _up | X##_f[_i-_skip-1] >> _down; \
52/* bugfixed: was X##_f[_i] <<= _up; -- PMM 02/1998 */ \
53 X##_f[_i] = X##_f[0] << _up; \
54 for (--_i; _i >= 0; --_i) \
55 X##_f[_i] = 0; \
56 } while (0)
57
58/* This one was broken too */
59#define _FP_FRAC_SRL_4(X,N) \
60 do { \
61 _FP_I_TYPE _up, _down, _skip, _i; \
62 _skip = (N) / _FP_W_TYPE_SIZE; \
63 _down = (N) % _FP_W_TYPE_SIZE; \
64 _up = _FP_W_TYPE_SIZE - _down; \
65 for (_i = 0; _i < 3-_skip; ++_i) \
66 X##_f[_i] = X##_f[_i+_skip] >> _down | X##_f[_i+_skip+1] << _up; \
67 X##_f[_i] = X##_f[3] >> _down; \
68 for (++_i; _i < 4; ++_i) \
69 X##_f[_i] = 0; \
70 } while (0)
71
72
73/* Right shift with sticky-lsb.
74 * What this actually means is that we do a standard right-shift,
75 * but that if any of the bits that fall off the right hand side
76 * were one then we always set the LSbit.
77 */
78#define _FP_FRAC_SRS_4(X,N,size) \
79 do { \
80 _FP_I_TYPE _up, _down, _skip, _i; \
81 _FP_W_TYPE _s; \
82 _skip = (N) / _FP_W_TYPE_SIZE; \
83 _down = (N) % _FP_W_TYPE_SIZE; \
84 _up = _FP_W_TYPE_SIZE - _down; \
85 for (_s = _i = 0; _i < _skip; ++_i) \
86 _s |= X##_f[_i]; \
87 _s |= X##_f[_i] << _up; \
88/* s is now != 0 if we want to set the LSbit */ \
89 for (_i = 0; _i < 3-_skip; ++_i) \
90 X##_f[_i] = X##_f[_i+_skip] >> _down | X##_f[_i+_skip+1] << _up; \
91 X##_f[_i] = X##_f[3] >> _down; \
92 for (++_i; _i < 4; ++_i) \
93 X##_f[_i] = 0; \
94 /* don't fix the LSB until the very end when we're sure f[0] is stable */ \
95 X##_f[0] |= (_s != 0); \
96 } while (0)
97
98#define _FP_FRAC_ADD_4(R,X,Y) \
99 __FP_FRAC_ADD_4(R##_f[3], R##_f[2], R##_f[1], R##_f[0], \
100 X##_f[3], X##_f[2], X##_f[1], X##_f[0], \
101 Y##_f[3], Y##_f[2], Y##_f[1], Y##_f[0])
102
103#define _FP_FRAC_SUB_4(R,X,Y) \
104 __FP_FRAC_SUB_4(R##_f[3], R##_f[2], R##_f[1], R##_f[0], \
105 X##_f[3], X##_f[2], X##_f[1], X##_f[0], \
106 Y##_f[3], Y##_f[2], Y##_f[1], Y##_f[0])
107
108#define _FP_FRAC_ADDI_4(X,I) \
109 __FP_FRAC_ADDI_4(X##_f[3], X##_f[2], X##_f[1], X##_f[0], I)
110
111#define _FP_ZEROFRAC_4 0,0,0,0
112#define _FP_MINFRAC_4 0,0,0,1
113
114#define _FP_FRAC_ZEROP_4(X) ((X##_f[0] | X##_f[1] | X##_f[2] | X##_f[3]) == 0)
115#define _FP_FRAC_NEGP_4(X) ((_FP_WS_TYPE)X##_f[3] < 0)
116#define _FP_FRAC_OVERP_4(fs,X) (X##_f[0] & _FP_OVERFLOW_##fs)
117
118#define _FP_FRAC_EQ_4(X,Y) \
119 (X##_f[0] == Y##_f[0] && X##_f[1] == Y##_f[1] \
120 && X##_f[2] == Y##_f[2] && X##_f[3] == Y##_f[3])
121
122#define _FP_FRAC_GT_4(X,Y) \
123 (X##_f[3] > Y##_f[3] || \
124 (X##_f[3] == Y##_f[3] && (X##_f[2] > Y##_f[2] || \
125 (X##_f[2] == Y##_f[2] && (X##_f[1] > Y##_f[1] || \
126 (X##_f[1] == Y##_f[1] && X##_f[0] > Y##_f[0]) \
127 )) \
128 )) \
129 )
130
131#define _FP_FRAC_GE_4(X,Y) \
132 (X##_f[3] > Y##_f[3] || \
133 (X##_f[3] == Y##_f[3] && (X##_f[2] > Y##_f[2] || \
134 (X##_f[2] == Y##_f[2] && (X##_f[1] > Y##_f[1] || \
135 (X##_f[1] == Y##_f[1] && X##_f[0] >= Y##_f[0]) \
136 )) \
137 )) \
138 )
139
140
141#define _FP_FRAC_CLZ_4(R,X) \
142 do { \
143 if (X##_f[3]) \
144 { \
145 __FP_CLZ(R,X##_f[3]); \
146 } \
147 else if (X##_f[2]) \
148 { \
149 __FP_CLZ(R,X##_f[2]); \
150 R += _FP_W_TYPE_SIZE; \
151 } \
152 else if (X##_f[1]) \
153 { \
154 __FP_CLZ(R,X##_f[2]); \
155 R += _FP_W_TYPE_SIZE*2; \
156 } \
157 else \
158 { \
159 __FP_CLZ(R,X##_f[0]); \
160 R += _FP_W_TYPE_SIZE*3; \
161 } \
162 } while(0)
163
164
165#define _FP_UNPACK_RAW_4(fs, X, val) \
166 do { \
167 union _FP_UNION_##fs _flo; _flo.flt = (val); \
168 X##_f[0] = _flo.bits.frac0; \
169 X##_f[1] = _flo.bits.frac1; \
170 X##_f[2] = _flo.bits.frac2; \
171 X##_f[3] = _flo.bits.frac3; \
172 X##_e = _flo.bits.exp; \
173 X##_s = _flo.bits.sign; \
174 } while (0)
175
176#define _FP_PACK_RAW_4(fs, val, X) \
177 do { \
178 union _FP_UNION_##fs _flo; \
179 _flo.bits.frac0 = X##_f[0]; \
180 _flo.bits.frac1 = X##_f[1]; \
181 _flo.bits.frac2 = X##_f[2]; \
182 _flo.bits.frac3 = X##_f[3]; \
183 _flo.bits.exp = X##_e; \
184 _flo.bits.sign = X##_s; \
185 (val) = _flo.flt; \
186 } while (0)
187
188
189/*
190 * Internals
191 */
192
193#define __FP_FRAC_SET_4(X,I3,I2,I1,I0) \
194 (X##_f[3] = I3, X##_f[2] = I2, X##_f[1] = I1, X##_f[0] = I0)
195
196#ifndef __FP_FRAC_ADD_4
197#define __FP_FRAC_ADD_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \
198 do { \
199 int _c1, _c2, _c3; \
200 r0 = x0 + y0; \
201 _c1 = r0 < x0; \
202 r1 = x1 + y1; \
203 _c2 = r1 < x1; \
204 r1 += _c1; \
205 _c2 |= r1 < _c1; \
206 r2 = x2 + y2; \
207 _c3 = r2 < x2; \
208 r2 += _c2; \
209 _c3 |= r2 < _c2; \
210 r3 = x3 + y3 + _c3; \
211 } while (0)
212#endif
213
214#ifndef __FP_FRAC_SUB_4
215#define __FP_FRAC_SUB_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \
216 do { \
217 int _c1, _c2, _c3; \
218 r0 = x0 - y0; \
219 _c1 = r0 > x0; \
220 r1 = x1 - y1; \
221 _c2 = r1 > x1; \
222 r1 -= _c1; \
223 _c2 |= r1 > _c1; \
224 r2 = x2 - y2; \
225 _c3 = r2 > x2; \
226 r2 -= _c2; \
227 _c3 |= r2 > _c2; \
228 r3 = x3 - y3 - _c3; \
229 } while (0)
230#endif
231
232#ifndef __FP_FRAC_ADDI_4
233/* I always wanted to be a lisp programmer :-> */
234#define __FP_FRAC_ADDI_4(x3,x2,x1,x0,i) \
235 (x3 += ((x2 += ((x1 += ((x0 += i) < x0)) < x1) < x2)))
236#endif
237
238/* Convert FP values between word sizes. This appears to be more
239 * complicated than I'd have expected it to be, so these might be
240 * wrong... These macros are in any case somewhat bogus because they
241 * use information about what various FRAC_n variables look like
242 * internally [eg, that 2 word vars are X_f0 and x_f1]. But so do
243 * the ones in op-2.h and op-1.h.
244 */
245#define _FP_FRAC_CONV_1_4(dfs, sfs, D, S) \
246 do { \
247 _FP_FRAC_SRS_4(S, (_FP_WFRACBITS_##sfs - _FP_WFRACBITS_##dfs), \
248 _FP_WFRACBITS_##sfs); \
249 D##_f = S##_f[0]; \
250 } while (0)
251
252#define _FP_FRAC_CONV_2_4(dfs, sfs, D, S) \
253 do { \
254 _FP_FRAC_SRS_4(S, (_FP_WFRACBITS_##sfs - _FP_WFRACBITS_##dfs), \
255 _FP_WFRACBITS_##sfs); \
256 D##_f0 = S##_f[0]; \
257 D##_f1 = S##_f[1]; \
258 } while (0)
259
260/* Assembly/disassembly for converting to/from integral types.
261 * No shifting or overflow handled here.
262 */
263/* Put the FP value X into r, which is an integer of size rsize. */
264#define _FP_FRAC_ASSEMBLE_4(r, X, rsize) \
265 do { \
266 if (rsize <= _FP_W_TYPE_SIZE) \
267 r = X##_f[0]; \
268 else if (rsize <= 2*_FP_W_TYPE_SIZE) \
269 { \
270 r = X##_f[1]; \
271 r <<= _FP_W_TYPE_SIZE; \
272 r += X##_f[0]; \
273 } \
274 else \
275 { \
276 /* I'm feeling lazy so we deal with int == 3words (implausible)*/ \
277 /* and int == 4words as a single case. */ \
278 r = X##_f[3]; \
279 r <<= _FP_W_TYPE_SIZE; \
280 r += X##_f[2]; \
281 r <<= _FP_W_TYPE_SIZE; \
282 r += X##_f[1]; \
283 r <<= _FP_W_TYPE_SIZE; \
284 r += X##_f[0]; \
285 } \
286 } while (0)
287
288/* "No disassemble Number Five!" */
289/* move an integer of size rsize into X's fractional part. We rely on
290 * the _f[] array consisting of words of size _FP_W_TYPE_SIZE to avoid
291 * having to mask the values we store into it.
292 */
293#define _FP_FRAC_DISASSEMBLE_4(X, r, rsize) \
294 do { \
295 X##_f[0] = r; \
296 X##_f[1] = (rsize <= _FP_W_TYPE_SIZE ? 0 : r >> _FP_W_TYPE_SIZE); \
297 X##_f[2] = (rsize <= 2*_FP_W_TYPE_SIZE ? 0 : r >> 2*_FP_W_TYPE_SIZE); \
298 X##_f[3] = (rsize <= 3*_FP_W_TYPE_SIZE ? 0 : r >> 3*_FP_W_TYPE_SIZE); \
299 } while (0)
300
301#define _FP_FRAC_CONV_4_1(dfs, sfs, D, S) \
302 do { \
303 D##_f[0] = S##_f; \
304 D##_f[1] = D##_f[2] = D##_f[3] = 0; \
305 _FP_FRAC_SLL_4(D, (_FP_WFRACBITS_##dfs - _FP_WFRACBITS_##sfs)); \
306 } while (0)
307
308#define _FP_FRAC_CONV_4_2(dfs, sfs, D, S) \
309 do { \
310 D##_f[0] = S##_f0; \
311 D##_f[1] = S##_f1; \
312 D##_f[2] = D##_f[3] = 0; \
313 _FP_FRAC_SLL_4(D, (_FP_WFRACBITS_##dfs - _FP_WFRACBITS_##sfs)); \
314 } while (0)
315
316/* FIXME! This has to be written */
317#define _FP_SQRT_MEAT_4(R, S, T, X, q)
diff --git a/arch/powerpc/math-emu/op-common.h b/arch/powerpc/math-emu/op-common.h
deleted file mode 100644
index afb82b6498ce..000000000000
--- a/arch/powerpc/math-emu/op-common.h
+++ /dev/null
@@ -1,688 +0,0 @@
1#define _FP_DECL(wc, X) \
2 _FP_I_TYPE X##_c, X##_s, X##_e; \
3 _FP_FRAC_DECL_##wc(X)
4
5/*
6 * Finish truely unpacking a native fp value by classifying the kind
7 * of fp value and normalizing both the exponent and the fraction.
8 */
9
10#define _FP_UNPACK_CANONICAL(fs, wc, X) \
11do { \
12 switch (X##_e) \
13 { \
14 default: \
15 _FP_FRAC_HIGH_##wc(X) |= _FP_IMPLBIT_##fs; \
16 _FP_FRAC_SLL_##wc(X, _FP_WORKBITS); \
17 X##_e -= _FP_EXPBIAS_##fs; \
18 X##_c = FP_CLS_NORMAL; \
19 break; \
20 \
21 case 0: \
22 if (_FP_FRAC_ZEROP_##wc(X)) \
23 X##_c = FP_CLS_ZERO; \
24 else \
25 { \
26 /* a denormalized number */ \
27 _FP_I_TYPE _shift; \
28 _FP_FRAC_CLZ_##wc(_shift, X); \
29 _shift -= _FP_FRACXBITS_##fs; \
30 _FP_FRAC_SLL_##wc(X, (_shift+_FP_WORKBITS)); \
31 X##_e -= _FP_EXPBIAS_##fs - 1 + _shift; \
32 X##_c = FP_CLS_NORMAL; \
33 } \
34 break; \
35 \
36 case _FP_EXPMAX_##fs: \
37 if (_FP_FRAC_ZEROP_##wc(X)) \
38 X##_c = FP_CLS_INF; \
39 else \
40 /* we don't differentiate between signaling and quiet nans */ \
41 X##_c = FP_CLS_NAN; \
42 break; \
43 } \
44} while (0)
45
46
47/*
48 * Before packing the bits back into the native fp result, take care
49 * of such mundane things as rounding and overflow. Also, for some
50 * kinds of fp values, the original parts may not have been fully
51 * extracted -- but that is ok, we can regenerate them now.
52 */
53
54#define _FP_PACK_CANONICAL(fs, wc, X) \
55({int __ret = 0; \
56 switch (X##_c) \
57 { \
58 case FP_CLS_NORMAL: \
59 X##_e += _FP_EXPBIAS_##fs; \
60 if (X##_e > 0) \
61 { \
62 __ret |= _FP_ROUND(wc, X); \
63 if (_FP_FRAC_OVERP_##wc(fs, X)) \
64 { \
65 _FP_FRAC_SRL_##wc(X, (_FP_WORKBITS+1)); \
66 X##_e++; \
67 } \
68 else \
69 _FP_FRAC_SRL_##wc(X, _FP_WORKBITS); \
70 if (X##_e >= _FP_EXPMAX_##fs) \
71 { \
72 /* overflow to infinity */ \
73 X##_e = _FP_EXPMAX_##fs; \
74 _FP_FRAC_SET_##wc(X, _FP_ZEROFRAC_##wc); \
75 __ret |= EFLAG_OVERFLOW; \
76 } \
77 } \
78 else \
79 { \
80 /* we've got a denormalized number */ \
81 X##_e = -X##_e + 1; \
82 if (X##_e <= _FP_WFRACBITS_##fs) \
83 { \
84 _FP_FRAC_SRS_##wc(X, X##_e, _FP_WFRACBITS_##fs); \
85 _FP_FRAC_SLL_##wc(X, 1); \
86 if (_FP_FRAC_OVERP_##wc(fs, X)) \
87 { \
88 X##_e = 1; \
89 _FP_FRAC_SET_##wc(X, _FP_ZEROFRAC_##wc); \
90 } \
91 else \
92 { \
93 X##_e = 0; \
94 _FP_FRAC_SRL_##wc(X, _FP_WORKBITS+1); \
95 __ret |= EFLAG_UNDERFLOW; \
96 } \
97 } \
98 else \
99 { \
100 /* underflow to zero */ \
101 X##_e = 0; \
102 _FP_FRAC_SET_##wc(X, _FP_ZEROFRAC_##wc); \
103 __ret |= EFLAG_UNDERFLOW; \
104 } \
105 } \
106 break; \
107 \
108 case FP_CLS_ZERO: \
109 X##_e = 0; \
110 _FP_FRAC_SET_##wc(X, _FP_ZEROFRAC_##wc); \
111 break; \
112 \
113 case FP_CLS_INF: \
114 X##_e = _FP_EXPMAX_##fs; \
115 _FP_FRAC_SET_##wc(X, _FP_ZEROFRAC_##wc); \
116 break; \
117 \
118 case FP_CLS_NAN: \
119 X##_e = _FP_EXPMAX_##fs; \
120 if (!_FP_KEEPNANFRACP) \
121 { \
122 _FP_FRAC_SET_##wc(X, _FP_NANFRAC_##fs); \
123 X##_s = 0; \
124 } \
125 else \
126 _FP_FRAC_HIGH_##wc(X) |= _FP_QNANBIT_##fs; \
127 break; \
128 } \
129 __ret; \
130})
131
132
133/*
134 * Main addition routine. The input values should be cooked.
135 */
136
137#define _FP_ADD(fs, wc, R, X, Y) \
138do { \
139 switch (_FP_CLS_COMBINE(X##_c, Y##_c)) \
140 { \
141 case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_NORMAL): \
142 { \
143 /* shift the smaller number so that its exponent matches the larger */ \
144 _FP_I_TYPE diff = X##_e - Y##_e; \
145 \
146 if (diff < 0) \
147 { \
148 diff = -diff; \
149 if (diff <= _FP_WFRACBITS_##fs) \
150 _FP_FRAC_SRS_##wc(X, diff, _FP_WFRACBITS_##fs); \
151 else if (!_FP_FRAC_ZEROP_##wc(X)) \
152 _FP_FRAC_SET_##wc(X, _FP_MINFRAC_##wc); \
153 else \
154 _FP_FRAC_SET_##wc(X, _FP_ZEROFRAC_##wc); \
155 R##_e = Y##_e; \
156 } \
157 else \
158 { \
159 if (diff > 0) \
160 { \
161 if (diff <= _FP_WFRACBITS_##fs) \
162 _FP_FRAC_SRS_##wc(Y, diff, _FP_WFRACBITS_##fs); \
163 else if (!_FP_FRAC_ZEROP_##wc(Y)) \
164 _FP_FRAC_SET_##wc(Y, _FP_MINFRAC_##wc); \
165 else \
166 _FP_FRAC_SET_##wc(Y, _FP_ZEROFRAC_##wc); \
167 } \
168 R##_e = X##_e; \
169 } \
170 \
171 R##_c = FP_CLS_NORMAL; \
172 \
173 if (X##_s == Y##_s) \
174 { \
175 R##_s = X##_s; \
176 _FP_FRAC_ADD_##wc(R, X, Y); \
177 if (_FP_FRAC_OVERP_##wc(fs, R)) \
178 { \
179 _FP_FRAC_SRS_##wc(R, 1, _FP_WFRACBITS_##fs); \
180 R##_e++; \
181 } \
182 } \
183 else \
184 { \
185 R##_s = X##_s; \
186 _FP_FRAC_SUB_##wc(R, X, Y); \
187 if (_FP_FRAC_ZEROP_##wc(R)) \
188 { \
189 /* return an exact zero */ \
190 if (FP_ROUNDMODE == FP_RND_MINF) \
191 R##_s |= Y##_s; \
192 else \
193 R##_s &= Y##_s; \
194 R##_c = FP_CLS_ZERO; \
195 } \
196 else \
197 { \
198 if (_FP_FRAC_NEGP_##wc(R)) \
199 { \
200 _FP_FRAC_SUB_##wc(R, Y, X); \
201 R##_s = Y##_s; \
202 } \
203 \
204 /* renormalize after subtraction */ \
205 _FP_FRAC_CLZ_##wc(diff, R); \
206 diff -= _FP_WFRACXBITS_##fs; \
207 if (diff) \
208 { \
209 R##_e -= diff; \
210 _FP_FRAC_SLL_##wc(R, diff); \
211 } \
212 } \
213 } \
214 break; \
215 } \
216 \
217 case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_NAN): \
218 _FP_CHOOSENAN(fs, wc, R, X, Y); \
219 break; \
220 \
221 case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_ZERO): \
222 R##_e = X##_e; \
223 case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_NORMAL): \
224 case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_INF): \
225 case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_ZERO): \
226 _FP_FRAC_COPY_##wc(R, X); \
227 R##_s = X##_s; \
228 R##_c = X##_c; \
229 break; \
230 \
231 case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_NORMAL): \
232 R##_e = Y##_e; \
233 case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_NAN): \
234 case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_NAN): \
235 case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_NAN): \
236 _FP_FRAC_COPY_##wc(R, Y); \
237 R##_s = Y##_s; \
238 R##_c = Y##_c; \
239 break; \
240 \
241 case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_INF): \
242 if (X##_s != Y##_s) \
243 { \
244 /* +INF + -INF => NAN */ \
245 _FP_FRAC_SET_##wc(R, _FP_NANFRAC_##fs); \
246 R##_s = X##_s ^ Y##_s; \
247 R##_c = FP_CLS_NAN; \
248 break; \
249 } \
250 /* FALLTHRU */ \
251 \
252 case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_NORMAL): \
253 case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_ZERO): \
254 R##_s = X##_s; \
255 R##_c = FP_CLS_INF; \
256 break; \
257 \
258 case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_INF): \
259 case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_INF): \
260 R##_s = Y##_s; \
261 R##_c = FP_CLS_INF; \
262 break; \
263 \
264 case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_ZERO): \
265 /* make sure the sign is correct */ \
266 if (FP_ROUNDMODE == FP_RND_MINF) \
267 R##_s = X##_s | Y##_s; \
268 else \
269 R##_s = X##_s & Y##_s; \
270 R##_c = FP_CLS_ZERO; \
271 break; \
272 \
273 default: \
274 abort(); \
275 } \
276} while (0)
277
278
279/*
280 * Main negation routine. FIXME -- when we care about setting exception
281 * bits reliably, this will not do. We should examine all of the fp classes.
282 */
283
284#define _FP_NEG(fs, wc, R, X) \
285 do { \
286 _FP_FRAC_COPY_##wc(R, X); \
287 R##_c = X##_c; \
288 R##_e = X##_e; \
289 R##_s = 1 ^ X##_s; \
290 } while (0)
291
292
293/*
294 * Main multiplication routine. The input values should be cooked.
295 */
296
297#define _FP_MUL(fs, wc, R, X, Y) \
298do { \
299 R##_s = X##_s ^ Y##_s; \
300 switch (_FP_CLS_COMBINE(X##_c, Y##_c)) \
301 { \
302 case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_NORMAL): \
303 R##_c = FP_CLS_NORMAL; \
304 R##_e = X##_e + Y##_e + 1; \
305 \
306 _FP_MUL_MEAT_##fs(R,X,Y); \
307 \
308 if (_FP_FRAC_OVERP_##wc(fs, R)) \
309 _FP_FRAC_SRS_##wc(R, 1, _FP_WFRACBITS_##fs); \
310 else \
311 R##_e--; \
312 break; \
313 \
314 case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_NAN): \
315 _FP_CHOOSENAN(fs, wc, R, X, Y); \
316 break; \
317 \
318 case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_NORMAL): \
319 case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_INF): \
320 case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_ZERO): \
321 R##_s = X##_s; \
322 \
323 case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_INF): \
324 case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_NORMAL): \
325 case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_NORMAL): \
326 case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_ZERO): \
327 _FP_FRAC_COPY_##wc(R, X); \
328 R##_c = X##_c; \
329 break; \
330 \
331 case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_NAN): \
332 case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_NAN): \
333 case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_NAN): \
334 R##_s = Y##_s; \
335 \
336 case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_INF): \
337 case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_ZERO): \
338 _FP_FRAC_COPY_##wc(R, Y); \
339 R##_c = Y##_c; \
340 break; \
341 \
342 case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_ZERO): \
343 case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_INF): \
344 R##_c = FP_CLS_NAN; \
345 _FP_FRAC_SET_##wc(R, _FP_NANFRAC_##fs); \
346 break; \
347 \
348 default: \
349 abort(); \
350 } \
351} while (0)
352
353
354/*
355 * Main division routine. The input values should be cooked.
356 */
357
358#define _FP_DIV(fs, wc, R, X, Y) \
359do { \
360 R##_s = X##_s ^ Y##_s; \
361 switch (_FP_CLS_COMBINE(X##_c, Y##_c)) \
362 { \
363 case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_NORMAL): \
364 R##_c = FP_CLS_NORMAL; \
365 R##_e = X##_e - Y##_e; \
366 \
367 _FP_DIV_MEAT_##fs(R,X,Y); \
368 break; \
369 \
370 case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_NAN): \
371 _FP_CHOOSENAN(fs, wc, R, X, Y); \
372 break; \
373 \
374 case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_NORMAL): \
375 case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_INF): \
376 case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_ZERO): \
377 R##_s = X##_s; \
378 _FP_FRAC_COPY_##wc(R, X); \
379 R##_c = X##_c; \
380 break; \
381 \
382 case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_NAN): \
383 case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_NAN): \
384 case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_NAN): \
385 R##_s = Y##_s; \
386 _FP_FRAC_COPY_##wc(R, Y); \
387 R##_c = Y##_c; \
388 break; \
389 \
390 case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_INF): \
391 case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_INF): \
392 case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_NORMAL): \
393 R##_c = FP_CLS_ZERO; \
394 break; \
395 \
396 case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_ZERO): \
397 case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_ZERO): \
398 case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_NORMAL): \
399 R##_c = FP_CLS_INF; \
400 break; \
401 \
402 case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_INF): \
403 case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_ZERO): \
404 R##_c = FP_CLS_NAN; \
405 _FP_FRAC_SET_##wc(R, _FP_NANFRAC_##fs); \
406 break; \
407 \
408 default: \
409 abort(); \
410 } \
411} while (0)
412
413
414/*
415 * Main differential comparison routine. The inputs should be raw not
416 * cooked. The return is -1,0,1 for normal values, 2 otherwise.
417 */
418
419#define _FP_CMP(fs, wc, ret, X, Y, un) \
420 do { \
421 /* NANs are unordered */ \
422 if ((X##_e == _FP_EXPMAX_##fs && !_FP_FRAC_ZEROP_##wc(X)) \
423 || (Y##_e == _FP_EXPMAX_##fs && !_FP_FRAC_ZEROP_##wc(Y))) \
424 { \
425 ret = un; \
426 } \
427 else \
428 { \
429 int __x_zero = (!X##_e && _FP_FRAC_ZEROP_##wc(X)) ? 1 : 0; \
430 int __y_zero = (!Y##_e && _FP_FRAC_ZEROP_##wc(Y)) ? 1 : 0; \
431 \
432 if (__x_zero && __y_zero) \
433 ret = 0; \
434 else if (__x_zero) \
435 ret = Y##_s ? 1 : -1; \
436 else if (__y_zero) \
437 ret = X##_s ? -1 : 1; \
438 else if (X##_s != Y##_s) \
439 ret = X##_s ? -1 : 1; \
440 else if (X##_e > Y##_e) \
441 ret = X##_s ? -1 : 1; \
442 else if (X##_e < Y##_e) \
443 ret = X##_s ? 1 : -1; \
444 else if (_FP_FRAC_GT_##wc(X, Y)) \
445 ret = X##_s ? -1 : 1; \
446 else if (_FP_FRAC_GT_##wc(Y, X)) \
447 ret = X##_s ? 1 : -1; \
448 else \
449 ret = 0; \
450 } \
451 } while (0)
452
453
454/* Simplification for strict equality. */
455
456#define _FP_CMP_EQ(fs, wc, ret, X, Y) \
457 do { \
458 /* NANs are unordered */ \
459 if ((X##_e == _FP_EXPMAX_##fs && !_FP_FRAC_ZEROP_##wc(X)) \
460 || (Y##_e == _FP_EXPMAX_##fs && !_FP_FRAC_ZEROP_##wc(Y))) \
461 { \
462 ret = 1; \
463 } \
464 else \
465 { \
466 ret = !(X##_e == Y##_e \
467 && _FP_FRAC_EQ_##wc(X, Y) \
468 && (X##_s == Y##_s || !X##_e && _FP_FRAC_ZEROP_##wc(X))); \
469 } \
470 } while (0)
471
472/*
473 * Main square root routine. The input value should be cooked.
474 */
475
476#define _FP_SQRT(fs, wc, R, X) \
477do { \
478 _FP_FRAC_DECL_##wc(T); _FP_FRAC_DECL_##wc(S); \
479 _FP_W_TYPE q; \
480 switch (X##_c) \
481 { \
482 case FP_CLS_NAN: \
483 R##_s = 0; \
484 R##_c = FP_CLS_NAN; \
485 _FP_FRAC_SET_##wc(X, _FP_ZEROFRAC_##wc); \
486 break; \
487 case FP_CLS_INF: \
488 if (X##_s) \
489 { \
490 R##_s = 0; \
491 R##_c = FP_CLS_NAN; /* sNAN */ \
492 } \
493 else \
494 { \
495 R##_s = 0; \
496 R##_c = FP_CLS_INF; /* sqrt(+inf) = +inf */ \
497 } \
498 break; \
499 case FP_CLS_ZERO: \
500 R##_s = X##_s; \
501 R##_c = FP_CLS_ZERO; /* sqrt(+-0) = +-0 */ \
502 break; \
503 case FP_CLS_NORMAL: \
504 R##_s = 0; \
505 if (X##_s) \
506 { \
507 R##_c = FP_CLS_NAN; /* sNAN */ \
508 break; \
509 } \
510 R##_c = FP_CLS_NORMAL; \
511 if (X##_e & 1) \
512 _FP_FRAC_SLL_##wc(X, 1); \
513 R##_e = X##_e >> 1; \
514 _FP_FRAC_SET_##wc(S, _FP_ZEROFRAC_##wc); \
515 _FP_FRAC_SET_##wc(R, _FP_ZEROFRAC_##wc); \
516 q = _FP_OVERFLOW_##fs; \
517 _FP_FRAC_SLL_##wc(X, 1); \
518 _FP_SQRT_MEAT_##wc(R, S, T, X, q); \
519 _FP_FRAC_SRL_##wc(R, 1); \
520 } \
521 } while (0)
522
523/*
524 * Convert from FP to integer
525 */
526
527/* "When a NaN, infinity, large positive argument >= 2147483648.0, or
528 * large negative argument <= -2147483649.0 is converted to an integer,
529 * the invalid_current bit...should be set and fp_exception_IEEE_754 should
530 * be raised. If the floating point invalid trap is disabled, no trap occurs
531 * and a numerical result is generated: if the sign bit of the operand
532 * is 0, the result is 2147483647; if the sign bit of the operand is 1,
533 * the result is -2147483648."
534 * Similarly for conversion to extended ints, except that the boundaries
535 * are >= 2^63, <= -(2^63 + 1), and the results are 2^63 + 1 for s=0 and
536 * -2^63 for s=1.
537 * -- SPARC Architecture Manual V9, Appendix B, which specifies how
538 * SPARCs resolve implementation dependencies in the IEEE-754 spec.
539 * I don't believe that the code below follows this. I'm not even sure
540 * it's right!
541 * It doesn't cope with needing to convert to an n bit integer when there
542 * is no n bit integer type. Fortunately gcc provides long long so this
543 * isn't a problem for sparc32.
544 * I have, however, fixed its NaN handling to conform as above.
545 * -- PMM 02/1998
546 * NB: rsigned is not 'is r declared signed?' but 'should the value stored
547 * in r be signed or unsigned?'. r is always(?) declared unsigned.
548 * Comments below are mine, BTW -- PMM
549 */
550#define _FP_TO_INT(fs, wc, r, X, rsize, rsigned) \
551 do { \
552 switch (X##_c) \
553 { \
554 case FP_CLS_NORMAL: \
555 if (X##_e < 0) \
556 { \
557 /* case FP_CLS_NAN: see above! */ \
558 case FP_CLS_ZERO: \
559 r = 0; \
560 } \
561 else if (X##_e >= rsize - (rsigned != 0)) \
562 { /* overflow */ \
563 case FP_CLS_NAN: \
564 case FP_CLS_INF: \
565 if (rsigned) \
566 { \
567 r = 1; \
568 r <<= rsize - 1; \
569 r -= 1 - X##_s; \
570 } \
571 else \
572 { \
573 r = 0; \
574 if (!X##_s) \
575 r = ~r; \
576 } \
577 } \
578 else \
579 { \
580 if (_FP_W_TYPE_SIZE*wc < rsize) \
581 { \
582 _FP_FRAC_ASSEMBLE_##wc(r, X, rsize); \
583 r <<= X##_e - _FP_WFRACBITS_##fs; \
584 } \
585 else \
586 { \
587 if (X##_e >= _FP_WFRACBITS_##fs) \
588 _FP_FRAC_SLL_##wc(X, (X##_e - _FP_WFRACBITS_##fs + 1));\
589 else \
590 _FP_FRAC_SRL_##wc(X, (_FP_WFRACBITS_##fs - X##_e - 1));\
591 _FP_FRAC_ASSEMBLE_##wc(r, X, rsize); \
592 } \
593 if (rsigned && X##_s) \
594 r = -r; \
595 } \
596 break; \
597 } \
598 } while (0)
599
600#define _FP_FROM_INT(fs, wc, X, r, rsize, rtype) \
601 do { \
602 if (r) \
603 { \
604 X##_c = FP_CLS_NORMAL; \
605 \
606 if ((X##_s = (r < 0))) \
607 r = -r; \
608 /* Note that `r' is now considered unsigned, so we don't have \
609 to worry about the single signed overflow case. */ \
610 \
611 if (rsize <= _FP_W_TYPE_SIZE) \
612 __FP_CLZ(X##_e, r); \
613 else \
614 __FP_CLZ_2(X##_e, (_FP_W_TYPE)(r >> _FP_W_TYPE_SIZE), \
615 (_FP_W_TYPE)r); \
616 if (rsize < _FP_W_TYPE_SIZE) \
617 X##_e -= (_FP_W_TYPE_SIZE - rsize); \
618 X##_e = rsize - X##_e - 1; \
619 \
620 if (_FP_FRACBITS_##fs < rsize && _FP_WFRACBITS_##fs < X##_e) \
621 __FP_FRAC_SRS_1(r, (X##_e - _FP_WFRACBITS_##fs), rsize); \
622 r &= ~((_FP_W_TYPE)1 << X##_e); \
623 _FP_FRAC_DISASSEMBLE_##wc(X, ((unsigned rtype)r), rsize); \
624 _FP_FRAC_SLL_##wc(X, (_FP_WFRACBITS_##fs - X##_e - 1)); \
625 } \
626 else \
627 { \
628 X##_c = FP_CLS_ZERO, X##_s = 0; \
629 } \
630 } while (0)
631
632
633#define FP_CONV(dfs,sfs,dwc,swc,D,S) \
634 do { \
635 _FP_FRAC_CONV_##dwc##_##swc(dfs, sfs, D, S); \
636 D##_e = S##_e; \
637 D##_c = S##_c; \
638 D##_s = S##_s; \
639 } while (0)
640
641/*
642 * Helper primitives.
643 */
644
645/* Count leading zeros in a word. */
646
647#ifndef __FP_CLZ
648#if _FP_W_TYPE_SIZE < 64
649/* this is just to shut the compiler up about shifts > word length -- PMM 02/1998 */
650#define __FP_CLZ(r, x) \
651 do { \
652 _FP_W_TYPE _t = (x); \
653 r = _FP_W_TYPE_SIZE - 1; \
654 if (_t > 0xffff) r -= 16; \
655 if (_t > 0xffff) _t >>= 16; \
656 if (_t > 0xff) r -= 8; \
657 if (_t > 0xff) _t >>= 8; \
658 if (_t & 0xf0) r -= 4; \
659 if (_t & 0xf0) _t >>= 4; \
660 if (_t & 0xc) r -= 2; \
661 if (_t & 0xc) _t >>= 2; \
662 if (_t & 0x2) r -= 1; \
663 } while (0)
664#else /* not _FP_W_TYPE_SIZE < 64 */
665#define __FP_CLZ(r, x) \
666 do { \
667 _FP_W_TYPE _t = (x); \
668 r = _FP_W_TYPE_SIZE - 1; \
669 if (_t > 0xffffffff) r -= 32; \
670 if (_t > 0xffffffff) _t >>= 32; \
671 if (_t > 0xffff) r -= 16; \
672 if (_t > 0xffff) _t >>= 16; \
673 if (_t > 0xff) r -= 8; \
674 if (_t > 0xff) _t >>= 8; \
675 if (_t & 0xf0) r -= 4; \
676 if (_t & 0xf0) _t >>= 4; \
677 if (_t & 0xc) r -= 2; \
678 if (_t & 0xc) _t >>= 2; \
679 if (_t & 0x2) r -= 1; \
680 } while (0)
681#endif /* not _FP_W_TYPE_SIZE < 64 */
682#endif /* ndef __FP_CLZ */
683
684#define _FP_DIV_HELP_imm(q, r, n, d) \
685 do { \
686 q = n / d, r = n % d; \
687 } while (0)
688
diff --git a/arch/powerpc/math-emu/single.h b/arch/powerpc/math-emu/single.h
deleted file mode 100644
index f19d99451815..000000000000
--- a/arch/powerpc/math-emu/single.h
+++ /dev/null
@@ -1,66 +0,0 @@
1/*
2 * Definitions for IEEE Single Precision
3 */
4
5#if _FP_W_TYPE_SIZE < 32
6#error "Here's a nickel kid. Go buy yourself a real computer."
7#endif
8
9#define _FP_FRACBITS_S 24
10#define _FP_FRACXBITS_S (_FP_W_TYPE_SIZE - _FP_FRACBITS_S)
11#define _FP_WFRACBITS_S (_FP_WORKBITS + _FP_FRACBITS_S)
12#define _FP_WFRACXBITS_S (_FP_W_TYPE_SIZE - _FP_WFRACBITS_S)
13#define _FP_EXPBITS_S 8
14#define _FP_EXPBIAS_S 127
15#define _FP_EXPMAX_S 255
16#define _FP_QNANBIT_S ((_FP_W_TYPE)1 << (_FP_FRACBITS_S-2))
17#define _FP_IMPLBIT_S ((_FP_W_TYPE)1 << (_FP_FRACBITS_S-1))
18#define _FP_OVERFLOW_S ((_FP_W_TYPE)1 << (_FP_WFRACBITS_S))
19
20/* The implementation of _FP_MUL_MEAT_S and _FP_DIV_MEAT_S should be
21 chosen by the target machine. */
22
23union _FP_UNION_S
24{
25 float flt;
26 struct {
27#if __BYTE_ORDER == __BIG_ENDIAN
28 unsigned sign : 1;
29 unsigned exp : _FP_EXPBITS_S;
30 unsigned frac : _FP_FRACBITS_S - (_FP_IMPLBIT_S != 0);
31#else
32 unsigned frac : _FP_FRACBITS_S - (_FP_IMPLBIT_S != 0);
33 unsigned exp : _FP_EXPBITS_S;
34 unsigned sign : 1;
35#endif
36 } bits __attribute__((packed));
37};
38
39#define FP_DECL_S(X) _FP_DECL(1,X)
40#define FP_UNPACK_RAW_S(X,val) _FP_UNPACK_RAW_1(S,X,val)
41#define FP_PACK_RAW_S(val,X) _FP_PACK_RAW_1(S,val,X)
42
43#define FP_UNPACK_S(X,val) \
44 do { \
45 _FP_UNPACK_RAW_1(S,X,val); \
46 _FP_UNPACK_CANONICAL(S,1,X); \
47 } while (0)
48
49#define FP_PACK_S(val,X) \
50 do { \
51 _FP_PACK_CANONICAL(S,1,X); \
52 _FP_PACK_RAW_1(S,val,X); \
53 } while (0)
54
55#define FP_NEG_S(R,X) _FP_NEG(S,1,R,X)
56#define FP_ADD_S(R,X,Y) _FP_ADD(S,1,R,X,Y)
57#define FP_SUB_S(R,X,Y) _FP_SUB(S,1,R,X,Y)
58#define FP_MUL_S(R,X,Y) _FP_MUL(S,1,R,X,Y)
59#define FP_DIV_S(R,X,Y) _FP_DIV(S,1,R,X,Y)
60#define FP_SQRT_S(R,X) _FP_SQRT(S,1,R,X)
61
62#define FP_CMP_S(r,X,Y,un) _FP_CMP(S,1,r,X,Y,un)
63#define FP_CMP_EQ_S(r,X,Y) _FP_CMP_EQ(S,1,r,X,Y)
64
65#define FP_TO_INT_S(r,X,rsz,rsg) _FP_TO_INT(S,1,r,X,rsz,rsg)
66#define FP_FROM_INT_S(X,r,rs,rt) _FP_FROM_INT(S,1,X,r,rs,rt)
diff --git a/arch/powerpc/math-emu/soft-fp.h b/arch/powerpc/math-emu/soft-fp.h
deleted file mode 100644
index cca39598f873..000000000000
--- a/arch/powerpc/math-emu/soft-fp.h
+++ /dev/null
@@ -1,104 +0,0 @@
1#ifndef SOFT_FP_H
2#define SOFT_FP_H
3
4#include "sfp-machine.h"
5
6#define _FP_WORKBITS 3
7#define _FP_WORK_LSB ((_FP_W_TYPE)1 << 3)
8#define _FP_WORK_ROUND ((_FP_W_TYPE)1 << 2)
9#define _FP_WORK_GUARD ((_FP_W_TYPE)1 << 1)
10#define _FP_WORK_STICKY ((_FP_W_TYPE)1 << 0)
11
12#ifndef FP_RND_NEAREST
13# define FP_RND_NEAREST 0
14# define FP_RND_ZERO 1
15# define FP_RND_PINF 2
16# define FP_RND_MINF 3
17#ifndef FP_ROUNDMODE
18# define FP_ROUNDMODE FP_RND_NEAREST
19#endif
20#endif
21
22#define _FP_ROUND_NEAREST(wc, X) \
23({ int __ret = 0; \
24 int __frac = _FP_FRAC_LOW_##wc(X) & 15; \
25 if (__frac & 7) { \
26 __ret = EFLAG_INEXACT; \
27 if ((__frac & 7) != _FP_WORK_ROUND) \
28 _FP_FRAC_ADDI_##wc(X, _FP_WORK_ROUND); \
29 else if (__frac & _FP_WORK_LSB) \
30 _FP_FRAC_ADDI_##wc(X, _FP_WORK_ROUND); \
31 } \
32 __ret; \
33})
34
35#define _FP_ROUND_ZERO(wc, X) \
36({ int __ret = 0; \
37 if (_FP_FRAC_LOW_##wc(X) & 7) \
38 __ret = EFLAG_INEXACT; \
39 __ret; \
40})
41
42#define _FP_ROUND_PINF(wc, X) \
43({ int __ret = EFLAG_INEXACT; \
44 if (!X##_s && (_FP_FRAC_LOW_##wc(X) & 7)) \
45 _FP_FRAC_ADDI_##wc(X, _FP_WORK_LSB); \
46 else __ret = 0; \
47 __ret; \
48})
49
50#define _FP_ROUND_MINF(wc, X) \
51({ int __ret = EFLAG_INEXACT; \
52 if (X##_s && (_FP_FRAC_LOW_##wc(X) & 7)) \
53 _FP_FRAC_ADDI_##wc(X, _FP_WORK_LSB); \
54 else __ret = 0; \
55 __ret; \
56})
57
58#define _FP_ROUND(wc, X) \
59({ int __ret = 0; \
60 switch (FP_ROUNDMODE) \
61 { \
62 case FP_RND_NEAREST: \
63 __ret |= _FP_ROUND_NEAREST(wc,X); \
64 break; \
65 case FP_RND_ZERO: \
66 __ret |= _FP_ROUND_ZERO(wc,X); \
67 break; \
68 case FP_RND_PINF: \
69 __ret |= _FP_ROUND_PINF(wc,X); \
70 break; \
71 case FP_RND_MINF: \
72 __ret |= _FP_ROUND_MINF(wc,X); \
73 break; \
74 }; \
75 __ret; \
76})
77
78#define FP_CLS_NORMAL 0
79#define FP_CLS_ZERO 1
80#define FP_CLS_INF 2
81#define FP_CLS_NAN 3
82
83#define _FP_CLS_COMBINE(x,y) (((x) << 2) | (y))
84
85#include "op-1.h"
86#include "op-2.h"
87#include "op-4.h"
88#include "op-common.h"
89
90/* Sigh. Silly things longlong.h needs. */
91#define UWtype _FP_W_TYPE
92#define W_TYPE_SIZE _FP_W_TYPE_SIZE
93
94typedef int SItype __attribute__((mode(SI)));
95typedef int DItype __attribute__((mode(DI)));
96typedef unsigned int USItype __attribute__((mode(SI)));
97typedef unsigned int UDItype __attribute__((mode(DI)));
98#if _FP_W_TYPE_SIZE == 32
99typedef unsigned int UHWtype __attribute__((mode(HI)));
100#elif _FP_W_TYPE_SIZE == 64
101typedef USItype UHWtype;
102#endif
103
104#endif
diff --git a/arch/powerpc/math-emu/stfs.c b/arch/powerpc/math-emu/stfs.c
index 8689aa48ef69..6122147356d1 100644
--- a/arch/powerpc/math-emu/stfs.c
+++ b/arch/powerpc/math-emu/stfs.c
@@ -2,23 +2,24 @@
2#include <linux/errno.h> 2#include <linux/errno.h>
3#include <asm/uaccess.h> 3#include <asm/uaccess.h>
4 4
5#include "soft-fp.h" 5#include <asm/sfp-machine.h>
6#include "double.h" 6#include <math-emu/soft-fp.h>
7#include "single.h" 7#include <math-emu/double.h>
8#include <math-emu/single.h>
8 9
9int 10int
10stfs(void *frS, void *ea) 11stfs(void *frS, void *ea)
11{ 12{
12 FP_DECL_D(A); 13 FP_DECL_D(A);
13 FP_DECL_S(R); 14 FP_DECL_S(R);
15 FP_DECL_EX;
14 float f; 16 float f;
15 int err;
16 17
17#ifdef DEBUG 18#ifdef DEBUG
18 printk("%s: S %p, ea %p\n", __func__, frS, ea); 19 printk("%s: S %p, ea %p\n", __func__, frS, ea);
19#endif 20#endif
20 21
21 __FP_UNPACK_D(A, frS); 22 FP_UNPACK_DP(A, frS);
22 23
23#ifdef DEBUG 24#ifdef DEBUG
24 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c); 25 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
@@ -30,12 +31,12 @@ stfs(void *frS, void *ea)
30 printk("R: %ld %lu %ld (%ld)\n", R_s, R_f, R_e, R_c); 31 printk("R: %ld %lu %ld (%ld)\n", R_s, R_f, R_e, R_c);
31#endif 32#endif
32 33
33 err = _FP_PACK_CANONICAL(S, 1, R); 34 _FP_PACK_CANONICAL(S, 1, R);
34 if (!err || !__FPU_TRAP_P(err)) { 35 if (!FP_CUR_EXCEPTIONS || !__FPU_TRAP_P(FP_CUR_EXCEPTIONS)) {
35 __FP_PACK_RAW_1(S, &f, R); 36 _FP_PACK_RAW_1_P(S, &f, R);
36 if (copy_to_user(ea, &f, sizeof(float))) 37 if (copy_to_user(ea, &f, sizeof(float)))
37 return -EFAULT; 38 return -EFAULT;
38 } 39 }
39 40
40 return err; 41 return FP_CUR_EXCEPTIONS;
41} 42}
diff --git a/arch/powerpc/math-emu/types.c b/arch/powerpc/math-emu/types.c
deleted file mode 100644
index e1ed15d829db..000000000000
--- a/arch/powerpc/math-emu/types.c
+++ /dev/null
@@ -1,51 +0,0 @@
1#include "soft-fp.h"
2#include "double.h"
3#include "single.h"
4
5void
6fp_unpack_d(long *_s, unsigned long *_f1, unsigned long *_f0,
7 long *_e, long *_c, void *val)
8{
9 FP_DECL_D(X);
10
11 __FP_UNPACK_RAW_2(D, X, val);
12
13 _FP_UNPACK_CANONICAL(D, 2, X);
14
15 *_s = X_s;
16 *_f1 = X_f1;
17 *_f0 = X_f0;
18 *_e = X_e;
19 *_c = X_c;
20}
21
22int
23fp_pack_d(void *val, long X_s, unsigned long X_f1,
24 unsigned long X_f0, long X_e, long X_c)
25{
26 int exc;
27
28 exc = _FP_PACK_CANONICAL(D, 2, X);
29 if (!exc || !__FPU_TRAP_P(exc))
30 __FP_PACK_RAW_2(D, val, X);
31 return exc;
32}
33
34int
35fp_pack_ds(void *val, long X_s, unsigned long X_f1,
36 unsigned long X_f0, long X_e, long X_c)
37{
38 FP_DECL_S(__X);
39 int exc;
40
41 FP_CONV(S, D, 1, 2, __X, X);
42 exc = _FP_PACK_CANONICAL(S, 1, __X);
43 if (!exc || !__FPU_TRAP_P(exc)) {
44 _FP_UNPACK_CANONICAL(S, 1, __X);
45 FP_CONV(D, S, 2, 1, X, __X);
46 exc |= _FP_PACK_CANONICAL(D, 2, X);
47 if (!exc || !__FPU_TRAP_P(exc))
48 __FP_PACK_RAW_2(D, val, X);
49 }
50 return exc;
51}
diff --git a/arch/powerpc/math-emu/udivmodti4.c b/arch/powerpc/math-emu/udivmodti4.c
index 7e112dc1e2f2..6172044ab003 100644
--- a/arch/powerpc/math-emu/udivmodti4.c
+++ b/arch/powerpc/math-emu/udivmodti4.c
@@ -1,6 +1,6 @@
1/* This has so very few changes over libgcc2's __udivmoddi4 it isn't funny. */ 1/* This has so very few changes over libgcc2's __udivmoddi4 it isn't funny. */
2 2
3#include "soft-fp.h" 3#include <math-emu/soft-fp.h>
4 4
5#undef count_leading_zeros 5#undef count_leading_zeros
6#define count_leading_zeros __FP_CLZ 6#define count_leading_zeros __FP_CLZ
diff --git a/arch/powerpc/mm/fsl_booke_mmu.c b/arch/powerpc/mm/fsl_booke_mmu.c
index ce10e2b1b902..23cee39534fd 100644
--- a/arch/powerpc/mm/fsl_booke_mmu.c
+++ b/arch/powerpc/mm/fsl_booke_mmu.c
@@ -202,7 +202,7 @@ adjust_total_lowmem(void)
202 cam_max_size = max_lowmem_size; 202 cam_max_size = max_lowmem_size;
203 203
204 /* adjust lowmem size to max_lowmem_size */ 204 /* adjust lowmem size to max_lowmem_size */
205 ram = min(max_lowmem_size, (phys_addr_t)total_lowmem); 205 ram = min(max_lowmem_size, total_lowmem);
206 206
207 /* Calculate CAM values */ 207 /* Calculate CAM values */
208 __cam0 = 1UL << 2 * (__ilog2(ram) / 2); 208 __cam0 = 1UL << 2 * (__ilog2(ram) / 2);
@@ -225,7 +225,8 @@ adjust_total_lowmem(void)
225 printk(KERN_INFO "Memory CAM mapping: CAM0=%ldMb, CAM1=%ldMb," 225 printk(KERN_INFO "Memory CAM mapping: CAM0=%ldMb, CAM1=%ldMb,"
226 " CAM2=%ldMb residual: %ldMb\n", 226 " CAM2=%ldMb residual: %ldMb\n",
227 __cam0 >> 20, __cam1 >> 20, __cam2 >> 20, 227 __cam0 >> 20, __cam1 >> 20, __cam2 >> 20,
228 (total_lowmem - __cam0 - __cam1 - __cam2) >> 20); 228 (long int)((total_lowmem - __cam0 - __cam1 - __cam2)
229 >> 20));
229 __max_low_memory = __cam0 + __cam1 + __cam2; 230 __max_low_memory = __cam0 + __cam1 + __cam2;
230 __initial_memory_limit_addr = memstart_addr + __max_low_memory; 231 __initial_memory_limit_addr = memstart_addr + __max_low_memory;
231} 232}
diff --git a/arch/powerpc/mm/gup.c b/arch/powerpc/mm/gup.c
index 9fdf4d6335e4..28a114db3ba0 100644
--- a/arch/powerpc/mm/gup.c
+++ b/arch/powerpc/mm/gup.c
@@ -41,7 +41,7 @@ static noinline int gup_pte_range(pmd_t pmd, unsigned long addr,
41 page = pte_page(pte); 41 page = pte_page(pte);
42 if (!page_cache_get_speculative(page)) 42 if (!page_cache_get_speculative(page))
43 return 0; 43 return 0;
44 if (unlikely(pte != *ptep)) { 44 if (unlikely(pte_val(pte) != pte_val(*ptep))) {
45 put_page(page); 45 put_page(page);
46 return 0; 46 return 0;
47 } 47 }
@@ -92,7 +92,7 @@ static noinline int gup_huge_pte(pte_t *ptep, struct hstate *hstate,
92 *nr -= refs; 92 *nr -= refs;
93 return 0; 93 return 0;
94 } 94 }
95 if (unlikely(pte != *ptep)) { 95 if (unlikely(pte_val(pte) != pte_val(*ptep))) {
96 /* Could be optimized better */ 96 /* Could be optimized better */
97 while (*nr) { 97 while (*nr) {
98 put_page(page); 98 put_page(page);
@@ -237,7 +237,8 @@ int get_user_pages_fast(unsigned long start, int nr_pages, int write,
237 pgd_t pgd = *pgdp; 237 pgd_t pgd = *pgdp;
238 238
239 VM_BUG_ON(shift != mmu_psize_defs[get_slice_psize(mm, addr)].shift); 239 VM_BUG_ON(shift != mmu_psize_defs[get_slice_psize(mm, addr)].shift);
240 pr_debug(" %016lx: normal pgd %p\n", addr, (void *)pgd); 240 pr_debug(" %016lx: normal pgd %p\n", addr,
241 (void *)pgd_val(pgd));
241 next = pgd_addr_end(addr, end); 242 next = pgd_addr_end(addr, end);
242 if (pgd_none(pgd)) 243 if (pgd_none(pgd))
243 goto slow; 244 goto slow;
diff --git a/arch/powerpc/mm/hash_low_32.S b/arch/powerpc/mm/hash_low_32.S
index b9ba7d930801..7bffb70b9fe2 100644
--- a/arch/powerpc/mm/hash_low_32.S
+++ b/arch/powerpc/mm/hash_low_32.S
@@ -75,7 +75,7 @@ _GLOBAL(hash_page_sync)
75 * Returns to the caller if the access is illegal or there is no 75 * Returns to the caller if the access is illegal or there is no
76 * mapping for the address. Otherwise it places an appropriate PTE 76 * mapping for the address. Otherwise it places an appropriate PTE
77 * in the hash table and returns from the exception. 77 * in the hash table and returns from the exception.
78 * Uses r0, r3 - r8, ctr, lr. 78 * Uses r0, r3 - r8, r10, ctr, lr.
79 */ 79 */
80 .text 80 .text
81_GLOBAL(hash_page) 81_GLOBAL(hash_page)
@@ -106,9 +106,15 @@ _GLOBAL(hash_page)
106 addi r5,r5,swapper_pg_dir@l /* kernel page table */ 106 addi r5,r5,swapper_pg_dir@l /* kernel page table */
107 rlwimi r3,r9,32-12,29,29 /* MSR_PR -> _PAGE_USER */ 107 rlwimi r3,r9,32-12,29,29 /* MSR_PR -> _PAGE_USER */
108112: add r5,r5,r7 /* convert to phys addr */ 108112: add r5,r5,r7 /* convert to phys addr */
109#ifndef CONFIG_PTE_64BIT
109 rlwimi r5,r4,12,20,29 /* insert top 10 bits of address */ 110 rlwimi r5,r4,12,20,29 /* insert top 10 bits of address */
110 lwz r8,0(r5) /* get pmd entry */ 111 lwz r8,0(r5) /* get pmd entry */
111 rlwinm. r8,r8,0,0,19 /* extract address of pte page */ 112 rlwinm. r8,r8,0,0,19 /* extract address of pte page */
113#else
114 rlwinm r8,r4,13,19,29 /* Compute pgdir/pmd offset */
115 lwzx r8,r8,r5 /* Get L1 entry */
116 rlwinm. r8,r8,0,0,20 /* extract pt base address */
117#endif
112#ifdef CONFIG_SMP 118#ifdef CONFIG_SMP
113 beq- hash_page_out /* return if no mapping */ 119 beq- hash_page_out /* return if no mapping */
114#else 120#else
@@ -118,7 +124,11 @@ _GLOBAL(hash_page)
118 to the address following the rfi. */ 124 to the address following the rfi. */
119 beqlr- 125 beqlr-
120#endif 126#endif
127#ifndef CONFIG_PTE_64BIT
121 rlwimi r8,r4,22,20,29 /* insert next 10 bits of address */ 128 rlwimi r8,r4,22,20,29 /* insert next 10 bits of address */
129#else
130 rlwimi r8,r4,23,20,28 /* compute pte address */
131#endif
122 rlwinm r0,r3,32-3,24,24 /* _PAGE_RW access -> _PAGE_DIRTY */ 132 rlwinm r0,r3,32-3,24,24 /* _PAGE_RW access -> _PAGE_DIRTY */
123 ori r0,r0,_PAGE_ACCESSED|_PAGE_HASHPTE 133 ori r0,r0,_PAGE_ACCESSED|_PAGE_HASHPTE
124 134
@@ -127,9 +137,15 @@ _GLOBAL(hash_page)
127 * because almost always, there won't be a permission violation 137 * because almost always, there won't be a permission violation
128 * and there won't already be an HPTE, and thus we will have 138 * and there won't already be an HPTE, and thus we will have
129 * to update the PTE to set _PAGE_HASHPTE. -- paulus. 139 * to update the PTE to set _PAGE_HASHPTE. -- paulus.
140 *
141 * If PTE_64BIT is set, the low word is the flags word; use that
142 * word for locking since it contains all the interesting bits.
130 */ 143 */
144#if (PTE_FLAGS_OFFSET != 0)
145 addi r8,r8,PTE_FLAGS_OFFSET
146#endif
131retry: 147retry:
132 lwarx r6,0,r8 /* get linux-style pte */ 148 lwarx r6,0,r8 /* get linux-style pte, flag word */
133 andc. r5,r3,r6 /* check access & ~permission */ 149 andc. r5,r3,r6 /* check access & ~permission */
134#ifdef CONFIG_SMP 150#ifdef CONFIG_SMP
135 bne- hash_page_out /* return if access not permitted */ 151 bne- hash_page_out /* return if access not permitted */
@@ -137,6 +153,15 @@ retry:
137 bnelr- 153 bnelr-
138#endif 154#endif
139 or r5,r0,r6 /* set accessed/dirty bits */ 155 or r5,r0,r6 /* set accessed/dirty bits */
156#ifdef CONFIG_PTE_64BIT
157#ifdef CONFIG_SMP
158 subf r10,r6,r8 /* create false data dependency */
159 subi r10,r10,PTE_FLAGS_OFFSET
160 lwzx r10,r6,r10 /* Get upper PTE word */
161#else
162 lwz r10,-PTE_FLAGS_OFFSET(r8)
163#endif /* CONFIG_SMP */
164#endif /* CONFIG_PTE_64BIT */
140 stwcx. r5,0,r8 /* attempt to update PTE */ 165 stwcx. r5,0,r8 /* attempt to update PTE */
141 bne- retry /* retry if someone got there first */ 166 bne- retry /* retry if someone got there first */
142 167
@@ -203,9 +228,9 @@ _GLOBAL(add_hash_page)
203 * we can't take a hash table miss (assuming the code is 228 * we can't take a hash table miss (assuming the code is
204 * covered by a BAT). -- paulus 229 * covered by a BAT). -- paulus
205 */ 230 */
206 mfmsr r10 231 mfmsr r9
207 SYNC 232 SYNC
208 rlwinm r0,r10,0,17,15 /* clear bit 16 (MSR_EE) */ 233 rlwinm r0,r9,0,17,15 /* clear bit 16 (MSR_EE) */
209 rlwinm r0,r0,0,28,26 /* clear MSR_DR */ 234 rlwinm r0,r0,0,28,26 /* clear MSR_DR */
210 mtmsr r0 235 mtmsr r0
211 SYNC_601 236 SYNC_601
@@ -214,14 +239,14 @@ _GLOBAL(add_hash_page)
214 tophys(r7,0) 239 tophys(r7,0)
215 240
216#ifdef CONFIG_SMP 241#ifdef CONFIG_SMP
217 addis r9,r7,mmu_hash_lock@ha 242 addis r6,r7,mmu_hash_lock@ha
218 addi r9,r9,mmu_hash_lock@l 243 addi r6,r6,mmu_hash_lock@l
21910: lwarx r0,0,r9 /* take the mmu_hash_lock */ 24410: lwarx r0,0,r6 /* take the mmu_hash_lock */
220 cmpi 0,r0,0 245 cmpi 0,r0,0
221 bne- 11f 246 bne- 11f
222 stwcx. r8,0,r9 247 stwcx. r8,0,r6
223 beq+ 12f 248 beq+ 12f
22411: lwz r0,0(r9) 24911: lwz r0,0(r6)
225 cmpi 0,r0,0 250 cmpi 0,r0,0
226 beq 10b 251 beq 10b
227 b 11b 252 b 11b
@@ -234,10 +259,24 @@ _GLOBAL(add_hash_page)
234 * HPTE, so we just unlock and return. 259 * HPTE, so we just unlock and return.
235 */ 260 */
236 mr r8,r5 261 mr r8,r5
262#ifndef CONFIG_PTE_64BIT
237 rlwimi r8,r4,22,20,29 263 rlwimi r8,r4,22,20,29
264#else
265 rlwimi r8,r4,23,20,28
266 addi r8,r8,PTE_FLAGS_OFFSET
267#endif
2381: lwarx r6,0,r8 2681: lwarx r6,0,r8
239 andi. r0,r6,_PAGE_HASHPTE 269 andi. r0,r6,_PAGE_HASHPTE
240 bne 9f /* if HASHPTE already set, done */ 270 bne 9f /* if HASHPTE already set, done */
271#ifdef CONFIG_PTE_64BIT
272#ifdef CONFIG_SMP
273 subf r10,r6,r8 /* create false data dependency */
274 subi r10,r10,PTE_FLAGS_OFFSET
275 lwzx r10,r6,r10 /* Get upper PTE word */
276#else
277 lwz r10,-PTE_FLAGS_OFFSET(r8)
278#endif /* CONFIG_SMP */
279#endif /* CONFIG_PTE_64BIT */
241 ori r5,r6,_PAGE_HASHPTE 280 ori r5,r6,_PAGE_HASHPTE
242 stwcx. r5,0,r8 281 stwcx. r5,0,r8
243 bne- 1b 282 bne- 1b
@@ -246,13 +285,15 @@ _GLOBAL(add_hash_page)
246 285
2479: 2869:
248#ifdef CONFIG_SMP 287#ifdef CONFIG_SMP
288 addis r6,r7,mmu_hash_lock@ha
289 addi r6,r6,mmu_hash_lock@l
249 eieio 290 eieio
250 li r0,0 291 li r0,0
251 stw r0,0(r9) /* clear mmu_hash_lock */ 292 stw r0,0(r6) /* clear mmu_hash_lock */
252#endif 293#endif
253 294
254 /* reenable interrupts and DR */ 295 /* reenable interrupts and DR */
255 mtmsr r10 296 mtmsr r9
256 SYNC_601 297 SYNC_601
257 isync 298 isync
258 299
@@ -267,7 +308,8 @@ _GLOBAL(add_hash_page)
267 * r5 contains the linux PTE, r6 contains the old value of the 308 * r5 contains the linux PTE, r6 contains the old value of the
268 * linux PTE (before setting _PAGE_HASHPTE) and r7 contains the 309 * linux PTE (before setting _PAGE_HASHPTE) and r7 contains the
269 * offset to be added to addresses (0 if the MMU is on, 310 * offset to be added to addresses (0 if the MMU is on,
270 * -KERNELBASE if it is off). 311 * -KERNELBASE if it is off). r10 contains the upper half of
312 * the PTE if CONFIG_PTE_64BIT.
271 * On SMP, the caller should have the mmu_hash_lock held. 313 * On SMP, the caller should have the mmu_hash_lock held.
272 * We assume that the caller has (or will) set the _PAGE_HASHPTE 314 * We assume that the caller has (or will) set the _PAGE_HASHPTE
273 * bit in the linux PTE in memory. The value passed in r6 should 315 * bit in the linux PTE in memory. The value passed in r6 should
@@ -285,7 +327,7 @@ Hash_bits = 12 /* e.g. 256kB hash table */
285Hash_msk = (((1 << Hash_bits) - 1) * 64) 327Hash_msk = (((1 << Hash_bits) - 1) * 64)
286 328
287/* defines for the PTE format for 32-bit PPCs */ 329/* defines for the PTE format for 32-bit PPCs */
288#define PTE_SIZE 8 330#define HPTE_SIZE 8
289#define PTEG_SIZE 64 331#define PTEG_SIZE 64
290#define LG_PTEG_SIZE 6 332#define LG_PTEG_SIZE 6
291#define LDPTEu lwzu 333#define LDPTEu lwzu
@@ -313,6 +355,11 @@ _GLOBAL(create_hpte)
313BEGIN_FTR_SECTION 355BEGIN_FTR_SECTION
314 ori r8,r8,_PAGE_COHERENT /* set M (coherence required) */ 356 ori r8,r8,_PAGE_COHERENT /* set M (coherence required) */
315END_FTR_SECTION_IFSET(CPU_FTR_NEED_COHERENT) 357END_FTR_SECTION_IFSET(CPU_FTR_NEED_COHERENT)
358#ifdef CONFIG_PTE_64BIT
359 /* Put the XPN bits into the PTE */
360 rlwimi r8,r10,8,20,22
361 rlwimi r8,r10,2,29,29
362#endif
316 363
317 /* Construct the high word of the PPC-style PTE (r5) */ 364 /* Construct the high word of the PPC-style PTE (r5) */
318 rlwinm r5,r3,7,1,24 /* put VSID in 0x7fffff80 bits */ 365 rlwinm r5,r3,7,1,24 /* put VSID in 0x7fffff80 bits */
@@ -342,8 +389,8 @@ _GLOBAL(hash_page_patch_A)
342 389
343 /* Search the primary PTEG for a PTE whose 1st (d)word matches r5 */ 390 /* Search the primary PTEG for a PTE whose 1st (d)word matches r5 */
344 mtctr r0 391 mtctr r0
345 addi r4,r3,-PTE_SIZE 392 addi r4,r3,-HPTE_SIZE
3461: LDPTEu r6,PTE_SIZE(r4) /* get next PTE */ 3931: LDPTEu r6,HPTE_SIZE(r4) /* get next PTE */
347 CMPPTE 0,r6,r5 394 CMPPTE 0,r6,r5
348 bdnzf 2,1b /* loop while ctr != 0 && !cr0.eq */ 395 bdnzf 2,1b /* loop while ctr != 0 && !cr0.eq */
349 beq+ found_slot 396 beq+ found_slot
@@ -353,9 +400,9 @@ _GLOBAL(hash_page_patch_A)
353_GLOBAL(hash_page_patch_B) 400_GLOBAL(hash_page_patch_B)
354 xoris r4,r3,Hash_msk>>16 /* compute secondary hash */ 401 xoris r4,r3,Hash_msk>>16 /* compute secondary hash */
355 xori r4,r4,(-PTEG_SIZE & 0xffff) 402 xori r4,r4,(-PTEG_SIZE & 0xffff)
356 addi r4,r4,-PTE_SIZE 403 addi r4,r4,-HPTE_SIZE
357 mtctr r0 404 mtctr r0
3582: LDPTEu r6,PTE_SIZE(r4) 4052: LDPTEu r6,HPTE_SIZE(r4)
359 CMPPTE 0,r6,r5 406 CMPPTE 0,r6,r5
360 bdnzf 2,2b 407 bdnzf 2,2b
361 beq+ found_slot 408 beq+ found_slot
@@ -363,8 +410,8 @@ _GLOBAL(hash_page_patch_B)
363 410
364 /* Search the primary PTEG for an empty slot */ 411 /* Search the primary PTEG for an empty slot */
36510: mtctr r0 41210: mtctr r0
366 addi r4,r3,-PTE_SIZE /* search primary PTEG */ 413 addi r4,r3,-HPTE_SIZE /* search primary PTEG */
3671: LDPTEu r6,PTE_SIZE(r4) /* get next PTE */ 4141: LDPTEu r6,HPTE_SIZE(r4) /* get next PTE */
368 TST_V(r6) /* test valid bit */ 415 TST_V(r6) /* test valid bit */
369 bdnzf 2,1b /* loop while ctr != 0 && !cr0.eq */ 416 bdnzf 2,1b /* loop while ctr != 0 && !cr0.eq */
370 beq+ found_empty 417 beq+ found_empty
@@ -380,9 +427,9 @@ _GLOBAL(hash_page_patch_B)
380_GLOBAL(hash_page_patch_C) 427_GLOBAL(hash_page_patch_C)
381 xoris r4,r3,Hash_msk>>16 /* compute secondary hash */ 428 xoris r4,r3,Hash_msk>>16 /* compute secondary hash */
382 xori r4,r4,(-PTEG_SIZE & 0xffff) 429 xori r4,r4,(-PTEG_SIZE & 0xffff)
383 addi r4,r4,-PTE_SIZE 430 addi r4,r4,-HPTE_SIZE
384 mtctr r0 431 mtctr r0
3852: LDPTEu r6,PTE_SIZE(r4) 4322: LDPTEu r6,HPTE_SIZE(r4)
386 TST_V(r6) 433 TST_V(r6)
387 bdnzf 2,2b 434 bdnzf 2,2b
388 beq+ found_empty 435 beq+ found_empty
@@ -409,11 +456,11 @@ _GLOBAL(hash_page_patch_C)
409 456
4101: addis r4,r7,next_slot@ha /* get next evict slot */ 4571: addis r4,r7,next_slot@ha /* get next evict slot */
411 lwz r6,next_slot@l(r4) 458 lwz r6,next_slot@l(r4)
412 addi r6,r6,PTE_SIZE /* search for candidate */ 459 addi r6,r6,HPTE_SIZE /* search for candidate */
413 andi. r6,r6,7*PTE_SIZE 460 andi. r6,r6,7*HPTE_SIZE
414 stw r6,next_slot@l(r4) 461 stw r6,next_slot@l(r4)
415 add r4,r3,r6 462 add r4,r3,r6
416 LDPTE r0,PTE_SIZE/2(r4) /* get PTE second word */ 463 LDPTE r0,HPTE_SIZE/2(r4) /* get PTE second word */
417 clrrwi r0,r0,12 464 clrrwi r0,r0,12
418 lis r6,etext@h 465 lis r6,etext@h
419 ori r6,r6,etext@l /* get etext */ 466 ori r6,r6,etext@l /* get etext */
@@ -426,7 +473,7 @@ _GLOBAL(hash_page_patch_C)
426found_empty: 473found_empty:
427 STPTE r5,0(r4) 474 STPTE r5,0(r4)
428found_slot: 475found_slot:
429 STPTE r8,PTE_SIZE/2(r4) 476 STPTE r8,HPTE_SIZE/2(r4)
430 477
431#else /* CONFIG_SMP */ 478#else /* CONFIG_SMP */
432/* 479/*
@@ -452,7 +499,7 @@ found_slot:
452 STPTE r5,0(r4) 499 STPTE r5,0(r4)
453 sync 500 sync
454 TLBSYNC 501 TLBSYNC
455 STPTE r8,PTE_SIZE/2(r4) /* put in correct RPN, WIMG, PP bits */ 502 STPTE r8,HPTE_SIZE/2(r4) /* put in correct RPN, WIMG, PP bits */
456 sync 503 sync
457 SET_V(r5) 504 SET_V(r5)
458 STPTE r5,0(r4) /* finally set V bit in PTE */ 505 STPTE r5,0(r4) /* finally set V bit in PTE */
@@ -499,14 +546,18 @@ _GLOBAL(flush_hash_pages)
499 isync 546 isync
500 547
501 /* First find a PTE in the range that has _PAGE_HASHPTE set */ 548 /* First find a PTE in the range that has _PAGE_HASHPTE set */
549#ifndef CONFIG_PTE_64BIT
502 rlwimi r5,r4,22,20,29 550 rlwimi r5,r4,22,20,29
5031: lwz r0,0(r5) 551#else
552 rlwimi r5,r4,23,20,28
553#endif
5541: lwz r0,PTE_FLAGS_OFFSET(r5)
504 cmpwi cr1,r6,1 555 cmpwi cr1,r6,1
505 andi. r0,r0,_PAGE_HASHPTE 556 andi. r0,r0,_PAGE_HASHPTE
506 bne 2f 557 bne 2f
507 ble cr1,19f 558 ble cr1,19f
508 addi r4,r4,0x1000 559 addi r4,r4,0x1000
509 addi r5,r5,4 560 addi r5,r5,PTE_SIZE
510 addi r6,r6,-1 561 addi r6,r6,-1
511 b 1b 562 b 1b
512 563
@@ -545,7 +596,10 @@ _GLOBAL(flush_hash_pages)
545 * already clear, we're done (for this pte). If not, 596 * already clear, we're done (for this pte). If not,
546 * clear it (atomically) and proceed. -- paulus. 597 * clear it (atomically) and proceed. -- paulus.
547 */ 598 */
54833: lwarx r8,0,r5 /* fetch the pte */ 599#if (PTE_FLAGS_OFFSET != 0)
600 addi r5,r5,PTE_FLAGS_OFFSET
601#endif
60233: lwarx r8,0,r5 /* fetch the pte flags word */
549 andi. r0,r8,_PAGE_HASHPTE 603 andi. r0,r8,_PAGE_HASHPTE
550 beq 8f /* done if HASHPTE is already clear */ 604 beq 8f /* done if HASHPTE is already clear */
551 rlwinm r8,r8,0,31,29 /* clear HASHPTE bit */ 605 rlwinm r8,r8,0,31,29 /* clear HASHPTE bit */
@@ -562,8 +616,8 @@ _GLOBAL(flush_hash_patch_A)
562 /* Search the primary PTEG for a PTE whose 1st (d)word matches r5 */ 616 /* Search the primary PTEG for a PTE whose 1st (d)word matches r5 */
563 li r0,8 /* PTEs/group */ 617 li r0,8 /* PTEs/group */
564 mtctr r0 618 mtctr r0
565 addi r12,r8,-PTE_SIZE 619 addi r12,r8,-HPTE_SIZE
5661: LDPTEu r0,PTE_SIZE(r12) /* get next PTE */ 6201: LDPTEu r0,HPTE_SIZE(r12) /* get next PTE */
567 CMPPTE 0,r0,r11 621 CMPPTE 0,r0,r11
568 bdnzf 2,1b /* loop while ctr != 0 && !cr0.eq */ 622 bdnzf 2,1b /* loop while ctr != 0 && !cr0.eq */
569 beq+ 3f 623 beq+ 3f
@@ -574,9 +628,9 @@ _GLOBAL(flush_hash_patch_A)
574_GLOBAL(flush_hash_patch_B) 628_GLOBAL(flush_hash_patch_B)
575 xoris r12,r8,Hash_msk>>16 /* compute secondary hash */ 629 xoris r12,r8,Hash_msk>>16 /* compute secondary hash */
576 xori r12,r12,(-PTEG_SIZE & 0xffff) 630 xori r12,r12,(-PTEG_SIZE & 0xffff)
577 addi r12,r12,-PTE_SIZE 631 addi r12,r12,-HPTE_SIZE
578 mtctr r0 632 mtctr r0
5792: LDPTEu r0,PTE_SIZE(r12) 6332: LDPTEu r0,HPTE_SIZE(r12)
580 CMPPTE 0,r0,r11 634 CMPPTE 0,r0,r11
581 bdnzf 2,2b 635 bdnzf 2,2b
582 xori r11,r11,PTE_H /* clear H again */ 636 xori r11,r11,PTE_H /* clear H again */
@@ -590,7 +644,7 @@ _GLOBAL(flush_hash_patch_B)
590 644
5918: ble cr1,9f /* if all ptes checked */ 6458: ble cr1,9f /* if all ptes checked */
59281: addi r6,r6,-1 64681: addi r6,r6,-1
593 addi r5,r5,4 /* advance to next pte */ 647 addi r5,r5,PTE_SIZE
594 addi r4,r4,0x1000 648 addi r4,r4,0x1000
595 lwz r0,0(r5) /* check next pte */ 649 lwz r0,0(r5) /* check next pte */
596 cmpwi cr1,r6,1 650 cmpwi cr1,r6,1
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index 8920eea34528..5c64af174752 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -194,7 +194,7 @@ int htab_bolt_mapping(unsigned long vstart, unsigned long vend,
194 unsigned long tprot = prot; 194 unsigned long tprot = prot;
195 195
196 /* Make kernel text executable */ 196 /* Make kernel text executable */
197 if (in_kernel_text(vaddr)) 197 if (overlaps_kernel_text(vaddr, vaddr + step))
198 tprot &= ~HPTE_R_N; 198 tprot &= ~HPTE_R_N;
199 199
200 hash = hpt_hash(va, shift, ssize); 200 hash = hpt_hash(va, shift, ssize);
@@ -348,6 +348,7 @@ static int __init htab_dt_scan_page_sizes(unsigned long node,
348 return 0; 348 return 0;
349} 349}
350 350
351#ifdef CONFIG_HUGETLB_PAGE
351/* Scan for 16G memory blocks that have been set aside for huge pages 352/* Scan for 16G memory blocks that have been set aside for huge pages
352 * and reserve those blocks for 16G huge pages. 353 * and reserve those blocks for 16G huge pages.
353 */ 354 */
@@ -385,6 +386,7 @@ static int __init htab_dt_scan_hugepage_blocks(unsigned long node,
385 add_gpage(phys_addr, block_size, expected_pages); 386 add_gpage(phys_addr, block_size, expected_pages);
386 return 0; 387 return 0;
387} 388}
389#endif /* CONFIG_HUGETLB_PAGE */
388 390
389static void __init htab_init_page_sizes(void) 391static void __init htab_init_page_sizes(void)
390{ 392{
@@ -539,7 +541,7 @@ static unsigned long __init htab_get_table_size(void)
539void create_section_mapping(unsigned long start, unsigned long end) 541void create_section_mapping(unsigned long start, unsigned long end)
540{ 542{
541 BUG_ON(htab_bolt_mapping(start, end, __pa(start), 543 BUG_ON(htab_bolt_mapping(start, end, __pa(start),
542 PAGE_KERNEL, mmu_linear_psize, 544 pgprot_val(PAGE_KERNEL), mmu_linear_psize,
543 mmu_kernel_ssize)); 545 mmu_kernel_ssize));
544} 546}
545 547
@@ -647,7 +649,7 @@ void __init htab_initialize(void)
647 mtspr(SPRN_SDR1, _SDR1); 649 mtspr(SPRN_SDR1, _SDR1);
648 } 650 }
649 651
650 prot = PAGE_KERNEL; 652 prot = pgprot_val(PAGE_KERNEL);
651 653
652#ifdef CONFIG_DEBUG_PAGEALLOC 654#ifdef CONFIG_DEBUG_PAGEALLOC
653 linear_map_hash_count = lmb_end_of_DRAM() >> PAGE_SHIFT; 655 linear_map_hash_count = lmb_end_of_DRAM() >> PAGE_SHIFT;
diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
index f1c2d55b4377..a117024ab8cd 100644
--- a/arch/powerpc/mm/hugetlbpage.c
+++ b/arch/powerpc/mm/hugetlbpage.c
@@ -128,29 +128,37 @@ static int __hugepte_alloc(struct mm_struct *mm, hugepd_t *hpdp,
128 return 0; 128 return 0;
129} 129}
130 130
131/* Base page size affects how we walk hugetlb page tables */ 131
132#ifdef CONFIG_PPC_64K_PAGES 132static pud_t *hpud_offset(pgd_t *pgd, unsigned long addr, struct hstate *hstate)
133#define hpmd_offset(pud, addr, h) pmd_offset(pud, addr) 133{
134#define hpmd_alloc(mm, pud, addr, h) pmd_alloc(mm, pud, addr) 134 if (huge_page_shift(hstate) < PUD_SHIFT)
135#else 135 return pud_offset(pgd, addr);
136static inline 136 else
137pmd_t *hpmd_offset(pud_t *pud, unsigned long addr, struct hstate *hstate) 137 return (pud_t *) pgd;
138}
139static pud_t *hpud_alloc(struct mm_struct *mm, pgd_t *pgd, unsigned long addr,
140 struct hstate *hstate)
138{ 141{
139 if (huge_page_shift(hstate) == PAGE_SHIFT_64K) 142 if (huge_page_shift(hstate) < PUD_SHIFT)
143 return pud_alloc(mm, pgd, addr);
144 else
145 return (pud_t *) pgd;
146}
147static pmd_t *hpmd_offset(pud_t *pud, unsigned long addr, struct hstate *hstate)
148{
149 if (huge_page_shift(hstate) < PMD_SHIFT)
140 return pmd_offset(pud, addr); 150 return pmd_offset(pud, addr);
141 else 151 else
142 return (pmd_t *) pud; 152 return (pmd_t *) pud;
143} 153}
144static inline 154static pmd_t *hpmd_alloc(struct mm_struct *mm, pud_t *pud, unsigned long addr,
145pmd_t *hpmd_alloc(struct mm_struct *mm, pud_t *pud, unsigned long addr, 155 struct hstate *hstate)
146 struct hstate *hstate)
147{ 156{
148 if (huge_page_shift(hstate) == PAGE_SHIFT_64K) 157 if (huge_page_shift(hstate) < PMD_SHIFT)
149 return pmd_alloc(mm, pud, addr); 158 return pmd_alloc(mm, pud, addr);
150 else 159 else
151 return (pmd_t *) pud; 160 return (pmd_t *) pud;
152} 161}
153#endif
154 162
155/* Build list of addresses of gigantic pages. This function is used in early 163/* Build list of addresses of gigantic pages. This function is used in early
156 * boot before the buddy or bootmem allocator is setup. 164 * boot before the buddy or bootmem allocator is setup.
@@ -204,7 +212,7 @@ pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr)
204 212
205 pg = pgd_offset(mm, addr); 213 pg = pgd_offset(mm, addr);
206 if (!pgd_none(*pg)) { 214 if (!pgd_none(*pg)) {
207 pu = pud_offset(pg, addr); 215 pu = hpud_offset(pg, addr, hstate);
208 if (!pud_none(*pu)) { 216 if (!pud_none(*pu)) {
209 pm = hpmd_offset(pu, addr, hstate); 217 pm = hpmd_offset(pu, addr, hstate);
210 if (!pmd_none(*pm)) 218 if (!pmd_none(*pm))
@@ -233,7 +241,7 @@ pte_t *huge_pte_alloc(struct mm_struct *mm,
233 addr &= hstate->mask; 241 addr &= hstate->mask;
234 242
235 pg = pgd_offset(mm, addr); 243 pg = pgd_offset(mm, addr);
236 pu = pud_alloc(mm, pg, addr); 244 pu = hpud_alloc(mm, pg, addr, hstate);
237 245
238 if (pu) { 246 if (pu) {
239 pm = hpmd_alloc(mm, pu, addr, hstate); 247 pm = hpmd_alloc(mm, pu, addr, hstate);
@@ -316,13 +324,7 @@ static void hugetlb_free_pud_range(struct mmu_gather *tlb, pgd_t *pgd,
316 pud = pud_offset(pgd, addr); 324 pud = pud_offset(pgd, addr);
317 do { 325 do {
318 next = pud_addr_end(addr, end); 326 next = pud_addr_end(addr, end);
319#ifdef CONFIG_PPC_64K_PAGES 327 if (shift < PMD_SHIFT) {
320 if (pud_none_or_clear_bad(pud))
321 continue;
322 hugetlb_free_pmd_range(tlb, pud, addr, next, floor, ceiling,
323 psize);
324#else
325 if (shift == PAGE_SHIFT_64K) {
326 if (pud_none_or_clear_bad(pud)) 328 if (pud_none_or_clear_bad(pud))
327 continue; 329 continue;
328 hugetlb_free_pmd_range(tlb, pud, addr, next, floor, 330 hugetlb_free_pmd_range(tlb, pud, addr, next, floor,
@@ -332,7 +334,6 @@ static void hugetlb_free_pud_range(struct mmu_gather *tlb, pgd_t *pgd,
332 continue; 334 continue;
333 free_hugepte_range(tlb, (hugepd_t *)pud, psize); 335 free_hugepte_range(tlb, (hugepd_t *)pud, psize);
334 } 336 }
335#endif
336 } while (pud++, addr = next, addr != end); 337 } while (pud++, addr = next, addr != end);
337 338
338 start &= PGDIR_MASK; 339 start &= PGDIR_MASK;
@@ -422,9 +423,15 @@ void hugetlb_free_pgd_range(struct mmu_gather *tlb,
422 psize = get_slice_psize(tlb->mm, addr); 423 psize = get_slice_psize(tlb->mm, addr);
423 BUG_ON(!mmu_huge_psizes[psize]); 424 BUG_ON(!mmu_huge_psizes[psize]);
424 next = pgd_addr_end(addr, end); 425 next = pgd_addr_end(addr, end);
425 if (pgd_none_or_clear_bad(pgd)) 426 if (mmu_psize_to_shift(psize) < PUD_SHIFT) {
426 continue; 427 if (pgd_none_or_clear_bad(pgd))
427 hugetlb_free_pud_range(tlb, pgd, addr, next, floor, ceiling); 428 continue;
429 hugetlb_free_pud_range(tlb, pgd, addr, next, floor, ceiling);
430 } else {
431 if (pgd_none(*pgd))
432 continue;
433 free_hugepte_range(tlb, (hugepd_t *)pgd, psize);
434 }
428 } while (pgd++, addr = next, addr != end); 435 } while (pgd++, addr = next, addr != end);
429} 436}
430 437
diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c
index 036fe2f10c77..3e6a6543f53a 100644
--- a/arch/powerpc/mm/init_64.c
+++ b/arch/powerpc/mm/init_64.c
@@ -228,8 +228,8 @@ int __meminit vmemmap_populate(struct page *start_page,
228 start, p, __pa(p)); 228 start, p, __pa(p));
229 229
230 mapped = htab_bolt_mapping(start, start + page_size, __pa(p), 230 mapped = htab_bolt_mapping(start, start + page_size, __pa(p),
231 PAGE_KERNEL, mmu_vmemmap_psize, 231 pgprot_val(PAGE_KERNEL),
232 mmu_kernel_ssize); 232 mmu_vmemmap_psize, mmu_kernel_ssize);
233 BUG_ON(mapped < 0); 233 BUG_ON(mapped < 0);
234 } 234 }
235 235
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index 1c93c255873b..98d7bf99533a 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -75,11 +75,10 @@ static inline pte_t *virt_to_kpte(unsigned long vaddr)
75 75
76int page_is_ram(unsigned long pfn) 76int page_is_ram(unsigned long pfn)
77{ 77{
78 unsigned long paddr = (pfn << PAGE_SHIFT);
79
80#ifndef CONFIG_PPC64 /* XXX for now */ 78#ifndef CONFIG_PPC64 /* XXX for now */
81 return paddr < __pa(high_memory); 79 return pfn < max_pfn;
82#else 80#else
81 unsigned long paddr = (pfn << PAGE_SHIFT);
83 int i; 82 int i;
84 for (i=0; i < lmb.memory.cnt; i++) { 83 for (i=0; i < lmb.memory.cnt; i++) {
85 unsigned long base; 84 unsigned long base;
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index d9a181351332..6cf5c71c431f 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -89,6 +89,46 @@ static int __cpuinit fake_numa_create_new_node(unsigned long end_pfn,
89 return 0; 89 return 0;
90} 90}
91 91
92/*
93 * get_active_region_work_fn - A helper function for get_node_active_region
94 * Returns datax set to the start_pfn and end_pfn if they contain
95 * the initial value of datax->start_pfn between them
96 * @start_pfn: start page(inclusive) of region to check
97 * @end_pfn: end page(exclusive) of region to check
98 * @datax: comes in with ->start_pfn set to value to search for and
99 * goes out with active range if it contains it
100 * Returns 1 if search value is in range else 0
101 */
102static int __init get_active_region_work_fn(unsigned long start_pfn,
103 unsigned long end_pfn, void *datax)
104{
105 struct node_active_region *data;
106 data = (struct node_active_region *)datax;
107
108 if (start_pfn <= data->start_pfn && end_pfn > data->start_pfn) {
109 data->start_pfn = start_pfn;
110 data->end_pfn = end_pfn;
111 return 1;
112 }
113 return 0;
114
115}
116
117/*
118 * get_node_active_region - Return active region containing start_pfn
119 * @start_pfn: The page to return the region for.
120 * @node_ar: Returned set to the active region containing start_pfn
121 */
122static void __init get_node_active_region(unsigned long start_pfn,
123 struct node_active_region *node_ar)
124{
125 int nid = early_pfn_to_nid(start_pfn);
126
127 node_ar->nid = nid;
128 node_ar->start_pfn = start_pfn;
129 work_with_active_regions(nid, get_active_region_work_fn, node_ar);
130}
131
92static void __cpuinit map_cpu_to_node(int cpu, int node) 132static void __cpuinit map_cpu_to_node(int cpu, int node)
93{ 133{
94 numa_cpu_lookup_table[cpu] = node; 134 numa_cpu_lookup_table[cpu] = node;
@@ -150,6 +190,21 @@ static const int *of_get_associativity(struct device_node *dev)
150 return of_get_property(dev, "ibm,associativity", NULL); 190 return of_get_property(dev, "ibm,associativity", NULL);
151} 191}
152 192
193/*
194 * Returns the property linux,drconf-usable-memory if
195 * it exists (the property exists only in kexec/kdump kernels,
196 * added by kexec-tools)
197 */
198static const u32 *of_get_usable_memory(struct device_node *memory)
199{
200 const u32 *prop;
201 u32 len;
202 prop = of_get_property(memory, "linux,drconf-usable-memory", &len);
203 if (!prop || len < sizeof(unsigned int))
204 return 0;
205 return prop;
206}
207
153/* Returns nid in the range [0..MAX_NUMNODES-1], or -1 if no useful numa 208/* Returns nid in the range [0..MAX_NUMNODES-1], or -1 if no useful numa
154 * info is found. 209 * info is found.
155 */ 210 */
@@ -487,14 +542,29 @@ static unsigned long __init numa_enforce_memory_limit(unsigned long start,
487} 542}
488 543
489/* 544/*
545 * Reads the counter for a given entry in
546 * linux,drconf-usable-memory property
547 */
548static inline int __init read_usm_ranges(const u32 **usm)
549{
550 /*
551 * For each lmb in ibm,dynamic-memory a corresponding
552 * entry in linux,drconf-usable-memory property contains
553 * a counter followed by that many (base, size) duple.
554 * read the counter from linux,drconf-usable-memory
555 */
556 return read_n_cells(n_mem_size_cells, usm);
557}
558
559/*
490 * Extract NUMA information from the ibm,dynamic-reconfiguration-memory 560 * Extract NUMA information from the ibm,dynamic-reconfiguration-memory
491 * node. This assumes n_mem_{addr,size}_cells have been set. 561 * node. This assumes n_mem_{addr,size}_cells have been set.
492 */ 562 */
493static void __init parse_drconf_memory(struct device_node *memory) 563static void __init parse_drconf_memory(struct device_node *memory)
494{ 564{
495 const u32 *dm; 565 const u32 *dm, *usm;
496 unsigned int n, rc; 566 unsigned int n, rc, ranges, is_kexec_kdump = 0;
497 unsigned long lmb_size, size; 567 unsigned long lmb_size, base, size, sz;
498 int nid; 568 int nid;
499 struct assoc_arrays aa; 569 struct assoc_arrays aa;
500 570
@@ -510,6 +580,11 @@ static void __init parse_drconf_memory(struct device_node *memory)
510 if (rc) 580 if (rc)
511 return; 581 return;
512 582
583 /* check if this is a kexec/kdump kernel */
584 usm = of_get_usable_memory(memory);
585 if (usm != NULL)
586 is_kexec_kdump = 1;
587
513 for (; n != 0; --n) { 588 for (; n != 0; --n) {
514 struct of_drconf_cell drmem; 589 struct of_drconf_cell drmem;
515 590
@@ -521,21 +596,31 @@ static void __init parse_drconf_memory(struct device_node *memory)
521 || !(drmem.flags & DRCONF_MEM_ASSIGNED)) 596 || !(drmem.flags & DRCONF_MEM_ASSIGNED))
522 continue; 597 continue;
523 598
524 nid = of_drconf_to_nid_single(&drmem, &aa); 599 base = drmem.base_addr;
600 size = lmb_size;
601 ranges = 1;
525 602
526 fake_numa_create_new_node( 603 if (is_kexec_kdump) {
527 ((drmem.base_addr + lmb_size) >> PAGE_SHIFT), 604 ranges = read_usm_ranges(&usm);
605 if (!ranges) /* there are no (base, size) duple */
606 continue;
607 }
608 do {
609 if (is_kexec_kdump) {
610 base = read_n_cells(n_mem_addr_cells, &usm);
611 size = read_n_cells(n_mem_size_cells, &usm);
612 }
613 nid = of_drconf_to_nid_single(&drmem, &aa);
614 fake_numa_create_new_node(
615 ((base + size) >> PAGE_SHIFT),
528 &nid); 616 &nid);
529 617 node_set_online(nid);
530 node_set_online(nid); 618 sz = numa_enforce_memory_limit(base, size);
531 619 if (sz)
532 size = numa_enforce_memory_limit(drmem.base_addr, lmb_size); 620 add_active_range(nid, base >> PAGE_SHIFT,
533 if (!size) 621 (base >> PAGE_SHIFT)
534 continue; 622 + (sz >> PAGE_SHIFT));
535 623 } while (--ranges);
536 add_active_range(nid, drmem.base_addr >> PAGE_SHIFT,
537 (drmem.base_addr >> PAGE_SHIFT)
538 + (size >> PAGE_SHIFT));
539 } 624 }
540} 625}
541 626
@@ -837,38 +922,50 @@ void __init do_init_bootmem(void)
837 start_pfn, end_pfn); 922 start_pfn, end_pfn);
838 923
839 free_bootmem_with_active_regions(nid, end_pfn); 924 free_bootmem_with_active_regions(nid, end_pfn);
925 }
840 926
841 /* Mark reserved regions on this node */ 927 /* Mark reserved regions */
842 for (i = 0; i < lmb.reserved.cnt; i++) { 928 for (i = 0; i < lmb.reserved.cnt; i++) {
843 unsigned long physbase = lmb.reserved.region[i].base; 929 unsigned long physbase = lmb.reserved.region[i].base;
844 unsigned long size = lmb.reserved.region[i].size; 930 unsigned long size = lmb.reserved.region[i].size;
845 unsigned long start_paddr = start_pfn << PAGE_SHIFT; 931 unsigned long start_pfn = physbase >> PAGE_SHIFT;
846 unsigned long end_paddr = end_pfn << PAGE_SHIFT; 932 unsigned long end_pfn = ((physbase + size) >> PAGE_SHIFT);
847 933 struct node_active_region node_ar;
848 if (early_pfn_to_nid(physbase >> PAGE_SHIFT) != nid && 934
849 early_pfn_to_nid((physbase+size-1) >> PAGE_SHIFT) != nid) 935 get_node_active_region(start_pfn, &node_ar);
850 continue; 936 while (start_pfn < end_pfn) {
851 937 /*
852 if (physbase < end_paddr && 938 * if reserved region extends past active region
853 (physbase+size) > start_paddr) { 939 * then trim size to active region
854 /* overlaps */ 940 */
855 if (physbase < start_paddr) { 941 if (end_pfn > node_ar.end_pfn)
856 size -= start_paddr - physbase; 942 size = (node_ar.end_pfn << PAGE_SHIFT)
857 physbase = start_paddr; 943 - (start_pfn << PAGE_SHIFT);
858 } 944 dbg("reserve_bootmem %lx %lx nid=%d\n", physbase, size,
859 945 node_ar.nid);
860 if (size > end_paddr - physbase) 946 reserve_bootmem_node(NODE_DATA(node_ar.nid), physbase,
861 size = end_paddr - physbase; 947 size, BOOTMEM_DEFAULT);
862 948 /*
863 dbg("reserve_bootmem %lx %lx\n", physbase, 949 * if reserved region is contained in the active region
864 size); 950 * then done.
865 reserve_bootmem_node(NODE_DATA(nid), physbase, 951 */
866 size, BOOTMEM_DEFAULT); 952 if (end_pfn <= node_ar.end_pfn)
867 } 953 break;
954
955 /*
956 * reserved region extends past the active region
957 * get next active region that contains this
958 * reserved region
959 */
960 start_pfn = node_ar.end_pfn;
961 physbase = start_pfn << PAGE_SHIFT;
962 get_node_active_region(start_pfn, &node_ar);
868 } 963 }
869 964
870 sparse_memory_present_with_active_regions(nid);
871 } 965 }
966
967 for_each_online_node(nid)
968 sparse_memory_present_with_active_regions(nid);
872} 969}
873 970
874void __init paging_init(void) 971void __init paging_init(void)
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index 2001abdb1912..c31d6d26f0b5 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -73,7 +73,7 @@ extern unsigned long p_mapped_by_tlbcam(unsigned long pa);
73#endif /* HAVE_TLBCAM */ 73#endif /* HAVE_TLBCAM */
74 74
75#ifdef CONFIG_PTE_64BIT 75#ifdef CONFIG_PTE_64BIT
76/* 44x uses an 8kB pgdir because it has 8-byte Linux PTEs. */ 76/* Some processors use an 8kB pgdir because they have 8-byte Linux PTEs. */
77#define PGDIR_ORDER 1 77#define PGDIR_ORDER 1
78#else 78#else
79#define PGDIR_ORDER 0 79#define PGDIR_ORDER 0
@@ -288,7 +288,7 @@ int map_page(unsigned long va, phys_addr_t pa, int flags)
288} 288}
289 289
290/* 290/*
291 * Map in all of physical memory starting at KERNELBASE. 291 * Map in a big chunk of physical memory starting at KERNELBASE.
292 */ 292 */
293void __init mapin_ram(void) 293void __init mapin_ram(void)
294{ 294{
diff --git a/arch/powerpc/mm/tlb_32.c b/arch/powerpc/mm/tlb_32.c
index eb4b512d65fa..f9a47fee3927 100644
--- a/arch/powerpc/mm/tlb_32.c
+++ b/arch/powerpc/mm/tlb_32.c
@@ -45,6 +45,7 @@ void flush_hash_entry(struct mm_struct *mm, pte_t *ptep, unsigned long addr)
45 flush_hash_pages(mm->context.id, addr, ptephys, 1); 45 flush_hash_pages(mm->context.id, addr, ptephys, 1);
46 } 46 }
47} 47}
48EXPORT_SYMBOL(flush_hash_entry);
48 49
49/* 50/*
50 * Called by ptep_set_access_flags, must flush on CPUs for which the 51 * Called by ptep_set_access_flags, must flush on CPUs for which the
diff --git a/arch/powerpc/oprofile/cell/vma_map.c b/arch/powerpc/oprofile/cell/vma_map.c
index fff66662d021..258fa4411e9e 100644
--- a/arch/powerpc/oprofile/cell/vma_map.c
+++ b/arch/powerpc/oprofile/cell/vma_map.c
@@ -229,7 +229,7 @@ struct vma_to_fileoffset_map *create_vma_map(const struct spu *aSpu,
229 */ 229 */
230 overlay_tbl_offset = vma_map_lookup(map, ovly_table_sym, 230 overlay_tbl_offset = vma_map_lookup(map, ovly_table_sym,
231 aSpu, &grd_val); 231 aSpu, &grd_val);
232 if (overlay_tbl_offset < 0) { 232 if (overlay_tbl_offset > 0x10000000) {
233 printk(KERN_ERR "SPU_PROF: " 233 printk(KERN_ERR "SPU_PROF: "
234 "%s, line %d: Error finding SPU overlay table\n", 234 "%s, line %d: Error finding SPU overlay table\n",
235 __func__, __LINE__); 235 __func__, __LINE__);
diff --git a/arch/powerpc/oprofile/op_model_power4.c b/arch/powerpc/oprofile/op_model_power4.c
index 446a8bbb847b..3e3d91f536e0 100644
--- a/arch/powerpc/oprofile/op_model_power4.c
+++ b/arch/powerpc/oprofile/op_model_power4.c
@@ -64,7 +64,7 @@ static int power4_reg_setup(struct op_counter_config *ctr,
64 return 0; 64 return 0;
65} 65}
66 66
67extern void ppc64_enable_pmcs(void); 67extern void ppc_enable_pmcs(void);
68 68
69/* 69/*
70 * Older CPUs require the MMCRA sample bit to be always set, but newer 70 * Older CPUs require the MMCRA sample bit to be always set, but newer
@@ -91,7 +91,7 @@ static int power4_cpu_setup(struct op_counter_config *ctr)
91 unsigned int mmcr0 = mmcr0_val; 91 unsigned int mmcr0 = mmcr0_val;
92 unsigned long mmcra = mmcra_val; 92 unsigned long mmcra = mmcra_val;
93 93
94 ppc64_enable_pmcs(); 94 ppc_enable_pmcs();
95 95
96 /* set the freeze bit */ 96 /* set the freeze bit */
97 mmcr0 |= MMCR0_FC; 97 mmcr0 |= MMCR0_FC;
diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig
index 249ba01c6674..79c1154f88d4 100644
--- a/arch/powerpc/platforms/44x/Kconfig
+++ b/arch/powerpc/platforms/44x/Kconfig
@@ -2,6 +2,7 @@ config BAMBOO
2 bool "Bamboo" 2 bool "Bamboo"
3 depends on 44x 3 depends on 44x
4 default n 4 default n
5 select PPC44x_SIMPLE
5 select 440EP 6 select 440EP
6 select PCI 7 select PCI
7 help 8 help
@@ -30,6 +31,7 @@ config SEQUOIA
30 bool "Sequoia" 31 bool "Sequoia"
31 depends on 44x 32 depends on 44x
32 default n 33 default n
34 select PPC44x_SIMPLE
33 select 440EPX 35 select 440EPX
34 help 36 help
35 This option enables support for the AMCC PPC440EPX evaluation board. 37 This option enables support for the AMCC PPC440EPX evaluation board.
@@ -38,6 +40,7 @@ config TAISHAN
38 bool "Taishan" 40 bool "Taishan"
39 depends on 44x 41 depends on 44x
40 default n 42 default n
43 select PPC44x_SIMPLE
41 select 440GX 44 select 440GX
42 select PCI 45 select PCI
43 help 46 help
@@ -48,6 +51,7 @@ config KATMAI
48 bool "Katmai" 51 bool "Katmai"
49 depends on 44x 52 depends on 44x
50 default n 53 default n
54 select PPC44x_SIMPLE
51 select 440SPe 55 select 440SPe
52 select PCI 56 select PCI
53 select PPC4xx_PCI_EXPRESS 57 select PPC4xx_PCI_EXPRESS
@@ -58,6 +62,7 @@ config RAINIER
58 bool "Rainier" 62 bool "Rainier"
59 depends on 44x 63 depends on 44x
60 default n 64 default n
65 select PPC44x_SIMPLE
61 select 440GRX 66 select 440GRX
62 select PCI 67 select PCI
63 help 68 help
@@ -76,20 +81,48 @@ config WARP
76 See http://www.pikatechnologies.com/ and follow the "PIKA for Computer 81 See http://www.pikatechnologies.com/ and follow the "PIKA for Computer
77 Telephony Developers" link for more information. 82 Telephony Developers" link for more information.
78 83
84config ARCHES
85 bool "Arches"
86 depends on 44x
87 default n
88 select PPC44x_SIMPLE
89 select 460EX # Odd since it uses 460GT but the effects are the same
90 select PCI
91 select PPC4xx_PCI_EXPRESS
92 help
93 This option enables support for the AMCC Dual PPC460GT evaluation board.
94
79config CANYONLANDS 95config CANYONLANDS
80 bool "Canyonlands" 96 bool "Canyonlands"
81 depends on 44x 97 depends on 44x
82 default n 98 default n
99 select PPC44x_SIMPLE
83 select 460EX 100 select 460EX
84 select PCI 101 select PCI
85 select PPC4xx_PCI_EXPRESS 102 select PPC4xx_PCI_EXPRESS
103 select IBM_NEW_EMAC_RGMII
104 select IBM_NEW_EMAC_ZMII
86 help 105 help
87 This option enables support for the AMCC PPC460EX evaluation board. 106 This option enables support for the AMCC PPC460EX evaluation board.
88 107
108config GLACIER
109 bool "Glacier"
110 depends on 44x
111 default n
112 select PPC44x_SIMPLE
113 select 460EX # Odd since it uses 460GT but the effects are the same
114 select PCI
115 select PPC4xx_PCI_EXPRESS
116 select IBM_NEW_EMAC_RGMII
117 select IBM_NEW_EMAC_ZMII
118 help
119 This option enables support for the AMCC PPC460GT evaluation board.
120
89config YOSEMITE 121config YOSEMITE
90 bool "Yosemite" 122 bool "Yosemite"
91 depends on 44x 123 depends on 44x
92 default n 124 default n
125 select PPC44x_SIMPLE
93 select 440EP 126 select 440EP
94 select PCI 127 select PCI
95 help 128 help
@@ -127,6 +160,13 @@ config XILINX_VIRTEX440_GENERIC_BOARD
127 Most Virtex 5 designs should use this unless it needs to do some 160 Most Virtex 5 designs should use this unless it needs to do some
128 special configuration at board probe time. 161 special configuration at board probe time.
129 162
163config PPC44x_SIMPLE
164 bool "Simple PowerPC 44x board support"
165 depends on 44x
166 default n
167 help
168 This option enables the simple PowerPC 44x platform support.
169
130# 44x specific CPU modules, selected based on the board above. 170# 44x specific CPU modules, selected based on the board above.
131config 440EP 171config 440EP
132 bool 172 bool
@@ -170,8 +210,6 @@ config 460EX
170 bool 210 bool
171 select PPC_FPU 211 select PPC_FPU
172 select IBM_NEW_EMAC_EMAC4 212 select IBM_NEW_EMAC_EMAC4
173 select IBM_NEW_EMAC_RGMII
174 select IBM_NEW_EMAC_ZMII
175 select IBM_NEW_EMAC_TAH 213 select IBM_NEW_EMAC_TAH
176 214
177# 44x errata/workaround config symbols, selected by the CPU models above 215# 44x errata/workaround config symbols, selected by the CPU models above
diff --git a/arch/powerpc/platforms/44x/Makefile b/arch/powerpc/platforms/44x/Makefile
index 8d0b1a192d62..698133180aee 100644
--- a/arch/powerpc/platforms/44x/Makefile
+++ b/arch/powerpc/platforms/44x/Makefile
@@ -1,13 +1,7 @@
1obj-$(CONFIG_44x) := misc_44x.o idle.o 1obj-$(CONFIG_44x) := misc_44x.o idle.o
2obj-$(CONFIG_PPC44x_SIMPLE) += ppc44x_simple.o
2obj-$(CONFIG_EBONY) += ebony.o 3obj-$(CONFIG_EBONY) += ebony.o
3obj-$(CONFIG_TAISHAN) += taishan.o
4obj-$(CONFIG_BAMBOO) += bamboo.o
5obj-$(CONFIG_YOSEMITE) += bamboo.o
6obj-$(CONFIG_SAM440EP) += sam440ep.o 4obj-$(CONFIG_SAM440EP) += sam440ep.o
7obj-$(CONFIG_SEQUOIA) += sequoia.o
8obj-$(CONFIG_KATMAI) += katmai.o
9obj-$(CONFIG_RAINIER) += rainier.o
10obj-$(CONFIG_WARP) += warp.o 5obj-$(CONFIG_WARP) += warp.o
11obj-$(CONFIG_WARP) += warp-nand.o 6obj-$(CONFIG_WARP) += warp-nand.o
12obj-$(CONFIG_CANYONLANDS) += canyonlands.o
13obj-$(CONFIG_XILINX_VIRTEX_5_FXT) += virtex.o 7obj-$(CONFIG_XILINX_VIRTEX_5_FXT) += virtex.o
diff --git a/arch/powerpc/platforms/44x/bamboo.c b/arch/powerpc/platforms/44x/bamboo.c
deleted file mode 100644
index cef169e95156..000000000000
--- a/arch/powerpc/platforms/44x/bamboo.c
+++ /dev/null
@@ -1,62 +0,0 @@
1/*
2 * Bamboo board specific routines
3 *
4 * Wade Farnsworth <wfarnsworth@mvista.com>
5 * Copyright 2004 MontaVista Software Inc.
6 *
7 * Rewritten and ported to the merged powerpc tree:
8 * Josh Boyer <jwboyer@linux.vnet.ibm.com>
9 * Copyright 2007 IBM Corporation
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 */
16#include <linux/init.h>
17#include <linux/of_platform.h>
18
19#include <asm/machdep.h>
20#include <asm/prom.h>
21#include <asm/udbg.h>
22#include <asm/time.h>
23#include <asm/uic.h>
24#include <asm/pci-bridge.h>
25#include <asm/ppc4xx.h>
26
27static __initdata struct of_device_id bamboo_of_bus[] = {
28 { .compatible = "ibm,plb4", },
29 { .compatible = "ibm,opb", },
30 { .compatible = "ibm,ebc", },
31 {},
32};
33
34static int __init bamboo_device_probe(void)
35{
36 of_platform_bus_probe(NULL, bamboo_of_bus, NULL);
37
38 return 0;
39}
40machine_device_initcall(bamboo, bamboo_device_probe);
41
42static int __init bamboo_probe(void)
43{
44 unsigned long root = of_get_flat_dt_root();
45
46 if (!of_flat_dt_is_compatible(root, "amcc,bamboo"))
47 return 0;
48
49 ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
50
51 return 1;
52}
53
54define_machine(bamboo) {
55 .name = "Bamboo",
56 .probe = bamboo_probe,
57 .progress = udbg_progress,
58 .init_IRQ = uic_init_tree,
59 .get_irq = uic_get_irq,
60 .restart = ppc4xx_reset_system,
61 .calibrate_decr = generic_calibrate_decr,
62};
diff --git a/arch/powerpc/platforms/44x/canyonlands.c b/arch/powerpc/platforms/44x/canyonlands.c
deleted file mode 100644
index 3949289f51df..000000000000
--- a/arch/powerpc/platforms/44x/canyonlands.c
+++ /dev/null
@@ -1,63 +0,0 @@
1/*
2 * Canyonlands board specific routines
3 *
4 * Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de>
5 *
6 * Based on the Katmai code by
7 * Benjamin Herrenschmidt <benh@kernel.crashing.org>
8 * Copyright 2007 IBM Corp.
9 * Josh Boyer <jwboyer@linux.vnet.ibm.com>
10 * Copyright 2007 IBM Corporation
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 */
17#include <linux/init.h>
18#include <linux/of_platform.h>
19
20#include <asm/machdep.h>
21#include <asm/prom.h>
22#include <asm/udbg.h>
23#include <asm/time.h>
24#include <asm/uic.h>
25#include <asm/pci-bridge.h>
26#include <asm/ppc4xx.h>
27
28static __initdata struct of_device_id canyonlands_of_bus[] = {
29 { .compatible = "ibm,plb4", },
30 { .compatible = "ibm,opb", },
31 { .compatible = "ibm,ebc", },
32 {},
33};
34
35static int __init canyonlands_device_probe(void)
36{
37 of_platform_bus_probe(NULL, canyonlands_of_bus, NULL);
38
39 return 0;
40}
41machine_device_initcall(canyonlands, canyonlands_device_probe);
42
43static int __init canyonlands_probe(void)
44{
45 unsigned long root = of_get_flat_dt_root();
46
47 if (!of_flat_dt_is_compatible(root, "amcc,canyonlands"))
48 return 0;
49
50 ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
51
52 return 1;
53}
54
55define_machine(canyonlands) {
56 .name = "Canyonlands",
57 .probe = canyonlands_probe,
58 .progress = udbg_progress,
59 .init_IRQ = uic_init_tree,
60 .get_irq = uic_get_irq,
61 .restart = ppc4xx_reset_system,
62 .calibrate_decr = generic_calibrate_decr,
63};
diff --git a/arch/powerpc/platforms/44x/katmai.c b/arch/powerpc/platforms/44x/katmai.c
deleted file mode 100644
index 44f4b3a00ced..000000000000
--- a/arch/powerpc/platforms/44x/katmai.c
+++ /dev/null
@@ -1,62 +0,0 @@
1/*
2 * Katmai board specific routines
3 *
4 * Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 * Copyright 2007 IBM Corp.
6 *
7 * Based on the Bamboo code by
8 * Josh Boyer <jwboyer@linux.vnet.ibm.com>
9 * Copyright 2007 IBM Corporation
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 */
16#include <linux/init.h>
17#include <linux/of_platform.h>
18
19#include <asm/machdep.h>
20#include <asm/prom.h>
21#include <asm/udbg.h>
22#include <asm/time.h>
23#include <asm/uic.h>
24#include <asm/pci-bridge.h>
25#include <asm/ppc4xx.h>
26
27static __initdata struct of_device_id katmai_of_bus[] = {
28 { .compatible = "ibm,plb4", },
29 { .compatible = "ibm,opb", },
30 { .compatible = "ibm,ebc", },
31 {},
32};
33
34static int __init katmai_device_probe(void)
35{
36 of_platform_bus_probe(NULL, katmai_of_bus, NULL);
37
38 return 0;
39}
40machine_device_initcall(katmai, katmai_device_probe);
41
42static int __init katmai_probe(void)
43{
44 unsigned long root = of_get_flat_dt_root();
45
46 if (!of_flat_dt_is_compatible(root, "amcc,katmai"))
47 return 0;
48
49 ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
50
51 return 1;
52}
53
54define_machine(katmai) {
55 .name = "Katmai",
56 .probe = katmai_probe,
57 .progress = udbg_progress,
58 .init_IRQ = uic_init_tree,
59 .get_irq = uic_get_irq,
60 .restart = ppc4xx_reset_system,
61 .calibrate_decr = generic_calibrate_decr,
62};
diff --git a/arch/powerpc/platforms/44x/ppc44x_simple.c b/arch/powerpc/platforms/44x/ppc44x_simple.c
new file mode 100644
index 000000000000..29671262801f
--- /dev/null
+++ b/arch/powerpc/platforms/44x/ppc44x_simple.c
@@ -0,0 +1,88 @@
1/*
2 * Generic PowerPC 44x platform support
3 *
4 * Copyright 2008 IBM Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; version 2 of the License.
9 *
10 * This implements simple platform support for PowerPC 44x chips. This is
11 * mostly used for eval boards or other simple and "generic" 44x boards. If
12 * your board has custom functions or hardware, then you will likely want to
13 * implement your own board.c file to accommodate it.
14 */
15
16#include <asm/machdep.h>
17#include <asm/pci-bridge.h>
18#include <asm/ppc4xx.h>
19#include <asm/prom.h>
20#include <asm/time.h>
21#include <asm/udbg.h>
22#include <asm/uic.h>
23
24#include <linux/init.h>
25#include <linux/of_platform.h>
26
27static __initdata struct of_device_id ppc44x_of_bus[] = {
28 { .compatible = "ibm,plb4", },
29 { .compatible = "ibm,opb", },
30 { .compatible = "ibm,ebc", },
31 { .compatible = "simple-bus", },
32 {},
33};
34
35static int __init ppc44x_device_probe(void)
36{
37 of_platform_bus_probe(NULL, ppc44x_of_bus, NULL);
38
39 return 0;
40}
41machine_device_initcall(ppc44x_simple, ppc44x_device_probe);
42
43/* This is the list of boards that can be supported by this simple
44 * platform code. This does _not_ mean the boards are compatible,
45 * as they most certainly are not from a device tree perspective.
46 * However, their differences are handled by the device tree and the
47 * drivers and therefore they don't need custom board support files.
48 *
49 * Again, if your board needs to do things differently then create a
50 * board.c file for it rather than adding it to this list.
51 */
52static char *board[] __initdata = {
53 "amcc,arches",
54 "amcc,bamboo",
55 "amcc,canyonlands",
56 "amcc,glacier",
57 "ibm,ebony",
58 "amcc,katmai",
59 "amcc,rainier",
60 "amcc,sequoia",
61 "amcc,taishan",
62 "amcc,yosemite"
63};
64
65static int __init ppc44x_probe(void)
66{
67 unsigned long root = of_get_flat_dt_root();
68 int i = 0;
69
70 for (i = 0; i < ARRAY_SIZE(board); i++) {
71 if (of_flat_dt_is_compatible(root, board[i])) {
72 ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
73 return 1;
74 }
75 }
76
77 return 0;
78}
79
80define_machine(ppc44x_simple) {
81 .name = "PowerPC 44x Platform",
82 .probe = ppc44x_probe,
83 .progress = udbg_progress,
84 .init_IRQ = uic_init_tree,
85 .get_irq = uic_get_irq,
86 .restart = ppc4xx_reset_system,
87 .calibrate_decr = generic_calibrate_decr,
88};
diff --git a/arch/powerpc/platforms/44x/rainier.c b/arch/powerpc/platforms/44x/rainier.c
deleted file mode 100644
index 4f1ff84c4b63..000000000000
--- a/arch/powerpc/platforms/44x/rainier.c
+++ /dev/null
@@ -1,62 +0,0 @@
1/*
2 * Rainier board specific routines
3 *
4 * Valentine Barshak <vbarshak@ru.mvista.com>
5 * Copyright 2007 MontaVista Software Inc.
6 *
7 * Based on the Bamboo code by
8 * Josh Boyer <jwboyer@linux.vnet.ibm.com>
9 * Copyright 2007 IBM Corporation
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 */
16#include <linux/init.h>
17#include <linux/of_platform.h>
18
19#include <asm/machdep.h>
20#include <asm/prom.h>
21#include <asm/udbg.h>
22#include <asm/time.h>
23#include <asm/uic.h>
24#include <asm/pci-bridge.h>
25#include <asm/ppc4xx.h>
26
27static __initdata struct of_device_id rainier_of_bus[] = {
28 { .compatible = "ibm,plb4", },
29 { .compatible = "ibm,opb", },
30 { .compatible = "ibm,ebc", },
31 {},
32};
33
34static int __init rainier_device_probe(void)
35{
36 of_platform_bus_probe(NULL, rainier_of_bus, NULL);
37
38 return 0;
39}
40machine_device_initcall(rainier, rainier_device_probe);
41
42static int __init rainier_probe(void)
43{
44 unsigned long root = of_get_flat_dt_root();
45
46 if (!of_flat_dt_is_compatible(root, "amcc,rainier"))
47 return 0;
48
49 ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
50
51 return 1;
52}
53
54define_machine(rainier) {
55 .name = "Rainier",
56 .probe = rainier_probe,
57 .progress = udbg_progress,
58 .init_IRQ = uic_init_tree,
59 .get_irq = uic_get_irq,
60 .restart = ppc4xx_reset_system,
61 .calibrate_decr = generic_calibrate_decr,
62};
diff --git a/arch/powerpc/platforms/44x/sequoia.c b/arch/powerpc/platforms/44x/sequoia.c
deleted file mode 100644
index 49eb73daacdf..000000000000
--- a/arch/powerpc/platforms/44x/sequoia.c
+++ /dev/null
@@ -1,63 +0,0 @@
1/*
2 * Sequoia board specific routines
3 *
4 * Valentine Barshak <vbarshak@ru.mvista.com>
5 * Copyright 2007 MontaVista Software Inc.
6 *
7 * Based on the Bamboo code by
8 * Josh Boyer <jwboyer@linux.vnet.ibm.com>
9 * Copyright 2007 IBM Corporation
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 */
16#include <linux/init.h>
17#include <linux/of_platform.h>
18
19#include <asm/machdep.h>
20#include <asm/prom.h>
21#include <asm/udbg.h>
22#include <asm/time.h>
23#include <asm/uic.h>
24#include <asm/pci-bridge.h>
25
26#include <asm/ppc4xx.h>
27
28static __initdata struct of_device_id sequoia_of_bus[] = {
29 { .compatible = "ibm,plb4", },
30 { .compatible = "ibm,opb", },
31 { .compatible = "ibm,ebc", },
32 {},
33};
34
35static int __init sequoia_device_probe(void)
36{
37 of_platform_bus_probe(NULL, sequoia_of_bus, NULL);
38
39 return 0;
40}
41machine_device_initcall(sequoia, sequoia_device_probe);
42
43static int __init sequoia_probe(void)
44{
45 unsigned long root = of_get_flat_dt_root();
46
47 if (!of_flat_dt_is_compatible(root, "amcc,sequoia"))
48 return 0;
49
50 ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
51
52 return 1;
53}
54
55define_machine(sequoia) {
56 .name = "Sequoia",
57 .probe = sequoia_probe,
58 .progress = udbg_progress,
59 .init_IRQ = uic_init_tree,
60 .get_irq = uic_get_irq,
61 .restart = ppc4xx_reset_system,
62 .calibrate_decr = generic_calibrate_decr,
63};
diff --git a/arch/powerpc/platforms/44x/taishan.c b/arch/powerpc/platforms/44x/taishan.c
deleted file mode 100644
index 49c78b2098b4..000000000000
--- a/arch/powerpc/platforms/44x/taishan.c
+++ /dev/null
@@ -1,72 +0,0 @@
1/*
2 * Taishan board specific routines based off ebony.c code
3 * original copyrights below
4 *
5 * Matt Porter <mporter@kernel.crashing.org>
6 * Copyright 2002-2005 MontaVista Software Inc.
7 *
8 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
9 * Copyright (c) 2003-2005 Zultys Technologies
10 *
11 * Rewritten and ported to the merged powerpc tree:
12 * Copyright 2007 David Gibson <dwg@au1.ibm.com>, IBM Corporation.
13 *
14 * Modified from ebony.c for taishan:
15 * Copyright 2007 Hugh Blemings <hugh@au.ibm.com>, IBM Corporation.
16 *
17 * This program is free software; you can redistribute it and/or modify it
18 * under the terms of the GNU General Public License as published by the
19 * Free Software Foundation; either version 2 of the License, or (at your
20 * option) any later version.
21 */
22
23#include <linux/init.h>
24#include <linux/of_platform.h>
25
26#include <asm/machdep.h>
27#include <asm/prom.h>
28#include <asm/udbg.h>
29#include <asm/time.h>
30#include <asm/uic.h>
31#include <asm/pci-bridge.h>
32#include <asm/ppc4xx.h>
33
34static __initdata struct of_device_id taishan_of_bus[] = {
35 { .compatible = "ibm,plb4", },
36 { .compatible = "ibm,opb", },
37 { .compatible = "ibm,ebc", },
38 {},
39};
40
41static int __init taishan_device_probe(void)
42{
43 of_platform_bus_probe(NULL, taishan_of_bus, NULL);
44
45 return 0;
46}
47machine_device_initcall(taishan, taishan_device_probe);
48
49/*
50 * Called very early, MMU is off, device-tree isn't unflattened
51 */
52static int __init taishan_probe(void)
53{
54 unsigned long root = of_get_flat_dt_root();
55
56 if (!of_flat_dt_is_compatible(root, "amcc,taishan"))
57 return 0;
58
59 ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
60
61 return 1;
62}
63
64define_machine(taishan) {
65 .name = "Taishan",
66 .probe = taishan_probe,
67 .progress = udbg_progress,
68 .init_IRQ = uic_init_tree,
69 .get_irq = uic_get_irq,
70 .restart = ppc4xx_reset_system,
71 .calibrate_decr = generic_calibrate_decr,
72};
diff --git a/arch/powerpc/platforms/512x/Kconfig b/arch/powerpc/platforms/512x/Kconfig
index c62f893ede19..326852c78b8f 100644
--- a/arch/powerpc/platforms/512x/Kconfig
+++ b/arch/powerpc/platforms/512x/Kconfig
@@ -3,6 +3,8 @@ config PPC_MPC512x
3 select FSL_SOC 3 select FSL_SOC
4 select IPIC 4 select IPIC
5 select PPC_CLOCK 5 select PPC_CLOCK
6 select PPC_PCI_CHOICE
7 select FSL_PCI if PCI
6 8
7config PPC_MPC5121 9config PPC_MPC5121
8 bool 10 bool
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads.c b/arch/powerpc/platforms/512x/mpc5121_ads.c
index 5ebf6939a697..441abc488851 100644
--- a/arch/powerpc/platforms/512x/mpc5121_ads.c
+++ b/arch/powerpc/platforms/512x/mpc5121_ads.c
@@ -22,16 +22,26 @@
22#include <asm/prom.h> 22#include <asm/prom.h>
23#include <asm/time.h> 23#include <asm/time.h>
24 24
25#include <sysdev/fsl_pci.h>
26
25#include "mpc512x.h" 27#include "mpc512x.h"
26#include "mpc5121_ads.h" 28#include "mpc5121_ads.h"
27 29
28static void __init mpc5121_ads_setup_arch(void) 30static void __init mpc5121_ads_setup_arch(void)
29{ 31{
32#ifdef CONFIG_PCI
33 struct device_node *np;
34#endif
30 printk(KERN_INFO "MPC5121 ADS board from Freescale Semiconductor\n"); 35 printk(KERN_INFO "MPC5121 ADS board from Freescale Semiconductor\n");
31 /* 36 /*
32 * cpld regs are needed early 37 * cpld regs are needed early
33 */ 38 */
34 mpc5121_ads_cpld_map(); 39 mpc5121_ads_cpld_map();
40
41#ifdef CONFIG_PCI
42 for_each_compatible_node(np, "pci", "fsl,mpc5121-pci")
43 mpc83xx_add_bridge(np);
44#endif
35} 45}
36 46
37static void __init mpc5121_ads_init_IRQ(void) 47static void __init mpc5121_ads_init_IRQ(void)
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_common.c b/arch/powerpc/platforms/52xx/mpc52xx_common.c
index 4d5fd1dbd400..044b4e6e8743 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_common.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_common.c
@@ -90,7 +90,7 @@ mpc5200_setup_xlb_arbiter(void)
90 of_node_put(np); 90 of_node_put(np);
91 if (!xlb) { 91 if (!xlb) {
92 printk(KERN_ERR __FILE__ ": " 92 printk(KERN_ERR __FILE__ ": "
93 "Error mapping XLB in mpc52xx_setup_cpu(). " 93 "Error mapping XLB in mpc52xx_setup_cpu(). "
94 "Expect some abnormal behavior\n"); 94 "Expect some abnormal behavior\n");
95 return; 95 return;
96 } 96 }
@@ -216,7 +216,8 @@ mpc52xx_restart(char *cmd)
216 out_be32(&mpc52xx_wdt->count, 0x000000ff); 216 out_be32(&mpc52xx_wdt->count, 0x000000ff);
217 out_be32(&mpc52xx_wdt->mode, 0x00009004); 217 out_be32(&mpc52xx_wdt->mode, 0x00009004);
218 } else 218 } else
219 printk("mpc52xx_restart: Can't access wdt. " 219 printk(KERN_ERR __FILE__ ": "
220 "mpc52xx_restart: Can't access wdt. "
220 "Restart impossible, system halted.\n"); 221 "Restart impossible, system halted.\n");
221 222
222 while (1); 223 while (1);
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pci.c b/arch/powerpc/platforms/52xx/mpc52xx_pci.c
index 5a382bb15f62..b49a18527661 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pci.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pci.c
@@ -265,8 +265,11 @@ mpc52xx_pci_setup(struct pci_controller *hose,
265 /* Memory windows */ 265 /* Memory windows */
266 res = &hose->mem_resources[0]; 266 res = &hose->mem_resources[0];
267 if (res->flags) { 267 if (res->flags) {
268 pr_debug("mem_resource[0] = {.start=%x, .end=%x, .flags=%lx}\n", 268 pr_debug("mem_resource[0] = "
269 res->start, res->end, res->flags); 269 "{.start=%llx, .end=%llx, .flags=%llx}\n",
270 (unsigned long long)res->start,
271 (unsigned long long)res->end,
272 (unsigned long long)res->flags);
270 out_be32(&pci_regs->iw0btar, 273 out_be32(&pci_regs->iw0btar,
271 MPC52xx_PCI_IWBTAR_TRANSLATION(res->start, res->start, 274 MPC52xx_PCI_IWBTAR_TRANSLATION(res->start, res->start,
272 res->end - res->start + 1)); 275 res->end - res->start + 1));
@@ -297,9 +300,11 @@ mpc52xx_pci_setup(struct pci_controller *hose,
297 printk(KERN_ERR "%s: Didn't find IO resources\n", __FILE__); 300 printk(KERN_ERR "%s: Didn't find IO resources\n", __FILE__);
298 return; 301 return;
299 } 302 }
300 pr_debug(".io_resource={.start=%x,.end=%x,.flags=%lx} " 303 pr_debug(".io_resource={.start=%llx,.end=%llx,.flags=%llx} "
301 ".io_base_phys=0x%p\n", 304 ".io_base_phys=0x%p\n",
302 res->start, res->end, res->flags, (void*)hose->io_base_phys); 305 (unsigned long long)res->start,
306 (unsigned long long)res->end,
307 (unsigned long long)res->flags, (void*)hose->io_base_phys);
303 out_be32(&pci_regs->iw2btar, 308 out_be32(&pci_regs->iw2btar,
304 MPC52xx_PCI_IWBTAR_TRANSLATION(hose->io_base_phys, 309 MPC52xx_PCI_IWBTAR_TRANSLATION(hose->io_base_phys,
305 res->start, 310 res->start,
diff --git a/arch/powerpc/platforms/82xx/Kconfig b/arch/powerpc/platforms/82xx/Kconfig
index 75eb1ede5497..30f008b2f92e 100644
--- a/arch/powerpc/platforms/82xx/Kconfig
+++ b/arch/powerpc/platforms/82xx/Kconfig
@@ -38,6 +38,14 @@ config EP8248E
38 This board is also resold by Freescale as the QUICCStart 38 This board is also resold by Freescale as the QUICCStart
39 MPC8248 Evaluation System and/or the CWH-PPC-8248N-VE. 39 MPC8248 Evaluation System and/or the CWH-PPC-8248N-VE.
40 40
41config MGCOGE
42 bool "Keymile MGCOGE"
43 select 8272
44 select 8260
45 select FSL_SOC
46 help
47 This enables support for the Keymile MGCOGE board.
48
41endif 49endif
42 50
43config PQ2ADS 51config PQ2ADS
diff --git a/arch/powerpc/platforms/82xx/Makefile b/arch/powerpc/platforms/82xx/Makefile
index 6cd5cd59bf2a..d982793f4dbd 100644
--- a/arch/powerpc/platforms/82xx/Makefile
+++ b/arch/powerpc/platforms/82xx/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_CPM2) += pq2.o
6obj-$(CONFIG_PQ2_ADS_PCI_PIC) += pq2ads-pci-pic.o 6obj-$(CONFIG_PQ2_ADS_PCI_PIC) += pq2ads-pci-pic.o
7obj-$(CONFIG_PQ2FADS) += pq2fads.o 7obj-$(CONFIG_PQ2FADS) += pq2fads.o
8obj-$(CONFIG_EP8248E) += ep8248e.o 8obj-$(CONFIG_EP8248E) += ep8248e.o
9obj-$(CONFIG_MGCOGE) += mgcoge.o
diff --git a/arch/powerpc/platforms/82xx/mgcoge.c b/arch/powerpc/platforms/82xx/mgcoge.c
new file mode 100644
index 000000000000..c2af169c1d1d
--- /dev/null
+++ b/arch/powerpc/platforms/82xx/mgcoge.c
@@ -0,0 +1,129 @@
1/*
2 * Keymile mgcoge support
3 * Copyright 2008 DENX Software Engineering GmbH
4 * Author: Heiko Schocher <hs@denx.de>
5 *
6 * based on code from:
7 * Copyright 2007 Freescale Semiconductor, Inc.
8 * Author: Scott Wood <scottwood@freescale.com>
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 */
15
16#include <linux/init.h>
17#include <linux/interrupt.h>
18#include <linux/fsl_devices.h>
19#include <linux/of_platform.h>
20
21#include <asm/io.h>
22#include <asm/cpm2.h>
23#include <asm/udbg.h>
24#include <asm/machdep.h>
25#include <asm/time.h>
26#include <asm/mpc8260.h>
27#include <asm/prom.h>
28
29#include <sysdev/fsl_soc.h>
30#include <sysdev/cpm2_pic.h>
31
32#include "pq2.h"
33
34static void __init mgcoge_pic_init(void)
35{
36 struct device_node *np = of_find_compatible_node(NULL, NULL, "fsl,pq2-pic");
37 if (!np) {
38 printk(KERN_ERR "PIC init: can not find cpm-pic node\n");
39 return;
40 }
41
42 cpm2_pic_init(np);
43 of_node_put(np);
44}
45
46struct cpm_pin {
47 int port, pin, flags;
48};
49
50static __initdata struct cpm_pin mgcoge_pins[] = {
51
52 /* SMC2 */
53 {1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
54 {1, 9, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
55
56 /* SCC4 */
57 {3, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
58 {3, 24, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
59 {3, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
60 {3, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
61 {4, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
62 {4, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
63};
64
65static void __init init_ioports(void)
66{
67 int i;
68
69 for (i = 0; i < ARRAY_SIZE(mgcoge_pins); i++) {
70 const struct cpm_pin *pin = &mgcoge_pins[i];
71 cpm2_set_pin(pin->port - 1, pin->pin, pin->flags);
72 }
73
74 cpm2_smc_clk_setup(CPM_CLK_SMC2, CPM_BRG8);
75 cpm2_clk_setup(CPM_CLK_SCC4, CPM_CLK7, CPM_CLK_RX);
76 cpm2_clk_setup(CPM_CLK_SCC4, CPM_CLK8, CPM_CLK_TX);
77}
78
79static void __init mgcoge_setup_arch(void)
80{
81 if (ppc_md.progress)
82 ppc_md.progress("mgcoge_setup_arch()", 0);
83
84 cpm2_reset();
85
86 /* When this is set, snooping CPM DMA from RAM causes
87 * machine checks. See erratum SIU18.
88 */
89 clrbits32(&cpm2_immr->im_siu_conf.siu_82xx.sc_bcr, MPC82XX_BCR_PLDP);
90
91 init_ioports();
92
93 if (ppc_md.progress)
94 ppc_md.progress("mgcoge_setup_arch(), finish", 0);
95}
96
97static __initdata struct of_device_id of_bus_ids[] = {
98 { .compatible = "simple-bus", },
99 {},
100};
101
102static int __init declare_of_platform_devices(void)
103{
104 of_platform_bus_probe(NULL, of_bus_ids, NULL);
105
106 return 0;
107}
108machine_device_initcall(mgcoge, declare_of_platform_devices);
109
110/*
111 * Called very early, device-tree isn't unflattened
112 */
113static int __init mgcoge_probe(void)
114{
115 unsigned long root = of_get_flat_dt_root();
116 return of_flat_dt_is_compatible(root, "keymile,mgcoge");
117}
118
119define_machine(mgcoge)
120{
121 .name = "Keymile MGCOGE",
122 .probe = mgcoge_probe,
123 .setup_arch = mgcoge_setup_arch,
124 .init_IRQ = mgcoge_pic_init,
125 .get_irq = cpm2_get_irq,
126 .calibrate_decr = generic_calibrate_decr,
127 .restart = pq2_restart,
128 .progress = udbg_progress,
129};
diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig
index 6159c5d4e5f1..83c664afc897 100644
--- a/arch/powerpc/platforms/83xx/Kconfig
+++ b/arch/powerpc/platforms/83xx/Kconfig
@@ -19,7 +19,6 @@ config MPC831x_RDB
19config MPC832x_MDS 19config MPC832x_MDS
20 bool "Freescale MPC832x MDS" 20 bool "Freescale MPC832x MDS"
21 select DEFAULT_UIMAGE 21 select DEFAULT_UIMAGE
22 select QUICC_ENGINE
23 select PPC_MPC832x 22 select PPC_MPC832x
24 help 23 help
25 This option enables support for the MPC832x MDS evaluation board. 24 This option enables support for the MPC832x MDS evaluation board.
@@ -27,7 +26,6 @@ config MPC832x_MDS
27config MPC832x_RDB 26config MPC832x_RDB
28 bool "Freescale MPC832x RDB" 27 bool "Freescale MPC832x RDB"
29 select DEFAULT_UIMAGE 28 select DEFAULT_UIMAGE
30 select QUICC_ENGINE
31 select PPC_MPC832x 29 select PPC_MPC832x
32 help 30 help
33 This option enables support for the MPC8323 RDB board. 31 This option enables support for the MPC8323 RDB board.
@@ -57,15 +55,12 @@ config MPC834x_ITX
57config MPC836x_MDS 55config MPC836x_MDS
58 bool "Freescale MPC836x MDS" 56 bool "Freescale MPC836x MDS"
59 select DEFAULT_UIMAGE 57 select DEFAULT_UIMAGE
60 select QUICC_ENGINE
61 help 58 help
62 This option enables support for the MPC836x MDS Processor Board. 59 This option enables support for the MPC836x MDS Processor Board.
63 60
64config MPC836x_RDK 61config MPC836x_RDK
65 bool "Freescale/Logic MPC836x RDK" 62 bool "Freescale/Logic MPC836x RDK"
66 select DEFAULT_UIMAGE 63 select DEFAULT_UIMAGE
67 select QUICC_ENGINE
68 select QE_GPIO
69 select FSL_GTM 64 select FSL_GTM
70 select FSL_LBC 65 select FSL_LBC
71 help 66 help
diff --git a/arch/powerpc/platforms/83xx/mpc837x_mds.c b/arch/powerpc/platforms/83xx/mpc837x_mds.c
index be62de23bead..8bb13c807142 100644
--- a/arch/powerpc/platforms/83xx/mpc837x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc837x_mds.c
@@ -85,8 +85,14 @@ static void __init mpc837x_mds_setup_arch(void)
85 ppc_md.progress("mpc837x_mds_setup_arch()", 0); 85 ppc_md.progress("mpc837x_mds_setup_arch()", 0);
86 86
87#ifdef CONFIG_PCI 87#ifdef CONFIG_PCI
88 for_each_compatible_node(np, "pci", "fsl,mpc8349-pci") 88 for_each_compatible_node(np, "pci", "fsl,mpc8349-pci") {
89 if (!of_device_is_available(np)) {
90 pr_warning("%s: disabled by the firmware.\n",
91 np->full_name);
92 continue;
93 }
89 mpc83xx_add_bridge(np); 94 mpc83xx_add_bridge(np);
95 }
90#endif 96#endif
91 mpc837xmds_usb_cfg(); 97 mpc837xmds_usb_cfg();
92} 98}
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index 291675b0097a..b79dc710ed34 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -33,7 +33,6 @@ config MPC85xx_CDS
33config MPC85xx_MDS 33config MPC85xx_MDS
34 bool "Freescale MPC85xx MDS" 34 bool "Freescale MPC85xx MDS"
35 select DEFAULT_UIMAGE 35 select DEFAULT_UIMAGE
36 select QUICC_ENGINE
37 select PHYLIB 36 select PHYLIB
38 help 37 help
39 This option enables support for the MPC85xx MDS board 38 This option enables support for the MPC85xx MDS board
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
index d17807a6b89a..0293e3d3580f 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
@@ -213,7 +213,6 @@ static void mpc85xx_ads_show_cpuinfo(struct seq_file *m)
213 svid = mfspr(SPRN_SVR); 213 svid = mfspr(SPRN_SVR);
214 214
215 seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n"); 215 seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
216 seq_printf(m, "Machine\t\t: mpc85xx\n");
217 seq_printf(m, "PVR\t\t: 0x%x\n", pvid); 216 seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
218 seq_printf(m, "SVR\t\t: 0x%x\n", svid); 217 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
219 218
diff --git a/arch/powerpc/platforms/85xx/sbc8560.c b/arch/powerpc/platforms/85xx/sbc8560.c
index 6509ade71668..0c9a856f66b6 100644
--- a/arch/powerpc/platforms/85xx/sbc8560.c
+++ b/arch/powerpc/platforms/85xx/sbc8560.c
@@ -156,7 +156,7 @@ static void __init init_ioports(void)
156 int i; 156 int i;
157 157
158 for (i = 0; i < ARRAY_SIZE(sbc8560_pins); i++) { 158 for (i = 0; i < ARRAY_SIZE(sbc8560_pins); i++) {
159 struct cpm_pin *pin = &sbc8560_pins[i]; 159 const struct cpm_pin *pin = &sbc8560_pins[i];
160 cpm2_set_pin(pin->port, pin->pin, pin->flags); 160 cpm2_set_pin(pin->port, pin->pin, pin->flags);
161 } 161 }
162 162
@@ -200,7 +200,6 @@ static void sbc8560_show_cpuinfo(struct seq_file *m)
200 svid = mfspr(SPRN_SVR); 200 svid = mfspr(SPRN_SVR);
201 201
202 seq_printf(m, "Vendor\t\t: Wind River\n"); 202 seq_printf(m, "Vendor\t\t: Wind River\n");
203 seq_printf(m, "Machine\t\t: SBC8560\n");
204 seq_printf(m, "PVR\t\t: 0x%x\n", pvid); 203 seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
205 seq_printf(m, "SVR\t\t: 0x%x\n", svid); 204 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
206 205
diff --git a/arch/powerpc/platforms/86xx/Kconfig b/arch/powerpc/platforms/86xx/Kconfig
index 9355a5269431..77dd797a2580 100644
--- a/arch/powerpc/platforms/86xx/Kconfig
+++ b/arch/powerpc/platforms/86xx/Kconfig
@@ -31,6 +31,13 @@ config MPC8610_HPCD
31 help 31 help
32 This option enables support for the MPC8610 HPCD board. 32 This option enables support for the MPC8610 HPCD board.
33 33
34config GEF_SBC610
35 bool "GE Fanuc SBC610"
36 select DEFAULT_UIMAGE
37 select HAS_RAPIDIO
38 help
39 This option enables support for GE Fanuc's SBC610.
40
34endif 41endif
35 42
36config MPC8641 43config MPC8641
@@ -39,7 +46,7 @@ config MPC8641
39 select FSL_PCI if PCI 46 select FSL_PCI if PCI
40 select PPC_UDBG_16550 47 select PPC_UDBG_16550
41 select MPIC 48 select MPIC
42 default y if MPC8641_HPCN || SBC8641D 49 default y if MPC8641_HPCN || SBC8641D || GEF_SBC610
43 50
44config MPC8610 51config MPC8610
45 bool 52 bool
diff --git a/arch/powerpc/platforms/86xx/Makefile b/arch/powerpc/platforms/86xx/Makefile
index 8fee37dec795..4a56ff619afd 100644
--- a/arch/powerpc/platforms/86xx/Makefile
+++ b/arch/powerpc/platforms/86xx/Makefile
@@ -7,3 +7,4 @@ obj-$(CONFIG_SMP) += mpc86xx_smp.o
7obj-$(CONFIG_MPC8641_HPCN) += mpc86xx_hpcn.o 7obj-$(CONFIG_MPC8641_HPCN) += mpc86xx_hpcn.o
8obj-$(CONFIG_SBC8641D) += sbc8641d.o 8obj-$(CONFIG_SBC8641D) += sbc8641d.o
9obj-$(CONFIG_MPC8610_HPCD) += mpc8610_hpcd.o 9obj-$(CONFIG_MPC8610_HPCD) += mpc8610_hpcd.o
10obj-$(CONFIG_GEF_SBC610) += gef_sbc610.o gef_pic.o
diff --git a/arch/powerpc/platforms/86xx/gef_pic.c b/arch/powerpc/platforms/86xx/gef_pic.c
new file mode 100644
index 000000000000..50d0a2b63809
--- /dev/null
+++ b/arch/powerpc/platforms/86xx/gef_pic.c
@@ -0,0 +1,258 @@
1/*
2 * Interrupt handling for GE Fanuc's FPGA based PIC
3 *
4 * Author: Martyn Welch <martyn.welch@gefanuc.com>
5 *
6 * 2008 (c) GE Fanuc Intelligent Platforms Embedded Systems, Inc.
7 *
8 * This file is licensed under the terms of the GNU General Public License
9 * version 2. This program is licensed "as is" without any warranty of any
10 * kind, whether express or implied.
11 */
12
13#include <linux/stddef.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/irq.h>
17#include <linux/interrupt.h>
18#include <linux/spinlock.h>
19
20#include <asm/byteorder.h>
21#include <asm/io.h>
22#include <asm/prom.h>
23#include <asm/irq.h>
24
25#include "gef_pic.h"
26
27#define DEBUG
28#undef DEBUG
29
30#ifdef DEBUG
31#define DBG(fmt...) do { printk(KERN_DEBUG "gef_pic: " fmt); } while (0)
32#else
33#define DBG(fmt...) do { } while (0)
34#endif
35
36#define GEF_PIC_NUM_IRQS 32
37
38/* Interrupt Controller Interface Registers */
39#define GEF_PIC_INTR_STATUS 0x0000
40
41#define GEF_PIC_INTR_MASK(cpu) (0x0010 + (0x4 * cpu))
42#define GEF_PIC_CPU0_INTR_MASK GEF_PIC_INTR_MASK(0)
43#define GEF_PIC_CPU1_INTR_MASK GEF_PIC_INTR_MASK(1)
44
45#define GEF_PIC_MCP_MASK(cpu) (0x0018 + (0x4 * cpu))
46#define GEF_PIC_CPU0_MCP_MASK GEF_PIC_MCP_MASK(0)
47#define GEF_PIC_CPU1_MCP_MASK GEF_PIC_MCP_MASK(1)
48
49#define gef_irq_to_hw(virq) ((unsigned int)irq_map[virq].hwirq)
50
51
52static DEFINE_SPINLOCK(gef_pic_lock);
53
54static void __iomem *gef_pic_irq_reg_base;
55static struct irq_host *gef_pic_irq_host;
56static int gef_pic_cascade_irq;
57
58/*
59 * Interrupt Controller Handling
60 *
61 * The interrupt controller handles interrupts for most on board interrupts,
62 * apart from PCI interrupts. For example on SBC610:
63 *
64 * 17:31 RO Reserved
65 * 16 RO PCI Express Doorbell 3 Status
66 * 15 RO PCI Express Doorbell 2 Status
67 * 14 RO PCI Express Doorbell 1 Status
68 * 13 RO PCI Express Doorbell 0 Status
69 * 12 RO Real Time Clock Interrupt Status
70 * 11 RO Temperature Interrupt Status
71 * 10 RO Temperature Critical Interrupt Status
72 * 9 RO Ethernet PHY1 Interrupt Status
73 * 8 RO Ethernet PHY3 Interrupt Status
74 * 7 RO PEX8548 Interrupt Status
75 * 6 RO Reserved
76 * 5 RO Watchdog 0 Interrupt Status
77 * 4 RO Watchdog 1 Interrupt Status
78 * 3 RO AXIS Message FIFO A Interrupt Status
79 * 2 RO AXIS Message FIFO B Interrupt Status
80 * 1 RO AXIS Message FIFO C Interrupt Status
81 * 0 RO AXIS Message FIFO D Interrupt Status
82 *
83 * Interrupts can be forwarded to one of two output lines. Nothing
84 * clever is done, so if the masks are incorrectly set, a single input
85 * interrupt could generate interrupts on both output lines!
86 *
87 * The dual lines are there to allow the chained interrupts to be easily
88 * passed into two different cores. We currently do not use this functionality
89 * in this driver.
90 *
91 * Controller can also be configured to generate Machine checks (MCP), again on
92 * two lines, to be attached to two different cores. It is suggested that these
93 * should be masked out.
94 */
95
96void gef_pic_cascade(unsigned int irq, struct irq_desc *desc)
97{
98 unsigned int cascade_irq;
99
100 /*
101 * See if we actually have an interrupt, call generic handling code if
102 * we do.
103 */
104 cascade_irq = gef_pic_get_irq();
105
106 if (cascade_irq != NO_IRQ)
107 generic_handle_irq(cascade_irq);
108
109 desc->chip->eoi(irq);
110
111}
112
113static void gef_pic_mask(unsigned int virq)
114{
115 unsigned long flags;
116 unsigned int hwirq;
117 u32 mask;
118
119 hwirq = gef_irq_to_hw(virq);
120
121 spin_lock_irqsave(&gef_pic_lock, flags);
122 mask = in_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0));
123 mask &= ~(1 << hwirq);
124 out_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0), mask);
125 spin_unlock_irqrestore(&gef_pic_lock, flags);
126}
127
128static void gef_pic_mask_ack(unsigned int virq)
129{
130 /* Don't think we actually have to do anything to ack an interrupt,
131 * we just need to clear down the devices interrupt and it will go away
132 */
133 gef_pic_mask(virq);
134}
135
136static void gef_pic_unmask(unsigned int virq)
137{
138 unsigned long flags;
139 unsigned int hwirq;
140 u32 mask;
141
142 hwirq = gef_irq_to_hw(virq);
143
144 spin_lock_irqsave(&gef_pic_lock, flags);
145 mask = in_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0));
146 mask |= (1 << hwirq);
147 out_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0), mask);
148 spin_unlock_irqrestore(&gef_pic_lock, flags);
149}
150
151static struct irq_chip gef_pic_chip = {
152 .typename = "gefp",
153 .mask = gef_pic_mask,
154 .mask_ack = gef_pic_mask_ack,
155 .unmask = gef_pic_unmask,
156};
157
158
159/* When an interrupt is being configured, this call allows some flexibilty
160 * in deciding which irq_chip structure is used
161 */
162static int gef_pic_host_map(struct irq_host *h, unsigned int virq,
163 irq_hw_number_t hwirq)
164{
165 /* All interrupts are LEVEL sensitive */
166 get_irq_desc(virq)->status |= IRQ_LEVEL;
167 set_irq_chip_and_handler(virq, &gef_pic_chip, handle_level_irq);
168
169 return 0;
170}
171
172static int gef_pic_host_xlate(struct irq_host *h, struct device_node *ct,
173 u32 *intspec, unsigned int intsize,
174 irq_hw_number_t *out_hwirq, unsigned int *out_flags)
175{
176
177 *out_hwirq = intspec[0];
178 if (intsize > 1)
179 *out_flags = intspec[1];
180 else
181 *out_flags = IRQ_TYPE_LEVEL_HIGH;
182
183 return 0;
184}
185
186static struct irq_host_ops gef_pic_host_ops = {
187 .map = gef_pic_host_map,
188 .xlate = gef_pic_host_xlate,
189};
190
191
192/*
193 * Initialisation of PIC, this should be called in BSP
194 */
195void __init gef_pic_init(struct device_node *np)
196{
197 unsigned long flags;
198
199 /* Map the devices registers into memory */
200 gef_pic_irq_reg_base = of_iomap(np, 0);
201
202 spin_lock_irqsave(&gef_pic_lock, flags);
203
204 /* Initialise everything as masked. */
205 out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU0_INTR_MASK, 0);
206 out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU1_INTR_MASK, 0);
207
208 out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU0_MCP_MASK, 0);
209 out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU1_MCP_MASK, 0);
210
211 spin_unlock_irqrestore(&gef_pic_lock, flags);
212
213 /* Map controller */
214 gef_pic_cascade_irq = irq_of_parse_and_map(np, 0);
215 if (gef_pic_cascade_irq == NO_IRQ) {
216 printk(KERN_ERR "SBC610: failed to map cascade interrupt");
217 return;
218 }
219
220 /* Setup an irq_host structure */
221 gef_pic_irq_host = irq_alloc_host(np, IRQ_HOST_MAP_LINEAR,
222 GEF_PIC_NUM_IRQS,
223 &gef_pic_host_ops, NO_IRQ);
224 if (gef_pic_irq_host == NULL)
225 return;
226
227 /* Chain with parent controller */
228 set_irq_chained_handler(gef_pic_cascade_irq, gef_pic_cascade);
229}
230
231/*
232 * This is called when we receive an interrupt with apparently comes from this
233 * chip - check, returning the highest interrupt generated or return NO_IRQ
234 */
235unsigned int gef_pic_get_irq(void)
236{
237 u32 cause, mask, active;
238 unsigned int virq = NO_IRQ;
239 int hwirq;
240
241 cause = in_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_STATUS);
242
243 mask = in_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0));
244
245 active = cause & mask;
246
247 if (active) {
248 for (hwirq = GEF_PIC_NUM_IRQS - 1; hwirq > -1; hwirq--) {
249 if (active & (0x1 << hwirq))
250 break;
251 }
252 virq = irq_linear_revmap(gef_pic_irq_host,
253 (irq_hw_number_t)hwirq);
254 }
255
256 return virq;
257}
258
diff --git a/arch/powerpc/platforms/86xx/gef_pic.h b/arch/powerpc/platforms/86xx/gef_pic.h
new file mode 100644
index 000000000000..6149916da3f4
--- /dev/null
+++ b/arch/powerpc/platforms/86xx/gef_pic.h
@@ -0,0 +1,11 @@
1#ifndef __GEF_PIC_H__
2#define __GEF_PIC_H__
3
4#include <linux/init.h>
5
6void gef_pic_cascade(unsigned int, struct irq_desc *);
7unsigned int gef_pic_get_irq(void);
8void gef_pic_init(struct device_node *);
9
10#endif /* __GEF_PIC_H__ */
11
diff --git a/arch/powerpc/platforms/86xx/gef_sbc610.c b/arch/powerpc/platforms/86xx/gef_sbc610.c
new file mode 100644
index 000000000000..821c45fac18b
--- /dev/null
+++ b/arch/powerpc/platforms/86xx/gef_sbc610.c
@@ -0,0 +1,221 @@
1/*
2 * GE Fanuc SBC610 board support
3 *
4 * Author: Martyn Welch <martyn.welch@gefanuc.com>
5 *
6 * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * Based on: mpc86xx_hpcn.c (MPC86xx HPCN board specific routines)
14 * Copyright 2006 Freescale Semiconductor Inc.
15 *
16 * NEC fixup adapted from arch/mips/pci/fixup-lm2e.c
17 */
18
19#include <linux/stddef.h>
20#include <linux/kernel.h>
21#include <linux/pci.h>
22#include <linux/kdev_t.h>
23#include <linux/delay.h>
24#include <linux/seq_file.h>
25#include <linux/of_platform.h>
26
27#include <asm/system.h>
28#include <asm/time.h>
29#include <asm/machdep.h>
30#include <asm/pci-bridge.h>
31#include <asm/mpc86xx.h>
32#include <asm/prom.h>
33#include <mm/mmu_decl.h>
34#include <asm/udbg.h>
35
36#include <asm/mpic.h>
37
38#include <sysdev/fsl_pci.h>
39#include <sysdev/fsl_soc.h>
40
41#include "mpc86xx.h"
42#include "gef_pic.h"
43
44#undef DEBUG
45
46#ifdef DEBUG
47#define DBG (fmt...) do { printk(KERN_ERR "SBC610: " fmt); } while (0)
48#else
49#define DBG (fmt...) do { } while (0)
50#endif
51
52void __iomem *sbc610_regs;
53
54static void __init gef_sbc610_init_irq(void)
55{
56 struct device_node *cascade_node = NULL;
57
58 mpc86xx_init_irq();
59
60 /*
61 * There is a simple interrupt handler in the main FPGA, this needs
62 * to be cascaded into the MPIC
63 */
64 cascade_node = of_find_compatible_node(NULL, NULL, "gef,fpga-pic");
65 if (!cascade_node) {
66 printk(KERN_WARNING "SBC610: No FPGA PIC\n");
67 return;
68 }
69
70 gef_pic_init(cascade_node);
71 of_node_put(cascade_node);
72}
73
74static void __init gef_sbc610_setup_arch(void)
75{
76 struct device_node *regs;
77#ifdef CONFIG_PCI
78 struct device_node *np;
79
80 for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") {
81 fsl_add_bridge(np, 1);
82 }
83#endif
84
85 printk(KERN_INFO "GE Fanuc Intelligent Platforms SBC610 6U VPX SBC\n");
86
87#ifdef CONFIG_SMP
88 mpc86xx_smp_init();
89#endif
90
91 /* Remap basic board registers */
92 regs = of_find_compatible_node(NULL, NULL, "gef,fpga-regs");
93 if (regs) {
94 sbc610_regs = of_iomap(regs, 0);
95 if (sbc610_regs == NULL)
96 printk(KERN_WARNING "Unable to map board registers\n");
97 of_node_put(regs);
98 }
99}
100
101/* Return the PCB revision */
102static unsigned int gef_sbc610_get_pcb_rev(void)
103{
104 unsigned int reg;
105
106 reg = ioread32(sbc610_regs);
107 return (reg >> 8) & 0xff;
108}
109
110/* Return the board (software) revision */
111static unsigned int gef_sbc610_get_board_rev(void)
112{
113 unsigned int reg;
114
115 reg = ioread32(sbc610_regs);
116 return (reg >> 16) & 0xff;
117}
118
119/* Return the FPGA revision */
120static unsigned int gef_sbc610_get_fpga_rev(void)
121{
122 unsigned int reg;
123
124 reg = ioread32(sbc610_regs);
125 return (reg >> 24) & 0xf;
126}
127
128static void gef_sbc610_show_cpuinfo(struct seq_file *m)
129{
130 uint memsize = total_memory;
131 uint svid = mfspr(SPRN_SVR);
132
133 seq_printf(m, "Vendor\t\t: GE Fanuc Intelligent Platforms\n");
134
135 seq_printf(m, "Revision\t: %u%c\n", gef_sbc610_get_pcb_rev(),
136 ('A' + gef_sbc610_get_board_rev() - 1));
137 seq_printf(m, "FPGA Revision\t: %u\n", gef_sbc610_get_fpga_rev());
138
139 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
140 seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
141}
142
143static void __init gef_sbc610_nec_fixup(struct pci_dev *pdev)
144{
145 unsigned int val;
146
147 printk(KERN_INFO "Running NEC uPD720101 Fixup\n");
148
149 /* Ensure ports 1, 2, 3, 4 & 5 are enabled */
150 pci_read_config_dword(pdev, 0xe0, &val);
151 pci_write_config_dword(pdev, 0xe0, (val & ~7) | 0x5);
152
153 /* System clock is 48-MHz Oscillator and EHCI Enabled. */
154 pci_write_config_dword(pdev, 0xe4, 1 << 5);
155}
156DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,
157 gef_sbc610_nec_fixup);
158
159/*
160 * Called very early, device-tree isn't unflattened
161 *
162 * This function is called to determine whether the BSP is compatible with the
163 * supplied device-tree, which is assumed to be the correct one for the actual
164 * board. It is expected thati, in the future, a kernel may support multiple
165 * boards.
166 */
167static int __init gef_sbc610_probe(void)
168{
169 unsigned long root = of_get_flat_dt_root();
170
171 if (of_flat_dt_is_compatible(root, "gef,sbc610"))
172 return 1;
173
174 return 0;
175}
176
177static long __init mpc86xx_time_init(void)
178{
179 unsigned int temp;
180
181 /* Set the time base to zero */
182 mtspr(SPRN_TBWL, 0);
183 mtspr(SPRN_TBWU, 0);
184
185 temp = mfspr(SPRN_HID0);
186 temp |= HID0_TBEN;
187 mtspr(SPRN_HID0, temp);
188 asm volatile("isync");
189
190 return 0;
191}
192
193static __initdata struct of_device_id of_bus_ids[] = {
194 { .compatible = "simple-bus", },
195 {},
196};
197
198static int __init declare_of_platform_devices(void)
199{
200 printk(KERN_DEBUG "Probe platform devices\n");
201 of_platform_bus_probe(NULL, of_bus_ids, NULL);
202
203 return 0;
204}
205machine_device_initcall(gef_sbc610, declare_of_platform_devices);
206
207define_machine(gef_sbc610) {
208 .name = "GE Fanuc SBC610",
209 .probe = gef_sbc610_probe,
210 .setup_arch = gef_sbc610_setup_arch,
211 .init_IRQ = gef_sbc610_init_irq,
212 .show_cpuinfo = gef_sbc610_show_cpuinfo,
213 .get_irq = mpic_get_irq,
214 .restart = fsl_rstcr_restart,
215 .time_init = mpc86xx_time_init,
216 .calibrate_decr = generic_calibrate_decr,
217 .progress = udbg_progress,
218#ifdef CONFIG_PCI
219 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
220#endif
221};
diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
index 5eedb710896e..e8d54ac5292c 100644
--- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
+++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
@@ -238,7 +238,6 @@ static void __init mpc86xx_hpcd_setup_arch(void)
238 } 238 }
239#endif 239#endif
240#if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) 240#if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
241 preallocate_diu_videomemory();
242 diu_ops.get_pixel_format = mpc8610hpcd_get_pixel_format; 241 diu_ops.get_pixel_format = mpc8610hpcd_get_pixel_format;
243 diu_ops.set_gamma_table = mpc8610hpcd_set_gamma_table; 242 diu_ops.set_gamma_table = mpc8610hpcd_set_gamma_table;
244 diu_ops.set_monitor_port = mpc8610hpcd_set_monitor_port; 243 diu_ops.set_monitor_port = mpc8610hpcd_set_monitor_port;
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index f712d9c0991b..2672829a71dc 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -101,19 +101,11 @@ mpc86xx_hpcn_setup_arch(void)
101static void 101static void
102mpc86xx_hpcn_show_cpuinfo(struct seq_file *m) 102mpc86xx_hpcn_show_cpuinfo(struct seq_file *m)
103{ 103{
104 struct device_node *root;
105 uint memsize = total_memory; 104 uint memsize = total_memory;
106 const char *model = "";
107 uint svid = mfspr(SPRN_SVR); 105 uint svid = mfspr(SPRN_SVR);
108 106
109 seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n"); 107 seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
110 108
111 root = of_find_node_by_path("/");
112 if (root)
113 model = of_get_property(root, "model", NULL);
114 seq_printf(m, "Machine\t\t: %s\n", model);
115 of_node_put(root);
116
117 seq_printf(m, "SVR\t\t: 0x%x\n", svid); 109 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
118 seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024)); 110 seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
119} 111}
diff --git a/arch/powerpc/platforms/86xx/sbc8641d.c b/arch/powerpc/platforms/86xx/sbc8641d.c
index 00e6fad3b3ca..da677a74e2d1 100644
--- a/arch/powerpc/platforms/86xx/sbc8641d.c
+++ b/arch/powerpc/platforms/86xx/sbc8641d.c
@@ -63,19 +63,11 @@ sbc8641_setup_arch(void)
63static void 63static void
64sbc8641_show_cpuinfo(struct seq_file *m) 64sbc8641_show_cpuinfo(struct seq_file *m)
65{ 65{
66 struct device_node *root;
67 uint memsize = total_memory; 66 uint memsize = total_memory;
68 const char *model = "";
69 uint svid = mfspr(SPRN_SVR); 67 uint svid = mfspr(SPRN_SVR);
70 68
71 seq_printf(m, "Vendor\t\t: Wind River Systems\n"); 69 seq_printf(m, "Vendor\t\t: Wind River Systems\n");
72 70
73 root = of_find_node_by_path("/");
74 if (root)
75 model = of_get_property(root, "model", NULL);
76 seq_printf(m, "Machine\t\t: %s\n", model);
77 of_node_put(root);
78
79 seq_printf(m, "SVR\t\t: 0x%x\n", svid); 71 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
80 seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024)); 72 seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
81} 73}
diff --git a/arch/powerpc/platforms/8xx/Kconfig b/arch/powerpc/platforms/8xx/Kconfig
index 71d7562e190b..48a920a98e7b 100644
--- a/arch/powerpc/platforms/8xx/Kconfig
+++ b/arch/powerpc/platforms/8xx/Kconfig
@@ -49,6 +49,12 @@ config PPC_ADDER875
49 This enables support for the Analogue & Micro Adder 875 49 This enables support for the Analogue & Micro Adder 875
50 board. 50 board.
51 51
52config PPC_MGSUVD
53 bool "MGSUVD"
54 select CPM1
55 help
56 This enables support for the Keymile MGSUVD board.
57
52endchoice 58endchoice
53 59
54menu "Freescale Ethernet driver platform-specific options" 60menu "Freescale Ethernet driver platform-specific options"
diff --git a/arch/powerpc/platforms/8xx/Makefile b/arch/powerpc/platforms/8xx/Makefile
index 7b71d9c8fb45..bdbfd7496018 100644
--- a/arch/powerpc/platforms/8xx/Makefile
+++ b/arch/powerpc/platforms/8xx/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_MPC885ADS) += mpc885ads_setup.o
6obj-$(CONFIG_MPC86XADS) += mpc86xads_setup.o 6obj-$(CONFIG_MPC86XADS) += mpc86xads_setup.o
7obj-$(CONFIG_PPC_EP88XC) += ep88xc.o 7obj-$(CONFIG_PPC_EP88XC) += ep88xc.o
8obj-$(CONFIG_PPC_ADDER875) += adder875.o 8obj-$(CONFIG_PPC_ADDER875) += adder875.o
9obj-$(CONFIG_PPC_MGSUVD) += mgsuvd.o
diff --git a/arch/powerpc/platforms/8xx/mgsuvd.c b/arch/powerpc/platforms/8xx/mgsuvd.c
new file mode 100644
index 000000000000..ca3cb071772c
--- /dev/null
+++ b/arch/powerpc/platforms/8xx/mgsuvd.c
@@ -0,0 +1,92 @@
1/*
2 *
3 * Platform setup for the Keymile mgsuvd board
4 *
5 * Heiko Schocher <hs@denx.de>
6 *
7 * Copyright 2008 DENX Software Engineering GmbH
8 *
9 * This file is licensed under the terms of the GNU General Public License
10 * version 2. This program is licensed "as is" without any warranty of any
11 * kind, whether express or implied.
12 */
13
14#include <linux/ioport.h>
15#include <linux/of_platform.h>
16
17#include <asm/io.h>
18#include <asm/machdep.h>
19#include <asm/processor.h>
20#include <asm/cpm1.h>
21#include <asm/prom.h>
22#include <asm/fs_pd.h>
23
24#include "mpc8xx.h"
25
26struct cpm_pin {
27 int port, pin, flags;
28};
29
30static __initdata struct cpm_pin mgsuvd_pins[] = {
31 /* SMC1 */
32 {CPM_PORTB, 24, CPM_PIN_INPUT}, /* RX */
33 {CPM_PORTB, 25, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */
34
35 /* SCC3 */
36 {CPM_PORTA, 10, CPM_PIN_INPUT},
37 {CPM_PORTA, 11, CPM_PIN_INPUT},
38 {CPM_PORTA, 3, CPM_PIN_INPUT},
39 {CPM_PORTA, 2, CPM_PIN_INPUT},
40 {CPM_PORTC, 13, CPM_PIN_INPUT},
41};
42
43static void __init init_ioports(void)
44{
45 int i;
46
47 for (i = 0; i < ARRAY_SIZE(mgsuvd_pins); i++) {
48 struct cpm_pin *pin = &mgsuvd_pins[i];
49 cpm1_set_pin(pin->port, pin->pin, pin->flags);
50 }
51
52 setbits16(&mpc8xx_immr->im_ioport.iop_pcso, 0x300);
53 cpm1_clk_setup(CPM_CLK_SCC3, CPM_CLK5, CPM_CLK_RX);
54 cpm1_clk_setup(CPM_CLK_SCC3, CPM_CLK6, CPM_CLK_TX);
55 cpm1_clk_setup(CPM_CLK_SMC1, CPM_BRG1, CPM_CLK_RTX);
56}
57
58static void __init mgsuvd_setup_arch(void)
59{
60 cpm_reset();
61 init_ioports();
62}
63
64static __initdata struct of_device_id of_bus_ids[] = {
65 { .compatible = "simple-bus" },
66 {},
67};
68
69static int __init declare_of_platform_devices(void)
70{
71 of_platform_bus_probe(NULL, of_bus_ids, NULL);
72 return 0;
73}
74machine_device_initcall(mgsuvd, declare_of_platform_devices);
75
76static int __init mgsuvd_probe(void)
77{
78 unsigned long root = of_get_flat_dt_root();
79 return of_flat_dt_is_compatible(root, "keymile,mgsuvd");
80}
81
82define_machine(mgsuvd) {
83 .name = "MGSUVD",
84 .probe = mgsuvd_probe,
85 .setup_arch = mgsuvd_setup_arch,
86 .init_IRQ = mpc8xx_pics_init,
87 .get_irq = mpc8xx_get_irq,
88 .restart = mpc8xx_restart,
89 .calibrate_decr = mpc8xx_calibrate_decr,
90 .set_rtc_time = mpc8xx_set_rtc_time,
91 .get_rtc_time = mpc8xx_get_rtc_time,
92};
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index 4c900efa164e..47e956c871fe 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -239,7 +239,8 @@ config TAU_AVERAGE
239 If in doubt, say N here. 239 If in doubt, say N here.
240 240
241config QUICC_ENGINE 241config QUICC_ENGINE
242 bool 242 bool "Freescale QUICC Engine (QE) Support"
243 depends on FSL_SOC
243 select PPC_LIB_RHEAP 244 select PPC_LIB_RHEAP
244 select CRC32 245 select CRC32
245 help 246 help
@@ -248,6 +249,15 @@ config QUICC_ENGINE
248 Selecting this option means that you wish to build a kernel 249 Selecting this option means that you wish to build a kernel
249 for a machine with a QE coprocessor. 250 for a machine with a QE coprocessor.
250 251
252config QE_GPIO
253 bool "QE GPIO support"
254 depends on QUICC_ENGINE
255 select GENERIC_GPIO
256 select ARCH_REQUIRE_GPIOLIB
257 help
258 Say Y here if you're going to use hardware that connects to the
259 QE GPIOs.
260
251config CPM2 261config CPM2
252 bool "Enable support for the CPM2 (Communications Processor Module)" 262 bool "Enable support for the CPM2 (Communications Processor Module)"
253 depends on MPC85xx || 8260 263 depends on MPC85xx || 8260
@@ -293,4 +303,13 @@ config OF_RTC
293 303
294source "arch/powerpc/sysdev/bestcomm/Kconfig" 304source "arch/powerpc/sysdev/bestcomm/Kconfig"
295 305
306config MPC8xxx_GPIO
307 bool "MPC8xxx GPIO support"
308 depends on PPC_MPC831x || PPC_MPC834x || PPC_MPC837x || PPC_85xx || PPC_86xx
309 select GENERIC_GPIO
310 select ARCH_REQUIRE_GPIOLIB
311 help
312 Say Y here if you're going to use hardware that connects to the
313 MPC831x/834x/837x/8572/8610 GPIOs.
314
296endmenu 315endmenu
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 7f6512733862..548efa55c8fe 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -50,6 +50,7 @@ config 44x
50 select PPC_UDBG_16550 50 select PPC_UDBG_16550
51 select 4xx_SOC 51 select 4xx_SOC
52 select PPC_PCI_CHOICE 52 select PPC_PCI_CHOICE
53 select PHYS_64BIT
53 54
54config E200 55config E200
55 bool "Freescale e200" 56 bool "Freescale e200"
@@ -128,18 +129,19 @@ config FSL_EMB_PERFMON
128 129
129config PTE_64BIT 130config PTE_64BIT
130 bool 131 bool
131 depends on 44x || E500 132 depends on 44x || E500 || PPC_86xx
132 default y if 44x 133 default y if PHYS_64BIT
133 default y if E500 && PHYS_64BIT
134 134
135config PHYS_64BIT 135config PHYS_64BIT
136 bool 'Large physical address support' if E500 136 bool 'Large physical address support' if E500 || PPC_86xx
137 depends on 44x || E500 137 depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx
138 select RESOURCES_64BIT
139 default y if 44x
140 ---help--- 138 ---help---
141 This option enables kernel support for larger than 32-bit physical 139 This option enables kernel support for larger than 32-bit physical
142 addresses. This features is not be available on all e500 cores. 140 addresses. This feature may not be available on all cores.
141
142 If you have more than 3.5GB of RAM or so, you also need to enable
143 SWIOTLB under Kernel Options for this to work. The actual number
144 is platform-dependent.
143 145
144 If in doubt, say N here. 146 If in doubt, say N here.
145 147
diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c
index e06420af5fe9..ef92e7146215 100644
--- a/arch/powerpc/platforms/cell/iommu.c
+++ b/arch/powerpc/platforms/cell/iommu.c
@@ -556,11 +556,11 @@ static struct iommu_table *cell_get_iommu_table(struct device *dev)
556 * node's iommu. We -might- do something smarter later though it may 556 * node's iommu. We -might- do something smarter later though it may
557 * never be necessary 557 * never be necessary
558 */ 558 */
559 iommu = cell_iommu_for_node(archdata->numa_node); 559 iommu = cell_iommu_for_node(dev_to_node(dev));
560 if (iommu == NULL || list_empty(&iommu->windows)) { 560 if (iommu == NULL || list_empty(&iommu->windows)) {
561 printk(KERN_ERR "iommu: missing iommu for %s (node %d)\n", 561 printk(KERN_ERR "iommu: missing iommu for %s (node %d)\n",
562 archdata->of_node ? archdata->of_node->full_name : "?", 562 archdata->of_node ? archdata->of_node->full_name : "?",
563 archdata->numa_node); 563 dev_to_node(dev));
564 return NULL; 564 return NULL;
565 } 565 }
566 window = list_entry(iommu->windows.next, struct iommu_window, list); 566 window = list_entry(iommu->windows.next, struct iommu_window, list);
@@ -577,7 +577,7 @@ static void *dma_fixed_alloc_coherent(struct device *dev, size_t size,
577 return iommu_alloc_coherent(dev, cell_get_iommu_table(dev), 577 return iommu_alloc_coherent(dev, cell_get_iommu_table(dev),
578 size, dma_handle, 578 size, dma_handle,
579 device_to_mask(dev), flag, 579 device_to_mask(dev), flag,
580 dev->archdata.numa_node); 580 dev_to_node(dev));
581 else 581 else
582 return dma_direct_ops.alloc_coherent(dev, size, dma_handle, 582 return dma_direct_ops.alloc_coherent(dev, size, dma_handle,
583 flag); 583 flag);
diff --git a/arch/powerpc/platforms/cell/spufs/inode.c b/arch/powerpc/platforms/cell/spufs/inode.c
index 690ca7b0dcf6..cb85d237e492 100644
--- a/arch/powerpc/platforms/cell/spufs/inode.c
+++ b/arch/powerpc/platforms/cell/spufs/inode.c
@@ -298,8 +298,8 @@ spufs_mkdir(struct inode *dir, struct dentry *dentry, unsigned int flags,
298 298
299 d_instantiate(dentry, inode); 299 d_instantiate(dentry, inode);
300 dget(dentry); 300 dget(dentry);
301 dir->i_nlink++; 301 inc_nlink(dir);
302 dentry->d_inode->i_nlink++; 302 inc_nlink(dentry->d_inode);
303 goto out; 303 goto out;
304 304
305out_free_ctx: 305out_free_ctx:
@@ -496,6 +496,8 @@ spufs_create_context(struct inode *inode, struct dentry *dentry,
496 ret = spufs_context_open(dget(dentry), mntget(mnt)); 496 ret = spufs_context_open(dget(dentry), mntget(mnt));
497 if (ret < 0) { 497 if (ret < 0) {
498 WARN_ON(spufs_rmdir(inode, dentry)); 498 WARN_ON(spufs_rmdir(inode, dentry));
499 if (affinity)
500 mutex_unlock(&gang->aff_mutex);
499 mutex_unlock(&inode->i_mutex); 501 mutex_unlock(&inode->i_mutex);
500 spu_forget(SPUFS_I(dentry->d_inode)->i_ctx); 502 spu_forget(SPUFS_I(dentry->d_inode)->i_ctx);
501 goto out; 503 goto out;
@@ -538,8 +540,8 @@ spufs_mkgang(struct inode *dir, struct dentry *dentry, int mode)
538 inode->i_fop = &simple_dir_operations; 540 inode->i_fop = &simple_dir_operations;
539 541
540 d_instantiate(dentry, inode); 542 d_instantiate(dentry, inode);
541 dir->i_nlink++; 543 inc_nlink(dir);
542 dentry->d_inode->i_nlink++; 544 inc_nlink(dentry->d_inode);
543 return ret; 545 return ret;
544 546
545out_iput: 547out_iput:
@@ -659,7 +661,7 @@ enum {
659 Opt_uid, Opt_gid, Opt_mode, Opt_debug, Opt_err, 661 Opt_uid, Opt_gid, Opt_mode, Opt_debug, Opt_err,
660}; 662};
661 663
662static match_table_t spufs_tokens = { 664static const match_table_t spufs_tokens = {
663 { Opt_uid, "uid=%d" }, 665 { Opt_uid, "uid=%d" },
664 { Opt_gid, "gid=%d" }, 666 { Opt_gid, "gid=%d" },
665 { Opt_mode, "mode=%o" }, 667 { Opt_mode, "mode=%o" },
@@ -755,6 +757,7 @@ spufs_create_root(struct super_block *sb, void *data)
755 inode->i_op = &simple_dir_inode_operations; 757 inode->i_op = &simple_dir_inode_operations;
756 inode->i_fop = &simple_dir_operations; 758 inode->i_fop = &simple_dir_operations;
757 SPUFS_I(inode)->i_ctx = NULL; 759 SPUFS_I(inode)->i_ctx = NULL;
760 inc_nlink(inode);
758 761
759 ret = -EINVAL; 762 ret = -EINVAL;
760 if (!spufs_parse_options(sb, data, inode)) 763 if (!spufs_parse_options(sb, data, inode))
diff --git a/arch/powerpc/platforms/chrp/pci.c b/arch/powerpc/platforms/chrp/pci.c
index 768c262b9368..d3cde6b9d2df 100644
--- a/arch/powerpc/platforms/chrp/pci.c
+++ b/arch/powerpc/platforms/chrp/pci.c
@@ -260,13 +260,13 @@ chrp_find_bridges(void)
260 dev->full_name); 260 dev->full_name);
261 continue; 261 continue;
262 } 262 }
263 hose->first_busno = bus_range[0]; 263 hose->first_busno = hose->self_busno = bus_range[0];
264 hose->last_busno = bus_range[1]; 264 hose->last_busno = bus_range[1];
265 265
266 model = of_get_property(dev, "model", NULL); 266 model = of_get_property(dev, "model", NULL);
267 if (model == NULL) 267 if (model == NULL)
268 model = "<none>"; 268 model = "<none>";
269 if (of_device_is_compatible(dev, "IBM,python")) { 269 if (strncmp(model, "IBM, Python", 11) == 0) {
270 setup_python(hose, dev); 270 setup_python(hose, dev);
271 } else if (is_mot 271 } else if (is_mot
272 || strncmp(model, "Motorola, Grackle", 17) == 0) { 272 || strncmp(model, "Motorola, Grackle", 17) == 0) {
diff --git a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c
index 1ba7ce5aafae..272d79a8d289 100644
--- a/arch/powerpc/platforms/chrp/setup.c
+++ b/arch/powerpc/platforms/chrp/setup.c
@@ -17,7 +17,6 @@
17#include <linux/ptrace.h> 17#include <linux/ptrace.h>
18#include <linux/slab.h> 18#include <linux/slab.h>
19#include <linux/user.h> 19#include <linux/user.h>
20#include <linux/a.out.h>
21#include <linux/tty.h> 20#include <linux/tty.h>
22#include <linux/major.h> 21#include <linux/major.h>
23#include <linux/interrupt.h> 22#include <linux/interrupt.h>
diff --git a/arch/powerpc/platforms/chrp/time.c b/arch/powerpc/platforms/chrp/time.c
index 96d1e4b3c493..054dfe5b8e77 100644
--- a/arch/powerpc/platforms/chrp/time.c
+++ b/arch/powerpc/platforms/chrp/time.c
@@ -94,12 +94,12 @@ int chrp_set_rtc_time(struct rtc_time *tmarg)
94 chrp_cmos_clock_write((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT); 94 chrp_cmos_clock_write((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
95 95
96 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { 96 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
97 BIN_TO_BCD(tm.tm_sec); 97 tm.tm_sec = bin2bcd(tm.tm_sec);
98 BIN_TO_BCD(tm.tm_min); 98 tm.tm_min = bin2bcd(tm.tm_min);
99 BIN_TO_BCD(tm.tm_hour); 99 tm.tm_hour = bin2bcd(tm.tm_hour);
100 BIN_TO_BCD(tm.tm_mon); 100 tm.tm_mon = bin2bcd(tm.tm_mon);
101 BIN_TO_BCD(tm.tm_mday); 101 tm.tm_mday = bin2bcd(tm.tm_mday);
102 BIN_TO_BCD(tm.tm_year); 102 tm.tm_year = bin2bcd(tm.tm_year);
103 } 103 }
104 chrp_cmos_clock_write(tm.tm_sec,RTC_SECONDS); 104 chrp_cmos_clock_write(tm.tm_sec,RTC_SECONDS);
105 chrp_cmos_clock_write(tm.tm_min,RTC_MINUTES); 105 chrp_cmos_clock_write(tm.tm_min,RTC_MINUTES);
@@ -136,12 +136,12 @@ void chrp_get_rtc_time(struct rtc_time *tm)
136 } while (sec != chrp_cmos_clock_read(RTC_SECONDS)); 136 } while (sec != chrp_cmos_clock_read(RTC_SECONDS));
137 137
138 if (!(chrp_cmos_clock_read(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { 138 if (!(chrp_cmos_clock_read(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
139 BCD_TO_BIN(sec); 139 sec = bcd2bin(sec);
140 BCD_TO_BIN(min); 140 min = bcd2bin(min);
141 BCD_TO_BIN(hour); 141 hour = bcd2bin(hour);
142 BCD_TO_BIN(day); 142 day = bcd2bin(day);
143 BCD_TO_BIN(mon); 143 mon = bcd2bin(mon);
144 BCD_TO_BIN(year); 144 year = bcd2bin(year);
145 } 145 }
146 if (year < 70) 146 if (year < 70)
147 year += 100; 147 year += 100;
diff --git a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
index 84e2d78b9a62..7a2ba39d7811 100644
--- a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
+++ b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
@@ -164,7 +164,6 @@ static void __init mpc7448_hpc2_init_IRQ(void)
164void mpc7448_hpc2_show_cpuinfo(struct seq_file *m) 164void mpc7448_hpc2_show_cpuinfo(struct seq_file *m)
165{ 165{
166 seq_printf(m, "vendor\t\t: Freescale Semiconductor\n"); 166 seq_printf(m, "vendor\t\t: Freescale Semiconductor\n");
167 seq_printf(m, "machine\t\t: MPC7448hpc2\n");
168} 167}
169 168
170void mpc7448_hpc2_restart(char *cmd) 169void mpc7448_hpc2_restart(char *cmd)
diff --git a/arch/powerpc/platforms/iseries/exception.S b/arch/powerpc/platforms/iseries/exception.S
index 8ff330d026ca..2f581521eb9b 100644
--- a/arch/powerpc/platforms/iseries/exception.S
+++ b/arch/powerpc/platforms/iseries/exception.S
@@ -38,12 +38,13 @@
38 38
39 .globl system_reset_iSeries 39 .globl system_reset_iSeries
40system_reset_iSeries: 40system_reset_iSeries:
41 bl .relative_toc
41 mfspr r13,SPRN_SPRG3 /* Get alpaca address */ 42 mfspr r13,SPRN_SPRG3 /* Get alpaca address */
42 LOAD_REG_IMMEDIATE(r23, alpaca) 43 LOAD_REG_ADDR(r23, alpaca)
43 li r0,ALPACA_SIZE 44 li r0,ALPACA_SIZE
44 sub r23,r13,r23 45 sub r23,r13,r23
45 divdu r23,r23,r0 /* r23 has cpu number */ 46 divdu r23,r23,r0 /* r23 has cpu number */
46 LOAD_REG_IMMEDIATE(r13, paca) 47 LOAD_REG_ADDR(r13, paca)
47 mulli r0,r23,PACA_SIZE 48 mulli r0,r23,PACA_SIZE
48 add r13,r13,r0 49 add r13,r13,r0
49 mtspr SPRN_SPRG3,r13 /* Save it away for the future */ 50 mtspr SPRN_SPRG3,r13 /* Save it away for the future */
@@ -60,14 +61,14 @@ system_reset_iSeries:
60 mtspr SPRN_CTRLT,r4 61 mtspr SPRN_CTRLT,r4
61 62
62/* Spin on __secondary_hold_spinloop until it is updated by the boot cpu. */ 63/* Spin on __secondary_hold_spinloop until it is updated by the boot cpu. */
63/* In the UP case we'll yeild() later, and we will not access the paca anyway */ 64/* In the UP case we'll yield() later, and we will not access the paca anyway */
64#ifdef CONFIG_SMP 65#ifdef CONFIG_SMP
651: 661:
66 HMT_LOW 67 HMT_LOW
67 LOAD_REG_IMMEDIATE(r23, __secondary_hold_spinloop) 68 LOAD_REG_ADDR(r23, __secondary_hold_spinloop)
68 ld r23,0(r23) 69 ld r23,0(r23)
69 sync 70 sync
70 LOAD_REG_IMMEDIATE(r3,current_set) 71 LOAD_REG_ADDR(r3,current_set)
71 sldi r28,r24,3 /* get current_set[cpu#] */ 72 sldi r28,r24,3 /* get current_set[cpu#] */
72 ldx r3,r3,r28 73 ldx r3,r3,r28
73 addi r1,r3,THREAD_SIZE 74 addi r1,r3,THREAD_SIZE
@@ -90,7 +91,7 @@ system_reset_iSeries:
90 lbz r23,PACAPROCSTART(r13) /* Test if this processor 91 lbz r23,PACAPROCSTART(r13) /* Test if this processor
91 * should start */ 92 * should start */
92 sync 93 sync
93 LOAD_REG_IMMEDIATE(r3,current_set) 94 LOAD_REG_ADDR(r3,current_set)
94 sldi r28,r24,3 /* get current_set[cpu#] */ 95 sldi r28,r24,3 /* get current_set[cpu#] */
95 ldx r3,r3,r28 96 ldx r3,r3,r28
96 addi r1,r3,THREAD_SIZE 97 addi r1,r3,THREAD_SIZE
@@ -255,8 +256,8 @@ hardware_interrupt_iSeries_masked:
255 256
256_INIT_STATIC(__start_initialization_iSeries) 257_INIT_STATIC(__start_initialization_iSeries)
257 /* Clear out the BSS */ 258 /* Clear out the BSS */
258 LOAD_REG_IMMEDIATE(r11,__bss_stop) 259 LOAD_REG_ADDR(r11,__bss_stop)
259 LOAD_REG_IMMEDIATE(r8,__bss_start) 260 LOAD_REG_ADDR(r8,__bss_start)
260 sub r11,r11,r8 /* bss size */ 261 sub r11,r11,r8 /* bss size */
261 addi r11,r11,7 /* round up to an even double word */ 262 addi r11,r11,7 /* round up to an even double word */
262 rldicl. r11,r11,61,3 /* shift right by 3 */ 263 rldicl. r11,r11,61,3 /* shift right by 3 */
@@ -267,15 +268,11 @@ _INIT_STATIC(__start_initialization_iSeries)
2673: stdu r0,8(r8) 2683: stdu r0,8(r8)
268 bdnz 3b 269 bdnz 3b
2694: 2704:
270 LOAD_REG_IMMEDIATE(r1,init_thread_union) 271 LOAD_REG_ADDR(r1,init_thread_union)
271 addi r1,r1,THREAD_SIZE 272 addi r1,r1,THREAD_SIZE
272 li r0,0 273 li r0,0
273 stdu r0,-STACK_FRAME_OVERHEAD(r1) 274 stdu r0,-STACK_FRAME_OVERHEAD(r1)
274 275
275 LOAD_REG_IMMEDIATE(r2,__toc_start)
276 addi r2,r2,0x4000
277 addi r2,r2,0x4000
278
279 bl .iSeries_early_setup 276 bl .iSeries_early_setup
280 bl .early_setup 277 bl .early_setup
281 278
diff --git a/arch/powerpc/platforms/iseries/mf.c b/arch/powerpc/platforms/iseries/mf.c
index 731d7b157749..3689c2413d24 100644
--- a/arch/powerpc/platforms/iseries/mf.c
+++ b/arch/powerpc/platforms/iseries/mf.c
@@ -722,13 +722,13 @@ static int mf_set_rtc(struct rtc_time *tm)
722 day = tm->tm_mday; 722 day = tm->tm_mday;
723 mon = tm->tm_mon + 1; 723 mon = tm->tm_mon + 1;
724 724
725 BIN_TO_BCD(sec); 725 sec = bin2bcd(sec);
726 BIN_TO_BCD(min); 726 min = bin2bcd(min);
727 BIN_TO_BCD(hour); 727 hour = bin2bcd(hour);
728 BIN_TO_BCD(mon); 728 mon = bin2bcd(mon);
729 BIN_TO_BCD(day); 729 day = bin2bcd(day);
730 BIN_TO_BCD(y1); 730 y1 = bin2bcd(y1);
731 BIN_TO_BCD(y2); 731 y2 = bin2bcd(y2);
732 732
733 memset(ce_time, 0, sizeof(ce_time)); 733 memset(ce_time, 0, sizeof(ce_time));
734 ce_time[3] = 0x41; 734 ce_time[3] = 0x41;
@@ -777,12 +777,12 @@ static int rtc_set_tm(int rc, u8 *ce_msg, struct rtc_time *tm)
777 u8 day = ce_msg[10]; 777 u8 day = ce_msg[10];
778 u8 mon = ce_msg[11]; 778 u8 mon = ce_msg[11];
779 779
780 BCD_TO_BIN(sec); 780 sec = bcd2bin(sec);
781 BCD_TO_BIN(min); 781 min = bcd2bin(min);
782 BCD_TO_BIN(hour); 782 hour = bcd2bin(hour);
783 BCD_TO_BIN(day); 783 day = bcd2bin(day);
784 BCD_TO_BIN(mon); 784 mon = bcd2bin(mon);
785 BCD_TO_BIN(year); 785 year = bcd2bin(year);
786 786
787 if (year <= 69) 787 if (year <= 69)
788 year += 100; 788 year += 100;
diff --git a/arch/powerpc/platforms/maple/setup.c b/arch/powerpc/platforms/maple/setup.c
index 364714757cf1..d4c61c3c9669 100644
--- a/arch/powerpc/platforms/maple/setup.c
+++ b/arch/powerpc/platforms/maple/setup.c
@@ -23,7 +23,6 @@
23#include <linux/ptrace.h> 23#include <linux/ptrace.h>
24#include <linux/slab.h> 24#include <linux/slab.h>
25#include <linux/user.h> 25#include <linux/user.h>
26#include <linux/a.out.h>
27#include <linux/tty.h> 26#include <linux/tty.h>
28#include <linux/string.h> 27#include <linux/string.h>
29#include <linux/delay.h> 28#include <linux/delay.h>
diff --git a/arch/powerpc/platforms/maple/time.c b/arch/powerpc/platforms/maple/time.c
index 53bca132fb48..eac569dee27c 100644
--- a/arch/powerpc/platforms/maple/time.c
+++ b/arch/powerpc/platforms/maple/time.c
@@ -68,12 +68,12 @@ void maple_get_rtc_time(struct rtc_time *tm)
68 68
69 if (!(maple_clock_read(RTC_CONTROL) & RTC_DM_BINARY) 69 if (!(maple_clock_read(RTC_CONTROL) & RTC_DM_BINARY)
70 || RTC_ALWAYS_BCD) { 70 || RTC_ALWAYS_BCD) {
71 BCD_TO_BIN(tm->tm_sec); 71 tm->tm_sec = bcd2bin(tm->tm_sec);
72 BCD_TO_BIN(tm->tm_min); 72 tm->tm_min = bcd2bin(tm->tm_min);
73 BCD_TO_BIN(tm->tm_hour); 73 tm->tm_hour = bcd2bin(tm->tm_hour);
74 BCD_TO_BIN(tm->tm_mday); 74 tm->tm_mday = bcd2bin(tm->tm_mday);
75 BCD_TO_BIN(tm->tm_mon); 75 tm->tm_mon = bcd2bin(tm->tm_mon);
76 BCD_TO_BIN(tm->tm_year); 76 tm->tm_year = bcd2bin(tm->tm_year);
77 } 77 }
78 if ((tm->tm_year + 1900) < 1970) 78 if ((tm->tm_year + 1900) < 1970)
79 tm->tm_year += 100; 79 tm->tm_year += 100;
@@ -104,12 +104,12 @@ int maple_set_rtc_time(struct rtc_time *tm)
104 year = tm->tm_year; 104 year = tm->tm_year;
105 105
106 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { 106 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
107 BIN_TO_BCD(sec); 107 sec = bin2bcd(sec);
108 BIN_TO_BCD(min); 108 min = bin2bcd(min);
109 BIN_TO_BCD(hour); 109 hour = bin2bcd(hour);
110 BIN_TO_BCD(mon); 110 mon = bin2bcd(mon);
111 BIN_TO_BCD(mday); 111 mday = bin2bcd(mday);
112 BIN_TO_BCD(year); 112 year = bin2bcd(year);
113 } 113 }
114 maple_clock_write(sec, RTC_SECONDS); 114 maple_clock_write(sec, RTC_SECONDS);
115 maple_clock_write(min, RTC_MINUTES); 115 maple_clock_write(min, RTC_MINUTES);
diff --git a/arch/powerpc/platforms/powermac/feature.c b/arch/powerpc/platforms/powermac/feature.c
index 5169ecc37123..e6c0040ee797 100644
--- a/arch/powerpc/platforms/powermac/feature.c
+++ b/arch/powerpc/platforms/powermac/feature.c
@@ -2677,7 +2677,7 @@ static void __init probe_one_macio(const char *name, const char *compat, int typ
2677 macio_chips[i].of_node = node; 2677 macio_chips[i].of_node = node;
2678 macio_chips[i].type = type; 2678 macio_chips[i].type = type;
2679 macio_chips[i].base = base; 2679 macio_chips[i].base = base;
2680 macio_chips[i].flags = MACIO_FLAG_SCCB_ON | MACIO_FLAG_SCCB_ON; 2680 macio_chips[i].flags = MACIO_FLAG_SCCA_ON | MACIO_FLAG_SCCB_ON;
2681 macio_chips[i].name = macio_names[type]; 2681 macio_chips[i].name = macio_names[type];
2682 revp = of_get_property(node, "revision-id", NULL); 2682 revp = of_get_property(node, "revision-id", NULL);
2683 if (revp) 2683 if (revp)
diff --git a/arch/powerpc/platforms/powermac/setup.c b/arch/powerpc/platforms/powermac/setup.c
index 88ccf3a08a9c..82c14d203d8b 100644
--- a/arch/powerpc/platforms/powermac/setup.c
+++ b/arch/powerpc/platforms/powermac/setup.c
@@ -33,7 +33,6 @@
33#include <linux/ptrace.h> 33#include <linux/ptrace.h>
34#include <linux/slab.h> 34#include <linux/slab.h>
35#include <linux/user.h> 35#include <linux/user.h>
36#include <linux/a.out.h>
37#include <linux/tty.h> 36#include <linux/tty.h>
38#include <linux/string.h> 37#include <linux/string.h>
39#include <linux/delay.h> 38#include <linux/delay.h>
diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c
index 4ae3d00e0bdd..40f72c2a4699 100644
--- a/arch/powerpc/platforms/powermac/smp.c
+++ b/arch/powerpc/platforms/powermac/smp.c
@@ -787,7 +787,7 @@ static void __devinit smp_core99_kick_cpu(int nr)
787{ 787{
788 unsigned int save_vector; 788 unsigned int save_vector;
789 unsigned long target, flags; 789 unsigned long target, flags;
790 unsigned int *vector = (unsigned int *)(KERNELBASE+0x100); 790 unsigned int *vector = (unsigned int *)(PAGE_OFFSET+0x100);
791 791
792 if (nr < 0 || nr > 3) 792 if (nr < 0 || nr > 3)
793 return; 793 return;
@@ -801,7 +801,7 @@ static void __devinit smp_core99_kick_cpu(int nr)
801 save_vector = *vector; 801 save_vector = *vector;
802 802
803 /* Setup fake reset vector that does 803 /* Setup fake reset vector that does
804 * b __secondary_start_pmac_0 + nr*8 - KERNELBASE 804 * b __secondary_start_pmac_0 + nr*8
805 */ 805 */
806 target = (unsigned long) __secondary_start_pmac_0 + nr * 8; 806 target = (unsigned long) __secondary_start_pmac_0 + nr * 8;
807 patch_branch(vector, target, BRANCH_SET_LINK); 807 patch_branch(vector, target, BRANCH_SET_LINK);
diff --git a/arch/powerpc/platforms/powermac/time.c b/arch/powerpc/platforms/powermac/time.c
index bbbefd64ab59..59eb840d8ce2 100644
--- a/arch/powerpc/platforms/powermac/time.c
+++ b/arch/powerpc/platforms/powermac/time.c
@@ -93,11 +93,14 @@ static void to_rtc_time(unsigned long now, struct rtc_time *tm)
93} 93}
94#endif 94#endif
95 95
96#if defined(CONFIG_ADB_CUDA) || defined(CONFIG_ADB_PMU) || \
97 defined(CONFIG_PMAC_SMU)
96static unsigned long from_rtc_time(struct rtc_time *tm) 98static unsigned long from_rtc_time(struct rtc_time *tm)
97{ 99{
98 return mktime(tm->tm_year+1900, tm->tm_mon+1, tm->tm_mday, 100 return mktime(tm->tm_year+1900, tm->tm_mon+1, tm->tm_mday,
99 tm->tm_hour, tm->tm_min, tm->tm_sec); 101 tm->tm_hour, tm->tm_min, tm->tm_sec);
100} 102}
103#endif
101 104
102#ifdef CONFIG_ADB_CUDA 105#ifdef CONFIG_ADB_CUDA
103static unsigned long cuda_get_time(void) 106static unsigned long cuda_get_time(void)
diff --git a/arch/powerpc/platforms/ps3/system-bus.c b/arch/powerpc/platforms/ps3/system-bus.c
index 280ee88cb0b0..a789bf58ca8b 100644
--- a/arch/powerpc/platforms/ps3/system-bus.c
+++ b/arch/powerpc/platforms/ps3/system-bus.c
@@ -762,7 +762,7 @@ int ps3_system_bus_device_register(struct ps3_system_bus_device *dev)
762 }; 762 };
763 763
764 dev->core.archdata.of_node = NULL; 764 dev->core.archdata.of_node = NULL;
765 dev->core.archdata.numa_node = 0; 765 set_dev_node(&dev->core, 0);
766 766
767 pr_debug("%s:%d add %s\n", __func__, __LINE__, dev->core.bus_id); 767 pr_debug("%s:%d add %s\n", __func__, __LINE__, dev->core.bus_id);
768 768
diff --git a/arch/powerpc/platforms/pseries/cmm.c b/arch/powerpc/platforms/pseries/cmm.c
index 38fe32a7cc70..5cd4d2761620 100644
--- a/arch/powerpc/platforms/pseries/cmm.c
+++ b/arch/powerpc/platforms/pseries/cmm.c
@@ -121,7 +121,7 @@ static long cmm_alloc_pages(long nr)
121 npa = (struct cmm_page_array *)__get_free_page(GFP_NOIO | __GFP_NOWARN | 121 npa = (struct cmm_page_array *)__get_free_page(GFP_NOIO | __GFP_NOWARN |
122 __GFP_NORETRY | __GFP_NOMEMALLOC); 122 __GFP_NORETRY | __GFP_NOMEMALLOC);
123 if (!npa) { 123 if (!npa) {
124 pr_info("%s: Can not allocate new page list\n", __FUNCTION__); 124 pr_info("%s: Can not allocate new page list\n", __func__);
125 free_page(addr); 125 free_page(addr);
126 break; 126 break;
127 } 127 }
@@ -138,7 +138,7 @@ static long cmm_alloc_pages(long nr)
138 } 138 }
139 139
140 if ((rc = plpar_page_set_loaned(__pa(addr)))) { 140 if ((rc = plpar_page_set_loaned(__pa(addr)))) {
141 pr_err("%s: Can not set page to loaned. rc=%ld\n", __FUNCTION__, rc); 141 pr_err("%s: Can not set page to loaned. rc=%ld\n", __func__, rc);
142 spin_unlock(&cmm_lock); 142 spin_unlock(&cmm_lock);
143 free_page(addr); 143 free_page(addr);
144 break; 144 break;
diff --git a/arch/powerpc/platforms/pseries/eeh_driver.c b/arch/powerpc/platforms/pseries/eeh_driver.c
index 8c1ca477c52c..0ad56ff7b4a0 100644
--- a/arch/powerpc/platforms/pseries/eeh_driver.c
+++ b/arch/powerpc/platforms/pseries/eeh_driver.c
@@ -41,7 +41,7 @@ static inline const char * pcid_name (struct pci_dev *pdev)
41 return ""; 41 return "";
42} 42}
43 43
44#ifdef DEBUG 44#if 0
45static void print_device_node_tree(struct pci_dn *pdn, int dent) 45static void print_device_node_tree(struct pci_dn *pdn, int dent)
46{ 46{
47 int i; 47 int i;
diff --git a/arch/powerpc/platforms/pseries/hotplug-memory.c b/arch/powerpc/platforms/pseries/hotplug-memory.c
index a1a368dd2d99..140d02a5232a 100644
--- a/arch/powerpc/platforms/pseries/hotplug-memory.c
+++ b/arch/powerpc/platforms/pseries/hotplug-memory.c
@@ -21,7 +21,7 @@ static int pseries_remove_lmb(unsigned long base, unsigned int lmb_size)
21 struct zone *zone; 21 struct zone *zone;
22 int ret; 22 int ret;
23 23
24 start_pfn = base >> PFN_SECTION_SHIFT; 24 start_pfn = base >> PAGE_SHIFT;
25 zone = page_zone(pfn_to_page(start_pfn)); 25 zone = page_zone(pfn_to_page(start_pfn));
26 26
27 /* 27 /*
diff --git a/arch/powerpc/platforms/pseries/reconfig.c b/arch/powerpc/platforms/pseries/reconfig.c
index 7637bd38c795..c591a25b0b0d 100644
--- a/arch/powerpc/platforms/pseries/reconfig.c
+++ b/arch/powerpc/platforms/pseries/reconfig.c
@@ -466,11 +466,11 @@ static int do_update_property(char *buf, size_t bufsize)
466 else 466 else
467 action = PSERIES_DRCONF_MEM_REMOVE; 467 action = PSERIES_DRCONF_MEM_REMOVE;
468 468
469 blocking_notifier_call_chain(&pSeries_reconfig_chain, 469 rc = blocking_notifier_call_chain(&pSeries_reconfig_chain,
470 action, value); 470 action, value);
471 } 471 }
472 472
473 return 0; 473 return rc;
474} 474}
475 475
476/** 476/**
diff --git a/arch/powerpc/platforms/pseries/rtasd.c b/arch/powerpc/platforms/pseries/rtasd.c
index c9ffd8c225f1..f4e55be2eea9 100644
--- a/arch/powerpc/platforms/pseries/rtasd.c
+++ b/arch/powerpc/platforms/pseries/rtasd.c
@@ -295,19 +295,29 @@ static ssize_t rtas_log_read(struct file * file, char __user * buf,
295 if (!tmp) 295 if (!tmp)
296 return -ENOMEM; 296 return -ENOMEM;
297 297
298
299 spin_lock_irqsave(&rtasd_log_lock, s); 298 spin_lock_irqsave(&rtasd_log_lock, s);
300 /* if it's 0, then we know we got the last one (the one in NVRAM) */ 299 /* if it's 0, then we know we got the last one (the one in NVRAM) */
301 if (rtas_log_size == 0 && logging_enabled) 300 while (rtas_log_size == 0) {
302 nvram_clear_error_log(); 301 if (file->f_flags & O_NONBLOCK) {
303 spin_unlock_irqrestore(&rtasd_log_lock, s); 302 spin_unlock_irqrestore(&rtasd_log_lock, s);
303 error = -EAGAIN;
304 goto out;
305 }
304 306
307 if (!logging_enabled) {
308 spin_unlock_irqrestore(&rtasd_log_lock, s);
309 error = -ENODATA;
310 goto out;
311 }
312 nvram_clear_error_log();
305 313
306 error = wait_event_interruptible(rtas_log_wait, rtas_log_size); 314 spin_unlock_irqrestore(&rtasd_log_lock, s);
307 if (error) 315 error = wait_event_interruptible(rtas_log_wait, rtas_log_size);
308 goto out; 316 if (error)
317 goto out;
318 spin_lock_irqsave(&rtasd_log_lock, s);
319 }
309 320
310 spin_lock_irqsave(&rtasd_log_lock, s);
311 offset = rtas_error_log_buffer_max * (rtas_log_start & LOG_NUMBER_MASK); 321 offset = rtas_error_log_buffer_max * (rtas_log_start & LOG_NUMBER_MASK);
312 memcpy(tmp, &rtas_log_buf[offset], count); 322 memcpy(tmp, &rtas_log_buf[offset], count);
313 323
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c
index 7b01d67b4e48..ec341707e41b 100644
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -25,7 +25,6 @@
25#include <linux/unistd.h> 25#include <linux/unistd.h>
26#include <linux/slab.h> 26#include <linux/slab.h>
27#include <linux/user.h> 27#include <linux/user.h>
28#include <linux/a.out.h>
29#include <linux/tty.h> 28#include <linux/tty.h>
30#include <linux/major.h> 29#include <linux/major.h>
31#include <linux/interrupt.h> 30#include <linux/interrupt.h>
diff --git a/arch/powerpc/platforms/pseries/smp.c b/arch/powerpc/platforms/pseries/smp.c
index 9d8f8c84ab89..e00f96baa381 100644
--- a/arch/powerpc/platforms/pseries/smp.c
+++ b/arch/powerpc/platforms/pseries/smp.c
@@ -37,7 +37,6 @@
37#include <asm/paca.h> 37#include <asm/paca.h>
38#include <asm/time.h> 38#include <asm/time.h>
39#include <asm/machdep.h> 39#include <asm/machdep.h>
40#include "xics.h"
41#include <asm/cputable.h> 40#include <asm/cputable.h>
42#include <asm/firmware.h> 41#include <asm/firmware.h>
43#include <asm/system.h> 42#include <asm/system.h>
@@ -49,6 +48,7 @@
49 48
50#include "plpar_wrappers.h" 49#include "plpar_wrappers.h"
51#include "pseries.h" 50#include "pseries.h"
51#include "xics.h"
52 52
53 53
54/* 54/*
@@ -105,36 +105,6 @@ static inline int __devinit smp_startup_cpu(unsigned int lcpu)
105} 105}
106 106
107#ifdef CONFIG_XICS 107#ifdef CONFIG_XICS
108static inline void smp_xics_do_message(int cpu, int msg)
109{
110 set_bit(msg, &xics_ipi_message[cpu].value);
111 mb();
112 xics_cause_IPI(cpu);
113}
114
115static void smp_xics_message_pass(int target, int msg)
116{
117 unsigned int i;
118
119 if (target < NR_CPUS) {
120 smp_xics_do_message(target, msg);
121 } else {
122 for_each_online_cpu(i) {
123 if (target == MSG_ALL_BUT_SELF
124 && i == smp_processor_id())
125 continue;
126 smp_xics_do_message(i, msg);
127 }
128 }
129}
130
131static int __init smp_xics_probe(void)
132{
133 xics_request_IPIs();
134
135 return cpus_weight(cpu_possible_map);
136}
137
138static void __devinit smp_xics_setup_cpu(int cpu) 108static void __devinit smp_xics_setup_cpu(int cpu)
139{ 109{
140 if (cpu != boot_cpuid) 110 if (cpu != boot_cpuid)
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c
index 0fc830f576f5..e1904774a70f 100644
--- a/arch/powerpc/platforms/pseries/xics.c
+++ b/arch/powerpc/platforms/pseries/xics.c
@@ -9,32 +9,30 @@
9 * 2 of the License, or (at your option) any later version. 9 * 2 of the License, or (at your option) any later version.
10 */ 10 */
11 11
12
13#include <linux/types.h> 12#include <linux/types.h>
14#include <linux/threads.h> 13#include <linux/threads.h>
15#include <linux/kernel.h> 14#include <linux/kernel.h>
16#include <linux/irq.h> 15#include <linux/irq.h>
17#include <linux/smp.h> 16#include <linux/smp.h>
18#include <linux/interrupt.h> 17#include <linux/interrupt.h>
19#include <linux/signal.h>
20#include <linux/init.h> 18#include <linux/init.h>
21#include <linux/gfp.h>
22#include <linux/radix-tree.h> 19#include <linux/radix-tree.h>
23#include <linux/cpu.h> 20#include <linux/cpu.h>
21#include <linux/of.h>
24 22
25#include <asm/firmware.h> 23#include <asm/firmware.h>
26#include <asm/prom.h>
27#include <asm/io.h> 24#include <asm/io.h>
28#include <asm/pgtable.h> 25#include <asm/pgtable.h>
29#include <asm/smp.h> 26#include <asm/smp.h>
30#include <asm/rtas.h> 27#include <asm/rtas.h>
31#include <asm/hvcall.h> 28#include <asm/hvcall.h>
32#include <asm/machdep.h> 29#include <asm/machdep.h>
33#include <asm/i8259.h>
34 30
35#include "xics.h" 31#include "xics.h"
36#include "plpar_wrappers.h" 32#include "plpar_wrappers.h"
37 33
34static struct irq_host *xics_host;
35
38#define XICS_IPI 2 36#define XICS_IPI 2
39#define XICS_IRQ_SPURIOUS 0 37#define XICS_IRQ_SPURIOUS 0
40 38
@@ -47,6 +45,20 @@
47 */ 45 */
48#define IPI_PRIORITY 4 46#define IPI_PRIORITY 4
49 47
48static unsigned int default_server = 0xFF;
49static unsigned int default_distrib_server = 0;
50static unsigned int interrupt_server_size = 8;
51
52/* RTAS service tokens */
53static int ibm_get_xive;
54static int ibm_set_xive;
55static int ibm_int_on;
56static int ibm_int_off;
57
58
59/* Direct hardware low level accessors */
60
61/* The part of the interrupt presentation layer that we care about */
50struct xics_ipl { 62struct xics_ipl {
51 union { 63 union {
52 u32 word; 64 u32 word;
@@ -65,27 +77,6 @@ struct xics_ipl {
65 77
66static struct xics_ipl __iomem *xics_per_cpu[NR_CPUS]; 78static struct xics_ipl __iomem *xics_per_cpu[NR_CPUS];
67 79
68static unsigned int default_server = 0xFF;
69static unsigned int default_distrib_server = 0;
70static unsigned int interrupt_server_size = 8;
71
72static struct irq_host *xics_host;
73
74/*
75 * XICS only has a single IPI, so encode the messages per CPU
76 */
77struct xics_ipi_struct xics_ipi_message[NR_CPUS] __cacheline_aligned;
78
79/* RTAS service tokens */
80static int ibm_get_xive;
81static int ibm_set_xive;
82static int ibm_int_on;
83static int ibm_int_off;
84
85
86/* Direct HW low level accessors */
87
88
89static inline unsigned int direct_xirr_info_get(void) 80static inline unsigned int direct_xirr_info_get(void)
90{ 81{
91 int cpu = smp_processor_id(); 82 int cpu = smp_processor_id();
@@ -93,7 +84,7 @@ static inline unsigned int direct_xirr_info_get(void)
93 return in_be32(&xics_per_cpu[cpu]->xirr.word); 84 return in_be32(&xics_per_cpu[cpu]->xirr.word);
94} 85}
95 86
96static inline void direct_xirr_info_set(int value) 87static inline void direct_xirr_info_set(unsigned int value)
97{ 88{
98 int cpu = smp_processor_id(); 89 int cpu = smp_processor_id();
99 90
@@ -115,7 +106,6 @@ static inline void direct_qirr_info(int n_cpu, u8 value)
115 106
116/* LPAR low level accessors */ 107/* LPAR low level accessors */
117 108
118
119static inline unsigned int lpar_xirr_info_get(void) 109static inline unsigned int lpar_xirr_info_get(void)
120{ 110{
121 unsigned long lpar_rc; 111 unsigned long lpar_rc;
@@ -127,15 +117,14 @@ static inline unsigned int lpar_xirr_info_get(void)
127 return (unsigned int)return_value; 117 return (unsigned int)return_value;
128} 118}
129 119
130static inline void lpar_xirr_info_set(int value) 120static inline void lpar_xirr_info_set(unsigned int value)
131{ 121{
132 unsigned long lpar_rc; 122 unsigned long lpar_rc;
133 unsigned long val64 = value & 0xffffffff;
134 123
135 lpar_rc = plpar_eoi(val64); 124 lpar_rc = plpar_eoi(value);
136 if (lpar_rc != H_SUCCESS) 125 if (lpar_rc != H_SUCCESS)
137 panic("bad return code EOI - rc = %ld, value=%lx\n", lpar_rc, 126 panic("bad return code EOI - rc = %ld, value=%x\n", lpar_rc,
138 val64); 127 value);
139} 128}
140 129
141static inline void lpar_cppr_info(u8 value) 130static inline void lpar_cppr_info(u8 value)
@@ -157,48 +146,7 @@ static inline void lpar_qirr_info(int n_cpu , u8 value)
157} 146}
158 147
159 148
160/* High level handlers and init code */ 149/* Interface to generic irq subsystem */
161
162static void xics_update_irq_servers(void)
163{
164 int i, j;
165 struct device_node *np;
166 u32 ilen;
167 const u32 *ireg, *isize;
168 u32 hcpuid;
169
170 /* Find the server numbers for the boot cpu. */
171 np = of_get_cpu_node(boot_cpuid, NULL);
172 BUG_ON(!np);
173
174 ireg = of_get_property(np, "ibm,ppc-interrupt-gserver#s", &ilen);
175 if (!ireg) {
176 of_node_put(np);
177 return;
178 }
179
180 i = ilen / sizeof(int);
181 hcpuid = get_hard_smp_processor_id(boot_cpuid);
182
183 /* Global interrupt distribution server is specified in the last
184 * entry of "ibm,ppc-interrupt-gserver#s" property. Get the last
185 * entry fom this property for current boot cpu id and use it as
186 * default distribution server
187 */
188 for (j = 0; j < i; j += 2) {
189 if (ireg[j] == hcpuid) {
190 default_server = hcpuid;
191 default_distrib_server = ireg[j+1];
192
193 isize = of_get_property(np,
194 "ibm,interrupt-server#-size", NULL);
195 if (isize)
196 interrupt_server_size = *isize;
197 }
198 }
199
200 of_node_put(np);
201}
202 150
203#ifdef CONFIG_SMP 151#ifdef CONFIG_SMP
204static int get_irq_server(unsigned int virq, unsigned int strict_check) 152static int get_irq_server(unsigned int virq, unsigned int strict_check)
@@ -208,9 +156,6 @@ static int get_irq_server(unsigned int virq, unsigned int strict_check)
208 cpumask_t cpumask = irq_desc[virq].affinity; 156 cpumask_t cpumask = irq_desc[virq].affinity;
209 cpumask_t tmp = CPU_MASK_NONE; 157 cpumask_t tmp = CPU_MASK_NONE;
210 158
211 if (! cpu_isset(default_server, cpu_online_map))
212 xics_update_irq_servers();
213
214 if (!distribute_irqs) 159 if (!distribute_irqs)
215 return default_server; 160 return default_server;
216 161
@@ -238,7 +183,6 @@ static int get_irq_server(unsigned int virq, unsigned int strict_check)
238} 183}
239#endif 184#endif
240 185
241
242static void xics_unmask_irq(unsigned int virq) 186static void xics_unmask_irq(unsigned int virq)
243{ 187{
244 unsigned int irq; 188 unsigned int irq;
@@ -257,21 +201,28 @@ static void xics_unmask_irq(unsigned int virq)
257 call_status = rtas_call(ibm_set_xive, 3, 1, NULL, irq, server, 201 call_status = rtas_call(ibm_set_xive, 3, 1, NULL, irq, server,
258 DEFAULT_PRIORITY); 202 DEFAULT_PRIORITY);
259 if (call_status != 0) { 203 if (call_status != 0) {
260 printk(KERN_ERR "xics_enable_irq: irq=%u: ibm_set_xive " 204 printk(KERN_ERR
261 "returned %d\n", irq, call_status); 205 "%s: ibm_set_xive irq %u server %x returned %d\n",
262 printk("set_xive %x, server %x\n", ibm_set_xive, server); 206 __func__, irq, server, call_status);
263 return; 207 return;
264 } 208 }
265 209
266 /* Now unmask the interrupt (often a no-op) */ 210 /* Now unmask the interrupt (often a no-op) */
267 call_status = rtas_call(ibm_int_on, 1, 1, NULL, irq); 211 call_status = rtas_call(ibm_int_on, 1, 1, NULL, irq);
268 if (call_status != 0) { 212 if (call_status != 0) {
269 printk(KERN_ERR "xics_enable_irq: irq=%u: ibm_int_on " 213 printk(KERN_ERR "%s: ibm_int_on irq=%u returned %d\n",
270 "returned %d\n", irq, call_status); 214 __func__, irq, call_status);
271 return; 215 return;
272 } 216 }
273} 217}
274 218
219static unsigned int xics_startup(unsigned int virq)
220{
221 /* unmask it */
222 xics_unmask_irq(virq);
223 return 0;
224}
225
275static void xics_mask_real_irq(unsigned int irq) 226static void xics_mask_real_irq(unsigned int irq)
276{ 227{
277 int call_status; 228 int call_status;
@@ -281,8 +232,8 @@ static void xics_mask_real_irq(unsigned int irq)
281 232
282 call_status = rtas_call(ibm_int_off, 1, 1, NULL, irq); 233 call_status = rtas_call(ibm_int_off, 1, 1, NULL, irq);
283 if (call_status != 0) { 234 if (call_status != 0) {
284 printk(KERN_ERR "xics_disable_real_irq: irq=%u: " 235 printk(KERN_ERR "%s: ibm_int_off irq=%u returned %d\n",
285 "ibm_int_off returned %d\n", irq, call_status); 236 __func__, irq, call_status);
286 return; 237 return;
287 } 238 }
288 239
@@ -290,8 +241,8 @@ static void xics_mask_real_irq(unsigned int irq)
290 call_status = rtas_call(ibm_set_xive, 3, 1, NULL, irq, 241 call_status = rtas_call(ibm_set_xive, 3, 1, NULL, irq,
291 default_server, 0xff); 242 default_server, 0xff);
292 if (call_status != 0) { 243 if (call_status != 0) {
293 printk(KERN_ERR "xics_disable_irq: irq=%u: ibm_set_xive(0xff)" 244 printk(KERN_ERR "%s: ibm_set_xive(0xff) irq=%u returned %d\n",
294 " returned %d\n", irq, call_status); 245 __func__, irq, call_status);
295 return; 246 return;
296 } 247 }
297} 248}
@@ -308,132 +259,77 @@ static void xics_mask_irq(unsigned int virq)
308 xics_mask_real_irq(irq); 259 xics_mask_real_irq(irq);
309} 260}
310 261
311static unsigned int xics_startup(unsigned int virq) 262static void xics_mask_unknown_vec(unsigned int vec)
312{
313 unsigned int irq;
314
315 /* force a reverse mapping of the interrupt so it gets in the cache */
316 irq = (unsigned int)irq_map[virq].hwirq;
317 irq_radix_revmap(xics_host, irq);
318
319 /* unmask it */
320 xics_unmask_irq(virq);
321 return 0;
322}
323
324static void xics_eoi_direct(unsigned int virq)
325{ 263{
326 unsigned int irq = (unsigned int)irq_map[virq].hwirq; 264 printk(KERN_ERR "Interrupt %u (real) is invalid, disabling it.\n", vec);
327 265 xics_mask_real_irq(vec);
328 iosync();
329 direct_xirr_info_set((0xff << 24) | irq);
330} 266}
331 267
332 268static inline unsigned int xics_xirr_vector(unsigned int xirr)
333static void xics_eoi_lpar(unsigned int virq)
334{ 269{
335 unsigned int irq = (unsigned int)irq_map[virq].hwirq; 270 /*
336 271 * The top byte is the old cppr, to be restored on EOI.
337 iosync(); 272 * The remaining 24 bits are the vector.
338 lpar_xirr_info_set((0xff << 24) | irq); 273 */
274 return xirr & 0x00ffffff;
339} 275}
340 276
341static inline unsigned int xics_remap_irq(unsigned int vec) 277static unsigned int xics_get_irq_direct(void)
342{ 278{
279 unsigned int xirr = direct_xirr_info_get();
280 unsigned int vec = xics_xirr_vector(xirr);
343 unsigned int irq; 281 unsigned int irq;
344 282
345 vec &= 0x00ffffff;
346
347 if (vec == XICS_IRQ_SPURIOUS) 283 if (vec == XICS_IRQ_SPURIOUS)
348 return NO_IRQ; 284 return NO_IRQ;
349 irq = irq_radix_revmap(xics_host, vec); 285
286 irq = irq_radix_revmap_lookup(xics_host, vec);
350 if (likely(irq != NO_IRQ)) 287 if (likely(irq != NO_IRQ))
351 return irq; 288 return irq;
352 289
353 printk(KERN_ERR "Interrupt %u (real) is invalid," 290 /* We don't have a linux mapping, so have rtas mask it. */
354 " disabling it.\n", vec); 291 xics_mask_unknown_vec(vec);
355 xics_mask_real_irq(vec);
356 return NO_IRQ;
357}
358 292
359static unsigned int xics_get_irq_direct(void) 293 /* We might learn about it later, so EOI it */
360{ 294 direct_xirr_info_set(xirr);
361 return xics_remap_irq(direct_xirr_info_get()); 295 return NO_IRQ;
362} 296}
363 297
364static unsigned int xics_get_irq_lpar(void) 298static unsigned int xics_get_irq_lpar(void)
365{ 299{
366 return xics_remap_irq(lpar_xirr_info_get()); 300 unsigned int xirr = lpar_xirr_info_get();
367} 301 unsigned int vec = xics_xirr_vector(xirr);
368 302 unsigned int irq;
369#ifdef CONFIG_SMP
370
371static irqreturn_t xics_ipi_dispatch(int cpu)
372{
373 WARN_ON(cpu_is_offline(cpu));
374 303
375 while (xics_ipi_message[cpu].value) { 304 if (vec == XICS_IRQ_SPURIOUS)
376 if (test_and_clear_bit(PPC_MSG_CALL_FUNCTION, 305 return NO_IRQ;
377 &xics_ipi_message[cpu].value)) {
378 mb();
379 smp_message_recv(PPC_MSG_CALL_FUNCTION);
380 }
381 if (test_and_clear_bit(PPC_MSG_RESCHEDULE,
382 &xics_ipi_message[cpu].value)) {
383 mb();
384 smp_message_recv(PPC_MSG_RESCHEDULE);
385 }
386 if (test_and_clear_bit(PPC_MSG_CALL_FUNC_SINGLE,
387 &xics_ipi_message[cpu].value)) {
388 mb();
389 smp_message_recv(PPC_MSG_CALL_FUNC_SINGLE);
390 }
391#if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
392 if (test_and_clear_bit(PPC_MSG_DEBUGGER_BREAK,
393 &xics_ipi_message[cpu].value)) {
394 mb();
395 smp_message_recv(PPC_MSG_DEBUGGER_BREAK);
396 }
397#endif
398 }
399 return IRQ_HANDLED;
400}
401 306
402static irqreturn_t xics_ipi_action_direct(int irq, void *dev_id) 307 irq = irq_radix_revmap_lookup(xics_host, vec);
403{ 308 if (likely(irq != NO_IRQ))
404 int cpu = smp_processor_id(); 309 return irq;
405 310
406 direct_qirr_info(cpu, 0xff); 311 /* We don't have a linux mapping, so have RTAS mask it. */
312 xics_mask_unknown_vec(vec);
407 313
408 return xics_ipi_dispatch(cpu); 314 /* We might learn about it later, so EOI it */
315 lpar_xirr_info_set(xirr);
316 return NO_IRQ;
409} 317}
410 318
411static irqreturn_t xics_ipi_action_lpar(int irq, void *dev_id) 319static void xics_eoi_direct(unsigned int virq)
412{ 320{
413 int cpu = smp_processor_id(); 321 unsigned int irq = (unsigned int)irq_map[virq].hwirq;
414
415 lpar_qirr_info(cpu, 0xff);
416 322
417 return xics_ipi_dispatch(cpu); 323 iosync();
324 direct_xirr_info_set((0xff << 24) | irq);
418} 325}
419 326
420void xics_cause_IPI(int cpu) 327static void xics_eoi_lpar(unsigned int virq)
421{ 328{
422 if (firmware_has_feature(FW_FEATURE_LPAR)) 329 unsigned int irq = (unsigned int)irq_map[virq].hwirq;
423 lpar_qirr_info(cpu, IPI_PRIORITY);
424 else
425 direct_qirr_info(cpu, IPI_PRIORITY);
426}
427
428#endif /* CONFIG_SMP */
429 330
430static void xics_set_cpu_priority(unsigned char cppr)
431{
432 if (firmware_has_feature(FW_FEATURE_LPAR))
433 lpar_cppr_info(cppr);
434 else
435 direct_cppr_info(cppr);
436 iosync(); 331 iosync();
332 lpar_xirr_info_set((0xff << 24) | irq);
437} 333}
438 334
439static void xics_set_affinity(unsigned int virq, cpumask_t cpumask) 335static void xics_set_affinity(unsigned int virq, cpumask_t cpumask)
@@ -450,8 +346,8 @@ static void xics_set_affinity(unsigned int virq, cpumask_t cpumask)
450 status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq); 346 status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq);
451 347
452 if (status) { 348 if (status) {
453 printk(KERN_ERR "xics_set_affinity: irq=%u ibm,get-xive " 349 printk(KERN_ERR "%s: ibm,get-xive irq=%u returns %d\n",
454 "returns %d\n", irq, status); 350 __func__, irq, status);
455 return; 351 return;
456 } 352 }
457 353
@@ -463,8 +359,9 @@ static void xics_set_affinity(unsigned int virq, cpumask_t cpumask)
463 if (irq_server == -1) { 359 if (irq_server == -1) {
464 char cpulist[128]; 360 char cpulist[128];
465 cpumask_scnprintf(cpulist, sizeof(cpulist), cpumask); 361 cpumask_scnprintf(cpulist, sizeof(cpulist), cpumask);
466 printk(KERN_WARNING "xics_set_affinity: No online cpus in " 362 printk(KERN_WARNING
467 "the mask %s for irq %d\n", cpulist, virq); 363 "%s: No online cpus in the mask %s for irq %d\n",
364 __func__, cpulist, virq);
468 return; 365 return;
469 } 366 }
470 367
@@ -472,28 +369,12 @@ static void xics_set_affinity(unsigned int virq, cpumask_t cpumask)
472 irq, irq_server, xics_status[1]); 369 irq, irq_server, xics_status[1]);
473 370
474 if (status) { 371 if (status) {
475 printk(KERN_ERR "xics_set_affinity: irq=%u ibm,set-xive " 372 printk(KERN_ERR "%s: ibm,set-xive irq=%u returns %d\n",
476 "returns %d\n", irq, status); 373 __func__, irq, status);
477 return; 374 return;
478 } 375 }
479} 376}
480 377
481void xics_setup_cpu(void)
482{
483 xics_set_cpu_priority(0xff);
484
485 /*
486 * Put the calling processor into the GIQ. This is really only
487 * necessary from a secondary thread as the OF start-cpu interface
488 * performs this function for us on primary threads.
489 *
490 * XXX: undo of teardown on kexec needs this too, as may hotplug
491 */
492 rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE,
493 (1UL << interrupt_server_size) - 1 - default_distrib_server, 1);
494}
495
496
497static struct irq_chip xics_pic_direct = { 378static struct irq_chip xics_pic_direct = {
498 .typename = " XICS ", 379 .typename = " XICS ",
499 .startup = xics_startup, 380 .startup = xics_startup,
@@ -503,7 +384,6 @@ static struct irq_chip xics_pic_direct = {
503 .set_affinity = xics_set_affinity 384 .set_affinity = xics_set_affinity
504}; 385};
505 386
506
507static struct irq_chip xics_pic_lpar = { 387static struct irq_chip xics_pic_lpar = {
508 .typename = " XICS ", 388 .typename = " XICS ",
509 .startup = xics_startup, 389 .startup = xics_startup,
@@ -513,6 +393,9 @@ static struct irq_chip xics_pic_lpar = {
513 .set_affinity = xics_set_affinity 393 .set_affinity = xics_set_affinity
514}; 394};
515 395
396
397/* Interface to arch irq controller subsystem layer */
398
516/* Points to the irq_chip we're actually using */ 399/* Points to the irq_chip we're actually using */
517static struct irq_chip *xics_irq_chip; 400static struct irq_chip *xics_irq_chip;
518 401
@@ -530,6 +413,9 @@ static int xics_host_map(struct irq_host *h, unsigned int virq,
530{ 413{
531 pr_debug("xics: map virq %d, hwirq 0x%lx\n", virq, hw); 414 pr_debug("xics: map virq %d, hwirq 0x%lx\n", virq, hw);
532 415
416 /* Insert the interrupt mapping into the radix tree for fast lookup */
417 irq_radix_revmap_insert(xics_host, virq, hw);
418
533 get_irq_desc(virq)->status |= IRQ_LEVEL; 419 get_irq_desc(virq)->status |= IRQ_LEVEL;
534 set_irq_chip_and_handler(virq, xics_irq_chip, handle_fasteoi_irq); 420 set_irq_chip_and_handler(virq, xics_irq_chip, handle_fasteoi_irq);
535 return 0; 421 return 0;
@@ -569,10 +455,169 @@ static void __init xics_init_host(void)
569 irq_set_default_host(xics_host); 455 irq_set_default_host(xics_host);
570} 456}
571 457
458
459/* Inter-processor interrupt support */
460
461#ifdef CONFIG_SMP
462/*
463 * XICS only has a single IPI, so encode the messages per CPU
464 */
465struct xics_ipi_struct {
466 unsigned long value;
467 } ____cacheline_aligned;
468
469static struct xics_ipi_struct xics_ipi_message[NR_CPUS] __cacheline_aligned;
470
471static inline void smp_xics_do_message(int cpu, int msg)
472{
473 set_bit(msg, &xics_ipi_message[cpu].value);
474 mb();
475 if (firmware_has_feature(FW_FEATURE_LPAR))
476 lpar_qirr_info(cpu, IPI_PRIORITY);
477 else
478 direct_qirr_info(cpu, IPI_PRIORITY);
479}
480
481void smp_xics_message_pass(int target, int msg)
482{
483 unsigned int i;
484
485 if (target < NR_CPUS) {
486 smp_xics_do_message(target, msg);
487 } else {
488 for_each_online_cpu(i) {
489 if (target == MSG_ALL_BUT_SELF
490 && i == smp_processor_id())
491 continue;
492 smp_xics_do_message(i, msg);
493 }
494 }
495}
496
497static irqreturn_t xics_ipi_dispatch(int cpu)
498{
499 WARN_ON(cpu_is_offline(cpu));
500
501 mb(); /* order mmio clearing qirr */
502 while (xics_ipi_message[cpu].value) {
503 if (test_and_clear_bit(PPC_MSG_CALL_FUNCTION,
504 &xics_ipi_message[cpu].value)) {
505 smp_message_recv(PPC_MSG_CALL_FUNCTION);
506 }
507 if (test_and_clear_bit(PPC_MSG_RESCHEDULE,
508 &xics_ipi_message[cpu].value)) {
509 smp_message_recv(PPC_MSG_RESCHEDULE);
510 }
511 if (test_and_clear_bit(PPC_MSG_CALL_FUNC_SINGLE,
512 &xics_ipi_message[cpu].value)) {
513 smp_message_recv(PPC_MSG_CALL_FUNC_SINGLE);
514 }
515#if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
516 if (test_and_clear_bit(PPC_MSG_DEBUGGER_BREAK,
517 &xics_ipi_message[cpu].value)) {
518 smp_message_recv(PPC_MSG_DEBUGGER_BREAK);
519 }
520#endif
521 }
522 return IRQ_HANDLED;
523}
524
525static irqreturn_t xics_ipi_action_direct(int irq, void *dev_id)
526{
527 int cpu = smp_processor_id();
528
529 direct_qirr_info(cpu, 0xff);
530
531 return xics_ipi_dispatch(cpu);
532}
533
534static irqreturn_t xics_ipi_action_lpar(int irq, void *dev_id)
535{
536 int cpu = smp_processor_id();
537
538 lpar_qirr_info(cpu, 0xff);
539
540 return xics_ipi_dispatch(cpu);
541}
542
543static void xics_request_ipi(void)
544{
545 unsigned int ipi;
546 int rc;
547
548 ipi = irq_create_mapping(xics_host, XICS_IPI);
549 BUG_ON(ipi == NO_IRQ);
550
551 /*
552 * IPIs are marked IRQF_DISABLED as they must run with irqs
553 * disabled
554 */
555 set_irq_handler(ipi, handle_percpu_irq);
556 if (firmware_has_feature(FW_FEATURE_LPAR))
557 rc = request_irq(ipi, xics_ipi_action_lpar,
558 IRQF_DISABLED|IRQF_PERCPU, "IPI", NULL);
559 else
560 rc = request_irq(ipi, xics_ipi_action_direct,
561 IRQF_DISABLED|IRQF_PERCPU, "IPI", NULL);
562 BUG_ON(rc);
563}
564
565int __init smp_xics_probe(void)
566{
567 xics_request_ipi();
568
569 return cpus_weight(cpu_possible_map);
570}
571
572#endif /* CONFIG_SMP */
573
574
575/* Initialization */
576
577static void xics_update_irq_servers(void)
578{
579 int i, j;
580 struct device_node *np;
581 u32 ilen;
582 const u32 *ireg, *isize;
583 u32 hcpuid;
584
585 /* Find the server numbers for the boot cpu. */
586 np = of_get_cpu_node(boot_cpuid, NULL);
587 BUG_ON(!np);
588
589 ireg = of_get_property(np, "ibm,ppc-interrupt-gserver#s", &ilen);
590 if (!ireg) {
591 of_node_put(np);
592 return;
593 }
594
595 i = ilen / sizeof(int);
596 hcpuid = get_hard_smp_processor_id(boot_cpuid);
597
598 /* Global interrupt distribution server is specified in the last
599 * entry of "ibm,ppc-interrupt-gserver#s" property. Get the last
600 * entry fom this property for current boot cpu id and use it as
601 * default distribution server
602 */
603 for (j = 0; j < i; j += 2) {
604 if (ireg[j] == hcpuid) {
605 default_server = hcpuid;
606 default_distrib_server = ireg[j+1];
607 }
608 }
609
610 /* get the bit size of server numbers */
611 isize = of_get_property(np, "ibm,interrupt-server#-size", NULL);
612 if (isize)
613 interrupt_server_size = *isize;
614
615 of_node_put(np);
616}
617
572static void __init xics_map_one_cpu(int hw_id, unsigned long addr, 618static void __init xics_map_one_cpu(int hw_id, unsigned long addr,
573 unsigned long size) 619 unsigned long size)
574{ 620{
575#ifdef CONFIG_SMP
576 int i; 621 int i;
577 622
578 /* This may look gross but it's good enough for now, we don't quite 623 /* This may look gross but it's good enough for now, we don't quite
@@ -586,11 +631,6 @@ static void __init xics_map_one_cpu(int hw_id, unsigned long addr,
586 return; 631 return;
587 } 632 }
588 } 633 }
589#else
590 if (hw_id != 0)
591 return;
592 xics_per_cpu[0] = ioremap(addr, size);
593#endif /* CONFIG_SMP */
594} 634}
595 635
596static void __init xics_init_one_node(struct device_node *np, 636static void __init xics_init_one_node(struct device_node *np,
@@ -652,15 +692,17 @@ void __init xics_init_IRQ(void)
652 692
653 for_each_node_by_type(np, "PowerPC-External-Interrupt-Presentation") { 693 for_each_node_by_type(np, "PowerPC-External-Interrupt-Presentation") {
654 found = 1; 694 found = 1;
655 if (firmware_has_feature(FW_FEATURE_LPAR)) 695 if (firmware_has_feature(FW_FEATURE_LPAR)) {
696 of_node_put(np);
656 break; 697 break;
698 }
657 xics_init_one_node(np, &indx); 699 xics_init_one_node(np, &indx);
658 } 700 }
659 if (found == 0) 701 if (found == 0)
660 return; 702 return;
661 703
662 xics_init_host();
663 xics_update_irq_servers(); 704 xics_update_irq_servers();
705 xics_init_host();
664 706
665 if (firmware_has_feature(FW_FEATURE_LPAR)) 707 if (firmware_has_feature(FW_FEATURE_LPAR))
666 ppc_md.get_irq = xics_get_irq_lpar; 708 ppc_md.get_irq = xics_get_irq_lpar;
@@ -672,30 +714,31 @@ void __init xics_init_IRQ(void)
672 ppc64_boot_msg(0x21, "XICS Done"); 714 ppc64_boot_msg(0x21, "XICS Done");
673} 715}
674 716
717/* Cpu startup, shutdown, and hotplug */
675 718
676#ifdef CONFIG_SMP 719static void xics_set_cpu_priority(unsigned char cppr)
677void xics_request_IPIs(void)
678{ 720{
679 unsigned int ipi;
680 int rc;
681
682 ipi = irq_create_mapping(xics_host, XICS_IPI);
683 BUG_ON(ipi == NO_IRQ);
684
685 /*
686 * IPIs are marked IRQF_DISABLED as they must run with irqs
687 * disabled
688 */
689 set_irq_handler(ipi, handle_percpu_irq);
690 if (firmware_has_feature(FW_FEATURE_LPAR)) 721 if (firmware_has_feature(FW_FEATURE_LPAR))
691 rc = request_irq(ipi, xics_ipi_action_lpar, IRQF_DISABLED, 722 lpar_cppr_info(cppr);
692 "IPI", NULL);
693 else 723 else
694 rc = request_irq(ipi, xics_ipi_action_direct, IRQF_DISABLED, 724 direct_cppr_info(cppr);
695 "IPI", NULL); 725 iosync();
696 BUG_ON(rc); 726}
727
728/* Have the calling processor join or leave the specified global queue */
729static void xics_set_cpu_giq(unsigned int gserver, unsigned int join)
730{
731 int status = rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE,
732 (1UL << interrupt_server_size) - 1 - gserver, join);
733 WARN_ON(status < 0);
734}
735
736void xics_setup_cpu(void)
737{
738 xics_set_cpu_priority(0xff);
739
740 xics_set_cpu_giq(default_distrib_server, 1);
697} 741}
698#endif /* CONFIG_SMP */
699 742
700void xics_teardown_cpu(void) 743void xics_teardown_cpu(void)
701{ 744{
@@ -703,9 +746,7 @@ void xics_teardown_cpu(void)
703 746
704 xics_set_cpu_priority(0); 747 xics_set_cpu_priority(0);
705 748
706 /* 749 /* Clear any pending IPI request */
707 * Clear IPI
708 */
709 if (firmware_has_feature(FW_FEATURE_LPAR)) 750 if (firmware_has_feature(FW_FEATURE_LPAR))
710 lpar_qirr_info(cpu, 0xff); 751 lpar_qirr_info(cpu, 0xff);
711 else 752 else
@@ -714,34 +755,28 @@ void xics_teardown_cpu(void)
714 755
715void xics_kexec_teardown_cpu(int secondary) 756void xics_kexec_teardown_cpu(int secondary)
716{ 757{
717 unsigned int ipi;
718 struct irq_desc *desc;
719
720 xics_teardown_cpu(); 758 xics_teardown_cpu();
721 759
722 /* 760 /*
723 * we need to EOI the IPI 761 * we take the ipi irq but and never return so we
762 * need to EOI the IPI, but want to leave our priority 0
724 * 763 *
725 * probably need to check all the other interrupts too 764 * should we check all the other interrupts too?
726 * should we be flagging idle loop instead? 765 * should we be flagging idle loop instead?
727 * or creating some task to be scheduled? 766 * or creating some task to be scheduled?
728 */ 767 */
729 768
730 ipi = irq_find_mapping(xics_host, XICS_IPI); 769 if (firmware_has_feature(FW_FEATURE_LPAR))
731 if (ipi == XICS_IRQ_SPURIOUS) 770 lpar_xirr_info_set((0x00 << 24) | XICS_IPI);
732 return; 771 else
733 desc = get_irq_desc(ipi); 772 direct_xirr_info_set((0x00 << 24) | XICS_IPI);
734 if (desc->chip && desc->chip->eoi)
735 desc->chip->eoi(ipi);
736 773
737 /* 774 /*
738 * Some machines need to have at least one cpu in the GIQ, 775 * Some machines need to have at least one cpu in the GIQ,
739 * so leave the master cpu in the group. 776 * so leave the master cpu in the group.
740 */ 777 */
741 if (secondary) 778 if (secondary)
742 rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE, 779 xics_set_cpu_giq(default_distrib_server, 0);
743 (1UL << interrupt_server_size) - 1 -
744 default_distrib_server, 0);
745} 780}
746 781
747#ifdef CONFIG_HOTPLUG_CPU 782#ifdef CONFIG_HOTPLUG_CPU
@@ -749,17 +784,18 @@ void xics_kexec_teardown_cpu(int secondary)
749/* Interrupts are disabled. */ 784/* Interrupts are disabled. */
750void xics_migrate_irqs_away(void) 785void xics_migrate_irqs_away(void)
751{ 786{
752 int status;
753 int cpu = smp_processor_id(), hw_cpu = hard_smp_processor_id(); 787 int cpu = smp_processor_id(), hw_cpu = hard_smp_processor_id();
754 unsigned int irq, virq; 788 unsigned int irq, virq;
755 789
790 /* If we used to be the default server, move to the new "boot_cpuid" */
791 if (hw_cpu == default_server)
792 xics_update_irq_servers();
793
756 /* Reject any interrupt that was queued to us... */ 794 /* Reject any interrupt that was queued to us... */
757 xics_set_cpu_priority(0); 795 xics_set_cpu_priority(0);
758 796
759 /* remove ourselves from the global interrupt queue */ 797 /* Remove ourselves from the global interrupt queue */
760 status = rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE, 798 xics_set_cpu_giq(default_distrib_server, 0);
761 (1UL << interrupt_server_size) - 1 - default_distrib_server, 0);
762 WARN_ON(status < 0);
763 799
764 /* Allow IPIs again... */ 800 /* Allow IPIs again... */
765 xics_set_cpu_priority(DEFAULT_PRIORITY); 801 xics_set_cpu_priority(DEFAULT_PRIORITY);
@@ -767,6 +803,7 @@ void xics_migrate_irqs_away(void)
767 for_each_irq(virq) { 803 for_each_irq(virq) {
768 struct irq_desc *desc; 804 struct irq_desc *desc;
769 int xics_status[2]; 805 int xics_status[2];
806 int status;
770 unsigned long flags; 807 unsigned long flags;
771 808
772 /* We cant set affinity on ISA interrupts */ 809 /* We cant set affinity on ISA interrupts */
@@ -790,9 +827,8 @@ void xics_migrate_irqs_away(void)
790 827
791 status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq); 828 status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq);
792 if (status) { 829 if (status) {
793 printk(KERN_ERR "migrate_irqs_away: irq=%u " 830 printk(KERN_ERR "%s: ibm,get-xive irq=%u returns %d\n",
794 "ibm,get-xive returns %d\n", 831 __func__, irq, status);
795 virq, status);
796 goto unlock; 832 goto unlock;
797 } 833 }
798 834
diff --git a/arch/powerpc/platforms/pseries/xics.h b/arch/powerpc/platforms/pseries/xics.h
index 1c5321ae8f2f..d1d5a83039ae 100644
--- a/arch/powerpc/platforms/pseries/xics.h
+++ b/arch/powerpc/platforms/pseries/xics.h
@@ -12,20 +12,12 @@
12#ifndef _POWERPC_KERNEL_XICS_H 12#ifndef _POWERPC_KERNEL_XICS_H
13#define _POWERPC_KERNEL_XICS_H 13#define _POWERPC_KERNEL_XICS_H
14 14
15#include <linux/cache.h>
16
17extern void xics_init_IRQ(void); 15extern void xics_init_IRQ(void);
18extern void xics_setup_cpu(void); 16extern void xics_setup_cpu(void);
19extern void xics_teardown_cpu(void); 17extern void xics_teardown_cpu(void);
20extern void xics_kexec_teardown_cpu(int secondary); 18extern void xics_kexec_teardown_cpu(int secondary);
21extern void xics_cause_IPI(int cpu);
22extern void xics_request_IPIs(void);
23extern void xics_migrate_irqs_away(void); 19extern void xics_migrate_irqs_away(void);
24 20extern int smp_xics_probe(void);
25struct xics_ipi_struct { 21extern void smp_xics_message_pass(int target, int msg);
26 volatile unsigned long value;
27} ____cacheline_aligned;
28
29extern struct xics_ipi_struct xics_ipi_message[NR_CPUS] __cacheline_aligned;
30 22
31#endif /* _POWERPC_KERNEL_XICS_H */ 23#endif /* _POWERPC_KERNEL_XICS_H */
diff --git a/arch/powerpc/sysdev/Kconfig b/arch/powerpc/sysdev/Kconfig
index 72fb35b9ebca..396582835cb5 100644
--- a/arch/powerpc/sysdev/Kconfig
+++ b/arch/powerpc/sysdev/Kconfig
@@ -6,3 +6,9 @@ config PPC4xx_PCI_EXPRESS
6 bool 6 bool
7 depends on PCI && 4xx 7 depends on PCI && 4xx
8 default n 8 default n
9
10config PPC_MSI_BITMAP
11 bool
12 depends on PCI_MSI
13 default y if MPIC
14 default y if FSL_PCI
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index a90054b56d5c..a44709a94f97 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -5,6 +5,7 @@ endif
5mpic-msi-obj-$(CONFIG_PCI_MSI) += mpic_msi.o mpic_u3msi.o mpic_pasemi_msi.o 5mpic-msi-obj-$(CONFIG_PCI_MSI) += mpic_msi.o mpic_u3msi.o mpic_pasemi_msi.o
6obj-$(CONFIG_MPIC) += mpic.o $(mpic-msi-obj-y) 6obj-$(CONFIG_MPIC) += mpic.o $(mpic-msi-obj-y)
7fsl-msi-obj-$(CONFIG_PCI_MSI) += fsl_msi.o 7fsl-msi-obj-$(CONFIG_PCI_MSI) += fsl_msi.o
8obj-$(CONFIG_PPC_MSI_BITMAP) += msi_bitmap.o
8 9
9obj-$(CONFIG_PPC_MPC106) += grackle.o 10obj-$(CONFIG_PPC_MPC106) += grackle.o
10obj-$(CONFIG_PPC_DCR_NATIVE) += dcr-low.o 11obj-$(CONFIG_PPC_DCR_NATIVE) += dcr-low.o
@@ -15,6 +16,7 @@ obj-$(CONFIG_FSL_SOC) += fsl_soc.o
15obj-$(CONFIG_FSL_PCI) += fsl_pci.o $(fsl-msi-obj-y) 16obj-$(CONFIG_FSL_PCI) += fsl_pci.o $(fsl-msi-obj-y)
16obj-$(CONFIG_FSL_LBC) += fsl_lbc.o 17obj-$(CONFIG_FSL_LBC) += fsl_lbc.o
17obj-$(CONFIG_FSL_GTM) += fsl_gtm.o 18obj-$(CONFIG_FSL_GTM) += fsl_gtm.o
19obj-$(CONFIG_MPC8xxx_GPIO) += mpc8xxx_gpio.o
18obj-$(CONFIG_RAPIDIO) += fsl_rio.o 20obj-$(CONFIG_RAPIDIO) += fsl_rio.o
19obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o 21obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o
20obj-$(CONFIG_QUICC_ENGINE) += qe_lib/ 22obj-$(CONFIG_QUICC_ENGINE) += qe_lib/
@@ -36,15 +38,12 @@ ifeq ($(CONFIG_PCI),y)
36obj-$(CONFIG_4xx) += ppc4xx_pci.o 38obj-$(CONFIG_4xx) += ppc4xx_pci.o
37endif 39endif
38 40
39# Temporary hack until we have migrated to asm-powerpc
40ifeq ($(ARCH),powerpc)
41obj-$(CONFIG_CPM) += cpm_common.o 41obj-$(CONFIG_CPM) += cpm_common.o
42obj-$(CONFIG_CPM2) += cpm2.o cpm2_pic.o 42obj-$(CONFIG_CPM2) += cpm2.o cpm2_pic.o
43obj-$(CONFIG_QUICC_ENGINE) += cpm_common.o 43obj-$(CONFIG_QUICC_ENGINE) += cpm_common.o
44obj-$(CONFIG_PPC_DCR) += dcr.o 44obj-$(CONFIG_PPC_DCR) += dcr.o
45obj-$(CONFIG_8xx) += mpc8xx_pic.o cpm1.o 45obj-$(CONFIG_8xx) += mpc8xx_pic.o cpm1.o
46obj-$(CONFIG_UCODE_PATCH) += micropatch.o 46obj-$(CONFIG_UCODE_PATCH) += micropatch.o
47endif
48 47
49ifeq ($(CONFIG_SUSPEND),y) 48ifeq ($(CONFIG_SUSPEND),y)
50obj-$(CONFIG_6xx) += 6xx-suspend.o 49obj-$(CONFIG_6xx) += 6xx-suspend.o
diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c
index 4a04823e8423..490473ce8103 100644
--- a/arch/powerpc/sysdev/cpm1.c
+++ b/arch/powerpc/sysdev/cpm1.c
@@ -546,15 +546,11 @@ static int cpm1_gpio16_get(struct gpio_chip *gc, unsigned int gpio)
546 return !!(in_be16(&iop->dat) & pin_mask); 546 return !!(in_be16(&iop->dat) & pin_mask);
547} 547}
548 548
549static void cpm1_gpio16_set(struct gpio_chip *gc, unsigned int gpio, int value) 549static void __cpm1_gpio16_set(struct of_mm_gpio_chip *mm_gc, u16 pin_mask,
550 int value)
550{ 551{
551 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
552 struct cpm1_gpio16_chip *cpm1_gc = to_cpm1_gpio16_chip(mm_gc); 552 struct cpm1_gpio16_chip *cpm1_gc = to_cpm1_gpio16_chip(mm_gc);
553 struct cpm_ioport16 __iomem *iop = mm_gc->regs; 553 struct cpm_ioport16 __iomem *iop = mm_gc->regs;
554 unsigned long flags;
555 u16 pin_mask = 1 << (15 - gpio);
556
557 spin_lock_irqsave(&cpm1_gc->lock, flags);
558 554
559 if (value) 555 if (value)
560 cpm1_gc->cpdata |= pin_mask; 556 cpm1_gc->cpdata |= pin_mask;
@@ -562,6 +558,18 @@ static void cpm1_gpio16_set(struct gpio_chip *gc, unsigned int gpio, int value)
562 cpm1_gc->cpdata &= ~pin_mask; 558 cpm1_gc->cpdata &= ~pin_mask;
563 559
564 out_be16(&iop->dat, cpm1_gc->cpdata); 560 out_be16(&iop->dat, cpm1_gc->cpdata);
561}
562
563static void cpm1_gpio16_set(struct gpio_chip *gc, unsigned int gpio, int value)
564{
565 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
566 struct cpm1_gpio16_chip *cpm1_gc = to_cpm1_gpio16_chip(mm_gc);
567 unsigned long flags;
568 u16 pin_mask = 1 << (15 - gpio);
569
570 spin_lock_irqsave(&cpm1_gc->lock, flags);
571
572 __cpm1_gpio16_set(mm_gc, pin_mask, value);
565 573
566 spin_unlock_irqrestore(&cpm1_gc->lock, flags); 574 spin_unlock_irqrestore(&cpm1_gc->lock, flags);
567} 575}
@@ -569,14 +577,17 @@ static void cpm1_gpio16_set(struct gpio_chip *gc, unsigned int gpio, int value)
569static int cpm1_gpio16_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) 577static int cpm1_gpio16_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
570{ 578{
571 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 579 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
580 struct cpm1_gpio16_chip *cpm1_gc = to_cpm1_gpio16_chip(mm_gc);
572 struct cpm_ioport16 __iomem *iop = mm_gc->regs; 581 struct cpm_ioport16 __iomem *iop = mm_gc->regs;
573 u16 pin_mask; 582 unsigned long flags;
583 u16 pin_mask = 1 << (15 - gpio);
574 584
575 pin_mask = 1 << (15 - gpio); 585 spin_lock_irqsave(&cpm1_gc->lock, flags);
576 586
577 setbits16(&iop->dir, pin_mask); 587 setbits16(&iop->dir, pin_mask);
588 __cpm1_gpio16_set(mm_gc, pin_mask, val);
578 589
579 cpm1_gpio16_set(gc, gpio, val); 590 spin_unlock_irqrestore(&cpm1_gc->lock, flags);
580 591
581 return 0; 592 return 0;
582} 593}
@@ -584,13 +595,17 @@ static int cpm1_gpio16_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
584static int cpm1_gpio16_dir_in(struct gpio_chip *gc, unsigned int gpio) 595static int cpm1_gpio16_dir_in(struct gpio_chip *gc, unsigned int gpio)
585{ 596{
586 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 597 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
598 struct cpm1_gpio16_chip *cpm1_gc = to_cpm1_gpio16_chip(mm_gc);
587 struct cpm_ioport16 __iomem *iop = mm_gc->regs; 599 struct cpm_ioport16 __iomem *iop = mm_gc->regs;
588 u16 pin_mask; 600 unsigned long flags;
601 u16 pin_mask = 1 << (15 - gpio);
589 602
590 pin_mask = 1 << (15 - gpio); 603 spin_lock_irqsave(&cpm1_gc->lock, flags);
591 604
592 clrbits16(&iop->dir, pin_mask); 605 clrbits16(&iop->dir, pin_mask);
593 606
607 spin_unlock_irqrestore(&cpm1_gc->lock, flags);
608
594 return 0; 609 return 0;
595} 610}
596 611
@@ -655,15 +670,11 @@ static int cpm1_gpio32_get(struct gpio_chip *gc, unsigned int gpio)
655 return !!(in_be32(&iop->dat) & pin_mask); 670 return !!(in_be32(&iop->dat) & pin_mask);
656} 671}
657 672
658static void cpm1_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value) 673static void __cpm1_gpio32_set(struct of_mm_gpio_chip *mm_gc, u32 pin_mask,
674 int value)
659{ 675{
660 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
661 struct cpm1_gpio32_chip *cpm1_gc = to_cpm1_gpio32_chip(mm_gc); 676 struct cpm1_gpio32_chip *cpm1_gc = to_cpm1_gpio32_chip(mm_gc);
662 struct cpm_ioport32b __iomem *iop = mm_gc->regs; 677 struct cpm_ioport32b __iomem *iop = mm_gc->regs;
663 unsigned long flags;
664 u32 pin_mask = 1 << (31 - gpio);
665
666 spin_lock_irqsave(&cpm1_gc->lock, flags);
667 678
668 if (value) 679 if (value)
669 cpm1_gc->cpdata |= pin_mask; 680 cpm1_gc->cpdata |= pin_mask;
@@ -671,6 +682,18 @@ static void cpm1_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)
671 cpm1_gc->cpdata &= ~pin_mask; 682 cpm1_gc->cpdata &= ~pin_mask;
672 683
673 out_be32(&iop->dat, cpm1_gc->cpdata); 684 out_be32(&iop->dat, cpm1_gc->cpdata);
685}
686
687static void cpm1_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)
688{
689 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
690 struct cpm1_gpio32_chip *cpm1_gc = to_cpm1_gpio32_chip(mm_gc);
691 unsigned long flags;
692 u32 pin_mask = 1 << (31 - gpio);
693
694 spin_lock_irqsave(&cpm1_gc->lock, flags);
695
696 __cpm1_gpio32_set(mm_gc, pin_mask, value);
674 697
675 spin_unlock_irqrestore(&cpm1_gc->lock, flags); 698 spin_unlock_irqrestore(&cpm1_gc->lock, flags);
676} 699}
@@ -678,14 +701,17 @@ static void cpm1_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)
678static int cpm1_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) 701static int cpm1_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
679{ 702{
680 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 703 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
704 struct cpm1_gpio32_chip *cpm1_gc = to_cpm1_gpio32_chip(mm_gc);
681 struct cpm_ioport32b __iomem *iop = mm_gc->regs; 705 struct cpm_ioport32b __iomem *iop = mm_gc->regs;
682 u32 pin_mask; 706 unsigned long flags;
707 u32 pin_mask = 1 << (31 - gpio);
683 708
684 pin_mask = 1 << (31 - gpio); 709 spin_lock_irqsave(&cpm1_gc->lock, flags);
685 710
686 setbits32(&iop->dir, pin_mask); 711 setbits32(&iop->dir, pin_mask);
712 __cpm1_gpio32_set(mm_gc, pin_mask, val);
687 713
688 cpm1_gpio32_set(gc, gpio, val); 714 spin_unlock_irqrestore(&cpm1_gc->lock, flags);
689 715
690 return 0; 716 return 0;
691} 717}
@@ -693,13 +719,17 @@ static int cpm1_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
693static int cpm1_gpio32_dir_in(struct gpio_chip *gc, unsigned int gpio) 719static int cpm1_gpio32_dir_in(struct gpio_chip *gc, unsigned int gpio)
694{ 720{
695 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); 721 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
722 struct cpm1_gpio32_chip *cpm1_gc = to_cpm1_gpio32_chip(mm_gc);
696 struct cpm_ioport32b __iomem *iop = mm_gc->regs; 723 struct cpm_ioport32b __iomem *iop = mm_gc->regs;
697 u32 pin_mask; 724 unsigned long flags;
725 u32 pin_mask = 1 << (31 - gpio);
698 726
699 pin_mask = 1 << (31 - gpio); 727 spin_lock_irqsave(&cpm1_gc->lock, flags);
700 728
701 clrbits32(&iop->dir, pin_mask); 729 clrbits32(&iop->dir, pin_mask);
702 730
731 spin_unlock_irqrestore(&cpm1_gc->lock, flags);
732
703 return 0; 733 return 0;
704} 734}
705 735
diff --git a/arch/powerpc/sysdev/fsl_lbc.c b/arch/powerpc/sysdev/fsl_lbc.c
index 422c8faef593..0494ee55920f 100644
--- a/arch/powerpc/sysdev/fsl_lbc.c
+++ b/arch/powerpc/sysdev/fsl_lbc.c
@@ -11,14 +11,19 @@
11 * (at your option) any later version. 11 * (at your option) any later version.
12 */ 12 */
13 13
14#include <linux/init.h>
15#include <linux/module.h>
14#include <linux/kernel.h> 16#include <linux/kernel.h>
17#include <linux/compiler.h>
18#include <linux/spinlock.h>
19#include <linux/types.h>
20#include <linux/io.h>
15#include <linux/of.h> 21#include <linux/of.h>
22#include <asm/prom.h>
16#include <asm/fsl_lbc.h> 23#include <asm/fsl_lbc.h>
17 24
18spinlock_t fsl_lbc_lock = __SPIN_LOCK_UNLOCKED(fsl_lbc_lock); 25static spinlock_t fsl_lbc_lock = __SPIN_LOCK_UNLOCKED(fsl_lbc_lock);
19 26static struct fsl_lbc_regs __iomem *fsl_lbc_regs;
20struct fsl_lbc_regs __iomem *fsl_lbc_regs;
21EXPORT_SYMBOL(fsl_lbc_regs);
22 27
23static char __initdata *compat_lbc[] = { 28static char __initdata *compat_lbc[] = {
24 "fsl,pq2-localbus", 29 "fsl,pq2-localbus",
@@ -127,3 +132,43 @@ int fsl_upm_find(phys_addr_t addr_base, struct fsl_upm *upm)
127 return 0; 132 return 0;
128} 133}
129EXPORT_SYMBOL(fsl_upm_find); 134EXPORT_SYMBOL(fsl_upm_find);
135
136/**
137 * fsl_upm_run_pattern - actually run an UPM pattern
138 * @upm: pointer to the fsl_upm structure obtained via fsl_upm_find
139 * @io_base: remapped pointer to where memory access should happen
140 * @mar: MAR register content during pattern execution
141 *
142 * This function triggers dummy write to the memory specified by the io_base,
143 * thus UPM pattern actually executed. Note that mar usage depends on the
144 * pre-programmed AMX bits in the UPM RAM.
145 */
146int fsl_upm_run_pattern(struct fsl_upm *upm, void __iomem *io_base, u32 mar)
147{
148 int ret = 0;
149 unsigned long flags;
150
151 spin_lock_irqsave(&fsl_lbc_lock, flags);
152
153 out_be32(&fsl_lbc_regs->mar, mar << (32 - upm->width));
154
155 switch (upm->width) {
156 case 8:
157 out_8(io_base, 0x0);
158 break;
159 case 16:
160 out_be16(io_base, 0x0);
161 break;
162 case 32:
163 out_be32(io_base, 0x0);
164 break;
165 default:
166 ret = -EINVAL;
167 break;
168 }
169
170 spin_unlock_irqrestore(&fsl_lbc_lock, flags);
171
172 return ret;
173}
174EXPORT_SYMBOL(fsl_upm_run_pattern);
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c
index 2c5187cc8a24..f25ce818d40a 100644
--- a/arch/powerpc/sysdev/fsl_msi.c
+++ b/arch/powerpc/sysdev/fsl_msi.c
@@ -14,7 +14,6 @@
14 */ 14 */
15#include <linux/irq.h> 15#include <linux/irq.h>
16#include <linux/bootmem.h> 16#include <linux/bootmem.h>
17#include <linux/bitmap.h>
18#include <linux/msi.h> 17#include <linux/msi.h>
19#include <linux/pci.h> 18#include <linux/pci.h>
20#include <linux/of_platform.h> 19#include <linux/of_platform.h>
@@ -67,95 +66,22 @@ static struct irq_host_ops fsl_msi_host_ops = {
67 .map = fsl_msi_host_map, 66 .map = fsl_msi_host_map,
68}; 67};
69 68
70static irq_hw_number_t fsl_msi_alloc_hwirqs(struct fsl_msi *msi, int num)
71{
72 unsigned long flags;
73 int order = get_count_order(num);
74 int offset;
75
76 spin_lock_irqsave(&msi->bitmap_lock, flags);
77
78 offset = bitmap_find_free_region(msi->fsl_msi_bitmap,
79 NR_MSI_IRQS, order);
80
81 spin_unlock_irqrestore(&msi->bitmap_lock, flags);
82
83 pr_debug("%s: allocated 0x%x (2^%d) at offset 0x%x\n",
84 __func__, num, order, offset);
85
86 return offset;
87}
88
89static void fsl_msi_free_hwirqs(struct fsl_msi *msi, int offset, int num)
90{
91 unsigned long flags;
92 int order = get_count_order(num);
93
94 pr_debug("%s: freeing 0x%x (2^%d) at offset 0x%x\n",
95 __func__, num, order, offset);
96
97 spin_lock_irqsave(&msi->bitmap_lock, flags);
98 bitmap_release_region(msi->fsl_msi_bitmap, offset, order);
99 spin_unlock_irqrestore(&msi->bitmap_lock, flags);
100}
101
102static int fsl_msi_free_dt_hwirqs(struct fsl_msi *msi)
103{
104 int i;
105 int len;
106 const u32 *p;
107
108 bitmap_allocate_region(msi->fsl_msi_bitmap, 0,
109 get_count_order(NR_MSI_IRQS));
110
111 p = of_get_property(msi->of_node, "msi-available-ranges", &len);
112
113 if (!p) {
114 /* No msi-available-ranges property,
115 * All the 256 MSI interrupts can be used
116 */
117 fsl_msi_free_hwirqs(msi, 0, 0x100);
118 return 0;
119 }
120
121 if ((len % (2 * sizeof(u32))) != 0) {
122 printk(KERN_WARNING "fsl_msi: Malformed msi-available-ranges "
123 "property on %s\n", msi->of_node->full_name);
124 return -EINVAL;
125 }
126
127 /* Format is: (<u32 start> <u32 count>)+ */
128 len /= 2 * sizeof(u32);
129 for (i = 0; i < len; i++, p += 2)
130 fsl_msi_free_hwirqs(msi, *p, *(p + 1));
131
132 return 0;
133}
134
135static int fsl_msi_init_allocator(struct fsl_msi *msi_data) 69static int fsl_msi_init_allocator(struct fsl_msi *msi_data)
136{ 70{
137 int rc; 71 int rc;
138 int size = BITS_TO_LONGS(NR_MSI_IRQS) * sizeof(u32);
139 72
140 msi_data->fsl_msi_bitmap = kzalloc(size, GFP_KERNEL); 73 rc = msi_bitmap_alloc(&msi_data->bitmap, NR_MSI_IRQS,
74 msi_data->irqhost->of_node);
75 if (rc)
76 return rc;
141 77
142 if (msi_data->fsl_msi_bitmap == NULL) { 78 rc = msi_bitmap_reserve_dt_hwirqs(&msi_data->bitmap);
143 pr_debug("%s: ENOMEM allocating allocator bitmap!\n", 79 if (rc < 0) {
144 __func__); 80 msi_bitmap_free(&msi_data->bitmap);
145 return -ENOMEM; 81 return rc;
146 } 82 }
147 83
148 rc = fsl_msi_free_dt_hwirqs(msi_data);
149 if (rc)
150 goto out_free;
151
152 return 0; 84 return 0;
153out_free:
154 kfree(msi_data->fsl_msi_bitmap);
155
156 msi_data->fsl_msi_bitmap = NULL;
157 return rc;
158
159} 85}
160 86
161static int fsl_msi_check_device(struct pci_dev *pdev, int nvec, int type) 87static int fsl_msi_check_device(struct pci_dev *pdev, int nvec, int type)
@@ -175,7 +101,8 @@ static void fsl_teardown_msi_irqs(struct pci_dev *pdev)
175 if (entry->irq == NO_IRQ) 101 if (entry->irq == NO_IRQ)
176 continue; 102 continue;
177 set_irq_msi(entry->irq, NULL); 103 set_irq_msi(entry->irq, NULL);
178 fsl_msi_free_hwirqs(msi_data, virq_to_hw(entry->irq), 1); 104 msi_bitmap_free_hwirqs(&msi_data->bitmap,
105 virq_to_hw(entry->irq), 1);
179 irq_dispose_mapping(entry->irq); 106 irq_dispose_mapping(entry->irq);
180 } 107 }
181 108
@@ -197,15 +124,14 @@ static void fsl_compose_msi_msg(struct pci_dev *pdev, int hwirq,
197 124
198static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) 125static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
199{ 126{
200 irq_hw_number_t hwirq; 127 int rc, hwirq;
201 int rc;
202 unsigned int virq; 128 unsigned int virq;
203 struct msi_desc *entry; 129 struct msi_desc *entry;
204 struct msi_msg msg; 130 struct msi_msg msg;
205 struct fsl_msi *msi_data = fsl_msi; 131 struct fsl_msi *msi_data = fsl_msi;
206 132
207 list_for_each_entry(entry, &pdev->msi_list, list) { 133 list_for_each_entry(entry, &pdev->msi_list, list) {
208 hwirq = fsl_msi_alloc_hwirqs(msi_data, 1); 134 hwirq = msi_bitmap_alloc_hwirqs(&msi_data->bitmap, 1);
209 if (hwirq < 0) { 135 if (hwirq < 0) {
210 rc = hwirq; 136 rc = hwirq;
211 pr_debug("%s: fail allocating msi interrupt\n", 137 pr_debug("%s: fail allocating msi interrupt\n",
@@ -216,9 +142,9 @@ static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
216 virq = irq_create_mapping(msi_data->irqhost, hwirq); 142 virq = irq_create_mapping(msi_data->irqhost, hwirq);
217 143
218 if (virq == NO_IRQ) { 144 if (virq == NO_IRQ) {
219 pr_debug("%s: fail mapping hwirq 0x%lx\n", 145 pr_debug("%s: fail mapping hwirq 0x%x\n",
220 __func__, hwirq); 146 __func__, hwirq);
221 fsl_msi_free_hwirqs(msi_data, hwirq, 1); 147 msi_bitmap_free_hwirqs(&msi_data->bitmap, hwirq, 1);
222 rc = -ENOSPC; 148 rc = -ENOSPC;
223 goto out_free; 149 goto out_free;
224 } 150 }
@@ -317,14 +243,11 @@ static int __devinit fsl_of_msi_probe(struct of_device *dev,
317 goto error_out; 243 goto error_out;
318 } 244 }
319 245
320 msi->of_node = of_node_get(dev->node); 246 msi->irqhost = irq_alloc_host(dev->node, IRQ_HOST_MAP_LINEAR,
247 NR_MSI_IRQS, &fsl_msi_host_ops, 0);
321 248
322 msi->irqhost = irq_alloc_host(of_node_get(dev->node),
323 IRQ_HOST_MAP_LINEAR,
324 NR_MSI_IRQS, &fsl_msi_host_ops, 0);
325 if (msi->irqhost == NULL) { 249 if (msi->irqhost == NULL) {
326 dev_err(&dev->dev, "No memory for MSI irqhost\n"); 250 dev_err(&dev->dev, "No memory for MSI irqhost\n");
327 of_node_put(dev->node);
328 err = -ENOMEM; 251 err = -ENOMEM;
329 goto error_out; 252 goto error_out;
330 } 253 }
diff --git a/arch/powerpc/sysdev/fsl_msi.h b/arch/powerpc/sysdev/fsl_msi.h
index a653468521fa..331c7e7025b7 100644
--- a/arch/powerpc/sysdev/fsl_msi.h
+++ b/arch/powerpc/sysdev/fsl_msi.h
@@ -13,6 +13,8 @@
13#ifndef _POWERPC_SYSDEV_FSL_MSI_H 13#ifndef _POWERPC_SYSDEV_FSL_MSI_H
14#define _POWERPC_SYSDEV_FSL_MSI_H 14#define _POWERPC_SYSDEV_FSL_MSI_H
15 15
16#include <asm/msi_bitmap.h>
17
16#define NR_MSI_REG 8 18#define NR_MSI_REG 8
17#define IRQS_PER_MSI_REG 32 19#define IRQS_PER_MSI_REG 32
18#define NR_MSI_IRQS (NR_MSI_REG * IRQS_PER_MSI_REG) 20#define NR_MSI_IRQS (NR_MSI_REG * IRQS_PER_MSI_REG)
@@ -22,9 +24,6 @@
22#define FSL_PIC_IP_IPIC 0x00000002 24#define FSL_PIC_IP_IPIC 0x00000002
23 25
24struct fsl_msi { 26struct fsl_msi {
25 /* Device node of the MSI interrupt*/
26 struct device_node *of_node;
27
28 struct irq_host *irqhost; 27 struct irq_host *irqhost;
29 28
30 unsigned long cascade_irq; 29 unsigned long cascade_irq;
@@ -34,8 +33,7 @@ struct fsl_msi {
34 void __iomem *msi_regs; 33 void __iomem *msi_regs;
35 u32 feature; 34 u32 feature;
36 35
37 unsigned long *fsl_msi_bitmap; 36 struct msi_bitmap bitmap;
38 spinlock_t bitmap_lock;
39}; 37};
40 38
41#endif /* _POWERPC_SYSDEV_FSL_MSI_H */ 39#endif /* _POWERPC_SYSDEV_FSL_MSI_H */
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 61e6d77efa4f..5b264eb4b1f7 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * MPC85xx/86xx PCI/PCIE support routing. 2 * MPC83xx/85xx/86xx PCI/PCIE support routing.
3 * 3 *
4 * Copyright 2007 Freescale Semiconductor, Inc 4 * Copyright 2007,2008 Freescale Semiconductor, Inc
5 * 5 *
6 * Initial author: Xianghua Xiao <x.xiao@freescale.com> 6 * Initial author: Xianghua Xiao <x.xiao@freescale.com>
7 * Recode: ZHANG WEI <wei.zhang@freescale.com> 7 * Recode: ZHANG WEI <wei.zhang@freescale.com>
@@ -251,20 +251,47 @@ DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641D, quirk_fsl_pcie_header);
251DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8610, quirk_fsl_pcie_header); 251DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8610, quirk_fsl_pcie_header);
252#endif /* CONFIG_PPC_85xx || CONFIG_PPC_86xx */ 252#endif /* CONFIG_PPC_85xx || CONFIG_PPC_86xx */
253 253
254#if defined(CONFIG_PPC_83xx) 254#if defined(CONFIG_PPC_83xx) || defined(CONFIG_PPC_MPC512x)
255int __init mpc83xx_add_bridge(struct device_node *dev) 255int __init mpc83xx_add_bridge(struct device_node *dev)
256{ 256{
257 int len; 257 int len;
258 struct pci_controller *hose; 258 struct pci_controller *hose;
259 struct resource rsrc; 259 struct resource rsrc_reg;
260 struct resource rsrc_cfg;
260 const int *bus_range; 261 const int *bus_range;
261 int primary = 1, has_address = 0; 262 int primary;
262 phys_addr_t immr = get_immrbase();
263 263
264 pr_debug("Adding PCI host bridge %s\n", dev->full_name); 264 pr_debug("Adding PCI host bridge %s\n", dev->full_name);
265 265
266 /* Fetch host bridge registers address */ 266 /* Fetch host bridge registers address */
267 has_address = (of_address_to_resource(dev, 0, &rsrc) == 0); 267 if (of_address_to_resource(dev, 0, &rsrc_reg)) {
268 printk(KERN_WARNING "Can't get pci register base!\n");
269 return -ENOMEM;
270 }
271
272 memset(&rsrc_cfg, 0, sizeof(rsrc_cfg));
273
274 if (of_address_to_resource(dev, 1, &rsrc_cfg)) {
275 printk(KERN_WARNING
276 "No pci config register base in dev tree, "
277 "using default\n");
278 /*
279 * MPC83xx supports up to two host controllers
280 * one at 0x8500 has config space registers at 0x8300
281 * one at 0x8600 has config space registers at 0x8380
282 */
283 if ((rsrc_reg.start & 0xfffff) == 0x8500)
284 rsrc_cfg.start = (rsrc_reg.start & 0xfff00000) + 0x8300;
285 else if ((rsrc_reg.start & 0xfffff) == 0x8600)
286 rsrc_cfg.start = (rsrc_reg.start & 0xfff00000) + 0x8380;
287 }
288 /*
289 * Controller at offset 0x8500 is primary
290 */
291 if ((rsrc_reg.start & 0xfffff) == 0x8500)
292 primary = 1;
293 else
294 primary = 0;
268 295
269 /* Get bus range if any */ 296 /* Get bus range if any */
270 bus_range = of_get_property(dev, "bus-range", &len); 297 bus_range = of_get_property(dev, "bus-range", &len);
@@ -281,22 +308,11 @@ int __init mpc83xx_add_bridge(struct device_node *dev)
281 hose->first_busno = bus_range ? bus_range[0] : 0; 308 hose->first_busno = bus_range ? bus_range[0] : 0;
282 hose->last_busno = bus_range ? bus_range[1] : 0xff; 309 hose->last_busno = bus_range ? bus_range[1] : 0xff;
283 310
284 /* MPC83xx supports up to two host controllers one at 0x8500 from immrbar 311 setup_indirect_pci(hose, rsrc_cfg.start, rsrc_cfg.start + 4, 0);
285 * the other at 0x8600, we consider the 0x8500 the primary controller
286 */
287 /* PCI 1 */
288 if ((rsrc.start & 0xfffff) == 0x8500) {
289 setup_indirect_pci(hose, immr + 0x8300, immr + 0x8304, 0);
290 }
291 /* PCI 2 */
292 if ((rsrc.start & 0xfffff) == 0x8600) {
293 setup_indirect_pci(hose, immr + 0x8380, immr + 0x8384, 0);
294 primary = 0;
295 }
296 312
297 printk(KERN_INFO "Found MPC83xx PCI host bridge at 0x%016llx. " 313 printk(KERN_INFO "Found FSL PCI host bridge at 0x%016llx. "
298 "Firmware bus number: %d->%d\n", 314 "Firmware bus number: %d->%d\n",
299 (unsigned long long)rsrc.start, hose->first_busno, 315 (unsigned long long)rsrc_reg.start, hose->first_busno,
300 hose->last_busno); 316 hose->last_busno);
301 317
302 pr_debug(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n", 318 pr_debug(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n",
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index 214388e11807..01b884b25696 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -412,53 +412,6 @@ err:
412 412
413arch_initcall(gfar_of_init); 413arch_initcall(gfar_of_init);
414 414
415
416#ifdef CONFIG_PPC_83xx
417static int __init mpc83xx_wdt_init(void)
418{
419 struct resource r;
420 struct device_node *np;
421 struct platform_device *dev;
422 u32 freq = fsl_get_sys_freq();
423 int ret;
424
425 np = of_find_compatible_node(NULL, "watchdog", "mpc83xx_wdt");
426
427 if (!np) {
428 ret = -ENODEV;
429 goto nodev;
430 }
431
432 memset(&r, 0, sizeof(r));
433
434 ret = of_address_to_resource(np, 0, &r);
435 if (ret)
436 goto err;
437
438 dev = platform_device_register_simple("mpc83xx_wdt", 0, &r, 1);
439 if (IS_ERR(dev)) {
440 ret = PTR_ERR(dev);
441 goto err;
442 }
443
444 ret = platform_device_add_data(dev, &freq, sizeof(freq));
445 if (ret)
446 goto unreg;
447
448 of_node_put(np);
449 return 0;
450
451unreg:
452 platform_device_unregister(dev);
453err:
454 of_node_put(np);
455nodev:
456 return ret;
457}
458
459arch_initcall(mpc83xx_wdt_init);
460#endif
461
462static enum fsl_usb2_phy_modes determine_usb_phy(const char *phy_type) 415static enum fsl_usb2_phy_modes determine_usb_phy(const char *phy_type)
463{ 416{
464 if (!phy_type) 417 if (!phy_type)
@@ -767,42 +720,6 @@ void fsl_rstcr_restart(char *cmd)
767#endif 720#endif
768 721
769#if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) 722#if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
770struct platform_diu_data_ops diu_ops = { 723struct platform_diu_data_ops diu_ops;
771 .diu_size = 1280 * 1024 * 4, /* default one 1280x1024 buffer */
772};
773EXPORT_SYMBOL(diu_ops); 724EXPORT_SYMBOL(diu_ops);
774
775int __init preallocate_diu_videomemory(void)
776{
777 pr_debug("diu_size=%lu\n", diu_ops.diu_size);
778
779 diu_ops.diu_mem = __alloc_bootmem(diu_ops.diu_size, 8, 0);
780 if (!diu_ops.diu_mem) {
781 printk(KERN_ERR "fsl-diu: cannot allocate %lu bytes\n",
782 diu_ops.diu_size);
783 return -ENOMEM;
784 }
785
786 pr_debug("diu_mem=%p\n", diu_ops.diu_mem);
787
788 rh_init(&diu_ops.diu_rh_info, 4096, ARRAY_SIZE(diu_ops.diu_rh_block),
789 diu_ops.diu_rh_block);
790 return rh_attach_region(&diu_ops.diu_rh_info,
791 (unsigned long) diu_ops.diu_mem,
792 diu_ops.diu_size);
793}
794
795static int __init early_parse_diufb(char *p)
796{
797 if (!p)
798 return 1;
799
800 diu_ops.diu_size = _ALIGN_UP(memparse(p, &p), 8);
801
802 pr_debug("diu_size=%lu\n", diu_ops.diu_size);
803
804 return 0;
805}
806early_param("diufb", early_parse_diufb);
807
808#endif 725#endif
diff --git a/arch/powerpc/sysdev/fsl_soc.h b/arch/powerpc/sysdev/fsl_soc.h
index 024299887352..60f7f227327c 100644
--- a/arch/powerpc/sysdev/fsl_soc.h
+++ b/arch/powerpc/sysdev/fsl_soc.h
@@ -20,14 +20,7 @@ extern int fsl_spi_init(struct spi_board_info *board_infos,
20extern void fsl_rstcr_restart(char *cmd); 20extern void fsl_rstcr_restart(char *cmd);
21 21
22#if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) 22#if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
23#include <linux/bootmem.h>
24#include <asm/rheap.h>
25struct platform_diu_data_ops { 23struct platform_diu_data_ops {
26 rh_block_t diu_rh_block[16];
27 rh_info_t diu_rh_info;
28 unsigned long diu_size;
29 void *diu_mem;
30
31 unsigned int (*get_pixel_format) (unsigned int bits_per_pixel, 24 unsigned int (*get_pixel_format) (unsigned int bits_per_pixel,
32 int monitor_port); 25 int monitor_port);
33 void (*set_gamma_table) (int monitor_port, char *gamma_table_base); 26 void (*set_gamma_table) (int monitor_port, char *gamma_table_base);
@@ -38,7 +31,6 @@ struct platform_diu_data_ops {
38}; 31};
39 32
40extern struct platform_diu_data_ops diu_ops; 33extern struct platform_diu_data_ops diu_ops;
41int __init preallocate_diu_videomemory(void);
42#endif 34#endif
43 35
44#endif 36#endif
diff --git a/arch/powerpc/sysdev/mpc8xxx_gpio.c b/arch/powerpc/sysdev/mpc8xxx_gpio.c
new file mode 100644
index 000000000000..103eace36194
--- /dev/null
+++ b/arch/powerpc/sysdev/mpc8xxx_gpio.c
@@ -0,0 +1,171 @@
1/*
2 * GPIOs on MPC8349/8572/8610 and compatible
3 *
4 * Copyright (C) 2008 Peter Korsgaard <jacmet@sunsite.dk>
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/spinlock.h>
14#include <linux/io.h>
15#include <linux/of.h>
16#include <linux/of_gpio.h>
17#include <linux/gpio.h>
18
19#define MPC8XXX_GPIO_PINS 32
20
21#define GPIO_DIR 0x00
22#define GPIO_ODR 0x04
23#define GPIO_DAT 0x08
24#define GPIO_IER 0x0c
25#define GPIO_IMR 0x10
26#define GPIO_ICR 0x14
27
28struct mpc8xxx_gpio_chip {
29 struct of_mm_gpio_chip mm_gc;
30 spinlock_t lock;
31
32 /*
33 * shadowed data register to be able to clear/set output pins in
34 * open drain mode safely
35 */
36 u32 data;
37};
38
39static inline u32 mpc8xxx_gpio2mask(unsigned int gpio)
40{
41 return 1u << (MPC8XXX_GPIO_PINS - 1 - gpio);
42}
43
44static inline struct mpc8xxx_gpio_chip *
45to_mpc8xxx_gpio_chip(struct of_mm_gpio_chip *mm)
46{
47 return container_of(mm, struct mpc8xxx_gpio_chip, mm_gc);
48}
49
50static void mpc8xxx_gpio_save_regs(struct of_mm_gpio_chip *mm)
51{
52 struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);
53
54 mpc8xxx_gc->data = in_be32(mm->regs + GPIO_DAT);
55}
56
57static int mpc8xxx_gpio_get(struct gpio_chip *gc, unsigned int gpio)
58{
59 struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc);
60
61 return in_be32(mm->regs + GPIO_DAT) & mpc8xxx_gpio2mask(gpio);
62}
63
64static void mpc8xxx_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
65{
66 struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc);
67 struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);
68 unsigned long flags;
69
70 spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
71
72 if (val)
73 mpc8xxx_gc->data |= mpc8xxx_gpio2mask(gpio);
74 else
75 mpc8xxx_gc->data &= ~mpc8xxx_gpio2mask(gpio);
76
77 out_be32(mm->regs + GPIO_DAT, mpc8xxx_gc->data);
78
79 spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
80}
81
82static int mpc8xxx_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
83{
84 struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc);
85 struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);
86 unsigned long flags;
87
88 spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
89
90 clrbits32(mm->regs + GPIO_DIR, mpc8xxx_gpio2mask(gpio));
91
92 spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
93
94 return 0;
95}
96
97static int mpc8xxx_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
98{
99 struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc);
100 struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);
101 unsigned long flags;
102
103 mpc8xxx_gpio_set(gc, gpio, val);
104
105 spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
106
107 setbits32(mm->regs + GPIO_DIR, mpc8xxx_gpio2mask(gpio));
108
109 spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
110
111 return 0;
112}
113
114static void __init mpc8xxx_add_controller(struct device_node *np)
115{
116 struct mpc8xxx_gpio_chip *mpc8xxx_gc;
117 struct of_mm_gpio_chip *mm_gc;
118 struct of_gpio_chip *of_gc;
119 struct gpio_chip *gc;
120 int ret;
121
122 mpc8xxx_gc = kzalloc(sizeof(*mpc8xxx_gc), GFP_KERNEL);
123 if (!mpc8xxx_gc) {
124 ret = -ENOMEM;
125 goto err;
126 }
127
128 spin_lock_init(&mpc8xxx_gc->lock);
129
130 mm_gc = &mpc8xxx_gc->mm_gc;
131 of_gc = &mm_gc->of_gc;
132 gc = &of_gc->gc;
133
134 mm_gc->save_regs = mpc8xxx_gpio_save_regs;
135 of_gc->gpio_cells = 2;
136 gc->ngpio = MPC8XXX_GPIO_PINS;
137 gc->direction_input = mpc8xxx_gpio_dir_in;
138 gc->direction_output = mpc8xxx_gpio_dir_out;
139 gc->get = mpc8xxx_gpio_get;
140 gc->set = mpc8xxx_gpio_set;
141
142 ret = of_mm_gpiochip_add(np, mm_gc);
143 if (ret)
144 goto err;
145
146 return;
147
148err:
149 pr_err("%s: registration failed with status %d\n",
150 np->full_name, ret);
151 kfree(mpc8xxx_gc);
152
153 return;
154}
155
156static int __init mpc8xxx_add_gpiochips(void)
157{
158 struct device_node *np;
159
160 for_each_compatible_node(np, NULL, "fsl,mpc8349-gpio")
161 mpc8xxx_add_controller(np);
162
163 for_each_compatible_node(np, NULL, "fsl,mpc8572-gpio")
164 mpc8xxx_add_controller(np);
165
166 for_each_compatible_node(np, NULL, "fsl,mpc8610-gpio")
167 mpc8xxx_add_controller(np);
168
169 return 0;
170}
171arch_initcall(mpc8xxx_add_gpiochips);
diff --git a/arch/powerpc/sysdev/mpic.h b/arch/powerpc/sysdev/mpic.h
index fbf8a266941c..6209c62a426d 100644
--- a/arch/powerpc/sysdev/mpic.h
+++ b/arch/powerpc/sysdev/mpic.h
@@ -14,8 +14,6 @@
14#ifdef CONFIG_PCI_MSI 14#ifdef CONFIG_PCI_MSI
15extern void mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq); 15extern void mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq);
16extern int mpic_msi_init_allocator(struct mpic *mpic); 16extern int mpic_msi_init_allocator(struct mpic *mpic);
17extern irq_hw_number_t mpic_msi_alloc_hwirqs(struct mpic *mpic, int num);
18extern void mpic_msi_free_hwirqs(struct mpic *mpic, int offset, int num);
19extern int mpic_u3msi_init(struct mpic *mpic); 17extern int mpic_u3msi_init(struct mpic *mpic);
20extern int mpic_pasemi_msi_init(struct mpic *mpic); 18extern int mpic_pasemi_msi_init(struct mpic *mpic);
21#else 19#else
diff --git a/arch/powerpc/sysdev/mpic_msi.c b/arch/powerpc/sysdev/mpic_msi.c
index de3e5e8bc324..1d44eee80fa1 100644
--- a/arch/powerpc/sysdev/mpic_msi.c
+++ b/arch/powerpc/sysdev/mpic_msi.c
@@ -15,59 +15,17 @@
15#include <asm/prom.h> 15#include <asm/prom.h>
16#include <asm/hw_irq.h> 16#include <asm/hw_irq.h>
17#include <asm/ppc-pci.h> 17#include <asm/ppc-pci.h>
18#include <asm/msi_bitmap.h>
18 19
19#include <sysdev/mpic.h> 20#include <sysdev/mpic.h>
20 21
21static void __mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq)
22{
23 pr_debug("mpic: reserving hwirq 0x%lx\n", hwirq);
24 bitmap_allocate_region(mpic->hwirq_bitmap, hwirq, 0);
25}
26
27void mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq) 22void mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq)
28{ 23{
29 unsigned long flags;
30
31 /* The mpic calls this even when there is no allocator setup */ 24 /* The mpic calls this even when there is no allocator setup */
32 if (!mpic->hwirq_bitmap) 25 if (!mpic->msi_bitmap.bitmap)
33 return; 26 return;
34 27
35 spin_lock_irqsave(&mpic->bitmap_lock, flags); 28 msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, hwirq);
36 __mpic_msi_reserve_hwirq(mpic, hwirq);
37 spin_unlock_irqrestore(&mpic->bitmap_lock, flags);
38}
39
40irq_hw_number_t mpic_msi_alloc_hwirqs(struct mpic *mpic, int num)
41{
42 unsigned long flags;
43 int offset, order = get_count_order(num);
44
45 spin_lock_irqsave(&mpic->bitmap_lock, flags);
46 /*
47 * This is fast, but stricter than we need. We might want to add
48 * a fallback routine which does a linear search with no alignment.
49 */
50 offset = bitmap_find_free_region(mpic->hwirq_bitmap, mpic->irq_count,
51 order);
52 spin_unlock_irqrestore(&mpic->bitmap_lock, flags);
53
54 pr_debug("mpic: allocated 0x%x (2^%d) at offset 0x%x\n",
55 num, order, offset);
56
57 return offset;
58}
59
60void mpic_msi_free_hwirqs(struct mpic *mpic, int offset, int num)
61{
62 unsigned long flags;
63 int order = get_count_order(num);
64
65 pr_debug("mpic: freeing 0x%x (2^%d) at offset 0x%x\n",
66 num, order, offset);
67
68 spin_lock_irqsave(&mpic->bitmap_lock, flags);
69 bitmap_release_region(mpic->hwirq_bitmap, offset, order);
70 spin_unlock_irqrestore(&mpic->bitmap_lock, flags);
71} 29}
72 30
73#ifdef CONFIG_MPIC_U3_HT_IRQS 31#ifdef CONFIG_MPIC_U3_HT_IRQS
@@ -83,13 +41,13 @@ static int mpic_msi_reserve_u3_hwirqs(struct mpic *mpic)
83 41
84 /* Reserve source numbers we know are reserved in the HW */ 42 /* Reserve source numbers we know are reserved in the HW */
85 for (i = 0; i < 8; i++) 43 for (i = 0; i < 8; i++)
86 __mpic_msi_reserve_hwirq(mpic, i); 44 msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i);
87 45
88 for (i = 42; i < 46; i++) 46 for (i = 42; i < 46; i++)
89 __mpic_msi_reserve_hwirq(mpic, i); 47 msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i);
90 48
91 for (i = 100; i < 105; i++) 49 for (i = 100; i < 105; i++)
92 __mpic_msi_reserve_hwirq(mpic, i); 50 msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i);
93 51
94 np = NULL; 52 np = NULL;
95 while ((np = of_find_all_nodes(np))) { 53 while ((np = of_find_all_nodes(np))) {
@@ -99,7 +57,7 @@ static int mpic_msi_reserve_u3_hwirqs(struct mpic *mpic)
99 while (of_irq_map_one(np, index++, &oirq) == 0) { 57 while (of_irq_map_one(np, index++, &oirq) == 0) {
100 ops->xlate(mpic->irqhost, NULL, oirq.specifier, 58 ops->xlate(mpic->irqhost, NULL, oirq.specifier,
101 oirq.size, &hwirq, &flags); 59 oirq.size, &hwirq, &flags);
102 __mpic_msi_reserve_hwirq(mpic, hwirq); 60 msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, hwirq);
103 } 61 }
104 } 62 }
105 63
@@ -112,70 +70,25 @@ static int mpic_msi_reserve_u3_hwirqs(struct mpic *mpic)
112} 70}
113#endif 71#endif
114 72
115static int mpic_msi_reserve_dt_hwirqs(struct mpic *mpic)
116{
117 int i, len;
118 const u32 *p;
119
120 p = of_get_property(mpic->irqhost->of_node,
121 "msi-available-ranges", &len);
122 if (!p) {
123 pr_debug("mpic: no msi-available-ranges property found on %s\n",
124 mpic->irqhost->of_node->full_name);
125 return -ENODEV;
126 }
127
128 if (len % 8 != 0) {
129 printk(KERN_WARNING "mpic: Malformed msi-available-ranges "
130 "property on %s\n", mpic->irqhost->of_node->full_name);
131 return -EINVAL;
132 }
133
134 bitmap_allocate_region(mpic->hwirq_bitmap, 0,
135 get_count_order(mpic->irq_count));
136
137 /* Format is: (<u32 start> <u32 count>)+ */
138 len /= sizeof(u32);
139 for (i = 0; i < len / 2; i++, p += 2)
140 mpic_msi_free_hwirqs(mpic, *p, *(p + 1));
141
142 return 0;
143}
144
145int mpic_msi_init_allocator(struct mpic *mpic) 73int mpic_msi_init_allocator(struct mpic *mpic)
146{ 74{
147 int rc, size; 75 int rc;
148
149 BUG_ON(mpic->hwirq_bitmap);
150 spin_lock_init(&mpic->bitmap_lock);
151 76
152 size = BITS_TO_LONGS(mpic->irq_count) * sizeof(long); 77 rc = msi_bitmap_alloc(&mpic->msi_bitmap, mpic->irq_count,
153 pr_debug("mpic: allocator bitmap size is 0x%x bytes\n", size); 78 mpic->irqhost->of_node);
79 if (rc)
80 return rc;
154 81
155 mpic->hwirq_bitmap = alloc_maybe_bootmem(size, GFP_KERNEL); 82 rc = msi_bitmap_reserve_dt_hwirqs(&mpic->msi_bitmap);
156 83 if (rc > 0) {
157 if (!mpic->hwirq_bitmap) {
158 pr_debug("mpic: ENOMEM allocating allocator bitmap!\n");
159 return -ENOMEM;
160 }
161
162 memset(mpic->hwirq_bitmap, 0, size);
163
164 rc = mpic_msi_reserve_dt_hwirqs(mpic);
165 if (rc) {
166 if (mpic->flags & MPIC_U3_HT_IRQS) 84 if (mpic->flags & MPIC_U3_HT_IRQS)
167 rc = mpic_msi_reserve_u3_hwirqs(mpic); 85 rc = mpic_msi_reserve_u3_hwirqs(mpic);
168 86
169 if (rc) 87 if (rc) {
170 goto out_free; 88 msi_bitmap_free(&mpic->msi_bitmap);
89 return rc;
90 }
171 } 91 }
172 92
173 return 0; 93 return 0;
174
175 out_free:
176 if (mem_init_done)
177 kfree(mpic->hwirq_bitmap);
178
179 mpic->hwirq_bitmap = NULL;
180 return rc;
181} 94}
diff --git a/arch/powerpc/sysdev/mpic_pasemi_msi.c b/arch/powerpc/sysdev/mpic_pasemi_msi.c
index 68aff6076675..656cb772b691 100644
--- a/arch/powerpc/sysdev/mpic_pasemi_msi.c
+++ b/arch/powerpc/sysdev/mpic_pasemi_msi.c
@@ -22,6 +22,7 @@
22#include <asm/prom.h> 22#include <asm/prom.h>
23#include <asm/hw_irq.h> 23#include <asm/hw_irq.h>
24#include <asm/ppc-pci.h> 24#include <asm/ppc-pci.h>
25#include <asm/msi_bitmap.h>
25 26
26#include "mpic.h" 27#include "mpic.h"
27 28
@@ -81,8 +82,8 @@ static void pasemi_msi_teardown_msi_irqs(struct pci_dev *pdev)
81 continue; 82 continue;
82 83
83 set_irq_msi(entry->irq, NULL); 84 set_irq_msi(entry->irq, NULL);
84 mpic_msi_free_hwirqs(msi_mpic, virq_to_hw(entry->irq), 85 msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap,
85 ALLOC_CHUNK); 86 virq_to_hw(entry->irq), ALLOC_CHUNK);
86 irq_dispose_mapping(entry->irq); 87 irq_dispose_mapping(entry->irq);
87 } 88 }
88 89
@@ -91,11 +92,10 @@ static void pasemi_msi_teardown_msi_irqs(struct pci_dev *pdev)
91 92
92static int pasemi_msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) 93static int pasemi_msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
93{ 94{
94 irq_hw_number_t hwirq;
95 unsigned int virq; 95 unsigned int virq;
96 struct msi_desc *entry; 96 struct msi_desc *entry;
97 struct msi_msg msg; 97 struct msi_msg msg;
98 int ret; 98 int hwirq;
99 99
100 pr_debug("pasemi_msi_setup_msi_irqs, pdev %p nvec %d type %d\n", 100 pr_debug("pasemi_msi_setup_msi_irqs, pdev %p nvec %d type %d\n",
101 pdev, nvec, type); 101 pdev, nvec, type);
@@ -109,17 +109,19 @@ static int pasemi_msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
109 * few MSIs for someone, but restrictions will apply to how the 109 * few MSIs for someone, but restrictions will apply to how the
110 * sources can be changed independently. 110 * sources can be changed independently.
111 */ 111 */
112 ret = mpic_msi_alloc_hwirqs(msi_mpic, ALLOC_CHUNK); 112 hwirq = msi_bitmap_alloc_hwirqs(&msi_mpic->msi_bitmap,
113 hwirq = ret; 113 ALLOC_CHUNK);
114 if (ret < 0) { 114 if (hwirq < 0) {
115 pr_debug("pasemi_msi: failed allocating hwirq\n"); 115 pr_debug("pasemi_msi: failed allocating hwirq\n");
116 return hwirq; 116 return hwirq;
117 } 117 }
118 118
119 virq = irq_create_mapping(msi_mpic->irqhost, hwirq); 119 virq = irq_create_mapping(msi_mpic->irqhost, hwirq);
120 if (virq == NO_IRQ) { 120 if (virq == NO_IRQ) {
121 pr_debug("pasemi_msi: failed mapping hwirq 0x%lx\n", hwirq); 121 pr_debug("pasemi_msi: failed mapping hwirq 0x%x\n",
122 mpic_msi_free_hwirqs(msi_mpic, hwirq, ALLOC_CHUNK); 122 hwirq);
123 msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap, hwirq,
124 ALLOC_CHUNK);
123 return -ENOSPC; 125 return -ENOSPC;
124 } 126 }
125 127
@@ -133,8 +135,8 @@ static int pasemi_msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
133 set_irq_chip(virq, &mpic_pasemi_msi_chip); 135 set_irq_chip(virq, &mpic_pasemi_msi_chip);
134 set_irq_type(virq, IRQ_TYPE_EDGE_RISING); 136 set_irq_type(virq, IRQ_TYPE_EDGE_RISING);
135 137
136 pr_debug("pasemi_msi: allocated virq 0x%x (hw 0x%lx) addr 0x%x\n", 138 pr_debug("pasemi_msi: allocated virq 0x%x (hw 0x%x) " \
137 virq, hwirq, msg.address_lo); 139 "addr 0x%x\n", virq, hwirq, msg.address_lo);
138 140
139 /* Likewise, the device writes [0...511] into the target 141 /* Likewise, the device writes [0...511] into the target
140 * register to generate MSI [512...1023] 142 * register to generate MSI [512...1023]
diff --git a/arch/powerpc/sysdev/mpic_u3msi.c b/arch/powerpc/sysdev/mpic_u3msi.c
index 6e2f8686fdfc..0a8f5a9e87c9 100644
--- a/arch/powerpc/sysdev/mpic_u3msi.c
+++ b/arch/powerpc/sysdev/mpic_u3msi.c
@@ -16,6 +16,7 @@
16#include <asm/prom.h> 16#include <asm/prom.h>
17#include <asm/hw_irq.h> 17#include <asm/hw_irq.h>
18#include <asm/ppc-pci.h> 18#include <asm/ppc-pci.h>
19#include <asm/msi_bitmap.h>
19 20
20#include "mpic.h" 21#include "mpic.h"
21 22
@@ -101,7 +102,8 @@ static void u3msi_teardown_msi_irqs(struct pci_dev *pdev)
101 continue; 102 continue;
102 103
103 set_irq_msi(entry->irq, NULL); 104 set_irq_msi(entry->irq, NULL);
104 mpic_msi_free_hwirqs(msi_mpic, virq_to_hw(entry->irq), 1); 105 msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap,
106 virq_to_hw(entry->irq), 1);
105 irq_dispose_mapping(entry->irq); 107 irq_dispose_mapping(entry->irq);
106 } 108 }
107 109
@@ -110,29 +112,27 @@ static void u3msi_teardown_msi_irqs(struct pci_dev *pdev)
110 112
111static int u3msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) 113static int u3msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
112{ 114{
113 irq_hw_number_t hwirq;
114 unsigned int virq; 115 unsigned int virq;
115 struct msi_desc *entry; 116 struct msi_desc *entry;
116 struct msi_msg msg; 117 struct msi_msg msg;
117 u64 addr; 118 u64 addr;
118 int ret; 119 int hwirq;
119 120
120 addr = find_ht_magic_addr(pdev); 121 addr = find_ht_magic_addr(pdev);
121 msg.address_lo = addr & 0xFFFFFFFF; 122 msg.address_lo = addr & 0xFFFFFFFF;
122 msg.address_hi = addr >> 32; 123 msg.address_hi = addr >> 32;
123 124
124 list_for_each_entry(entry, &pdev->msi_list, list) { 125 list_for_each_entry(entry, &pdev->msi_list, list) {
125 ret = mpic_msi_alloc_hwirqs(msi_mpic, 1); 126 hwirq = msi_bitmap_alloc_hwirqs(&msi_mpic->msi_bitmap, 1);
126 if (ret < 0) { 127 if (hwirq < 0) {
127 pr_debug("u3msi: failed allocating hwirq\n"); 128 pr_debug("u3msi: failed allocating hwirq\n");
128 return ret; 129 return hwirq;
129 } 130 }
130 hwirq = ret;
131 131
132 virq = irq_create_mapping(msi_mpic->irqhost, hwirq); 132 virq = irq_create_mapping(msi_mpic->irqhost, hwirq);
133 if (virq == NO_IRQ) { 133 if (virq == NO_IRQ) {
134 pr_debug("u3msi: failed mapping hwirq 0x%lx\n", hwirq); 134 pr_debug("u3msi: failed mapping hwirq 0x%x\n", hwirq);
135 mpic_msi_free_hwirqs(msi_mpic, hwirq, 1); 135 msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap, hwirq, 1);
136 return -ENOSPC; 136 return -ENOSPC;
137 } 137 }
138 138
@@ -140,8 +140,8 @@ static int u3msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
140 set_irq_chip(virq, &mpic_u3msi_chip); 140 set_irq_chip(virq, &mpic_u3msi_chip);
141 set_irq_type(virq, IRQ_TYPE_EDGE_RISING); 141 set_irq_type(virq, IRQ_TYPE_EDGE_RISING);
142 142
143 pr_debug("u3msi: allocated virq 0x%x (hw 0x%lx) addr 0x%lx\n", 143 pr_debug("u3msi: allocated virq 0x%x (hw 0x%x) addr 0x%lx\n",
144 virq, hwirq, addr); 144 virq, hwirq, (unsigned long)addr);
145 145
146 msg.data = hwirq; 146 msg.data = hwirq;
147 write_msi_msg(virq, &msg); 147 write_msi_msg(virq, &msg);
diff --git a/arch/powerpc/sysdev/msi_bitmap.c b/arch/powerpc/sysdev/msi_bitmap.c
new file mode 100644
index 000000000000..f84217b8863a
--- /dev/null
+++ b/arch/powerpc/sysdev/msi_bitmap.c
@@ -0,0 +1,247 @@
1/*
2 * Copyright 2006-2008, Michael Ellerman, IBM Corporation.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; version 2 of the
7 * License.
8 *
9 */
10
11#include <linux/kernel.h>
12#include <linux/bitmap.h>
13#include <asm/msi_bitmap.h>
14
15int msi_bitmap_alloc_hwirqs(struct msi_bitmap *bmp, int num)
16{
17 unsigned long flags;
18 int offset, order = get_count_order(num);
19
20 spin_lock_irqsave(&bmp->lock, flags);
21 /*
22 * This is fast, but stricter than we need. We might want to add
23 * a fallback routine which does a linear search with no alignment.
24 */
25 offset = bitmap_find_free_region(bmp->bitmap, bmp->irq_count, order);
26 spin_unlock_irqrestore(&bmp->lock, flags);
27
28 pr_debug("msi_bitmap: allocated 0x%x (2^%d) at offset 0x%x\n",
29 num, order, offset);
30
31 return offset;
32}
33
34void msi_bitmap_free_hwirqs(struct msi_bitmap *bmp, unsigned int offset,
35 unsigned int num)
36{
37 unsigned long flags;
38 int order = get_count_order(num);
39
40 pr_debug("msi_bitmap: freeing 0x%x (2^%d) at offset 0x%x\n",
41 num, order, offset);
42
43 spin_lock_irqsave(&bmp->lock, flags);
44 bitmap_release_region(bmp->bitmap, offset, order);
45 spin_unlock_irqrestore(&bmp->lock, flags);
46}
47
48void msi_bitmap_reserve_hwirq(struct msi_bitmap *bmp, unsigned int hwirq)
49{
50 unsigned long flags;
51
52 pr_debug("msi_bitmap: reserving hwirq 0x%x\n", hwirq);
53
54 spin_lock_irqsave(&bmp->lock, flags);
55 bitmap_allocate_region(bmp->bitmap, hwirq, 0);
56 spin_unlock_irqrestore(&bmp->lock, flags);
57}
58
59/**
60 * msi_bitmap_reserve_dt_hwirqs - Reserve irqs specified in the device tree.
61 * @bmp: pointer to the MSI bitmap.
62 *
63 * Looks in the device tree to see if there is a property specifying which
64 * irqs can be used for MSI. If found those irqs reserved in the device tree
65 * are reserved in the bitmap.
66 *
67 * Returns 0 for success, < 0 if there was an error, and > 0 if no property
68 * was found in the device tree.
69 **/
70int msi_bitmap_reserve_dt_hwirqs(struct msi_bitmap *bmp)
71{
72 int i, j, len;
73 const u32 *p;
74
75 if (!bmp->of_node)
76 return 1;
77
78 p = of_get_property(bmp->of_node, "msi-available-ranges", &len);
79 if (!p) {
80 pr_debug("msi_bitmap: no msi-available-ranges property " \
81 "found on %s\n", bmp->of_node->full_name);
82 return 1;
83 }
84
85 if (len % (2 * sizeof(u32)) != 0) {
86 printk(KERN_WARNING "msi_bitmap: Malformed msi-available-ranges"
87 " property on %s\n", bmp->of_node->full_name);
88 return -EINVAL;
89 }
90
91 bitmap_allocate_region(bmp->bitmap, 0, get_count_order(bmp->irq_count));
92
93 spin_lock(&bmp->lock);
94
95 /* Format is: (<u32 start> <u32 count>)+ */
96 len /= 2 * sizeof(u32);
97 for (i = 0; i < len; i++, p += 2) {
98 for (j = 0; j < *(p + 1); j++)
99 bitmap_release_region(bmp->bitmap, *p + j, 0);
100 }
101
102 spin_unlock(&bmp->lock);
103
104 return 0;
105}
106
107int msi_bitmap_alloc(struct msi_bitmap *bmp, unsigned int irq_count,
108 struct device_node *of_node)
109{
110 int size;
111
112 if (!irq_count)
113 return -EINVAL;
114
115 size = BITS_TO_LONGS(irq_count) * sizeof(long);
116 pr_debug("msi_bitmap: allocator bitmap size is 0x%x bytes\n", size);
117
118 bmp->bitmap = zalloc_maybe_bootmem(size, GFP_KERNEL);
119 if (!bmp->bitmap) {
120 pr_debug("msi_bitmap: ENOMEM allocating allocator bitmap!\n");
121 return -ENOMEM;
122 }
123
124 /* We zalloc'ed the bitmap, so all irqs are free by default */
125 spin_lock_init(&bmp->lock);
126 bmp->of_node = of_node_get(of_node);
127 bmp->irq_count = irq_count;
128
129 return 0;
130}
131
132void msi_bitmap_free(struct msi_bitmap *bmp)
133{
134 /* we can't free the bitmap we don't know if it's bootmem etc. */
135 of_node_put(bmp->of_node);
136 bmp->bitmap = NULL;
137}
138
139#ifdef CONFIG_MSI_BITMAP_SELFTEST
140
141#define check(x) \
142 if (!(x)) printk("msi_bitmap: test failed at line %d\n", __LINE__);
143
144void test_basics(void)
145{
146 struct msi_bitmap bmp;
147 int i, size = 512;
148
149 /* Can't allocate a bitmap of 0 irqs */
150 check(msi_bitmap_alloc(&bmp, 0, NULL) != 0);
151
152 /* of_node may be NULL */
153 check(0 == msi_bitmap_alloc(&bmp, size, NULL));
154
155 /* Should all be free by default */
156 check(0 == bitmap_find_free_region(bmp.bitmap, size,
157 get_count_order(size)));
158 bitmap_release_region(bmp.bitmap, 0, get_count_order(size));
159
160 /* With no node, there's no msi-available-ranges, so expect > 0 */
161 check(msi_bitmap_reserve_dt_hwirqs(&bmp) > 0);
162
163 /* Should all still be free */
164 check(0 == bitmap_find_free_region(bmp.bitmap, size,
165 get_count_order(size)));
166 bitmap_release_region(bmp.bitmap, 0, get_count_order(size));
167
168 /* Check we can fill it up and then no more */
169 for (i = 0; i < size; i++)
170 check(msi_bitmap_alloc_hwirqs(&bmp, 1) >= 0);
171
172 check(msi_bitmap_alloc_hwirqs(&bmp, 1) < 0);
173
174 /* Should all be allocated */
175 check(bitmap_find_free_region(bmp.bitmap, size, 0) < 0);
176
177 /* And if we free one we can then allocate another */
178 msi_bitmap_free_hwirqs(&bmp, size / 2, 1);
179 check(msi_bitmap_alloc_hwirqs(&bmp, 1) == size / 2);
180
181 msi_bitmap_free(&bmp);
182
183 /* Clients may check bitmap == NULL for "not-allocated" */
184 check(bmp.bitmap == NULL);
185
186 kfree(bmp.bitmap);
187}
188
189void test_of_node(void)
190{
191 u32 prop_data[] = { 10, 10, 25, 3, 40, 1, 100, 100, 200, 20 };
192 const char *expected_str = "0-9,20-24,28-39,41-99,220-255";
193 char *prop_name = "msi-available-ranges";
194 char *node_name = "/fakenode";
195 struct device_node of_node;
196 struct property prop;
197 struct msi_bitmap bmp;
198 int size = 256;
199 DECLARE_BITMAP(expected, size);
200
201 /* There should really be a struct device_node allocator */
202 memset(&of_node, 0, sizeof(of_node));
203 kref_init(&of_node.kref);
204 of_node.full_name = node_name;
205
206 check(0 == msi_bitmap_alloc(&bmp, size, &of_node));
207
208 /* No msi-available-ranges, so expect > 0 */
209 check(msi_bitmap_reserve_dt_hwirqs(&bmp) > 0);
210
211 /* Should all still be free */
212 check(0 == bitmap_find_free_region(bmp.bitmap, size,
213 get_count_order(size)));
214 bitmap_release_region(bmp.bitmap, 0, get_count_order(size));
215
216 /* Now create a fake msi-available-ranges property */
217
218 /* There should really .. oh whatever */
219 memset(&prop, 0, sizeof(prop));
220 prop.name = prop_name;
221 prop.value = &prop_data;
222 prop.length = sizeof(prop_data);
223
224 of_node.properties = &prop;
225
226 /* msi-available-ranges, so expect == 0 */
227 check(msi_bitmap_reserve_dt_hwirqs(&bmp) == 0);
228
229 /* Check we got the expected result */
230 check(0 == bitmap_parselist(expected_str, expected, size));
231 check(bitmap_equal(expected, bmp.bitmap, size));
232
233 msi_bitmap_free(&bmp);
234 kfree(bmp.bitmap);
235}
236
237int msi_bitmap_selftest(void)
238{
239 printk(KERN_DEBUG "Running MSI bitmap self-tests ...\n");
240
241 test_basics();
242 test_of_node();
243
244 return 0;
245}
246late_initcall(msi_bitmap_selftest);
247#endif /* CONFIG_MSI_BITMAP_SELFTEST */
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c
index fb368dfde5d4..d3e4d61030b5 100644
--- a/arch/powerpc/sysdev/ppc4xx_pci.c
+++ b/arch/powerpc/sysdev/ppc4xx_pci.c
@@ -30,24 +30,19 @@
30#include <asm/machdep.h> 30#include <asm/machdep.h>
31#include <asm/dcr.h> 31#include <asm/dcr.h>
32#include <asm/dcr-regs.h> 32#include <asm/dcr-regs.h>
33#include <mm/mmu_decl.h>
33 34
34#include "ppc4xx_pci.h" 35#include "ppc4xx_pci.h"
35 36
36static int dma_offset_set; 37static int dma_offset_set;
37 38
38/* Move that to a useable header */
39extern unsigned long total_memory;
40
41#define U64_TO_U32_LOW(val) ((u32)((val) & 0x00000000ffffffffULL)) 39#define U64_TO_U32_LOW(val) ((u32)((val) & 0x00000000ffffffffULL))
42#define U64_TO_U32_HIGH(val) ((u32)((val) >> 32)) 40#define U64_TO_U32_HIGH(val) ((u32)((val) >> 32))
43 41
44#ifdef CONFIG_RESOURCES_64BIT 42#define RES_TO_U32_LOW(val) \
45#define RES_TO_U32_LOW(val) U64_TO_U32_LOW(val) 43 ((sizeof(resource_size_t) > sizeof(u32)) ? U64_TO_U32_LOW(val) : (val))
46#define RES_TO_U32_HIGH(val) U64_TO_U32_HIGH(val) 44#define RES_TO_U32_HIGH(val) \
47#else 45 ((sizeof(resource_size_t) > sizeof(u32)) ? U64_TO_U32_HIGH(val) : (0))
48#define RES_TO_U32_LOW(val) (val)
49#define RES_TO_U32_HIGH(val) (0)
50#endif
51 46
52static inline int ppc440spe_revA(void) 47static inline int ppc440spe_revA(void)
53{ 48{
@@ -105,7 +100,8 @@ static int __init ppc4xx_parse_dma_ranges(struct pci_controller *hose,
105 100
106 /* Default */ 101 /* Default */
107 res->start = 0; 102 res->start = 0;
108 res->end = size = 0x80000000; 103 size = 0x80000000;
104 res->end = size - 1;
109 res->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; 105 res->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
110 106
111 /* Get dma-ranges property */ 107 /* Get dma-ranges property */
@@ -145,12 +141,11 @@ static int __init ppc4xx_parse_dma_ranges(struct pci_controller *hose,
145 141
146 /* Use that */ 142 /* Use that */
147 res->start = pci_addr; 143 res->start = pci_addr;
148#ifndef CONFIG_RESOURCES_64BIT
149 /* Beware of 32 bits resources */ 144 /* Beware of 32 bits resources */
150 if ((pci_addr + size) > 0x100000000ull) 145 if (sizeof(resource_size_t) == sizeof(u32) &&
146 (pci_addr + size) > 0x100000000ull)
151 res->end = 0xffffffff; 147 res->end = 0xffffffff;
152 else 148 else
153#endif
154 res->end = res->start + size - 1; 149 res->end = res->start + size - 1;
155 break; 150 break;
156 } 151 }
@@ -167,13 +162,13 @@ static int __init ppc4xx_parse_dma_ranges(struct pci_controller *hose,
167 */ 162 */
168 if (size < total_memory) { 163 if (size < total_memory) {
169 printk(KERN_ERR "%s: dma-ranges too small " 164 printk(KERN_ERR "%s: dma-ranges too small "
170 "(size=%llx total_memory=%lx)\n", 165 "(size=%llx total_memory=%llx)\n",
171 hose->dn->full_name, size, total_memory); 166 hose->dn->full_name, size, (u64)total_memory);
172 return -ENXIO; 167 return -ENXIO;
173 } 168 }
174 169
175 /* Check we are a power of 2 size and that base is a multiple of size*/ 170 /* Check we are a power of 2 size and that base is a multiple of size*/
176 if (!is_power_of_2(size) || 171 if ((size & (size - 1)) != 0 ||
177 (res->start & (size - 1)) != 0) { 172 (res->start & (size - 1)) != 0) {
178 printk(KERN_ERR "%s: dma-ranges unaligned\n", 173 printk(KERN_ERR "%s: dma-ranges unaligned\n",
179 hose->dn->full_name); 174 hose->dn->full_name);
@@ -277,9 +272,16 @@ static void __init ppc4xx_probe_pci_bridge(struct device_node *np)
277 const int *bus_range; 272 const int *bus_range;
278 int primary = 0; 273 int primary = 0;
279 274
275 /* Check if device is enabled */
276 if (!of_device_is_available(np)) {
277 printk(KERN_INFO "%s: Port disabled via device-tree\n",
278 np->full_name);
279 return;
280 }
281
280 /* Fetch config space registers address */ 282 /* Fetch config space registers address */
281 if (of_address_to_resource(np, 0, &rsrc_cfg)) { 283 if (of_address_to_resource(np, 0, &rsrc_cfg)) {
282 printk(KERN_ERR "%s:Can't get PCI config register base !", 284 printk(KERN_ERR "%s: Can't get PCI config register base !",
283 np->full_name); 285 np->full_name);
284 return; 286 return;
285 } 287 }
@@ -810,7 +812,7 @@ static int ppc460ex_pciex_init_port_hw(struct ppc4xx_pciex_port *port)
810 switch (port->index) { 812 switch (port->index) {
811 case 0: 813 case 0:
812 mtdcri(SDR0, PESDR0_460EX_L0CDRCTL, 0x00003230); 814 mtdcri(SDR0, PESDR0_460EX_L0CDRCTL, 0x00003230);
813 mtdcri(SDR0, PESDR0_460EX_L0DRV, 0x00000136); 815 mtdcri(SDR0, PESDR0_460EX_L0DRV, 0x00000130);
814 mtdcri(SDR0, PESDR0_460EX_L0CLK, 0x00000006); 816 mtdcri(SDR0, PESDR0_460EX_L0CLK, 0x00000006);
815 817
816 mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST,0x10000000); 818 mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST,0x10000000);
@@ -821,10 +823,10 @@ static int ppc460ex_pciex_init_port_hw(struct ppc4xx_pciex_port *port)
821 mtdcri(SDR0, PESDR1_460EX_L1CDRCTL, 0x00003230); 823 mtdcri(SDR0, PESDR1_460EX_L1CDRCTL, 0x00003230);
822 mtdcri(SDR0, PESDR1_460EX_L2CDRCTL, 0x00003230); 824 mtdcri(SDR0, PESDR1_460EX_L2CDRCTL, 0x00003230);
823 mtdcri(SDR0, PESDR1_460EX_L3CDRCTL, 0x00003230); 825 mtdcri(SDR0, PESDR1_460EX_L3CDRCTL, 0x00003230);
824 mtdcri(SDR0, PESDR1_460EX_L0DRV, 0x00000136); 826 mtdcri(SDR0, PESDR1_460EX_L0DRV, 0x00000130);
825 mtdcri(SDR0, PESDR1_460EX_L1DRV, 0x00000136); 827 mtdcri(SDR0, PESDR1_460EX_L1DRV, 0x00000130);
826 mtdcri(SDR0, PESDR1_460EX_L2DRV, 0x00000136); 828 mtdcri(SDR0, PESDR1_460EX_L2DRV, 0x00000130);
827 mtdcri(SDR0, PESDR1_460EX_L3DRV, 0x00000136); 829 mtdcri(SDR0, PESDR1_460EX_L3DRV, 0x00000130);
828 mtdcri(SDR0, PESDR1_460EX_L0CLK, 0x00000006); 830 mtdcri(SDR0, PESDR1_460EX_L0CLK, 0x00000006);
829 mtdcri(SDR0, PESDR1_460EX_L1CLK, 0x00000006); 831 mtdcri(SDR0, PESDR1_460EX_L1CLK, 0x00000006);
830 mtdcri(SDR0, PESDR1_460EX_L2CLK, 0x00000006); 832 mtdcri(SDR0, PESDR1_460EX_L2CLK, 0x00000006);
diff --git a/arch/powerpc/sysdev/qe_lib/Kconfig b/arch/powerpc/sysdev/qe_lib/Kconfig
index 1ce546462be5..76ffbc48d4b9 100644
--- a/arch/powerpc/sysdev/qe_lib/Kconfig
+++ b/arch/powerpc/sysdev/qe_lib/Kconfig
@@ -24,12 +24,3 @@ config QE_USB
24 bool 24 bool
25 help 25 help
26 QE USB Host Controller support 26 QE USB Host Controller support
27
28config QE_GPIO
29 bool "QE GPIO support"
30 depends on QUICC_ENGINE
31 select GENERIC_GPIO
32 select ARCH_REQUIRE_GPIOLIB
33 help
34 Say Y here if you're going to use hardware that connects to the
35 QE GPIOs.
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index 4c03049e7db9..bc581d8a7cd9 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -565,13 +565,16 @@ config ZFCPDUMP
565 Refer to <file:Documentation/s390/zfcpdump.txt> for more details on this. 565 Refer to <file:Documentation/s390/zfcpdump.txt> for more details on this.
566 566
567config S390_GUEST 567config S390_GUEST
568bool "s390 guest support (EXPERIMENTAL)" 568bool "s390 guest support for KVM (EXPERIMENTAL)"
569 depends on 64BIT && EXPERIMENTAL 569 depends on 64BIT && EXPERIMENTAL
570 select VIRTIO 570 select VIRTIO
571 select VIRTIO_RING 571 select VIRTIO_RING
572 select VIRTIO_CONSOLE 572 select VIRTIO_CONSOLE
573 help 573 help
574 Select this option if you want to run the kernel under s390 linux 574 Select this option if you want to run the kernel as a guest under
575 the KVM hypervisor. This will add detection for KVM as well as a
576 virtio transport. If KVM is detected, the virtio console will be
577 the default console.
575endmenu 578endmenu
576 579
577source "net/Kconfig" 580source "net/Kconfig"
diff --git a/arch/s390/hypfs/inode.c b/arch/s390/hypfs/inode.c
index 7383781f3e6a..36313801cd5c 100644
--- a/arch/s390/hypfs/inode.c
+++ b/arch/s390/hypfs/inode.c
@@ -219,7 +219,7 @@ static int hypfs_release(struct inode *inode, struct file *filp)
219 219
220enum { opt_uid, opt_gid, opt_err }; 220enum { opt_uid, opt_gid, opt_err };
221 221
222static match_table_t hypfs_tokens = { 222static const match_table_t hypfs_tokens = {
223 {opt_uid, "uid=%u"}, 223 {opt_uid, "uid=%u"},
224 {opt_gid, "gid=%u"}, 224 {opt_gid, "gid=%u"},
225 {opt_err, NULL} 225 {opt_err, NULL}
diff --git a/arch/s390/include/asm/elf.h b/arch/s390/include/asm/elf.h
index 3cad56923815..261785ab5b22 100644
--- a/arch/s390/include/asm/elf.h
+++ b/arch/s390/include/asm/elf.h
@@ -166,13 +166,11 @@ extern char elf_platform[];
166#define ELF_PLATFORM (elf_platform) 166#define ELF_PLATFORM (elf_platform)
167 167
168#ifndef __s390x__ 168#ifndef __s390x__
169#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX) 169#define SET_PERSONALITY(ex) set_personality(PER_LINUX)
170#else /* __s390x__ */ 170#else /* __s390x__ */
171#define SET_PERSONALITY(ex, ibcs2) \ 171#define SET_PERSONALITY(ex) \
172do { \ 172do { \
173 if (ibcs2) \ 173 if (current->personality != PER_LINUX32) \
174 set_personality(PER_SVR4); \
175 else if (current->personality != PER_LINUX32) \
176 set_personality(PER_LINUX); \ 174 set_personality(PER_LINUX); \
177 if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \ 175 if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \
178 set_thread_flag(TIF_31BIT); \ 176 set_thread_flag(TIF_31BIT); \
diff --git a/arch/s390/include/asm/statfs.h b/arch/s390/include/asm/statfs.h
index 099a45579190..06cc70307ece 100644
--- a/arch/s390/include/asm/statfs.h
+++ b/arch/s390/include/asm/statfs.h
@@ -12,19 +12,16 @@
12#ifndef __s390x__ 12#ifndef __s390x__
13#include <asm-generic/statfs.h> 13#include <asm-generic/statfs.h>
14#else 14#else
15/*
16 * We can't use <asm-generic/statfs.h> because in 64-bit mode
17 * we mix ints of different sizes in our struct statfs.
18 */
15 19
16#ifndef __KERNEL_STRICT_NAMES 20#ifndef __KERNEL_STRICT_NAMES
17
18#include <linux/types.h> 21#include <linux/types.h>
19
20typedef __kernel_fsid_t fsid_t; 22typedef __kernel_fsid_t fsid_t;
21
22#endif 23#endif
23 24
24/*
25 * This is ugly -- we're already 64-bit clean, so just duplicate the
26 * definitions.
27 */
28struct statfs { 25struct statfs {
29 int f_type; 26 int f_type;
30 int f_bsize; 27 int f_bsize;
diff --git a/arch/s390/kernel/compat_linux.c b/arch/s390/kernel/compat_linux.c
index 98e246dc0233..4646382af34f 100644
--- a/arch/s390/kernel/compat_linux.c
+++ b/arch/s390/kernel/compat_linux.c
@@ -279,22 +279,6 @@ asmlinkage long sys32_getegid16(void)
279 return high2lowgid(current->egid); 279 return high2lowgid(current->egid);
280} 280}
281 281
282/* 32-bit timeval and related flotsam. */
283
284static inline long get_tv32(struct timeval *o, struct compat_timeval __user *i)
285{
286 return (!access_ok(VERIFY_READ, o, sizeof(*o)) ||
287 (__get_user(o->tv_sec, &i->tv_sec) ||
288 __get_user(o->tv_usec, &i->tv_usec)));
289}
290
291static inline long put_tv32(struct compat_timeval __user *o, struct timeval *i)
292{
293 return (!access_ok(VERIFY_WRITE, o, sizeof(*o)) ||
294 (__put_user(i->tv_sec, &o->tv_sec) ||
295 __put_user(i->tv_usec, &o->tv_usec)));
296}
297
298/* 282/*
299 * sys32_ipc() is the de-multiplexer for the SysV IPC calls in 32bit emulation. 283 * sys32_ipc() is the de-multiplexer for the SysV IPC calls in 32bit emulation.
300 * 284 *
@@ -362,41 +346,6 @@ asmlinkage long sys32_ftruncate64(unsigned int fd, unsigned long high, unsigned
362 return sys_ftruncate(fd, (high << 32) | low); 346 return sys_ftruncate(fd, (high << 32) | low);
363} 347}
364 348
365int cp_compat_stat(struct kstat *stat, struct compat_stat __user *statbuf)
366{
367 compat_ino_t ino;
368 int err;
369
370 if (!old_valid_dev(stat->dev) || !old_valid_dev(stat->rdev))
371 return -EOVERFLOW;
372
373 ino = stat->ino;
374 if (sizeof(ino) < sizeof(stat->ino) && ino != stat->ino)
375 return -EOVERFLOW;
376
377 err = put_user(old_encode_dev(stat->dev), &statbuf->st_dev);
378 err |= put_user(stat->ino, &statbuf->st_ino);
379 err |= put_user(stat->mode, &statbuf->st_mode);
380 err |= put_user(stat->nlink, &statbuf->st_nlink);
381 err |= put_user(high2lowuid(stat->uid), &statbuf->st_uid);
382 err |= put_user(high2lowgid(stat->gid), &statbuf->st_gid);
383 err |= put_user(old_encode_dev(stat->rdev), &statbuf->st_rdev);
384 err |= put_user(stat->size, &statbuf->st_size);
385 err |= put_user(stat->atime.tv_sec, &statbuf->st_atime);
386 err |= put_user(stat->atime.tv_nsec, &statbuf->st_atime_nsec);
387 err |= put_user(stat->mtime.tv_sec, &statbuf->st_mtime);
388 err |= put_user(stat->mtime.tv_nsec, &statbuf->st_mtime_nsec);
389 err |= put_user(stat->ctime.tv_sec, &statbuf->st_ctime);
390 err |= put_user(stat->ctime.tv_nsec, &statbuf->st_ctime_nsec);
391 err |= put_user(stat->blksize, &statbuf->st_blksize);
392 err |= put_user(stat->blocks, &statbuf->st_blocks);
393/* fixme
394 err |= put_user(0, &statbuf->__unused4[0]);
395 err |= put_user(0, &statbuf->__unused4[1]);
396*/
397 return err;
398}
399
400asmlinkage long sys32_sched_rr_get_interval(compat_pid_t pid, 349asmlinkage long sys32_sched_rr_get_interval(compat_pid_t pid,
401 struct compat_timespec __user *interval) 350 struct compat_timespec __user *interval)
402{ 351{
@@ -557,57 +506,6 @@ sys32_delete_module(const char __user *name_user, unsigned int flags)
557 506
558#endif /* CONFIG_MODULES */ 507#endif /* CONFIG_MODULES */
559 508
560/* Translations due to time_t size differences. Which affects all
561 sorts of things, like timeval and itimerval. */
562
563extern struct timezone sys_tz;
564
565asmlinkage long sys32_gettimeofday(struct compat_timeval __user *tv, struct timezone __user *tz)
566{
567 if (tv) {
568 struct timeval ktv;
569 do_gettimeofday(&ktv);
570 if (put_tv32(tv, &ktv))
571 return -EFAULT;
572 }
573 if (tz) {
574 if (copy_to_user(tz, &sys_tz, sizeof(sys_tz)))
575 return -EFAULT;
576 }
577 return 0;
578}
579
580static inline long get_ts32(struct timespec *o, struct compat_timeval __user *i)
581{
582 long usec;
583
584 if (!access_ok(VERIFY_READ, i, sizeof(*i)))
585 return -EFAULT;
586 if (__get_user(o->tv_sec, &i->tv_sec))
587 return -EFAULT;
588 if (__get_user(usec, &i->tv_usec))
589 return -EFAULT;
590 o->tv_nsec = usec * 1000;
591 return 0;
592}
593
594asmlinkage long sys32_settimeofday(struct compat_timeval __user *tv, struct timezone __user *tz)
595{
596 struct timespec kts;
597 struct timezone ktz;
598
599 if (tv) {
600 if (get_ts32(&kts, tv))
601 return -EFAULT;
602 }
603 if (tz) {
604 if (copy_from_user(&ktz, tz, sizeof(ktz)))
605 return -EFAULT;
606 }
607
608 return do_sys_settimeofday(tv ? &kts : NULL, tz ? &ktz : NULL);
609}
610
611asmlinkage long sys32_pread64(unsigned int fd, char __user *ubuf, 509asmlinkage long sys32_pread64(unsigned int fd, char __user *ubuf,
612 size_t count, u32 poshi, u32 poslo) 510 size_t count, u32 poshi, u32 poslo)
613{ 511{
diff --git a/arch/s390/kernel/compat_linux.h b/arch/s390/kernel/compat_linux.h
index 05f8516366ab..836a28842900 100644
--- a/arch/s390/kernel/compat_linux.h
+++ b/arch/s390/kernel/compat_linux.h
@@ -202,10 +202,6 @@ long sys32_execve(void);
202long sys32_init_module(void __user *umod, unsigned long len, 202long sys32_init_module(void __user *umod, unsigned long len,
203 const char __user *uargs); 203 const char __user *uargs);
204long sys32_delete_module(const char __user *name_user, unsigned int flags); 204long sys32_delete_module(const char __user *name_user, unsigned int flags);
205long sys32_gettimeofday(struct compat_timeval __user *tv,
206 struct timezone __user *tz);
207long sys32_settimeofday(struct compat_timeval __user *tv,
208 struct timezone __user *tz);
209long sys32_pread64(unsigned int fd, char __user *ubuf, size_t count, 205long sys32_pread64(unsigned int fd, char __user *ubuf, size_t count,
210 u32 poshi, u32 poslo); 206 u32 poshi, u32 poslo);
211long sys32_pwrite64(unsigned int fd, const char __user *ubuf, 207long sys32_pwrite64(unsigned int fd, const char __user *ubuf,
diff --git a/arch/s390/kernel/compat_wrapper.S b/arch/s390/kernel/compat_wrapper.S
index ee51ca9e23b5..fc2c97197a53 100644
--- a/arch/s390/kernel/compat_wrapper.S
+++ b/arch/s390/kernel/compat_wrapper.S
@@ -332,17 +332,17 @@ compat_sys_getrusage_wrapper:
332 llgtr %r3,%r3 # struct rusage_emu31 * 332 llgtr %r3,%r3 # struct rusage_emu31 *
333 jg compat_sys_getrusage # branch to system call 333 jg compat_sys_getrusage # branch to system call
334 334
335 .globl sys32_gettimeofday_wrapper 335 .globl compat_sys_gettimeofday_wrapper
336sys32_gettimeofday_wrapper: 336compat_sys_gettimeofday_wrapper:
337 llgtr %r2,%r2 # struct timeval_emu31 * 337 llgtr %r2,%r2 # struct timeval_emu31 *
338 llgtr %r3,%r3 # struct timezone * 338 llgtr %r3,%r3 # struct timezone *
339 jg sys32_gettimeofday # branch to system call 339 jg compat_sys_gettimeofday # branch to system call
340 340
341 .globl sys32_settimeofday_wrapper 341 .globl compat_sys_settimeofday_wrapper
342sys32_settimeofday_wrapper: 342compat_sys_settimeofday_wrapper:
343 llgtr %r2,%r2 # struct timeval_emu31 * 343 llgtr %r2,%r2 # struct timeval_emu31 *
344 llgtr %r3,%r3 # struct timezone * 344 llgtr %r3,%r3 # struct timezone *
345 jg sys32_settimeofday # branch to system call 345 jg compat_sys_settimeofday # branch to system call
346 346
347 .globl sys32_getgroups16_wrapper 347 .globl sys32_getgroups16_wrapper
348sys32_getgroups16_wrapper: 348sys32_getgroups16_wrapper:
diff --git a/arch/s390/kernel/syscalls.S b/arch/s390/kernel/syscalls.S
index 3ae303914b42..2d61787949d5 100644
--- a/arch/s390/kernel/syscalls.S
+++ b/arch/s390/kernel/syscalls.S
@@ -86,8 +86,8 @@ SYSCALL(sys_sethostname,sys_sethostname,sys32_sethostname_wrapper)
86SYSCALL(sys_setrlimit,sys_setrlimit,compat_sys_setrlimit_wrapper) /* 75 */ 86SYSCALL(sys_setrlimit,sys_setrlimit,compat_sys_setrlimit_wrapper) /* 75 */
87SYSCALL(sys_old_getrlimit,sys_getrlimit,compat_sys_old_getrlimit_wrapper) 87SYSCALL(sys_old_getrlimit,sys_getrlimit,compat_sys_old_getrlimit_wrapper)
88SYSCALL(sys_getrusage,sys_getrusage,compat_sys_getrusage_wrapper) 88SYSCALL(sys_getrusage,sys_getrusage,compat_sys_getrusage_wrapper)
89SYSCALL(sys_gettimeofday,sys_gettimeofday,sys32_gettimeofday_wrapper) 89SYSCALL(sys_gettimeofday,sys_gettimeofday,compat_sys_gettimeofday_wrapper)
90SYSCALL(sys_settimeofday,sys_settimeofday,sys32_settimeofday_wrapper) 90SYSCALL(sys_settimeofday,sys_settimeofday,compat_sys_settimeofday_wrapper)
91SYSCALL(sys_getgroups16,sys_ni_syscall,sys32_getgroups16_wrapper) /* 80 old getgroups16 syscall */ 91SYSCALL(sys_getgroups16,sys_ni_syscall,sys32_getgroups16_wrapper) /* 80 old getgroups16 syscall */
92SYSCALL(sys_setgroups16,sys_ni_syscall,sys32_setgroups16_wrapper) /* old setgroups16 syscall */ 92SYSCALL(sys_setgroups16,sys_ni_syscall,sys32_setgroups16_wrapper) /* old setgroups16 syscall */
93NI_SYSCALL /* old select syscall */ 93NI_SYSCALL /* old select syscall */
diff --git a/arch/s390/kvm/priv.c b/arch/s390/kvm/priv.c
index d1faf5c54405..cce40ff2913b 100644
--- a/arch/s390/kvm/priv.c
+++ b/arch/s390/kvm/priv.c
@@ -157,8 +157,8 @@ static int handle_stfl(struct kvm_vcpu *vcpu)
157 int rc; 157 int rc;
158 158
159 vcpu->stat.instruction_stfl++; 159 vcpu->stat.instruction_stfl++;
160 facility_list &= ~(1UL<<24); /* no stfle */ 160 /* only pass the facility bits, which we can handle */
161 facility_list &= ~(1UL<<23); /* no large pages */ 161 facility_list &= 0xfe00fff3;
162 162
163 rc = copy_to_guest(vcpu, offsetof(struct _lowcore, stfl_fac_list), 163 rc = copy_to_guest(vcpu, offsetof(struct _lowcore, stfl_fac_list),
164 &facility_list, sizeof(facility_list)); 164 &facility_list, sizeof(facility_list));
diff --git a/arch/sh/include/asm/elf.h b/arch/sh/include/asm/elf.h
index f01449a8d378..ee02db110f0d 100644
--- a/arch/sh/include/asm/elf.h
+++ b/arch/sh/include/asm/elf.h
@@ -189,7 +189,7 @@ do { \
189} while (0) 189} while (0)
190#endif 190#endif
191 191
192#define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX_32BIT) 192#define SET_PERSONALITY(ex) set_personality(PER_LINUX_32BIT)
193struct task_struct; 193struct task_struct;
194extern int dump_task_regs (struct task_struct *, elf_gregset_t *); 194extern int dump_task_regs (struct task_struct *, elf_gregset_t *);
195extern int dump_task_fpu (struct task_struct *, elf_fpregset_t *); 195extern int dump_task_fpu (struct task_struct *, elf_fpregset_t *);
diff --git a/arch/sparc/include/asm/Kbuild b/arch/sparc/include/asm/Kbuild
index 2ba7183bc1f0..2d2769d766ec 100644
--- a/arch/sparc/include/asm/Kbuild
+++ b/arch/sparc/include/asm/Kbuild
@@ -15,8 +15,6 @@ header-y += signal_32.h
15header-y += signal_64.h 15header-y += signal_64.h
16header-y += stat_32.h 16header-y += stat_32.h
17header-y += stat_64.h 17header-y += stat_64.h
18header-y += statfs_32.h
19header-y += statfs_64.h
20header-y += unistd_32.h 18header-y += unistd_32.h
21header-y += unistd_64.h 19header-y += unistd_64.h
22 20
diff --git a/arch/sparc/include/asm/elf_32.h b/arch/sparc/include/asm/elf_32.h
index b7ab60547827..381a1b5256d6 100644
--- a/arch/sparc/include/asm/elf_32.h
+++ b/arch/sparc/include/asm/elf_32.h
@@ -137,6 +137,6 @@ typedef struct {
137 137
138#define ELF_PLATFORM (NULL) 138#define ELF_PLATFORM (NULL)
139 139
140#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX) 140#define SET_PERSONALITY(ex) set_personality(PER_LINUX)
141 141
142#endif /* !(__ASMSPARC_ELF_H) */ 142#endif /* !(__ASMSPARC_ELF_H) */
diff --git a/arch/sparc/include/asm/elf_64.h b/arch/sparc/include/asm/elf_64.h
index 0818a1308f4e..425c2f9be6d5 100644
--- a/arch/sparc/include/asm/elf_64.h
+++ b/arch/sparc/include/asm/elf_64.h
@@ -195,7 +195,7 @@ static inline unsigned int sparc64_elf_hwcap(void)
195 195
196#define ELF_PLATFORM (NULL) 196#define ELF_PLATFORM (NULL)
197 197
198#define SET_PERSONALITY(ex, ibcs2) \ 198#define SET_PERSONALITY(ex) \
199do { unsigned long new_flags = current_thread_info()->flags; \ 199do { unsigned long new_flags = current_thread_info()->flags; \
200 new_flags &= _TIF_32BIT; \ 200 new_flags &= _TIF_32BIT; \
201 if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \ 201 if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \
@@ -208,9 +208,7 @@ do { unsigned long new_flags = current_thread_info()->flags; \
208 else \ 208 else \
209 clear_thread_flag(TIF_ABI_PENDING); \ 209 clear_thread_flag(TIF_ABI_PENDING); \
210 /* flush_thread will update pgd cache */ \ 210 /* flush_thread will update pgd cache */ \
211 if (ibcs2) \ 211 if (current->personality != PER_LINUX32) \
212 set_personality(PER_SVR4); \
213 else if (current->personality != PER_LINUX32) \
214 set_personality(PER_LINUX); \ 212 set_personality(PER_LINUX); \
215} while (0) 213} while (0)
216 214
diff --git a/arch/sparc/include/asm/statfs.h b/arch/sparc/include/asm/statfs.h
index 5e937a73743d..55e607ad461d 100644
--- a/arch/sparc/include/asm/statfs.h
+++ b/arch/sparc/include/asm/statfs.h
@@ -1,8 +1,6 @@
1#ifndef ___ASM_SPARC_STATFS_H 1#ifndef ___ASM_SPARC_STATFS_H
2#define ___ASM_SPARC_STATFS_H 2#define ___ASM_SPARC_STATFS_H
3#if defined(__sparc__) && defined(__arch64__) 3
4#include <asm/statfs_64.h> 4#include <asm-generic/statfs.h>
5#else 5
6#include <asm/statfs_32.h>
7#endif
8#endif 6#endif
diff --git a/arch/sparc/include/asm/statfs_32.h b/arch/sparc/include/asm/statfs_32.h
deleted file mode 100644
index 304520fa8863..000000000000
--- a/arch/sparc/include/asm/statfs_32.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _SPARC_STATFS_H
2#define _SPARC_STATFS_H
3
4#include <asm-generic/statfs.h>
5
6#endif
diff --git a/arch/sparc/include/asm/statfs_64.h b/arch/sparc/include/asm/statfs_64.h
deleted file mode 100644
index 79b3c890a5fa..000000000000
--- a/arch/sparc/include/asm/statfs_64.h
+++ /dev/null
@@ -1,54 +0,0 @@
1#ifndef _SPARC64_STATFS_H
2#define _SPARC64_STATFS_H
3
4#ifndef __KERNEL_STRICT_NAMES
5
6#include <linux/types.h>
7
8typedef __kernel_fsid_t fsid_t;
9
10#endif
11
12struct statfs {
13 long f_type;
14 long f_bsize;
15 long f_blocks;
16 long f_bfree;
17 long f_bavail;
18 long f_files;
19 long f_ffree;
20 __kernel_fsid_t f_fsid;
21 long f_namelen;
22 long f_frsize;
23 long f_spare[5];
24};
25
26struct statfs64 {
27 long f_type;
28 long f_bsize;
29 long f_blocks;
30 long f_bfree;
31 long f_bavail;
32 long f_files;
33 long f_ffree;
34 __kernel_fsid_t f_fsid;
35 long f_namelen;
36 long f_frsize;
37 long f_spare[5];
38};
39
40struct compat_statfs64 {
41 __u32 f_type;
42 __u32 f_bsize;
43 __u64 f_blocks;
44 __u64 f_bfree;
45 __u64 f_bavail;
46 __u64 f_files;
47 __u64 f_ffree;
48 __kernel_fsid_t f_fsid;
49 __u32 f_namelen;
50 __u32 f_frsize;
51 __u32 f_spare[5];
52};
53
54#endif
diff --git a/arch/sparc/kernel/sun4d_smp.c b/arch/sparc/kernel/sun4d_smp.c
index ce3d45db94e9..7a6a5e795928 100644
--- a/arch/sparc/kernel/sun4d_smp.c
+++ b/arch/sparc/kernel/sun4d_smp.c
@@ -20,6 +20,7 @@
20#include <linux/swap.h> 20#include <linux/swap.h>
21#include <linux/profile.h> 21#include <linux/profile.h>
22#include <linux/delay.h> 22#include <linux/delay.h>
23#include <linux/cpu.h>
23 24
24#include <asm/ptrace.h> 25#include <asm/ptrace.h>
25#include <asm/atomic.h> 26#include <asm/atomic.h>
diff --git a/arch/sparc/kernel/sun4m_smp.c b/arch/sparc/kernel/sun4m_smp.c
index 0c564ba9e709..5fc386d08c47 100644
--- a/arch/sparc/kernel/sun4m_smp.c
+++ b/arch/sparc/kernel/sun4m_smp.c
@@ -17,6 +17,7 @@
17#include <linux/swap.h> 17#include <linux/swap.h>
18#include <linux/profile.h> 18#include <linux/profile.h>
19#include <linux/delay.h> 19#include <linux/delay.h>
20#include <linux/cpu.h>
20 21
21#include <asm/cacheflush.h> 22#include <asm/cacheflush.h>
22#include <asm/tlbflush.h> 23#include <asm/tlbflush.h>
diff --git a/arch/sparc64/kernel/chmc.c b/arch/sparc64/kernel/chmc.c
index 967b04886822..3b9f4d6e14a9 100644
--- a/arch/sparc64/kernel/chmc.c
+++ b/arch/sparc64/kernel/chmc.c
@@ -831,7 +831,7 @@ static int __init us3mc_init(void)
831 if (!us3mc_platform()) 831 if (!us3mc_platform())
832 return -ENODEV; 832 return -ENODEV;
833 833
834 __asm__ ("rdpr %%ver, %0" : "=r" (ver)); 834 __asm__ __volatile__("rdpr %%ver, %0" : "=r" (ver));
835 if ((ver >> 32UL) == __JALAPENO_ID || 835 if ((ver >> 32UL) == __JALAPENO_ID ||
836 (ver >> 32UL) == __SERRANO_ID) { 836 (ver >> 32UL) == __SERRANO_ID) {
837 mc_type = MC_TYPE_JBUS; 837 mc_type = MC_TYPE_JBUS;
diff --git a/arch/sparc64/kernel/iommu.c b/arch/sparc64/kernel/iommu.c
index 2a37a6ca2a16..1cc1995531e2 100644
--- a/arch/sparc64/kernel/iommu.c
+++ b/arch/sparc64/kernel/iommu.c
@@ -575,7 +575,7 @@ static int dma_4u_map_sg(struct device *dev, struct scatterlist *sglist,
575 } 575 }
576 /* Allocate iommu entries for that segment */ 576 /* Allocate iommu entries for that segment */
577 paddr = (unsigned long) SG_ENT_PHYS_ADDRESS(s); 577 paddr = (unsigned long) SG_ENT_PHYS_ADDRESS(s);
578 npages = iommu_num_pages(paddr, slen); 578 npages = iommu_num_pages(paddr, slen, IO_PAGE_SIZE);
579 entry = iommu_range_alloc(dev, iommu, npages, &handle); 579 entry = iommu_range_alloc(dev, iommu, npages, &handle);
580 580
581 /* Handle failure */ 581 /* Handle failure */
@@ -647,7 +647,8 @@ iommu_map_failed:
647 iopte_t *base; 647 iopte_t *base;
648 648
649 vaddr = s->dma_address & IO_PAGE_MASK; 649 vaddr = s->dma_address & IO_PAGE_MASK;
650 npages = iommu_num_pages(s->dma_address, s->dma_length); 650 npages = iommu_num_pages(s->dma_address, s->dma_length,
651 IO_PAGE_SIZE);
651 iommu_range_free(iommu, vaddr, npages); 652 iommu_range_free(iommu, vaddr, npages);
652 653
653 entry = (vaddr - iommu->page_table_map_base) 654 entry = (vaddr - iommu->page_table_map_base)
@@ -715,7 +716,7 @@ static void dma_4u_unmap_sg(struct device *dev, struct scatterlist *sglist,
715 716
716 if (!len) 717 if (!len)
717 break; 718 break;
718 npages = iommu_num_pages(dma_handle, len); 719 npages = iommu_num_pages(dma_handle, len, IO_PAGE_SIZE);
719 iommu_range_free(iommu, dma_handle, npages); 720 iommu_range_free(iommu, dma_handle, npages);
720 721
721 entry = ((dma_handle - iommu->page_table_map_base) 722 entry = ((dma_handle - iommu->page_table_map_base)
diff --git a/arch/sparc64/kernel/iommu_common.h b/arch/sparc64/kernel/iommu_common.h
index 53b19c8231a9..591f5879039c 100644
--- a/arch/sparc64/kernel/iommu_common.h
+++ b/arch/sparc64/kernel/iommu_common.h
@@ -35,17 +35,6 @@
35 35
36#define SG_ENT_PHYS_ADDRESS(SG) (__pa(sg_virt((SG)))) 36#define SG_ENT_PHYS_ADDRESS(SG) (__pa(sg_virt((SG))))
37 37
38static inline unsigned long iommu_num_pages(unsigned long vaddr,
39 unsigned long slen)
40{
41 unsigned long npages;
42
43 npages = IO_PAGE_ALIGN(vaddr + slen) - (vaddr & IO_PAGE_MASK);
44 npages >>= IO_PAGE_SHIFT;
45
46 return npages;
47}
48
49static inline int is_span_boundary(unsigned long entry, 38static inline int is_span_boundary(unsigned long entry,
50 unsigned long shift, 39 unsigned long shift,
51 unsigned long boundary_size, 40 unsigned long boundary_size,
@@ -53,7 +42,8 @@ static inline int is_span_boundary(unsigned long entry,
53 struct scatterlist *sg) 42 struct scatterlist *sg)
54{ 43{
55 unsigned long paddr = SG_ENT_PHYS_ADDRESS(outs); 44 unsigned long paddr = SG_ENT_PHYS_ADDRESS(outs);
56 int nr = iommu_num_pages(paddr, outs->dma_length + sg->length); 45 int nr = iommu_num_pages(paddr, outs->dma_length + sg->length,
46 IO_PAGE_SIZE);
57 47
58 return iommu_is_span_boundary(entry, nr, shift, boundary_size); 48 return iommu_is_span_boundary(entry, nr, shift, boundary_size);
59} 49}
diff --git a/arch/sparc64/kernel/pci_sun4v.c b/arch/sparc64/kernel/pci_sun4v.c
index e86c73ec167b..34a1fded3941 100644
--- a/arch/sparc64/kernel/pci_sun4v.c
+++ b/arch/sparc64/kernel/pci_sun4v.c
@@ -384,7 +384,7 @@ static int dma_4v_map_sg(struct device *dev, struct scatterlist *sglist,
384 } 384 }
385 /* Allocate iommu entries for that segment */ 385 /* Allocate iommu entries for that segment */
386 paddr = (unsigned long) SG_ENT_PHYS_ADDRESS(s); 386 paddr = (unsigned long) SG_ENT_PHYS_ADDRESS(s);
387 npages = iommu_num_pages(paddr, slen); 387 npages = iommu_num_pages(paddr, slen, IO_PAGE_SIZE);
388 entry = iommu_range_alloc(dev, iommu, npages, &handle); 388 entry = iommu_range_alloc(dev, iommu, npages, &handle);
389 389
390 /* Handle failure */ 390 /* Handle failure */
@@ -461,7 +461,8 @@ iommu_map_failed:
461 unsigned long vaddr, npages; 461 unsigned long vaddr, npages;
462 462
463 vaddr = s->dma_address & IO_PAGE_MASK; 463 vaddr = s->dma_address & IO_PAGE_MASK;
464 npages = iommu_num_pages(s->dma_address, s->dma_length); 464 npages = iommu_num_pages(s->dma_address, s->dma_length,
465 IO_PAGE_SIZE);
465 iommu_range_free(iommu, vaddr, npages); 466 iommu_range_free(iommu, vaddr, npages);
466 /* XXX demap? XXX */ 467 /* XXX demap? XXX */
467 s->dma_address = DMA_ERROR_CODE; 468 s->dma_address = DMA_ERROR_CODE;
@@ -500,7 +501,7 @@ static void dma_4v_unmap_sg(struct device *dev, struct scatterlist *sglist,
500 501
501 if (!len) 502 if (!len)
502 break; 503 break;
503 npages = iommu_num_pages(dma_handle, len); 504 npages = iommu_num_pages(dma_handle, len, IO_PAGE_SIZE);
504 iommu_range_free(iommu, dma_handle, npages); 505 iommu_range_free(iommu, dma_handle, npages);
505 506
506 entry = ((dma_handle - iommu->page_table_map_base) >> IO_PAGE_SHIFT); 507 entry = ((dma_handle - iommu->page_table_map_base) >> IO_PAGE_SHIFT);
diff --git a/arch/sparc64/kernel/smp.c b/arch/sparc64/kernel/smp.c
index 2be166c544ca..e5627118e613 100644
--- a/arch/sparc64/kernel/smp.c
+++ b/arch/sparc64/kernel/smp.c
@@ -21,6 +21,7 @@
21#include <linux/jiffies.h> 21#include <linux/jiffies.h>
22#include <linux/profile.h> 22#include <linux/profile.h>
23#include <linux/lmb.h> 23#include <linux/lmb.h>
24#include <linux/cpu.h>
24 25
25#include <asm/head.h> 26#include <asm/head.h>
26#include <asm/ptrace.h> 27#include <asm/ptrace.h>
@@ -115,6 +116,9 @@ void __cpuinit smp_callin(void)
115 atomic_inc(&init_mm.mm_count); 116 atomic_inc(&init_mm.mm_count);
116 current->active_mm = &init_mm; 117 current->active_mm = &init_mm;
117 118
119 /* inform the notifiers about the new cpu */
120 notify_cpu_starting(cpuid);
121
118 while (!cpu_isset(cpuid, smp_commenced_mask)) 122 while (!cpu_isset(cpuid, smp_commenced_mask))
119 rmb(); 123 rmb();
120 124
diff --git a/arch/sparc64/kernel/sys_sparc32.c b/arch/sparc64/kernel/sys_sparc32.c
index 3320c9d0075f..e800503879e4 100644
--- a/arch/sparc64/kernel/sys_sparc32.c
+++ b/arch/sparc64/kernel/sys_sparc32.c
@@ -58,15 +58,6 @@
58#include <asm/mmu_context.h> 58#include <asm/mmu_context.h>
59#include <asm/compat_signal.h> 59#include <asm/compat_signal.h>
60 60
61/* 32-bit timeval and related flotsam. */
62
63static inline long put_tv32(struct compat_timeval __user *o, struct timeval *i)
64{
65 return (!access_ok(VERIFY_WRITE, o, sizeof(*o)) ||
66 (__put_user(i->tv_sec, &o->tv_sec) |
67 __put_user(i->tv_usec, &o->tv_usec)));
68}
69
70#ifdef CONFIG_SYSVIPC 61#ifdef CONFIG_SYSVIPC
71asmlinkage long compat_sys_ipc(u32 call, u32 first, u32 second, u32 third, compat_uptr_t ptr, u32 fifth) 62asmlinkage long compat_sys_ipc(u32 call, u32 first, u32 second, u32 third, compat_uptr_t ptr, u32 fifth)
72{ 63{
@@ -148,41 +139,6 @@ asmlinkage long sys32_ftruncate64(unsigned int fd, unsigned long high, unsigned
148 return sys_ftruncate(fd, (high << 32) | low); 139 return sys_ftruncate(fd, (high << 32) | low);
149} 140}
150 141
151int cp_compat_stat(struct kstat *stat, struct compat_stat __user *statbuf)
152{
153 compat_ino_t ino;
154 int err;
155
156 if (stat->size > MAX_NON_LFS || !old_valid_dev(stat->dev) ||
157 !old_valid_dev(stat->rdev))
158 return -EOVERFLOW;
159
160 ino = stat->ino;
161 if (sizeof(ino) < sizeof(stat->ino) && ino != stat->ino)
162 return -EOVERFLOW;
163
164 err = put_user(old_encode_dev(stat->dev), &statbuf->st_dev);
165 err |= put_user(stat->ino, &statbuf->st_ino);
166 err |= put_user(stat->mode, &statbuf->st_mode);
167 err |= put_user(stat->nlink, &statbuf->st_nlink);
168 err |= put_user(high2lowuid(stat->uid), &statbuf->st_uid);
169 err |= put_user(high2lowgid(stat->gid), &statbuf->st_gid);
170 err |= put_user(old_encode_dev(stat->rdev), &statbuf->st_rdev);
171 err |= put_user(stat->size, &statbuf->st_size);
172 err |= put_user(stat->atime.tv_sec, &statbuf->st_atime);
173 err |= put_user(stat->atime.tv_nsec, &statbuf->st_atime_nsec);
174 err |= put_user(stat->mtime.tv_sec, &statbuf->st_mtime);
175 err |= put_user(stat->mtime.tv_nsec, &statbuf->st_mtime_nsec);
176 err |= put_user(stat->ctime.tv_sec, &statbuf->st_ctime);
177 err |= put_user(stat->ctime.tv_nsec, &statbuf->st_ctime_nsec);
178 err |= put_user(stat->blksize, &statbuf->st_blksize);
179 err |= put_user(stat->blocks, &statbuf->st_blocks);
180 err |= put_user(0, &statbuf->__unused4[0]);
181 err |= put_user(0, &statbuf->__unused4[1]);
182
183 return err;
184}
185
186static int cp_compat_stat64(struct kstat *stat, 142static int cp_compat_stat64(struct kstat *stat,
187 struct compat_stat64 __user *statbuf) 143 struct compat_stat64 __user *statbuf)
188{ 144{
@@ -522,59 +478,6 @@ asmlinkage long sys32_delete_module(const char __user *name_user)
522 478
523#endif /* CONFIG_MODULES */ 479#endif /* CONFIG_MODULES */
524 480
525/* Translations due to time_t size differences. Which affects all
526 sorts of things, like timeval and itimerval. */
527
528extern struct timezone sys_tz;
529
530asmlinkage long sys32_gettimeofday(struct compat_timeval __user *tv,
531 struct timezone __user *tz)
532{
533 if (tv) {
534 struct timeval ktv;
535 do_gettimeofday(&ktv);
536 if (put_tv32(tv, &ktv))
537 return -EFAULT;
538 }
539 if (tz) {
540 if (copy_to_user(tz, &sys_tz, sizeof(sys_tz)))
541 return -EFAULT;
542 }
543 return 0;
544}
545
546static inline long get_ts32(struct timespec *o, struct compat_timeval __user *i)
547{
548 long usec;
549
550 if (!access_ok(VERIFY_READ, i, sizeof(*i)))
551 return -EFAULT;
552 if (__get_user(o->tv_sec, &i->tv_sec))
553 return -EFAULT;
554 if (__get_user(usec, &i->tv_usec))
555 return -EFAULT;
556 o->tv_nsec = usec * 1000;
557 return 0;
558}
559
560asmlinkage long sys32_settimeofday(struct compat_timeval __user *tv,
561 struct timezone __user *tz)
562{
563 struct timespec kts;
564 struct timezone ktz;
565
566 if (tv) {
567 if (get_ts32(&kts, tv))
568 return -EFAULT;
569 }
570 if (tz) {
571 if (copy_from_user(&ktz, tz, sizeof(ktz)))
572 return -EFAULT;
573 }
574
575 return do_sys_settimeofday(tv ? &kts : NULL, tz ? &ktz : NULL);
576}
577
578asmlinkage compat_ssize_t sys32_pread64(unsigned int fd, 481asmlinkage compat_ssize_t sys32_pread64(unsigned int fd,
579 char __user *ubuf, 482 char __user *ubuf,
580 compat_size_t count, 483 compat_size_t count,
diff --git a/arch/sparc64/kernel/systbls.S b/arch/sparc64/kernel/systbls.S
index 5daee4b04dd5..b2fa4c163638 100644
--- a/arch/sparc64/kernel/systbls.S
+++ b/arch/sparc64/kernel/systbls.S
@@ -41,8 +41,8 @@ sys_call_table32:
41/*100*/ .word sys32_getpriority, sys32_rt_sigreturn, sys32_rt_sigaction, sys32_rt_sigprocmask, sys32_rt_sigpending 41/*100*/ .word sys32_getpriority, sys32_rt_sigreturn, sys32_rt_sigaction, sys32_rt_sigprocmask, sys32_rt_sigpending
42 .word compat_sys_rt_sigtimedwait, sys32_rt_sigqueueinfo, compat_sys_rt_sigsuspend, sys_setresuid, sys_getresuid 42 .word compat_sys_rt_sigtimedwait, sys32_rt_sigqueueinfo, compat_sys_rt_sigsuspend, sys_setresuid, sys_getresuid
43/*110*/ .word sys_setresgid, sys_getresgid, sys_setregid, sys_nis_syscall, sys_nis_syscall 43/*110*/ .word sys_setresgid, sys_getresgid, sys_setregid, sys_nis_syscall, sys_nis_syscall
44 .word sys32_getgroups, sys32_gettimeofday, sys32_getrusage, sys_nis_syscall, sys_getcwd 44 .word sys32_getgroups, compat_sys_gettimeofday, sys32_getrusage, sys_nis_syscall, sys_getcwd
45/*120*/ .word compat_sys_readv, compat_sys_writev, sys32_settimeofday, sys_fchown16, sys_fchmod 45/*120*/ .word compat_sys_readv, compat_sys_writev, compat_sys_settimeofday, sys_fchown16, sys_fchmod
46 .word sys_nis_syscall, sys_setreuid16, sys_setregid16, sys_rename, sys_truncate 46 .word sys_nis_syscall, sys_setreuid16, sys_setregid16, sys_rename, sys_truncate
47/*130*/ .word sys_ftruncate, sys_flock, compat_sys_lstat64, sys_nis_syscall, sys_nis_syscall 47/*130*/ .word sys_ftruncate, sys_flock, compat_sys_lstat64, sys_nis_syscall, sys_nis_syscall
48 .word sys_nis_syscall, sys32_mkdir, sys_rmdir, compat_sys_utimes, compat_sys_stat64 48 .word sys_nis_syscall, sys32_mkdir, sys_rmdir, compat_sys_utimes, compat_sys_stat64
diff --git a/arch/sparc64/kernel/us3_cpufreq.c b/arch/sparc64/kernel/us3_cpufreq.c
index 47e3acafb5be..365b6464e2ce 100644
--- a/arch/sparc64/kernel/us3_cpufreq.c
+++ b/arch/sparc64/kernel/us3_cpufreq.c
@@ -183,7 +183,6 @@ static int __init us3_freq_cpu_init(struct cpufreq_policy *policy)
183 table[3].index = 0; 183 table[3].index = 0;
184 table[3].frequency = CPUFREQ_TABLE_END; 184 table[3].frequency = CPUFREQ_TABLE_END;
185 185
186 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
187 policy->cpuinfo.transition_latency = 0; 186 policy->cpuinfo.transition_latency = 0;
188 policy->cur = clock_tick; 187 policy->cur = clock_tick;
189 188
diff --git a/arch/um/Kconfig.i386 b/arch/um/Kconfig.i386
index e09edfa560da..1f57c113df6d 100644
--- a/arch/um/Kconfig.i386
+++ b/arch/um/Kconfig.i386
@@ -9,8 +9,9 @@ config UML_X86
9 default y 9 default y
10 10
11config X86_32 11config X86_32
12 bool 12 bool
13 default y 13 default y
14 select HAVE_AOUT
14 15
15config RWSEM_XCHGADD_ALGORITHM 16config RWSEM_XCHGADD_ALGORITHM
16 def_bool y 17 def_bool y
@@ -42,6 +43,3 @@ config ARCH_REUSE_HOST_VSYSCALL_AREA
42config GENERIC_HWEIGHT 43config GENERIC_HWEIGHT
43 bool 44 bool
44 default y 45 default y
45
46config ARCH_SUPPORTS_AOUT
47 def_bool y
diff --git a/arch/um/Kconfig.x86_64 b/arch/um/Kconfig.x86_64
index 5696e7b374b3..40b3407cfe16 100644
--- a/arch/um/Kconfig.x86_64
+++ b/arch/um/Kconfig.x86_64
@@ -37,6 +37,3 @@ config SMP_BROKEN
37config GENERIC_HWEIGHT 37config GENERIC_HWEIGHT
38 bool 38 bool
39 default y 39 default y
40
41config ARCH_SUPPORTS_AOUT
42 def_bool y
diff --git a/arch/um/kernel/exec.c b/arch/um/kernel/exec.c
index f5d7f4569ba7..598711c62c82 100644
--- a/arch/um/kernel/exec.c
+++ b/arch/um/kernel/exec.c
@@ -42,23 +42,11 @@ void start_thread(struct pt_regs *regs, unsigned long eip, unsigned long esp)
42 PT_REGS_SP(regs) = esp; 42 PT_REGS_SP(regs) = esp;
43} 43}
44 44
45#ifdef CONFIG_TTY_LOG
46extern void log_exec(char **argv, void *tty);
47#endif
48
49static long execve1(char *file, char __user * __user *argv, 45static long execve1(char *file, char __user * __user *argv,
50 char __user *__user *env) 46 char __user *__user *env)
51{ 47{
52 long error; 48 long error;
53#ifdef CONFIG_TTY_LOG
54 struct tty_struct *tty;
55 49
56 mutex_lock(&tty_mutex);
57 tty = get_current_tty();
58 if (tty)
59 log_exec(argv, tty);
60 mutex_unlock(&tty_mutex);
61#endif
62 error = do_execve(file, argv, env, &current->thread.regs); 50 error = do_execve(file, argv, env, &current->thread.regs);
63 if (error == 0) { 51 if (error == 0) {
64 task_lock(current); 52 task_lock(current);
diff --git a/arch/um/os-Linux/Makefile b/arch/um/os-Linux/Makefile
index 8a48d6a30064..d66f0388f091 100644
--- a/arch/um/os-Linux/Makefile
+++ b/arch/um/os-Linux/Makefile
@@ -7,9 +7,6 @@ obj-y = aio.o elf_aux.o execvp.o file.o helper.o irq.o main.o mem.o process.o \
7 registers.o sigio.o signal.o start_up.o time.o tty.o uaccess.o \ 7 registers.o sigio.o signal.o start_up.o time.o tty.o uaccess.o \
8 umid.o tls.o user_syms.o util.o drivers/ sys-$(SUBARCH)/ skas/ 8 umid.o tls.o user_syms.o util.o drivers/ sys-$(SUBARCH)/ skas/
9 9
10obj-$(CONFIG_TTY_LOG) += tty_log.o
11user-objs-$(CONFIG_TTY_LOG) += tty_log.o
12
13USER_OBJS := $(user-objs-y) aio.o elf_aux.o execvp.o file.o helper.o irq.o \ 10USER_OBJS := $(user-objs-y) aio.o elf_aux.o execvp.o file.o helper.o irq.o \
14 main.o mem.o process.o registers.o sigio.o signal.o start_up.o time.o \ 11 main.o mem.o process.o registers.o sigio.o signal.o start_up.o time.o \
15 tty.o tls.o uaccess.o umid.o util.o 12 tty.o tls.o uaccess.o umid.o util.o
diff --git a/arch/um/os-Linux/tty_log.c b/arch/um/os-Linux/tty_log.c
deleted file mode 100644
index cc648e6fd3a2..000000000000
--- a/arch/um/os-Linux/tty_log.c
+++ /dev/null
@@ -1,217 +0,0 @@
1/*
2 * Copyright (C) 2002 Jeff Dike (jdike@karaya.com) and
3 * geoffrey hing <ghing@net.ohio-state.edu>
4 * Licensed under the GPL
5 */
6
7#include <errno.h>
8#include <string.h>
9#include <stdio.h>
10#include <stdlib.h>
11#include <unistd.h>
12#include <sys/time.h>
13#include "init.h"
14#include "user.h"
15#include "os.h"
16
17#define TTY_LOG_DIR "./"
18
19/* Set early in boot and then unchanged */
20static char *tty_log_dir = TTY_LOG_DIR;
21static int tty_log_fd = -1;
22
23#define TTY_LOG_OPEN 1
24#define TTY_LOG_CLOSE 2
25#define TTY_LOG_WRITE 3
26#define TTY_LOG_EXEC 4
27
28#define TTY_READ 1
29#define TTY_WRITE 2
30
31struct tty_log_buf {
32 int what;
33 unsigned long tty;
34 int len;
35 int direction;
36 unsigned long sec;
37 unsigned long usec;
38};
39
40int open_tty_log(void *tty, void *current_tty)
41{
42 struct timeval tv;
43 struct tty_log_buf data;
44 char buf[strlen(tty_log_dir) + sizeof("01234567890-01234567\0")];
45 int fd;
46
47 gettimeofday(&tv, NULL);
48 if(tty_log_fd != -1){
49 data = ((struct tty_log_buf) { .what = TTY_LOG_OPEN,
50 .tty = (unsigned long) tty,
51 .len = sizeof(current_tty),
52 .direction = 0,
53 .sec = tv.tv_sec,
54 .usec = tv.tv_usec } );
55 write(tty_log_fd, &data, sizeof(data));
56 write(tty_log_fd, &current_tty, data.len);
57 return tty_log_fd;
58 }
59
60 sprintf(buf, "%s/%0u-%0u", tty_log_dir, (unsigned int) tv.tv_sec,
61 (unsigned int) tv.tv_usec);
62
63 fd = os_open_file(buf, of_append(of_create(of_rdwr(OPENFLAGS()))),
64 0644);
65 if(fd < 0){
66 printk("open_tty_log : couldn't open '%s', errno = %d\n",
67 buf, -fd);
68 }
69 return fd;
70}
71
72void close_tty_log(int fd, void *tty)
73{
74 struct tty_log_buf data;
75 struct timeval tv;
76
77 if(tty_log_fd != -1){
78 gettimeofday(&tv, NULL);
79 data = ((struct tty_log_buf) { .what = TTY_LOG_CLOSE,
80 .tty = (unsigned long) tty,
81 .len = 0,
82 .direction = 0,
83 .sec = tv.tv_sec,
84 .usec = tv.tv_usec } );
85 write(tty_log_fd, &data, sizeof(data));
86 return;
87 }
88 os_close_file(fd);
89}
90
91static int log_chunk(int fd, const char *buf, int len)
92{
93 int total = 0, try, missed, n;
94 char chunk[64];
95
96 while(len > 0){
97 try = (len > sizeof(chunk)) ? sizeof(chunk) : len;
98 missed = copy_from_user_proc(chunk, (char *) buf, try);
99 try -= missed;
100 n = write(fd, chunk, try);
101 if(n != try) {
102 if(n < 0)
103 return -errno;
104 return -EIO;
105 }
106 if(missed != 0)
107 return -EFAULT;
108
109 len -= try;
110 total += try;
111 buf += try;
112 }
113
114 return total;
115}
116
117int write_tty_log(int fd, const char *buf, int len, void *tty, int is_read)
118{
119 struct timeval tv;
120 struct tty_log_buf data;
121 int direction;
122
123 if(fd == tty_log_fd){
124 gettimeofday(&tv, NULL);
125 direction = is_read ? TTY_READ : TTY_WRITE;
126 data = ((struct tty_log_buf) { .what = TTY_LOG_WRITE,
127 .tty = (unsigned long) tty,
128 .len = len,
129 .direction = direction,
130 .sec = tv.tv_sec,
131 .usec = tv.tv_usec } );
132 write(tty_log_fd, &data, sizeof(data));
133 }
134
135 return log_chunk(fd, buf, len);
136}
137
138void log_exec(char **argv, void *tty)
139{
140 struct timeval tv;
141 struct tty_log_buf data;
142 char **ptr,*arg;
143 int len;
144
145 if(tty_log_fd == -1) return;
146
147 gettimeofday(&tv, NULL);
148
149 len = 0;
150 for(ptr = argv; ; ptr++){
151 if(copy_from_user_proc(&arg, ptr, sizeof(arg)))
152 return;
153 if(arg == NULL) break;
154 len += strlen_user_proc(arg);
155 }
156
157 data = ((struct tty_log_buf) { .what = TTY_LOG_EXEC,
158 .tty = (unsigned long) tty,
159 .len = len,
160 .direction = 0,
161 .sec = tv.tv_sec,
162 .usec = tv.tv_usec } );
163 write(tty_log_fd, &data, sizeof(data));
164
165 for(ptr = argv; ; ptr++){
166 if(copy_from_user_proc(&arg, ptr, sizeof(arg)))
167 return;
168 if(arg == NULL) break;
169 log_chunk(tty_log_fd, arg, strlen_user_proc(arg));
170 }
171}
172
173extern void register_tty_logger(int (*opener)(void *, void *),
174 int (*writer)(int, const char *, int,
175 void *, int),
176 void (*closer)(int, void *));
177
178static int register_logger(void)
179{
180 register_tty_logger(open_tty_log, write_tty_log, close_tty_log);
181 return 0;
182}
183
184__uml_initcall(register_logger);
185
186static int __init set_tty_log_dir(char *name, int *add)
187{
188 tty_log_dir = name;
189 return 0;
190}
191
192__uml_setup("tty_log_dir=", set_tty_log_dir,
193"tty_log_dir=<directory>\n"
194" This is used to specify the directory where the logs of all pty\n"
195" data from this UML machine will be written.\n\n"
196);
197
198static int __init set_tty_log_fd(char *name, int *add)
199{
200 char *end;
201
202 tty_log_fd = strtoul(name, &end, 0);
203 if((*end != '\0') || (end == name)){
204 printf("set_tty_log_fd - strtoul failed on '%s'\n", name);
205 tty_log_fd = -1;
206 }
207
208 *add = 0;
209 return 0;
210}
211
212__uml_setup("tty_log_fd=", set_tty_log_fd,
213"tty_log_fd=<fd>\n"
214" This is used to specify a preconfigured file descriptor to which all\n"
215" tty data will be written. Preconfigure the descriptor with something\n"
216" like '10>tty_log tty_log_fd=10'.\n\n"
217);
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 5a34c5427a07..40ee80809562 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -18,6 +18,7 @@ config X86_64
18### Arch settings 18### Arch settings
19config X86 19config X86
20 def_bool y 20 def_bool y
21 select HAVE_AOUT if X86_32
21 select HAVE_UNSTABLE_SCHED_CLOCK 22 select HAVE_UNSTABLE_SCHED_CLOCK
22 select HAVE_IDE 23 select HAVE_IDE
23 select HAVE_OPROFILE 24 select HAVE_OPROFILE
@@ -39,10 +40,6 @@ config ARCH_DEFCONFIG
39 default "arch/x86/configs/i386_defconfig" if X86_32 40 default "arch/x86/configs/i386_defconfig" if X86_32
40 default "arch/x86/configs/x86_64_defconfig" if X86_64 41 default "arch/x86/configs/x86_64_defconfig" if X86_64
41 42
42
43config GENERIC_LOCKBREAK
44 def_bool n
45
46config GENERIC_TIME 43config GENERIC_TIME
47 def_bool y 44 def_bool y
48 45
@@ -95,7 +92,7 @@ config GENERIC_HWEIGHT
95 def_bool y 92 def_bool y
96 93
97config GENERIC_GPIO 94config GENERIC_GPIO
98 def_bool n 95 bool
99 96
100config ARCH_MAY_HAVE_PC_FDC 97config ARCH_MAY_HAVE_PC_FDC
101 def_bool y 98 def_bool y
@@ -106,12 +103,6 @@ config RWSEM_GENERIC_SPINLOCK
106config RWSEM_XCHGADD_ALGORITHM 103config RWSEM_XCHGADD_ALGORITHM
107 def_bool X86_XADD 104 def_bool X86_XADD
108 105
109config ARCH_HAS_ILOG2_U32
110 def_bool n
111
112config ARCH_HAS_ILOG2_U64
113 def_bool n
114
115config ARCH_HAS_CPU_IDLE_WAIT 106config ARCH_HAS_CPU_IDLE_WAIT
116 def_bool y 107 def_bool y
117 108
@@ -153,9 +144,6 @@ config AUDIT_ARCH
153 bool 144 bool
154 default X86_64 145 default X86_64
155 146
156config ARCH_SUPPORTS_AOUT
157 def_bool y
158
159config ARCH_SUPPORTS_OPTIMIZED_INLINING 147config ARCH_SUPPORTS_OPTIMIZED_INLINING
160 def_bool y 148 def_bool y
161 149
@@ -761,9 +749,8 @@ config I8K
761 Say N otherwise. 749 Say N otherwise.
762 750
763config X86_REBOOTFIXUPS 751config X86_REBOOTFIXUPS
764 def_bool n 752 bool "Enable X86 board specific fixups for reboot"
765 prompt "Enable X86 board specific fixups for reboot" 753 depends on X86_32
766 depends on X86_32 && X86
767 ---help--- 754 ---help---
768 This enables chipset and/or board specific fixups to be done 755 This enables chipset and/or board specific fixups to be done
769 in order to get reboot to work correctly. This is only needed on 756 in order to get reboot to work correctly. This is only needed on
@@ -947,16 +934,17 @@ config HIGHMEM
947 depends on X86_32 && (HIGHMEM64G || HIGHMEM4G) 934 depends on X86_32 && (HIGHMEM64G || HIGHMEM4G)
948 935
949config X86_PAE 936config X86_PAE
950 def_bool n 937 bool "PAE (Physical Address Extension) Support"
951 prompt "PAE (Physical Address Extension) Support"
952 depends on X86_32 && !HIGHMEM4G 938 depends on X86_32 && !HIGHMEM4G
953 select RESOURCES_64BIT
954 help 939 help
955 PAE is required for NX support, and furthermore enables 940 PAE is required for NX support, and furthermore enables
956 larger swapspace support for non-overcommit purposes. It 941 larger swapspace support for non-overcommit purposes. It
957 has the cost of more pagetable lookup overhead, and also 942 has the cost of more pagetable lookup overhead, and also
958 consumes more pagetable space per process. 943 consumes more pagetable space per process.
959 944
945config ARCH_PHYS_ADDR_T_64BIT
946 def_bool X86_64 || X86_PAE
947
960# Common NUMA Features 948# Common NUMA Features
961config NUMA 949config NUMA
962 bool "Numa Memory Allocation and Scheduler Support (EXPERIMENTAL)" 950 bool "Numa Memory Allocation and Scheduler Support (EXPERIMENTAL)"
@@ -1241,8 +1229,7 @@ config X86_PAT
1241 If unsure, say Y. 1229 If unsure, say Y.
1242 1230
1243config EFI 1231config EFI
1244 def_bool n 1232 bool "EFI runtime service support"
1245 prompt "EFI runtime service support"
1246 depends on ACPI 1233 depends on ACPI
1247 ---help--- 1234 ---help---
1248 This enables the kernel to use EFI runtime services that are 1235 This enables the kernel to use EFI runtime services that are
@@ -1886,7 +1873,7 @@ config IA32_EMULATION
1886 1873
1887config IA32_AOUT 1874config IA32_AOUT
1888 tristate "IA32 a.out support" 1875 tristate "IA32 a.out support"
1889 depends on IA32_EMULATION && ARCH_SUPPORTS_AOUT 1876 depends on IA32_EMULATION
1890 help 1877 help
1891 Support old a.out binaries in the 32bit emulation. 1878 Support old a.out binaries in the 32bit emulation.
1892 1879
diff --git a/arch/x86/boot/video-vesa.c b/arch/x86/boot/video-vesa.c
index 1e6fe0214c85..99b3079dc6ab 100644
--- a/arch/x86/boot/video-vesa.c
+++ b/arch/x86/boot/video-vesa.c
@@ -88,14 +88,11 @@ static int vesa_probe(void)
88 (vminfo.memory_layout == 4 || 88 (vminfo.memory_layout == 4 ||
89 vminfo.memory_layout == 6) && 89 vminfo.memory_layout == 6) &&
90 vminfo.memory_planes == 1) { 90 vminfo.memory_planes == 1) {
91#ifdef CONFIG_FB 91#ifdef CONFIG_FB_BOOT_VESA_SUPPORT
92 /* Graphics mode, color, linear frame buffer 92 /* Graphics mode, color, linear frame buffer
93 supported. Only register the mode if 93 supported. Only register the mode if
94 if framebuffer is configured, however, 94 if framebuffer is configured, however,
95 otherwise the user will be left without a screen. 95 otherwise the user will be left without a screen. */
96 We don't require CONFIG_FB_VESA, however, since
97 some of the other framebuffer drivers can use
98 this mode-setting, too. */
99 mi = GET_HEAP(struct mode_info, 1); 96 mi = GET_HEAP(struct mode_info, 1);
100 mi->mode = mode + VIDEO_FIRST_VESA; 97 mi->mode = mode + VIDEO_FIRST_VESA;
101 mi->depth = vminfo.bpp; 98 mi->depth = vminfo.bpp;
@@ -133,10 +130,12 @@ static int vesa_set_mode(struct mode_info *mode)
133 if ((vminfo.mode_attr & 0x15) == 0x05) { 130 if ((vminfo.mode_attr & 0x15) == 0x05) {
134 /* It's a supported text mode */ 131 /* It's a supported text mode */
135 is_graphic = 0; 132 is_graphic = 0;
133#ifdef CONFIG_FB_BOOT_VESA_SUPPORT
136 } else if ((vminfo.mode_attr & 0x99) == 0x99) { 134 } else if ((vminfo.mode_attr & 0x99) == 0x99) {
137 /* It's a graphics mode with linear frame buffer */ 135 /* It's a graphics mode with linear frame buffer */
138 is_graphic = 1; 136 is_graphic = 1;
139 vesa_mode |= 0x4000; /* Request linear frame buffer */ 137 vesa_mode |= 0x4000; /* Request linear frame buffer */
138#endif
140 } else { 139 } else {
141 return -1; /* Invalid mode */ 140 return -1; /* Invalid mode */
142 } 141 }
diff --git a/arch/x86/ia32/ia32entry.S b/arch/x86/ia32/ia32entry.S
index eb4314768bf7..256b00b61892 100644
--- a/arch/x86/ia32/ia32entry.S
+++ b/arch/x86/ia32/ia32entry.S
@@ -571,8 +571,8 @@ ia32_sys_call_table:
571 .quad compat_sys_setrlimit /* 75 */ 571 .quad compat_sys_setrlimit /* 75 */
572 .quad compat_sys_old_getrlimit /* old_getrlimit */ 572 .quad compat_sys_old_getrlimit /* old_getrlimit */
573 .quad compat_sys_getrusage 573 .quad compat_sys_getrusage
574 .quad sys32_gettimeofday 574 .quad compat_sys_gettimeofday
575 .quad sys32_settimeofday 575 .quad compat_sys_settimeofday
576 .quad sys_getgroups16 /* 80 */ 576 .quad sys_getgroups16 /* 80 */
577 .quad sys_setgroups16 577 .quad sys_setgroups16
578 .quad sys32_old_select 578 .quad sys32_old_select
diff --git a/arch/x86/ia32/sys_ia32.c b/arch/x86/ia32/sys_ia32.c
index beda4232ce69..2e09dcd3c0a6 100644
--- a/arch/x86/ia32/sys_ia32.c
+++ b/arch/x86/ia32/sys_ia32.c
@@ -49,41 +49,6 @@
49 49
50#define AA(__x) ((unsigned long)(__x)) 50#define AA(__x) ((unsigned long)(__x))
51 51
52int cp_compat_stat(struct kstat *kbuf, struct compat_stat __user *ubuf)
53{
54 compat_ino_t ino;
55
56 typeof(ubuf->st_uid) uid = 0;
57 typeof(ubuf->st_gid) gid = 0;
58 SET_UID(uid, kbuf->uid);
59 SET_GID(gid, kbuf->gid);
60 if (!old_valid_dev(kbuf->dev) || !old_valid_dev(kbuf->rdev))
61 return -EOVERFLOW;
62 if (kbuf->size >= 0x7fffffff)
63 return -EOVERFLOW;
64 ino = kbuf->ino;
65 if (sizeof(ino) < sizeof(kbuf->ino) && ino != kbuf->ino)
66 return -EOVERFLOW;
67 if (!access_ok(VERIFY_WRITE, ubuf, sizeof(struct compat_stat)) ||
68 __put_user(old_encode_dev(kbuf->dev), &ubuf->st_dev) ||
69 __put_user(ino, &ubuf->st_ino) ||
70 __put_user(kbuf->mode, &ubuf->st_mode) ||
71 __put_user(kbuf->nlink, &ubuf->st_nlink) ||
72 __put_user(uid, &ubuf->st_uid) ||
73 __put_user(gid, &ubuf->st_gid) ||
74 __put_user(old_encode_dev(kbuf->rdev), &ubuf->st_rdev) ||
75 __put_user(kbuf->size, &ubuf->st_size) ||
76 __put_user(kbuf->atime.tv_sec, &ubuf->st_atime) ||
77 __put_user(kbuf->atime.tv_nsec, &ubuf->st_atime_nsec) ||
78 __put_user(kbuf->mtime.tv_sec, &ubuf->st_mtime) ||
79 __put_user(kbuf->mtime.tv_nsec, &ubuf->st_mtime_nsec) ||
80 __put_user(kbuf->ctime.tv_sec, &ubuf->st_ctime) ||
81 __put_user(kbuf->ctime.tv_nsec, &ubuf->st_ctime_nsec) ||
82 __put_user(kbuf->blksize, &ubuf->st_blksize) ||
83 __put_user(kbuf->blocks, &ubuf->st_blocks))
84 return -EFAULT;
85 return 0;
86}
87 52
88asmlinkage long sys32_truncate64(char __user *filename, 53asmlinkage long sys32_truncate64(char __user *filename,
89 unsigned long offset_low, 54 unsigned long offset_low,
@@ -402,75 +367,11 @@ asmlinkage long sys32_rt_sigprocmask(int how, compat_sigset_t __user *set,
402 return 0; 367 return 0;
403} 368}
404 369
405static inline long get_tv32(struct timeval *o, struct compat_timeval __user *i)
406{
407 int err = -EFAULT;
408
409 if (access_ok(VERIFY_READ, i, sizeof(*i))) {
410 err = __get_user(o->tv_sec, &i->tv_sec);
411 err |= __get_user(o->tv_usec, &i->tv_usec);
412 }
413 return err;
414}
415
416static inline long put_tv32(struct compat_timeval __user *o, struct timeval *i)
417{
418 int err = -EFAULT;
419
420 if (access_ok(VERIFY_WRITE, o, sizeof(*o))) {
421 err = __put_user(i->tv_sec, &o->tv_sec);
422 err |= __put_user(i->tv_usec, &o->tv_usec);
423 }
424 return err;
425}
426
427asmlinkage long sys32_alarm(unsigned int seconds) 370asmlinkage long sys32_alarm(unsigned int seconds)
428{ 371{
429 return alarm_setitimer(seconds); 372 return alarm_setitimer(seconds);
430} 373}
431 374
432/*
433 * Translations due to time_t size differences. Which affects all
434 * sorts of things, like timeval and itimerval.
435 */
436asmlinkage long sys32_gettimeofday(struct compat_timeval __user *tv,
437 struct timezone __user *tz)
438{
439 if (tv) {
440 struct timeval ktv;
441
442 do_gettimeofday(&ktv);
443 if (put_tv32(tv, &ktv))
444 return -EFAULT;
445 }
446 if (tz) {
447 if (copy_to_user(tz, &sys_tz, sizeof(sys_tz)))
448 return -EFAULT;
449 }
450 return 0;
451}
452
453asmlinkage long sys32_settimeofday(struct compat_timeval __user *tv,
454 struct timezone __user *tz)
455{
456 struct timeval ktv;
457 struct timespec kts;
458 struct timezone ktz;
459
460 if (tv) {
461 if (get_tv32(&ktv, tv))
462 return -EFAULT;
463 kts.tv_sec = ktv.tv_sec;
464 kts.tv_nsec = ktv.tv_usec * NSEC_PER_USEC;
465 }
466 if (tz) {
467 if (copy_from_user(&ktz, tz, sizeof(ktz)))
468 return -EFAULT;
469 }
470
471 return do_sys_settimeofday(tv ? &kts : NULL, tz ? &ktz : NULL);
472}
473
474struct sel_arg_struct { 375struct sel_arg_struct {
475 unsigned int n; 376 unsigned int n;
476 unsigned int inp; 377 unsigned int inp;
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c
index 34e4d112b1ef..a8fd9ebdc8e2 100644
--- a/arch/x86/kernel/amd_iommu.c
+++ b/arch/x86/kernel/amd_iommu.c
@@ -295,7 +295,7 @@ static int iommu_flush_pages(struct amd_iommu *iommu, u16 domid,
295 u64 address, size_t size) 295 u64 address, size_t size)
296{ 296{
297 int s = 0; 297 int s = 0;
298 unsigned pages = iommu_num_pages(address, size); 298 unsigned pages = iommu_num_pages(address, size, PAGE_SIZE);
299 299
300 address &= PAGE_MASK; 300 address &= PAGE_MASK;
301 301
@@ -680,7 +680,8 @@ static struct dma_ops_domain *dma_ops_domain_alloc(struct amd_iommu *iommu,
680 iommu->exclusion_start < dma_dom->aperture_size) { 680 iommu->exclusion_start < dma_dom->aperture_size) {
681 unsigned long startpage = iommu->exclusion_start >> PAGE_SHIFT; 681 unsigned long startpage = iommu->exclusion_start >> PAGE_SHIFT;
682 int pages = iommu_num_pages(iommu->exclusion_start, 682 int pages = iommu_num_pages(iommu->exclusion_start,
683 iommu->exclusion_length); 683 iommu->exclusion_length,
684 PAGE_SIZE);
684 dma_ops_reserve_addresses(dma_dom, startpage, pages); 685 dma_ops_reserve_addresses(dma_dom, startpage, pages);
685 } 686 }
686 687
@@ -935,7 +936,7 @@ static dma_addr_t __map_single(struct device *dev,
935 unsigned long align_mask = 0; 936 unsigned long align_mask = 0;
936 int i; 937 int i;
937 938
938 pages = iommu_num_pages(paddr, size); 939 pages = iommu_num_pages(paddr, size, PAGE_SIZE);
939 paddr &= PAGE_MASK; 940 paddr &= PAGE_MASK;
940 941
941 if (align) 942 if (align)
@@ -980,7 +981,7 @@ static void __unmap_single(struct amd_iommu *iommu,
980 if ((dma_addr == 0) || (dma_addr + size > dma_dom->aperture_size)) 981 if ((dma_addr == 0) || (dma_addr + size > dma_dom->aperture_size))
981 return; 982 return;
982 983
983 pages = iommu_num_pages(dma_addr, size); 984 pages = iommu_num_pages(dma_addr, size, PAGE_SIZE);
984 dma_addr &= PAGE_MASK; 985 dma_addr &= PAGE_MASK;
985 start = dma_addr; 986 start = dma_addr;
986 987
diff --git a/arch/x86/kernel/cpuid.c b/arch/x86/kernel/cpuid.c
index 6a44d6465991..72cefd1e649b 100644
--- a/arch/x86/kernel/cpuid.c
+++ b/arch/x86/kernel/cpuid.c
@@ -147,8 +147,8 @@ static __cpuinit int cpuid_device_create(int cpu)
147{ 147{
148 struct device *dev; 148 struct device *dev;
149 149
150 dev = device_create_drvdata(cpuid_class, NULL, MKDEV(CPUID_MAJOR, cpu), 150 dev = device_create(cpuid_class, NULL, MKDEV(CPUID_MAJOR, cpu), NULL,
151 NULL, "cpu%d", cpu); 151 "cpu%d", cpu);
152 return IS_ERR(dev) ? PTR_ERR(dev) : 0; 152 return IS_ERR(dev) ? PTR_ERR(dev) : 0;
153} 153}
154 154
diff --git a/arch/x86/kernel/dumpstack_32.c b/arch/x86/kernel/dumpstack_32.c
index 201ee359a1a9..1a78180f08d3 100644
--- a/arch/x86/kernel/dumpstack_32.c
+++ b/arch/x86/kernel/dumpstack_32.c
@@ -13,6 +13,7 @@
13#include <linux/kexec.h> 13#include <linux/kexec.h>
14#include <linux/bug.h> 14#include <linux/bug.h>
15#include <linux/nmi.h> 15#include <linux/nmi.h>
16#include <linux/sysfs.h>
16 17
17#include <asm/stacktrace.h> 18#include <asm/stacktrace.h>
18 19
@@ -343,6 +344,7 @@ int __kprobes __die(const char *str, struct pt_regs *regs, long err)
343 printk("DEBUG_PAGEALLOC"); 344 printk("DEBUG_PAGEALLOC");
344#endif 345#endif
345 printk("\n"); 346 printk("\n");
347 sysfs_printk_last_file();
346 if (notify_die(DIE_OOPS, str, regs, err, 348 if (notify_die(DIE_OOPS, str, regs, err,
347 current->thread.trap_no, SIGSEGV) == NOTIFY_STOP) 349 current->thread.trap_no, SIGSEGV) == NOTIFY_STOP)
348 return 1; 350 return 1;
diff --git a/arch/x86/kernel/dumpstack_64.c b/arch/x86/kernel/dumpstack_64.c
index 086cc8118e39..96a5db7da8a7 100644
--- a/arch/x86/kernel/dumpstack_64.c
+++ b/arch/x86/kernel/dumpstack_64.c
@@ -13,6 +13,7 @@
13#include <linux/kexec.h> 13#include <linux/kexec.h>
14#include <linux/bug.h> 14#include <linux/bug.h>
15#include <linux/nmi.h> 15#include <linux/nmi.h>
16#include <linux/sysfs.h>
16 17
17#include <asm/stacktrace.h> 18#include <asm/stacktrace.h>
18 19
@@ -489,6 +490,7 @@ int __kprobes __die(const char *str, struct pt_regs *regs, long err)
489 printk("DEBUG_PAGEALLOC"); 490 printk("DEBUG_PAGEALLOC");
490#endif 491#endif
491 printk("\n"); 492 printk("\n");
493 sysfs_printk_last_file();
492 if (notify_die(DIE_OOPS, str, regs, err, 494 if (notify_die(DIE_OOPS, str, regs, err,
493 current->thread.trap_no, SIGSEGV) == NOTIFY_STOP) 495 current->thread.trap_no, SIGSEGV) == NOTIFY_STOP)
494 return 1; 496 return 1;
diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c
index 78e642feac30..ce97bf3bed12 100644
--- a/arch/x86/kernel/e820.c
+++ b/arch/x86/kernel/e820.c
@@ -1282,12 +1282,10 @@ void __init e820_reserve_resources(void)
1282 e820_res = res; 1282 e820_res = res;
1283 for (i = 0; i < e820.nr_map; i++) { 1283 for (i = 0; i < e820.nr_map; i++) {
1284 end = e820.map[i].addr + e820.map[i].size - 1; 1284 end = e820.map[i].addr + e820.map[i].size - 1;
1285#ifndef CONFIG_RESOURCES_64BIT 1285 if (end != (resource_size_t)end) {
1286 if (end > 0x100000000ULL) {
1287 res++; 1286 res++;
1288 continue; 1287 continue;
1289 } 1288 }
1290#endif
1291 res->name = e820_type_to_string(e820.map[i].type); 1289 res->name = e820_type_to_string(e820.map[i].type);
1292 res->start = e820.map[i].addr; 1290 res->start = e820.map[i].addr;
1293 res->end = end; 1291 res->end = end;
diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c
index d02def06ca91..774ac4991568 100644
--- a/arch/x86/kernel/kvmclock.c
+++ b/arch/x86/kernel/kvmclock.c
@@ -78,6 +78,34 @@ static cycle_t kvm_clock_read(void)
78 return ret; 78 return ret;
79} 79}
80 80
81/*
82 * If we don't do that, there is the possibility that the guest
83 * will calibrate under heavy load - thus, getting a lower lpj -
84 * and execute the delays themselves without load. This is wrong,
85 * because no delay loop can finish beforehand.
86 * Any heuristics is subject to fail, because ultimately, a large
87 * poll of guests can be running and trouble each other. So we preset
88 * lpj here
89 */
90static unsigned long kvm_get_tsc_khz(void)
91{
92 return preset_lpj;
93}
94
95static void kvm_get_preset_lpj(void)
96{
97 struct pvclock_vcpu_time_info *src;
98 unsigned long khz;
99 u64 lpj;
100
101 src = &per_cpu(hv_clock, 0);
102 khz = pvclock_tsc_khz(src);
103
104 lpj = ((u64)khz * 1000);
105 do_div(lpj, HZ);
106 preset_lpj = lpj;
107}
108
81static struct clocksource kvm_clock = { 109static struct clocksource kvm_clock = {
82 .name = "kvm-clock", 110 .name = "kvm-clock",
83 .read = kvm_clock_read, 111 .read = kvm_clock_read,
@@ -153,6 +181,7 @@ void __init kvmclock_init(void)
153 pv_time_ops.get_wallclock = kvm_get_wallclock; 181 pv_time_ops.get_wallclock = kvm_get_wallclock;
154 pv_time_ops.set_wallclock = kvm_set_wallclock; 182 pv_time_ops.set_wallclock = kvm_set_wallclock;
155 pv_time_ops.sched_clock = kvm_clock_read; 183 pv_time_ops.sched_clock = kvm_clock_read;
184 pv_time_ops.get_tsc_khz = kvm_get_tsc_khz;
156#ifdef CONFIG_X86_LOCAL_APIC 185#ifdef CONFIG_X86_LOCAL_APIC
157 pv_apic_ops.setup_secondary_clock = kvm_setup_secondary_clock; 186 pv_apic_ops.setup_secondary_clock = kvm_setup_secondary_clock;
158#endif 187#endif
@@ -163,6 +192,7 @@ void __init kvmclock_init(void)
163#ifdef CONFIG_KEXEC 192#ifdef CONFIG_KEXEC
164 machine_ops.crash_shutdown = kvm_crash_shutdown; 193 machine_ops.crash_shutdown = kvm_crash_shutdown;
165#endif 194#endif
195 kvm_get_preset_lpj();
166 clocksource_register(&kvm_clock); 196 clocksource_register(&kvm_clock);
167 } 197 }
168} 198}
diff --git a/arch/x86/kernel/msr.c b/arch/x86/kernel/msr.c
index 2e2af5d18191..82a7c7ed6d45 100644
--- a/arch/x86/kernel/msr.c
+++ b/arch/x86/kernel/msr.c
@@ -163,8 +163,8 @@ static int __cpuinit msr_device_create(int cpu)
163{ 163{
164 struct device *dev; 164 struct device *dev;
165 165
166 dev = device_create_drvdata(msr_class, NULL, MKDEV(MSR_MAJOR, cpu), 166 dev = device_create(msr_class, NULL, MKDEV(MSR_MAJOR, cpu), NULL,
167 NULL, "msr%d", cpu); 167 "msr%d", cpu);
168 return IS_ERR(dev) ? PTR_ERR(dev) : 0; 168 return IS_ERR(dev) ? PTR_ERR(dev) : 0;
169} 169}
170 170
diff --git a/arch/x86/kernel/pci-calgary_64.c b/arch/x86/kernel/pci-calgary_64.c
index 080d1d27f37a..e1e731d78f38 100644
--- a/arch/x86/kernel/pci-calgary_64.c
+++ b/arch/x86/kernel/pci-calgary_64.c
@@ -217,16 +217,6 @@ static inline unsigned long verify_bit_range(unsigned long* bitmap,
217 217
218#endif /* CONFIG_IOMMU_DEBUG */ 218#endif /* CONFIG_IOMMU_DEBUG */
219 219
220static inline unsigned int num_dma_pages(unsigned long dma, unsigned int dmalen)
221{
222 unsigned int npages;
223
224 npages = PAGE_ALIGN(dma + dmalen) - (dma & PAGE_MASK);
225 npages >>= PAGE_SHIFT;
226
227 return npages;
228}
229
230static inline int translation_enabled(struct iommu_table *tbl) 220static inline int translation_enabled(struct iommu_table *tbl)
231{ 221{
232 /* only PHBs with translation enabled have an IOMMU table */ 222 /* only PHBs with translation enabled have an IOMMU table */
@@ -408,7 +398,7 @@ static void calgary_unmap_sg(struct device *dev,
408 if (dmalen == 0) 398 if (dmalen == 0)
409 break; 399 break;
410 400
411 npages = num_dma_pages(dma, dmalen); 401 npages = iommu_num_pages(dma, dmalen, PAGE_SIZE);
412 iommu_free(tbl, dma, npages); 402 iommu_free(tbl, dma, npages);
413 } 403 }
414} 404}
@@ -427,7 +417,7 @@ static int calgary_map_sg(struct device *dev, struct scatterlist *sg,
427 BUG_ON(!sg_page(s)); 417 BUG_ON(!sg_page(s));
428 418
429 vaddr = (unsigned long) sg_virt(s); 419 vaddr = (unsigned long) sg_virt(s);
430 npages = num_dma_pages(vaddr, s->length); 420 npages = iommu_num_pages(vaddr, s->length, PAGE_SIZE);
431 421
432 entry = iommu_range_alloc(dev, tbl, npages); 422 entry = iommu_range_alloc(dev, tbl, npages);
433 if (entry == bad_dma_address) { 423 if (entry == bad_dma_address) {
@@ -464,7 +454,7 @@ static dma_addr_t calgary_map_single(struct device *dev, phys_addr_t paddr,
464 struct iommu_table *tbl = find_iommu_table(dev); 454 struct iommu_table *tbl = find_iommu_table(dev);
465 455
466 uaddr = (unsigned long)vaddr; 456 uaddr = (unsigned long)vaddr;
467 npages = num_dma_pages(uaddr, size); 457 npages = iommu_num_pages(uaddr, size, PAGE_SIZE);
468 458
469 return iommu_alloc(dev, tbl, vaddr, npages, direction); 459 return iommu_alloc(dev, tbl, vaddr, npages, direction);
470} 460}
@@ -475,7 +465,7 @@ static void calgary_unmap_single(struct device *dev, dma_addr_t dma_handle,
475 struct iommu_table *tbl = find_iommu_table(dev); 465 struct iommu_table *tbl = find_iommu_table(dev);
476 unsigned int npages; 466 unsigned int npages;
477 467
478 npages = num_dma_pages(dma_handle, size); 468 npages = iommu_num_pages(dma_handle, size, PAGE_SIZE);
479 iommu_free(tbl, dma_handle, npages); 469 iommu_free(tbl, dma_handle, npages);
480} 470}
481 471
diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c
index 0a3824e837b4..192624820217 100644
--- a/arch/x86/kernel/pci-dma.c
+++ b/arch/x86/kernel/pci-dma.c
@@ -125,13 +125,13 @@ void __init pci_iommu_alloc(void)
125 pci_swiotlb_init(); 125 pci_swiotlb_init();
126} 126}
127 127
128unsigned long iommu_num_pages(unsigned long addr, unsigned long len) 128unsigned long iommu_nr_pages(unsigned long addr, unsigned long len)
129{ 129{
130 unsigned long size = roundup((addr & ~PAGE_MASK) + len, PAGE_SIZE); 130 unsigned long size = roundup((addr & ~PAGE_MASK) + len, PAGE_SIZE);
131 131
132 return size >> PAGE_SHIFT; 132 return size >> PAGE_SHIFT;
133} 133}
134EXPORT_SYMBOL(iommu_num_pages); 134EXPORT_SYMBOL(iommu_nr_pages);
135#endif 135#endif
136 136
137void *dma_generic_alloc_coherent(struct device *dev, size_t size, 137void *dma_generic_alloc_coherent(struct device *dev, size_t size,
diff --git a/arch/x86/kernel/pci-gart_64.c b/arch/x86/kernel/pci-gart_64.c
index 145f1c83369f..e3f75bbcedea 100644
--- a/arch/x86/kernel/pci-gart_64.c
+++ b/arch/x86/kernel/pci-gart_64.c
@@ -231,7 +231,7 @@ nonforced_iommu(struct device *dev, unsigned long addr, size_t size)
231static dma_addr_t dma_map_area(struct device *dev, dma_addr_t phys_mem, 231static dma_addr_t dma_map_area(struct device *dev, dma_addr_t phys_mem,
232 size_t size, int dir, unsigned long align_mask) 232 size_t size, int dir, unsigned long align_mask)
233{ 233{
234 unsigned long npages = iommu_num_pages(phys_mem, size); 234 unsigned long npages = iommu_num_pages(phys_mem, size, PAGE_SIZE);
235 unsigned long iommu_page = alloc_iommu(dev, npages, align_mask); 235 unsigned long iommu_page = alloc_iommu(dev, npages, align_mask);
236 int i; 236 int i;
237 237
@@ -285,7 +285,7 @@ static void gart_unmap_single(struct device *dev, dma_addr_t dma_addr,
285 return; 285 return;
286 286
287 iommu_page = (dma_addr - iommu_bus_base)>>PAGE_SHIFT; 287 iommu_page = (dma_addr - iommu_bus_base)>>PAGE_SHIFT;
288 npages = iommu_num_pages(dma_addr, size); 288 npages = iommu_num_pages(dma_addr, size, PAGE_SIZE);
289 for (i = 0; i < npages; i++) { 289 for (i = 0; i < npages; i++) {
290 iommu_gatt_base[iommu_page + i] = gart_unmapped_entry; 290 iommu_gatt_base[iommu_page + i] = gart_unmapped_entry;
291 CLEAR_LEAK(iommu_page + i); 291 CLEAR_LEAK(iommu_page + i);
@@ -368,7 +368,7 @@ static int __dma_map_cont(struct device *dev, struct scatterlist *start,
368 } 368 }
369 369
370 addr = phys_addr; 370 addr = phys_addr;
371 pages = iommu_num_pages(s->offset, s->length); 371 pages = iommu_num_pages(s->offset, s->length, PAGE_SIZE);
372 while (pages--) { 372 while (pages--) {
373 iommu_gatt_base[iommu_page] = GPTE_ENCODE(addr); 373 iommu_gatt_base[iommu_page] = GPTE_ENCODE(addr);
374 SET_LEAK(iommu_page); 374 SET_LEAK(iommu_page);
@@ -451,7 +451,7 @@ gart_map_sg(struct device *dev, struct scatterlist *sg, int nents, int dir)
451 451
452 seg_size += s->length; 452 seg_size += s->length;
453 need = nextneed; 453 need = nextneed;
454 pages += iommu_num_pages(s->offset, s->length); 454 pages += iommu_num_pages(s->offset, s->length, PAGE_SIZE);
455 ps = s; 455 ps = s;
456 } 456 }
457 if (dma_map_cont(dev, start_sg, i - start, sgmap, pages, need) < 0) 457 if (dma_map_cont(dev, start_sg, i - start, sgmap, pages, need) < 0)
diff --git a/arch/x86/kernel/pvclock.c b/arch/x86/kernel/pvclock.c
index 05fbe9a0325a..4f9c55f3a7c0 100644
--- a/arch/x86/kernel/pvclock.c
+++ b/arch/x86/kernel/pvclock.c
@@ -97,6 +97,18 @@ static unsigned pvclock_get_time_values(struct pvclock_shadow_time *dst,
97 return dst->version; 97 return dst->version;
98} 98}
99 99
100unsigned long pvclock_tsc_khz(struct pvclock_vcpu_time_info *src)
101{
102 u64 pv_tsc_khz = 1000000ULL << 32;
103
104 do_div(pv_tsc_khz, src->tsc_to_system_mul);
105 if (src->tsc_shift < 0)
106 pv_tsc_khz <<= -src->tsc_shift;
107 else
108 pv_tsc_khz >>= src->tsc_shift;
109 return pv_tsc_khz;
110}
111
100cycle_t pvclock_clocksource_read(struct pvclock_vcpu_time_info *src) 112cycle_t pvclock_clocksource_read(struct pvclock_vcpu_time_info *src)
101{ 113{
102 struct pvclock_shadow_time shadow; 114 struct pvclock_shadow_time shadow;
diff --git a/arch/x86/kernel/rtc.c b/arch/x86/kernel/rtc.c
index 05191bbc68b8..0a23b5795b25 100644
--- a/arch/x86/kernel/rtc.c
+++ b/arch/x86/kernel/rtc.c
@@ -223,11 +223,25 @@ static struct platform_device rtc_device = {
223static __init int add_rtc_cmos(void) 223static __init int add_rtc_cmos(void)
224{ 224{
225#ifdef CONFIG_PNP 225#ifdef CONFIG_PNP
226 if (!pnp_platform_devices) 226 static const char *ids[] __initconst =
227 platform_device_register(&rtc_device); 227 { "PNP0b00", "PNP0b01", "PNP0b02", };
228#else 228 struct pnp_dev *dev;
229 struct pnp_id *id;
230 int i;
231
232 pnp_for_each_dev(dev) {
233 for (id = dev->id; id; id = id->next) {
234 for (i = 0; i < ARRAY_SIZE(ids); i++) {
235 if (compare_pnp_id(id, ids[i]) != 0)
236 return 0;
237 }
238 }
239 }
240#endif
241
229 platform_device_register(&rtc_device); 242 platform_device_register(&rtc_device);
230#endif /* CONFIG_PNP */ 243 dev_info(&rtc_device.dev,
244 "registered platform RTC device (no PNP device found)\n");
231 return 0; 245 return 0;
232} 246}
233device_initcall(add_rtc_cmos); 247device_initcall(add_rtc_cmos);
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 8c3aca7cb343..7ed9e070a6e9 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -282,6 +282,8 @@ static void __cpuinit smp_callin(void)
282 cpu_set(cpuid, cpu_callin_map); 282 cpu_set(cpuid, cpu_callin_map);
283} 283}
284 284
285static int __cpuinitdata unsafe_smp;
286
285/* 287/*
286 * Activate a secondary processor. 288 * Activate a secondary processor.
287 */ 289 */
@@ -397,7 +399,7 @@ static void __cpuinit smp_apply_quirks(struct cpuinfo_x86 *c)
397 goto valid_k7; 399 goto valid_k7;
398 400
399 /* If we get here, not a certified SMP capable AMD system. */ 401 /* If we get here, not a certified SMP capable AMD system. */
400 add_taint(TAINT_UNSAFE_SMP); 402 unsafe_smp = 1;
401 } 403 }
402 404
403valid_k7: 405valid_k7:
@@ -414,12 +416,10 @@ static void __cpuinit smp_checks(void)
414 * Don't taint if we are running SMP kernel on a single non-MP 416 * Don't taint if we are running SMP kernel on a single non-MP
415 * approved Athlon 417 * approved Athlon
416 */ 418 */
417 if (tainted & TAINT_UNSAFE_SMP) { 419 if (unsafe_smp && num_online_cpus() > 1) {
418 if (num_online_cpus()) 420 printk(KERN_INFO "WARNING: This combination of AMD"
419 printk(KERN_INFO "WARNING: This combination of AMD" 421 "processors is not suitable for SMP.\n");
420 "processors is not suitable for SMP.\n"); 422 add_taint(TAINT_UNSAFE_SMP);
421 else
422 tainted &= ~TAINT_UNSAFE_SMP;
423 } 423 }
424} 424}
425 425
diff --git a/arch/x86/kvm/Makefile b/arch/x86/kvm/Makefile
index d0e940bb6f40..c02343594b4d 100644
--- a/arch/x86/kvm/Makefile
+++ b/arch/x86/kvm/Makefile
@@ -3,10 +3,13 @@
3# 3#
4 4
5common-objs = $(addprefix ../../../virt/kvm/, kvm_main.o ioapic.o \ 5common-objs = $(addprefix ../../../virt/kvm/, kvm_main.o ioapic.o \
6 coalesced_mmio.o) 6 coalesced_mmio.o irq_comm.o)
7ifeq ($(CONFIG_KVM_TRACE),y) 7ifeq ($(CONFIG_KVM_TRACE),y)
8common-objs += $(addprefix ../../../virt/kvm/, kvm_trace.o) 8common-objs += $(addprefix ../../../virt/kvm/, kvm_trace.o)
9endif 9endif
10ifeq ($(CONFIG_DMAR),y)
11common-objs += $(addprefix ../../../virt/kvm/, vtd.o)
12endif
10 13
11EXTRA_CFLAGS += -Ivirt/kvm -Iarch/x86/kvm 14EXTRA_CFLAGS += -Ivirt/kvm -Iarch/x86/kvm
12 15
diff --git a/arch/x86/kvm/i8254.c b/arch/x86/kvm/i8254.c
index c0f7872a9124..634132a9a512 100644
--- a/arch/x86/kvm/i8254.c
+++ b/arch/x86/kvm/i8254.c
@@ -200,13 +200,14 @@ static int __pit_timer_fn(struct kvm_kpit_state *ps)
200 200
201 if (!atomic_inc_and_test(&pt->pending)) 201 if (!atomic_inc_and_test(&pt->pending))
202 set_bit(KVM_REQ_PENDING_TIMER, &vcpu0->requests); 202 set_bit(KVM_REQ_PENDING_TIMER, &vcpu0->requests);
203 if (vcpu0 && waitqueue_active(&vcpu0->wq)) { 203
204 vcpu0->arch.mp_state = KVM_MP_STATE_RUNNABLE; 204 if (vcpu0 && waitqueue_active(&vcpu0->wq))
205 wake_up_interruptible(&vcpu0->wq); 205 wake_up_interruptible(&vcpu0->wq);
206 }
207 206
208 pt->timer.expires = ktime_add_ns(pt->timer.expires, pt->period); 207 pt->timer.expires = ktime_add_ns(pt->timer.expires, pt->period);
209 pt->scheduled = ktime_to_ns(pt->timer.expires); 208 pt->scheduled = ktime_to_ns(pt->timer.expires);
209 if (pt->period)
210 ps->channels[0].count_load_time = pt->timer.expires;
210 211
211 return (pt->period == 0 ? 0 : 1); 212 return (pt->period == 0 ? 0 : 1);
212} 213}
@@ -215,12 +216,22 @@ int pit_has_pending_timer(struct kvm_vcpu *vcpu)
215{ 216{
216 struct kvm_pit *pit = vcpu->kvm->arch.vpit; 217 struct kvm_pit *pit = vcpu->kvm->arch.vpit;
217 218
218 if (pit && vcpu->vcpu_id == 0 && pit->pit_state.inject_pending) 219 if (pit && vcpu->vcpu_id == 0 && pit->pit_state.irq_ack)
219 return atomic_read(&pit->pit_state.pit_timer.pending); 220 return atomic_read(&pit->pit_state.pit_timer.pending);
220
221 return 0; 221 return 0;
222} 222}
223 223
224static void kvm_pit_ack_irq(struct kvm_irq_ack_notifier *kian)
225{
226 struct kvm_kpit_state *ps = container_of(kian, struct kvm_kpit_state,
227 irq_ack_notifier);
228 spin_lock(&ps->inject_lock);
229 if (atomic_dec_return(&ps->pit_timer.pending) < 0)
230 atomic_inc(&ps->pit_timer.pending);
231 ps->irq_ack = 1;
232 spin_unlock(&ps->inject_lock);
233}
234
224static enum hrtimer_restart pit_timer_fn(struct hrtimer *data) 235static enum hrtimer_restart pit_timer_fn(struct hrtimer *data)
225{ 236{
226 struct kvm_kpit_state *ps; 237 struct kvm_kpit_state *ps;
@@ -255,8 +266,9 @@ static void destroy_pit_timer(struct kvm_kpit_timer *pt)
255 hrtimer_cancel(&pt->timer); 266 hrtimer_cancel(&pt->timer);
256} 267}
257 268
258static void create_pit_timer(struct kvm_kpit_timer *pt, u32 val, int is_period) 269static void create_pit_timer(struct kvm_kpit_state *ps, u32 val, int is_period)
259{ 270{
271 struct kvm_kpit_timer *pt = &ps->pit_timer;
260 s64 interval; 272 s64 interval;
261 273
262 interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ); 274 interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ);
@@ -268,6 +280,7 @@ static void create_pit_timer(struct kvm_kpit_timer *pt, u32 val, int is_period)
268 pt->period = (is_period == 0) ? 0 : interval; 280 pt->period = (is_period == 0) ? 0 : interval;
269 pt->timer.function = pit_timer_fn; 281 pt->timer.function = pit_timer_fn;
270 atomic_set(&pt->pending, 0); 282 atomic_set(&pt->pending, 0);
283 ps->irq_ack = 1;
271 284
272 hrtimer_start(&pt->timer, ktime_add_ns(ktime_get(), interval), 285 hrtimer_start(&pt->timer, ktime_add_ns(ktime_get(), interval),
273 HRTIMER_MODE_ABS); 286 HRTIMER_MODE_ABS);
@@ -302,11 +315,11 @@ static void pit_load_count(struct kvm *kvm, int channel, u32 val)
302 case 1: 315 case 1:
303 /* FIXME: enhance mode 4 precision */ 316 /* FIXME: enhance mode 4 precision */
304 case 4: 317 case 4:
305 create_pit_timer(&ps->pit_timer, val, 0); 318 create_pit_timer(ps, val, 0);
306 break; 319 break;
307 case 2: 320 case 2:
308 case 3: 321 case 3:
309 create_pit_timer(&ps->pit_timer, val, 1); 322 create_pit_timer(ps, val, 1);
310 break; 323 break;
311 default: 324 default:
312 destroy_pit_timer(&ps->pit_timer); 325 destroy_pit_timer(&ps->pit_timer);
@@ -520,7 +533,7 @@ void kvm_pit_reset(struct kvm_pit *pit)
520 mutex_unlock(&pit->pit_state.lock); 533 mutex_unlock(&pit->pit_state.lock);
521 534
522 atomic_set(&pit->pit_state.pit_timer.pending, 0); 535 atomic_set(&pit->pit_state.pit_timer.pending, 0);
523 pit->pit_state.inject_pending = 1; 536 pit->pit_state.irq_ack = 1;
524} 537}
525 538
526struct kvm_pit *kvm_create_pit(struct kvm *kvm) 539struct kvm_pit *kvm_create_pit(struct kvm *kvm)
@@ -534,6 +547,7 @@ struct kvm_pit *kvm_create_pit(struct kvm *kvm)
534 547
535 mutex_init(&pit->pit_state.lock); 548 mutex_init(&pit->pit_state.lock);
536 mutex_lock(&pit->pit_state.lock); 549 mutex_lock(&pit->pit_state.lock);
550 spin_lock_init(&pit->pit_state.inject_lock);
537 551
538 /* Initialize PIO device */ 552 /* Initialize PIO device */
539 pit->dev.read = pit_ioport_read; 553 pit->dev.read = pit_ioport_read;
@@ -555,6 +569,9 @@ struct kvm_pit *kvm_create_pit(struct kvm *kvm)
555 pit_state->pit = pit; 569 pit_state->pit = pit;
556 hrtimer_init(&pit_state->pit_timer.timer, 570 hrtimer_init(&pit_state->pit_timer.timer,
557 CLOCK_MONOTONIC, HRTIMER_MODE_ABS); 571 CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
572 pit_state->irq_ack_notifier.gsi = 0;
573 pit_state->irq_ack_notifier.irq_acked = kvm_pit_ack_irq;
574 kvm_register_irq_ack_notifier(kvm, &pit_state->irq_ack_notifier);
558 mutex_unlock(&pit->pit_state.lock); 575 mutex_unlock(&pit->pit_state.lock);
559 576
560 kvm_pit_reset(pit); 577 kvm_pit_reset(pit);
@@ -578,10 +595,8 @@ void kvm_free_pit(struct kvm *kvm)
578static void __inject_pit_timer_intr(struct kvm *kvm) 595static void __inject_pit_timer_intr(struct kvm *kvm)
579{ 596{
580 mutex_lock(&kvm->lock); 597 mutex_lock(&kvm->lock);
581 kvm_ioapic_set_irq(kvm->arch.vioapic, 0, 1); 598 kvm_set_irq(kvm, 0, 1);
582 kvm_ioapic_set_irq(kvm->arch.vioapic, 0, 0); 599 kvm_set_irq(kvm, 0, 0);
583 kvm_pic_set_irq(pic_irqchip(kvm), 0, 1);
584 kvm_pic_set_irq(pic_irqchip(kvm), 0, 0);
585 mutex_unlock(&kvm->lock); 600 mutex_unlock(&kvm->lock);
586} 601}
587 602
@@ -592,37 +607,19 @@ void kvm_inject_pit_timer_irqs(struct kvm_vcpu *vcpu)
592 struct kvm_kpit_state *ps; 607 struct kvm_kpit_state *ps;
593 608
594 if (vcpu && pit) { 609 if (vcpu && pit) {
610 int inject = 0;
595 ps = &pit->pit_state; 611 ps = &pit->pit_state;
596 612
597 /* Try to inject pending interrupts when: 613 /* Try to inject pending interrupts when
598 * 1. Pending exists 614 * last one has been acked.
599 * 2. Last interrupt was accepted or waited for too long time*/ 615 */
600 if (atomic_read(&ps->pit_timer.pending) && 616 spin_lock(&ps->inject_lock);
601 (ps->inject_pending || 617 if (atomic_read(&ps->pit_timer.pending) && ps->irq_ack) {
602 (jiffies - ps->last_injected_time 618 ps->irq_ack = 0;
603 >= KVM_MAX_PIT_INTR_INTERVAL))) { 619 inject = 1;
604 ps->inject_pending = 0;
605 __inject_pit_timer_intr(kvm);
606 ps->last_injected_time = jiffies;
607 }
608 }
609}
610
611void kvm_pit_timer_intr_post(struct kvm_vcpu *vcpu, int vec)
612{
613 struct kvm_arch *arch = &vcpu->kvm->arch;
614 struct kvm_kpit_state *ps;
615
616 if (vcpu && arch->vpit) {
617 ps = &arch->vpit->pit_state;
618 if (atomic_read(&ps->pit_timer.pending) &&
619 (((arch->vpic->pics[0].imr & 1) == 0 &&
620 arch->vpic->pics[0].irq_base == vec) ||
621 (arch->vioapic->redirtbl[0].fields.vector == vec &&
622 arch->vioapic->redirtbl[0].fields.mask != 1))) {
623 ps->inject_pending = 1;
624 atomic_dec(&ps->pit_timer.pending);
625 ps->channels[0].count_load_time = ktime_get();
626 } 620 }
621 spin_unlock(&ps->inject_lock);
622 if (inject)
623 __inject_pit_timer_intr(kvm);
627 } 624 }
628} 625}
diff --git a/arch/x86/kvm/i8254.h b/arch/x86/kvm/i8254.h
index db25c2a6c8c4..e436d4983aa1 100644
--- a/arch/x86/kvm/i8254.h
+++ b/arch/x86/kvm/i8254.h
@@ -8,7 +8,6 @@ struct kvm_kpit_timer {
8 int irq; 8 int irq;
9 s64 period; /* unit: ns */ 9 s64 period; /* unit: ns */
10 s64 scheduled; 10 s64 scheduled;
11 ktime_t last_update;
12 atomic_t pending; 11 atomic_t pending;
13}; 12};
14 13
@@ -34,8 +33,9 @@ struct kvm_kpit_state {
34 u32 speaker_data_on; 33 u32 speaker_data_on;
35 struct mutex lock; 34 struct mutex lock;
36 struct kvm_pit *pit; 35 struct kvm_pit *pit;
37 bool inject_pending; /* if inject pending interrupts */ 36 spinlock_t inject_lock;
38 unsigned long last_injected_time; 37 unsigned long irq_ack;
38 struct kvm_irq_ack_notifier irq_ack_notifier;
39}; 39};
40 40
41struct kvm_pit { 41struct kvm_pit {
@@ -54,7 +54,6 @@ struct kvm_pit {
54#define KVM_PIT_CHANNEL_MASK 0x3 54#define KVM_PIT_CHANNEL_MASK 0x3
55 55
56void kvm_inject_pit_timer_irqs(struct kvm_vcpu *vcpu); 56void kvm_inject_pit_timer_irqs(struct kvm_vcpu *vcpu);
57void kvm_pit_timer_intr_post(struct kvm_vcpu *vcpu, int vec);
58void kvm_pit_load_count(struct kvm *kvm, int channel, u32 val); 57void kvm_pit_load_count(struct kvm *kvm, int channel, u32 val);
59struct kvm_pit *kvm_create_pit(struct kvm *kvm); 58struct kvm_pit *kvm_create_pit(struct kvm *kvm);
60void kvm_free_pit(struct kvm *kvm); 59void kvm_free_pit(struct kvm *kvm);
diff --git a/arch/x86/kvm/i8259.c b/arch/x86/kvm/i8259.c
index c31164e8aa46..17e41e165f1a 100644
--- a/arch/x86/kvm/i8259.c
+++ b/arch/x86/kvm/i8259.c
@@ -30,6 +30,19 @@
30 30
31#include <linux/kvm_host.h> 31#include <linux/kvm_host.h>
32 32
33static void pic_clear_isr(struct kvm_kpic_state *s, int irq)
34{
35 s->isr &= ~(1 << irq);
36 s->isr_ack |= (1 << irq);
37}
38
39void kvm_pic_clear_isr_ack(struct kvm *kvm)
40{
41 struct kvm_pic *s = pic_irqchip(kvm);
42 s->pics[0].isr_ack = 0xff;
43 s->pics[1].isr_ack = 0xff;
44}
45
33/* 46/*
34 * set irq level. If an edge is detected, then the IRR is set to 1 47 * set irq level. If an edge is detected, then the IRR is set to 1
35 */ 48 */
@@ -141,11 +154,12 @@ void kvm_pic_set_irq(void *opaque, int irq, int level)
141 */ 154 */
142static inline void pic_intack(struct kvm_kpic_state *s, int irq) 155static inline void pic_intack(struct kvm_kpic_state *s, int irq)
143{ 156{
157 s->isr |= 1 << irq;
144 if (s->auto_eoi) { 158 if (s->auto_eoi) {
145 if (s->rotate_on_auto_eoi) 159 if (s->rotate_on_auto_eoi)
146 s->priority_add = (irq + 1) & 7; 160 s->priority_add = (irq + 1) & 7;
147 } else 161 pic_clear_isr(s, irq);
148 s->isr |= (1 << irq); 162 }
149 /* 163 /*
150 * We don't clear a level sensitive interrupt here 164 * We don't clear a level sensitive interrupt here
151 */ 165 */
@@ -153,9 +167,10 @@ static inline void pic_intack(struct kvm_kpic_state *s, int irq)
153 s->irr &= ~(1 << irq); 167 s->irr &= ~(1 << irq);
154} 168}
155 169
156int kvm_pic_read_irq(struct kvm_pic *s) 170int kvm_pic_read_irq(struct kvm *kvm)
157{ 171{
158 int irq, irq2, intno; 172 int irq, irq2, intno;
173 struct kvm_pic *s = pic_irqchip(kvm);
159 174
160 irq = pic_get_irq(&s->pics[0]); 175 irq = pic_get_irq(&s->pics[0]);
161 if (irq >= 0) { 176 if (irq >= 0) {
@@ -181,16 +196,32 @@ int kvm_pic_read_irq(struct kvm_pic *s)
181 intno = s->pics[0].irq_base + irq; 196 intno = s->pics[0].irq_base + irq;
182 } 197 }
183 pic_update_irq(s); 198 pic_update_irq(s);
199 kvm_notify_acked_irq(kvm, irq);
184 200
185 return intno; 201 return intno;
186} 202}
187 203
188void kvm_pic_reset(struct kvm_kpic_state *s) 204void kvm_pic_reset(struct kvm_kpic_state *s)
189{ 205{
206 int irq, irqbase;
207 struct kvm *kvm = s->pics_state->irq_request_opaque;
208 struct kvm_vcpu *vcpu0 = kvm->vcpus[0];
209
210 if (s == &s->pics_state->pics[0])
211 irqbase = 0;
212 else
213 irqbase = 8;
214
215 for (irq = 0; irq < PIC_NUM_PINS/2; irq++) {
216 if (vcpu0 && kvm_apic_accept_pic_intr(vcpu0))
217 if (s->irr & (1 << irq) || s->isr & (1 << irq))
218 kvm_notify_acked_irq(kvm, irq+irqbase);
219 }
190 s->last_irr = 0; 220 s->last_irr = 0;
191 s->irr = 0; 221 s->irr = 0;
192 s->imr = 0; 222 s->imr = 0;
193 s->isr = 0; 223 s->isr = 0;
224 s->isr_ack = 0xff;
194 s->priority_add = 0; 225 s->priority_add = 0;
195 s->irq_base = 0; 226 s->irq_base = 0;
196 s->read_reg_select = 0; 227 s->read_reg_select = 0;
@@ -243,7 +274,7 @@ static void pic_ioport_write(void *opaque, u32 addr, u32 val)
243 priority = get_priority(s, s->isr); 274 priority = get_priority(s, s->isr);
244 if (priority != 8) { 275 if (priority != 8) {
245 irq = (priority + s->priority_add) & 7; 276 irq = (priority + s->priority_add) & 7;
246 s->isr &= ~(1 << irq); 277 pic_clear_isr(s, irq);
247 if (cmd == 5) 278 if (cmd == 5)
248 s->priority_add = (irq + 1) & 7; 279 s->priority_add = (irq + 1) & 7;
249 pic_update_irq(s->pics_state); 280 pic_update_irq(s->pics_state);
@@ -251,7 +282,7 @@ static void pic_ioport_write(void *opaque, u32 addr, u32 val)
251 break; 282 break;
252 case 3: 283 case 3:
253 irq = val & 7; 284 irq = val & 7;
254 s->isr &= ~(1 << irq); 285 pic_clear_isr(s, irq);
255 pic_update_irq(s->pics_state); 286 pic_update_irq(s->pics_state);
256 break; 287 break;
257 case 6: 288 case 6:
@@ -260,8 +291,8 @@ static void pic_ioport_write(void *opaque, u32 addr, u32 val)
260 break; 291 break;
261 case 7: 292 case 7:
262 irq = val & 7; 293 irq = val & 7;
263 s->isr &= ~(1 << irq);
264 s->priority_add = (irq + 1) & 7; 294 s->priority_add = (irq + 1) & 7;
295 pic_clear_isr(s, irq);
265 pic_update_irq(s->pics_state); 296 pic_update_irq(s->pics_state);
266 break; 297 break;
267 default: 298 default:
@@ -303,7 +334,7 @@ static u32 pic_poll_read(struct kvm_kpic_state *s, u32 addr1)
303 s->pics_state->pics[0].irr &= ~(1 << 2); 334 s->pics_state->pics[0].irr &= ~(1 << 2);
304 } 335 }
305 s->irr &= ~(1 << ret); 336 s->irr &= ~(1 << ret);
306 s->isr &= ~(1 << ret); 337 pic_clear_isr(s, ret);
307 if (addr1 >> 7 || ret != 2) 338 if (addr1 >> 7 || ret != 2)
308 pic_update_irq(s->pics_state); 339 pic_update_irq(s->pics_state);
309 } else { 340 } else {
@@ -422,10 +453,14 @@ static void pic_irq_request(void *opaque, int level)
422{ 453{
423 struct kvm *kvm = opaque; 454 struct kvm *kvm = opaque;
424 struct kvm_vcpu *vcpu = kvm->vcpus[0]; 455 struct kvm_vcpu *vcpu = kvm->vcpus[0];
456 struct kvm_pic *s = pic_irqchip(kvm);
457 int irq = pic_get_irq(&s->pics[0]);
425 458
426 pic_irqchip(kvm)->output = level; 459 s->output = level;
427 if (vcpu) 460 if (vcpu && level && (s->pics[0].isr_ack & (1 << irq))) {
461 s->pics[0].isr_ack &= ~(1 << irq);
428 kvm_vcpu_kick(vcpu); 462 kvm_vcpu_kick(vcpu);
463 }
429} 464}
430 465
431struct kvm_pic *kvm_create_pic(struct kvm *kvm) 466struct kvm_pic *kvm_create_pic(struct kvm *kvm)
diff --git a/arch/x86/kvm/irq.c b/arch/x86/kvm/irq.c
index 76d736b5f664..c019b8edcdb7 100644
--- a/arch/x86/kvm/irq.c
+++ b/arch/x86/kvm/irq.c
@@ -72,7 +72,7 @@ int kvm_cpu_get_interrupt(struct kvm_vcpu *v)
72 if (kvm_apic_accept_pic_intr(v)) { 72 if (kvm_apic_accept_pic_intr(v)) {
73 s = pic_irqchip(v->kvm); 73 s = pic_irqchip(v->kvm);
74 s->output = 0; /* PIC */ 74 s->output = 0; /* PIC */
75 vector = kvm_pic_read_irq(s); 75 vector = kvm_pic_read_irq(v->kvm);
76 } 76 }
77 } 77 }
78 return vector; 78 return vector;
@@ -90,7 +90,6 @@ EXPORT_SYMBOL_GPL(kvm_inject_pending_timer_irqs);
90void kvm_timer_intr_post(struct kvm_vcpu *vcpu, int vec) 90void kvm_timer_intr_post(struct kvm_vcpu *vcpu, int vec)
91{ 91{
92 kvm_apic_timer_intr_post(vcpu, vec); 92 kvm_apic_timer_intr_post(vcpu, vec);
93 kvm_pit_timer_intr_post(vcpu, vec);
94 /* TODO: PIT, RTC etc. */ 93 /* TODO: PIT, RTC etc. */
95} 94}
96EXPORT_SYMBOL_GPL(kvm_timer_intr_post); 95EXPORT_SYMBOL_GPL(kvm_timer_intr_post);
diff --git a/arch/x86/kvm/irq.h b/arch/x86/kvm/irq.h
index 7ca47cbb48bb..f17c8f5bbf31 100644
--- a/arch/x86/kvm/irq.h
+++ b/arch/x86/kvm/irq.h
@@ -42,6 +42,7 @@ struct kvm_kpic_state {
42 u8 irr; /* interrupt request register */ 42 u8 irr; /* interrupt request register */
43 u8 imr; /* interrupt mask register */ 43 u8 imr; /* interrupt mask register */
44 u8 isr; /* interrupt service register */ 44 u8 isr; /* interrupt service register */
45 u8 isr_ack; /* interrupt ack detection */
45 u8 priority_add; /* highest irq priority */ 46 u8 priority_add; /* highest irq priority */
46 u8 irq_base; 47 u8 irq_base;
47 u8 read_reg_select; 48 u8 read_reg_select;
@@ -63,12 +64,13 @@ struct kvm_pic {
63 void *irq_request_opaque; 64 void *irq_request_opaque;
64 int output; /* intr from master PIC */ 65 int output; /* intr from master PIC */
65 struct kvm_io_device dev; 66 struct kvm_io_device dev;
67 void (*ack_notifier)(void *opaque, int irq);
66}; 68};
67 69
68struct kvm_pic *kvm_create_pic(struct kvm *kvm); 70struct kvm_pic *kvm_create_pic(struct kvm *kvm);
69void kvm_pic_set_irq(void *opaque, int irq, int level); 71int kvm_pic_read_irq(struct kvm *kvm);
70int kvm_pic_read_irq(struct kvm_pic *s);
71void kvm_pic_update_irq(struct kvm_pic *s); 72void kvm_pic_update_irq(struct kvm_pic *s);
73void kvm_pic_clear_isr_ack(struct kvm *kvm);
72 74
73static inline struct kvm_pic *pic_irqchip(struct kvm *kvm) 75static inline struct kvm_pic *pic_irqchip(struct kvm *kvm)
74{ 76{
diff --git a/arch/x86/kvm/kvm_cache_regs.h b/arch/x86/kvm/kvm_cache_regs.h
new file mode 100644
index 000000000000..1ff819dce7d3
--- /dev/null
+++ b/arch/x86/kvm/kvm_cache_regs.h
@@ -0,0 +1,32 @@
1#ifndef ASM_KVM_CACHE_REGS_H
2#define ASM_KVM_CACHE_REGS_H
3
4static inline unsigned long kvm_register_read(struct kvm_vcpu *vcpu,
5 enum kvm_reg reg)
6{
7 if (!test_bit(reg, (unsigned long *)&vcpu->arch.regs_avail))
8 kvm_x86_ops->cache_reg(vcpu, reg);
9
10 return vcpu->arch.regs[reg];
11}
12
13static inline void kvm_register_write(struct kvm_vcpu *vcpu,
14 enum kvm_reg reg,
15 unsigned long val)
16{
17 vcpu->arch.regs[reg] = val;
18 __set_bit(reg, (unsigned long *)&vcpu->arch.regs_dirty);
19 __set_bit(reg, (unsigned long *)&vcpu->arch.regs_avail);
20}
21
22static inline unsigned long kvm_rip_read(struct kvm_vcpu *vcpu)
23{
24 return kvm_register_read(vcpu, VCPU_REGS_RIP);
25}
26
27static inline void kvm_rip_write(struct kvm_vcpu *vcpu, unsigned long val)
28{
29 kvm_register_write(vcpu, VCPU_REGS_RIP, val);
30}
31
32#endif
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index 73f43de69f67..6571926bfd33 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -32,6 +32,7 @@
32#include <asm/current.h> 32#include <asm/current.h>
33#include <asm/apicdef.h> 33#include <asm/apicdef.h>
34#include <asm/atomic.h> 34#include <asm/atomic.h>
35#include "kvm_cache_regs.h"
35#include "irq.h" 36#include "irq.h"
36 37
37#define PRId64 "d" 38#define PRId64 "d"
@@ -338,13 +339,7 @@ static int __apic_accept_irq(struct kvm_lapic *apic, int delivery_mode,
338 } else 339 } else
339 apic_clear_vector(vector, apic->regs + APIC_TMR); 340 apic_clear_vector(vector, apic->regs + APIC_TMR);
340 341
341 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE) 342 kvm_vcpu_kick(vcpu);
342 kvm_vcpu_kick(vcpu);
343 else if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED) {
344 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
345 if (waitqueue_active(&vcpu->wq))
346 wake_up_interruptible(&vcpu->wq);
347 }
348 343
349 result = (orig_irr == 0); 344 result = (orig_irr == 0);
350 break; 345 break;
@@ -370,21 +365,18 @@ static int __apic_accept_irq(struct kvm_lapic *apic, int delivery_mode,
370 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED; 365 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
371 kvm_vcpu_kick(vcpu); 366 kvm_vcpu_kick(vcpu);
372 } else { 367 } else {
373 printk(KERN_DEBUG 368 apic_debug("Ignoring de-assert INIT to vcpu %d\n",
374 "Ignoring de-assert INIT to vcpu %d\n", 369 vcpu->vcpu_id);
375 vcpu->vcpu_id);
376 } 370 }
377
378 break; 371 break;
379 372
380 case APIC_DM_STARTUP: 373 case APIC_DM_STARTUP:
381 printk(KERN_DEBUG "SIPI to vcpu %d vector 0x%02x\n", 374 apic_debug("SIPI to vcpu %d vector 0x%02x\n",
382 vcpu->vcpu_id, vector); 375 vcpu->vcpu_id, vector);
383 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) { 376 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
384 vcpu->arch.sipi_vector = vector; 377 vcpu->arch.sipi_vector = vector;
385 vcpu->arch.mp_state = KVM_MP_STATE_SIPI_RECEIVED; 378 vcpu->arch.mp_state = KVM_MP_STATE_SIPI_RECEIVED;
386 if (waitqueue_active(&vcpu->wq)) 379 kvm_vcpu_kick(vcpu);
387 wake_up_interruptible(&vcpu->wq);
388 } 380 }
389 break; 381 break;
390 382
@@ -438,7 +430,7 @@ struct kvm_vcpu *kvm_get_lowest_prio_vcpu(struct kvm *kvm, u8 vector,
438static void apic_set_eoi(struct kvm_lapic *apic) 430static void apic_set_eoi(struct kvm_lapic *apic)
439{ 431{
440 int vector = apic_find_highest_isr(apic); 432 int vector = apic_find_highest_isr(apic);
441 433 int trigger_mode;
442 /* 434 /*
443 * Not every write EOI will has corresponding ISR, 435 * Not every write EOI will has corresponding ISR,
444 * one example is when Kernel check timer on setup_IO_APIC 436 * one example is when Kernel check timer on setup_IO_APIC
@@ -450,7 +442,10 @@ static void apic_set_eoi(struct kvm_lapic *apic)
450 apic_update_ppr(apic); 442 apic_update_ppr(apic);
451 443
452 if (apic_test_and_clear_vector(vector, apic->regs + APIC_TMR)) 444 if (apic_test_and_clear_vector(vector, apic->regs + APIC_TMR))
453 kvm_ioapic_update_eoi(apic->vcpu->kvm, vector); 445 trigger_mode = IOAPIC_LEVEL_TRIG;
446 else
447 trigger_mode = IOAPIC_EDGE_TRIG;
448 kvm_ioapic_update_eoi(apic->vcpu->kvm, vector, trigger_mode);
454} 449}
455 450
456static void apic_send_ipi(struct kvm_lapic *apic) 451static void apic_send_ipi(struct kvm_lapic *apic)
@@ -558,8 +553,7 @@ static void __report_tpr_access(struct kvm_lapic *apic, bool write)
558 struct kvm_run *run = vcpu->run; 553 struct kvm_run *run = vcpu->run;
559 554
560 set_bit(KVM_REQ_REPORT_TPR_ACCESS, &vcpu->requests); 555 set_bit(KVM_REQ_REPORT_TPR_ACCESS, &vcpu->requests);
561 kvm_x86_ops->cache_regs(vcpu); 556 run->tpr_access.rip = kvm_rip_read(vcpu);
562 run->tpr_access.rip = vcpu->arch.rip;
563 run->tpr_access.is_write = write; 557 run->tpr_access.is_write = write;
564} 558}
565 559
@@ -683,9 +677,9 @@ static void apic_mmio_write(struct kvm_io_device *this,
683 * Refer SDM 8.4.1 677 * Refer SDM 8.4.1
684 */ 678 */
685 if (len != 4 || alignment) { 679 if (len != 4 || alignment) {
686 if (printk_ratelimit()) 680 /* Don't shout loud, $infamous_os would cause only noise. */
687 printk(KERN_ERR "apic write: bad size=%d %lx\n", 681 apic_debug("apic write: bad size=%d %lx\n",
688 len, (long)address); 682 len, (long)address);
689 return; 683 return;
690 } 684 }
691 685
@@ -947,10 +941,9 @@ static int __apic_timer_fn(struct kvm_lapic *apic)
947 941
948 if(!atomic_inc_and_test(&apic->timer.pending)) 942 if(!atomic_inc_and_test(&apic->timer.pending))
949 set_bit(KVM_REQ_PENDING_TIMER, &apic->vcpu->requests); 943 set_bit(KVM_REQ_PENDING_TIMER, &apic->vcpu->requests);
950 if (waitqueue_active(q)) { 944 if (waitqueue_active(q))
951 apic->vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
952 wake_up_interruptible(q); 945 wake_up_interruptible(q);
953 } 946
954 if (apic_lvtt_period(apic)) { 947 if (apic_lvtt_period(apic)) {
955 result = 1; 948 result = 1;
956 apic->timer.dev.expires = ktime_add_ns( 949 apic->timer.dev.expires = ktime_add_ns(
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index 3da2508eb22a..99c239c5c0ac 100644
--- a/arch/x86/kvm/mmu.c
+++ b/arch/x86/kvm/mmu.c
@@ -70,6 +70,9 @@ static int dbg = 0;
70module_param(dbg, bool, 0644); 70module_param(dbg, bool, 0644);
71#endif 71#endif
72 72
73static int oos_shadow = 1;
74module_param(oos_shadow, bool, 0644);
75
73#ifndef MMU_DEBUG 76#ifndef MMU_DEBUG
74#define ASSERT(x) do { } while (0) 77#define ASSERT(x) do { } while (0)
75#else 78#else
@@ -135,18 +138,24 @@ module_param(dbg, bool, 0644);
135#define ACC_USER_MASK PT_USER_MASK 138#define ACC_USER_MASK PT_USER_MASK
136#define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK) 139#define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
137 140
138struct kvm_pv_mmu_op_buffer { 141#define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
139 void *ptr;
140 unsigned len;
141 unsigned processed;
142 char buf[512] __aligned(sizeof(long));
143};
144 142
145struct kvm_rmap_desc { 143struct kvm_rmap_desc {
146 u64 *shadow_ptes[RMAP_EXT]; 144 u64 *shadow_ptes[RMAP_EXT];
147 struct kvm_rmap_desc *more; 145 struct kvm_rmap_desc *more;
148}; 146};
149 147
148struct kvm_shadow_walk {
149 int (*entry)(struct kvm_shadow_walk *walk, struct kvm_vcpu *vcpu,
150 u64 addr, u64 *spte, int level);
151};
152
153struct kvm_unsync_walk {
154 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
155};
156
157typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
158
150static struct kmem_cache *pte_chain_cache; 159static struct kmem_cache *pte_chain_cache;
151static struct kmem_cache *rmap_desc_cache; 160static struct kmem_cache *rmap_desc_cache;
152static struct kmem_cache *mmu_page_header_cache; 161static struct kmem_cache *mmu_page_header_cache;
@@ -405,16 +414,19 @@ static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
405{ 414{
406 struct vm_area_struct *vma; 415 struct vm_area_struct *vma;
407 unsigned long addr; 416 unsigned long addr;
417 int ret = 0;
408 418
409 addr = gfn_to_hva(kvm, gfn); 419 addr = gfn_to_hva(kvm, gfn);
410 if (kvm_is_error_hva(addr)) 420 if (kvm_is_error_hva(addr))
411 return 0; 421 return ret;
412 422
423 down_read(&current->mm->mmap_sem);
413 vma = find_vma(current->mm, addr); 424 vma = find_vma(current->mm, addr);
414 if (vma && is_vm_hugetlb_page(vma)) 425 if (vma && is_vm_hugetlb_page(vma))
415 return 1; 426 ret = 1;
427 up_read(&current->mm->mmap_sem);
416 428
417 return 0; 429 return ret;
418} 430}
419 431
420static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn) 432static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
@@ -649,8 +661,6 @@ static void rmap_write_protect(struct kvm *kvm, u64 gfn)
649 661
650 if (write_protected) 662 if (write_protected)
651 kvm_flush_remote_tlbs(kvm); 663 kvm_flush_remote_tlbs(kvm);
652
653 account_shadowed(kvm, gfn);
654} 664}
655 665
656static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp) 666static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
@@ -859,6 +869,77 @@ static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
859 BUG(); 869 BUG();
860} 870}
861 871
872
873static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
874 mmu_parent_walk_fn fn)
875{
876 struct kvm_pte_chain *pte_chain;
877 struct hlist_node *node;
878 struct kvm_mmu_page *parent_sp;
879 int i;
880
881 if (!sp->multimapped && sp->parent_pte) {
882 parent_sp = page_header(__pa(sp->parent_pte));
883 fn(vcpu, parent_sp);
884 mmu_parent_walk(vcpu, parent_sp, fn);
885 return;
886 }
887 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
888 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
889 if (!pte_chain->parent_ptes[i])
890 break;
891 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
892 fn(vcpu, parent_sp);
893 mmu_parent_walk(vcpu, parent_sp, fn);
894 }
895}
896
897static void kvm_mmu_update_unsync_bitmap(u64 *spte)
898{
899 unsigned int index;
900 struct kvm_mmu_page *sp = page_header(__pa(spte));
901
902 index = spte - sp->spt;
903 __set_bit(index, sp->unsync_child_bitmap);
904 sp->unsync_children = 1;
905}
906
907static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
908{
909 struct kvm_pte_chain *pte_chain;
910 struct hlist_node *node;
911 int i;
912
913 if (!sp->parent_pte)
914 return;
915
916 if (!sp->multimapped) {
917 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
918 return;
919 }
920
921 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
922 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
923 if (!pte_chain->parent_ptes[i])
924 break;
925 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
926 }
927}
928
929static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
930{
931 sp->unsync_children = 1;
932 kvm_mmu_update_parents_unsync(sp);
933 return 1;
934}
935
936static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
937 struct kvm_mmu_page *sp)
938{
939 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
940 kvm_mmu_update_parents_unsync(sp);
941}
942
862static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu, 943static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
863 struct kvm_mmu_page *sp) 944 struct kvm_mmu_page *sp)
864{ 945{
@@ -868,6 +949,58 @@ static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
868 sp->spt[i] = shadow_trap_nonpresent_pte; 949 sp->spt[i] = shadow_trap_nonpresent_pte;
869} 950}
870 951
952static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
953 struct kvm_mmu_page *sp)
954{
955 return 1;
956}
957
958static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
959{
960}
961
962#define for_each_unsync_children(bitmap, idx) \
963 for (idx = find_first_bit(bitmap, 512); \
964 idx < 512; \
965 idx = find_next_bit(bitmap, 512, idx+1))
966
967static int mmu_unsync_walk(struct kvm_mmu_page *sp,
968 struct kvm_unsync_walk *walker)
969{
970 int i, ret;
971
972 if (!sp->unsync_children)
973 return 0;
974
975 for_each_unsync_children(sp->unsync_child_bitmap, i) {
976 u64 ent = sp->spt[i];
977
978 if (is_shadow_present_pte(ent)) {
979 struct kvm_mmu_page *child;
980 child = page_header(ent & PT64_BASE_ADDR_MASK);
981
982 if (child->unsync_children) {
983 ret = mmu_unsync_walk(child, walker);
984 if (ret)
985 return ret;
986 __clear_bit(i, sp->unsync_child_bitmap);
987 }
988
989 if (child->unsync) {
990 ret = walker->entry(child, walker);
991 __clear_bit(i, sp->unsync_child_bitmap);
992 if (ret)
993 return ret;
994 }
995 }
996 }
997
998 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
999 sp->unsync_children = 0;
1000
1001 return 0;
1002}
1003
871static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn) 1004static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
872{ 1005{
873 unsigned index; 1006 unsigned index;
@@ -888,6 +1021,59 @@ static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
888 return NULL; 1021 return NULL;
889} 1022}
890 1023
1024static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1025{
1026 WARN_ON(!sp->unsync);
1027 sp->unsync = 0;
1028 --kvm->stat.mmu_unsync;
1029}
1030
1031static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1032
1033static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1034{
1035 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1036 kvm_mmu_zap_page(vcpu->kvm, sp);
1037 return 1;
1038 }
1039
1040 rmap_write_protect(vcpu->kvm, sp->gfn);
1041 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1042 kvm_mmu_zap_page(vcpu->kvm, sp);
1043 return 1;
1044 }
1045
1046 kvm_mmu_flush_tlb(vcpu);
1047 kvm_unlink_unsync_page(vcpu->kvm, sp);
1048 return 0;
1049}
1050
1051struct sync_walker {
1052 struct kvm_vcpu *vcpu;
1053 struct kvm_unsync_walk walker;
1054};
1055
1056static int mmu_sync_fn(struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk)
1057{
1058 struct sync_walker *sync_walk = container_of(walk, struct sync_walker,
1059 walker);
1060 struct kvm_vcpu *vcpu = sync_walk->vcpu;
1061
1062 kvm_sync_page(vcpu, sp);
1063 return (need_resched() || spin_needbreak(&vcpu->kvm->mmu_lock));
1064}
1065
1066static void mmu_sync_children(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1067{
1068 struct sync_walker walker = {
1069 .walker = { .entry = mmu_sync_fn, },
1070 .vcpu = vcpu,
1071 };
1072
1073 while (mmu_unsync_walk(sp, &walker.walker))
1074 cond_resched_lock(&vcpu->kvm->mmu_lock);
1075}
1076
891static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, 1077static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
892 gfn_t gfn, 1078 gfn_t gfn,
893 gva_t gaddr, 1079 gva_t gaddr,
@@ -901,7 +1087,7 @@ static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
901 unsigned quadrant; 1087 unsigned quadrant;
902 struct hlist_head *bucket; 1088 struct hlist_head *bucket;
903 struct kvm_mmu_page *sp; 1089 struct kvm_mmu_page *sp;
904 struct hlist_node *node; 1090 struct hlist_node *node, *tmp;
905 1091
906 role.word = 0; 1092 role.word = 0;
907 role.glevels = vcpu->arch.mmu.root_level; 1093 role.glevels = vcpu->arch.mmu.root_level;
@@ -917,9 +1103,20 @@ static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
917 gfn, role.word); 1103 gfn, role.word);
918 index = kvm_page_table_hashfn(gfn); 1104 index = kvm_page_table_hashfn(gfn);
919 bucket = &vcpu->kvm->arch.mmu_page_hash[index]; 1105 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
920 hlist_for_each_entry(sp, node, bucket, hash_link) 1106 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
921 if (sp->gfn == gfn && sp->role.word == role.word) { 1107 if (sp->gfn == gfn) {
1108 if (sp->unsync)
1109 if (kvm_sync_page(vcpu, sp))
1110 continue;
1111
1112 if (sp->role.word != role.word)
1113 continue;
1114
922 mmu_page_add_parent_pte(vcpu, sp, parent_pte); 1115 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1116 if (sp->unsync_children) {
1117 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1118 kvm_mmu_mark_parents_unsync(vcpu, sp);
1119 }
923 pgprintk("%s: found\n", __func__); 1120 pgprintk("%s: found\n", __func__);
924 return sp; 1121 return sp;
925 } 1122 }
@@ -931,8 +1128,10 @@ static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
931 sp->gfn = gfn; 1128 sp->gfn = gfn;
932 sp->role = role; 1129 sp->role = role;
933 hlist_add_head(&sp->hash_link, bucket); 1130 hlist_add_head(&sp->hash_link, bucket);
934 if (!metaphysical) 1131 if (!metaphysical) {
935 rmap_write_protect(vcpu->kvm, gfn); 1132 rmap_write_protect(vcpu->kvm, gfn);
1133 account_shadowed(vcpu->kvm, gfn);
1134 }
936 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte) 1135 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
937 vcpu->arch.mmu.prefetch_page(vcpu, sp); 1136 vcpu->arch.mmu.prefetch_page(vcpu, sp);
938 else 1137 else
@@ -940,6 +1139,35 @@ static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
940 return sp; 1139 return sp;
941} 1140}
942 1141
1142static int walk_shadow(struct kvm_shadow_walk *walker,
1143 struct kvm_vcpu *vcpu, u64 addr)
1144{
1145 hpa_t shadow_addr;
1146 int level;
1147 int r;
1148 u64 *sptep;
1149 unsigned index;
1150
1151 shadow_addr = vcpu->arch.mmu.root_hpa;
1152 level = vcpu->arch.mmu.shadow_root_level;
1153 if (level == PT32E_ROOT_LEVEL) {
1154 shadow_addr = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1155 shadow_addr &= PT64_BASE_ADDR_MASK;
1156 --level;
1157 }
1158
1159 while (level >= PT_PAGE_TABLE_LEVEL) {
1160 index = SHADOW_PT_INDEX(addr, level);
1161 sptep = ((u64 *)__va(shadow_addr)) + index;
1162 r = walker->entry(walker, vcpu, addr, sptep, level);
1163 if (r)
1164 return r;
1165 shadow_addr = *sptep & PT64_BASE_ADDR_MASK;
1166 --level;
1167 }
1168 return 0;
1169}
1170
943static void kvm_mmu_page_unlink_children(struct kvm *kvm, 1171static void kvm_mmu_page_unlink_children(struct kvm *kvm,
944 struct kvm_mmu_page *sp) 1172 struct kvm_mmu_page *sp)
945{ 1173{
@@ -955,7 +1183,6 @@ static void kvm_mmu_page_unlink_children(struct kvm *kvm,
955 rmap_remove(kvm, &pt[i]); 1183 rmap_remove(kvm, &pt[i]);
956 pt[i] = shadow_trap_nonpresent_pte; 1184 pt[i] = shadow_trap_nonpresent_pte;
957 } 1185 }
958 kvm_flush_remote_tlbs(kvm);
959 return; 1186 return;
960 } 1187 }
961 1188
@@ -974,7 +1201,6 @@ static void kvm_mmu_page_unlink_children(struct kvm *kvm,
974 } 1201 }
975 pt[i] = shadow_trap_nonpresent_pte; 1202 pt[i] = shadow_trap_nonpresent_pte;
976 } 1203 }
977 kvm_flush_remote_tlbs(kvm);
978} 1204}
979 1205
980static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte) 1206static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
@@ -991,11 +1217,10 @@ static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
991 kvm->vcpus[i]->arch.last_pte_updated = NULL; 1217 kvm->vcpus[i]->arch.last_pte_updated = NULL;
992} 1218}
993 1219
994static void kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp) 1220static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
995{ 1221{
996 u64 *parent_pte; 1222 u64 *parent_pte;
997 1223
998 ++kvm->stat.mmu_shadow_zapped;
999 while (sp->multimapped || sp->parent_pte) { 1224 while (sp->multimapped || sp->parent_pte) {
1000 if (!sp->multimapped) 1225 if (!sp->multimapped)
1001 parent_pte = sp->parent_pte; 1226 parent_pte = sp->parent_pte;
@@ -1010,21 +1235,59 @@ static void kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1010 kvm_mmu_put_page(sp, parent_pte); 1235 kvm_mmu_put_page(sp, parent_pte);
1011 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte); 1236 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
1012 } 1237 }
1238}
1239
1240struct zap_walker {
1241 struct kvm_unsync_walk walker;
1242 struct kvm *kvm;
1243 int zapped;
1244};
1245
1246static int mmu_zap_fn(struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk)
1247{
1248 struct zap_walker *zap_walk = container_of(walk, struct zap_walker,
1249 walker);
1250 kvm_mmu_zap_page(zap_walk->kvm, sp);
1251 zap_walk->zapped = 1;
1252 return 0;
1253}
1254
1255static int mmu_zap_unsync_children(struct kvm *kvm, struct kvm_mmu_page *sp)
1256{
1257 struct zap_walker walker = {
1258 .walker = { .entry = mmu_zap_fn, },
1259 .kvm = kvm,
1260 .zapped = 0,
1261 };
1262
1263 if (sp->role.level == PT_PAGE_TABLE_LEVEL)
1264 return 0;
1265 mmu_unsync_walk(sp, &walker.walker);
1266 return walker.zapped;
1267}
1268
1269static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1270{
1271 int ret;
1272 ++kvm->stat.mmu_shadow_zapped;
1273 ret = mmu_zap_unsync_children(kvm, sp);
1013 kvm_mmu_page_unlink_children(kvm, sp); 1274 kvm_mmu_page_unlink_children(kvm, sp);
1275 kvm_mmu_unlink_parents(kvm, sp);
1276 kvm_flush_remote_tlbs(kvm);
1277 if (!sp->role.invalid && !sp->role.metaphysical)
1278 unaccount_shadowed(kvm, sp->gfn);
1279 if (sp->unsync)
1280 kvm_unlink_unsync_page(kvm, sp);
1014 if (!sp->root_count) { 1281 if (!sp->root_count) {
1015 if (!sp->role.metaphysical && !sp->role.invalid)
1016 unaccount_shadowed(kvm, sp->gfn);
1017 hlist_del(&sp->hash_link); 1282 hlist_del(&sp->hash_link);
1018 kvm_mmu_free_page(kvm, sp); 1283 kvm_mmu_free_page(kvm, sp);
1019 } else { 1284 } else {
1020 int invalid = sp->role.invalid;
1021 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1022 sp->role.invalid = 1; 1285 sp->role.invalid = 1;
1286 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1023 kvm_reload_remote_mmus(kvm); 1287 kvm_reload_remote_mmus(kvm);
1024 if (!sp->role.metaphysical && !invalid)
1025 unaccount_shadowed(kvm, sp->gfn);
1026 } 1288 }
1027 kvm_mmu_reset_last_pte_updated(kvm); 1289 kvm_mmu_reset_last_pte_updated(kvm);
1290 return ret;
1028} 1291}
1029 1292
1030/* 1293/*
@@ -1077,8 +1340,9 @@ static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1077 if (sp->gfn == gfn && !sp->role.metaphysical) { 1340 if (sp->gfn == gfn && !sp->role.metaphysical) {
1078 pgprintk("%s: gfn %lx role %x\n", __func__, gfn, 1341 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1079 sp->role.word); 1342 sp->role.word);
1080 kvm_mmu_zap_page(kvm, sp);
1081 r = 1; 1343 r = 1;
1344 if (kvm_mmu_zap_page(kvm, sp))
1345 n = bucket->first;
1082 } 1346 }
1083 return r; 1347 return r;
1084} 1348}
@@ -1101,6 +1365,20 @@ static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1101 __set_bit(slot, &sp->slot_bitmap); 1365 __set_bit(slot, &sp->slot_bitmap);
1102} 1366}
1103 1367
1368static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1369{
1370 int i;
1371 u64 *pt = sp->spt;
1372
1373 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1374 return;
1375
1376 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1377 if (pt[i] == shadow_notrap_nonpresent_pte)
1378 set_shadow_pte(&pt[i], shadow_trap_nonpresent_pte);
1379 }
1380}
1381
1104struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva) 1382struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1105{ 1383{
1106 struct page *page; 1384 struct page *page;
@@ -1110,51 +1388,60 @@ struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1110 if (gpa == UNMAPPED_GVA) 1388 if (gpa == UNMAPPED_GVA)
1111 return NULL; 1389 return NULL;
1112 1390
1113 down_read(&current->mm->mmap_sem);
1114 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT); 1391 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1115 up_read(&current->mm->mmap_sem);
1116 1392
1117 return page; 1393 return page;
1118} 1394}
1119 1395
1120static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte, 1396static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1121 unsigned pt_access, unsigned pte_access,
1122 int user_fault, int write_fault, int dirty,
1123 int *ptwrite, int largepage, gfn_t gfn,
1124 pfn_t pfn, bool speculative)
1125{ 1397{
1126 u64 spte; 1398 unsigned index;
1127 int was_rmapped = 0; 1399 struct hlist_head *bucket;
1128 int was_writeble = is_writeble_pte(*shadow_pte); 1400 struct kvm_mmu_page *s;
1401 struct hlist_node *node, *n;
1129 1402
1130 pgprintk("%s: spte %llx access %x write_fault %d" 1403 index = kvm_page_table_hashfn(sp->gfn);
1131 " user_fault %d gfn %lx\n", 1404 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1132 __func__, *shadow_pte, pt_access, 1405 /* don't unsync if pagetable is shadowed with multiple roles */
1133 write_fault, user_fault, gfn); 1406 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1407 if (s->gfn != sp->gfn || s->role.metaphysical)
1408 continue;
1409 if (s->role.word != sp->role.word)
1410 return 1;
1411 }
1412 kvm_mmu_mark_parents_unsync(vcpu, sp);
1413 ++vcpu->kvm->stat.mmu_unsync;
1414 sp->unsync = 1;
1415 mmu_convert_notrap(sp);
1416 return 0;
1417}
1134 1418
1135 if (is_rmap_pte(*shadow_pte)) { 1419static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1136 /* 1420 bool can_unsync)
1137 * If we overwrite a PTE page pointer with a 2MB PMD, unlink 1421{
1138 * the parent of the now unreachable PTE. 1422 struct kvm_mmu_page *shadow;
1139 */
1140 if (largepage && !is_large_pte(*shadow_pte)) {
1141 struct kvm_mmu_page *child;
1142 u64 pte = *shadow_pte;
1143 1423
1144 child = page_header(pte & PT64_BASE_ADDR_MASK); 1424 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1145 mmu_page_remove_parent_pte(child, shadow_pte); 1425 if (shadow) {
1146 } else if (pfn != spte_to_pfn(*shadow_pte)) { 1426 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1147 pgprintk("hfn old %lx new %lx\n", 1427 return 1;
1148 spte_to_pfn(*shadow_pte), pfn); 1428 if (shadow->unsync)
1149 rmap_remove(vcpu->kvm, shadow_pte); 1429 return 0;
1150 } else { 1430 if (can_unsync && oos_shadow)
1151 if (largepage) 1431 return kvm_unsync_page(vcpu, shadow);
1152 was_rmapped = is_large_pte(*shadow_pte); 1432 return 1;
1153 else
1154 was_rmapped = 1;
1155 }
1156 } 1433 }
1434 return 0;
1435}
1157 1436
1437static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1438 unsigned pte_access, int user_fault,
1439 int write_fault, int dirty, int largepage,
1440 gfn_t gfn, pfn_t pfn, bool speculative,
1441 bool can_unsync)
1442{
1443 u64 spte;
1444 int ret = 0;
1158 /* 1445 /*
1159 * We don't set the accessed bit, since we sometimes want to see 1446 * We don't set the accessed bit, since we sometimes want to see
1160 * whether the guest actually used the pte (in order to detect 1447 * whether the guest actually used the pte (in order to detect
@@ -1162,7 +1449,7 @@ static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1162 */ 1449 */
1163 spte = shadow_base_present_pte | shadow_dirty_mask; 1450 spte = shadow_base_present_pte | shadow_dirty_mask;
1164 if (!speculative) 1451 if (!speculative)
1165 pte_access |= PT_ACCESSED_MASK; 1452 spte |= shadow_accessed_mask;
1166 if (!dirty) 1453 if (!dirty)
1167 pte_access &= ~ACC_WRITE_MASK; 1454 pte_access &= ~ACC_WRITE_MASK;
1168 if (pte_access & ACC_EXEC_MASK) 1455 if (pte_access & ACC_EXEC_MASK)
@@ -1178,35 +1465,82 @@ static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1178 1465
1179 if ((pte_access & ACC_WRITE_MASK) 1466 if ((pte_access & ACC_WRITE_MASK)
1180 || (write_fault && !is_write_protection(vcpu) && !user_fault)) { 1467 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1181 struct kvm_mmu_page *shadow; 1468
1469 if (largepage && has_wrprotected_page(vcpu->kvm, gfn)) {
1470 ret = 1;
1471 spte = shadow_trap_nonpresent_pte;
1472 goto set_pte;
1473 }
1182 1474
1183 spte |= PT_WRITABLE_MASK; 1475 spte |= PT_WRITABLE_MASK;
1184 1476
1185 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn); 1477 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1186 if (shadow ||
1187 (largepage && has_wrprotected_page(vcpu->kvm, gfn))) {
1188 pgprintk("%s: found shadow page for %lx, marking ro\n", 1478 pgprintk("%s: found shadow page for %lx, marking ro\n",
1189 __func__, gfn); 1479 __func__, gfn);
1480 ret = 1;
1190 pte_access &= ~ACC_WRITE_MASK; 1481 pte_access &= ~ACC_WRITE_MASK;
1191 if (is_writeble_pte(spte)) { 1482 if (is_writeble_pte(spte))
1192 spte &= ~PT_WRITABLE_MASK; 1483 spte &= ~PT_WRITABLE_MASK;
1193 kvm_x86_ops->tlb_flush(vcpu);
1194 }
1195 if (write_fault)
1196 *ptwrite = 1;
1197 } 1484 }
1198 } 1485 }
1199 1486
1200 if (pte_access & ACC_WRITE_MASK) 1487 if (pte_access & ACC_WRITE_MASK)
1201 mark_page_dirty(vcpu->kvm, gfn); 1488 mark_page_dirty(vcpu->kvm, gfn);
1202 1489
1203 pgprintk("%s: setting spte %llx\n", __func__, spte); 1490set_pte:
1204 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1205 (spte&PT_PAGE_SIZE_MASK)? "2MB" : "4kB",
1206 (spte&PT_WRITABLE_MASK)?"RW":"R", gfn, spte, shadow_pte);
1207 set_shadow_pte(shadow_pte, spte); 1491 set_shadow_pte(shadow_pte, spte);
1208 if (!was_rmapped && (spte & PT_PAGE_SIZE_MASK) 1492 return ret;
1209 && (spte & PT_PRESENT_MASK)) 1493}
1494
1495static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1496 unsigned pt_access, unsigned pte_access,
1497 int user_fault, int write_fault, int dirty,
1498 int *ptwrite, int largepage, gfn_t gfn,
1499 pfn_t pfn, bool speculative)
1500{
1501 int was_rmapped = 0;
1502 int was_writeble = is_writeble_pte(*shadow_pte);
1503
1504 pgprintk("%s: spte %llx access %x write_fault %d"
1505 " user_fault %d gfn %lx\n",
1506 __func__, *shadow_pte, pt_access,
1507 write_fault, user_fault, gfn);
1508
1509 if (is_rmap_pte(*shadow_pte)) {
1510 /*
1511 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1512 * the parent of the now unreachable PTE.
1513 */
1514 if (largepage && !is_large_pte(*shadow_pte)) {
1515 struct kvm_mmu_page *child;
1516 u64 pte = *shadow_pte;
1517
1518 child = page_header(pte & PT64_BASE_ADDR_MASK);
1519 mmu_page_remove_parent_pte(child, shadow_pte);
1520 } else if (pfn != spte_to_pfn(*shadow_pte)) {
1521 pgprintk("hfn old %lx new %lx\n",
1522 spte_to_pfn(*shadow_pte), pfn);
1523 rmap_remove(vcpu->kvm, shadow_pte);
1524 } else {
1525 if (largepage)
1526 was_rmapped = is_large_pte(*shadow_pte);
1527 else
1528 was_rmapped = 1;
1529 }
1530 }
1531 if (set_spte(vcpu, shadow_pte, pte_access, user_fault, write_fault,
1532 dirty, largepage, gfn, pfn, speculative, true)) {
1533 if (write_fault)
1534 *ptwrite = 1;
1535 kvm_x86_ops->tlb_flush(vcpu);
1536 }
1537
1538 pgprintk("%s: setting spte %llx\n", __func__, *shadow_pte);
1539 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1540 is_large_pte(*shadow_pte)? "2MB" : "4kB",
1541 is_present_pte(*shadow_pte)?"RW":"R", gfn,
1542 *shadow_pte, shadow_pte);
1543 if (!was_rmapped && is_large_pte(*shadow_pte))
1210 ++vcpu->kvm->stat.lpages; 1544 ++vcpu->kvm->stat.lpages;
1211 1545
1212 page_header_update_slot(vcpu->kvm, shadow_pte, gfn); 1546 page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
@@ -1230,54 +1564,67 @@ static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1230{ 1564{
1231} 1565}
1232 1566
1233static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write, 1567struct direct_shadow_walk {
1234 int largepage, gfn_t gfn, pfn_t pfn, 1568 struct kvm_shadow_walk walker;
1235 int level) 1569 pfn_t pfn;
1236{ 1570 int write;
1237 hpa_t table_addr = vcpu->arch.mmu.root_hpa; 1571 int largepage;
1238 int pt_write = 0; 1572 int pt_write;
1239 1573};
1240 for (; ; level--) {
1241 u32 index = PT64_INDEX(v, level);
1242 u64 *table;
1243
1244 ASSERT(VALID_PAGE(table_addr));
1245 table = __va(table_addr);
1246 1574
1247 if (level == 1) { 1575static int direct_map_entry(struct kvm_shadow_walk *_walk,
1248 mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL, 1576 struct kvm_vcpu *vcpu,
1249 0, write, 1, &pt_write, 0, gfn, pfn, false); 1577 u64 addr, u64 *sptep, int level)
1250 return pt_write; 1578{
1251 } 1579 struct direct_shadow_walk *walk =
1580 container_of(_walk, struct direct_shadow_walk, walker);
1581 struct kvm_mmu_page *sp;
1582 gfn_t pseudo_gfn;
1583 gfn_t gfn = addr >> PAGE_SHIFT;
1584
1585 if (level == PT_PAGE_TABLE_LEVEL
1586 || (walk->largepage && level == PT_DIRECTORY_LEVEL)) {
1587 mmu_set_spte(vcpu, sptep, ACC_ALL, ACC_ALL,
1588 0, walk->write, 1, &walk->pt_write,
1589 walk->largepage, gfn, walk->pfn, false);
1590 ++vcpu->stat.pf_fixed;
1591 return 1;
1592 }
1252 1593
1253 if (largepage && level == 2) { 1594 if (*sptep == shadow_trap_nonpresent_pte) {
1254 mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL, 1595 pseudo_gfn = (addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1255 0, write, 1, &pt_write, 1, gfn, pfn, false); 1596 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, (gva_t)addr, level - 1,
1256 return pt_write; 1597 1, ACC_ALL, sptep);
1598 if (!sp) {
1599 pgprintk("nonpaging_map: ENOMEM\n");
1600 kvm_release_pfn_clean(walk->pfn);
1601 return -ENOMEM;
1257 } 1602 }
1258 1603
1259 if (table[index] == shadow_trap_nonpresent_pte) { 1604 set_shadow_pte(sptep,
1260 struct kvm_mmu_page *new_table; 1605 __pa(sp->spt)
1261 gfn_t pseudo_gfn; 1606 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1262 1607 | shadow_user_mask | shadow_x_mask);
1263 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
1264 >> PAGE_SHIFT;
1265 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
1266 v, level - 1,
1267 1, ACC_ALL, &table[index]);
1268 if (!new_table) {
1269 pgprintk("nonpaging_map: ENOMEM\n");
1270 kvm_release_pfn_clean(pfn);
1271 return -ENOMEM;
1272 }
1273
1274 set_shadow_pte(&table[index],
1275 __pa(new_table->spt)
1276 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1277 | shadow_user_mask | shadow_x_mask);
1278 }
1279 table_addr = table[index] & PT64_BASE_ADDR_MASK;
1280 } 1608 }
1609 return 0;
1610}
1611
1612static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1613 int largepage, gfn_t gfn, pfn_t pfn)
1614{
1615 int r;
1616 struct direct_shadow_walk walker = {
1617 .walker = { .entry = direct_map_entry, },
1618 .pfn = pfn,
1619 .largepage = largepage,
1620 .write = write,
1621 .pt_write = 0,
1622 };
1623
1624 r = walk_shadow(&walker.walker, vcpu, gfn << PAGE_SHIFT);
1625 if (r < 0)
1626 return r;
1627 return walker.pt_write;
1281} 1628}
1282 1629
1283static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn) 1630static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
@@ -1287,16 +1634,14 @@ static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1287 pfn_t pfn; 1634 pfn_t pfn;
1288 unsigned long mmu_seq; 1635 unsigned long mmu_seq;
1289 1636
1290 down_read(&current->mm->mmap_sem);
1291 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) { 1637 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1292 gfn &= ~(KVM_PAGES_PER_HPAGE-1); 1638 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1293 largepage = 1; 1639 largepage = 1;
1294 } 1640 }
1295 1641
1296 mmu_seq = vcpu->kvm->mmu_notifier_seq; 1642 mmu_seq = vcpu->kvm->mmu_notifier_seq;
1297 /* implicit mb(), we'll read before PT lock is unlocked */ 1643 smp_rmb();
1298 pfn = gfn_to_pfn(vcpu->kvm, gfn); 1644 pfn = gfn_to_pfn(vcpu->kvm, gfn);
1299 up_read(&current->mm->mmap_sem);
1300 1645
1301 /* mmio */ 1646 /* mmio */
1302 if (is_error_pfn(pfn)) { 1647 if (is_error_pfn(pfn)) {
@@ -1308,8 +1653,7 @@ static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1308 if (mmu_notifier_retry(vcpu, mmu_seq)) 1653 if (mmu_notifier_retry(vcpu, mmu_seq))
1309 goto out_unlock; 1654 goto out_unlock;
1310 kvm_mmu_free_some_pages(vcpu); 1655 kvm_mmu_free_some_pages(vcpu);
1311 r = __direct_map(vcpu, v, write, largepage, gfn, pfn, 1656 r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
1312 PT32E_ROOT_LEVEL);
1313 spin_unlock(&vcpu->kvm->mmu_lock); 1657 spin_unlock(&vcpu->kvm->mmu_lock);
1314 1658
1315 1659
@@ -1405,6 +1749,37 @@ static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
1405 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root); 1749 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
1406} 1750}
1407 1751
1752static void mmu_sync_roots(struct kvm_vcpu *vcpu)
1753{
1754 int i;
1755 struct kvm_mmu_page *sp;
1756
1757 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
1758 return;
1759 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1760 hpa_t root = vcpu->arch.mmu.root_hpa;
1761 sp = page_header(root);
1762 mmu_sync_children(vcpu, sp);
1763 return;
1764 }
1765 for (i = 0; i < 4; ++i) {
1766 hpa_t root = vcpu->arch.mmu.pae_root[i];
1767
1768 if (root) {
1769 root &= PT64_BASE_ADDR_MASK;
1770 sp = page_header(root);
1771 mmu_sync_children(vcpu, sp);
1772 }
1773 }
1774}
1775
1776void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
1777{
1778 spin_lock(&vcpu->kvm->mmu_lock);
1779 mmu_sync_roots(vcpu);
1780 spin_unlock(&vcpu->kvm->mmu_lock);
1781}
1782
1408static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr) 1783static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
1409{ 1784{
1410 return vaddr; 1785 return vaddr;
@@ -1446,15 +1821,13 @@ static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
1446 if (r) 1821 if (r)
1447 return r; 1822 return r;
1448 1823
1449 down_read(&current->mm->mmap_sem);
1450 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) { 1824 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1451 gfn &= ~(KVM_PAGES_PER_HPAGE-1); 1825 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1452 largepage = 1; 1826 largepage = 1;
1453 } 1827 }
1454 mmu_seq = vcpu->kvm->mmu_notifier_seq; 1828 mmu_seq = vcpu->kvm->mmu_notifier_seq;
1455 /* implicit mb(), we'll read before PT lock is unlocked */ 1829 smp_rmb();
1456 pfn = gfn_to_pfn(vcpu->kvm, gfn); 1830 pfn = gfn_to_pfn(vcpu->kvm, gfn);
1457 up_read(&current->mm->mmap_sem);
1458 if (is_error_pfn(pfn)) { 1831 if (is_error_pfn(pfn)) {
1459 kvm_release_pfn_clean(pfn); 1832 kvm_release_pfn_clean(pfn);
1460 return 1; 1833 return 1;
@@ -1464,7 +1837,7 @@ static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
1464 goto out_unlock; 1837 goto out_unlock;
1465 kvm_mmu_free_some_pages(vcpu); 1838 kvm_mmu_free_some_pages(vcpu);
1466 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK, 1839 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
1467 largepage, gfn, pfn, kvm_x86_ops->get_tdp_level()); 1840 largepage, gfn, pfn);
1468 spin_unlock(&vcpu->kvm->mmu_lock); 1841 spin_unlock(&vcpu->kvm->mmu_lock);
1469 1842
1470 return r; 1843 return r;
@@ -1489,6 +1862,8 @@ static int nonpaging_init_context(struct kvm_vcpu *vcpu)
1489 context->gva_to_gpa = nonpaging_gva_to_gpa; 1862 context->gva_to_gpa = nonpaging_gva_to_gpa;
1490 context->free = nonpaging_free; 1863 context->free = nonpaging_free;
1491 context->prefetch_page = nonpaging_prefetch_page; 1864 context->prefetch_page = nonpaging_prefetch_page;
1865 context->sync_page = nonpaging_sync_page;
1866 context->invlpg = nonpaging_invlpg;
1492 context->root_level = 0; 1867 context->root_level = 0;
1493 context->shadow_root_level = PT32E_ROOT_LEVEL; 1868 context->shadow_root_level = PT32E_ROOT_LEVEL;
1494 context->root_hpa = INVALID_PAGE; 1869 context->root_hpa = INVALID_PAGE;
@@ -1536,6 +1911,8 @@ static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
1536 context->page_fault = paging64_page_fault; 1911 context->page_fault = paging64_page_fault;
1537 context->gva_to_gpa = paging64_gva_to_gpa; 1912 context->gva_to_gpa = paging64_gva_to_gpa;
1538 context->prefetch_page = paging64_prefetch_page; 1913 context->prefetch_page = paging64_prefetch_page;
1914 context->sync_page = paging64_sync_page;
1915 context->invlpg = paging64_invlpg;
1539 context->free = paging_free; 1916 context->free = paging_free;
1540 context->root_level = level; 1917 context->root_level = level;
1541 context->shadow_root_level = level; 1918 context->shadow_root_level = level;
@@ -1557,6 +1934,8 @@ static int paging32_init_context(struct kvm_vcpu *vcpu)
1557 context->gva_to_gpa = paging32_gva_to_gpa; 1934 context->gva_to_gpa = paging32_gva_to_gpa;
1558 context->free = paging_free; 1935 context->free = paging_free;
1559 context->prefetch_page = paging32_prefetch_page; 1936 context->prefetch_page = paging32_prefetch_page;
1937 context->sync_page = paging32_sync_page;
1938 context->invlpg = paging32_invlpg;
1560 context->root_level = PT32_ROOT_LEVEL; 1939 context->root_level = PT32_ROOT_LEVEL;
1561 context->shadow_root_level = PT32E_ROOT_LEVEL; 1940 context->shadow_root_level = PT32E_ROOT_LEVEL;
1562 context->root_hpa = INVALID_PAGE; 1941 context->root_hpa = INVALID_PAGE;
@@ -1576,6 +1955,8 @@ static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
1576 context->page_fault = tdp_page_fault; 1955 context->page_fault = tdp_page_fault;
1577 context->free = nonpaging_free; 1956 context->free = nonpaging_free;
1578 context->prefetch_page = nonpaging_prefetch_page; 1957 context->prefetch_page = nonpaging_prefetch_page;
1958 context->sync_page = nonpaging_sync_page;
1959 context->invlpg = nonpaging_invlpg;
1579 context->shadow_root_level = kvm_x86_ops->get_tdp_level(); 1960 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
1580 context->root_hpa = INVALID_PAGE; 1961 context->root_hpa = INVALID_PAGE;
1581 1962
@@ -1647,6 +2028,7 @@ int kvm_mmu_load(struct kvm_vcpu *vcpu)
1647 spin_lock(&vcpu->kvm->mmu_lock); 2028 spin_lock(&vcpu->kvm->mmu_lock);
1648 kvm_mmu_free_some_pages(vcpu); 2029 kvm_mmu_free_some_pages(vcpu);
1649 mmu_alloc_roots(vcpu); 2030 mmu_alloc_roots(vcpu);
2031 mmu_sync_roots(vcpu);
1650 spin_unlock(&vcpu->kvm->mmu_lock); 2032 spin_unlock(&vcpu->kvm->mmu_lock);
1651 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa); 2033 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
1652 kvm_mmu_flush_tlb(vcpu); 2034 kvm_mmu_flush_tlb(vcpu);
@@ -1767,15 +2149,13 @@ static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
1767 return; 2149 return;
1768 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT; 2150 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
1769 2151
1770 down_read(&current->mm->mmap_sem);
1771 if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) { 2152 if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
1772 gfn &= ~(KVM_PAGES_PER_HPAGE-1); 2153 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1773 vcpu->arch.update_pte.largepage = 1; 2154 vcpu->arch.update_pte.largepage = 1;
1774 } 2155 }
1775 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq; 2156 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
1776 /* implicit mb(), we'll read before PT lock is unlocked */ 2157 smp_rmb();
1777 pfn = gfn_to_pfn(vcpu->kvm, gfn); 2158 pfn = gfn_to_pfn(vcpu->kvm, gfn);
1778 up_read(&current->mm->mmap_sem);
1779 2159
1780 if (is_error_pfn(pfn)) { 2160 if (is_error_pfn(pfn)) {
1781 kvm_release_pfn_clean(pfn); 2161 kvm_release_pfn_clean(pfn);
@@ -1837,7 +2217,7 @@ void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
1837 index = kvm_page_table_hashfn(gfn); 2217 index = kvm_page_table_hashfn(gfn);
1838 bucket = &vcpu->kvm->arch.mmu_page_hash[index]; 2218 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1839 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) { 2219 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
1840 if (sp->gfn != gfn || sp->role.metaphysical) 2220 if (sp->gfn != gfn || sp->role.metaphysical || sp->role.invalid)
1841 continue; 2221 continue;
1842 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8; 2222 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
1843 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); 2223 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
@@ -1855,7 +2235,8 @@ void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
1855 */ 2235 */
1856 pgprintk("misaligned: gpa %llx bytes %d role %x\n", 2236 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
1857 gpa, bytes, sp->role.word); 2237 gpa, bytes, sp->role.word);
1858 kvm_mmu_zap_page(vcpu->kvm, sp); 2238 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2239 n = bucket->first;
1859 ++vcpu->kvm->stat.mmu_flooded; 2240 ++vcpu->kvm->stat.mmu_flooded;
1860 continue; 2241 continue;
1861 } 2242 }
@@ -1969,6 +2350,16 @@ out:
1969} 2350}
1970EXPORT_SYMBOL_GPL(kvm_mmu_page_fault); 2351EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
1971 2352
2353void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2354{
2355 spin_lock(&vcpu->kvm->mmu_lock);
2356 vcpu->arch.mmu.invlpg(vcpu, gva);
2357 spin_unlock(&vcpu->kvm->mmu_lock);
2358 kvm_mmu_flush_tlb(vcpu);
2359 ++vcpu->stat.invlpg;
2360}
2361EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2362
1972void kvm_enable_tdp(void) 2363void kvm_enable_tdp(void)
1973{ 2364{
1974 tdp_enabled = true; 2365 tdp_enabled = true;
@@ -2055,6 +2446,7 @@ void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2055{ 2446{
2056 struct kvm_mmu_page *sp; 2447 struct kvm_mmu_page *sp;
2057 2448
2449 spin_lock(&kvm->mmu_lock);
2058 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) { 2450 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2059 int i; 2451 int i;
2060 u64 *pt; 2452 u64 *pt;
@@ -2068,6 +2460,8 @@ void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2068 if (pt[i] & PT_WRITABLE_MASK) 2460 if (pt[i] & PT_WRITABLE_MASK)
2069 pt[i] &= ~PT_WRITABLE_MASK; 2461 pt[i] &= ~PT_WRITABLE_MASK;
2070 } 2462 }
2463 kvm_flush_remote_tlbs(kvm);
2464 spin_unlock(&kvm->mmu_lock);
2071} 2465}
2072 2466
2073void kvm_mmu_zap_all(struct kvm *kvm) 2467void kvm_mmu_zap_all(struct kvm *kvm)
@@ -2076,7 +2470,9 @@ void kvm_mmu_zap_all(struct kvm *kvm)
2076 2470
2077 spin_lock(&kvm->mmu_lock); 2471 spin_lock(&kvm->mmu_lock);
2078 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link) 2472 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
2079 kvm_mmu_zap_page(kvm, sp); 2473 if (kvm_mmu_zap_page(kvm, sp))
2474 node = container_of(kvm->arch.active_mmu_pages.next,
2475 struct kvm_mmu_page, link);
2080 spin_unlock(&kvm->mmu_lock); 2476 spin_unlock(&kvm->mmu_lock);
2081 2477
2082 kvm_flush_remote_tlbs(kvm); 2478 kvm_flush_remote_tlbs(kvm);
@@ -2291,18 +2687,18 @@ int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
2291 gpa_t addr, unsigned long *ret) 2687 gpa_t addr, unsigned long *ret)
2292{ 2688{
2293 int r; 2689 int r;
2294 struct kvm_pv_mmu_op_buffer buffer; 2690 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
2295 2691
2296 buffer.ptr = buffer.buf; 2692 buffer->ptr = buffer->buf;
2297 buffer.len = min_t(unsigned long, bytes, sizeof buffer.buf); 2693 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
2298 buffer.processed = 0; 2694 buffer->processed = 0;
2299 2695
2300 r = kvm_read_guest(vcpu->kvm, addr, buffer.buf, buffer.len); 2696 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
2301 if (r) 2697 if (r)
2302 goto out; 2698 goto out;
2303 2699
2304 while (buffer.len) { 2700 while (buffer->len) {
2305 r = kvm_pv_mmu_op_one(vcpu, &buffer); 2701 r = kvm_pv_mmu_op_one(vcpu, buffer);
2306 if (r < 0) 2702 if (r < 0)
2307 goto out; 2703 goto out;
2308 if (r == 0) 2704 if (r == 0)
@@ -2311,7 +2707,7 @@ int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
2311 2707
2312 r = 1; 2708 r = 1;
2313out: 2709out:
2314 *ret = buffer.processed; 2710 *ret = buffer->processed;
2315 return r; 2711 return r;
2316} 2712}
2317 2713
diff --git a/arch/x86/kvm/paging_tmpl.h b/arch/x86/kvm/paging_tmpl.h
index 4a814bff21f2..613ec9aa674a 100644
--- a/arch/x86/kvm/paging_tmpl.h
+++ b/arch/x86/kvm/paging_tmpl.h
@@ -25,11 +25,11 @@
25#if PTTYPE == 64 25#if PTTYPE == 64
26 #define pt_element_t u64 26 #define pt_element_t u64
27 #define guest_walker guest_walker64 27 #define guest_walker guest_walker64
28 #define shadow_walker shadow_walker64
28 #define FNAME(name) paging##64_##name 29 #define FNAME(name) paging##64_##name
29 #define PT_BASE_ADDR_MASK PT64_BASE_ADDR_MASK 30 #define PT_BASE_ADDR_MASK PT64_BASE_ADDR_MASK
30 #define PT_DIR_BASE_ADDR_MASK PT64_DIR_BASE_ADDR_MASK 31 #define PT_DIR_BASE_ADDR_MASK PT64_DIR_BASE_ADDR_MASK
31 #define PT_INDEX(addr, level) PT64_INDEX(addr, level) 32 #define PT_INDEX(addr, level) PT64_INDEX(addr, level)
32 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
33 #define PT_LEVEL_MASK(level) PT64_LEVEL_MASK(level) 33 #define PT_LEVEL_MASK(level) PT64_LEVEL_MASK(level)
34 #define PT_LEVEL_BITS PT64_LEVEL_BITS 34 #define PT_LEVEL_BITS PT64_LEVEL_BITS
35 #ifdef CONFIG_X86_64 35 #ifdef CONFIG_X86_64
@@ -42,11 +42,11 @@
42#elif PTTYPE == 32 42#elif PTTYPE == 32
43 #define pt_element_t u32 43 #define pt_element_t u32
44 #define guest_walker guest_walker32 44 #define guest_walker guest_walker32
45 #define shadow_walker shadow_walker32
45 #define FNAME(name) paging##32_##name 46 #define FNAME(name) paging##32_##name
46 #define PT_BASE_ADDR_MASK PT32_BASE_ADDR_MASK 47 #define PT_BASE_ADDR_MASK PT32_BASE_ADDR_MASK
47 #define PT_DIR_BASE_ADDR_MASK PT32_DIR_BASE_ADDR_MASK 48 #define PT_DIR_BASE_ADDR_MASK PT32_DIR_BASE_ADDR_MASK
48 #define PT_INDEX(addr, level) PT32_INDEX(addr, level) 49 #define PT_INDEX(addr, level) PT32_INDEX(addr, level)
49 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
50 #define PT_LEVEL_MASK(level) PT32_LEVEL_MASK(level) 50 #define PT_LEVEL_MASK(level) PT32_LEVEL_MASK(level)
51 #define PT_LEVEL_BITS PT32_LEVEL_BITS 51 #define PT_LEVEL_BITS PT32_LEVEL_BITS
52 #define PT_MAX_FULL_LEVELS 2 52 #define PT_MAX_FULL_LEVELS 2
@@ -73,6 +73,17 @@ struct guest_walker {
73 u32 error_code; 73 u32 error_code;
74}; 74};
75 75
76struct shadow_walker {
77 struct kvm_shadow_walk walker;
78 struct guest_walker *guest_walker;
79 int user_fault;
80 int write_fault;
81 int largepage;
82 int *ptwrite;
83 pfn_t pfn;
84 u64 *sptep;
85};
86
76static gfn_t gpte_to_gfn(pt_element_t gpte) 87static gfn_t gpte_to_gfn(pt_element_t gpte)
77{ 88{
78 return (gpte & PT_BASE_ADDR_MASK) >> PAGE_SHIFT; 89 return (gpte & PT_BASE_ADDR_MASK) >> PAGE_SHIFT;
@@ -91,14 +102,10 @@ static bool FNAME(cmpxchg_gpte)(struct kvm *kvm,
91 pt_element_t *table; 102 pt_element_t *table;
92 struct page *page; 103 struct page *page;
93 104
94 down_read(&current->mm->mmap_sem);
95 page = gfn_to_page(kvm, table_gfn); 105 page = gfn_to_page(kvm, table_gfn);
96 up_read(&current->mm->mmap_sem);
97 106
98 table = kmap_atomic(page, KM_USER0); 107 table = kmap_atomic(page, KM_USER0);
99
100 ret = CMPXCHG(&table[index], orig_pte, new_pte); 108 ret = CMPXCHG(&table[index], orig_pte, new_pte);
101
102 kunmap_atomic(table, KM_USER0); 109 kunmap_atomic(table, KM_USER0);
103 110
104 kvm_release_page_dirty(page); 111 kvm_release_page_dirty(page);
@@ -274,86 +281,89 @@ static void FNAME(update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *page,
274/* 281/*
275 * Fetch a shadow pte for a specific level in the paging hierarchy. 282 * Fetch a shadow pte for a specific level in the paging hierarchy.
276 */ 283 */
277static u64 *FNAME(fetch)(struct kvm_vcpu *vcpu, gva_t addr, 284static int FNAME(shadow_walk_entry)(struct kvm_shadow_walk *_sw,
278 struct guest_walker *walker, 285 struct kvm_vcpu *vcpu, u64 addr,
279 int user_fault, int write_fault, int largepage, 286 u64 *sptep, int level)
280 int *ptwrite, pfn_t pfn)
281{ 287{
282 hpa_t shadow_addr; 288 struct shadow_walker *sw =
283 int level; 289 container_of(_sw, struct shadow_walker, walker);
284 u64 *shadow_ent; 290 struct guest_walker *gw = sw->guest_walker;
285 unsigned access = walker->pt_access; 291 unsigned access = gw->pt_access;
286 292 struct kvm_mmu_page *shadow_page;
287 if (!is_present_pte(walker->ptes[walker->level - 1])) 293 u64 spte;
288 return NULL; 294 int metaphysical;
289 295 gfn_t table_gfn;
290 shadow_addr = vcpu->arch.mmu.root_hpa; 296 int r;
291 level = vcpu->arch.mmu.shadow_root_level; 297 pt_element_t curr_pte;
292 if (level == PT32E_ROOT_LEVEL) { 298
293 shadow_addr = vcpu->arch.mmu.pae_root[(addr >> 30) & 3]; 299 if (level == PT_PAGE_TABLE_LEVEL
294 shadow_addr &= PT64_BASE_ADDR_MASK; 300 || (sw->largepage && level == PT_DIRECTORY_LEVEL)) {
295 --level; 301 mmu_set_spte(vcpu, sptep, access, gw->pte_access & access,
302 sw->user_fault, sw->write_fault,
303 gw->ptes[gw->level-1] & PT_DIRTY_MASK,
304 sw->ptwrite, sw->largepage, gw->gfn, sw->pfn,
305 false);
306 sw->sptep = sptep;
307 return 1;
296 } 308 }
297 309
298 for (; ; level--) { 310 if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep))
299 u32 index = SHADOW_PT_INDEX(addr, level); 311 return 0;
300 struct kvm_mmu_page *shadow_page;
301 u64 shadow_pte;
302 int metaphysical;
303 gfn_t table_gfn;
304
305 shadow_ent = ((u64 *)__va(shadow_addr)) + index;
306 if (level == PT_PAGE_TABLE_LEVEL)
307 break;
308
309 if (largepage && level == PT_DIRECTORY_LEVEL)
310 break;
311 312
312 if (is_shadow_present_pte(*shadow_ent) 313 if (is_large_pte(*sptep)) {
313 && !is_large_pte(*shadow_ent)) { 314 set_shadow_pte(sptep, shadow_trap_nonpresent_pte);
314 shadow_addr = *shadow_ent & PT64_BASE_ADDR_MASK; 315 kvm_flush_remote_tlbs(vcpu->kvm);
315 continue; 316 rmap_remove(vcpu->kvm, sptep);
316 } 317 }
317 318
318 if (is_large_pte(*shadow_ent)) 319 if (level == PT_DIRECTORY_LEVEL && gw->level == PT_DIRECTORY_LEVEL) {
319 rmap_remove(vcpu->kvm, shadow_ent); 320 metaphysical = 1;
320 321 if (!is_dirty_pte(gw->ptes[level - 1]))
321 if (level - 1 == PT_PAGE_TABLE_LEVEL 322 access &= ~ACC_WRITE_MASK;
322 && walker->level == PT_DIRECTORY_LEVEL) { 323 table_gfn = gpte_to_gfn(gw->ptes[level - 1]);
323 metaphysical = 1; 324 } else {
324 if (!is_dirty_pte(walker->ptes[level - 1])) 325 metaphysical = 0;
325 access &= ~ACC_WRITE_MASK; 326 table_gfn = gw->table_gfn[level - 2];
326 table_gfn = gpte_to_gfn(walker->ptes[level - 1]); 327 }
327 } else { 328 shadow_page = kvm_mmu_get_page(vcpu, table_gfn, (gva_t)addr, level-1,
328 metaphysical = 0; 329 metaphysical, access, sptep);
329 table_gfn = walker->table_gfn[level - 2]; 330 if (!metaphysical) {
330 } 331 r = kvm_read_guest_atomic(vcpu->kvm, gw->pte_gpa[level - 2],
331 shadow_page = kvm_mmu_get_page(vcpu, table_gfn, addr, level-1, 332 &curr_pte, sizeof(curr_pte));
332 metaphysical, access, 333 if (r || curr_pte != gw->ptes[level - 2]) {
333 shadow_ent); 334 kvm_release_pfn_clean(sw->pfn);
334 if (!metaphysical) { 335 sw->sptep = NULL;
335 int r; 336 return 1;
336 pt_element_t curr_pte;
337 r = kvm_read_guest_atomic(vcpu->kvm,
338 walker->pte_gpa[level - 2],
339 &curr_pte, sizeof(curr_pte));
340 if (r || curr_pte != walker->ptes[level - 2]) {
341 kvm_release_pfn_clean(pfn);
342 return NULL;
343 }
344 } 337 }
345 shadow_addr = __pa(shadow_page->spt);
346 shadow_pte = shadow_addr | PT_PRESENT_MASK | PT_ACCESSED_MASK
347 | PT_WRITABLE_MASK | PT_USER_MASK;
348 set_shadow_pte(shadow_ent, shadow_pte);
349 } 338 }
350 339
351 mmu_set_spte(vcpu, shadow_ent, access, walker->pte_access & access, 340 spte = __pa(shadow_page->spt) | PT_PRESENT_MASK | PT_ACCESSED_MASK
352 user_fault, write_fault, 341 | PT_WRITABLE_MASK | PT_USER_MASK;
353 walker->ptes[walker->level-1] & PT_DIRTY_MASK, 342 *sptep = spte;
354 ptwrite, largepage, walker->gfn, pfn, false); 343 return 0;
344}
345
346static u64 *FNAME(fetch)(struct kvm_vcpu *vcpu, gva_t addr,
347 struct guest_walker *guest_walker,
348 int user_fault, int write_fault, int largepage,
349 int *ptwrite, pfn_t pfn)
350{
351 struct shadow_walker walker = {
352 .walker = { .entry = FNAME(shadow_walk_entry), },
353 .guest_walker = guest_walker,
354 .user_fault = user_fault,
355 .write_fault = write_fault,
356 .largepage = largepage,
357 .ptwrite = ptwrite,
358 .pfn = pfn,
359 };
360
361 if (!is_present_pte(guest_walker->ptes[guest_walker->level - 1]))
362 return NULL;
363
364 walk_shadow(&walker.walker, vcpu, addr);
355 365
356 return shadow_ent; 366 return walker.sptep;
357} 367}
358 368
359/* 369/*
@@ -407,7 +417,6 @@ static int FNAME(page_fault)(struct kvm_vcpu *vcpu, gva_t addr,
407 return 0; 417 return 0;
408 } 418 }
409 419
410 down_read(&current->mm->mmap_sem);
411 if (walker.level == PT_DIRECTORY_LEVEL) { 420 if (walker.level == PT_DIRECTORY_LEVEL) {
412 gfn_t large_gfn; 421 gfn_t large_gfn;
413 large_gfn = walker.gfn & ~(KVM_PAGES_PER_HPAGE-1); 422 large_gfn = walker.gfn & ~(KVM_PAGES_PER_HPAGE-1);
@@ -417,9 +426,8 @@ static int FNAME(page_fault)(struct kvm_vcpu *vcpu, gva_t addr,
417 } 426 }
418 } 427 }
419 mmu_seq = vcpu->kvm->mmu_notifier_seq; 428 mmu_seq = vcpu->kvm->mmu_notifier_seq;
420 /* implicit mb(), we'll read before PT lock is unlocked */ 429 smp_rmb();
421 pfn = gfn_to_pfn(vcpu->kvm, walker.gfn); 430 pfn = gfn_to_pfn(vcpu->kvm, walker.gfn);
422 up_read(&current->mm->mmap_sem);
423 431
424 /* mmio */ 432 /* mmio */
425 if (is_error_pfn(pfn)) { 433 if (is_error_pfn(pfn)) {
@@ -453,6 +461,31 @@ out_unlock:
453 return 0; 461 return 0;
454} 462}
455 463
464static int FNAME(shadow_invlpg_entry)(struct kvm_shadow_walk *_sw,
465 struct kvm_vcpu *vcpu, u64 addr,
466 u64 *sptep, int level)
467{
468
469 if (level == PT_PAGE_TABLE_LEVEL) {
470 if (is_shadow_present_pte(*sptep))
471 rmap_remove(vcpu->kvm, sptep);
472 set_shadow_pte(sptep, shadow_trap_nonpresent_pte);
473 return 1;
474 }
475 if (!is_shadow_present_pte(*sptep))
476 return 1;
477 return 0;
478}
479
480static void FNAME(invlpg)(struct kvm_vcpu *vcpu, gva_t gva)
481{
482 struct shadow_walker walker = {
483 .walker = { .entry = FNAME(shadow_invlpg_entry), },
484 };
485
486 walk_shadow(&walker.walker, vcpu, gva);
487}
488
456static gpa_t FNAME(gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t vaddr) 489static gpa_t FNAME(gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t vaddr)
457{ 490{
458 struct guest_walker walker; 491 struct guest_walker walker;
@@ -499,12 +532,66 @@ static void FNAME(prefetch_page)(struct kvm_vcpu *vcpu,
499 } 532 }
500} 533}
501 534
535/*
536 * Using the cached information from sp->gfns is safe because:
537 * - The spte has a reference to the struct page, so the pfn for a given gfn
538 * can't change unless all sptes pointing to it are nuked first.
539 * - Alias changes zap the entire shadow cache.
540 */
541static int FNAME(sync_page)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
542{
543 int i, offset, nr_present;
544
545 offset = nr_present = 0;
546
547 if (PTTYPE == 32)
548 offset = sp->role.quadrant << PT64_LEVEL_BITS;
549
550 for (i = 0; i < PT64_ENT_PER_PAGE; i++) {
551 unsigned pte_access;
552 pt_element_t gpte;
553 gpa_t pte_gpa;
554 gfn_t gfn = sp->gfns[i];
555
556 if (!is_shadow_present_pte(sp->spt[i]))
557 continue;
558
559 pte_gpa = gfn_to_gpa(sp->gfn);
560 pte_gpa += (i+offset) * sizeof(pt_element_t);
561
562 if (kvm_read_guest_atomic(vcpu->kvm, pte_gpa, &gpte,
563 sizeof(pt_element_t)))
564 return -EINVAL;
565
566 if (gpte_to_gfn(gpte) != gfn || !is_present_pte(gpte) ||
567 !(gpte & PT_ACCESSED_MASK)) {
568 u64 nonpresent;
569
570 rmap_remove(vcpu->kvm, &sp->spt[i]);
571 if (is_present_pte(gpte))
572 nonpresent = shadow_trap_nonpresent_pte;
573 else
574 nonpresent = shadow_notrap_nonpresent_pte;
575 set_shadow_pte(&sp->spt[i], nonpresent);
576 continue;
577 }
578
579 nr_present++;
580 pte_access = sp->role.access & FNAME(gpte_access)(vcpu, gpte);
581 set_spte(vcpu, &sp->spt[i], pte_access, 0, 0,
582 is_dirty_pte(gpte), 0, gfn,
583 spte_to_pfn(sp->spt[i]), true, false);
584 }
585
586 return !nr_present;
587}
588
502#undef pt_element_t 589#undef pt_element_t
503#undef guest_walker 590#undef guest_walker
591#undef shadow_walker
504#undef FNAME 592#undef FNAME
505#undef PT_BASE_ADDR_MASK 593#undef PT_BASE_ADDR_MASK
506#undef PT_INDEX 594#undef PT_INDEX
507#undef SHADOW_PT_INDEX
508#undef PT_LEVEL_MASK 595#undef PT_LEVEL_MASK
509#undef PT_DIR_BASE_ADDR_MASK 596#undef PT_DIR_BASE_ADDR_MASK
510#undef PT_LEVEL_BITS 597#undef PT_LEVEL_BITS
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 8233b86c778c..9c4ce657d963 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -18,6 +18,7 @@
18#include "kvm_svm.h" 18#include "kvm_svm.h"
19#include "irq.h" 19#include "irq.h"
20#include "mmu.h" 20#include "mmu.h"
21#include "kvm_cache_regs.h"
21 22
22#include <linux/module.h> 23#include <linux/module.h>
23#include <linux/kernel.h> 24#include <linux/kernel.h>
@@ -35,10 +36,6 @@ MODULE_LICENSE("GPL");
35#define IOPM_ALLOC_ORDER 2 36#define IOPM_ALLOC_ORDER 2
36#define MSRPM_ALLOC_ORDER 1 37#define MSRPM_ALLOC_ORDER 1
37 38
38#define DB_VECTOR 1
39#define UD_VECTOR 6
40#define GP_VECTOR 13
41
42#define DR7_GD_MASK (1 << 13) 39#define DR7_GD_MASK (1 << 13)
43#define DR6_BD_MASK (1 << 13) 40#define DR6_BD_MASK (1 << 13)
44 41
@@ -47,7 +44,7 @@ MODULE_LICENSE("GPL");
47 44
48#define SVM_FEATURE_NPT (1 << 0) 45#define SVM_FEATURE_NPT (1 << 0)
49#define SVM_FEATURE_LBRV (1 << 1) 46#define SVM_FEATURE_LBRV (1 << 1)
50#define SVM_DEATURE_SVML (1 << 2) 47#define SVM_FEATURE_SVML (1 << 2)
51 48
52#define DEBUGCTL_RESERVED_BITS (~(0x3fULL)) 49#define DEBUGCTL_RESERVED_BITS (~(0x3fULL))
53 50
@@ -236,13 +233,11 @@ static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
236 printk(KERN_DEBUG "%s: NOP\n", __func__); 233 printk(KERN_DEBUG "%s: NOP\n", __func__);
237 return; 234 return;
238 } 235 }
239 if (svm->next_rip - svm->vmcb->save.rip > MAX_INST_SIZE) 236 if (svm->next_rip - kvm_rip_read(vcpu) > MAX_INST_SIZE)
240 printk(KERN_ERR "%s: ip 0x%llx next 0x%llx\n", 237 printk(KERN_ERR "%s: ip 0x%lx next 0x%llx\n",
241 __func__, 238 __func__, kvm_rip_read(vcpu), svm->next_rip);
242 svm->vmcb->save.rip,
243 svm->next_rip);
244 239
245 vcpu->arch.rip = svm->vmcb->save.rip = svm->next_rip; 240 kvm_rip_write(vcpu, svm->next_rip);
246 svm->vmcb->control.int_state &= ~SVM_INTERRUPT_SHADOW_MASK; 241 svm->vmcb->control.int_state &= ~SVM_INTERRUPT_SHADOW_MASK;
247 242
248 vcpu->arch.interrupt_window_open = 1; 243 vcpu->arch.interrupt_window_open = 1;
@@ -530,6 +525,7 @@ static void init_vmcb(struct vcpu_svm *svm)
530 (1ULL << INTERCEPT_CPUID) | 525 (1ULL << INTERCEPT_CPUID) |
531 (1ULL << INTERCEPT_INVD) | 526 (1ULL << INTERCEPT_INVD) |
532 (1ULL << INTERCEPT_HLT) | 527 (1ULL << INTERCEPT_HLT) |
528 (1ULL << INTERCEPT_INVLPG) |
533 (1ULL << INTERCEPT_INVLPGA) | 529 (1ULL << INTERCEPT_INVLPGA) |
534 (1ULL << INTERCEPT_IOIO_PROT) | 530 (1ULL << INTERCEPT_IOIO_PROT) |
535 (1ULL << INTERCEPT_MSR_PROT) | 531 (1ULL << INTERCEPT_MSR_PROT) |
@@ -581,6 +577,7 @@ static void init_vmcb(struct vcpu_svm *svm)
581 save->dr7 = 0x400; 577 save->dr7 = 0x400;
582 save->rflags = 2; 578 save->rflags = 2;
583 save->rip = 0x0000fff0; 579 save->rip = 0x0000fff0;
580 svm->vcpu.arch.regs[VCPU_REGS_RIP] = save->rip;
584 581
585 /* 582 /*
586 * cr0 val on cpu init should be 0x60000010, we enable cpu 583 * cr0 val on cpu init should be 0x60000010, we enable cpu
@@ -593,7 +590,8 @@ static void init_vmcb(struct vcpu_svm *svm)
593 if (npt_enabled) { 590 if (npt_enabled) {
594 /* Setup VMCB for Nested Paging */ 591 /* Setup VMCB for Nested Paging */
595 control->nested_ctl = 1; 592 control->nested_ctl = 1;
596 control->intercept &= ~(1ULL << INTERCEPT_TASK_SWITCH); 593 control->intercept &= ~((1ULL << INTERCEPT_TASK_SWITCH) |
594 (1ULL << INTERCEPT_INVLPG));
597 control->intercept_exceptions &= ~(1 << PF_VECTOR); 595 control->intercept_exceptions &= ~(1 << PF_VECTOR);
598 control->intercept_cr_read &= ~(INTERCEPT_CR0_MASK| 596 control->intercept_cr_read &= ~(INTERCEPT_CR0_MASK|
599 INTERCEPT_CR3_MASK); 597 INTERCEPT_CR3_MASK);
@@ -615,10 +613,12 @@ static int svm_vcpu_reset(struct kvm_vcpu *vcpu)
615 init_vmcb(svm); 613 init_vmcb(svm);
616 614
617 if (vcpu->vcpu_id != 0) { 615 if (vcpu->vcpu_id != 0) {
618 svm->vmcb->save.rip = 0; 616 kvm_rip_write(vcpu, 0);
619 svm->vmcb->save.cs.base = svm->vcpu.arch.sipi_vector << 12; 617 svm->vmcb->save.cs.base = svm->vcpu.arch.sipi_vector << 12;
620 svm->vmcb->save.cs.selector = svm->vcpu.arch.sipi_vector << 8; 618 svm->vmcb->save.cs.selector = svm->vcpu.arch.sipi_vector << 8;
621 } 619 }
620 vcpu->arch.regs_avail = ~0;
621 vcpu->arch.regs_dirty = ~0;
622 622
623 return 0; 623 return 0;
624} 624}
@@ -721,23 +721,6 @@ static void svm_vcpu_put(struct kvm_vcpu *vcpu)
721 rdtscll(vcpu->arch.host_tsc); 721 rdtscll(vcpu->arch.host_tsc);
722} 722}
723 723
724static void svm_cache_regs(struct kvm_vcpu *vcpu)
725{
726 struct vcpu_svm *svm = to_svm(vcpu);
727
728 vcpu->arch.regs[VCPU_REGS_RAX] = svm->vmcb->save.rax;
729 vcpu->arch.regs[VCPU_REGS_RSP] = svm->vmcb->save.rsp;
730 vcpu->arch.rip = svm->vmcb->save.rip;
731}
732
733static void svm_decache_regs(struct kvm_vcpu *vcpu)
734{
735 struct vcpu_svm *svm = to_svm(vcpu);
736 svm->vmcb->save.rax = vcpu->arch.regs[VCPU_REGS_RAX];
737 svm->vmcb->save.rsp = vcpu->arch.regs[VCPU_REGS_RSP];
738 svm->vmcb->save.rip = vcpu->arch.rip;
739}
740
741static unsigned long svm_get_rflags(struct kvm_vcpu *vcpu) 724static unsigned long svm_get_rflags(struct kvm_vcpu *vcpu)
742{ 725{
743 return to_svm(vcpu)->vmcb->save.rflags; 726 return to_svm(vcpu)->vmcb->save.rflags;
@@ -1040,7 +1023,7 @@ static int pf_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
1040 if (npt_enabled) 1023 if (npt_enabled)
1041 svm_flush_tlb(&svm->vcpu); 1024 svm_flush_tlb(&svm->vcpu);
1042 1025
1043 if (event_injection) 1026 if (!npt_enabled && event_injection)
1044 kvm_mmu_unprotect_page_virt(&svm->vcpu, fault_address); 1027 kvm_mmu_unprotect_page_virt(&svm->vcpu, fault_address);
1045 return kvm_mmu_page_fault(&svm->vcpu, fault_address, error_code); 1028 return kvm_mmu_page_fault(&svm->vcpu, fault_address, error_code);
1046} 1029}
@@ -1139,14 +1122,14 @@ static int nop_on_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
1139 1122
1140static int halt_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run) 1123static int halt_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
1141{ 1124{
1142 svm->next_rip = svm->vmcb->save.rip + 1; 1125 svm->next_rip = kvm_rip_read(&svm->vcpu) + 1;
1143 skip_emulated_instruction(&svm->vcpu); 1126 skip_emulated_instruction(&svm->vcpu);
1144 return kvm_emulate_halt(&svm->vcpu); 1127 return kvm_emulate_halt(&svm->vcpu);
1145} 1128}
1146 1129
1147static int vmmcall_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run) 1130static int vmmcall_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
1148{ 1131{
1149 svm->next_rip = svm->vmcb->save.rip + 3; 1132 svm->next_rip = kvm_rip_read(&svm->vcpu) + 3;
1150 skip_emulated_instruction(&svm->vcpu); 1133 skip_emulated_instruction(&svm->vcpu);
1151 kvm_emulate_hypercall(&svm->vcpu); 1134 kvm_emulate_hypercall(&svm->vcpu);
1152 return 1; 1135 return 1;
@@ -1178,11 +1161,18 @@ static int task_switch_interception(struct vcpu_svm *svm,
1178 1161
1179static int cpuid_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run) 1162static int cpuid_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
1180{ 1163{
1181 svm->next_rip = svm->vmcb->save.rip + 2; 1164 svm->next_rip = kvm_rip_read(&svm->vcpu) + 2;
1182 kvm_emulate_cpuid(&svm->vcpu); 1165 kvm_emulate_cpuid(&svm->vcpu);
1183 return 1; 1166 return 1;
1184} 1167}
1185 1168
1169static int invlpg_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
1170{
1171 if (emulate_instruction(&svm->vcpu, kvm_run, 0, 0, 0) != EMULATE_DONE)
1172 pr_unimpl(&svm->vcpu, "%s: failed\n", __func__);
1173 return 1;
1174}
1175
1186static int emulate_on_interception(struct vcpu_svm *svm, 1176static int emulate_on_interception(struct vcpu_svm *svm,
1187 struct kvm_run *kvm_run) 1177 struct kvm_run *kvm_run)
1188{ 1178{
@@ -1273,9 +1263,9 @@ static int rdmsr_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
1273 KVMTRACE_3D(MSR_READ, &svm->vcpu, ecx, (u32)data, 1263 KVMTRACE_3D(MSR_READ, &svm->vcpu, ecx, (u32)data,
1274 (u32)(data >> 32), handler); 1264 (u32)(data >> 32), handler);
1275 1265
1276 svm->vmcb->save.rax = data & 0xffffffff; 1266 svm->vcpu.arch.regs[VCPU_REGS_RAX] = data & 0xffffffff;
1277 svm->vcpu.arch.regs[VCPU_REGS_RDX] = data >> 32; 1267 svm->vcpu.arch.regs[VCPU_REGS_RDX] = data >> 32;
1278 svm->next_rip = svm->vmcb->save.rip + 2; 1268 svm->next_rip = kvm_rip_read(&svm->vcpu) + 2;
1279 skip_emulated_instruction(&svm->vcpu); 1269 skip_emulated_instruction(&svm->vcpu);
1280 } 1270 }
1281 return 1; 1271 return 1;
@@ -1359,13 +1349,13 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data)
1359static int wrmsr_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run) 1349static int wrmsr_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
1360{ 1350{
1361 u32 ecx = svm->vcpu.arch.regs[VCPU_REGS_RCX]; 1351 u32 ecx = svm->vcpu.arch.regs[VCPU_REGS_RCX];
1362 u64 data = (svm->vmcb->save.rax & -1u) 1352 u64 data = (svm->vcpu.arch.regs[VCPU_REGS_RAX] & -1u)
1363 | ((u64)(svm->vcpu.arch.regs[VCPU_REGS_RDX] & -1u) << 32); 1353 | ((u64)(svm->vcpu.arch.regs[VCPU_REGS_RDX] & -1u) << 32);
1364 1354
1365 KVMTRACE_3D(MSR_WRITE, &svm->vcpu, ecx, (u32)data, (u32)(data >> 32), 1355 KVMTRACE_3D(MSR_WRITE, &svm->vcpu, ecx, (u32)data, (u32)(data >> 32),
1366 handler); 1356 handler);
1367 1357
1368 svm->next_rip = svm->vmcb->save.rip + 2; 1358 svm->next_rip = kvm_rip_read(&svm->vcpu) + 2;
1369 if (svm_set_msr(&svm->vcpu, ecx, data)) 1359 if (svm_set_msr(&svm->vcpu, ecx, data))
1370 kvm_inject_gp(&svm->vcpu, 0); 1360 kvm_inject_gp(&svm->vcpu, 0);
1371 else 1361 else
@@ -1436,7 +1426,7 @@ static int (*svm_exit_handlers[])(struct vcpu_svm *svm,
1436 [SVM_EXIT_CPUID] = cpuid_interception, 1426 [SVM_EXIT_CPUID] = cpuid_interception,
1437 [SVM_EXIT_INVD] = emulate_on_interception, 1427 [SVM_EXIT_INVD] = emulate_on_interception,
1438 [SVM_EXIT_HLT] = halt_interception, 1428 [SVM_EXIT_HLT] = halt_interception,
1439 [SVM_EXIT_INVLPG] = emulate_on_interception, 1429 [SVM_EXIT_INVLPG] = invlpg_interception,
1440 [SVM_EXIT_INVLPGA] = invalid_op_interception, 1430 [SVM_EXIT_INVLPGA] = invalid_op_interception,
1441 [SVM_EXIT_IOIO] = io_interception, 1431 [SVM_EXIT_IOIO] = io_interception,
1442 [SVM_EXIT_MSR] = msr_interception, 1432 [SVM_EXIT_MSR] = msr_interception,
@@ -1538,6 +1528,7 @@ static inline void svm_inject_irq(struct vcpu_svm *svm, int irq)
1538 1528
1539 KVMTRACE_1D(INJ_VIRQ, &svm->vcpu, (u32)irq, handler); 1529 KVMTRACE_1D(INJ_VIRQ, &svm->vcpu, (u32)irq, handler);
1540 1530
1531 ++svm->vcpu.stat.irq_injections;
1541 control = &svm->vmcb->control; 1532 control = &svm->vmcb->control;
1542 control->int_vector = irq; 1533 control->int_vector = irq;
1543 control->int_ctl &= ~V_INTR_PRIO_MASK; 1534 control->int_ctl &= ~V_INTR_PRIO_MASK;
@@ -1716,6 +1707,12 @@ static inline void sync_lapic_to_cr8(struct kvm_vcpu *vcpu)
1716 svm->vmcb->control.int_ctl |= cr8 & V_TPR_MASK; 1707 svm->vmcb->control.int_ctl |= cr8 & V_TPR_MASK;
1717} 1708}
1718 1709
1710#ifdef CONFIG_X86_64
1711#define R "r"
1712#else
1713#define R "e"
1714#endif
1715
1719static void svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run) 1716static void svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1720{ 1717{
1721 struct vcpu_svm *svm = to_svm(vcpu); 1718 struct vcpu_svm *svm = to_svm(vcpu);
@@ -1723,6 +1720,10 @@ static void svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1723 u16 gs_selector; 1720 u16 gs_selector;
1724 u16 ldt_selector; 1721 u16 ldt_selector;
1725 1722
1723 svm->vmcb->save.rax = vcpu->arch.regs[VCPU_REGS_RAX];
1724 svm->vmcb->save.rsp = vcpu->arch.regs[VCPU_REGS_RSP];
1725 svm->vmcb->save.rip = vcpu->arch.regs[VCPU_REGS_RIP];
1726
1726 pre_svm_run(svm); 1727 pre_svm_run(svm);
1727 1728
1728 sync_lapic_to_cr8(vcpu); 1729 sync_lapic_to_cr8(vcpu);
@@ -1750,19 +1751,14 @@ static void svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1750 local_irq_enable(); 1751 local_irq_enable();
1751 1752
1752 asm volatile ( 1753 asm volatile (
1754 "push %%"R"bp; \n\t"
1755 "mov %c[rbx](%[svm]), %%"R"bx \n\t"
1756 "mov %c[rcx](%[svm]), %%"R"cx \n\t"
1757 "mov %c[rdx](%[svm]), %%"R"dx \n\t"
1758 "mov %c[rsi](%[svm]), %%"R"si \n\t"
1759 "mov %c[rdi](%[svm]), %%"R"di \n\t"
1760 "mov %c[rbp](%[svm]), %%"R"bp \n\t"
1753#ifdef CONFIG_X86_64 1761#ifdef CONFIG_X86_64
1754 "push %%rbp; \n\t"
1755#else
1756 "push %%ebp; \n\t"
1757#endif
1758
1759#ifdef CONFIG_X86_64
1760 "mov %c[rbx](%[svm]), %%rbx \n\t"
1761 "mov %c[rcx](%[svm]), %%rcx \n\t"
1762 "mov %c[rdx](%[svm]), %%rdx \n\t"
1763 "mov %c[rsi](%[svm]), %%rsi \n\t"
1764 "mov %c[rdi](%[svm]), %%rdi \n\t"
1765 "mov %c[rbp](%[svm]), %%rbp \n\t"
1766 "mov %c[r8](%[svm]), %%r8 \n\t" 1762 "mov %c[r8](%[svm]), %%r8 \n\t"
1767 "mov %c[r9](%[svm]), %%r9 \n\t" 1763 "mov %c[r9](%[svm]), %%r9 \n\t"
1768 "mov %c[r10](%[svm]), %%r10 \n\t" 1764 "mov %c[r10](%[svm]), %%r10 \n\t"
@@ -1771,41 +1767,24 @@ static void svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1771 "mov %c[r13](%[svm]), %%r13 \n\t" 1767 "mov %c[r13](%[svm]), %%r13 \n\t"
1772 "mov %c[r14](%[svm]), %%r14 \n\t" 1768 "mov %c[r14](%[svm]), %%r14 \n\t"
1773 "mov %c[r15](%[svm]), %%r15 \n\t" 1769 "mov %c[r15](%[svm]), %%r15 \n\t"
1774#else
1775 "mov %c[rbx](%[svm]), %%ebx \n\t"
1776 "mov %c[rcx](%[svm]), %%ecx \n\t"
1777 "mov %c[rdx](%[svm]), %%edx \n\t"
1778 "mov %c[rsi](%[svm]), %%esi \n\t"
1779 "mov %c[rdi](%[svm]), %%edi \n\t"
1780 "mov %c[rbp](%[svm]), %%ebp \n\t"
1781#endif 1770#endif
1782 1771
1783#ifdef CONFIG_X86_64
1784 /* Enter guest mode */
1785 "push %%rax \n\t"
1786 "mov %c[vmcb](%[svm]), %%rax \n\t"
1787 __ex(SVM_VMLOAD) "\n\t"
1788 __ex(SVM_VMRUN) "\n\t"
1789 __ex(SVM_VMSAVE) "\n\t"
1790 "pop %%rax \n\t"
1791#else
1792 /* Enter guest mode */ 1772 /* Enter guest mode */
1793 "push %%eax \n\t" 1773 "push %%"R"ax \n\t"
1794 "mov %c[vmcb](%[svm]), %%eax \n\t" 1774 "mov %c[vmcb](%[svm]), %%"R"ax \n\t"
1795 __ex(SVM_VMLOAD) "\n\t" 1775 __ex(SVM_VMLOAD) "\n\t"
1796 __ex(SVM_VMRUN) "\n\t" 1776 __ex(SVM_VMRUN) "\n\t"
1797 __ex(SVM_VMSAVE) "\n\t" 1777 __ex(SVM_VMSAVE) "\n\t"
1798 "pop %%eax \n\t" 1778 "pop %%"R"ax \n\t"
1799#endif
1800 1779
1801 /* Save guest registers, load host registers */ 1780 /* Save guest registers, load host registers */
1781 "mov %%"R"bx, %c[rbx](%[svm]) \n\t"
1782 "mov %%"R"cx, %c[rcx](%[svm]) \n\t"
1783 "mov %%"R"dx, %c[rdx](%[svm]) \n\t"
1784 "mov %%"R"si, %c[rsi](%[svm]) \n\t"
1785 "mov %%"R"di, %c[rdi](%[svm]) \n\t"
1786 "mov %%"R"bp, %c[rbp](%[svm]) \n\t"
1802#ifdef CONFIG_X86_64 1787#ifdef CONFIG_X86_64
1803 "mov %%rbx, %c[rbx](%[svm]) \n\t"
1804 "mov %%rcx, %c[rcx](%[svm]) \n\t"
1805 "mov %%rdx, %c[rdx](%[svm]) \n\t"
1806 "mov %%rsi, %c[rsi](%[svm]) \n\t"
1807 "mov %%rdi, %c[rdi](%[svm]) \n\t"
1808 "mov %%rbp, %c[rbp](%[svm]) \n\t"
1809 "mov %%r8, %c[r8](%[svm]) \n\t" 1788 "mov %%r8, %c[r8](%[svm]) \n\t"
1810 "mov %%r9, %c[r9](%[svm]) \n\t" 1789 "mov %%r9, %c[r9](%[svm]) \n\t"
1811 "mov %%r10, %c[r10](%[svm]) \n\t" 1790 "mov %%r10, %c[r10](%[svm]) \n\t"
@@ -1814,18 +1793,8 @@ static void svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1814 "mov %%r13, %c[r13](%[svm]) \n\t" 1793 "mov %%r13, %c[r13](%[svm]) \n\t"
1815 "mov %%r14, %c[r14](%[svm]) \n\t" 1794 "mov %%r14, %c[r14](%[svm]) \n\t"
1816 "mov %%r15, %c[r15](%[svm]) \n\t" 1795 "mov %%r15, %c[r15](%[svm]) \n\t"
1817
1818 "pop %%rbp; \n\t"
1819#else
1820 "mov %%ebx, %c[rbx](%[svm]) \n\t"
1821 "mov %%ecx, %c[rcx](%[svm]) \n\t"
1822 "mov %%edx, %c[rdx](%[svm]) \n\t"
1823 "mov %%esi, %c[rsi](%[svm]) \n\t"
1824 "mov %%edi, %c[rdi](%[svm]) \n\t"
1825 "mov %%ebp, %c[rbp](%[svm]) \n\t"
1826
1827 "pop %%ebp; \n\t"
1828#endif 1796#endif
1797 "pop %%"R"bp"
1829 : 1798 :
1830 : [svm]"a"(svm), 1799 : [svm]"a"(svm),
1831 [vmcb]"i"(offsetof(struct vcpu_svm, vmcb_pa)), 1800 [vmcb]"i"(offsetof(struct vcpu_svm, vmcb_pa)),
@@ -1846,11 +1815,9 @@ static void svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1846 [r15]"i"(offsetof(struct vcpu_svm, vcpu.arch.regs[VCPU_REGS_R15])) 1815 [r15]"i"(offsetof(struct vcpu_svm, vcpu.arch.regs[VCPU_REGS_R15]))
1847#endif 1816#endif
1848 : "cc", "memory" 1817 : "cc", "memory"
1818 , R"bx", R"cx", R"dx", R"si", R"di"
1849#ifdef CONFIG_X86_64 1819#ifdef CONFIG_X86_64
1850 , "rbx", "rcx", "rdx", "rsi", "rdi"
1851 , "r8", "r9", "r10", "r11" , "r12", "r13", "r14", "r15" 1820 , "r8", "r9", "r10", "r11" , "r12", "r13", "r14", "r15"
1852#else
1853 , "ebx", "ecx", "edx" , "esi", "edi"
1854#endif 1821#endif
1855 ); 1822 );
1856 1823
@@ -1858,6 +1825,9 @@ static void svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1858 load_db_regs(svm->host_db_regs); 1825 load_db_regs(svm->host_db_regs);
1859 1826
1860 vcpu->arch.cr2 = svm->vmcb->save.cr2; 1827 vcpu->arch.cr2 = svm->vmcb->save.cr2;
1828 vcpu->arch.regs[VCPU_REGS_RAX] = svm->vmcb->save.rax;
1829 vcpu->arch.regs[VCPU_REGS_RSP] = svm->vmcb->save.rsp;
1830 vcpu->arch.regs[VCPU_REGS_RIP] = svm->vmcb->save.rip;
1861 1831
1862 write_dr6(svm->host_dr6); 1832 write_dr6(svm->host_dr6);
1863 write_dr7(svm->host_dr7); 1833 write_dr7(svm->host_dr7);
@@ -1879,6 +1849,8 @@ static void svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1879 svm->next_rip = 0; 1849 svm->next_rip = 0;
1880} 1850}
1881 1851
1852#undef R
1853
1882static void svm_set_cr3(struct kvm_vcpu *vcpu, unsigned long root) 1854static void svm_set_cr3(struct kvm_vcpu *vcpu, unsigned long root)
1883{ 1855{
1884 struct vcpu_svm *svm = to_svm(vcpu); 1856 struct vcpu_svm *svm = to_svm(vcpu);
@@ -1977,8 +1949,6 @@ static struct kvm_x86_ops svm_x86_ops = {
1977 .set_gdt = svm_set_gdt, 1949 .set_gdt = svm_set_gdt,
1978 .get_dr = svm_get_dr, 1950 .get_dr = svm_get_dr,
1979 .set_dr = svm_set_dr, 1951 .set_dr = svm_set_dr,
1980 .cache_regs = svm_cache_regs,
1981 .decache_regs = svm_decache_regs,
1982 .get_rflags = svm_get_rflags, 1952 .get_rflags = svm_get_rflags,
1983 .set_rflags = svm_set_rflags, 1953 .set_rflags = svm_set_rflags,
1984 1954
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 7041cc52b562..2643b430d83a 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -26,6 +26,8 @@
26#include <linux/highmem.h> 26#include <linux/highmem.h>
27#include <linux/sched.h> 27#include <linux/sched.h>
28#include <linux/moduleparam.h> 28#include <linux/moduleparam.h>
29#include "kvm_cache_regs.h"
30#include "x86.h"
29 31
30#include <asm/io.h> 32#include <asm/io.h>
31#include <asm/desc.h> 33#include <asm/desc.h>
@@ -47,6 +49,9 @@ module_param(flexpriority_enabled, bool, 0);
47static int enable_ept = 1; 49static int enable_ept = 1;
48module_param(enable_ept, bool, 0); 50module_param(enable_ept, bool, 0);
49 51
52static int emulate_invalid_guest_state = 0;
53module_param(emulate_invalid_guest_state, bool, 0);
54
50struct vmcs { 55struct vmcs {
51 u32 revision_id; 56 u32 revision_id;
52 u32 abort; 57 u32 abort;
@@ -56,6 +61,7 @@ struct vmcs {
56struct vcpu_vmx { 61struct vcpu_vmx {
57 struct kvm_vcpu vcpu; 62 struct kvm_vcpu vcpu;
58 struct list_head local_vcpus_link; 63 struct list_head local_vcpus_link;
64 unsigned long host_rsp;
59 int launched; 65 int launched;
60 u8 fail; 66 u8 fail;
61 u32 idt_vectoring_info; 67 u32 idt_vectoring_info;
@@ -83,6 +89,7 @@ struct vcpu_vmx {
83 } irq; 89 } irq;
84 } rmode; 90 } rmode;
85 int vpid; 91 int vpid;
92 bool emulation_required;
86}; 93};
87 94
88static inline struct vcpu_vmx *to_vmx(struct kvm_vcpu *vcpu) 95static inline struct vcpu_vmx *to_vmx(struct kvm_vcpu *vcpu)
@@ -468,7 +475,7 @@ static void update_exception_bitmap(struct kvm_vcpu *vcpu)
468 if (!vcpu->fpu_active) 475 if (!vcpu->fpu_active)
469 eb |= 1u << NM_VECTOR; 476 eb |= 1u << NM_VECTOR;
470 if (vcpu->guest_debug.enabled) 477 if (vcpu->guest_debug.enabled)
471 eb |= 1u << 1; 478 eb |= 1u << DB_VECTOR;
472 if (vcpu->arch.rmode.active) 479 if (vcpu->arch.rmode.active)
473 eb = ~0; 480 eb = ~0;
474 if (vm_need_ept()) 481 if (vm_need_ept())
@@ -715,9 +722,9 @@ static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
715 unsigned long rip; 722 unsigned long rip;
716 u32 interruptibility; 723 u32 interruptibility;
717 724
718 rip = vmcs_readl(GUEST_RIP); 725 rip = kvm_rip_read(vcpu);
719 rip += vmcs_read32(VM_EXIT_INSTRUCTION_LEN); 726 rip += vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
720 vmcs_writel(GUEST_RIP, rip); 727 kvm_rip_write(vcpu, rip);
721 728
722 /* 729 /*
723 * We emulated an instruction, so temporary interrupt blocking 730 * We emulated an instruction, so temporary interrupt blocking
@@ -733,19 +740,35 @@ static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
733static void vmx_queue_exception(struct kvm_vcpu *vcpu, unsigned nr, 740static void vmx_queue_exception(struct kvm_vcpu *vcpu, unsigned nr,
734 bool has_error_code, u32 error_code) 741 bool has_error_code, u32 error_code)
735{ 742{
743 struct vcpu_vmx *vmx = to_vmx(vcpu);
744
745 if (has_error_code)
746 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
747
748 if (vcpu->arch.rmode.active) {
749 vmx->rmode.irq.pending = true;
750 vmx->rmode.irq.vector = nr;
751 vmx->rmode.irq.rip = kvm_rip_read(vcpu);
752 if (nr == BP_VECTOR)
753 vmx->rmode.irq.rip++;
754 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
755 nr | INTR_TYPE_SOFT_INTR
756 | (has_error_code ? INTR_INFO_DELIVER_CODE_MASK : 0)
757 | INTR_INFO_VALID_MASK);
758 vmcs_write32(VM_ENTRY_INSTRUCTION_LEN, 1);
759 kvm_rip_write(vcpu, vmx->rmode.irq.rip - 1);
760 return;
761 }
762
736 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 763 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
737 nr | INTR_TYPE_EXCEPTION 764 nr | INTR_TYPE_EXCEPTION
738 | (has_error_code ? INTR_INFO_DELIVER_CODE_MASK : 0) 765 | (has_error_code ? INTR_INFO_DELIVER_CODE_MASK : 0)
739 | INTR_INFO_VALID_MASK); 766 | INTR_INFO_VALID_MASK);
740 if (has_error_code)
741 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
742} 767}
743 768
744static bool vmx_exception_injected(struct kvm_vcpu *vcpu) 769static bool vmx_exception_injected(struct kvm_vcpu *vcpu)
745{ 770{
746 struct vcpu_vmx *vmx = to_vmx(vcpu); 771 return false;
747
748 return !(vmx->idt_vectoring_info & VECTORING_INFO_VALID_MASK);
749} 772}
750 773
751/* 774/*
@@ -947,24 +970,19 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
947 return ret; 970 return ret;
948} 971}
949 972
950/* 973static void vmx_cache_reg(struct kvm_vcpu *vcpu, enum kvm_reg reg)
951 * Sync the rsp and rip registers into the vcpu structure. This allows
952 * registers to be accessed by indexing vcpu->arch.regs.
953 */
954static void vcpu_load_rsp_rip(struct kvm_vcpu *vcpu)
955{
956 vcpu->arch.regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP);
957 vcpu->arch.rip = vmcs_readl(GUEST_RIP);
958}
959
960/*
961 * Syncs rsp and rip back into the vmcs. Should be called after possible
962 * modification.
963 */
964static void vcpu_put_rsp_rip(struct kvm_vcpu *vcpu)
965{ 974{
966 vmcs_writel(GUEST_RSP, vcpu->arch.regs[VCPU_REGS_RSP]); 975 __set_bit(reg, (unsigned long *)&vcpu->arch.regs_avail);
967 vmcs_writel(GUEST_RIP, vcpu->arch.rip); 976 switch (reg) {
977 case VCPU_REGS_RSP:
978 vcpu->arch.regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP);
979 break;
980 case VCPU_REGS_RIP:
981 vcpu->arch.regs[VCPU_REGS_RIP] = vmcs_readl(GUEST_RIP);
982 break;
983 default:
984 break;
985 }
968} 986}
969 987
970static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg) 988static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
@@ -1007,17 +1025,9 @@ static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
1007 1025
1008static int vmx_get_irq(struct kvm_vcpu *vcpu) 1026static int vmx_get_irq(struct kvm_vcpu *vcpu)
1009{ 1027{
1010 struct vcpu_vmx *vmx = to_vmx(vcpu); 1028 if (!vcpu->arch.interrupt.pending)
1011 u32 idtv_info_field; 1029 return -1;
1012 1030 return vcpu->arch.interrupt.nr;
1013 idtv_info_field = vmx->idt_vectoring_info;
1014 if (idtv_info_field & INTR_INFO_VALID_MASK) {
1015 if (is_external_interrupt(idtv_info_field))
1016 return idtv_info_field & VECTORING_INFO_VECTOR_MASK;
1017 else
1018 printk(KERN_DEBUG "pending exception: not handled yet\n");
1019 }
1020 return -1;
1021} 1031}
1022 1032
1023static __init int cpu_has_kvm_support(void) 1033static __init int cpu_has_kvm_support(void)
@@ -1031,9 +1041,9 @@ static __init int vmx_disabled_by_bios(void)
1031 u64 msr; 1041 u64 msr;
1032 1042
1033 rdmsrl(MSR_IA32_FEATURE_CONTROL, msr); 1043 rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);
1034 return (msr & (MSR_IA32_FEATURE_CONTROL_LOCKED | 1044 return (msr & (FEATURE_CONTROL_LOCKED |
1035 MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED)) 1045 FEATURE_CONTROL_VMXON_ENABLED))
1036 == MSR_IA32_FEATURE_CONTROL_LOCKED; 1046 == FEATURE_CONTROL_LOCKED;
1037 /* locked but not enabled */ 1047 /* locked but not enabled */
1038} 1048}
1039 1049
@@ -1045,14 +1055,14 @@ static void hardware_enable(void *garbage)
1045 1055
1046 INIT_LIST_HEAD(&per_cpu(vcpus_on_cpu, cpu)); 1056 INIT_LIST_HEAD(&per_cpu(vcpus_on_cpu, cpu));
1047 rdmsrl(MSR_IA32_FEATURE_CONTROL, old); 1057 rdmsrl(MSR_IA32_FEATURE_CONTROL, old);
1048 if ((old & (MSR_IA32_FEATURE_CONTROL_LOCKED | 1058 if ((old & (FEATURE_CONTROL_LOCKED |
1049 MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED)) 1059 FEATURE_CONTROL_VMXON_ENABLED))
1050 != (MSR_IA32_FEATURE_CONTROL_LOCKED | 1060 != (FEATURE_CONTROL_LOCKED |
1051 MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED)) 1061 FEATURE_CONTROL_VMXON_ENABLED))
1052 /* enable and lock */ 1062 /* enable and lock */
1053 wrmsrl(MSR_IA32_FEATURE_CONTROL, old | 1063 wrmsrl(MSR_IA32_FEATURE_CONTROL, old |
1054 MSR_IA32_FEATURE_CONTROL_LOCKED | 1064 FEATURE_CONTROL_LOCKED |
1055 MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED); 1065 FEATURE_CONTROL_VMXON_ENABLED);
1056 write_cr4(read_cr4() | X86_CR4_VMXE); /* FIXME: not cpu hotplug safe */ 1066 write_cr4(read_cr4() | X86_CR4_VMXE); /* FIXME: not cpu hotplug safe */
1057 asm volatile (ASM_VMX_VMXON_RAX 1067 asm volatile (ASM_VMX_VMXON_RAX
1058 : : "a"(&phys_addr), "m"(phys_addr) 1068 : : "a"(&phys_addr), "m"(phys_addr)
@@ -1120,7 +1130,8 @@ static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf)
1120 CPU_BASED_CR3_STORE_EXITING | 1130 CPU_BASED_CR3_STORE_EXITING |
1121 CPU_BASED_USE_IO_BITMAPS | 1131 CPU_BASED_USE_IO_BITMAPS |
1122 CPU_BASED_MOV_DR_EXITING | 1132 CPU_BASED_MOV_DR_EXITING |
1123 CPU_BASED_USE_TSC_OFFSETING; 1133 CPU_BASED_USE_TSC_OFFSETING |
1134 CPU_BASED_INVLPG_EXITING;
1124 opt = CPU_BASED_TPR_SHADOW | 1135 opt = CPU_BASED_TPR_SHADOW |
1125 CPU_BASED_USE_MSR_BITMAPS | 1136 CPU_BASED_USE_MSR_BITMAPS |
1126 CPU_BASED_ACTIVATE_SECONDARY_CONTROLS; 1137 CPU_BASED_ACTIVATE_SECONDARY_CONTROLS;
@@ -1149,9 +1160,11 @@ static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf)
1149 _cpu_based_exec_control &= ~CPU_BASED_TPR_SHADOW; 1160 _cpu_based_exec_control &= ~CPU_BASED_TPR_SHADOW;
1150#endif 1161#endif
1151 if (_cpu_based_2nd_exec_control & SECONDARY_EXEC_ENABLE_EPT) { 1162 if (_cpu_based_2nd_exec_control & SECONDARY_EXEC_ENABLE_EPT) {
1152 /* CR3 accesses don't need to cause VM Exits when EPT enabled */ 1163 /* CR3 accesses and invlpg don't need to cause VM Exits when EPT
1164 enabled */
1153 min &= ~(CPU_BASED_CR3_LOAD_EXITING | 1165 min &= ~(CPU_BASED_CR3_LOAD_EXITING |
1154 CPU_BASED_CR3_STORE_EXITING); 1166 CPU_BASED_CR3_STORE_EXITING |
1167 CPU_BASED_INVLPG_EXITING);
1155 if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_PROCBASED_CTLS, 1168 if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_PROCBASED_CTLS,
1156 &_cpu_based_exec_control) < 0) 1169 &_cpu_based_exec_control) < 0)
1157 return -EIO; 1170 return -EIO;
@@ -1288,7 +1301,9 @@ static void fix_pmode_dataseg(int seg, struct kvm_save_segment *save)
1288static void enter_pmode(struct kvm_vcpu *vcpu) 1301static void enter_pmode(struct kvm_vcpu *vcpu)
1289{ 1302{
1290 unsigned long flags; 1303 unsigned long flags;
1304 struct vcpu_vmx *vmx = to_vmx(vcpu);
1291 1305
1306 vmx->emulation_required = 1;
1292 vcpu->arch.rmode.active = 0; 1307 vcpu->arch.rmode.active = 0;
1293 1308
1294 vmcs_writel(GUEST_TR_BASE, vcpu->arch.rmode.tr.base); 1309 vmcs_writel(GUEST_TR_BASE, vcpu->arch.rmode.tr.base);
@@ -1305,6 +1320,9 @@ static void enter_pmode(struct kvm_vcpu *vcpu)
1305 1320
1306 update_exception_bitmap(vcpu); 1321 update_exception_bitmap(vcpu);
1307 1322
1323 if (emulate_invalid_guest_state)
1324 return;
1325
1308 fix_pmode_dataseg(VCPU_SREG_ES, &vcpu->arch.rmode.es); 1326 fix_pmode_dataseg(VCPU_SREG_ES, &vcpu->arch.rmode.es);
1309 fix_pmode_dataseg(VCPU_SREG_DS, &vcpu->arch.rmode.ds); 1327 fix_pmode_dataseg(VCPU_SREG_DS, &vcpu->arch.rmode.ds);
1310 fix_pmode_dataseg(VCPU_SREG_GS, &vcpu->arch.rmode.gs); 1328 fix_pmode_dataseg(VCPU_SREG_GS, &vcpu->arch.rmode.gs);
@@ -1345,7 +1363,9 @@ static void fix_rmode_seg(int seg, struct kvm_save_segment *save)
1345static void enter_rmode(struct kvm_vcpu *vcpu) 1363static void enter_rmode(struct kvm_vcpu *vcpu)
1346{ 1364{
1347 unsigned long flags; 1365 unsigned long flags;
1366 struct vcpu_vmx *vmx = to_vmx(vcpu);
1348 1367
1368 vmx->emulation_required = 1;
1349 vcpu->arch.rmode.active = 1; 1369 vcpu->arch.rmode.active = 1;
1350 1370
1351 vcpu->arch.rmode.tr.base = vmcs_readl(GUEST_TR_BASE); 1371 vcpu->arch.rmode.tr.base = vmcs_readl(GUEST_TR_BASE);
@@ -1367,6 +1387,9 @@ static void enter_rmode(struct kvm_vcpu *vcpu)
1367 vmcs_writel(GUEST_CR4, vmcs_readl(GUEST_CR4) | X86_CR4_VME); 1387 vmcs_writel(GUEST_CR4, vmcs_readl(GUEST_CR4) | X86_CR4_VME);
1368 update_exception_bitmap(vcpu); 1388 update_exception_bitmap(vcpu);
1369 1389
1390 if (emulate_invalid_guest_state)
1391 goto continue_rmode;
1392
1370 vmcs_write16(GUEST_SS_SELECTOR, vmcs_readl(GUEST_SS_BASE) >> 4); 1393 vmcs_write16(GUEST_SS_SELECTOR, vmcs_readl(GUEST_SS_BASE) >> 4);
1371 vmcs_write32(GUEST_SS_LIMIT, 0xffff); 1394 vmcs_write32(GUEST_SS_LIMIT, 0xffff);
1372 vmcs_write32(GUEST_SS_AR_BYTES, 0xf3); 1395 vmcs_write32(GUEST_SS_AR_BYTES, 0xf3);
@@ -1382,6 +1405,7 @@ static void enter_rmode(struct kvm_vcpu *vcpu)
1382 fix_rmode_seg(VCPU_SREG_GS, &vcpu->arch.rmode.gs); 1405 fix_rmode_seg(VCPU_SREG_GS, &vcpu->arch.rmode.gs);
1383 fix_rmode_seg(VCPU_SREG_FS, &vcpu->arch.rmode.fs); 1406 fix_rmode_seg(VCPU_SREG_FS, &vcpu->arch.rmode.fs);
1384 1407
1408continue_rmode:
1385 kvm_mmu_reset_context(vcpu); 1409 kvm_mmu_reset_context(vcpu);
1386 init_rmode(vcpu->kvm); 1410 init_rmode(vcpu->kvm);
1387} 1411}
@@ -1715,6 +1739,186 @@ static void vmx_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1715 vmcs_writel(GUEST_GDTR_BASE, dt->base); 1739 vmcs_writel(GUEST_GDTR_BASE, dt->base);
1716} 1740}
1717 1741
1742static bool rmode_segment_valid(struct kvm_vcpu *vcpu, int seg)
1743{
1744 struct kvm_segment var;
1745 u32 ar;
1746
1747 vmx_get_segment(vcpu, &var, seg);
1748 ar = vmx_segment_access_rights(&var);
1749
1750 if (var.base != (var.selector << 4))
1751 return false;
1752 if (var.limit != 0xffff)
1753 return false;
1754 if (ar != 0xf3)
1755 return false;
1756
1757 return true;
1758}
1759
1760static bool code_segment_valid(struct kvm_vcpu *vcpu)
1761{
1762 struct kvm_segment cs;
1763 unsigned int cs_rpl;
1764
1765 vmx_get_segment(vcpu, &cs, VCPU_SREG_CS);
1766 cs_rpl = cs.selector & SELECTOR_RPL_MASK;
1767
1768 if (~cs.type & (AR_TYPE_CODE_MASK|AR_TYPE_ACCESSES_MASK))
1769 return false;
1770 if (!cs.s)
1771 return false;
1772 if (!(~cs.type & (AR_TYPE_CODE_MASK|AR_TYPE_WRITEABLE_MASK))) {
1773 if (cs.dpl > cs_rpl)
1774 return false;
1775 } else if (cs.type & AR_TYPE_CODE_MASK) {
1776 if (cs.dpl != cs_rpl)
1777 return false;
1778 }
1779 if (!cs.present)
1780 return false;
1781
1782 /* TODO: Add Reserved field check, this'll require a new member in the kvm_segment_field structure */
1783 return true;
1784}
1785
1786static bool stack_segment_valid(struct kvm_vcpu *vcpu)
1787{
1788 struct kvm_segment ss;
1789 unsigned int ss_rpl;
1790
1791 vmx_get_segment(vcpu, &ss, VCPU_SREG_SS);
1792 ss_rpl = ss.selector & SELECTOR_RPL_MASK;
1793
1794 if ((ss.type != 3) || (ss.type != 7))
1795 return false;
1796 if (!ss.s)
1797 return false;
1798 if (ss.dpl != ss_rpl) /* DPL != RPL */
1799 return false;
1800 if (!ss.present)
1801 return false;
1802
1803 return true;
1804}
1805
1806static bool data_segment_valid(struct kvm_vcpu *vcpu, int seg)
1807{
1808 struct kvm_segment var;
1809 unsigned int rpl;
1810
1811 vmx_get_segment(vcpu, &var, seg);
1812 rpl = var.selector & SELECTOR_RPL_MASK;
1813
1814 if (!var.s)
1815 return false;
1816 if (!var.present)
1817 return false;
1818 if (~var.type & (AR_TYPE_CODE_MASK|AR_TYPE_WRITEABLE_MASK)) {
1819 if (var.dpl < rpl) /* DPL < RPL */
1820 return false;
1821 }
1822
1823 /* TODO: Add other members to kvm_segment_field to allow checking for other access
1824 * rights flags
1825 */
1826 return true;
1827}
1828
1829static bool tr_valid(struct kvm_vcpu *vcpu)
1830{
1831 struct kvm_segment tr;
1832
1833 vmx_get_segment(vcpu, &tr, VCPU_SREG_TR);
1834
1835 if (tr.selector & SELECTOR_TI_MASK) /* TI = 1 */
1836 return false;
1837 if ((tr.type != 3) || (tr.type != 11)) /* TODO: Check if guest is in IA32e mode */
1838 return false;
1839 if (!tr.present)
1840 return false;
1841
1842 return true;
1843}
1844
1845static bool ldtr_valid(struct kvm_vcpu *vcpu)
1846{
1847 struct kvm_segment ldtr;
1848
1849 vmx_get_segment(vcpu, &ldtr, VCPU_SREG_LDTR);
1850
1851 if (ldtr.selector & SELECTOR_TI_MASK) /* TI = 1 */
1852 return false;
1853 if (ldtr.type != 2)
1854 return false;
1855 if (!ldtr.present)
1856 return false;
1857
1858 return true;
1859}
1860
1861static bool cs_ss_rpl_check(struct kvm_vcpu *vcpu)
1862{
1863 struct kvm_segment cs, ss;
1864
1865 vmx_get_segment(vcpu, &cs, VCPU_SREG_CS);
1866 vmx_get_segment(vcpu, &ss, VCPU_SREG_SS);
1867
1868 return ((cs.selector & SELECTOR_RPL_MASK) ==
1869 (ss.selector & SELECTOR_RPL_MASK));
1870}
1871
1872/*
1873 * Check if guest state is valid. Returns true if valid, false if
1874 * not.
1875 * We assume that registers are always usable
1876 */
1877static bool guest_state_valid(struct kvm_vcpu *vcpu)
1878{
1879 /* real mode guest state checks */
1880 if (!(vcpu->arch.cr0 & X86_CR0_PE)) {
1881 if (!rmode_segment_valid(vcpu, VCPU_SREG_CS))
1882 return false;
1883 if (!rmode_segment_valid(vcpu, VCPU_SREG_SS))
1884 return false;
1885 if (!rmode_segment_valid(vcpu, VCPU_SREG_DS))
1886 return false;
1887 if (!rmode_segment_valid(vcpu, VCPU_SREG_ES))
1888 return false;
1889 if (!rmode_segment_valid(vcpu, VCPU_SREG_FS))
1890 return false;
1891 if (!rmode_segment_valid(vcpu, VCPU_SREG_GS))
1892 return false;
1893 } else {
1894 /* protected mode guest state checks */
1895 if (!cs_ss_rpl_check(vcpu))
1896 return false;
1897 if (!code_segment_valid(vcpu))
1898 return false;
1899 if (!stack_segment_valid(vcpu))
1900 return false;
1901 if (!data_segment_valid(vcpu, VCPU_SREG_DS))
1902 return false;
1903 if (!data_segment_valid(vcpu, VCPU_SREG_ES))
1904 return false;
1905 if (!data_segment_valid(vcpu, VCPU_SREG_FS))
1906 return false;
1907 if (!data_segment_valid(vcpu, VCPU_SREG_GS))
1908 return false;
1909 if (!tr_valid(vcpu))
1910 return false;
1911 if (!ldtr_valid(vcpu))
1912 return false;
1913 }
1914 /* TODO:
1915 * - Add checks on RIP
1916 * - Add checks on RFLAGS
1917 */
1918
1919 return true;
1920}
1921
1718static int init_rmode_tss(struct kvm *kvm) 1922static int init_rmode_tss(struct kvm *kvm)
1719{ 1923{
1720 gfn_t fn = rmode_tss_base(kvm) >> PAGE_SHIFT; 1924 gfn_t fn = rmode_tss_base(kvm) >> PAGE_SHIFT;
@@ -1726,7 +1930,8 @@ static int init_rmode_tss(struct kvm *kvm)
1726 if (r < 0) 1930 if (r < 0)
1727 goto out; 1931 goto out;
1728 data = TSS_BASE_SIZE + TSS_REDIRECTION_SIZE; 1932 data = TSS_BASE_SIZE + TSS_REDIRECTION_SIZE;
1729 r = kvm_write_guest_page(kvm, fn++, &data, 0x66, sizeof(u16)); 1933 r = kvm_write_guest_page(kvm, fn++, &data,
1934 TSS_IOPB_BASE_OFFSET, sizeof(u16));
1730 if (r < 0) 1935 if (r < 0)
1731 goto out; 1936 goto out;
1732 r = kvm_clear_guest_page(kvm, fn++, 0, PAGE_SIZE); 1937 r = kvm_clear_guest_page(kvm, fn++, 0, PAGE_SIZE);
@@ -1789,7 +1994,7 @@ static void seg_setup(int seg)
1789 vmcs_write16(sf->selector, 0); 1994 vmcs_write16(sf->selector, 0);
1790 vmcs_writel(sf->base, 0); 1995 vmcs_writel(sf->base, 0);
1791 vmcs_write32(sf->limit, 0xffff); 1996 vmcs_write32(sf->limit, 0xffff);
1792 vmcs_write32(sf->ar_bytes, 0x93); 1997 vmcs_write32(sf->ar_bytes, 0xf3);
1793} 1998}
1794 1999
1795static int alloc_apic_access_page(struct kvm *kvm) 2000static int alloc_apic_access_page(struct kvm *kvm)
@@ -1808,9 +2013,7 @@ static int alloc_apic_access_page(struct kvm *kvm)
1808 if (r) 2013 if (r)
1809 goto out; 2014 goto out;
1810 2015
1811 down_read(&current->mm->mmap_sem);
1812 kvm->arch.apic_access_page = gfn_to_page(kvm, 0xfee00); 2016 kvm->arch.apic_access_page = gfn_to_page(kvm, 0xfee00);
1813 up_read(&current->mm->mmap_sem);
1814out: 2017out:
1815 up_write(&kvm->slots_lock); 2018 up_write(&kvm->slots_lock);
1816 return r; 2019 return r;
@@ -1832,10 +2035,8 @@ static int alloc_identity_pagetable(struct kvm *kvm)
1832 if (r) 2035 if (r)
1833 goto out; 2036 goto out;
1834 2037
1835 down_read(&current->mm->mmap_sem);
1836 kvm->arch.ept_identity_pagetable = gfn_to_page(kvm, 2038 kvm->arch.ept_identity_pagetable = gfn_to_page(kvm,
1837 VMX_EPT_IDENTITY_PAGETABLE_ADDR >> PAGE_SHIFT); 2039 VMX_EPT_IDENTITY_PAGETABLE_ADDR >> PAGE_SHIFT);
1838 up_read(&current->mm->mmap_sem);
1839out: 2040out:
1840 up_write(&kvm->slots_lock); 2041 up_write(&kvm->slots_lock);
1841 return r; 2042 return r;
@@ -1917,7 +2118,8 @@ static int vmx_vcpu_setup(struct vcpu_vmx *vmx)
1917 } 2118 }
1918 if (!vm_need_ept()) 2119 if (!vm_need_ept())
1919 exec_control |= CPU_BASED_CR3_STORE_EXITING | 2120 exec_control |= CPU_BASED_CR3_STORE_EXITING |
1920 CPU_BASED_CR3_LOAD_EXITING; 2121 CPU_BASED_CR3_LOAD_EXITING |
2122 CPU_BASED_INVLPG_EXITING;
1921 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, exec_control); 2123 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, exec_control);
1922 2124
1923 if (cpu_has_secondary_exec_ctrls()) { 2125 if (cpu_has_secondary_exec_ctrls()) {
@@ -2019,6 +2221,7 @@ static int vmx_vcpu_reset(struct kvm_vcpu *vcpu)
2019 u64 msr; 2221 u64 msr;
2020 int ret; 2222 int ret;
2021 2223
2224 vcpu->arch.regs_avail = ~((1 << VCPU_REGS_RIP) | (1 << VCPU_REGS_RSP));
2022 down_read(&vcpu->kvm->slots_lock); 2225 down_read(&vcpu->kvm->slots_lock);
2023 if (!init_rmode(vmx->vcpu.kvm)) { 2226 if (!init_rmode(vmx->vcpu.kvm)) {
2024 ret = -ENOMEM; 2227 ret = -ENOMEM;
@@ -2036,6 +2239,7 @@ static int vmx_vcpu_reset(struct kvm_vcpu *vcpu)
2036 2239
2037 fx_init(&vmx->vcpu); 2240 fx_init(&vmx->vcpu);
2038 2241
2242 seg_setup(VCPU_SREG_CS);
2039 /* 2243 /*
2040 * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode 2244 * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
2041 * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4. Sigh. 2245 * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4. Sigh.
@@ -2047,8 +2251,6 @@ static int vmx_vcpu_reset(struct kvm_vcpu *vcpu)
2047 vmcs_write16(GUEST_CS_SELECTOR, vmx->vcpu.arch.sipi_vector << 8); 2251 vmcs_write16(GUEST_CS_SELECTOR, vmx->vcpu.arch.sipi_vector << 8);
2048 vmcs_writel(GUEST_CS_BASE, vmx->vcpu.arch.sipi_vector << 12); 2252 vmcs_writel(GUEST_CS_BASE, vmx->vcpu.arch.sipi_vector << 12);
2049 } 2253 }
2050 vmcs_write32(GUEST_CS_LIMIT, 0xffff);
2051 vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
2052 2254
2053 seg_setup(VCPU_SREG_DS); 2255 seg_setup(VCPU_SREG_DS);
2054 seg_setup(VCPU_SREG_ES); 2256 seg_setup(VCPU_SREG_ES);
@@ -2072,10 +2274,10 @@ static int vmx_vcpu_reset(struct kvm_vcpu *vcpu)
2072 2274
2073 vmcs_writel(GUEST_RFLAGS, 0x02); 2275 vmcs_writel(GUEST_RFLAGS, 0x02);
2074 if (vmx->vcpu.vcpu_id == 0) 2276 if (vmx->vcpu.vcpu_id == 0)
2075 vmcs_writel(GUEST_RIP, 0xfff0); 2277 kvm_rip_write(vcpu, 0xfff0);
2076 else 2278 else
2077 vmcs_writel(GUEST_RIP, 0); 2279 kvm_rip_write(vcpu, 0);
2078 vmcs_writel(GUEST_RSP, 0); 2280 kvm_register_write(vcpu, VCPU_REGS_RSP, 0);
2079 2281
2080 /* todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0 */ 2282 /* todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0 */
2081 vmcs_writel(GUEST_DR7, 0x400); 2283 vmcs_writel(GUEST_DR7, 0x400);
@@ -2125,6 +2327,9 @@ static int vmx_vcpu_reset(struct kvm_vcpu *vcpu)
2125 2327
2126 ret = 0; 2328 ret = 0;
2127 2329
2330 /* HACK: Don't enable emulation on guest boot/reset */
2331 vmx->emulation_required = 0;
2332
2128out: 2333out:
2129 up_read(&vcpu->kvm->slots_lock); 2334 up_read(&vcpu->kvm->slots_lock);
2130 return ret; 2335 return ret;
@@ -2136,14 +2341,15 @@ static void vmx_inject_irq(struct kvm_vcpu *vcpu, int irq)
2136 2341
2137 KVMTRACE_1D(INJ_VIRQ, vcpu, (u32)irq, handler); 2342 KVMTRACE_1D(INJ_VIRQ, vcpu, (u32)irq, handler);
2138 2343
2344 ++vcpu->stat.irq_injections;
2139 if (vcpu->arch.rmode.active) { 2345 if (vcpu->arch.rmode.active) {
2140 vmx->rmode.irq.pending = true; 2346 vmx->rmode.irq.pending = true;
2141 vmx->rmode.irq.vector = irq; 2347 vmx->rmode.irq.vector = irq;
2142 vmx->rmode.irq.rip = vmcs_readl(GUEST_RIP); 2348 vmx->rmode.irq.rip = kvm_rip_read(vcpu);
2143 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 2349 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
2144 irq | INTR_TYPE_SOFT_INTR | INTR_INFO_VALID_MASK); 2350 irq | INTR_TYPE_SOFT_INTR | INTR_INFO_VALID_MASK);
2145 vmcs_write32(VM_ENTRY_INSTRUCTION_LEN, 1); 2351 vmcs_write32(VM_ENTRY_INSTRUCTION_LEN, 1);
2146 vmcs_writel(GUEST_RIP, vmx->rmode.irq.rip - 1); 2352 kvm_rip_write(vcpu, vmx->rmode.irq.rip - 1);
2147 return; 2353 return;
2148 } 2354 }
2149 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 2355 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
@@ -2154,7 +2360,6 @@ static void vmx_inject_nmi(struct kvm_vcpu *vcpu)
2154{ 2360{
2155 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 2361 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
2156 INTR_TYPE_NMI_INTR | INTR_INFO_VALID_MASK | NMI_VECTOR); 2362 INTR_TYPE_NMI_INTR | INTR_INFO_VALID_MASK | NMI_VECTOR);
2157 vcpu->arch.nmi_pending = 0;
2158} 2363}
2159 2364
2160static void kvm_do_inject_irq(struct kvm_vcpu *vcpu) 2365static void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
@@ -2166,7 +2371,7 @@ static void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
2166 clear_bit(bit_index, &vcpu->arch.irq_pending[word_index]); 2371 clear_bit(bit_index, &vcpu->arch.irq_pending[word_index]);
2167 if (!vcpu->arch.irq_pending[word_index]) 2372 if (!vcpu->arch.irq_pending[word_index])
2168 clear_bit(word_index, &vcpu->arch.irq_summary); 2373 clear_bit(word_index, &vcpu->arch.irq_summary);
2169 vmx_inject_irq(vcpu, irq); 2374 kvm_queue_interrupt(vcpu, irq);
2170} 2375}
2171 2376
2172 2377
@@ -2180,13 +2385,12 @@ static void do_interrupt_requests(struct kvm_vcpu *vcpu,
2180 (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0); 2385 (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0);
2181 2386
2182 if (vcpu->arch.interrupt_window_open && 2387 if (vcpu->arch.interrupt_window_open &&
2183 vcpu->arch.irq_summary && 2388 vcpu->arch.irq_summary && !vcpu->arch.interrupt.pending)
2184 !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD) & INTR_INFO_VALID_MASK))
2185 /*
2186 * If interrupts enabled, and not blocked by sti or mov ss. Good.
2187 */
2188 kvm_do_inject_irq(vcpu); 2389 kvm_do_inject_irq(vcpu);
2189 2390
2391 if (vcpu->arch.interrupt_window_open && vcpu->arch.interrupt.pending)
2392 vmx_inject_irq(vcpu, vcpu->arch.interrupt.nr);
2393
2190 cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL); 2394 cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
2191 if (!vcpu->arch.interrupt_window_open && 2395 if (!vcpu->arch.interrupt_window_open &&
2192 (vcpu->arch.irq_summary || kvm_run->request_interrupt_window)) 2396 (vcpu->arch.irq_summary || kvm_run->request_interrupt_window))
@@ -2237,9 +2441,6 @@ static void kvm_guest_debug_pre(struct kvm_vcpu *vcpu)
2237static int handle_rmode_exception(struct kvm_vcpu *vcpu, 2441static int handle_rmode_exception(struct kvm_vcpu *vcpu,
2238 int vec, u32 err_code) 2442 int vec, u32 err_code)
2239{ 2443{
2240 if (!vcpu->arch.rmode.active)
2241 return 0;
2242
2243 /* 2444 /*
2244 * Instruction with address size override prefix opcode 0x67 2445 * Instruction with address size override prefix opcode 0x67
2245 * Cause the #SS fault with 0 error code in VM86 mode. 2446 * Cause the #SS fault with 0 error code in VM86 mode.
@@ -2247,6 +2448,25 @@ static int handle_rmode_exception(struct kvm_vcpu *vcpu,
2247 if (((vec == GP_VECTOR) || (vec == SS_VECTOR)) && err_code == 0) 2448 if (((vec == GP_VECTOR) || (vec == SS_VECTOR)) && err_code == 0)
2248 if (emulate_instruction(vcpu, NULL, 0, 0, 0) == EMULATE_DONE) 2449 if (emulate_instruction(vcpu, NULL, 0, 0, 0) == EMULATE_DONE)
2249 return 1; 2450 return 1;
2451 /*
2452 * Forward all other exceptions that are valid in real mode.
2453 * FIXME: Breaks guest debugging in real mode, needs to be fixed with
2454 * the required debugging infrastructure rework.
2455 */
2456 switch (vec) {
2457 case DE_VECTOR:
2458 case DB_VECTOR:
2459 case BP_VECTOR:
2460 case OF_VECTOR:
2461 case BR_VECTOR:
2462 case UD_VECTOR:
2463 case DF_VECTOR:
2464 case SS_VECTOR:
2465 case GP_VECTOR:
2466 case MF_VECTOR:
2467 kvm_queue_exception(vcpu, vec);
2468 return 1;
2469 }
2250 return 0; 2470 return 0;
2251} 2471}
2252 2472
@@ -2288,7 +2508,7 @@ static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2288 } 2508 }
2289 2509
2290 error_code = 0; 2510 error_code = 0;
2291 rip = vmcs_readl(GUEST_RIP); 2511 rip = kvm_rip_read(vcpu);
2292 if (intr_info & INTR_INFO_DELIVER_CODE_MASK) 2512 if (intr_info & INTR_INFO_DELIVER_CODE_MASK)
2293 error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE); 2513 error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
2294 if (is_page_fault(intr_info)) { 2514 if (is_page_fault(intr_info)) {
@@ -2298,7 +2518,7 @@ static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2298 cr2 = vmcs_readl(EXIT_QUALIFICATION); 2518 cr2 = vmcs_readl(EXIT_QUALIFICATION);
2299 KVMTRACE_3D(PAGE_FAULT, vcpu, error_code, (u32)cr2, 2519 KVMTRACE_3D(PAGE_FAULT, vcpu, error_code, (u32)cr2,
2300 (u32)((u64)cr2 >> 32), handler); 2520 (u32)((u64)cr2 >> 32), handler);
2301 if (vect_info & VECTORING_INFO_VALID_MASK) 2521 if (vcpu->arch.interrupt.pending || vcpu->arch.exception.pending)
2302 kvm_mmu_unprotect_page_virt(vcpu, cr2); 2522 kvm_mmu_unprotect_page_virt(vcpu, cr2);
2303 return kvm_mmu_page_fault(vcpu, cr2, error_code); 2523 return kvm_mmu_page_fault(vcpu, cr2, error_code);
2304 } 2524 }
@@ -2386,27 +2606,25 @@ static int handle_cr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2386 reg = (exit_qualification >> 8) & 15; 2606 reg = (exit_qualification >> 8) & 15;
2387 switch ((exit_qualification >> 4) & 3) { 2607 switch ((exit_qualification >> 4) & 3) {
2388 case 0: /* mov to cr */ 2608 case 0: /* mov to cr */
2389 KVMTRACE_3D(CR_WRITE, vcpu, (u32)cr, (u32)vcpu->arch.regs[reg], 2609 KVMTRACE_3D(CR_WRITE, vcpu, (u32)cr,
2390 (u32)((u64)vcpu->arch.regs[reg] >> 32), handler); 2610 (u32)kvm_register_read(vcpu, reg),
2611 (u32)((u64)kvm_register_read(vcpu, reg) >> 32),
2612 handler);
2391 switch (cr) { 2613 switch (cr) {
2392 case 0: 2614 case 0:
2393 vcpu_load_rsp_rip(vcpu); 2615 kvm_set_cr0(vcpu, kvm_register_read(vcpu, reg));
2394 kvm_set_cr0(vcpu, vcpu->arch.regs[reg]);
2395 skip_emulated_instruction(vcpu); 2616 skip_emulated_instruction(vcpu);
2396 return 1; 2617 return 1;
2397 case 3: 2618 case 3:
2398 vcpu_load_rsp_rip(vcpu); 2619 kvm_set_cr3(vcpu, kvm_register_read(vcpu, reg));
2399 kvm_set_cr3(vcpu, vcpu->arch.regs[reg]);
2400 skip_emulated_instruction(vcpu); 2620 skip_emulated_instruction(vcpu);
2401 return 1; 2621 return 1;
2402 case 4: 2622 case 4:
2403 vcpu_load_rsp_rip(vcpu); 2623 kvm_set_cr4(vcpu, kvm_register_read(vcpu, reg));
2404 kvm_set_cr4(vcpu, vcpu->arch.regs[reg]);
2405 skip_emulated_instruction(vcpu); 2624 skip_emulated_instruction(vcpu);
2406 return 1; 2625 return 1;
2407 case 8: 2626 case 8:
2408 vcpu_load_rsp_rip(vcpu); 2627 kvm_set_cr8(vcpu, kvm_register_read(vcpu, reg));
2409 kvm_set_cr8(vcpu, vcpu->arch.regs[reg]);
2410 skip_emulated_instruction(vcpu); 2628 skip_emulated_instruction(vcpu);
2411 if (irqchip_in_kernel(vcpu->kvm)) 2629 if (irqchip_in_kernel(vcpu->kvm))
2412 return 1; 2630 return 1;
@@ -2415,7 +2633,6 @@ static int handle_cr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2415 }; 2633 };
2416 break; 2634 break;
2417 case 2: /* clts */ 2635 case 2: /* clts */
2418 vcpu_load_rsp_rip(vcpu);
2419 vmx_fpu_deactivate(vcpu); 2636 vmx_fpu_deactivate(vcpu);
2420 vcpu->arch.cr0 &= ~X86_CR0_TS; 2637 vcpu->arch.cr0 &= ~X86_CR0_TS;
2421 vmcs_writel(CR0_READ_SHADOW, vcpu->arch.cr0); 2638 vmcs_writel(CR0_READ_SHADOW, vcpu->arch.cr0);
@@ -2426,21 +2643,17 @@ static int handle_cr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2426 case 1: /*mov from cr*/ 2643 case 1: /*mov from cr*/
2427 switch (cr) { 2644 switch (cr) {
2428 case 3: 2645 case 3:
2429 vcpu_load_rsp_rip(vcpu); 2646 kvm_register_write(vcpu, reg, vcpu->arch.cr3);
2430 vcpu->arch.regs[reg] = vcpu->arch.cr3;
2431 vcpu_put_rsp_rip(vcpu);
2432 KVMTRACE_3D(CR_READ, vcpu, (u32)cr, 2647 KVMTRACE_3D(CR_READ, vcpu, (u32)cr,
2433 (u32)vcpu->arch.regs[reg], 2648 (u32)kvm_register_read(vcpu, reg),
2434 (u32)((u64)vcpu->arch.regs[reg] >> 32), 2649 (u32)((u64)kvm_register_read(vcpu, reg) >> 32),
2435 handler); 2650 handler);
2436 skip_emulated_instruction(vcpu); 2651 skip_emulated_instruction(vcpu);
2437 return 1; 2652 return 1;
2438 case 8: 2653 case 8:
2439 vcpu_load_rsp_rip(vcpu); 2654 kvm_register_write(vcpu, reg, kvm_get_cr8(vcpu));
2440 vcpu->arch.regs[reg] = kvm_get_cr8(vcpu);
2441 vcpu_put_rsp_rip(vcpu);
2442 KVMTRACE_2D(CR_READ, vcpu, (u32)cr, 2655 KVMTRACE_2D(CR_READ, vcpu, (u32)cr,
2443 (u32)vcpu->arch.regs[reg], handler); 2656 (u32)kvm_register_read(vcpu, reg), handler);
2444 skip_emulated_instruction(vcpu); 2657 skip_emulated_instruction(vcpu);
2445 return 1; 2658 return 1;
2446 } 2659 }
@@ -2472,7 +2685,6 @@ static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2472 exit_qualification = vmcs_readl(EXIT_QUALIFICATION); 2685 exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
2473 dr = exit_qualification & 7; 2686 dr = exit_qualification & 7;
2474 reg = (exit_qualification >> 8) & 15; 2687 reg = (exit_qualification >> 8) & 15;
2475 vcpu_load_rsp_rip(vcpu);
2476 if (exit_qualification & 16) { 2688 if (exit_qualification & 16) {
2477 /* mov from dr */ 2689 /* mov from dr */
2478 switch (dr) { 2690 switch (dr) {
@@ -2485,12 +2697,11 @@ static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2485 default: 2697 default:
2486 val = 0; 2698 val = 0;
2487 } 2699 }
2488 vcpu->arch.regs[reg] = val; 2700 kvm_register_write(vcpu, reg, val);
2489 KVMTRACE_2D(DR_READ, vcpu, (u32)dr, (u32)val, handler); 2701 KVMTRACE_2D(DR_READ, vcpu, (u32)dr, (u32)val, handler);
2490 } else { 2702 } else {
2491 /* mov to dr */ 2703 /* mov to dr */
2492 } 2704 }
2493 vcpu_put_rsp_rip(vcpu);
2494 skip_emulated_instruction(vcpu); 2705 skip_emulated_instruction(vcpu);
2495 return 1; 2706 return 1;
2496} 2707}
@@ -2583,6 +2794,15 @@ static int handle_vmcall(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2583 return 1; 2794 return 1;
2584} 2795}
2585 2796
2797static int handle_invlpg(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2798{
2799 u64 exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
2800
2801 kvm_mmu_invlpg(vcpu, exit_qualification);
2802 skip_emulated_instruction(vcpu);
2803 return 1;
2804}
2805
2586static int handle_wbinvd(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run) 2806static int handle_wbinvd(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2587{ 2807{
2588 skip_emulated_instruction(vcpu); 2808 skip_emulated_instruction(vcpu);
@@ -2695,6 +2915,43 @@ static int handle_nmi_window(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2695 return 1; 2915 return 1;
2696} 2916}
2697 2917
2918static void handle_invalid_guest_state(struct kvm_vcpu *vcpu,
2919 struct kvm_run *kvm_run)
2920{
2921 struct vcpu_vmx *vmx = to_vmx(vcpu);
2922 int err;
2923
2924 preempt_enable();
2925 local_irq_enable();
2926
2927 while (!guest_state_valid(vcpu)) {
2928 err = emulate_instruction(vcpu, kvm_run, 0, 0, 0);
2929
2930 switch (err) {
2931 case EMULATE_DONE:
2932 break;
2933 case EMULATE_DO_MMIO:
2934 kvm_report_emulation_failure(vcpu, "mmio");
2935 /* TODO: Handle MMIO */
2936 return;
2937 default:
2938 kvm_report_emulation_failure(vcpu, "emulation failure");
2939 return;
2940 }
2941
2942 if (signal_pending(current))
2943 break;
2944 if (need_resched())
2945 schedule();
2946 }
2947
2948 local_irq_disable();
2949 preempt_disable();
2950
2951 /* Guest state should be valid now, no more emulation should be needed */
2952 vmx->emulation_required = 0;
2953}
2954
2698/* 2955/*
2699 * The exit handlers return 1 if the exit was handled fully and guest execution 2956 * The exit handlers return 1 if the exit was handled fully and guest execution
2700 * may resume. Otherwise they set the kvm_run parameter to indicate what needs 2957 * may resume. Otherwise they set the kvm_run parameter to indicate what needs
@@ -2714,6 +2971,7 @@ static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu,
2714 [EXIT_REASON_MSR_WRITE] = handle_wrmsr, 2971 [EXIT_REASON_MSR_WRITE] = handle_wrmsr,
2715 [EXIT_REASON_PENDING_INTERRUPT] = handle_interrupt_window, 2972 [EXIT_REASON_PENDING_INTERRUPT] = handle_interrupt_window,
2716 [EXIT_REASON_HLT] = handle_halt, 2973 [EXIT_REASON_HLT] = handle_halt,
2974 [EXIT_REASON_INVLPG] = handle_invlpg,
2717 [EXIT_REASON_VMCALL] = handle_vmcall, 2975 [EXIT_REASON_VMCALL] = handle_vmcall,
2718 [EXIT_REASON_TPR_BELOW_THRESHOLD] = handle_tpr_below_threshold, 2976 [EXIT_REASON_TPR_BELOW_THRESHOLD] = handle_tpr_below_threshold,
2719 [EXIT_REASON_APIC_ACCESS] = handle_apic_access, 2977 [EXIT_REASON_APIC_ACCESS] = handle_apic_access,
@@ -2735,8 +2993,8 @@ static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
2735 struct vcpu_vmx *vmx = to_vmx(vcpu); 2993 struct vcpu_vmx *vmx = to_vmx(vcpu);
2736 u32 vectoring_info = vmx->idt_vectoring_info; 2994 u32 vectoring_info = vmx->idt_vectoring_info;
2737 2995
2738 KVMTRACE_3D(VMEXIT, vcpu, exit_reason, (u32)vmcs_readl(GUEST_RIP), 2996 KVMTRACE_3D(VMEXIT, vcpu, exit_reason, (u32)kvm_rip_read(vcpu),
2739 (u32)((u64)vmcs_readl(GUEST_RIP) >> 32), entryexit); 2997 (u32)((u64)kvm_rip_read(vcpu) >> 32), entryexit);
2740 2998
2741 /* Access CR3 don't cause VMExit in paging mode, so we need 2999 /* Access CR3 don't cause VMExit in paging mode, so we need
2742 * to sync with guest real CR3. */ 3000 * to sync with guest real CR3. */
@@ -2829,88 +3087,92 @@ static void enable_intr_window(struct kvm_vcpu *vcpu)
2829 enable_irq_window(vcpu); 3087 enable_irq_window(vcpu);
2830} 3088}
2831 3089
2832static void vmx_intr_assist(struct kvm_vcpu *vcpu) 3090static void vmx_complete_interrupts(struct vcpu_vmx *vmx)
2833{ 3091{
2834 struct vcpu_vmx *vmx = to_vmx(vcpu); 3092 u32 exit_intr_info;
2835 u32 idtv_info_field, intr_info_field, exit_intr_info_field; 3093 u32 idt_vectoring_info;
2836 int vector; 3094 bool unblock_nmi;
3095 u8 vector;
3096 int type;
3097 bool idtv_info_valid;
3098 u32 error;
2837 3099
2838 update_tpr_threshold(vcpu); 3100 exit_intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
2839 3101 if (cpu_has_virtual_nmis()) {
2840 intr_info_field = vmcs_read32(VM_ENTRY_INTR_INFO_FIELD); 3102 unblock_nmi = (exit_intr_info & INTR_INFO_UNBLOCK_NMI) != 0;
2841 exit_intr_info_field = vmcs_read32(VM_EXIT_INTR_INFO); 3103 vector = exit_intr_info & INTR_INFO_VECTOR_MASK;
2842 idtv_info_field = vmx->idt_vectoring_info; 3104 /*
2843 if (intr_info_field & INTR_INFO_VALID_MASK) { 3105 * SDM 3: 25.7.1.2
2844 if (idtv_info_field & INTR_INFO_VALID_MASK) { 3106 * Re-set bit "block by NMI" before VM entry if vmexit caused by
2845 /* TODO: fault when IDT_Vectoring */ 3107 * a guest IRET fault.
2846 if (printk_ratelimit()) 3108 */
2847 printk(KERN_ERR "Fault when IDT_Vectoring\n"); 3109 if (unblock_nmi && vector != DF_VECTOR)
2848 } 3110 vmcs_set_bits(GUEST_INTERRUPTIBILITY_INFO,
2849 enable_intr_window(vcpu); 3111 GUEST_INTR_STATE_NMI);
2850 return;
2851 } 3112 }
2852 if (unlikely(idtv_info_field & INTR_INFO_VALID_MASK)) {
2853 if ((idtv_info_field & VECTORING_INFO_TYPE_MASK)
2854 == INTR_TYPE_EXT_INTR
2855 && vcpu->arch.rmode.active) {
2856 u8 vect = idtv_info_field & VECTORING_INFO_VECTOR_MASK;
2857
2858 vmx_inject_irq(vcpu, vect);
2859 enable_intr_window(vcpu);
2860 return;
2861 }
2862
2863 KVMTRACE_1D(REDELIVER_EVT, vcpu, idtv_info_field, handler);
2864 3113
3114 idt_vectoring_info = vmx->idt_vectoring_info;
3115 idtv_info_valid = idt_vectoring_info & VECTORING_INFO_VALID_MASK;
3116 vector = idt_vectoring_info & VECTORING_INFO_VECTOR_MASK;
3117 type = idt_vectoring_info & VECTORING_INFO_TYPE_MASK;
3118 if (vmx->vcpu.arch.nmi_injected) {
2865 /* 3119 /*
2866 * SDM 3: 25.7.1.2 3120 * SDM 3: 25.7.1.2
2867 * Clear bit "block by NMI" before VM entry if a NMI delivery 3121 * Clear bit "block by NMI" before VM entry if a NMI delivery
2868 * faulted. 3122 * faulted.
2869 */ 3123 */
2870 if ((idtv_info_field & VECTORING_INFO_TYPE_MASK) 3124 if (idtv_info_valid && type == INTR_TYPE_NMI_INTR)
2871 == INTR_TYPE_NMI_INTR && cpu_has_virtual_nmis()) 3125 vmcs_clear_bits(GUEST_INTERRUPTIBILITY_INFO,
2872 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 3126 GUEST_INTR_STATE_NMI);
2873 vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3127 else
2874 ~GUEST_INTR_STATE_NMI); 3128 vmx->vcpu.arch.nmi_injected = false;
2875 3129 }
2876 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, idtv_info_field 3130 kvm_clear_exception_queue(&vmx->vcpu);
2877 & ~INTR_INFO_RESVD_BITS_MASK); 3131 if (idtv_info_valid && type == INTR_TYPE_EXCEPTION) {
2878 vmcs_write32(VM_ENTRY_INSTRUCTION_LEN, 3132 if (idt_vectoring_info & VECTORING_INFO_DELIVER_CODE_MASK) {
2879 vmcs_read32(VM_EXIT_INSTRUCTION_LEN)); 3133 error = vmcs_read32(IDT_VECTORING_ERROR_CODE);
2880 3134 kvm_queue_exception_e(&vmx->vcpu, vector, error);
2881 if (unlikely(idtv_info_field & INTR_INFO_DELIVER_CODE_MASK)) 3135 } else
2882 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, 3136 kvm_queue_exception(&vmx->vcpu, vector);
2883 vmcs_read32(IDT_VECTORING_ERROR_CODE)); 3137 vmx->idt_vectoring_info = 0;
2884 enable_intr_window(vcpu);
2885 return;
2886 } 3138 }
3139 kvm_clear_interrupt_queue(&vmx->vcpu);
3140 if (idtv_info_valid && type == INTR_TYPE_EXT_INTR) {
3141 kvm_queue_interrupt(&vmx->vcpu, vector);
3142 vmx->idt_vectoring_info = 0;
3143 }
3144}
3145
3146static void vmx_intr_assist(struct kvm_vcpu *vcpu)
3147{
3148 update_tpr_threshold(vcpu);
3149
2887 if (cpu_has_virtual_nmis()) { 3150 if (cpu_has_virtual_nmis()) {
2888 /* 3151 if (vcpu->arch.nmi_pending && !vcpu->arch.nmi_injected) {
2889 * SDM 3: 25.7.1.2 3152 if (vmx_nmi_enabled(vcpu)) {
2890 * Re-set bit "block by NMI" before VM entry if vmexit caused by 3153 vcpu->arch.nmi_pending = false;
2891 * a guest IRET fault. 3154 vcpu->arch.nmi_injected = true;
2892 */ 3155 } else {
2893 if ((exit_intr_info_field & INTR_INFO_UNBLOCK_NMI) && 3156 enable_intr_window(vcpu);
2894 (exit_intr_info_field & INTR_INFO_VECTOR_MASK) != 8) 3157 return;
2895 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 3158 }
2896 vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) | 3159 }
2897 GUEST_INTR_STATE_NMI); 3160 if (vcpu->arch.nmi_injected) {
2898 else if (vcpu->arch.nmi_pending) { 3161 vmx_inject_nmi(vcpu);
2899 if (vmx_nmi_enabled(vcpu))
2900 vmx_inject_nmi(vcpu);
2901 enable_intr_window(vcpu); 3162 enable_intr_window(vcpu);
2902 return; 3163 return;
2903 } 3164 }
2904
2905 } 3165 }
2906 if (!kvm_cpu_has_interrupt(vcpu)) 3166 if (!vcpu->arch.interrupt.pending && kvm_cpu_has_interrupt(vcpu)) {
2907 return; 3167 if (vmx_irq_enabled(vcpu))
2908 if (vmx_irq_enabled(vcpu)) { 3168 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu));
2909 vector = kvm_cpu_get_interrupt(vcpu); 3169 else
2910 vmx_inject_irq(vcpu, vector); 3170 enable_irq_window(vcpu);
2911 kvm_timer_intr_post(vcpu, vector); 3171 }
2912 } else 3172 if (vcpu->arch.interrupt.pending) {
2913 enable_irq_window(vcpu); 3173 vmx_inject_irq(vcpu, vcpu->arch.interrupt.nr);
3174 kvm_timer_intr_post(vcpu, vcpu->arch.interrupt.nr);
3175 }
2914} 3176}
2915 3177
2916/* 3178/*
@@ -2922,9 +3184,9 @@ static void vmx_intr_assist(struct kvm_vcpu *vcpu)
2922static void fixup_rmode_irq(struct vcpu_vmx *vmx) 3184static void fixup_rmode_irq(struct vcpu_vmx *vmx)
2923{ 3185{
2924 vmx->rmode.irq.pending = 0; 3186 vmx->rmode.irq.pending = 0;
2925 if (vmcs_readl(GUEST_RIP) + 1 != vmx->rmode.irq.rip) 3187 if (kvm_rip_read(&vmx->vcpu) + 1 != vmx->rmode.irq.rip)
2926 return; 3188 return;
2927 vmcs_writel(GUEST_RIP, vmx->rmode.irq.rip); 3189 kvm_rip_write(&vmx->vcpu, vmx->rmode.irq.rip);
2928 if (vmx->idt_vectoring_info & VECTORING_INFO_VALID_MASK) { 3190 if (vmx->idt_vectoring_info & VECTORING_INFO_VALID_MASK) {
2929 vmx->idt_vectoring_info &= ~VECTORING_INFO_TYPE_MASK; 3191 vmx->idt_vectoring_info &= ~VECTORING_INFO_TYPE_MASK;
2930 vmx->idt_vectoring_info |= INTR_TYPE_EXT_INTR; 3192 vmx->idt_vectoring_info |= INTR_TYPE_EXT_INTR;
@@ -2936,11 +3198,30 @@ static void fixup_rmode_irq(struct vcpu_vmx *vmx)
2936 | vmx->rmode.irq.vector; 3198 | vmx->rmode.irq.vector;
2937} 3199}
2938 3200
3201#ifdef CONFIG_X86_64
3202#define R "r"
3203#define Q "q"
3204#else
3205#define R "e"
3206#define Q "l"
3207#endif
3208
2939static void vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run) 3209static void vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2940{ 3210{
2941 struct vcpu_vmx *vmx = to_vmx(vcpu); 3211 struct vcpu_vmx *vmx = to_vmx(vcpu);
2942 u32 intr_info; 3212 u32 intr_info;
2943 3213
3214 /* Handle invalid guest state instead of entering VMX */
3215 if (vmx->emulation_required && emulate_invalid_guest_state) {
3216 handle_invalid_guest_state(vcpu, kvm_run);
3217 return;
3218 }
3219
3220 if (test_bit(VCPU_REGS_RSP, (unsigned long *)&vcpu->arch.regs_dirty))
3221 vmcs_writel(GUEST_RSP, vcpu->arch.regs[VCPU_REGS_RSP]);
3222 if (test_bit(VCPU_REGS_RIP, (unsigned long *)&vcpu->arch.regs_dirty))
3223 vmcs_writel(GUEST_RIP, vcpu->arch.regs[VCPU_REGS_RIP]);
3224
2944 /* 3225 /*
2945 * Loading guest fpu may have cleared host cr0.ts 3226 * Loading guest fpu may have cleared host cr0.ts
2946 */ 3227 */
@@ -2948,26 +3229,25 @@ static void vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2948 3229
2949 asm( 3230 asm(
2950 /* Store host registers */ 3231 /* Store host registers */
2951#ifdef CONFIG_X86_64 3232 "push %%"R"dx; push %%"R"bp;"
2952 "push %%rdx; push %%rbp;" 3233 "push %%"R"cx \n\t"
2953 "push %%rcx \n\t" 3234 "cmp %%"R"sp, %c[host_rsp](%0) \n\t"
2954#else 3235 "je 1f \n\t"
2955 "push %%edx; push %%ebp;" 3236 "mov %%"R"sp, %c[host_rsp](%0) \n\t"
2956 "push %%ecx \n\t"
2957#endif
2958 __ex(ASM_VMX_VMWRITE_RSP_RDX) "\n\t" 3237 __ex(ASM_VMX_VMWRITE_RSP_RDX) "\n\t"
3238 "1: \n\t"
2959 /* Check if vmlaunch of vmresume is needed */ 3239 /* Check if vmlaunch of vmresume is needed */
2960 "cmpl $0, %c[launched](%0) \n\t" 3240 "cmpl $0, %c[launched](%0) \n\t"
2961 /* Load guest registers. Don't clobber flags. */ 3241 /* Load guest registers. Don't clobber flags. */
3242 "mov %c[cr2](%0), %%"R"ax \n\t"
3243 "mov %%"R"ax, %%cr2 \n\t"
3244 "mov %c[rax](%0), %%"R"ax \n\t"
3245 "mov %c[rbx](%0), %%"R"bx \n\t"
3246 "mov %c[rdx](%0), %%"R"dx \n\t"
3247 "mov %c[rsi](%0), %%"R"si \n\t"
3248 "mov %c[rdi](%0), %%"R"di \n\t"
3249 "mov %c[rbp](%0), %%"R"bp \n\t"
2962#ifdef CONFIG_X86_64 3250#ifdef CONFIG_X86_64
2963 "mov %c[cr2](%0), %%rax \n\t"
2964 "mov %%rax, %%cr2 \n\t"
2965 "mov %c[rax](%0), %%rax \n\t"
2966 "mov %c[rbx](%0), %%rbx \n\t"
2967 "mov %c[rdx](%0), %%rdx \n\t"
2968 "mov %c[rsi](%0), %%rsi \n\t"
2969 "mov %c[rdi](%0), %%rdi \n\t"
2970 "mov %c[rbp](%0), %%rbp \n\t"
2971 "mov %c[r8](%0), %%r8 \n\t" 3251 "mov %c[r8](%0), %%r8 \n\t"
2972 "mov %c[r9](%0), %%r9 \n\t" 3252 "mov %c[r9](%0), %%r9 \n\t"
2973 "mov %c[r10](%0), %%r10 \n\t" 3253 "mov %c[r10](%0), %%r10 \n\t"
@@ -2976,18 +3256,9 @@ static void vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2976 "mov %c[r13](%0), %%r13 \n\t" 3256 "mov %c[r13](%0), %%r13 \n\t"
2977 "mov %c[r14](%0), %%r14 \n\t" 3257 "mov %c[r14](%0), %%r14 \n\t"
2978 "mov %c[r15](%0), %%r15 \n\t" 3258 "mov %c[r15](%0), %%r15 \n\t"
2979 "mov %c[rcx](%0), %%rcx \n\t" /* kills %0 (rcx) */
2980#else
2981 "mov %c[cr2](%0), %%eax \n\t"
2982 "mov %%eax, %%cr2 \n\t"
2983 "mov %c[rax](%0), %%eax \n\t"
2984 "mov %c[rbx](%0), %%ebx \n\t"
2985 "mov %c[rdx](%0), %%edx \n\t"
2986 "mov %c[rsi](%0), %%esi \n\t"
2987 "mov %c[rdi](%0), %%edi \n\t"
2988 "mov %c[rbp](%0), %%ebp \n\t"
2989 "mov %c[rcx](%0), %%ecx \n\t" /* kills %0 (ecx) */
2990#endif 3259#endif
3260 "mov %c[rcx](%0), %%"R"cx \n\t" /* kills %0 (ecx) */
3261
2991 /* Enter guest mode */ 3262 /* Enter guest mode */
2992 "jne .Llaunched \n\t" 3263 "jne .Llaunched \n\t"
2993 __ex(ASM_VMX_VMLAUNCH) "\n\t" 3264 __ex(ASM_VMX_VMLAUNCH) "\n\t"
@@ -2995,15 +3266,15 @@ static void vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2995 ".Llaunched: " __ex(ASM_VMX_VMRESUME) "\n\t" 3266 ".Llaunched: " __ex(ASM_VMX_VMRESUME) "\n\t"
2996 ".Lkvm_vmx_return: " 3267 ".Lkvm_vmx_return: "
2997 /* Save guest registers, load host registers, keep flags */ 3268 /* Save guest registers, load host registers, keep flags */
3269 "xchg %0, (%%"R"sp) \n\t"
3270 "mov %%"R"ax, %c[rax](%0) \n\t"
3271 "mov %%"R"bx, %c[rbx](%0) \n\t"
3272 "push"Q" (%%"R"sp); pop"Q" %c[rcx](%0) \n\t"
3273 "mov %%"R"dx, %c[rdx](%0) \n\t"
3274 "mov %%"R"si, %c[rsi](%0) \n\t"
3275 "mov %%"R"di, %c[rdi](%0) \n\t"
3276 "mov %%"R"bp, %c[rbp](%0) \n\t"
2998#ifdef CONFIG_X86_64 3277#ifdef CONFIG_X86_64
2999 "xchg %0, (%%rsp) \n\t"
3000 "mov %%rax, %c[rax](%0) \n\t"
3001 "mov %%rbx, %c[rbx](%0) \n\t"
3002 "pushq (%%rsp); popq %c[rcx](%0) \n\t"
3003 "mov %%rdx, %c[rdx](%0) \n\t"
3004 "mov %%rsi, %c[rsi](%0) \n\t"
3005 "mov %%rdi, %c[rdi](%0) \n\t"
3006 "mov %%rbp, %c[rbp](%0) \n\t"
3007 "mov %%r8, %c[r8](%0) \n\t" 3278 "mov %%r8, %c[r8](%0) \n\t"
3008 "mov %%r9, %c[r9](%0) \n\t" 3279 "mov %%r9, %c[r9](%0) \n\t"
3009 "mov %%r10, %c[r10](%0) \n\t" 3280 "mov %%r10, %c[r10](%0) \n\t"
@@ -3012,28 +3283,16 @@ static void vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3012 "mov %%r13, %c[r13](%0) \n\t" 3283 "mov %%r13, %c[r13](%0) \n\t"
3013 "mov %%r14, %c[r14](%0) \n\t" 3284 "mov %%r14, %c[r14](%0) \n\t"
3014 "mov %%r15, %c[r15](%0) \n\t" 3285 "mov %%r15, %c[r15](%0) \n\t"
3015 "mov %%cr2, %%rax \n\t"
3016 "mov %%rax, %c[cr2](%0) \n\t"
3017
3018 "pop %%rbp; pop %%rbp; pop %%rdx \n\t"
3019#else
3020 "xchg %0, (%%esp) \n\t"
3021 "mov %%eax, %c[rax](%0) \n\t"
3022 "mov %%ebx, %c[rbx](%0) \n\t"
3023 "pushl (%%esp); popl %c[rcx](%0) \n\t"
3024 "mov %%edx, %c[rdx](%0) \n\t"
3025 "mov %%esi, %c[rsi](%0) \n\t"
3026 "mov %%edi, %c[rdi](%0) \n\t"
3027 "mov %%ebp, %c[rbp](%0) \n\t"
3028 "mov %%cr2, %%eax \n\t"
3029 "mov %%eax, %c[cr2](%0) \n\t"
3030
3031 "pop %%ebp; pop %%ebp; pop %%edx \n\t"
3032#endif 3286#endif
3287 "mov %%cr2, %%"R"ax \n\t"
3288 "mov %%"R"ax, %c[cr2](%0) \n\t"
3289
3290 "pop %%"R"bp; pop %%"R"bp; pop %%"R"dx \n\t"
3033 "setbe %c[fail](%0) \n\t" 3291 "setbe %c[fail](%0) \n\t"
3034 : : "c"(vmx), "d"((unsigned long)HOST_RSP), 3292 : : "c"(vmx), "d"((unsigned long)HOST_RSP),
3035 [launched]"i"(offsetof(struct vcpu_vmx, launched)), 3293 [launched]"i"(offsetof(struct vcpu_vmx, launched)),
3036 [fail]"i"(offsetof(struct vcpu_vmx, fail)), 3294 [fail]"i"(offsetof(struct vcpu_vmx, fail)),
3295 [host_rsp]"i"(offsetof(struct vcpu_vmx, host_rsp)),
3037 [rax]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RAX])), 3296 [rax]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RAX])),
3038 [rbx]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RBX])), 3297 [rbx]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RBX])),
3039 [rcx]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RCX])), 3298 [rcx]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RCX])),
@@ -3053,14 +3312,15 @@ static void vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3053#endif 3312#endif
3054 [cr2]"i"(offsetof(struct vcpu_vmx, vcpu.arch.cr2)) 3313 [cr2]"i"(offsetof(struct vcpu_vmx, vcpu.arch.cr2))
3055 : "cc", "memory" 3314 : "cc", "memory"
3315 , R"bx", R"di", R"si"
3056#ifdef CONFIG_X86_64 3316#ifdef CONFIG_X86_64
3057 , "rbx", "rdi", "rsi"
3058 , "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 3317 , "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
3059#else
3060 , "ebx", "edi", "rsi"
3061#endif 3318#endif
3062 ); 3319 );
3063 3320
3321 vcpu->arch.regs_avail = ~((1 << VCPU_REGS_RIP) | (1 << VCPU_REGS_RSP));
3322 vcpu->arch.regs_dirty = 0;
3323
3064 vmx->idt_vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD); 3324 vmx->idt_vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
3065 if (vmx->rmode.irq.pending) 3325 if (vmx->rmode.irq.pending)
3066 fixup_rmode_irq(vmx); 3326 fixup_rmode_irq(vmx);
@@ -3080,8 +3340,13 @@ static void vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3080 KVMTRACE_0D(NMI, vcpu, handler); 3340 KVMTRACE_0D(NMI, vcpu, handler);
3081 asm("int $2"); 3341 asm("int $2");
3082 } 3342 }
3343
3344 vmx_complete_interrupts(vmx);
3083} 3345}
3084 3346
3347#undef R
3348#undef Q
3349
3085static void vmx_free_vmcs(struct kvm_vcpu *vcpu) 3350static void vmx_free_vmcs(struct kvm_vcpu *vcpu)
3086{ 3351{
3087 struct vcpu_vmx *vmx = to_vmx(vcpu); 3352 struct vcpu_vmx *vmx = to_vmx(vcpu);
@@ -3224,8 +3489,7 @@ static struct kvm_x86_ops vmx_x86_ops = {
3224 .set_idt = vmx_set_idt, 3489 .set_idt = vmx_set_idt,
3225 .get_gdt = vmx_get_gdt, 3490 .get_gdt = vmx_get_gdt,
3226 .set_gdt = vmx_set_gdt, 3491 .set_gdt = vmx_set_gdt,
3227 .cache_regs = vcpu_load_rsp_rip, 3492 .cache_reg = vmx_cache_reg,
3228 .decache_regs = vcpu_put_rsp_rip,
3229 .get_rflags = vmx_get_rflags, 3493 .get_rflags = vmx_get_rflags,
3230 .set_rflags = vmx_set_rflags, 3494 .set_rflags = vmx_set_rflags,
3231 3495
diff --git a/arch/x86/kvm/vmx.h b/arch/x86/kvm/vmx.h
index 17e25995b65b..3e010d21fdd7 100644
--- a/arch/x86/kvm/vmx.h
+++ b/arch/x86/kvm/vmx.h
@@ -331,9 +331,6 @@ enum vmcs_field {
331 331
332#define AR_RESERVD_MASK 0xfffe0f00 332#define AR_RESERVD_MASK 0xfffe0f00
333 333
334#define MSR_IA32_FEATURE_CONTROL_LOCKED 0x1
335#define MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED 0x4
336
337#define APIC_ACCESS_PAGE_PRIVATE_MEMSLOT 9 334#define APIC_ACCESS_PAGE_PRIVATE_MEMSLOT 9
338#define IDENTITY_PAGETABLE_PRIVATE_MEMSLOT 10 335#define IDENTITY_PAGETABLE_PRIVATE_MEMSLOT 10
339 336
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 0d682fc6aeb3..4f0677d1eae8 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -4,10 +4,14 @@
4 * derived from drivers/kvm/kvm_main.c 4 * derived from drivers/kvm/kvm_main.c
5 * 5 *
6 * Copyright (C) 2006 Qumranet, Inc. 6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
7 * 9 *
8 * Authors: 10 * Authors:
9 * Avi Kivity <avi@qumranet.com> 11 * Avi Kivity <avi@qumranet.com>
10 * Yaniv Kamay <yaniv@qumranet.com> 12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
11 * 15 *
12 * This work is licensed under the terms of the GNU GPL, version 2. See 16 * This work is licensed under the terms of the GNU GPL, version 2. See
13 * the COPYING file in the top-level directory. 17 * the COPYING file in the top-level directory.
@@ -19,14 +23,18 @@
19#include "mmu.h" 23#include "mmu.h"
20#include "i8254.h" 24#include "i8254.h"
21#include "tss.h" 25#include "tss.h"
26#include "kvm_cache_regs.h"
27#include "x86.h"
22 28
23#include <linux/clocksource.h> 29#include <linux/clocksource.h>
30#include <linux/interrupt.h>
24#include <linux/kvm.h> 31#include <linux/kvm.h>
25#include <linux/fs.h> 32#include <linux/fs.h>
26#include <linux/vmalloc.h> 33#include <linux/vmalloc.h>
27#include <linux/module.h> 34#include <linux/module.h>
28#include <linux/mman.h> 35#include <linux/mman.h>
29#include <linux/highmem.h> 36#include <linux/highmem.h>
37#include <linux/intel-iommu.h>
30 38
31#include <asm/uaccess.h> 39#include <asm/uaccess.h>
32#include <asm/msr.h> 40#include <asm/msr.h>
@@ -61,6 +69,7 @@ static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
61 struct kvm_cpuid_entry2 __user *entries); 69 struct kvm_cpuid_entry2 __user *entries);
62 70
63struct kvm_x86_ops *kvm_x86_ops; 71struct kvm_x86_ops *kvm_x86_ops;
72EXPORT_SYMBOL_GPL(kvm_x86_ops);
64 73
65struct kvm_stats_debugfs_item debugfs_entries[] = { 74struct kvm_stats_debugfs_item debugfs_entries[] = {
66 { "pf_fixed", VCPU_STAT(pf_fixed) }, 75 { "pf_fixed", VCPU_STAT(pf_fixed) },
@@ -83,6 +92,7 @@ struct kvm_stats_debugfs_item debugfs_entries[] = {
83 { "fpu_reload", VCPU_STAT(fpu_reload) }, 92 { "fpu_reload", VCPU_STAT(fpu_reload) },
84 { "insn_emulation", VCPU_STAT(insn_emulation) }, 93 { "insn_emulation", VCPU_STAT(insn_emulation) },
85 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) }, 94 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
95 { "irq_injections", VCPU_STAT(irq_injections) },
86 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) }, 96 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
87 { "mmu_pte_write", VM_STAT(mmu_pte_write) }, 97 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
88 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) }, 98 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
@@ -90,12 +100,12 @@ struct kvm_stats_debugfs_item debugfs_entries[] = {
90 { "mmu_flooded", VM_STAT(mmu_flooded) }, 100 { "mmu_flooded", VM_STAT(mmu_flooded) },
91 { "mmu_recycled", VM_STAT(mmu_recycled) }, 101 { "mmu_recycled", VM_STAT(mmu_recycled) },
92 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) }, 102 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
103 { "mmu_unsync", VM_STAT(mmu_unsync) },
93 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) }, 104 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
94 { "largepages", VM_STAT(lpages) }, 105 { "largepages", VM_STAT(lpages) },
95 { NULL } 106 { NULL }
96}; 107};
97 108
98
99unsigned long segment_base(u16 selector) 109unsigned long segment_base(u16 selector)
100{ 110{
101 struct descriptor_table gdt; 111 struct descriptor_table gdt;
@@ -352,6 +362,7 @@ EXPORT_SYMBOL_GPL(kvm_set_cr4);
352void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3) 362void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
353{ 363{
354 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) { 364 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
365 kvm_mmu_sync_roots(vcpu);
355 kvm_mmu_flush_tlb(vcpu); 366 kvm_mmu_flush_tlb(vcpu);
356 return; 367 return;
357 } 368 }
@@ -564,7 +575,7 @@ static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *
564 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32); 575 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
565 576
566 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n", 577 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
567 __FUNCTION__, tsc_khz, hv_clock->tsc_shift, 578 __func__, tsc_khz, hv_clock->tsc_shift,
568 hv_clock->tsc_to_system_mul); 579 hv_clock->tsc_to_system_mul);
569} 580}
570 581
@@ -662,6 +673,18 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
662 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n", 673 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
663 __func__, data); 674 __func__, data);
664 break; 675 break;
676 case MSR_IA32_DEBUGCTLMSR:
677 if (!data) {
678 /* We support the non-activated case already */
679 break;
680 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
681 /* Values other than LBR and BTF are vendor-specific,
682 thus reserved and should throw a #GP */
683 return 1;
684 }
685 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
686 __func__, data);
687 break;
665 case MSR_IA32_UCODE_REV: 688 case MSR_IA32_UCODE_REV:
666 case MSR_IA32_UCODE_WRITE: 689 case MSR_IA32_UCODE_WRITE:
667 break; 690 break;
@@ -692,10 +715,8 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
692 /* ...but clean it before doing the actual write */ 715 /* ...but clean it before doing the actual write */
693 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1); 716 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
694 717
695 down_read(&current->mm->mmap_sem);
696 vcpu->arch.time_page = 718 vcpu->arch.time_page =
697 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT); 719 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
698 up_read(&current->mm->mmap_sem);
699 720
700 if (is_error_page(vcpu->arch.time_page)) { 721 if (is_error_page(vcpu->arch.time_page)) {
701 kvm_release_page_clean(vcpu->arch.time_page); 722 kvm_release_page_clean(vcpu->arch.time_page);
@@ -752,8 +773,14 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
752 case MSR_IA32_MC0_MISC+8: 773 case MSR_IA32_MC0_MISC+8:
753 case MSR_IA32_MC0_MISC+12: 774 case MSR_IA32_MC0_MISC+12:
754 case MSR_IA32_MC0_MISC+16: 775 case MSR_IA32_MC0_MISC+16:
776 case MSR_IA32_MC0_MISC+20:
755 case MSR_IA32_UCODE_REV: 777 case MSR_IA32_UCODE_REV:
756 case MSR_IA32_EBL_CR_POWERON: 778 case MSR_IA32_EBL_CR_POWERON:
779 case MSR_IA32_DEBUGCTLMSR:
780 case MSR_IA32_LASTBRANCHFROMIP:
781 case MSR_IA32_LASTBRANCHTOIP:
782 case MSR_IA32_LASTINTFROMIP:
783 case MSR_IA32_LASTINTTOIP:
757 data = 0; 784 data = 0;
758 break; 785 break;
759 case MSR_MTRRcap: 786 case MSR_MTRRcap:
@@ -901,6 +928,9 @@ int kvm_dev_ioctl_check_extension(long ext)
901 case KVM_CAP_PV_MMU: 928 case KVM_CAP_PV_MMU:
902 r = !tdp_enabled; 929 r = !tdp_enabled;
903 break; 930 break;
931 case KVM_CAP_IOMMU:
932 r = intel_iommu_found();
933 break;
904 default: 934 default:
905 r = 0; 935 r = 0;
906 break; 936 break;
@@ -1303,28 +1333,33 @@ long kvm_arch_vcpu_ioctl(struct file *filp,
1303 struct kvm_vcpu *vcpu = filp->private_data; 1333 struct kvm_vcpu *vcpu = filp->private_data;
1304 void __user *argp = (void __user *)arg; 1334 void __user *argp = (void __user *)arg;
1305 int r; 1335 int r;
1336 struct kvm_lapic_state *lapic = NULL;
1306 1337
1307 switch (ioctl) { 1338 switch (ioctl) {
1308 case KVM_GET_LAPIC: { 1339 case KVM_GET_LAPIC: {
1309 struct kvm_lapic_state lapic; 1340 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1310 1341
1311 memset(&lapic, 0, sizeof lapic); 1342 r = -ENOMEM;
1312 r = kvm_vcpu_ioctl_get_lapic(vcpu, &lapic); 1343 if (!lapic)
1344 goto out;
1345 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1313 if (r) 1346 if (r)
1314 goto out; 1347 goto out;
1315 r = -EFAULT; 1348 r = -EFAULT;
1316 if (copy_to_user(argp, &lapic, sizeof lapic)) 1349 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1317 goto out; 1350 goto out;
1318 r = 0; 1351 r = 0;
1319 break; 1352 break;
1320 } 1353 }
1321 case KVM_SET_LAPIC: { 1354 case KVM_SET_LAPIC: {
1322 struct kvm_lapic_state lapic; 1355 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1323 1356 r = -ENOMEM;
1357 if (!lapic)
1358 goto out;
1324 r = -EFAULT; 1359 r = -EFAULT;
1325 if (copy_from_user(&lapic, argp, sizeof lapic)) 1360 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1326 goto out; 1361 goto out;
1327 r = kvm_vcpu_ioctl_set_lapic(vcpu, &lapic);; 1362 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1328 if (r) 1363 if (r)
1329 goto out; 1364 goto out;
1330 r = 0; 1365 r = 0;
@@ -1422,6 +1457,8 @@ long kvm_arch_vcpu_ioctl(struct file *filp,
1422 r = -EINVAL; 1457 r = -EINVAL;
1423 } 1458 }
1424out: 1459out:
1460 if (lapic)
1461 kfree(lapic);
1425 return r; 1462 return r;
1426} 1463}
1427 1464
@@ -1630,6 +1667,15 @@ long kvm_arch_vm_ioctl(struct file *filp,
1630 struct kvm *kvm = filp->private_data; 1667 struct kvm *kvm = filp->private_data;
1631 void __user *argp = (void __user *)arg; 1668 void __user *argp = (void __user *)arg;
1632 int r = -EINVAL; 1669 int r = -EINVAL;
1670 /*
1671 * This union makes it completely explicit to gcc-3.x
1672 * that these two variables' stack usage should be
1673 * combined, not added together.
1674 */
1675 union {
1676 struct kvm_pit_state ps;
1677 struct kvm_memory_alias alias;
1678 } u;
1633 1679
1634 switch (ioctl) { 1680 switch (ioctl) {
1635 case KVM_SET_TSS_ADDR: 1681 case KVM_SET_TSS_ADDR:
@@ -1661,17 +1707,14 @@ long kvm_arch_vm_ioctl(struct file *filp,
1661 case KVM_GET_NR_MMU_PAGES: 1707 case KVM_GET_NR_MMU_PAGES:
1662 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm); 1708 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1663 break; 1709 break;
1664 case KVM_SET_MEMORY_ALIAS: { 1710 case KVM_SET_MEMORY_ALIAS:
1665 struct kvm_memory_alias alias;
1666
1667 r = -EFAULT; 1711 r = -EFAULT;
1668 if (copy_from_user(&alias, argp, sizeof alias)) 1712 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
1669 goto out; 1713 goto out;
1670 r = kvm_vm_ioctl_set_memory_alias(kvm, &alias); 1714 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
1671 if (r) 1715 if (r)
1672 goto out; 1716 goto out;
1673 break; 1717 break;
1674 }
1675 case KVM_CREATE_IRQCHIP: 1718 case KVM_CREATE_IRQCHIP:
1676 r = -ENOMEM; 1719 r = -ENOMEM;
1677 kvm->arch.vpic = kvm_create_pic(kvm); 1720 kvm->arch.vpic = kvm_create_pic(kvm);
@@ -1699,13 +1742,7 @@ long kvm_arch_vm_ioctl(struct file *filp,
1699 goto out; 1742 goto out;
1700 if (irqchip_in_kernel(kvm)) { 1743 if (irqchip_in_kernel(kvm)) {
1701 mutex_lock(&kvm->lock); 1744 mutex_lock(&kvm->lock);
1702 if (irq_event.irq < 16) 1745 kvm_set_irq(kvm, irq_event.irq, irq_event.level);
1703 kvm_pic_set_irq(pic_irqchip(kvm),
1704 irq_event.irq,
1705 irq_event.level);
1706 kvm_ioapic_set_irq(kvm->arch.vioapic,
1707 irq_event.irq,
1708 irq_event.level);
1709 mutex_unlock(&kvm->lock); 1746 mutex_unlock(&kvm->lock);
1710 r = 0; 1747 r = 0;
1711 } 1748 }
@@ -1713,65 +1750,77 @@ long kvm_arch_vm_ioctl(struct file *filp,
1713 } 1750 }
1714 case KVM_GET_IRQCHIP: { 1751 case KVM_GET_IRQCHIP: {
1715 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */ 1752 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1716 struct kvm_irqchip chip; 1753 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1717 1754
1718 r = -EFAULT; 1755 r = -ENOMEM;
1719 if (copy_from_user(&chip, argp, sizeof chip)) 1756 if (!chip)
1720 goto out; 1757 goto out;
1758 r = -EFAULT;
1759 if (copy_from_user(chip, argp, sizeof *chip))
1760 goto get_irqchip_out;
1721 r = -ENXIO; 1761 r = -ENXIO;
1722 if (!irqchip_in_kernel(kvm)) 1762 if (!irqchip_in_kernel(kvm))
1723 goto out; 1763 goto get_irqchip_out;
1724 r = kvm_vm_ioctl_get_irqchip(kvm, &chip); 1764 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
1725 if (r) 1765 if (r)
1726 goto out; 1766 goto get_irqchip_out;
1727 r = -EFAULT; 1767 r = -EFAULT;
1728 if (copy_to_user(argp, &chip, sizeof chip)) 1768 if (copy_to_user(argp, chip, sizeof *chip))
1729 goto out; 1769 goto get_irqchip_out;
1730 r = 0; 1770 r = 0;
1771 get_irqchip_out:
1772 kfree(chip);
1773 if (r)
1774 goto out;
1731 break; 1775 break;
1732 } 1776 }
1733 case KVM_SET_IRQCHIP: { 1777 case KVM_SET_IRQCHIP: {
1734 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */ 1778 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1735 struct kvm_irqchip chip; 1779 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1736 1780
1737 r = -EFAULT; 1781 r = -ENOMEM;
1738 if (copy_from_user(&chip, argp, sizeof chip)) 1782 if (!chip)
1739 goto out; 1783 goto out;
1784 r = -EFAULT;
1785 if (copy_from_user(chip, argp, sizeof *chip))
1786 goto set_irqchip_out;
1740 r = -ENXIO; 1787 r = -ENXIO;
1741 if (!irqchip_in_kernel(kvm)) 1788 if (!irqchip_in_kernel(kvm))
1742 goto out; 1789 goto set_irqchip_out;
1743 r = kvm_vm_ioctl_set_irqchip(kvm, &chip); 1790 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
1744 if (r) 1791 if (r)
1745 goto out; 1792 goto set_irqchip_out;
1746 r = 0; 1793 r = 0;
1794 set_irqchip_out:
1795 kfree(chip);
1796 if (r)
1797 goto out;
1747 break; 1798 break;
1748 } 1799 }
1749 case KVM_GET_PIT: { 1800 case KVM_GET_PIT: {
1750 struct kvm_pit_state ps;
1751 r = -EFAULT; 1801 r = -EFAULT;
1752 if (copy_from_user(&ps, argp, sizeof ps)) 1802 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
1753 goto out; 1803 goto out;
1754 r = -ENXIO; 1804 r = -ENXIO;
1755 if (!kvm->arch.vpit) 1805 if (!kvm->arch.vpit)
1756 goto out; 1806 goto out;
1757 r = kvm_vm_ioctl_get_pit(kvm, &ps); 1807 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
1758 if (r) 1808 if (r)
1759 goto out; 1809 goto out;
1760 r = -EFAULT; 1810 r = -EFAULT;
1761 if (copy_to_user(argp, &ps, sizeof ps)) 1811 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
1762 goto out; 1812 goto out;
1763 r = 0; 1813 r = 0;
1764 break; 1814 break;
1765 } 1815 }
1766 case KVM_SET_PIT: { 1816 case KVM_SET_PIT: {
1767 struct kvm_pit_state ps;
1768 r = -EFAULT; 1817 r = -EFAULT;
1769 if (copy_from_user(&ps, argp, sizeof ps)) 1818 if (copy_from_user(&u.ps, argp, sizeof u.ps))
1770 goto out; 1819 goto out;
1771 r = -ENXIO; 1820 r = -ENXIO;
1772 if (!kvm->arch.vpit) 1821 if (!kvm->arch.vpit)
1773 goto out; 1822 goto out;
1774 r = kvm_vm_ioctl_set_pit(kvm, &ps); 1823 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
1775 if (r) 1824 if (r)
1776 goto out; 1825 goto out;
1777 r = 0; 1826 r = 0;
@@ -2018,9 +2067,7 @@ static int emulator_cmpxchg_emulated(unsigned long addr,
2018 2067
2019 val = *(u64 *)new; 2068 val = *(u64 *)new;
2020 2069
2021 down_read(&current->mm->mmap_sem);
2022 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT); 2070 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2023 up_read(&current->mm->mmap_sem);
2024 2071
2025 kaddr = kmap_atomic(page, KM_USER0); 2072 kaddr = kmap_atomic(page, KM_USER0);
2026 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val); 2073 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
@@ -2040,6 +2087,7 @@ static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2040 2087
2041int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address) 2088int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2042{ 2089{
2090 kvm_mmu_invlpg(vcpu, address);
2043 return X86EMUL_CONTINUE; 2091 return X86EMUL_CONTINUE;
2044} 2092}
2045 2093
@@ -2080,7 +2128,7 @@ int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2080void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context) 2128void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2081{ 2129{
2082 u8 opcodes[4]; 2130 u8 opcodes[4];
2083 unsigned long rip = vcpu->arch.rip; 2131 unsigned long rip = kvm_rip_read(vcpu);
2084 unsigned long rip_linear; 2132 unsigned long rip_linear;
2085 2133
2086 if (!printk_ratelimit()) 2134 if (!printk_ratelimit())
@@ -2102,6 +2150,14 @@ static struct x86_emulate_ops emulate_ops = {
2102 .cmpxchg_emulated = emulator_cmpxchg_emulated, 2150 .cmpxchg_emulated = emulator_cmpxchg_emulated,
2103}; 2151};
2104 2152
2153static void cache_all_regs(struct kvm_vcpu *vcpu)
2154{
2155 kvm_register_read(vcpu, VCPU_REGS_RAX);
2156 kvm_register_read(vcpu, VCPU_REGS_RSP);
2157 kvm_register_read(vcpu, VCPU_REGS_RIP);
2158 vcpu->arch.regs_dirty = ~0;
2159}
2160
2105int emulate_instruction(struct kvm_vcpu *vcpu, 2161int emulate_instruction(struct kvm_vcpu *vcpu,
2106 struct kvm_run *run, 2162 struct kvm_run *run,
2107 unsigned long cr2, 2163 unsigned long cr2,
@@ -2111,8 +2167,15 @@ int emulate_instruction(struct kvm_vcpu *vcpu,
2111 int r; 2167 int r;
2112 struct decode_cache *c; 2168 struct decode_cache *c;
2113 2169
2170 kvm_clear_exception_queue(vcpu);
2114 vcpu->arch.mmio_fault_cr2 = cr2; 2171 vcpu->arch.mmio_fault_cr2 = cr2;
2115 kvm_x86_ops->cache_regs(vcpu); 2172 /*
2173 * TODO: fix x86_emulate.c to use guest_read/write_register
2174 * instead of direct ->regs accesses, can save hundred cycles
2175 * on Intel for instructions that don't read/change RSP, for
2176 * for example.
2177 */
2178 cache_all_regs(vcpu);
2116 2179
2117 vcpu->mmio_is_write = 0; 2180 vcpu->mmio_is_write = 0;
2118 vcpu->arch.pio.string = 0; 2181 vcpu->arch.pio.string = 0;
@@ -2172,7 +2235,6 @@ int emulate_instruction(struct kvm_vcpu *vcpu,
2172 return EMULATE_DO_MMIO; 2235 return EMULATE_DO_MMIO;
2173 } 2236 }
2174 2237
2175 kvm_x86_ops->decache_regs(vcpu);
2176 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags); 2238 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2177 2239
2178 if (vcpu->mmio_is_write) { 2240 if (vcpu->mmio_is_write) {
@@ -2225,20 +2287,19 @@ int complete_pio(struct kvm_vcpu *vcpu)
2225 struct kvm_pio_request *io = &vcpu->arch.pio; 2287 struct kvm_pio_request *io = &vcpu->arch.pio;
2226 long delta; 2288 long delta;
2227 int r; 2289 int r;
2228 2290 unsigned long val;
2229 kvm_x86_ops->cache_regs(vcpu);
2230 2291
2231 if (!io->string) { 2292 if (!io->string) {
2232 if (io->in) 2293 if (io->in) {
2233 memcpy(&vcpu->arch.regs[VCPU_REGS_RAX], vcpu->arch.pio_data, 2294 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2234 io->size); 2295 memcpy(&val, vcpu->arch.pio_data, io->size);
2296 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2297 }
2235 } else { 2298 } else {
2236 if (io->in) { 2299 if (io->in) {
2237 r = pio_copy_data(vcpu); 2300 r = pio_copy_data(vcpu);
2238 if (r) { 2301 if (r)
2239 kvm_x86_ops->cache_regs(vcpu);
2240 return r; 2302 return r;
2241 }
2242 } 2303 }
2243 2304
2244 delta = 1; 2305 delta = 1;
@@ -2248,19 +2309,24 @@ int complete_pio(struct kvm_vcpu *vcpu)
2248 * The size of the register should really depend on 2309 * The size of the register should really depend on
2249 * current address size. 2310 * current address size.
2250 */ 2311 */
2251 vcpu->arch.regs[VCPU_REGS_RCX] -= delta; 2312 val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2313 val -= delta;
2314 kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2252 } 2315 }
2253 if (io->down) 2316 if (io->down)
2254 delta = -delta; 2317 delta = -delta;
2255 delta *= io->size; 2318 delta *= io->size;
2256 if (io->in) 2319 if (io->in) {
2257 vcpu->arch.regs[VCPU_REGS_RDI] += delta; 2320 val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2258 else 2321 val += delta;
2259 vcpu->arch.regs[VCPU_REGS_RSI] += delta; 2322 kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2323 } else {
2324 val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2325 val += delta;
2326 kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2327 }
2260 } 2328 }
2261 2329
2262 kvm_x86_ops->decache_regs(vcpu);
2263
2264 io->count -= io->cur_count; 2330 io->count -= io->cur_count;
2265 io->cur_count = 0; 2331 io->cur_count = 0;
2266 2332
@@ -2313,6 +2379,7 @@ int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2313 int size, unsigned port) 2379 int size, unsigned port)
2314{ 2380{
2315 struct kvm_io_device *pio_dev; 2381 struct kvm_io_device *pio_dev;
2382 unsigned long val;
2316 2383
2317 vcpu->run->exit_reason = KVM_EXIT_IO; 2384 vcpu->run->exit_reason = KVM_EXIT_IO;
2318 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT; 2385 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
@@ -2333,8 +2400,8 @@ int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2333 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size, 2400 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2334 handler); 2401 handler);
2335 2402
2336 kvm_x86_ops->cache_regs(vcpu); 2403 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2337 memcpy(vcpu->arch.pio_data, &vcpu->arch.regs[VCPU_REGS_RAX], 4); 2404 memcpy(vcpu->arch.pio_data, &val, 4);
2338 2405
2339 kvm_x86_ops->skip_emulated_instruction(vcpu); 2406 kvm_x86_ops->skip_emulated_instruction(vcpu);
2340 2407
@@ -2492,11 +2559,6 @@ int kvm_emulate_halt(struct kvm_vcpu *vcpu)
2492 KVMTRACE_0D(HLT, vcpu, handler); 2559 KVMTRACE_0D(HLT, vcpu, handler);
2493 if (irqchip_in_kernel(vcpu->kvm)) { 2560 if (irqchip_in_kernel(vcpu->kvm)) {
2494 vcpu->arch.mp_state = KVM_MP_STATE_HALTED; 2561 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
2495 up_read(&vcpu->kvm->slots_lock);
2496 kvm_vcpu_block(vcpu);
2497 down_read(&vcpu->kvm->slots_lock);
2498 if (vcpu->arch.mp_state != KVM_MP_STATE_RUNNABLE)
2499 return -EINTR;
2500 return 1; 2562 return 1;
2501 } else { 2563 } else {
2502 vcpu->run->exit_reason = KVM_EXIT_HLT; 2564 vcpu->run->exit_reason = KVM_EXIT_HLT;
@@ -2519,13 +2581,11 @@ int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
2519 unsigned long nr, a0, a1, a2, a3, ret; 2581 unsigned long nr, a0, a1, a2, a3, ret;
2520 int r = 1; 2582 int r = 1;
2521 2583
2522 kvm_x86_ops->cache_regs(vcpu); 2584 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
2523 2585 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
2524 nr = vcpu->arch.regs[VCPU_REGS_RAX]; 2586 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
2525 a0 = vcpu->arch.regs[VCPU_REGS_RBX]; 2587 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
2526 a1 = vcpu->arch.regs[VCPU_REGS_RCX]; 2588 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
2527 a2 = vcpu->arch.regs[VCPU_REGS_RDX];
2528 a3 = vcpu->arch.regs[VCPU_REGS_RSI];
2529 2589
2530 KVMTRACE_1D(VMMCALL, vcpu, (u32)nr, handler); 2590 KVMTRACE_1D(VMMCALL, vcpu, (u32)nr, handler);
2531 2591
@@ -2548,8 +2608,7 @@ int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
2548 ret = -KVM_ENOSYS; 2608 ret = -KVM_ENOSYS;
2549 break; 2609 break;
2550 } 2610 }
2551 vcpu->arch.regs[VCPU_REGS_RAX] = ret; 2611 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
2552 kvm_x86_ops->decache_regs(vcpu);
2553 ++vcpu->stat.hypercalls; 2612 ++vcpu->stat.hypercalls;
2554 return r; 2613 return r;
2555} 2614}
@@ -2559,6 +2618,7 @@ int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
2559{ 2618{
2560 char instruction[3]; 2619 char instruction[3];
2561 int ret = 0; 2620 int ret = 0;
2621 unsigned long rip = kvm_rip_read(vcpu);
2562 2622
2563 2623
2564 /* 2624 /*
@@ -2568,9 +2628,8 @@ int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
2568 */ 2628 */
2569 kvm_mmu_zap_all(vcpu->kvm); 2629 kvm_mmu_zap_all(vcpu->kvm);
2570 2630
2571 kvm_x86_ops->cache_regs(vcpu);
2572 kvm_x86_ops->patch_hypercall(vcpu, instruction); 2631 kvm_x86_ops->patch_hypercall(vcpu, instruction);
2573 if (emulator_write_emulated(vcpu->arch.rip, instruction, 3, vcpu) 2632 if (emulator_write_emulated(rip, instruction, 3, vcpu)
2574 != X86EMUL_CONTINUE) 2633 != X86EMUL_CONTINUE)
2575 ret = -EFAULT; 2634 ret = -EFAULT;
2576 2635
@@ -2700,13 +2759,12 @@ void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
2700 u32 function, index; 2759 u32 function, index;
2701 struct kvm_cpuid_entry2 *e, *best; 2760 struct kvm_cpuid_entry2 *e, *best;
2702 2761
2703 kvm_x86_ops->cache_regs(vcpu); 2762 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
2704 function = vcpu->arch.regs[VCPU_REGS_RAX]; 2763 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
2705 index = vcpu->arch.regs[VCPU_REGS_RCX]; 2764 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
2706 vcpu->arch.regs[VCPU_REGS_RAX] = 0; 2765 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
2707 vcpu->arch.regs[VCPU_REGS_RBX] = 0; 2766 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
2708 vcpu->arch.regs[VCPU_REGS_RCX] = 0; 2767 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
2709 vcpu->arch.regs[VCPU_REGS_RDX] = 0;
2710 best = NULL; 2768 best = NULL;
2711 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) { 2769 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2712 e = &vcpu->arch.cpuid_entries[i]; 2770 e = &vcpu->arch.cpuid_entries[i];
@@ -2724,18 +2782,17 @@ void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
2724 best = e; 2782 best = e;
2725 } 2783 }
2726 if (best) { 2784 if (best) {
2727 vcpu->arch.regs[VCPU_REGS_RAX] = best->eax; 2785 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
2728 vcpu->arch.regs[VCPU_REGS_RBX] = best->ebx; 2786 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
2729 vcpu->arch.regs[VCPU_REGS_RCX] = best->ecx; 2787 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
2730 vcpu->arch.regs[VCPU_REGS_RDX] = best->edx; 2788 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
2731 } 2789 }
2732 kvm_x86_ops->decache_regs(vcpu);
2733 kvm_x86_ops->skip_emulated_instruction(vcpu); 2790 kvm_x86_ops->skip_emulated_instruction(vcpu);
2734 KVMTRACE_5D(CPUID, vcpu, function, 2791 KVMTRACE_5D(CPUID, vcpu, function,
2735 (u32)vcpu->arch.regs[VCPU_REGS_RAX], 2792 (u32)kvm_register_read(vcpu, VCPU_REGS_RAX),
2736 (u32)vcpu->arch.regs[VCPU_REGS_RBX], 2793 (u32)kvm_register_read(vcpu, VCPU_REGS_RBX),
2737 (u32)vcpu->arch.regs[VCPU_REGS_RCX], 2794 (u32)kvm_register_read(vcpu, VCPU_REGS_RCX),
2738 (u32)vcpu->arch.regs[VCPU_REGS_RDX], handler); 2795 (u32)kvm_register_read(vcpu, VCPU_REGS_RDX), handler);
2739} 2796}
2740EXPORT_SYMBOL_GPL(kvm_emulate_cpuid); 2797EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
2741 2798
@@ -2776,9 +2833,7 @@ static void vapic_enter(struct kvm_vcpu *vcpu)
2776 if (!apic || !apic->vapic_addr) 2833 if (!apic || !apic->vapic_addr)
2777 return; 2834 return;
2778 2835
2779 down_read(&current->mm->mmap_sem);
2780 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT); 2836 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
2781 up_read(&current->mm->mmap_sem);
2782 2837
2783 vcpu->arch.apic->vapic_page = page; 2838 vcpu->arch.apic->vapic_page = page;
2784} 2839}
@@ -2796,28 +2851,10 @@ static void vapic_exit(struct kvm_vcpu *vcpu)
2796 up_read(&vcpu->kvm->slots_lock); 2851 up_read(&vcpu->kvm->slots_lock);
2797} 2852}
2798 2853
2799static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run) 2854static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2800{ 2855{
2801 int r; 2856 int r;
2802 2857
2803 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
2804 pr_debug("vcpu %d received sipi with vector # %x\n",
2805 vcpu->vcpu_id, vcpu->arch.sipi_vector);
2806 kvm_lapic_reset(vcpu);
2807 r = kvm_x86_ops->vcpu_reset(vcpu);
2808 if (r)
2809 return r;
2810 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
2811 }
2812
2813 down_read(&vcpu->kvm->slots_lock);
2814 vapic_enter(vcpu);
2815
2816preempted:
2817 if (vcpu->guest_debug.enabled)
2818 kvm_x86_ops->guest_debug_pre(vcpu);
2819
2820again:
2821 if (vcpu->requests) 2858 if (vcpu->requests)
2822 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests)) 2859 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
2823 kvm_mmu_unload(vcpu); 2860 kvm_mmu_unload(vcpu);
@@ -2829,6 +2866,8 @@ again:
2829 if (vcpu->requests) { 2866 if (vcpu->requests) {
2830 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests)) 2867 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
2831 __kvm_migrate_timers(vcpu); 2868 __kvm_migrate_timers(vcpu);
2869 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
2870 kvm_mmu_sync_roots(vcpu);
2832 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests)) 2871 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
2833 kvm_x86_ops->tlb_flush(vcpu); 2872 kvm_x86_ops->tlb_flush(vcpu);
2834 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS, 2873 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
@@ -2854,21 +2893,15 @@ again:
2854 2893
2855 local_irq_disable(); 2894 local_irq_disable();
2856 2895
2857 if (vcpu->requests || need_resched()) { 2896 if (vcpu->requests || need_resched() || signal_pending(current)) {
2858 local_irq_enable(); 2897 local_irq_enable();
2859 preempt_enable(); 2898 preempt_enable();
2860 r = 1; 2899 r = 1;
2861 goto out; 2900 goto out;
2862 } 2901 }
2863 2902
2864 if (signal_pending(current)) { 2903 if (vcpu->guest_debug.enabled)
2865 local_irq_enable(); 2904 kvm_x86_ops->guest_debug_pre(vcpu);
2866 preempt_enable();
2867 r = -EINTR;
2868 kvm_run->exit_reason = KVM_EXIT_INTR;
2869 ++vcpu->stat.signal_exits;
2870 goto out;
2871 }
2872 2905
2873 vcpu->guest_mode = 1; 2906 vcpu->guest_mode = 1;
2874 /* 2907 /*
@@ -2917,8 +2950,8 @@ again:
2917 * Profile KVM exit RIPs: 2950 * Profile KVM exit RIPs:
2918 */ 2951 */
2919 if (unlikely(prof_on == KVM_PROFILING)) { 2952 if (unlikely(prof_on == KVM_PROFILING)) {
2920 kvm_x86_ops->cache_regs(vcpu); 2953 unsigned long rip = kvm_rip_read(vcpu);
2921 profile_hit(KVM_PROFILING, (void *)vcpu->arch.rip); 2954 profile_hit(KVM_PROFILING, (void *)rip);
2922 } 2955 }
2923 2956
2924 if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu)) 2957 if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
@@ -2927,26 +2960,63 @@ again:
2927 kvm_lapic_sync_from_vapic(vcpu); 2960 kvm_lapic_sync_from_vapic(vcpu);
2928 2961
2929 r = kvm_x86_ops->handle_exit(kvm_run, vcpu); 2962 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
2963out:
2964 return r;
2965}
2930 2966
2931 if (r > 0) { 2967static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2932 if (dm_request_for_irq_injection(vcpu, kvm_run)) { 2968{
2933 r = -EINTR; 2969 int r;
2934 kvm_run->exit_reason = KVM_EXIT_INTR; 2970
2935 ++vcpu->stat.request_irq_exits; 2971 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
2936 goto out; 2972 pr_debug("vcpu %d received sipi with vector # %x\n",
2937 } 2973 vcpu->vcpu_id, vcpu->arch.sipi_vector);
2938 if (!need_resched()) 2974 kvm_lapic_reset(vcpu);
2939 goto again; 2975 r = kvm_x86_ops->vcpu_reset(vcpu);
2976 if (r)
2977 return r;
2978 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
2940 } 2979 }
2941 2980
2942out: 2981 down_read(&vcpu->kvm->slots_lock);
2943 up_read(&vcpu->kvm->slots_lock); 2982 vapic_enter(vcpu);
2944 if (r > 0) { 2983
2945 kvm_resched(vcpu); 2984 r = 1;
2946 down_read(&vcpu->kvm->slots_lock); 2985 while (r > 0) {
2947 goto preempted; 2986 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
2987 r = vcpu_enter_guest(vcpu, kvm_run);
2988 else {
2989 up_read(&vcpu->kvm->slots_lock);
2990 kvm_vcpu_block(vcpu);
2991 down_read(&vcpu->kvm->slots_lock);
2992 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
2993 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED)
2994 vcpu->arch.mp_state =
2995 KVM_MP_STATE_RUNNABLE;
2996 if (vcpu->arch.mp_state != KVM_MP_STATE_RUNNABLE)
2997 r = -EINTR;
2998 }
2999
3000 if (r > 0) {
3001 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3002 r = -EINTR;
3003 kvm_run->exit_reason = KVM_EXIT_INTR;
3004 ++vcpu->stat.request_irq_exits;
3005 }
3006 if (signal_pending(current)) {
3007 r = -EINTR;
3008 kvm_run->exit_reason = KVM_EXIT_INTR;
3009 ++vcpu->stat.signal_exits;
3010 }
3011 if (need_resched()) {
3012 up_read(&vcpu->kvm->slots_lock);
3013 kvm_resched(vcpu);
3014 down_read(&vcpu->kvm->slots_lock);
3015 }
3016 }
2948 } 3017 }
2949 3018
3019 up_read(&vcpu->kvm->slots_lock);
2950 post_kvm_run_save(vcpu, kvm_run); 3020 post_kvm_run_save(vcpu, kvm_run);
2951 3021
2952 vapic_exit(vcpu); 3022 vapic_exit(vcpu);
@@ -2966,6 +3036,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2966 3036
2967 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) { 3037 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
2968 kvm_vcpu_block(vcpu); 3038 kvm_vcpu_block(vcpu);
3039 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
2969 r = -EAGAIN; 3040 r = -EAGAIN;
2970 goto out; 3041 goto out;
2971 } 3042 }
@@ -2999,11 +3070,9 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2999 } 3070 }
3000 } 3071 }
3001#endif 3072#endif
3002 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL) { 3073 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3003 kvm_x86_ops->cache_regs(vcpu); 3074 kvm_register_write(vcpu, VCPU_REGS_RAX,
3004 vcpu->arch.regs[VCPU_REGS_RAX] = kvm_run->hypercall.ret; 3075 kvm_run->hypercall.ret);
3005 kvm_x86_ops->decache_regs(vcpu);
3006 }
3007 3076
3008 r = __vcpu_run(vcpu, kvm_run); 3077 r = __vcpu_run(vcpu, kvm_run);
3009 3078
@@ -3019,28 +3088,26 @@ int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3019{ 3088{
3020 vcpu_load(vcpu); 3089 vcpu_load(vcpu);
3021 3090
3022 kvm_x86_ops->cache_regs(vcpu); 3091 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3023 3092 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3024 regs->rax = vcpu->arch.regs[VCPU_REGS_RAX]; 3093 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3025 regs->rbx = vcpu->arch.regs[VCPU_REGS_RBX]; 3094 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3026 regs->rcx = vcpu->arch.regs[VCPU_REGS_RCX]; 3095 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3027 regs->rdx = vcpu->arch.regs[VCPU_REGS_RDX]; 3096 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3028 regs->rsi = vcpu->arch.regs[VCPU_REGS_RSI]; 3097 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3029 regs->rdi = vcpu->arch.regs[VCPU_REGS_RDI]; 3098 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3030 regs->rsp = vcpu->arch.regs[VCPU_REGS_RSP];
3031 regs->rbp = vcpu->arch.regs[VCPU_REGS_RBP];
3032#ifdef CONFIG_X86_64 3099#ifdef CONFIG_X86_64
3033 regs->r8 = vcpu->arch.regs[VCPU_REGS_R8]; 3100 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3034 regs->r9 = vcpu->arch.regs[VCPU_REGS_R9]; 3101 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3035 regs->r10 = vcpu->arch.regs[VCPU_REGS_R10]; 3102 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3036 regs->r11 = vcpu->arch.regs[VCPU_REGS_R11]; 3103 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3037 regs->r12 = vcpu->arch.regs[VCPU_REGS_R12]; 3104 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3038 regs->r13 = vcpu->arch.regs[VCPU_REGS_R13]; 3105 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3039 regs->r14 = vcpu->arch.regs[VCPU_REGS_R14]; 3106 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3040 regs->r15 = vcpu->arch.regs[VCPU_REGS_R15]; 3107 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3041#endif 3108#endif
3042 3109
3043 regs->rip = vcpu->arch.rip; 3110 regs->rip = kvm_rip_read(vcpu);
3044 regs->rflags = kvm_x86_ops->get_rflags(vcpu); 3111 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3045 3112
3046 /* 3113 /*
@@ -3058,29 +3125,29 @@ int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3058{ 3125{
3059 vcpu_load(vcpu); 3126 vcpu_load(vcpu);
3060 3127
3061 vcpu->arch.regs[VCPU_REGS_RAX] = regs->rax; 3128 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3062 vcpu->arch.regs[VCPU_REGS_RBX] = regs->rbx; 3129 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3063 vcpu->arch.regs[VCPU_REGS_RCX] = regs->rcx; 3130 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3064 vcpu->arch.regs[VCPU_REGS_RDX] = regs->rdx; 3131 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3065 vcpu->arch.regs[VCPU_REGS_RSI] = regs->rsi; 3132 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3066 vcpu->arch.regs[VCPU_REGS_RDI] = regs->rdi; 3133 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3067 vcpu->arch.regs[VCPU_REGS_RSP] = regs->rsp; 3134 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3068 vcpu->arch.regs[VCPU_REGS_RBP] = regs->rbp; 3135 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3069#ifdef CONFIG_X86_64 3136#ifdef CONFIG_X86_64
3070 vcpu->arch.regs[VCPU_REGS_R8] = regs->r8; 3137 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3071 vcpu->arch.regs[VCPU_REGS_R9] = regs->r9; 3138 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3072 vcpu->arch.regs[VCPU_REGS_R10] = regs->r10; 3139 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3073 vcpu->arch.regs[VCPU_REGS_R11] = regs->r11; 3140 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3074 vcpu->arch.regs[VCPU_REGS_R12] = regs->r12; 3141 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3075 vcpu->arch.regs[VCPU_REGS_R13] = regs->r13; 3142 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3076 vcpu->arch.regs[VCPU_REGS_R14] = regs->r14; 3143 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3077 vcpu->arch.regs[VCPU_REGS_R15] = regs->r15; 3144 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3145
3078#endif 3146#endif
3079 3147
3080 vcpu->arch.rip = regs->rip; 3148 kvm_rip_write(vcpu, regs->rip);
3081 kvm_x86_ops->set_rflags(vcpu, regs->rflags); 3149 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3082 3150
3083 kvm_x86_ops->decache_regs(vcpu);
3084 3151
3085 vcpu->arch.exception.pending = false; 3152 vcpu->arch.exception.pending = false;
3086 3153
@@ -3294,11 +3361,33 @@ static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
3294 return 0; 3361 return 0;
3295} 3362}
3296 3363
3364static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
3365{
3366 struct kvm_segment segvar = {
3367 .base = selector << 4,
3368 .limit = 0xffff,
3369 .selector = selector,
3370 .type = 3,
3371 .present = 1,
3372 .dpl = 3,
3373 .db = 0,
3374 .s = 1,
3375 .l = 0,
3376 .g = 0,
3377 .avl = 0,
3378 .unusable = 0,
3379 };
3380 kvm_x86_ops->set_segment(vcpu, &segvar, seg);
3381 return 0;
3382}
3383
3297int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, 3384int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3298 int type_bits, int seg) 3385 int type_bits, int seg)
3299{ 3386{
3300 struct kvm_segment kvm_seg; 3387 struct kvm_segment kvm_seg;
3301 3388
3389 if (!(vcpu->arch.cr0 & X86_CR0_PE))
3390 return kvm_load_realmode_segment(vcpu, selector, seg);
3302 if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg)) 3391 if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
3303 return 1; 3392 return 1;
3304 kvm_seg.type |= type_bits; 3393 kvm_seg.type |= type_bits;
@@ -3316,17 +3405,16 @@ static void save_state_to_tss32(struct kvm_vcpu *vcpu,
3316 struct tss_segment_32 *tss) 3405 struct tss_segment_32 *tss)
3317{ 3406{
3318 tss->cr3 = vcpu->arch.cr3; 3407 tss->cr3 = vcpu->arch.cr3;
3319 tss->eip = vcpu->arch.rip; 3408 tss->eip = kvm_rip_read(vcpu);
3320 tss->eflags = kvm_x86_ops->get_rflags(vcpu); 3409 tss->eflags = kvm_x86_ops->get_rflags(vcpu);
3321 tss->eax = vcpu->arch.regs[VCPU_REGS_RAX]; 3410 tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3322 tss->ecx = vcpu->arch.regs[VCPU_REGS_RCX]; 3411 tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3323 tss->edx = vcpu->arch.regs[VCPU_REGS_RDX]; 3412 tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3324 tss->ebx = vcpu->arch.regs[VCPU_REGS_RBX]; 3413 tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3325 tss->esp = vcpu->arch.regs[VCPU_REGS_RSP]; 3414 tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3326 tss->ebp = vcpu->arch.regs[VCPU_REGS_RBP]; 3415 tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3327 tss->esi = vcpu->arch.regs[VCPU_REGS_RSI]; 3416 tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3328 tss->edi = vcpu->arch.regs[VCPU_REGS_RDI]; 3417 tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3329
3330 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES); 3418 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3331 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS); 3419 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3332 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS); 3420 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
@@ -3342,17 +3430,17 @@ static int load_state_from_tss32(struct kvm_vcpu *vcpu,
3342{ 3430{
3343 kvm_set_cr3(vcpu, tss->cr3); 3431 kvm_set_cr3(vcpu, tss->cr3);
3344 3432
3345 vcpu->arch.rip = tss->eip; 3433 kvm_rip_write(vcpu, tss->eip);
3346 kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2); 3434 kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
3347 3435
3348 vcpu->arch.regs[VCPU_REGS_RAX] = tss->eax; 3436 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
3349 vcpu->arch.regs[VCPU_REGS_RCX] = tss->ecx; 3437 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
3350 vcpu->arch.regs[VCPU_REGS_RDX] = tss->edx; 3438 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
3351 vcpu->arch.regs[VCPU_REGS_RBX] = tss->ebx; 3439 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
3352 vcpu->arch.regs[VCPU_REGS_RSP] = tss->esp; 3440 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
3353 vcpu->arch.regs[VCPU_REGS_RBP] = tss->ebp; 3441 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
3354 vcpu->arch.regs[VCPU_REGS_RSI] = tss->esi; 3442 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
3355 vcpu->arch.regs[VCPU_REGS_RDI] = tss->edi; 3443 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
3356 3444
3357 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR)) 3445 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
3358 return 1; 3446 return 1;
@@ -3380,16 +3468,16 @@ static int load_state_from_tss32(struct kvm_vcpu *vcpu,
3380static void save_state_to_tss16(struct kvm_vcpu *vcpu, 3468static void save_state_to_tss16(struct kvm_vcpu *vcpu,
3381 struct tss_segment_16 *tss) 3469 struct tss_segment_16 *tss)
3382{ 3470{
3383 tss->ip = vcpu->arch.rip; 3471 tss->ip = kvm_rip_read(vcpu);
3384 tss->flag = kvm_x86_ops->get_rflags(vcpu); 3472 tss->flag = kvm_x86_ops->get_rflags(vcpu);
3385 tss->ax = vcpu->arch.regs[VCPU_REGS_RAX]; 3473 tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3386 tss->cx = vcpu->arch.regs[VCPU_REGS_RCX]; 3474 tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3387 tss->dx = vcpu->arch.regs[VCPU_REGS_RDX]; 3475 tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3388 tss->bx = vcpu->arch.regs[VCPU_REGS_RBX]; 3476 tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3389 tss->sp = vcpu->arch.regs[VCPU_REGS_RSP]; 3477 tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3390 tss->bp = vcpu->arch.regs[VCPU_REGS_RBP]; 3478 tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3391 tss->si = vcpu->arch.regs[VCPU_REGS_RSI]; 3479 tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
3392 tss->di = vcpu->arch.regs[VCPU_REGS_RDI]; 3480 tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
3393 3481
3394 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES); 3482 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3395 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS); 3483 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
@@ -3402,16 +3490,16 @@ static void save_state_to_tss16(struct kvm_vcpu *vcpu,
3402static int load_state_from_tss16(struct kvm_vcpu *vcpu, 3490static int load_state_from_tss16(struct kvm_vcpu *vcpu,
3403 struct tss_segment_16 *tss) 3491 struct tss_segment_16 *tss)
3404{ 3492{
3405 vcpu->arch.rip = tss->ip; 3493 kvm_rip_write(vcpu, tss->ip);
3406 kvm_x86_ops->set_rflags(vcpu, tss->flag | 2); 3494 kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
3407 vcpu->arch.regs[VCPU_REGS_RAX] = tss->ax; 3495 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
3408 vcpu->arch.regs[VCPU_REGS_RCX] = tss->cx; 3496 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
3409 vcpu->arch.regs[VCPU_REGS_RDX] = tss->dx; 3497 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
3410 vcpu->arch.regs[VCPU_REGS_RBX] = tss->bx; 3498 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
3411 vcpu->arch.regs[VCPU_REGS_RSP] = tss->sp; 3499 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
3412 vcpu->arch.regs[VCPU_REGS_RBP] = tss->bp; 3500 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
3413 vcpu->arch.regs[VCPU_REGS_RSI] = tss->si; 3501 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
3414 vcpu->arch.regs[VCPU_REGS_RDI] = tss->di; 3502 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
3415 3503
3416 if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR)) 3504 if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
3417 return 1; 3505 return 1;
@@ -3534,7 +3622,6 @@ int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
3534 } 3622 }
3535 3623
3536 kvm_x86_ops->skip_emulated_instruction(vcpu); 3624 kvm_x86_ops->skip_emulated_instruction(vcpu);
3537 kvm_x86_ops->cache_regs(vcpu);
3538 3625
3539 if (nseg_desc.type & 8) 3626 if (nseg_desc.type & 8)
3540 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_base, 3627 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_base,
@@ -3559,7 +3646,6 @@ int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
3559 tr_seg.type = 11; 3646 tr_seg.type = 11;
3560 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR); 3647 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
3561out: 3648out:
3562 kvm_x86_ops->decache_regs(vcpu);
3563 return ret; 3649 return ret;
3564} 3650}
3565EXPORT_SYMBOL_GPL(kvm_task_switch); 3651EXPORT_SYMBOL_GPL(kvm_task_switch);
@@ -3622,6 +3708,7 @@ int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
3622 pr_debug("Set back pending irq %d\n", 3708 pr_debug("Set back pending irq %d\n",
3623 pending_vec); 3709 pending_vec);
3624 } 3710 }
3711 kvm_pic_clear_isr_ack(vcpu->kvm);
3625 } 3712 }
3626 3713
3627 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS); 3714 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
@@ -3634,6 +3721,12 @@ int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
3634 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR); 3721 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3635 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR); 3722 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3636 3723
3724 /* Older userspace won't unhalt the vcpu on reset. */
3725 if (vcpu->vcpu_id == 0 && kvm_rip_read(vcpu) == 0xfff0 &&
3726 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
3727 !(vcpu->arch.cr0 & X86_CR0_PE))
3728 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3729
3637 vcpu_put(vcpu); 3730 vcpu_put(vcpu);
3638 3731
3639 return 0; 3732 return 0;
@@ -3918,6 +4011,7 @@ struct kvm *kvm_arch_create_vm(void)
3918 return ERR_PTR(-ENOMEM); 4011 return ERR_PTR(-ENOMEM);
3919 4012
3920 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages); 4013 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4014 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
3921 4015
3922 return kvm; 4016 return kvm;
3923} 4017}
@@ -3950,6 +4044,8 @@ static void kvm_free_vcpus(struct kvm *kvm)
3950 4044
3951void kvm_arch_destroy_vm(struct kvm *kvm) 4045void kvm_arch_destroy_vm(struct kvm *kvm)
3952{ 4046{
4047 kvm_iommu_unmap_guest(kvm);
4048 kvm_free_all_assigned_devices(kvm);
3953 kvm_free_pit(kvm); 4049 kvm_free_pit(kvm);
3954 kfree(kvm->arch.vpic); 4050 kfree(kvm->arch.vpic);
3955 kfree(kvm->arch.vioapic); 4051 kfree(kvm->arch.vioapic);
@@ -3981,7 +4077,7 @@ int kvm_arch_set_memory_region(struct kvm *kvm,
3981 userspace_addr = do_mmap(NULL, 0, 4077 userspace_addr = do_mmap(NULL, 0,
3982 npages * PAGE_SIZE, 4078 npages * PAGE_SIZE,
3983 PROT_READ | PROT_WRITE, 4079 PROT_READ | PROT_WRITE,
3984 MAP_SHARED | MAP_ANONYMOUS, 4080 MAP_PRIVATE | MAP_ANONYMOUS,
3985 0); 4081 0);
3986 up_write(&current->mm->mmap_sem); 4082 up_write(&current->mm->mmap_sem);
3987 4083
diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h
new file mode 100644
index 000000000000..6a4be78a7384
--- /dev/null
+++ b/arch/x86/kvm/x86.h
@@ -0,0 +1,22 @@
1#ifndef ARCH_X86_KVM_X86_H
2#define ARCH_X86_KVM_X86_H
3
4#include <linux/kvm_host.h>
5
6static inline void kvm_clear_exception_queue(struct kvm_vcpu *vcpu)
7{
8 vcpu->arch.exception.pending = false;
9}
10
11static inline void kvm_queue_interrupt(struct kvm_vcpu *vcpu, u8 vector)
12{
13 vcpu->arch.interrupt.pending = true;
14 vcpu->arch.interrupt.nr = vector;
15}
16
17static inline void kvm_clear_interrupt_queue(struct kvm_vcpu *vcpu)
18{
19 vcpu->arch.interrupt.pending = false;
20}
21
22#endif
diff --git a/arch/x86/kvm/x86_emulate.c b/arch/x86/kvm/x86_emulate.c
index f2f90468f8b1..ea051173b0da 100644
--- a/arch/x86/kvm/x86_emulate.c
+++ b/arch/x86/kvm/x86_emulate.c
@@ -26,6 +26,7 @@
26#define DPRINTF(_f, _a ...) printf(_f , ## _a) 26#define DPRINTF(_f, _a ...) printf(_f , ## _a)
27#else 27#else
28#include <linux/kvm_host.h> 28#include <linux/kvm_host.h>
29#include "kvm_cache_regs.h"
29#define DPRINTF(x...) do {} while (0) 30#define DPRINTF(x...) do {} while (0)
30#endif 31#endif
31#include <linux/module.h> 32#include <linux/module.h>
@@ -46,25 +47,26 @@
46#define ImplicitOps (1<<1) /* Implicit in opcode. No generic decode. */ 47#define ImplicitOps (1<<1) /* Implicit in opcode. No generic decode. */
47#define DstReg (2<<1) /* Register operand. */ 48#define DstReg (2<<1) /* Register operand. */
48#define DstMem (3<<1) /* Memory operand. */ 49#define DstMem (3<<1) /* Memory operand. */
49#define DstMask (3<<1) 50#define DstAcc (4<<1) /* Destination Accumulator */
51#define DstMask (7<<1)
50/* Source operand type. */ 52/* Source operand type. */
51#define SrcNone (0<<3) /* No source operand. */ 53#define SrcNone (0<<4) /* No source operand. */
52#define SrcImplicit (0<<3) /* Source operand is implicit in the opcode. */ 54#define SrcImplicit (0<<4) /* Source operand is implicit in the opcode. */
53#define SrcReg (1<<3) /* Register operand. */ 55#define SrcReg (1<<4) /* Register operand. */
54#define SrcMem (2<<3) /* Memory operand. */ 56#define SrcMem (2<<4) /* Memory operand. */
55#define SrcMem16 (3<<3) /* Memory operand (16-bit). */ 57#define SrcMem16 (3<<4) /* Memory operand (16-bit). */
56#define SrcMem32 (4<<3) /* Memory operand (32-bit). */ 58#define SrcMem32 (4<<4) /* Memory operand (32-bit). */
57#define SrcImm (5<<3) /* Immediate operand. */ 59#define SrcImm (5<<4) /* Immediate operand. */
58#define SrcImmByte (6<<3) /* 8-bit sign-extended immediate operand. */ 60#define SrcImmByte (6<<4) /* 8-bit sign-extended immediate operand. */
59#define SrcMask (7<<3) 61#define SrcMask (7<<4)
60/* Generic ModRM decode. */ 62/* Generic ModRM decode. */
61#define ModRM (1<<6) 63#define ModRM (1<<7)
62/* Destination is only written; never read. */ 64/* Destination is only written; never read. */
63#define Mov (1<<7) 65#define Mov (1<<8)
64#define BitOp (1<<8) 66#define BitOp (1<<9)
65#define MemAbs (1<<9) /* Memory operand is absolute displacement */ 67#define MemAbs (1<<10) /* Memory operand is absolute displacement */
66#define String (1<<10) /* String instruction (rep capable) */ 68#define String (1<<12) /* String instruction (rep capable) */
67#define Stack (1<<11) /* Stack instruction (push/pop) */ 69#define Stack (1<<13) /* Stack instruction (push/pop) */
68#define Group (1<<14) /* Bits 3:5 of modrm byte extend opcode */ 70#define Group (1<<14) /* Bits 3:5 of modrm byte extend opcode */
69#define GroupDual (1<<15) /* Alternate decoding of mod == 3 */ 71#define GroupDual (1<<15) /* Alternate decoding of mod == 3 */
70#define GroupMask 0xff /* Group number stored in bits 0:7 */ 72#define GroupMask 0xff /* Group number stored in bits 0:7 */
@@ -94,7 +96,7 @@ static u16 opcode_table[256] = {
94 /* 0x20 - 0x27 */ 96 /* 0x20 - 0x27 */
95 ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM, 97 ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
96 ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM, 98 ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
97 SrcImmByte, SrcImm, 0, 0, 99 DstAcc | SrcImmByte, DstAcc | SrcImm, 0, 0,
98 /* 0x28 - 0x2F */ 100 /* 0x28 - 0x2F */
99 ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM, 101 ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
100 ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM, 102 ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
@@ -106,7 +108,8 @@ static u16 opcode_table[256] = {
106 /* 0x38 - 0x3F */ 108 /* 0x38 - 0x3F */
107 ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM, 109 ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,
108 ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM, 110 ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
109 0, 0, 0, 0, 111 ByteOp | DstAcc | SrcImm, DstAcc | SrcImm,
112 0, 0,
110 /* 0x40 - 0x47 */ 113 /* 0x40 - 0x47 */
111 DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, 114 DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg,
112 /* 0x48 - 0x4F */ 115 /* 0x48 - 0x4F */
@@ -153,9 +156,16 @@ static u16 opcode_table[256] = {
153 0, 0, ByteOp | ImplicitOps | Mov | String, ImplicitOps | Mov | String, 156 0, 0, ByteOp | ImplicitOps | Mov | String, ImplicitOps | Mov | String,
154 ByteOp | ImplicitOps | Mov | String, ImplicitOps | Mov | String, 157 ByteOp | ImplicitOps | Mov | String, ImplicitOps | Mov | String,
155 ByteOp | ImplicitOps | String, ImplicitOps | String, 158 ByteOp | ImplicitOps | String, ImplicitOps | String,
156 /* 0xB0 - 0xBF */ 159 /* 0xB0 - 0xB7 */
157 0, 0, 0, 0, 0, 0, 0, 0, 160 ByteOp | DstReg | SrcImm | Mov, ByteOp | DstReg | SrcImm | Mov,
158 DstReg | SrcImm | Mov, 0, 0, 0, 0, 0, 0, 0, 161 ByteOp | DstReg | SrcImm | Mov, ByteOp | DstReg | SrcImm | Mov,
162 ByteOp | DstReg | SrcImm | Mov, ByteOp | DstReg | SrcImm | Mov,
163 ByteOp | DstReg | SrcImm | Mov, ByteOp | DstReg | SrcImm | Mov,
164 /* 0xB8 - 0xBF */
165 DstReg | SrcImm | Mov, DstReg | SrcImm | Mov,
166 DstReg | SrcImm | Mov, DstReg | SrcImm | Mov,
167 DstReg | SrcImm | Mov, DstReg | SrcImm | Mov,
168 DstReg | SrcImm | Mov, DstReg | SrcImm | Mov,
159 /* 0xC0 - 0xC7 */ 169 /* 0xC0 - 0xC7 */
160 ByteOp | DstMem | SrcImm | ModRM, DstMem | SrcImmByte | ModRM, 170 ByteOp | DstMem | SrcImm | ModRM, DstMem | SrcImmByte | ModRM,
161 0, ImplicitOps | Stack, 0, 0, 171 0, ImplicitOps | Stack, 0, 0,
@@ -169,17 +179,20 @@ static u16 opcode_table[256] = {
169 /* 0xD8 - 0xDF */ 179 /* 0xD8 - 0xDF */
170 0, 0, 0, 0, 0, 0, 0, 0, 180 0, 0, 0, 0, 0, 0, 0, 0,
171 /* 0xE0 - 0xE7 */ 181 /* 0xE0 - 0xE7 */
172 0, 0, 0, 0, 0, 0, 0, 0, 182 0, 0, 0, 0,
183 SrcNone | ByteOp | ImplicitOps, SrcNone | ImplicitOps,
184 SrcNone | ByteOp | ImplicitOps, SrcNone | ImplicitOps,
173 /* 0xE8 - 0xEF */ 185 /* 0xE8 - 0xEF */
174 ImplicitOps | Stack, SrcImm | ImplicitOps, 186 ImplicitOps | Stack, SrcImm | ImplicitOps,
175 ImplicitOps, SrcImmByte | ImplicitOps, 187 ImplicitOps, SrcImmByte | ImplicitOps,
176 0, 0, 0, 0, 188 SrcNone | ByteOp | ImplicitOps, SrcNone | ImplicitOps,
189 SrcNone | ByteOp | ImplicitOps, SrcNone | ImplicitOps,
177 /* 0xF0 - 0xF7 */ 190 /* 0xF0 - 0xF7 */
178 0, 0, 0, 0, 191 0, 0, 0, 0,
179 ImplicitOps, ImplicitOps, Group | Group3_Byte, Group | Group3, 192 ImplicitOps, ImplicitOps, Group | Group3_Byte, Group | Group3,
180 /* 0xF8 - 0xFF */ 193 /* 0xF8 - 0xFF */
181 ImplicitOps, 0, ImplicitOps, ImplicitOps, 194 ImplicitOps, 0, ImplicitOps, ImplicitOps,
182 0, 0, Group | Group4, Group | Group5, 195 ImplicitOps, ImplicitOps, Group | Group4, Group | Group5,
183}; 196};
184 197
185static u16 twobyte_table[256] = { 198static u16 twobyte_table[256] = {
@@ -268,15 +281,16 @@ static u16 group_table[] = {
268 ByteOp | DstMem | SrcNone | ModRM, ByteOp | DstMem | SrcNone | ModRM, 281 ByteOp | DstMem | SrcNone | ModRM, ByteOp | DstMem | SrcNone | ModRM,
269 0, 0, 0, 0, 282 0, 0, 0, 0,
270 [Group3*8] = 283 [Group3*8] =
271 DstMem | SrcImm | ModRM | SrcImm, 0, 284 DstMem | SrcImm | ModRM, 0,
272 DstMem | SrcNone | ModRM, ByteOp | DstMem | SrcNone | ModRM, 285 DstMem | SrcNone | ModRM, DstMem | SrcNone | ModRM,
273 0, 0, 0, 0, 286 0, 0, 0, 0,
274 [Group4*8] = 287 [Group4*8] =
275 ByteOp | DstMem | SrcNone | ModRM, ByteOp | DstMem | SrcNone | ModRM, 288 ByteOp | DstMem | SrcNone | ModRM, ByteOp | DstMem | SrcNone | ModRM,
276 0, 0, 0, 0, 0, 0, 289 0, 0, 0, 0, 0, 0,
277 [Group5*8] = 290 [Group5*8] =
278 DstMem | SrcNone | ModRM, DstMem | SrcNone | ModRM, 0, 0, 291 DstMem | SrcNone | ModRM, DstMem | SrcNone | ModRM,
279 SrcMem | ModRM, 0, SrcMem | ModRM | Stack, 0, 292 SrcMem | ModRM | Stack, 0,
293 SrcMem | ModRM | Stack, 0, SrcMem | ModRM | Stack, 0,
280 [Group7*8] = 294 [Group7*8] =
281 0, 0, ModRM | SrcMem, ModRM | SrcMem, 295 0, 0, ModRM | SrcMem, ModRM | SrcMem,
282 SrcNone | ModRM | DstMem | Mov, 0, 296 SrcNone | ModRM | DstMem | Mov, 0,
@@ -839,7 +853,7 @@ x86_decode_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
839 /* Shadow copy of register state. Committed on successful emulation. */ 853 /* Shadow copy of register state. Committed on successful emulation. */
840 854
841 memset(c, 0, sizeof(struct decode_cache)); 855 memset(c, 0, sizeof(struct decode_cache));
842 c->eip = ctxt->vcpu->arch.rip; 856 c->eip = kvm_rip_read(ctxt->vcpu);
843 ctxt->cs_base = seg_base(ctxt, VCPU_SREG_CS); 857 ctxt->cs_base = seg_base(ctxt, VCPU_SREG_CS);
844 memcpy(c->regs, ctxt->vcpu->arch.regs, sizeof c->regs); 858 memcpy(c->regs, ctxt->vcpu->arch.regs, sizeof c->regs);
845 859
@@ -1048,6 +1062,23 @@ done_prefixes:
1048 } 1062 }
1049 c->dst.type = OP_MEM; 1063 c->dst.type = OP_MEM;
1050 break; 1064 break;
1065 case DstAcc:
1066 c->dst.type = OP_REG;
1067 c->dst.bytes = c->op_bytes;
1068 c->dst.ptr = &c->regs[VCPU_REGS_RAX];
1069 switch (c->op_bytes) {
1070 case 1:
1071 c->dst.val = *(u8 *)c->dst.ptr;
1072 break;
1073 case 2:
1074 c->dst.val = *(u16 *)c->dst.ptr;
1075 break;
1076 case 4:
1077 c->dst.val = *(u32 *)c->dst.ptr;
1078 break;
1079 }
1080 c->dst.orig_val = c->dst.val;
1081 break;
1051 } 1082 }
1052 1083
1053 if (c->rip_relative) 1084 if (c->rip_relative)
@@ -1151,6 +1182,14 @@ static inline int emulate_grp45(struct x86_emulate_ctxt *ctxt,
1151 case 1: /* dec */ 1182 case 1: /* dec */
1152 emulate_1op("dec", c->dst, ctxt->eflags); 1183 emulate_1op("dec", c->dst, ctxt->eflags);
1153 break; 1184 break;
1185 case 2: /* call near abs */ {
1186 long int old_eip;
1187 old_eip = c->eip;
1188 c->eip = c->src.val;
1189 c->src.val = old_eip;
1190 emulate_push(ctxt);
1191 break;
1192 }
1154 case 4: /* jmp abs */ 1193 case 4: /* jmp abs */
1155 c->eip = c->src.val; 1194 c->eip = c->src.val;
1156 break; 1195 break;
@@ -1251,6 +1290,8 @@ x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
1251 u64 msr_data; 1290 u64 msr_data;
1252 unsigned long saved_eip = 0; 1291 unsigned long saved_eip = 0;
1253 struct decode_cache *c = &ctxt->decode; 1292 struct decode_cache *c = &ctxt->decode;
1293 unsigned int port;
1294 int io_dir_in;
1254 int rc = 0; 1295 int rc = 0;
1255 1296
1256 /* Shadow copy of register state. Committed on successful emulation. 1297 /* Shadow copy of register state. Committed on successful emulation.
@@ -1267,7 +1308,7 @@ x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
1267 if (c->rep_prefix && (c->d & String)) { 1308 if (c->rep_prefix && (c->d & String)) {
1268 /* All REP prefixes have the same first termination condition */ 1309 /* All REP prefixes have the same first termination condition */
1269 if (c->regs[VCPU_REGS_RCX] == 0) { 1310 if (c->regs[VCPU_REGS_RCX] == 0) {
1270 ctxt->vcpu->arch.rip = c->eip; 1311 kvm_rip_write(ctxt->vcpu, c->eip);
1271 goto done; 1312 goto done;
1272 } 1313 }
1273 /* The second termination condition only applies for REPE 1314 /* The second termination condition only applies for REPE
@@ -1281,17 +1322,17 @@ x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
1281 (c->b == 0xae) || (c->b == 0xaf)) { 1322 (c->b == 0xae) || (c->b == 0xaf)) {
1282 if ((c->rep_prefix == REPE_PREFIX) && 1323 if ((c->rep_prefix == REPE_PREFIX) &&
1283 ((ctxt->eflags & EFLG_ZF) == 0)) { 1324 ((ctxt->eflags & EFLG_ZF) == 0)) {
1284 ctxt->vcpu->arch.rip = c->eip; 1325 kvm_rip_write(ctxt->vcpu, c->eip);
1285 goto done; 1326 goto done;
1286 } 1327 }
1287 if ((c->rep_prefix == REPNE_PREFIX) && 1328 if ((c->rep_prefix == REPNE_PREFIX) &&
1288 ((ctxt->eflags & EFLG_ZF) == EFLG_ZF)) { 1329 ((ctxt->eflags & EFLG_ZF) == EFLG_ZF)) {
1289 ctxt->vcpu->arch.rip = c->eip; 1330 kvm_rip_write(ctxt->vcpu, c->eip);
1290 goto done; 1331 goto done;
1291 } 1332 }
1292 } 1333 }
1293 c->regs[VCPU_REGS_RCX]--; 1334 c->regs[VCPU_REGS_RCX]--;
1294 c->eip = ctxt->vcpu->arch.rip; 1335 c->eip = kvm_rip_read(ctxt->vcpu);
1295 } 1336 }
1296 1337
1297 if (c->src.type == OP_MEM) { 1338 if (c->src.type == OP_MEM) {
@@ -1351,27 +1392,10 @@ special_insn:
1351 sbb: /* sbb */ 1392 sbb: /* sbb */
1352 emulate_2op_SrcV("sbb", c->src, c->dst, ctxt->eflags); 1393 emulate_2op_SrcV("sbb", c->src, c->dst, ctxt->eflags);
1353 break; 1394 break;
1354 case 0x20 ... 0x23: 1395 case 0x20 ... 0x25:
1355 and: /* and */ 1396 and: /* and */
1356 emulate_2op_SrcV("and", c->src, c->dst, ctxt->eflags); 1397 emulate_2op_SrcV("and", c->src, c->dst, ctxt->eflags);
1357 break; 1398 break;
1358 case 0x24: /* and al imm8 */
1359 c->dst.type = OP_REG;
1360 c->dst.ptr = &c->regs[VCPU_REGS_RAX];
1361 c->dst.val = *(u8 *)c->dst.ptr;
1362 c->dst.bytes = 1;
1363 c->dst.orig_val = c->dst.val;
1364 goto and;
1365 case 0x25: /* and ax imm16, or eax imm32 */
1366 c->dst.type = OP_REG;
1367 c->dst.bytes = c->op_bytes;
1368 c->dst.ptr = &c->regs[VCPU_REGS_RAX];
1369 if (c->op_bytes == 2)
1370 c->dst.val = *(u16 *)c->dst.ptr;
1371 else
1372 c->dst.val = *(u32 *)c->dst.ptr;
1373 c->dst.orig_val = c->dst.val;
1374 goto and;
1375 case 0x28 ... 0x2d: 1399 case 0x28 ... 0x2d:
1376 sub: /* sub */ 1400 sub: /* sub */
1377 emulate_2op_SrcV("sub", c->src, c->dst, ctxt->eflags); 1401 emulate_2op_SrcV("sub", c->src, c->dst, ctxt->eflags);
@@ -1659,7 +1683,7 @@ special_insn:
1659 case 0xae ... 0xaf: /* scas */ 1683 case 0xae ... 0xaf: /* scas */
1660 DPRINTF("Urk! I don't handle SCAS.\n"); 1684 DPRINTF("Urk! I don't handle SCAS.\n");
1661 goto cannot_emulate; 1685 goto cannot_emulate;
1662 case 0xb8: /* mov r, imm */ 1686 case 0xb0 ... 0xbf: /* mov r, imm */
1663 goto mov; 1687 goto mov;
1664 case 0xc0 ... 0xc1: 1688 case 0xc0 ... 0xc1:
1665 emulate_grp2(ctxt); 1689 emulate_grp2(ctxt);
@@ -1679,6 +1703,16 @@ special_insn:
1679 c->src.val = c->regs[VCPU_REGS_RCX]; 1703 c->src.val = c->regs[VCPU_REGS_RCX];
1680 emulate_grp2(ctxt); 1704 emulate_grp2(ctxt);
1681 break; 1705 break;
1706 case 0xe4: /* inb */
1707 case 0xe5: /* in */
1708 port = insn_fetch(u8, 1, c->eip);
1709 io_dir_in = 1;
1710 goto do_io;
1711 case 0xe6: /* outb */
1712 case 0xe7: /* out */
1713 port = insn_fetch(u8, 1, c->eip);
1714 io_dir_in = 0;
1715 goto do_io;
1682 case 0xe8: /* call (near) */ { 1716 case 0xe8: /* call (near) */ {
1683 long int rel; 1717 long int rel;
1684 switch (c->op_bytes) { 1718 switch (c->op_bytes) {
@@ -1729,6 +1763,22 @@ special_insn:
1729 jmp_rel(c, c->src.val); 1763 jmp_rel(c, c->src.val);
1730 c->dst.type = OP_NONE; /* Disable writeback. */ 1764 c->dst.type = OP_NONE; /* Disable writeback. */
1731 break; 1765 break;
1766 case 0xec: /* in al,dx */
1767 case 0xed: /* in (e/r)ax,dx */
1768 port = c->regs[VCPU_REGS_RDX];
1769 io_dir_in = 1;
1770 goto do_io;
1771 case 0xee: /* out al,dx */
1772 case 0xef: /* out (e/r)ax,dx */
1773 port = c->regs[VCPU_REGS_RDX];
1774 io_dir_in = 0;
1775 do_io: if (kvm_emulate_pio(ctxt->vcpu, NULL, io_dir_in,
1776 (c->d & ByteOp) ? 1 : c->op_bytes,
1777 port) != 0) {
1778 c->eip = saved_eip;
1779 goto cannot_emulate;
1780 }
1781 return 0;
1732 case 0xf4: /* hlt */ 1782 case 0xf4: /* hlt */
1733 ctxt->vcpu->arch.halt_request = 1; 1783 ctxt->vcpu->arch.halt_request = 1;
1734 break; 1784 break;
@@ -1754,6 +1804,14 @@ special_insn:
1754 ctxt->eflags |= X86_EFLAGS_IF; 1804 ctxt->eflags |= X86_EFLAGS_IF;
1755 c->dst.type = OP_NONE; /* Disable writeback. */ 1805 c->dst.type = OP_NONE; /* Disable writeback. */
1756 break; 1806 break;
1807 case 0xfc: /* cld */
1808 ctxt->eflags &= ~EFLG_DF;
1809 c->dst.type = OP_NONE; /* Disable writeback. */
1810 break;
1811 case 0xfd: /* std */
1812 ctxt->eflags |= EFLG_DF;
1813 c->dst.type = OP_NONE; /* Disable writeback. */
1814 break;
1757 case 0xfe ... 0xff: /* Grp4/Grp5 */ 1815 case 0xfe ... 0xff: /* Grp4/Grp5 */
1758 rc = emulate_grp45(ctxt, ops); 1816 rc = emulate_grp45(ctxt, ops);
1759 if (rc != 0) 1817 if (rc != 0)
@@ -1768,7 +1826,7 @@ writeback:
1768 1826
1769 /* Commit shadow register state. */ 1827 /* Commit shadow register state. */
1770 memcpy(ctxt->vcpu->arch.regs, c->regs, sizeof c->regs); 1828 memcpy(ctxt->vcpu->arch.regs, c->regs, sizeof c->regs);
1771 ctxt->vcpu->arch.rip = c->eip; 1829 kvm_rip_write(ctxt->vcpu, c->eip);
1772 1830
1773done: 1831done:
1774 if (rc == X86EMUL_UNHANDLEABLE) { 1832 if (rc == X86EMUL_UNHANDLEABLE) {
@@ -1793,7 +1851,7 @@ twobyte_insn:
1793 goto done; 1851 goto done;
1794 1852
1795 /* Let the processor re-execute the fixed hypercall */ 1853 /* Let the processor re-execute the fixed hypercall */
1796 c->eip = ctxt->vcpu->arch.rip; 1854 c->eip = kvm_rip_read(ctxt->vcpu);
1797 /* Disable writeback. */ 1855 /* Disable writeback. */
1798 c->dst.type = OP_NONE; 1856 c->dst.type = OP_NONE;
1799 break; 1857 break;
@@ -1889,7 +1947,7 @@ twobyte_insn:
1889 rc = kvm_set_msr(ctxt->vcpu, c->regs[VCPU_REGS_RCX], msr_data); 1947 rc = kvm_set_msr(ctxt->vcpu, c->regs[VCPU_REGS_RCX], msr_data);
1890 if (rc) { 1948 if (rc) {
1891 kvm_inject_gp(ctxt->vcpu, 0); 1949 kvm_inject_gp(ctxt->vcpu, 0);
1892 c->eip = ctxt->vcpu->arch.rip; 1950 c->eip = kvm_rip_read(ctxt->vcpu);
1893 } 1951 }
1894 rc = X86EMUL_CONTINUE; 1952 rc = X86EMUL_CONTINUE;
1895 c->dst.type = OP_NONE; 1953 c->dst.type = OP_NONE;
@@ -1899,7 +1957,7 @@ twobyte_insn:
1899 rc = kvm_get_msr(ctxt->vcpu, c->regs[VCPU_REGS_RCX], &msr_data); 1957 rc = kvm_get_msr(ctxt->vcpu, c->regs[VCPU_REGS_RCX], &msr_data);
1900 if (rc) { 1958 if (rc) {
1901 kvm_inject_gp(ctxt->vcpu, 0); 1959 kvm_inject_gp(ctxt->vcpu, 0);
1902 c->eip = ctxt->vcpu->arch.rip; 1960 c->eip = kvm_rip_read(ctxt->vcpu);
1903 } else { 1961 } else {
1904 c->regs[VCPU_REGS_RAX] = (u32)msr_data; 1962 c->regs[VCPU_REGS_RAX] = (u32)msr_data;
1905 c->regs[VCPU_REGS_RDX] = msr_data >> 32; 1963 c->regs[VCPU_REGS_RDX] = msr_data >> 32;
diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
index 3f2b8962cbd0..31e8730fa246 100644
--- a/arch/x86/mm/fault.c
+++ b/arch/x86/mm/fault.c
@@ -640,24 +640,23 @@ void __kprobes do_page_fault(struct pt_regs *regs, unsigned long error_code)
640 } 640 }
641 641
642 642
643#ifdef CONFIG_X86_32
644 /* It's safe to allow irq's after cr2 has been saved and the vmalloc
645 fault has been handled. */
646 if (regs->flags & (X86_EFLAGS_IF | X86_VM_MASK))
647 local_irq_enable();
648
649 /* 643 /*
650 * If we're in an interrupt, have no user context or are running in an 644 * It's safe to allow irq's after cr2 has been saved and the
651 * atomic region then we must not take the fault. 645 * vmalloc fault has been handled.
646 *
647 * User-mode registers count as a user access even for any
648 * potential system fault or CPU buglet.
652 */ 649 */
653 if (in_atomic() || !mm) 650 if (user_mode_vm(regs)) {
654 goto bad_area_nosemaphore; 651 local_irq_enable();
655#else /* CONFIG_X86_64 */ 652 error_code |= PF_USER;
656 if (likely(regs->flags & X86_EFLAGS_IF)) 653 } else if (regs->flags & X86_EFLAGS_IF)
657 local_irq_enable(); 654 local_irq_enable();
658 655
656#ifdef CONFIG_X86_64
659 if (unlikely(error_code & PF_RSVD)) 657 if (unlikely(error_code & PF_RSVD))
660 pgtable_bad(address, regs, error_code); 658 pgtable_bad(address, regs, error_code);
659#endif
661 660
662 /* 661 /*
663 * If we're in an interrupt, have no user context or are running in an 662 * If we're in an interrupt, have no user context or are running in an
@@ -666,15 +665,9 @@ void __kprobes do_page_fault(struct pt_regs *regs, unsigned long error_code)
666 if (unlikely(in_atomic() || !mm)) 665 if (unlikely(in_atomic() || !mm))
667 goto bad_area_nosemaphore; 666 goto bad_area_nosemaphore;
668 667
669 /*
670 * User-mode registers count as a user access even for any
671 * potential system fault or CPU buglet.
672 */
673 if (user_mode_vm(regs))
674 error_code |= PF_USER;
675again: 668again:
676#endif 669 /*
677 /* When running in the kernel we expect faults to occur only to 670 * When running in the kernel we expect faults to occur only to
678 * addresses in user space. All other faults represent errors in the 671 * addresses in user space. All other faults represent errors in the
679 * kernel and should generate an OOPS. Unfortunately, in the case of an 672 * kernel and should generate an OOPS. Unfortunately, in the case of an
680 * erroneous fault occurring in a code path which already holds mmap_sem 673 * erroneous fault occurring in a code path which already holds mmap_sem
@@ -737,9 +730,6 @@ good_area:
737 goto bad_area; 730 goto bad_area;
738 } 731 }
739 732
740#ifdef CONFIG_X86_32
741survive:
742#endif
743 /* 733 /*
744 * If for any reason at all we couldn't handle the fault, 734 * If for any reason at all we couldn't handle the fault,
745 * make sure we exit gracefully rather than endlessly redo 735 * make sure we exit gracefully rather than endlessly redo
@@ -874,12 +864,11 @@ out_of_memory:
874 up_read(&mm->mmap_sem); 864 up_read(&mm->mmap_sem);
875 if (is_global_init(tsk)) { 865 if (is_global_init(tsk)) {
876 yield(); 866 yield();
877#ifdef CONFIG_X86_32 867 /*
878 down_read(&mm->mmap_sem); 868 * Re-lookup the vma - in theory the vma tree might
879 goto survive; 869 * have changed:
880#else 870 */
881 goto again; 871 goto again;
882#endif
883 } 872 }
884 873
885 printk("VM: killing process %s\n", tsk->comm); 874 printk("VM: killing process %s\n", tsk->comm);
diff --git a/arch/x86/mm/highmem_32.c b/arch/x86/mm/highmem_32.c
index 165c871ba9af..bcc079c282dd 100644
--- a/arch/x86/mm/highmem_32.c
+++ b/arch/x86/mm/highmem_32.c
@@ -137,6 +137,7 @@ void *kmap_atomic_pfn(unsigned long pfn, enum km_type type)
137 137
138 return (void*) vaddr; 138 return (void*) vaddr;
139} 139}
140EXPORT_SYMBOL_GPL(kmap_atomic_pfn); /* temporarily in use by i915 GEM until vmap */
140 141
141struct page *kmap_atomic_to_page(void *ptr) 142struct page *kmap_atomic_to_page(void *ptr)
142{ 143{
diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c
index e4c43ec71b29..ae71e11eb3e5 100644
--- a/arch/x86/mm/ioremap.c
+++ b/arch/x86/mm/ioremap.c
@@ -220,6 +220,12 @@ static void __iomem *__ioremap_caller(resource_size_t phys_addr,
220 return (__force void __iomem *)phys_to_virt(phys_addr); 220 return (__force void __iomem *)phys_to_virt(phys_addr);
221 221
222 /* 222 /*
223 * Check if the request spans more than any BAR in the iomem resource
224 * tree.
225 */
226 WARN_ON(iomem_map_sanity_check(phys_addr, size));
227
228 /*
223 * Don't allow anybody to remap normal RAM that we're using.. 229 * Don't allow anybody to remap normal RAM that we're using..
224 */ 230 */
225 for (pfn = phys_addr >> PAGE_SHIFT; 231 for (pfn = phys_addr >> PAGE_SHIFT;
diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c
index 004ba86326ae..c9f7cda48ed7 100644
--- a/arch/x86/xen/time.c
+++ b/arch/x86/xen/time.c
@@ -198,17 +198,10 @@ unsigned long long xen_sched_clock(void)
198/* Get the TSC speed from Xen */ 198/* Get the TSC speed from Xen */
199unsigned long xen_tsc_khz(void) 199unsigned long xen_tsc_khz(void)
200{ 200{
201 u64 xen_khz = 1000000ULL << 32; 201 struct pvclock_vcpu_time_info *info =
202 const struct pvclock_vcpu_time_info *info =
203 &HYPERVISOR_shared_info->vcpu_info[0].time; 202 &HYPERVISOR_shared_info->vcpu_info[0].time;
204 203
205 do_div(xen_khz, info->tsc_to_system_mul); 204 return pvclock_tsc_khz(info);
206 if (info->tsc_shift < 0)
207 xen_khz <<= -info->tsc_shift;
208 else
209 xen_khz >>= info->tsc_shift;
210
211 return xen_khz;
212} 205}
213 206
214cycle_t xen_clocksource_read(void) 207cycle_t xen_clocksource_read(void)
diff --git a/arch/xtensa/kernel/setup.c b/arch/xtensa/kernel/setup.c
index a00359e8f7a8..9606d2bd1dd9 100644
--- a/arch/xtensa/kernel/setup.c
+++ b/arch/xtensa/kernel/setup.c
@@ -53,11 +53,6 @@ extern struct fd_ops no_fd_ops;
53struct fd_ops *fd_ops; 53struct fd_ops *fd_ops;
54#endif 54#endif
55 55
56#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
57extern struct ide_ops no_ide_ops;
58struct ide_ops *ide_ops;
59#endif
60
61extern struct rtc_ops no_rtc_ops; 56extern struct rtc_ops no_rtc_ops;
62struct rtc_ops *rtc_ops; 57struct rtc_ops *rtc_ops;
63 58