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authorAlexander Graf <agraf@suse.de>2008-07-22 02:00:45 -0400
committerAvi Kivity <avi@qumranet.com>2008-10-15 04:15:15 -0400
commitb5e2fec0ebc3fcaff954092bb69444a67a904c0a (patch)
tree6b622b0ed106e51cf8e7a64b6bcacb1c33a8c152 /arch
parent313dbd49dc239205b96da79fba09f7637cf84f3c (diff)
KVM: Ignore DEBUGCTL MSRs with no effect
Netware writes to DEBUGCTL and reads from the DEBUGCTL and LAST*IP MSRs without further checks and is really confused to receive a #GP during that. To make it happy we should just make them stubs, which is exactly what SVM already does. Writes to DEBUGCTL that are vendor-specific are resembled to behave as if the virtual CPU does not know them. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Avi Kivity <avi@qumranet.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/kvm/x86.c17
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 5620df2685db..94a216562f10 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -665,6 +665,18 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
665 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n", 665 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
666 __func__, data); 666 __func__, data);
667 break; 667 break;
668 case MSR_IA32_DEBUGCTLMSR:
669 if (!data) {
670 /* We support the non-activated case already */
671 break;
672 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
673 /* Values other than LBR and BTF are vendor-specific,
674 thus reserved and should throw a #GP */
675 return 1;
676 }
677 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
678 __func__, data);
679 break;
668 case MSR_IA32_UCODE_REV: 680 case MSR_IA32_UCODE_REV:
669 case MSR_IA32_UCODE_WRITE: 681 case MSR_IA32_UCODE_WRITE:
670 break; 682 break;
@@ -757,6 +769,11 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
757 case MSR_IA32_MC0_MISC+16: 769 case MSR_IA32_MC0_MISC+16:
758 case MSR_IA32_UCODE_REV: 770 case MSR_IA32_UCODE_REV:
759 case MSR_IA32_EBL_CR_POWERON: 771 case MSR_IA32_EBL_CR_POWERON:
772 case MSR_IA32_DEBUGCTLMSR:
773 case MSR_IA32_LASTBRANCHFROMIP:
774 case MSR_IA32_LASTBRANCHTOIP:
775 case MSR_IA32_LASTINTFROMIP:
776 case MSR_IA32_LASTINTTOIP:
760 data = 0; 777 data = 0;
761 break; 778 break;
762 case MSR_MTRRcap: 779 case MSR_MTRRcap: