diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2011-02-06 16:10:53 -0500 |
---|---|---|
committer | Thomas Gleixner <tglx@linutronix.de> | 2011-03-24 15:35:58 -0400 |
commit | 0e77575346c2ed371e06aa3b409c74221be09c38 (patch) | |
tree | 1d128ac8d3bec6c0428886623450242d33ddbaf5 /arch/xtensa | |
parent | 495e0c79406fc0915fe80c7b1bbc006ef1370842 (diff) |
xtensa: Convert s6000 gpio irq_chip to new functions
Also use proper wrappers for irq_desc access.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Chris Zankel <chris@zankel.net>
LKML-Reference: <20110206211137.750284615@linutronix.de>
Diffstat (limited to 'arch/xtensa')
-rw-r--r-- | arch/xtensa/variants/s6000/gpio.c | 35 |
1 files changed, 17 insertions, 18 deletions
diff --git a/arch/xtensa/variants/s6000/gpio.c b/arch/xtensa/variants/s6000/gpio.c index 380a70fff756..c694158817b2 100644 --- a/arch/xtensa/variants/s6000/gpio.c +++ b/arch/xtensa/variants/s6000/gpio.c | |||
@@ -85,30 +85,29 @@ int s6_gpio_init(u32 afsel) | |||
85 | return gpiochip_add(&gpiochip); | 85 | return gpiochip_add(&gpiochip); |
86 | } | 86 | } |
87 | 87 | ||
88 | static void ack(unsigned int irq) | 88 | static void ack(struct irq_data *d) |
89 | { | 89 | { |
90 | writeb(1 << (irq - IRQ_BASE), S6_REG_GPIO + S6_GPIO_IC); | 90 | writeb(1 << (d->irq - IRQ_BASE), S6_REG_GPIO + S6_GPIO_IC); |
91 | } | 91 | } |
92 | 92 | ||
93 | static void mask(unsigned int irq) | 93 | static void mask(struct irq_data *d) |
94 | { | 94 | { |
95 | u8 r = readb(S6_REG_GPIO + S6_GPIO_IE); | 95 | u8 r = readb(S6_REG_GPIO + S6_GPIO_IE); |
96 | r &= ~(1 << (irq - IRQ_BASE)); | 96 | r &= ~(1 << (d->irq - IRQ_BASE)); |
97 | writeb(r, S6_REG_GPIO + S6_GPIO_IE); | 97 | writeb(r, S6_REG_GPIO + S6_GPIO_IE); |
98 | } | 98 | } |
99 | 99 | ||
100 | static void unmask(unsigned int irq) | 100 | static void unmask(struct irq_data *d) |
101 | { | 101 | { |
102 | u8 m = readb(S6_REG_GPIO + S6_GPIO_IE); | 102 | u8 m = readb(S6_REG_GPIO + S6_GPIO_IE); |
103 | m |= 1 << (irq - IRQ_BASE); | 103 | m |= 1 << (d->irq - IRQ_BASE); |
104 | writeb(m, S6_REG_GPIO + S6_GPIO_IE); | 104 | writeb(m, S6_REG_GPIO + S6_GPIO_IE); |
105 | } | 105 | } |
106 | 106 | ||
107 | static int set_type(unsigned int irq, unsigned int type) | 107 | static int set_type(struct irq_data *d, unsigned int type) |
108 | { | 108 | { |
109 | const u8 m = 1 << (irq - IRQ_BASE); | 109 | const u8 m = 1 << (d->irq - IRQ_BASE); |
110 | irq_flow_handler_t handler; | 110 | irq_flow_handler_t handler; |
111 | struct irq_desc *desc; | ||
112 | u8 reg; | 111 | u8 reg; |
113 | 112 | ||
114 | if (type == IRQ_TYPE_PROBE) { | 113 | if (type == IRQ_TYPE_PROBE) { |
@@ -129,8 +128,7 @@ static int set_type(unsigned int irq, unsigned int type) | |||
129 | handler = handle_edge_irq; | 128 | handler = handle_edge_irq; |
130 | } | 129 | } |
131 | writeb(reg, S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_IS); | 130 | writeb(reg, S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_IS); |
132 | desc = irq_to_desc(irq); | 131 | __set_irq_handler_unlocked(irq, handler); |
133 | desc->handle_irq = handler; | ||
134 | 132 | ||
135 | reg = readb(S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_IEV); | 133 | reg = readb(S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_IEV); |
136 | if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_EDGE_RISING)) | 134 | if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_EDGE_RISING)) |
@@ -150,22 +148,23 @@ static int set_type(unsigned int irq, unsigned int type) | |||
150 | 148 | ||
151 | static struct irq_chip gpioirqs = { | 149 | static struct irq_chip gpioirqs = { |
152 | .name = "GPIO", | 150 | .name = "GPIO", |
153 | .ack = ack, | 151 | .irq_ack = ack, |
154 | .mask = mask, | 152 | .irq_mask = mask, |
155 | .unmask = unmask, | 153 | .irq_unmask = unmask, |
156 | .set_type = set_type, | 154 | .irq_set_type = set_type, |
157 | }; | 155 | }; |
158 | 156 | ||
159 | static u8 demux_masks[4]; | 157 | static u8 demux_masks[4]; |
160 | 158 | ||
161 | static void demux_irqs(unsigned int irq, struct irq_desc *desc) | 159 | static void demux_irqs(unsigned int irq, struct irq_desc *desc) |
162 | { | 160 | { |
161 | struct irq_chip *chip = get_irq_desc_chip(desc); | ||
163 | u8 *mask = get_irq_desc_data(desc); | 162 | u8 *mask = get_irq_desc_data(desc); |
164 | u8 pending; | 163 | u8 pending; |
165 | int cirq; | 164 | int cirq; |
166 | 165 | ||
167 | desc->chip->mask(irq); | 166 | chip->irq_mask(&desc->irq_data); |
168 | desc->chip->ack(irq); | 167 | chip->irq_ack(&desc->irq_data)); |
169 | pending = readb(S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_MIS) & *mask; | 168 | pending = readb(S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_MIS) & *mask; |
170 | cirq = IRQ_BASE - 1; | 169 | cirq = IRQ_BASE - 1; |
171 | while (pending) { | 170 | while (pending) { |
@@ -174,7 +173,7 @@ static void demux_irqs(unsigned int irq, struct irq_desc *desc) | |||
174 | pending >>= n; | 173 | pending >>= n; |
175 | generic_handle_irq(cirq); | 174 | generic_handle_irq(cirq); |
176 | } | 175 | } |
177 | desc->chip->unmask(irq); | 176 | chip->irq_unmask(&desc->irq_data)); |
178 | } | 177 | } |
179 | 178 | ||
180 | extern const signed char *platform_irq_mappings[XTENSA_NR_IRQS]; | 179 | extern const signed char *platform_irq_mappings[XTENSA_NR_IRQS]; |