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authorJiri Kosina <jkosina@suse.cz>2011-04-26 04:22:15 -0400
committerJiri Kosina <jkosina@suse.cz>2011-04-26 04:22:59 -0400
commit07f9479a40cc778bc1462ada11f95b01360ae4ff (patch)
tree0676cf38df3844004bb3ebfd99dfa67a4a8998f5 /arch/xtensa
parent9d5e6bdb3013acfb311ab407eeca0b6a6a3dedbf (diff)
parentcd2e49e90f1cae7726c9a2c54488d881d7f1cd1c (diff)
Merge branch 'master' into for-next
Fast-forwarded to current state of Linus' tree as there are patches to be applied for files that didn't exist on the old branch.
Diffstat (limited to 'arch/xtensa')
-rw-r--r--arch/xtensa/Kconfig6
-rw-r--r--arch/xtensa/boot/Makefile2
-rw-r--r--arch/xtensa/boot/lib/Makefile2
-rw-r--r--arch/xtensa/include/asm/bitops.h3
-rw-r--r--arch/xtensa/include/asm/dma.h2
-rw-r--r--arch/xtensa/include/asm/types.h4
-rw-r--r--arch/xtensa/kernel/entry.S2
-rw-r--r--arch/xtensa/kernel/irq.c100
-rw-r--r--arch/xtensa/platforms/s6105/device.c2
-rw-r--r--arch/xtensa/variants/s6000/gpio.c45
10 files changed, 61 insertions, 107 deletions
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index d373d159e75e..7c275f5d0df0 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -7,6 +7,8 @@ config ZONE_DMA
7config XTENSA 7config XTENSA
8 def_bool y 8 def_bool y
9 select HAVE_IDE 9 select HAVE_IDE
10 select HAVE_GENERIC_HARDIRQS
11 select GENERIC_IRQ_SHOW
10 help 12 help
11 Xtensa processors are 32-bit RISC machines designed by Tensilica 13 Xtensa processors are 32-bit RISC machines designed by Tensilica
12 primarily for embedded systems. These processors are both 14 primarily for embedded systems. These processors are both
@@ -21,10 +23,10 @@ config RWSEM_XCHGADD_ALGORITHM
21config GENERIC_FIND_NEXT_BIT 23config GENERIC_FIND_NEXT_BIT
22 def_bool y 24 def_bool y
23 25
24config GENERIC_HWEIGHT 26config GENERIC_FIND_BIT_LE
25 def_bool y 27 def_bool y
26 28
27config GENERIC_HARDIRQS 29config GENERIC_HWEIGHT
28 def_bool y 30 def_bool y
29 31
30config GENERIC_GPIO 32config GENERIC_GPIO
diff --git a/arch/xtensa/boot/Makefile b/arch/xtensa/boot/Makefile
index 40aa55b485be..70fd1453e172 100644
--- a/arch/xtensa/boot/Makefile
+++ b/arch/xtensa/boot/Makefile
@@ -14,7 +14,7 @@ HOSTFLAGS += -Iarch/$(ARCH)/boot/include
14 14
15BIG_ENDIAN := $(shell echo -e __XTENSA_EB__ | $(CC) -E - | grep -v "\#") 15BIG_ENDIAN := $(shell echo -e __XTENSA_EB__ | $(CC) -E - | grep -v "\#")
16 16
17export EXTRA_CFLAGS 17export ccflags-y
18export BIG_ENDIAN 18export BIG_ENDIAN
19 19
20subdir-y := lib 20subdir-y := lib
diff --git a/arch/xtensa/boot/lib/Makefile b/arch/xtensa/boot/lib/Makefile
index d3d2aa2d883a..ad8952e8a07f 100644
--- a/arch/xtensa/boot/lib/Makefile
+++ b/arch/xtensa/boot/lib/Makefile
@@ -6,7 +6,7 @@ zlib := inffast.c inflate.c inftrees.c
6 6
7lib-y += $(zlib:.c=.o) zmem.o 7lib-y += $(zlib:.c=.o) zmem.o
8 8
9EXTRA_CFLAGS += -Ilib/zlib_inflate 9ccflags-y := -Ilib/zlib_inflate
10 10
11quiet_cmd_copy_zlib = COPY $@ 11quiet_cmd_copy_zlib = COPY $@
12 cmd_copy_zlib = cat $< > $@ 12 cmd_copy_zlib = cat $< > $@
diff --git a/arch/xtensa/include/asm/bitops.h b/arch/xtensa/include/asm/bitops.h
index 6c3930397bd3..c8fac8d8190d 100644
--- a/arch/xtensa/include/asm/bitops.h
+++ b/arch/xtensa/include/asm/bitops.h
@@ -106,7 +106,7 @@ static inline unsigned long __fls(unsigned long word)
106 106
107#include <asm-generic/bitops/fls64.h> 107#include <asm-generic/bitops/fls64.h>
108#include <asm-generic/bitops/find.h> 108#include <asm-generic/bitops/find.h>
109#include <asm-generic/bitops/ext2-non-atomic.h> 109#include <asm-generic/bitops/le.h>
110 110
111#ifdef __XTENSA_EL__ 111#ifdef __XTENSA_EL__
112# define ext2_set_bit_atomic(lock,nr,addr) \ 112# define ext2_set_bit_atomic(lock,nr,addr) \
@@ -125,7 +125,6 @@ static inline unsigned long __fls(unsigned long word)
125#include <asm-generic/bitops/hweight.h> 125#include <asm-generic/bitops/hweight.h>
126#include <asm-generic/bitops/lock.h> 126#include <asm-generic/bitops/lock.h>
127#include <asm-generic/bitops/sched.h> 127#include <asm-generic/bitops/sched.h>
128#include <asm-generic/bitops/minix.h>
129 128
130#endif /* __KERNEL__ */ 129#endif /* __KERNEL__ */
131 130
diff --git a/arch/xtensa/include/asm/dma.h b/arch/xtensa/include/asm/dma.h
index 137ca3945b07..bb099a373b5a 100644
--- a/arch/xtensa/include/asm/dma.h
+++ b/arch/xtensa/include/asm/dma.h
@@ -37,7 +37,7 @@
37 * the size of the statically mapped kernel segment 37 * the size of the statically mapped kernel segment
38 * (XCHAL_KSEG_{CACHED,BYPASS}_SIZE), ie. 128 MB. 38 * (XCHAL_KSEG_{CACHED,BYPASS}_SIZE), ie. 128 MB.
39 * 39 *
40 * NOTE: When the entire KSEG area is DMA capable, we substract 40 * NOTE: When the entire KSEG area is DMA capable, we subtract
41 * one from the max address so that the virt_to_phys() macro 41 * one from the max address so that the virt_to_phys() macro
42 * works correctly on the address (otherwise the address 42 * works correctly on the address (otherwise the address
43 * enters another area, and virt_to_phys() may not return 43 * enters another area, and virt_to_phys() may not return
diff --git a/arch/xtensa/include/asm/types.h b/arch/xtensa/include/asm/types.h
index c89569a8da0c..b1c981e39b52 100644
--- a/arch/xtensa/include/asm/types.h
+++ b/arch/xtensa/include/asm/types.h
@@ -32,10 +32,6 @@ typedef unsigned short umode_t;
32 32
33#define BITS_PER_LONG 32 33#define BITS_PER_LONG 32
34 34
35/* Dma addresses are 32-bits wide. */
36
37typedef u32 dma_addr_t;
38
39#endif /* __KERNEL__ */ 35#endif /* __KERNEL__ */
40#endif 36#endif
41 37
diff --git a/arch/xtensa/kernel/entry.S b/arch/xtensa/kernel/entry.S
index 5fd01f6aaf37..6223f3346b5c 100644
--- a/arch/xtensa/kernel/entry.S
+++ b/arch/xtensa/kernel/entry.S
@@ -1026,7 +1026,7 @@ ENTRY(fast_syscall_unrecoverable)
1026 * TRY adds an entry to the __ex_table fixup table for the immediately 1026 * TRY adds an entry to the __ex_table fixup table for the immediately
1027 * following instruction. 1027 * following instruction.
1028 * 1028 *
1029 * CATCH catches any exception that occurred at one of the preceeding TRY 1029 * CATCH catches any exception that occurred at one of the preceding TRY
1030 * statements and continues from there 1030 * statements and continues from there
1031 * 1031 *
1032 * Usage TRY l32i a0, a1, 0 1032 * Usage TRY l32i a0, a1, 0
diff --git a/arch/xtensa/kernel/irq.c b/arch/xtensa/kernel/irq.c
index 87508886cbbd..4340ee076bd5 100644
--- a/arch/xtensa/kernel/irq.c
+++ b/arch/xtensa/kernel/irq.c
@@ -35,7 +35,6 @@ atomic_t irq_err_count;
35asmlinkage void do_IRQ(int irq, struct pt_regs *regs) 35asmlinkage void do_IRQ(int irq, struct pt_regs *regs)
36{ 36{
37 struct pt_regs *old_regs = set_irq_regs(regs); 37 struct pt_regs *old_regs = set_irq_regs(regs);
38 struct irq_desc *desc = irq_desc + irq;
39 38
40 if (irq >= NR_IRQS) { 39 if (irq >= NR_IRQS) {
41 printk(KERN_EMERG "%s: cannot handle IRQ %d\n", 40 printk(KERN_EMERG "%s: cannot handle IRQ %d\n",
@@ -57,104 +56,63 @@ asmlinkage void do_IRQ(int irq, struct pt_regs *regs)
57 sp - sizeof(struct thread_info)); 56 sp - sizeof(struct thread_info));
58 } 57 }
59#endif 58#endif
60 desc->handle_irq(irq, desc); 59 generic_handle_irq(irq);
61 60
62 irq_exit(); 61 irq_exit();
63 set_irq_regs(old_regs); 62 set_irq_regs(old_regs);
64} 63}
65 64
66/* 65int arch_show_interrupts(struct seq_file *p, int prec)
67 * Generic, controller-independent functions:
68 */
69
70int show_interrupts(struct seq_file *p, void *v)
71{ 66{
72 int i = *(loff_t *) v, j; 67 seq_printf(p, "%*s: ", prec, "ERR");
73 struct irqaction * action; 68 seq_printf(p, "%10u\n", atomic_read(&irq_err_count));
74 unsigned long flags;
75
76 if (i == 0) {
77 seq_printf(p, " ");
78 for_each_online_cpu(j)
79 seq_printf(p, "CPU%d ",j);
80 seq_putc(p, '\n');
81 }
82
83 if (i < NR_IRQS) {
84 raw_spin_lock_irqsave(&irq_desc[i].lock, flags);
85 action = irq_desc[i].action;
86 if (!action)
87 goto skip;
88 seq_printf(p, "%3d: ",i);
89#ifndef CONFIG_SMP
90 seq_printf(p, "%10u ", kstat_irqs(i));
91#else
92 for_each_online_cpu(j)
93 seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
94#endif
95 seq_printf(p, " %14s", irq_desc[i].chip->name);
96 seq_printf(p, " %s", action->name);
97
98 for (action=action->next; action; action = action->next)
99 seq_printf(p, ", %s", action->name);
100
101 seq_putc(p, '\n');
102skip:
103 raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags);
104 } else if (i == NR_IRQS) {
105 seq_printf(p, "NMI: ");
106 for_each_online_cpu(j)
107 seq_printf(p, "%10u ", nmi_count(j));
108 seq_putc(p, '\n');
109 seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
110 }
111 return 0; 69 return 0;
112} 70}
113 71
114static void xtensa_irq_mask(unsigned int irq) 72static void xtensa_irq_mask(struct irq_data *d)
115{ 73{
116 cached_irq_mask &= ~(1 << irq); 74 cached_irq_mask &= ~(1 << d->irq);
117 set_sr (cached_irq_mask, INTENABLE); 75 set_sr (cached_irq_mask, INTENABLE);
118} 76}
119 77
120static void xtensa_irq_unmask(unsigned int irq) 78static void xtensa_irq_unmask(struct irq_data *d)
121{ 79{
122 cached_irq_mask |= 1 << irq; 80 cached_irq_mask |= 1 << d->irq;
123 set_sr (cached_irq_mask, INTENABLE); 81 set_sr (cached_irq_mask, INTENABLE);
124} 82}
125 83
126static void xtensa_irq_enable(unsigned int irq) 84static void xtensa_irq_enable(struct irq_data *d)
127{ 85{
128 variant_irq_enable(irq); 86 variant_irq_enable(d->irq);
129 xtensa_irq_unmask(irq); 87 xtensa_irq_unmask(d->irq);
130} 88}
131 89
132static void xtensa_irq_disable(unsigned int irq) 90static void xtensa_irq_disable(struct irq_data *d)
133{ 91{
134 xtensa_irq_mask(irq); 92 xtensa_irq_mask(d->irq);
135 variant_irq_disable(irq); 93 variant_irq_disable(d->irq);
136} 94}
137 95
138static void xtensa_irq_ack(unsigned int irq) 96static void xtensa_irq_ack(struct irq_data *d)
139{ 97{
140 set_sr(1 << irq, INTCLEAR); 98 set_sr(1 << d->irq, INTCLEAR);
141} 99}
142 100
143static int xtensa_irq_retrigger(unsigned int irq) 101static int xtensa_irq_retrigger(struct irq_data *d)
144{ 102{
145 set_sr (1 << irq, INTSET); 103 set_sr (1 << d->irq, INTSET);
146 return 1; 104 return 1;
147} 105}
148 106
149 107
150static struct irq_chip xtensa_irq_chip = { 108static struct irq_chip xtensa_irq_chip = {
151 .name = "xtensa", 109 .name = "xtensa",
152 .enable = xtensa_irq_enable, 110 .irq_enable = xtensa_irq_enable,
153 .disable = xtensa_irq_disable, 111 .irq_disable = xtensa_irq_disable,
154 .mask = xtensa_irq_mask, 112 .irq_mask = xtensa_irq_mask,
155 .unmask = xtensa_irq_unmask, 113 .irq_unmask = xtensa_irq_unmask,
156 .ack = xtensa_irq_ack, 114 .irq_ack = xtensa_irq_ack,
157 .retrigger = xtensa_irq_retrigger, 115 .irq_retrigger = xtensa_irq_retrigger,
158}; 116};
159 117
160void __init init_IRQ(void) 118void __init init_IRQ(void)
@@ -165,25 +123,25 @@ void __init init_IRQ(void)
165 int mask = 1 << index; 123 int mask = 1 << index;
166 124
167 if (mask & XCHAL_INTTYPE_MASK_SOFTWARE) 125 if (mask & XCHAL_INTTYPE_MASK_SOFTWARE)
168 set_irq_chip_and_handler(index, &xtensa_irq_chip, 126 irq_set_chip_and_handler(index, &xtensa_irq_chip,
169 handle_simple_irq); 127 handle_simple_irq);
170 128
171 else if (mask & XCHAL_INTTYPE_MASK_EXTERN_EDGE) 129 else if (mask & XCHAL_INTTYPE_MASK_EXTERN_EDGE)
172 set_irq_chip_and_handler(index, &xtensa_irq_chip, 130 irq_set_chip_and_handler(index, &xtensa_irq_chip,
173 handle_edge_irq); 131 handle_edge_irq);
174 132
175 else if (mask & XCHAL_INTTYPE_MASK_EXTERN_LEVEL) 133 else if (mask & XCHAL_INTTYPE_MASK_EXTERN_LEVEL)
176 set_irq_chip_and_handler(index, &xtensa_irq_chip, 134 irq_set_chip_and_handler(index, &xtensa_irq_chip,
177 handle_level_irq); 135 handle_level_irq);
178 136
179 else if (mask & XCHAL_INTTYPE_MASK_TIMER) 137 else if (mask & XCHAL_INTTYPE_MASK_TIMER)
180 set_irq_chip_and_handler(index, &xtensa_irq_chip, 138 irq_set_chip_and_handler(index, &xtensa_irq_chip,
181 handle_edge_irq); 139 handle_edge_irq);
182 140
183 else /* XCHAL_INTTYPE_MASK_WRITE_ERROR */ 141 else /* XCHAL_INTTYPE_MASK_WRITE_ERROR */
184 /* XCHAL_INTTYPE_MASK_NMI */ 142 /* XCHAL_INTTYPE_MASK_NMI */
185 143
186 set_irq_chip_and_handler(index, &xtensa_irq_chip, 144 irq_set_chip_and_handler(index, &xtensa_irq_chip,
187 handle_level_irq); 145 handle_level_irq);
188 } 146 }
189 147
diff --git a/arch/xtensa/platforms/s6105/device.c b/arch/xtensa/platforms/s6105/device.c
index 65333ffefb07..4f4fc971042f 100644
--- a/arch/xtensa/platforms/s6105/device.c
+++ b/arch/xtensa/platforms/s6105/device.c
@@ -120,7 +120,7 @@ static int __init prepare_phy_irq(int pin)
120 irq = gpio_to_irq(pin); 120 irq = gpio_to_irq(pin);
121 if (irq < 0) 121 if (irq < 0)
122 goto free; 122 goto free;
123 if (set_irq_type(irq, IRQ_TYPE_LEVEL_LOW) < 0) 123 if (irq_set_irq_type(irq, IRQ_TYPE_LEVEL_LOW) < 0)
124 goto free; 124 goto free;
125 return irq; 125 return irq;
126free: 126free:
diff --git a/arch/xtensa/variants/s6000/gpio.c b/arch/xtensa/variants/s6000/gpio.c
index 380a70fff756..7af0757e001b 100644
--- a/arch/xtensa/variants/s6000/gpio.c
+++ b/arch/xtensa/variants/s6000/gpio.c
@@ -85,30 +85,29 @@ int s6_gpio_init(u32 afsel)
85 return gpiochip_add(&gpiochip); 85 return gpiochip_add(&gpiochip);
86} 86}
87 87
88static void ack(unsigned int irq) 88static void ack(struct irq_data *d)
89{ 89{
90 writeb(1 << (irq - IRQ_BASE), S6_REG_GPIO + S6_GPIO_IC); 90 writeb(1 << (d->irq - IRQ_BASE), S6_REG_GPIO + S6_GPIO_IC);
91} 91}
92 92
93static void mask(unsigned int irq) 93static void mask(struct irq_data *d)
94{ 94{
95 u8 r = readb(S6_REG_GPIO + S6_GPIO_IE); 95 u8 r = readb(S6_REG_GPIO + S6_GPIO_IE);
96 r &= ~(1 << (irq - IRQ_BASE)); 96 r &= ~(1 << (d->irq - IRQ_BASE));
97 writeb(r, S6_REG_GPIO + S6_GPIO_IE); 97 writeb(r, S6_REG_GPIO + S6_GPIO_IE);
98} 98}
99 99
100static void unmask(unsigned int irq) 100static void unmask(struct irq_data *d)
101{ 101{
102 u8 m = readb(S6_REG_GPIO + S6_GPIO_IE); 102 u8 m = readb(S6_REG_GPIO + S6_GPIO_IE);
103 m |= 1 << (irq - IRQ_BASE); 103 m |= 1 << (d->irq - IRQ_BASE);
104 writeb(m, S6_REG_GPIO + S6_GPIO_IE); 104 writeb(m, S6_REG_GPIO + S6_GPIO_IE);
105} 105}
106 106
107static int set_type(unsigned int irq, unsigned int type) 107static int set_type(struct irq_data *d, unsigned int type)
108{ 108{
109 const u8 m = 1 << (irq - IRQ_BASE); 109 const u8 m = 1 << (d->irq - IRQ_BASE);
110 irq_flow_handler_t handler; 110 irq_flow_handler_t handler;
111 struct irq_desc *desc;
112 u8 reg; 111 u8 reg;
113 112
114 if (type == IRQ_TYPE_PROBE) { 113 if (type == IRQ_TYPE_PROBE) {
@@ -129,8 +128,7 @@ static int set_type(unsigned int irq, unsigned int type)
129 handler = handle_edge_irq; 128 handler = handle_edge_irq;
130 } 129 }
131 writeb(reg, S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_IS); 130 writeb(reg, S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_IS);
132 desc = irq_to_desc(irq); 131 __irq_set_handler_locked(irq, handler);
133 desc->handle_irq = handler;
134 132
135 reg = readb(S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_IEV); 133 reg = readb(S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_IEV);
136 if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_EDGE_RISING)) 134 if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_EDGE_RISING))
@@ -150,22 +148,23 @@ static int set_type(unsigned int irq, unsigned int type)
150 148
151static struct irq_chip gpioirqs = { 149static struct irq_chip gpioirqs = {
152 .name = "GPIO", 150 .name = "GPIO",
153 .ack = ack, 151 .irq_ack = ack,
154 .mask = mask, 152 .irq_mask = mask,
155 .unmask = unmask, 153 .irq_unmask = unmask,
156 .set_type = set_type, 154 .irq_set_type = set_type,
157}; 155};
158 156
159static u8 demux_masks[4]; 157static u8 demux_masks[4];
160 158
161static void demux_irqs(unsigned int irq, struct irq_desc *desc) 159static void demux_irqs(unsigned int irq, struct irq_desc *desc)
162{ 160{
163 u8 *mask = get_irq_desc_data(desc); 161 struct irq_chip *chip = irq_desc_get_chip(desc);
162 u8 *mask = irq_desc_get_handler_data(desc);
164 u8 pending; 163 u8 pending;
165 int cirq; 164 int cirq;
166 165
167 desc->chip->mask(irq); 166 chip->irq_mask(&desc->irq_data);
168 desc->chip->ack(irq); 167 chip->irq_ack(&desc->irq_data));
169 pending = readb(S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_MIS) & *mask; 168 pending = readb(S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_MIS) & *mask;
170 cirq = IRQ_BASE - 1; 169 cirq = IRQ_BASE - 1;
171 while (pending) { 170 while (pending) {
@@ -174,7 +173,7 @@ static void demux_irqs(unsigned int irq, struct irq_desc *desc)
174 pending >>= n; 173 pending >>= n;
175 generic_handle_irq(cirq); 174 generic_handle_irq(cirq);
176 } 175 }
177 desc->chip->unmask(irq); 176 chip->irq_unmask(&desc->irq_data));
178} 177}
179 178
180extern const signed char *platform_irq_mappings[XTENSA_NR_IRQS]; 179extern const signed char *platform_irq_mappings[XTENSA_NR_IRQS];
@@ -219,11 +218,11 @@ void __init variant_init_irq(void)
219 i = ffs(mask); 218 i = ffs(mask);
220 cirq += i; 219 cirq += i;
221 mask >>= i; 220 mask >>= i;
222 set_irq_chip(cirq, &gpioirqs); 221 irq_set_chip(cirq, &gpioirqs);
223 set_irq_type(irq, IRQ_TYPE_LEVEL_LOW); 222 irq_set_irq_type(irq, IRQ_TYPE_LEVEL_LOW);
224 } while (mask); 223 } while (mask);
225 set_irq_data(irq, demux_masks + n); 224 irq_set_handler_data(irq, demux_masks + n);
226 set_irq_chained_handler(irq, demux_irqs); 225 irq_set_chained_handler(irq, demux_irqs);
227 if (++n == ARRAY_SIZE(demux_masks)) 226 if (++n == ARRAY_SIZE(demux_masks))
228 break; 227 break;
229 } 228 }