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authorChris Zankel <chris@zankel.net>2014-02-24 03:34:36 -0500
committerChris Zankel <chris@zankel.net>2014-02-24 03:34:36 -0500
commitb3fdfc1b4b641d372e35ced98814289bc60bc5d1 (patch)
tree5f11d5ba885031dde45690745646519fb887f447 /arch/xtensa
parentc0e50d41126e4786d9cf1105bdf783e55c99f915 (diff)
parentf63b6d7555cd4064554b39da4d44c4cbbc9d6a4a (diff)
Merge tag 'xtensa-for-next-20140221-1' into for_next
Xtensa fixes for 3.14: - allow booting xtfpga on boards with new uBoot and >128MBytes memory; - drop nonexistent GPIO32 support from fsf variant; - don't select USE_GENERIC_SMP_HELPERS; - enable common clock framework support, set up ethoc clock on xtfpga; - wire up sched_setattr and sched_getattr syscalls. Signed-off-by: Chris Zankel <chris@zankel.net>
Diffstat (limited to 'arch/xtensa')
-rw-r--r--arch/xtensa/Kconfig7
-rw-r--r--arch/xtensa/boot/dts/xtfpga.dtsi12
-rw-r--r--arch/xtensa/include/asm/Kbuild1
-rw-r--r--arch/xtensa/include/asm/barrier.h15
-rw-r--r--arch/xtensa/include/uapi/asm/socket.h2
-rw-r--r--arch/xtensa/include/uapi/asm/unistd.h7
-rw-r--r--arch/xtensa/kernel/setup.c2
-rw-r--r--arch/xtensa/mm/init.c13
-rw-r--r--arch/xtensa/platforms/iss/simdisk.c14
-rw-r--r--arch/xtensa/platforms/xtfpga/setup.c7
-rw-r--r--arch/xtensa/variants/fsf/include/variant/tie.h9
11 files changed, 49 insertions, 40 deletions
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index c3ccf379289a..c87ae7c6e5f9 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -20,6 +20,7 @@ config XTENSA
20 select HAVE_FUNCTION_TRACER 20 select HAVE_FUNCTION_TRACER
21 select HAVE_IRQ_TIME_ACCOUNTING 21 select HAVE_IRQ_TIME_ACCOUNTING
22 select HAVE_PERF_EVENTS 22 select HAVE_PERF_EVENTS
23 select COMMON_CLK
23 help 24 help
24 Xtensa processors are 32-bit RISC machines designed by Tensilica 25 Xtensa processors are 32-bit RISC machines designed by Tensilica
25 primarily for embedded systems. These processors are both 26 primarily for embedded systems. These processors are both
@@ -65,6 +66,9 @@ config MMU
65config VARIANT_IRQ_SWITCH 66config VARIANT_IRQ_SWITCH
66 def_bool n 67 def_bool n
67 68
69config HAVE_XTENSA_GPIO32
70 def_bool n
71
68config MAY_HAVE_SMP 72config MAY_HAVE_SMP
69 def_bool n 73 def_bool n
70 74
@@ -81,12 +85,14 @@ config XTENSA_VARIANT_FSF
81config XTENSA_VARIANT_DC232B 85config XTENSA_VARIANT_DC232B
82 bool "dc232b - Diamond 232L Standard Core Rev.B (LE)" 86 bool "dc232b - Diamond 232L Standard Core Rev.B (LE)"
83 select MMU 87 select MMU
88 select HAVE_XTENSA_GPIO32
84 help 89 help
85 This variant refers to Tensilica's Diamond 232L Standard core Rev.B (LE). 90 This variant refers to Tensilica's Diamond 232L Standard core Rev.B (LE).
86 91
87config XTENSA_VARIANT_DC233C 92config XTENSA_VARIANT_DC233C
88 bool "dc233c - Diamond 233L Standard Core Rev.C (LE)" 93 bool "dc233c - Diamond 233L Standard Core Rev.C (LE)"
89 select MMU 94 select MMU
95 select HAVE_XTENSA_GPIO32
90 help 96 help
91 This variant refers to Tensilica's Diamond 233L Standard core Rev.C (LE). 97 This variant refers to Tensilica's Diamond 233L Standard core Rev.C (LE).
92 98
@@ -129,7 +135,6 @@ config HAVE_SMP
129config SMP 135config SMP
130 bool "Enable Symmetric multi-processing support" 136 bool "Enable Symmetric multi-processing support"
131 depends on HAVE_SMP 137 depends on HAVE_SMP
132 select USE_GENERIC_SMP_HELPERS
133 select GENERIC_SMP_IDLE_THREAD 138 select GENERIC_SMP_IDLE_THREAD
134 help 139 help
135 Enabled SMP Software; allows more than one CPU/CORE 140 Enabled SMP Software; allows more than one CPU/CORE
diff --git a/arch/xtensa/boot/dts/xtfpga.dtsi b/arch/xtensa/boot/dts/xtfpga.dtsi
index 46b4f5eab421..e7370b11348e 100644
--- a/arch/xtensa/boot/dts/xtfpga.dtsi
+++ b/arch/xtensa/boot/dts/xtfpga.dtsi
@@ -35,6 +35,13 @@
35 interrupt-controller; 35 interrupt-controller;
36 }; 36 };
37 37
38 clocks {
39 osc: main-oscillator {
40 #clock-cells = <0>;
41 compatible = "fixed-clock";
42 };
43 };
44
38 serial0: serial@fd050020 { 45 serial0: serial@fd050020 {
39 device_type = "serial"; 46 device_type = "serial";
40 compatible = "ns16550a"; 47 compatible = "ns16550a";
@@ -42,9 +49,7 @@
42 reg = <0xfd050020 0x20>; 49 reg = <0xfd050020 0x20>;
43 reg-shift = <2>; 50 reg-shift = <2>;
44 interrupts = <0 1>; /* external irq 0 */ 51 interrupts = <0 1>; /* external irq 0 */
45 /* Filled in by platform_setup from FPGA register 52 clocks = <&osc>;
46 * clock-frequency = <100000000>;
47 */
48 }; 53 };
49 54
50 enet0: ethoc@fd030000 { 55 enet0: ethoc@fd030000 {
@@ -52,5 +57,6 @@
52 reg = <0xfd030000 0x4000 0xfd800000 0x4000>; 57 reg = <0xfd030000 0x4000 0xfd800000 0x4000>;
53 interrupts = <1 1>; /* external irq 1 */ 58 interrupts = <1 1>; /* external irq 1 */
54 local-mac-address = [00 50 c2 13 6f 00]; 59 local-mac-address = [00 50 c2 13 6f 00];
60 clocks = <&osc>;
55 }; 61 };
56}; 62};
diff --git a/arch/xtensa/include/asm/Kbuild b/arch/xtensa/include/asm/Kbuild
index 5851db291583..0a337e4a8370 100644
--- a/arch/xtensa/include/asm/Kbuild
+++ b/arch/xtensa/include/asm/Kbuild
@@ -28,3 +28,4 @@ generic-y += topology.h
28generic-y += trace_clock.h 28generic-y += trace_clock.h
29generic-y += xor.h 29generic-y += xor.h
30generic-y += preempt.h 30generic-y += preempt.h
31generic-y += hash.h
diff --git a/arch/xtensa/include/asm/barrier.h b/arch/xtensa/include/asm/barrier.h
index 8e5e5c980a7a..0a24b04d6b21 100644
--- a/arch/xtensa/include/asm/barrier.h
+++ b/arch/xtensa/include/asm/barrier.h
@@ -9,23 +9,10 @@
9#ifndef _XTENSA_SYSTEM_H 9#ifndef _XTENSA_SYSTEM_H
10#define _XTENSA_SYSTEM_H 10#define _XTENSA_SYSTEM_H
11 11
12#define smp_read_barrier_depends() do { } while(0)
13#define read_barrier_depends() do { } while(0)
14
15#define mb() ({ __asm__ __volatile__("memw" : : : "memory"); }) 12#define mb() ({ __asm__ __volatile__("memw" : : : "memory"); })
16#define rmb() barrier() 13#define rmb() barrier()
17#define wmb() mb() 14#define wmb() mb()
18 15
19#ifdef CONFIG_SMP 16#include <asm-generic/barrier.h>
20#define smp_mb() mb()
21#define smp_rmb() rmb()
22#define smp_wmb() wmb()
23#else
24#define smp_mb() barrier()
25#define smp_rmb() barrier()
26#define smp_wmb() barrier()
27#endif
28
29#define set_mb(var, value) do { var = value; mb(); } while (0)
30 17
31#endif /* _XTENSA_SYSTEM_H */ 18#endif /* _XTENSA_SYSTEM_H */
diff --git a/arch/xtensa/include/uapi/asm/socket.h b/arch/xtensa/include/uapi/asm/socket.h
index 7db5c22faa68..39acec0cf0b1 100644
--- a/arch/xtensa/include/uapi/asm/socket.h
+++ b/arch/xtensa/include/uapi/asm/socket.h
@@ -89,4 +89,6 @@
89 89
90#define SO_MAX_PACING_RATE 47 90#define SO_MAX_PACING_RATE 47
91 91
92#define SO_BPF_EXTENSIONS 48
93
92#endif /* _XTENSA_SOCKET_H */ 94#endif /* _XTENSA_SOCKET_H */
diff --git a/arch/xtensa/include/uapi/asm/unistd.h b/arch/xtensa/include/uapi/asm/unistd.h
index 51940fec6990..b9395529f02d 100644
--- a/arch/xtensa/include/uapi/asm/unistd.h
+++ b/arch/xtensa/include/uapi/asm/unistd.h
@@ -734,7 +734,12 @@ __SYSCALL(332, sys_finit_module, 3)
734#define __NR_accept4 333 734#define __NR_accept4 333
735__SYSCALL(333, sys_accept4, 4) 735__SYSCALL(333, sys_accept4, 4)
736 736
737#define __NR_syscall_count 334 737#define __NR_sched_setattr 334
738__SYSCALL(334, sys_sched_setattr, 2)
739#define __NR_sched_getattr 335
740__SYSCALL(335, sys_sched_getattr, 3)
741
742#define __NR_syscall_count 336
738 743
739/* 744/*
740 * sysxtensa syscall handler 745 * sysxtensa syscall handler
diff --git a/arch/xtensa/kernel/setup.c b/arch/xtensa/kernel/setup.c
index 7d12af1317f1..84fe931bb60e 100644
--- a/arch/xtensa/kernel/setup.c
+++ b/arch/xtensa/kernel/setup.c
@@ -22,6 +22,7 @@
22#include <linux/bootmem.h> 22#include <linux/bootmem.h>
23#include <linux/kernel.h> 23#include <linux/kernel.h>
24#include <linux/percpu.h> 24#include <linux/percpu.h>
25#include <linux/clk-provider.h>
25#include <linux/cpu.h> 26#include <linux/cpu.h>
26#include <linux/of_fdt.h> 27#include <linux/of_fdt.h>
27#include <linux/of_platform.h> 28#include <linux/of_platform.h>
@@ -276,6 +277,7 @@ void __init early_init_devtree(void *params)
276 277
277static int __init xtensa_device_probe(void) 278static int __init xtensa_device_probe(void)
278{ 279{
280 of_clk_init(NULL);
279 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 281 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
280 return 0; 282 return 0;
281} 283}
diff --git a/arch/xtensa/mm/init.c b/arch/xtensa/mm/init.c
index 479d7537a32a..aff108df92d3 100644
--- a/arch/xtensa/mm/init.c
+++ b/arch/xtensa/mm/init.c
@@ -90,7 +90,7 @@ int __init mem_reserve(unsigned long start, unsigned long end, int must_exist)
90 90
91 91
92/* 92/*
93 * Initialize the bootmem system and give it all the memory we have available. 93 * Initialize the bootmem system and give it all low memory we have available.
94 */ 94 */
95 95
96void __init bootmem_init(void) 96void __init bootmem_init(void)
@@ -142,9 +142,14 @@ void __init bootmem_init(void)
142 142
143 /* Add all remaining memory pieces into the bootmem map */ 143 /* Add all remaining memory pieces into the bootmem map */
144 144
145 for (i=0; i<sysmem.nr_banks; i++) 145 for (i = 0; i < sysmem.nr_banks; i++) {
146 free_bootmem(sysmem.bank[i].start, 146 if (sysmem.bank[i].start >> PAGE_SHIFT < max_low_pfn) {
147 sysmem.bank[i].end - sysmem.bank[i].start); 147 unsigned long end = min(max_low_pfn << PAGE_SHIFT,
148 sysmem.bank[i].end);
149 free_bootmem(sysmem.bank[i].start,
150 end - sysmem.bank[i].start);
151 }
152 }
148 153
149} 154}
150 155
diff --git a/arch/xtensa/platforms/iss/simdisk.c b/arch/xtensa/platforms/iss/simdisk.c
index 8c6e819cd8ed..48eebacdf5fe 100644
--- a/arch/xtensa/platforms/iss/simdisk.c
+++ b/arch/xtensa/platforms/iss/simdisk.c
@@ -103,18 +103,18 @@ static void simdisk_transfer(struct simdisk *dev, unsigned long sector,
103 103
104static int simdisk_xfer_bio(struct simdisk *dev, struct bio *bio) 104static int simdisk_xfer_bio(struct simdisk *dev, struct bio *bio)
105{ 105{
106 int i; 106 struct bio_vec bvec;
107 struct bio_vec *bvec; 107 struct bvec_iter iter;
108 sector_t sector = bio->bi_sector; 108 sector_t sector = bio->bi_iter.bi_sector;
109 109
110 bio_for_each_segment(bvec, bio, i) { 110 bio_for_each_segment(bvec, bio, iter) {
111 char *buffer = __bio_kmap_atomic(bio, i); 111 char *buffer = __bio_kmap_atomic(bio, iter);
112 unsigned len = bvec->bv_len >> SECTOR_SHIFT; 112 unsigned len = bvec.bv_len >> SECTOR_SHIFT;
113 113
114 simdisk_transfer(dev, sector, len, buffer, 114 simdisk_transfer(dev, sector, len, buffer,
115 bio_data_dir(bio) == WRITE); 115 bio_data_dir(bio) == WRITE);
116 sector += len; 116 sector += len;
117 __bio_kunmap_atomic(bio); 117 __bio_kunmap_atomic(buffer);
118 } 118 }
119 return 0; 119 return 0;
120} 120}
diff --git a/arch/xtensa/platforms/xtfpga/setup.c b/arch/xtensa/platforms/xtfpga/setup.c
index 800227862fe8..57fd08b36f51 100644
--- a/arch/xtensa/platforms/xtfpga/setup.c
+++ b/arch/xtensa/platforms/xtfpga/setup.c
@@ -135,11 +135,11 @@ static void __init update_local_mac(struct device_node *node)
135 135
136static int __init machine_setup(void) 136static int __init machine_setup(void)
137{ 137{
138 struct device_node *serial; 138 struct device_node *clock;
139 struct device_node *eth = NULL; 139 struct device_node *eth = NULL;
140 140
141 for_each_compatible_node(serial, NULL, "ns16550a") 141 for_each_node_by_name(clock, "main-oscillator")
142 update_clock_frequency(serial); 142 update_clock_frequency(clock);
143 143
144 if ((eth = of_find_compatible_node(eth, NULL, "opencores,ethoc"))) 144 if ((eth = of_find_compatible_node(eth, NULL, "opencores,ethoc")))
145 update_local_mac(eth); 145 update_local_mac(eth);
@@ -290,6 +290,7 @@ static int __init xtavnet_init(void)
290 * knows whether they set it correctly on the DIP switches. 290 * knows whether they set it correctly on the DIP switches.
291 */ 291 */
292 pr_info("XTFPGA: Ethernet MAC %pM\n", ethoc_pdata.hwaddr); 292 pr_info("XTFPGA: Ethernet MAC %pM\n", ethoc_pdata.hwaddr);
293 ethoc_pdata.eth_clkfreq = *(long *)XTFPGA_CLKFRQ_VADDR;
293 294
294 return 0; 295 return 0;
295} 296}
diff --git a/arch/xtensa/variants/fsf/include/variant/tie.h b/arch/xtensa/variants/fsf/include/variant/tie.h
index bf4020116df5..244cdea4dee5 100644
--- a/arch/xtensa/variants/fsf/include/variant/tie.h
+++ b/arch/xtensa/variants/fsf/include/variant/tie.h
@@ -18,13 +18,6 @@
18#define XCHAL_CP_MASK 0x00 /* bitmask of all CPs by ID */ 18#define XCHAL_CP_MASK 0x00 /* bitmask of all CPs by ID */
19#define XCHAL_CP_PORT_MASK 0x00 /* bitmask of only port CPs */ 19#define XCHAL_CP_PORT_MASK 0x00 /* bitmask of only port CPs */
20 20
21/* Basic parameters of each coprocessor: */
22#define XCHAL_CP7_NAME "XTIOP"
23#define XCHAL_CP7_IDENT XTIOP
24#define XCHAL_CP7_SA_SIZE 0 /* size of state save area */
25#define XCHAL_CP7_SA_ALIGN 1 /* min alignment of save area */
26#define XCHAL_CP_ID_XTIOP 7 /* coprocessor ID (0..7) */
27
28/* Filler info for unassigned coprocessors, to simplify arrays etc: */ 21/* Filler info for unassigned coprocessors, to simplify arrays etc: */
29#define XCHAL_NCP_SA_SIZE 0 22#define XCHAL_NCP_SA_SIZE 0
30#define XCHAL_NCP_SA_ALIGN 1 23#define XCHAL_NCP_SA_ALIGN 1
@@ -42,6 +35,8 @@
42#define XCHAL_CP5_SA_ALIGN 1 35#define XCHAL_CP5_SA_ALIGN 1
43#define XCHAL_CP6_SA_SIZE 0 36#define XCHAL_CP6_SA_SIZE 0
44#define XCHAL_CP6_SA_ALIGN 1 37#define XCHAL_CP6_SA_ALIGN 1
38#define XCHAL_CP7_SA_SIZE 0
39#define XCHAL_CP7_SA_ALIGN 1
45 40
46/* Save area for non-coprocessor optional and custom (TIE) state: */ 41/* Save area for non-coprocessor optional and custom (TIE) state: */
47#define XCHAL_NCP_SA_SIZE 0 42#define XCHAL_NCP_SA_SIZE 0