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authorBen Hutchings <ben@decadent.org.uk>2012-01-09 22:04:32 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2012-01-11 18:50:11 -0500
commit9f13a1fd452f11c18004ba2422a6384b424ec8a9 (patch)
tree6aa799a5e095f8cfa03c7386e6d0a20ebda595e4 /arch/xtensa
parent024f78462c3da710642a54939888a92e28704653 (diff)
cpu: Register a generic CPU device on architectures that currently do not
frv, h8300, m68k, microblaze, openrisc, score, um and xtensa currently do not register a CPU device. Add the config option GENERIC_CPU_DEVICES which causes a generic CPU device to be registered for each present CPU, and make all these architectures select it. Richard Weinberger <richard@nod.at> covered UML and suggested using per_cpu. Signed-off-by: Ben Hutchings <ben@decadent.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/xtensa')
-rw-r--r--arch/xtensa/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index c346ccdce0df..8a3f8351f438 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -9,6 +9,7 @@ config XTENSA
9 select HAVE_IDE 9 select HAVE_IDE
10 select HAVE_GENERIC_HARDIRQS 10 select HAVE_GENERIC_HARDIRQS
11 select GENERIC_IRQ_SHOW 11 select GENERIC_IRQ_SHOW
12 select GENERIC_CPU_DEVICES
12 help 13 help
13 Xtensa processors are 32-bit RISC machines designed by Tensilica 14 Xtensa processors are 32-bit RISC machines designed by Tensilica
14 primarily for embedded systems. These processors are both 15 primarily for embedded systems. These processors are both