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authorChris Zankel <chris@zankel.net>2008-11-06 09:40:46 -0500
committerChris Zankel <chris@zankel.net>2008-11-06 13:25:09 -0500
commit367b8112fe2ea5c39a7bb4d263dcdd9b612fae18 (patch)
tree9f3349189718dd2c5678faf0ab38f389786b6925 /arch/xtensa/lib
parent206ead28377fee86b129637edada8c77816cc0d6 (diff)
xtensa: move headers files to arch/xtensa/include
Move all header files for xtensa to arch/xtensa/include and platform and variant header files to the appropriate arch/xtensa/platforms/ and arch/xtensa/variants/ directories. Moving the files gets also rid of all uses of symlinks in the Makefile. This has been completed already for the majority of the architectures and xtensa is one out of six missing. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Chris Zankel <chris@zankel.net>
Diffstat (limited to 'arch/xtensa/lib')
-rw-r--r--arch/xtensa/lib/checksum.S2
-rw-r--r--arch/xtensa/lib/memcopy.S2
-rw-r--r--arch/xtensa/lib/memset.S2
-rw-r--r--arch/xtensa/lib/strncpy_user.S2
-rw-r--r--arch/xtensa/lib/strnlen_user.S2
-rw-r--r--arch/xtensa/lib/usercopy.S2
6 files changed, 6 insertions, 6 deletions
diff --git a/arch/xtensa/lib/checksum.S b/arch/xtensa/lib/checksum.S
index 9d9cd990afa6..df397f932d0e 100644
--- a/arch/xtensa/lib/checksum.S
+++ b/arch/xtensa/lib/checksum.S
@@ -16,7 +16,7 @@
16 16
17#include <asm/errno.h> 17#include <asm/errno.h>
18#include <linux/linkage.h> 18#include <linux/linkage.h>
19#include <asm/variant/core.h> 19#include <variant/core.h>
20 20
21/* 21/*
22 * computes a partial checksum, e.g. for TCP/UDP fragments 22 * computes a partial checksum, e.g. for TCP/UDP fragments
diff --git a/arch/xtensa/lib/memcopy.S b/arch/xtensa/lib/memcopy.S
index ddda8f4bc862..ea59dcd03866 100644
--- a/arch/xtensa/lib/memcopy.S
+++ b/arch/xtensa/lib/memcopy.S
@@ -9,7 +9,7 @@
9 * Copyright (C) 2002 - 2005 Tensilica Inc. 9 * Copyright (C) 2002 - 2005 Tensilica Inc.
10 */ 10 */
11 11
12#include <asm/variant/core.h> 12#include <variant/core.h>
13 13
14 .macro src_b r, w0, w1 14 .macro src_b r, w0, w1
15#ifdef __XTENSA_EB__ 15#ifdef __XTENSA_EB__
diff --git a/arch/xtensa/lib/memset.S b/arch/xtensa/lib/memset.S
index 56a17495b2db..10b8c400f175 100644
--- a/arch/xtensa/lib/memset.S
+++ b/arch/xtensa/lib/memset.S
@@ -11,7 +11,7 @@
11 * Copyright (C) 2002 Tensilica Inc. 11 * Copyright (C) 2002 Tensilica Inc.
12 */ 12 */
13 13
14#include <asm/variant/core.h> 14#include <variant/core.h>
15 15
16/* 16/*
17 * void *memset(void *dst, int c, size_t length) 17 * void *memset(void *dst, int c, size_t length)
diff --git a/arch/xtensa/lib/strncpy_user.S b/arch/xtensa/lib/strncpy_user.S
index b2655d94558d..9f603cdaaa68 100644
--- a/arch/xtensa/lib/strncpy_user.S
+++ b/arch/xtensa/lib/strncpy_user.S
@@ -11,7 +11,7 @@
11 * Copyright (C) 2002 Tensilica Inc. 11 * Copyright (C) 2002 Tensilica Inc.
12 */ 12 */
13 13
14#include <asm/variant/core.h> 14#include <variant/core.h>
15#include <linux/errno.h> 15#include <linux/errno.h>
16 16
17/* Load or store instructions that may cause exceptions use the EX macro. */ 17/* Load or store instructions that may cause exceptions use the EX macro. */
diff --git a/arch/xtensa/lib/strnlen_user.S b/arch/xtensa/lib/strnlen_user.S
index ad3f616322ca..23f2a89816a1 100644
--- a/arch/xtensa/lib/strnlen_user.S
+++ b/arch/xtensa/lib/strnlen_user.S
@@ -11,7 +11,7 @@
11 * Copyright (C) 2002 Tensilica Inc. 11 * Copyright (C) 2002 Tensilica Inc.
12 */ 12 */
13 13
14#include <asm/variant/core.h> 14#include <variant/core.h>
15 15
16/* Load or store instructions that may cause exceptions use the EX macro. */ 16/* Load or store instructions that may cause exceptions use the EX macro. */
17 17
diff --git a/arch/xtensa/lib/usercopy.S b/arch/xtensa/lib/usercopy.S
index a8ab1d4fe0ae..46d60314bb16 100644
--- a/arch/xtensa/lib/usercopy.S
+++ b/arch/xtensa/lib/usercopy.S
@@ -53,7 +53,7 @@
53 * a11/ original length 53 * a11/ original length
54 */ 54 */
55 55
56#include <asm/variant/core.h> 56#include <variant/core.h>
57 57
58#ifdef __XTENSA_EB__ 58#ifdef __XTENSA_EB__
59#define ALIGN(R, W0, W1) src R, W0, W1 59#define ALIGN(R, W0, W1) src R, W0, W1