Merge tag 'xtensa-next-20130508' of git://github.com/czankel/xtensa-linux

Pull xtensa updates from Chris Zankel:
 "Support for the latest MMU architecture that allows for a larger
  accessible memory region, and various bug-fixes"

* tag 'xtensa-next-20130508' of git://github.com/czankel/xtensa-linux:
  xtensa: Switch to asm-generic/linkage.h
  xtensa: fix redboot load address
  xtensa: ISS: fix timer_lock usage in rs_open
  xtensa: disable IRQs while IRQ handler is running
  xtensa: enable lockdep support
  xtensa: fix arch_irqs_disabled_flags implementation
  xtensa: add irq flags trace support
  xtensa: provide custom CALLER_ADDR* implementations
  xtensa: add stacktrace support
  xtensa: clean up stpill_registers
  xtensa: don't use a7 in simcalls
  xtensa: don't attempt to use unconfigured timers
  xtensa: provide default platform_pcibios_init implementation
  xtensa: remove KCORE_ELF again
  xtensa: document MMUv3 setup sequence
  xtensa: add MMU v3 support
  xtensa: fix ibreakenable register update
  xtensa: fix oprofile building as module

9 files changed, 265 insertions, 123 deletions

diff --git a/arch/xtensa/kernel/Makefile b/arch/xtensa/kernel/Makefile
index c3a59d992ac0..1e7fc87a94bb 100644
--- a/arch/xtensa/kernel/Makefile
+++ b/arch/xtensa/kernel/Makefile
@@ -4,14 +4,16 @@
 
 extra-y := head.o vmlinux.lds
 
-obj-y := align.o entry.o irq.o coprocessor.o process.o ptrace.o \
-         setup.o signal.o syscall.o time.o traps.o vectors.o platform.o  \
-         pci-dma.o
+obj-y := align.o coprocessor.o entry.o irq.o pci-dma.o platform.o process.o \
+         ptrace.o setup.o signal.o stacktrace.o syscall.o time.o traps.o \
+         vectors.o
 
 obj-$(CONFIG_KGDB) += xtensa-stub.o
 obj-$(CONFIG_PCI) += pci.o
 obj-$(CONFIG_MODULES) += xtensa_ksyms.o module.o
 
+AFLAGS_head.o += -mtext-section-literals
+
 # In the Xtensa architecture, assembly generates literals which must always
 # precede the L32R instruction with a relative offset less than 256 kB.
 # Therefore, the .text and .literal section must be combined in parenthesis
diff --git a/arch/xtensa/kernel/entry.S b/arch/xtensa/kernel/entry.S
index 63845f950792..5082507d5631 100644
--- a/arch/xtensa/kernel/entry.S
+++ b/arch/xtensa/kernel/entry.S
@@ -354,16 +354,16 @@ common_exception:
          * so we can allow exceptions and interrupts (*) again.
          * Set PS(EXCM = 0, UM = 0, RING = 0, OWB = 0, WOE = 1, INTLEVEL = X)
          *
-         * (*) We only allow interrupts of higher priority than current IRQ
+         * (*) We only allow interrupts if they were previously enabled and
+         *     we're not handling an IRQ
          */
 
         rsr     a3, ps
-        addi    a0, a0, -4
-        movi    a2, 1
+        addi    a0, a0, -EXCCAUSE_LEVEL1_INTERRUPT
+        movi    a2, LOCKLEVEL
         extui   a3, a3, PS_INTLEVEL_SHIFT, PS_INTLEVEL_WIDTH
                                         # a3 = PS.INTLEVEL
-        movnez  a2, a3, a3              # a2 = 1: level-1, > 1: high priority
-        moveqz  a3, a2, a0              # a3 = IRQ level iff interrupt
+        moveqz  a3, a2, a0              # a3 = LOCKLEVEL iff interrupt
         movi    a2, 1 << PS_WOE_BIT
         or      a3, a3, a2
         rsr     a0, exccause
@@ -389,6 +389,22 @@ common_exception:
 
         save_xtregs_opt a1 a2 a4 a5 a6 a7 PT_XTREGS_OPT
         
+#ifdef CONFIG_TRACE_IRQFLAGS
+        l32i    a4, a1, PT_DEPC
+        /* Double exception means we came here with an exception
+         * while PS.EXCM was set, i.e. interrupts disabled.
+         */
+        bgeui   a4, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f
+        l32i    a4, a1, PT_EXCCAUSE
+        bnei    a4, EXCCAUSE_LEVEL1_INTERRUPT, 1f
+        /* We came here with an interrupt means interrupts were enabled
+         * and we've just disabled them.
+         */
+        movi    a4, trace_hardirqs_off
+        callx4  a4
+1:
+#endif
+
         /* Go to second-level dispatcher. Set up parameters to pass to the
          * exception handler and call the exception handler.
          */
@@ -407,11 +423,29 @@ common_exception:
         .global common_exception_return
 common_exception_return:
 
+#ifdef CONFIG_TRACE_IRQFLAGS
+        l32i    a4, a1, PT_DEPC
+        /* Double exception means we came here with an exception
+         * while PS.EXCM was set, i.e. interrupts disabled.
+         */
+        bgeui   a4, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f
+        l32i    a4, a1, PT_EXCCAUSE
+        bnei    a4, EXCCAUSE_LEVEL1_INTERRUPT, 1f
+        /* We came here with an interrupt means interrupts were enabled
+         * and we'll reenable them on return.
+         */
+        movi    a4, trace_hardirqs_on
+        callx4  a4
+1:
+#endif
+
         /* Jump if we are returning from kernel exceptions. */
 
 1:      l32i    a3, a1, PT_PS
         _bbci.l a3, PS_UM_BIT, 4f
 
+        rsil    a2, 0
+
         /* Specific to a user exception exit:
          * We need to check some flags for signal handling and rescheduling,
          * and have to restore WB and WS, extra states, and all registers
@@ -652,51 +686,19 @@ common_exception_exit:
 
         l32i    a0, a1, PT_DEPC
         l32i    a3, a1, PT_AREG3
-        _bltui  a0, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f
-
-        wsr     a0, depc
         l32i    a2, a1, PT_AREG2
-        l32i    a0, a1, PT_AREG0
-        l32i    a1, a1, PT_AREG1
-        rfde
+        _bgeui  a0, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f
 
-1:
         /* Restore a0...a3 and return */
 
-        rsr     a0, ps
-        extui   a2, a0, PS_INTLEVEL_SHIFT, PS_INTLEVEL_WIDTH
-        movi    a0, 2f
-        slli    a2, a2, 4
-        add     a0, a2, a0
-        l32i    a2, a1, PT_AREG2
-        jx      a0
-
-        .macro  irq_exit_level level
-        .align  16
-        .if     XCHAL_EXCM_LEVEL >= \level
-        l32i    a0, a1, PT_PC
-        wsr     a0, epc\level
         l32i    a0, a1, PT_AREG0
         l32i    a1, a1, PT_AREG1
-        rfi     \level
-        .endif
-        .endm
+        rfe
 
-        .align  16
-2:
+1:      wsr     a0, depc
         l32i    a0, a1, PT_AREG0
         l32i    a1, a1, PT_AREG1
-        rfe
-
-        .align  16
-        /* no rfi for level-1 irq, handled by rfe above*/
-        nop
-
-        irq_exit_level 2
-        irq_exit_level 3
-        irq_exit_level 4
-        irq_exit_level 5
-        irq_exit_level 6
+        rfde
 
 ENDPROC(kernel_exception)
 
diff --git a/arch/xtensa/kernel/head.S b/arch/xtensa/kernel/head.S
index df88f98737f4..ef12c0e6fa25 100644
--- a/arch/xtensa/kernel/head.S
+++ b/arch/xtensa/kernel/head.S
@@ -48,17 +48,36 @@
          */
 
         __HEAD
+        .begin  no-absolute-literals
+
 ENTRY(_start)
 
-        _j      2f
+        /* Preserve the pointer to the boot parameter list in EXCSAVE_1 */
+        wsr     a2, excsave1
+        _j      _SetupMMU
+
+        .align  4
+        .literal_position
+.Lstartup:
+        .word   _startup
+
         .align  4
-1:      .word   _startup
-2:      l32r    a0, 1b
+        .global _SetupMMU
+_SetupMMU:
+        Offset = _SetupMMU - _start
+
+#ifdef CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
+        initialize_mmu
+#endif
+        .end    no-absolute-literals
+
+        l32r    a0, .Lstartup
         jx      a0
 
 ENDPROC(_start)
 
-        .section .init.text, "ax"
+        __INIT
+        .literal_position
 
 ENTRY(_startup)
 
@@ -67,10 +86,6 @@ ENTRY(_startup)
         movi    a0, LOCKLEVEL
         wsr     a0, ps
 
-        /* Preserve the pointer to the boot parameter list in EXCSAVE_1 */
-
-        wsr     a2, excsave1
-
         /* Start with a fresh windowbase and windowstart.  */
 
         movi    a1, 1
@@ -86,7 +101,9 @@ ENTRY(_startup)
         /* Clear debugging registers. */
 
 #if XCHAL_HAVE_DEBUG
+#if XCHAL_NUM_IBREAK > 0
         wsr     a0, ibreakenable
+#endif
         wsr     a0, icount
         movi    a1, 15
         wsr     a0, icountlevel
@@ -156,8 +173,6 @@ ENTRY(_startup)
 
         isync
 
-        initialize_mmu
-
         /* Unpack data sections
          *
          * The linker script used to build the Linux kernel image
@@ -205,6 +220,10 @@ ENTRY(_startup)
 
         ___flush_dcache_all a2 a3
 #endif
+        memw
+        isync
+        ___invalidate_icache_all a2 a3
+        isync
 
         /* Setup stack and enable window exceptions (keep irqs disabled) */
 
diff --git a/arch/xtensa/kernel/platform.c b/arch/xtensa/kernel/platform.c
index 44bf21c3769a..2bd6c351f37c 100644
--- a/arch/xtensa/kernel/platform.c
+++ b/arch/xtensa/kernel/platform.c
@@ -36,6 +36,7 @@ _F(void, power_off, (void), { while(1); });
 _F(void, idle, (void), { __asm__ __volatile__ ("waiti 0" ::: "memory"); });
 _F(void, heartbeat, (void), { });
 _F(int,  pcibios_fixup, (void), { return 0; });
+_F(void, pcibios_init, (void), { });
 
 #ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
 _F(void, calibrate_ccount, (void),
diff --git a/arch/xtensa/kernel/stacktrace.c b/arch/xtensa/kernel/stacktrace.c
new file mode 100644
index 000000000000..7d2c317bd98b
--- /dev/null
+++ b/arch/xtensa/kernel/stacktrace.c
@@ -0,0 +1,120 @@
+/*
+ * arch/xtensa/kernel/stacktrace.c
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2001 - 2013 Tensilica Inc.
+ */
+#include <linux/export.h>
+#include <linux/sched.h>
+#include <linux/stacktrace.h>
+
+#include <asm/stacktrace.h>
+#include <asm/traps.h>
+
+void walk_stackframe(unsigned long *sp,
+                int (*fn)(struct stackframe *frame, void *data),
+                void *data)
+{
+        unsigned long a0, a1;
+        unsigned long sp_end;
+
+        a1 = (unsigned long)sp;
+        sp_end = ALIGN(a1, THREAD_SIZE);
+
+        spill_registers();
+
+        while (a1 < sp_end) {
+                struct stackframe frame;
+
+                sp = (unsigned long *)a1;
+
+                a0 = *(sp - 4);
+                a1 = *(sp - 3);
+
+                if (a1 <= (unsigned long)sp)
+                        break;
+
+                frame.pc = MAKE_PC_FROM_RA(a0, a1);
+                frame.sp = a1;
+
+                if (fn(&frame, data))
+                        return;
+        }
+}
+
+#ifdef CONFIG_STACKTRACE
+
+struct stack_trace_data {
+        struct stack_trace *trace;
+        unsigned skip;
+};
+
+static int stack_trace_cb(struct stackframe *frame, void *data)
+{
+        struct stack_trace_data *trace_data = data;
+        struct stack_trace *trace = trace_data->trace;
+
+        if (trace_data->skip) {
+                --trace_data->skip;
+                return 0;
+        }
+        if (!kernel_text_address(frame->pc))
+                return 0;
+
+        trace->entries[trace->nr_entries++] = frame->pc;
+        return trace->nr_entries >= trace->max_entries;
+}
+
+void save_stack_trace_tsk(struct task_struct *task, struct stack_trace *trace)
+{
+        struct stack_trace_data trace_data = {
+                .trace = trace,
+                .skip = trace->skip,
+        };
+        walk_stackframe(stack_pointer(task), stack_trace_cb, &trace_data);
+}
+EXPORT_SYMBOL_GPL(save_stack_trace_tsk);
+
+void save_stack_trace(struct stack_trace *trace)
+{
+        save_stack_trace_tsk(current, trace);
+}
+EXPORT_SYMBOL_GPL(save_stack_trace);
+
+#endif
+
+#ifdef CONFIG_FRAME_POINTER
+
+struct return_addr_data {
+        unsigned long addr;
+        unsigned skip;
+};
+
+static int return_address_cb(struct stackframe *frame, void *data)
+{
+        struct return_addr_data *r = data;
+
+        if (r->skip) {
+                --r->skip;
+                return 0;
+        }
+        if (!kernel_text_address(frame->pc))
+                return 0;
+        r->addr = frame->pc;
+        return 1;
+}
+
+unsigned long return_address(unsigned level)
+{
+        struct return_addr_data r = {
+                .skip = level + 1,
+        };
+        walk_stackframe(stack_pointer(NULL), return_address_cb, &r);
+        return r.addr;
+}
+EXPORT_SYMBOL(return_address);
+
+#endif
diff --git a/arch/xtensa/kernel/traps.c b/arch/xtensa/kernel/traps.c
index 458186dab5dc..3e8a05c874cd 100644
--- a/arch/xtensa/kernel/traps.c
+++ b/arch/xtensa/kernel/traps.c
@@ -11,7 +11,7 @@
  *
  * Essentially rewritten for the Xtensa architecture port.
  *
- * Copyright (C) 2001 - 2005 Tensilica Inc.
+ * Copyright (C) 2001 - 2013 Tensilica Inc.
  *
  * Joe Taylor   <joe@tensilica.com, joetylr@yahoo.com>
  * Chris Zankel <chris@zankel.net>
@@ -32,6 +32,7 @@
 #include <linux/delay.h>
 #include <linux/hardirq.h>
 
+#include <asm/stacktrace.h>
 #include <asm/ptrace.h>
 #include <asm/timex.h>
 #include <asm/uaccess.h>
@@ -195,7 +196,6 @@ void do_multihit(struct pt_regs *regs, unsigned long exccause)
 
 /*
  * IRQ handler.
- * PS.INTLEVEL is the current IRQ priority level.
  */
 
 extern void do_IRQ(int, struct pt_regs *);
@@ -212,18 +212,21 @@ void do_interrupt(struct pt_regs *regs)
                 XCHAL_INTLEVEL6_MASK,
                 XCHAL_INTLEVEL7_MASK,
         };
-        unsigned level = get_sr(ps) & PS_INTLEVEL_MASK;
-
-        if (WARN_ON_ONCE(level >= ARRAY_SIZE(int_level_mask)))
-                return;
 
         for (;;) {
                 unsigned intread = get_sr(interrupt);
                 unsigned intenable = get_sr(intenable);
-                unsigned int_at_level = intread & intenable &
-                        int_level_mask[level];
+                unsigned int_at_level = intread & intenable;
+                unsigned level;
+
+                for (level = LOCKLEVEL; level > 0; --level) {
+                        if (int_at_level & int_level_mask[level]) {
+                                int_at_level &= int_level_mask[level];
+                                break;
+                        }
+                }
 
-                if (!int_at_level)
+                if (level == 0)
                         return;
 
                 /*
@@ -404,53 +407,25 @@ void show_regs(struct pt_regs * regs)
                        regs->syscall);
 }
 
-static __always_inline unsigned long *stack_pointer(struct task_struct *task)
+static int show_trace_cb(struct stackframe *frame, void *data)
 {
-        unsigned long *sp;
-
-        if (!task || task == current)
-                __asm__ __volatile__ ("mov %0, a1\n" : "=a"(sp));
-        else
-                sp = (unsigned long *)task->thread.sp;
-
-        return sp;
+        if (kernel_text_address(frame->pc)) {
+                printk(" [<%08lx>] ", frame->pc);
+                print_symbol("%s\n", frame->pc);
+        }
+        return 0;
 }
 
 void show_trace(struct task_struct *task, unsigned long *sp)
 {
-        unsigned long a0, a1, pc;
-        unsigned long sp_start, sp_end;
-
-        if (sp)
-                a1 = (unsigned long)sp;
-        else
-                a1 = (unsigned long)stack_pointer(task);
-
-        sp_start = a1 & ~(THREAD_SIZE-1);
-        sp_end = sp_start + THREAD_SIZE;
+        if (!sp)
+                sp = stack_pointer(task);
 
         printk("Call Trace:");
 #ifdef CONFIG_KALLSYMS
         printk("\n");
 #endif
-        spill_registers();
-
-        while (a1 > sp_start && a1 < sp_end) {
-                sp = (unsigned long*)a1;
-
-                a0 = *(sp - 4);
-                a1 = *(sp - 3);
-
-                if (a1 <= (unsigned long) sp)
-                        break;
-
-                pc = MAKE_PC_FROM_RA(a0, a1);
-
-                if (kernel_text_address(pc)) {
-                        printk(" [<%08lx>] ", pc);
-                        print_symbol("%s\n", pc);
-                }
-        }
+        walk_stackframe(sp, show_trace_cb, NULL);
         printk("\n");
 }
 
diff --git a/arch/xtensa/kernel/vectors.S b/arch/xtensa/kernel/vectors.S
index 82109b42e240..f9e175382aa9 100644
--- a/arch/xtensa/kernel/vectors.S
+++ b/arch/xtensa/kernel/vectors.S
@@ -50,6 +50,7 @@
 #include <asm/processor.h>
 #include <asm/page.h>
 #include <asm/thread_info.h>
+#include <asm/vectors.h>
 
 #define WINDOW_VECTORS_SIZE   0x180
 
@@ -220,7 +221,7 @@ ENTRY(_DoubleExceptionVector)
 
         xsr     a0, depc                # get DEPC, save a0
 
-        movi    a3, XCHAL_WINDOW_VECTORS_VADDR
+        movi    a3, WINDOW_VECTORS_VADDR
         _bltu   a0, a3, .Lfixup
         addi    a3, a3, WINDOW_VECTORS_SIZE
         _bgeu   a0, a3, .Lfixup
@@ -385,9 +386,12 @@ ENDPROC(_DebugInterruptVector)
         .if     XCHAL_EXCM_LEVEL >= \level
         .section .Level\level\()InterruptVector.text, "ax"
 ENTRY(_Level\level\()InterruptVector)
-        wsr     a0, epc1
+        wsr     a0, excsave2
         rsr     a0, epc\level
-        xsr     a0, epc1
+        wsr     a0, epc1
+        movi    a0, EXCCAUSE_LEVEL1_INTERRUPT
+        wsr     a0, exccause
+        rsr     a0, eps\level
                                         # branch to user or kernel vector
         j       _SimulateUserKernelVectorException
         .endif
@@ -439,10 +443,8 @@ ENDPROC(_WindowOverflow4)
          */
         .align 4
 _SimulateUserKernelVectorException:
-        wsr     a0, excsave2
-        movi    a0, 4                   # LEVEL1_INTERRUPT cause
-        wsr     a0, exccause
-        rsr     a0, ps
+        addi    a0, a0, (1 << PS_EXCM_BIT)
+        wsr     a0, ps
         bbsi.l  a0, PS_UM_BIT, 1f       # branch if user mode
         rsr     a0, excsave2            # restore a0
         j       _KernelExceptionVector  # simulate kernel vector exception
diff --git a/arch/xtensa/kernel/vmlinux.lds.S b/arch/xtensa/kernel/vmlinux.lds.S
index 14695240536d..21acd11b5df2 100644
--- a/arch/xtensa/kernel/vmlinux.lds.S
+++ b/arch/xtensa/kernel/vmlinux.lds.S
@@ -18,6 +18,7 @@
 #include <asm/page.h>
 #include <asm/thread_info.h>
 
+#include <asm/vectors.h>
 #include <variant/core.h>
 #include <platform/hardware.h>
 OUTPUT_ARCH(xtensa)
@@ -30,7 +31,7 @@ jiffies = jiffies_64;
 #endif
 
 #ifndef KERNELOFFSET
-#define KERNELOFFSET 0xd0001000
+#define KERNELOFFSET 0xd0003000
 #endif
 
 /* Note: In the following macros, it would be nice to specify only the
@@ -185,16 +186,16 @@ SECTIONS
 
   SECTION_VECTOR (_WindowVectors_text,
                   .WindowVectors.text,
-                  XCHAL_WINDOW_VECTORS_VADDR, 4,
+                  WINDOW_VECTORS_VADDR, 4,
                   .dummy)
   SECTION_VECTOR (_DebugInterruptVector_literal,
                   .DebugInterruptVector.literal,
-                  XCHAL_DEBUG_VECTOR_VADDR - 4,
+                  DEBUG_VECTOR_VADDR - 4,
                   SIZEOF(.WindowVectors.text),
                   .WindowVectors.text)
   SECTION_VECTOR (_DebugInterruptVector_text,
                   .DebugInterruptVector.text,
-                  XCHAL_DEBUG_VECTOR_VADDR,
+                  DEBUG_VECTOR_VADDR,
                   4,
                   .DebugInterruptVector.literal)
 #undef LAST
@@ -202,7 +203,7 @@ SECTIONS
 #if XCHAL_EXCM_LEVEL >= 2
   SECTION_VECTOR (_Level2InterruptVector_text,
                   .Level2InterruptVector.text,
-                  XCHAL_INTLEVEL2_VECTOR_VADDR,
+                  INTLEVEL2_VECTOR_VADDR,
                   SIZEOF(LAST), LAST)
 # undef LAST
 # define LAST   .Level2InterruptVector.text
@@ -210,7 +211,7 @@ SECTIONS
 #if XCHAL_EXCM_LEVEL >= 3
   SECTION_VECTOR (_Level3InterruptVector_text,
                   .Level3InterruptVector.text,
-                  XCHAL_INTLEVEL3_VECTOR_VADDR,
+                  INTLEVEL3_VECTOR_VADDR,
                   SIZEOF(LAST), LAST)
 # undef LAST
 # define LAST   .Level3InterruptVector.text
@@ -218,7 +219,7 @@ SECTIONS
 #if XCHAL_EXCM_LEVEL >= 4
   SECTION_VECTOR (_Level4InterruptVector_text,
                   .Level4InterruptVector.text,
-                  XCHAL_INTLEVEL4_VECTOR_VADDR,
+                  INTLEVEL4_VECTOR_VADDR,
                   SIZEOF(LAST), LAST)
 # undef LAST
 # define LAST   .Level4InterruptVector.text
@@ -226,7 +227,7 @@ SECTIONS
 #if XCHAL_EXCM_LEVEL >= 5
   SECTION_VECTOR (_Level5InterruptVector_text,
                   .Level5InterruptVector.text,
-                  XCHAL_INTLEVEL5_VECTOR_VADDR,
+                  INTLEVEL5_VECTOR_VADDR,
                   SIZEOF(LAST), LAST)
 # undef LAST
 # define LAST   .Level5InterruptVector.text
@@ -234,39 +235,39 @@ SECTIONS
 #if XCHAL_EXCM_LEVEL >= 6
   SECTION_VECTOR (_Level6InterruptVector_text,
                   .Level6InterruptVector.text,
-                  XCHAL_INTLEVEL6_VECTOR_VADDR,
+                  INTLEVEL6_VECTOR_VADDR,
                   SIZEOF(LAST), LAST)
 # undef LAST
 # define LAST   .Level6InterruptVector.text
 #endif
   SECTION_VECTOR (_KernelExceptionVector_literal,
                   .KernelExceptionVector.literal,
-                  XCHAL_KERNEL_VECTOR_VADDR - 4,
+                  KERNEL_VECTOR_VADDR - 4,
                   SIZEOF(LAST), LAST)
 #undef LAST
   SECTION_VECTOR (_KernelExceptionVector_text,
                   .KernelExceptionVector.text,
-                  XCHAL_KERNEL_VECTOR_VADDR,
+                  KERNEL_VECTOR_VADDR,
                   4,
                   .KernelExceptionVector.literal)
   SECTION_VECTOR (_UserExceptionVector_literal,
                   .UserExceptionVector.literal,
-                  XCHAL_USER_VECTOR_VADDR - 4,
+                  USER_VECTOR_VADDR - 4,
                   SIZEOF(.KernelExceptionVector.text),
                   .KernelExceptionVector.text)
   SECTION_VECTOR (_UserExceptionVector_text,
                   .UserExceptionVector.text,
-                  XCHAL_USER_VECTOR_VADDR,
+                  USER_VECTOR_VADDR,
                   4,
                   .UserExceptionVector.literal)
   SECTION_VECTOR (_DoubleExceptionVector_literal,
                   .DoubleExceptionVector.literal,
-                  XCHAL_DOUBLEEXC_VECTOR_VADDR - 16,
+                  DOUBLEEXC_VECTOR_VADDR - 16,
                   SIZEOF(.UserExceptionVector.text),
                   .UserExceptionVector.text)
   SECTION_VECTOR (_DoubleExceptionVector_text,
                   .DoubleExceptionVector.text,
-                  XCHAL_DOUBLEEXC_VECTOR_VADDR,
+                  DOUBLEEXC_VECTOR_VADDR,
                   32,
                   .DoubleExceptionVector.literal)
 
@@ -284,11 +285,26 @@ SECTIONS
   . = ALIGN(0x10);
   .bootstrap : { *(.bootstrap.literal .bootstrap.text .bootstrap.data) }
 
-  .ResetVector.text XCHAL_RESET_VECTOR_VADDR :
+  .ResetVector.text RESET_VECTOR_VADDR :
   {
     *(.ResetVector.text)
   }
 
+
+  /*
+   * This is a remapped copy of the Secondary Reset Vector Code.
+   * It keeps gdb in sync with the PC after switching
+   * to the temporary mapping used while setting up
+   * the V2 MMU mappings for Linux.
+   *
+   * Only debug information about this section is put in the kernel image.
+   */
+  .SecondaryResetVector.remapped_text 0x46000000 (INFO):
+  {
+        *(.SecondaryResetVector.remapped_text)
+  }
+
+
   .xt.lit : { *(.xt.lit) }
   .xt.prop : { *(.xt.prop) }
 
diff --git a/arch/xtensa/kernel/xtensa_ksyms.c b/arch/xtensa/kernel/xtensa_ksyms.c
index afe058b24e6e..42c53c87c204 100644
--- a/arch/xtensa/kernel/xtensa_ksyms.c
+++ b/arch/xtensa/kernel/xtensa_ksyms.c
@@ -119,3 +119,8 @@ EXPORT_SYMBOL(outsl);
 EXPORT_SYMBOL(insb);
 EXPORT_SYMBOL(insw);
 EXPORT_SYMBOL(insl);
+
+extern long common_exception_return;
+extern long _spill_registers;
+EXPORT_SYMBOL(common_exception_return);
+EXPORT_SYMBOL(_spill_registers);