diff options
author | Chris Zankel <chris@zankel.net> | 2007-08-07 02:57:57 -0400 |
---|---|---|
committer | Chris Zankel <chris@zankel.net> | 2007-08-27 16:54:01 -0400 |
commit | 01858d1b0b406307626bbc01238391b06aae2c20 (patch) | |
tree | d01d20f3f513e6a21880a60cdf195023e6aafc66 /arch/xtensa/kernel/entry.S | |
parent | 26465f2f4f5a253f22596fc9245a6bb5c0856ee1 (diff) |
[XTENSA] Add support for executable/non-executable feature in the mmu
Newer processor versions starting with Xtensa6/LX2 support an 'executable'
bit for memory pages. This bit replaces the 'valid' bit, so it must be
always set to one for older processor versions. To mark a page invalid, we now
set the cache-attributes to b11, which is backward compatible.
Signed-off-by: Chris Zankel <chris@zankel.net>
Diffstat (limited to 'arch/xtensa/kernel/entry.S')
-rw-r--r-- | arch/xtensa/kernel/entry.S | 42 |
1 files changed, 28 insertions, 14 deletions
diff --git a/arch/xtensa/kernel/entry.S b/arch/xtensa/kernel/entry.S index 8dc7a2c26ff9..65741e3368e7 100644 --- a/arch/xtensa/kernel/entry.S +++ b/arch/xtensa/kernel/entry.S | |||
@@ -1572,10 +1572,12 @@ ENTRY(fast_second_level_miss) | |||
1572 | l32i a0, a1, TASK_MM # tsk->mm | 1572 | l32i a0, a1, TASK_MM # tsk->mm |
1573 | beqz a0, 9f | 1573 | beqz a0, 9f |
1574 | 1574 | ||
1575 | 8: rsr a1, EXCVADDR # fault address | 1575 | |
1576 | _PGD_OFFSET(a0, a1, a1) | 1576 | /* We deliberately destroy a3 that holds the exception table. */ |
1577 | |||
1578 | 8: rsr a3, EXCVADDR # fault address | ||
1579 | _PGD_OFFSET(a0, a3, a1) | ||
1577 | l32i a0, a0, 0 # read pmdval | 1580 | l32i a0, a0, 0 # read pmdval |
1578 | //beqi a0, _PAGE_USER, 2f | ||
1579 | beqz a0, 2f | 1581 | beqz a0, 2f |
1580 | 1582 | ||
1581 | /* Read ptevaddr and convert to top of page-table page. | 1583 | /* Read ptevaddr and convert to top of page-table page. |
@@ -1596,20 +1598,34 @@ ENTRY(fast_second_level_miss) | |||
1596 | extui a1, a0, 0, PAGE_SHIFT # ... & PAGE_MASK | 1598 | extui a1, a0, 0, PAGE_SHIFT # ... & PAGE_MASK |
1597 | xor a0, a0, a1 | 1599 | xor a0, a0, a1 |
1598 | 1600 | ||
1599 | 1601 | movi a1, _PAGE_DIRECTORY | |
1600 | movi a1, PAGE_DIRECTORY | ||
1601 | or a0, a0, a1 # ... | PAGE_DIRECTORY | 1602 | or a0, a0, a1 # ... | PAGE_DIRECTORY |
1602 | 1603 | ||
1604 | /* | ||
1605 | * We utilize all three wired-ways (7-9( to hold pmd translations. | ||
1606 | * Memory regions are mapped to the DTLBs according to bits 28 and 29. | ||
1607 | * This allows to map the three most common regions to three different | ||
1608 | * DTLBs: | ||
1609 | * 0,1 -> way 7 program (0040.0000) and virtual (c000.0000) | ||
1610 | * 2 -> way 8 shared libaries (2000.0000) | ||
1611 | * 3 -> way 0 stack (3000.0000) | ||
1612 | */ | ||
1613 | |||
1614 | extui a3, a3, 28, 2 # addr. bit 28 and 29 0,1,2,3 | ||
1603 | rsr a1, PTEVADDR | 1615 | rsr a1, PTEVADDR |
1616 | addx2 a3, a3, a3 # -> 0,3,6,9 | ||
1604 | srli a1, a1, PAGE_SHIFT | 1617 | srli a1, a1, PAGE_SHIFT |
1618 | extui a3, a3, 2, 2 # -> 0,0,1,2 | ||
1605 | slli a1, a1, PAGE_SHIFT # ptevaddr & PAGE_MASK | 1619 | slli a1, a1, PAGE_SHIFT # ptevaddr & PAGE_MASK |
1606 | addi a1, a1, DTLB_WAY_PGD # ... + way_number | 1620 | addi a3, a3, DTLB_WAY_PGD |
1621 | add a1, a1, a3 # ... + way_number | ||
1607 | 1622 | ||
1608 | wdtlb a0, a1 | 1623 | 3: wdtlb a0, a1 |
1609 | dsync | 1624 | dsync |
1610 | 1625 | ||
1611 | /* Exit critical section. */ | 1626 | /* Exit critical section. */ |
1612 | 1627 | ||
1628 | 4: movi a3, exc_table # restore a3 | ||
1613 | movi a0, 0 | 1629 | movi a0, 0 |
1614 | s32i a0, a3, EXC_TABLE_FIXUP | 1630 | s32i a0, a3, EXC_TABLE_FIXUP |
1615 | 1631 | ||
@@ -1638,6 +1654,7 @@ ENTRY(fast_second_level_miss) | |||
1638 | 1654 | ||
1639 | 2: /* Invalid PGD, default exception handling */ | 1655 | 2: /* Invalid PGD, default exception handling */ |
1640 | 1656 | ||
1657 | movi a3, exc_table | ||
1641 | rsr a1, DEPC | 1658 | rsr a1, DEPC |
1642 | xsr a3, EXCSAVE_1 | 1659 | xsr a3, EXCSAVE_1 |
1643 | s32i a1, a2, PT_AREG2 | 1660 | s32i a1, a2, PT_AREG2 |
@@ -1682,15 +1699,15 @@ ENTRY(fast_store_prohibited) | |||
1682 | 8: rsr a1, EXCVADDR # fault address | 1699 | 8: rsr a1, EXCVADDR # fault address |
1683 | _PGD_OFFSET(a0, a1, a4) | 1700 | _PGD_OFFSET(a0, a1, a4) |
1684 | l32i a0, a0, 0 | 1701 | l32i a0, a0, 0 |
1685 | //beqi a0, _PAGE_USER, 2f # FIXME use _PAGE_INVALID | ||
1686 | beqz a0, 2f | 1702 | beqz a0, 2f |
1687 | 1703 | ||
1704 | /* Note that we assume _PAGE_WRITABLE_BIT is only set if pte is valid.*/ | ||
1705 | |||
1688 | _PTE_OFFSET(a0, a1, a4) | 1706 | _PTE_OFFSET(a0, a1, a4) |
1689 | l32i a4, a0, 0 # read pteval | 1707 | l32i a4, a0, 0 # read pteval |
1690 | movi a1, _PAGE_VALID | _PAGE_RW | 1708 | bbci.l a4, _PAGE_WRITABLE_BIT, 2f |
1691 | bnall a4, a1, 2f | ||
1692 | 1709 | ||
1693 | movi a1, _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_WRENABLE | 1710 | movi a1, _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_HW_WRITE |
1694 | or a4, a4, a1 | 1711 | or a4, a4, a1 |
1695 | rsr a1, EXCVADDR | 1712 | rsr a1, EXCVADDR |
1696 | s32i a4, a0, 0 | 1713 | s32i a4, a0, 0 |
@@ -1700,10 +1717,7 @@ ENTRY(fast_store_prohibited) | |||
1700 | dhwb a0, 0 | 1717 | dhwb a0, 0 |
1701 | #endif | 1718 | #endif |
1702 | pdtlb a0, a1 | 1719 | pdtlb a0, a1 |
1703 | beqz a0, 1f | ||
1704 | idtlb a0 // FIXME do we need this? | ||
1705 | wdtlb a4, a0 | 1720 | wdtlb a4, a0 |
1706 | 1: | ||
1707 | 1721 | ||
1708 | /* Exit critical section. */ | 1722 | /* Exit critical section. */ |
1709 | 1723 | ||