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authorChris Zankel <czankel@tensilica.com>2006-12-10 05:18:48 -0500
committerLinus Torvalds <torvalds@woody.osdl.org>2006-12-10 12:55:39 -0500
commit173d6681380aa1d60dfc35ed7178bd7811ba2784 (patch)
tree9d6d4d2c6dd791499ebab558647efb67ac88ae3a /arch/xtensa/boot/boot-redboot
parentfd43fe19b830d6cd0eba08a6c6a5f71a6bd9c1b0 (diff)
[PATCH] xtensa: remove extra header files
The Xtensa port contained many header files that were never needed. This rather lengthy patch removes all those files. Unfortunately, there were many dependencies that needed to be updated, so this patch touches quite a few source files. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/xtensa/boot/boot-redboot')
-rw-r--r--arch/xtensa/boot/boot-redboot/bootstrap.S37
1 files changed, 25 insertions, 12 deletions
diff --git a/arch/xtensa/boot/boot-redboot/bootstrap.S b/arch/xtensa/boot/boot-redboot/bootstrap.S
index ee636b0da81c..84848123e2a8 100644
--- a/arch/xtensa/boot/boot-redboot/bootstrap.S
+++ b/arch/xtensa/boot/boot-redboot/bootstrap.S
@@ -1,9 +1,7 @@
1 1#include <asm/variant/core.h>
2#define _ASMLANGUAGE 2#include <asm/regs.h>
3#include <xtensa/config/specreg.h> 3#include <asm/asmmacro.h>
4#include <xtensa/config/core.h> 4#include <asm/cacheasm.h>
5#include <xtensa/cacheasm.h>
6
7 /* 5 /*
8 * RB-Data: RedBoot data/bss 6 * RB-Data: RedBoot data/bss
9 * P: Boot-Parameters 7 * P: Boot-Parameters
@@ -77,8 +75,14 @@ _start:
77 /* Note: The assembler cannot relax "addi a0, a0, ..." to an 75 /* Note: The assembler cannot relax "addi a0, a0, ..." to an
78 l32r, so we load to a4 first. */ 76 l32r, so we load to a4 first. */
79 77
80 addi a4, a0, __start - __start_a0 78 # addi a4, a0, __start - __start_a0
81 mov a0, a4 79 # mov a0, a4
80
81 movi a4, __start
82 movi a5, __start_a0
83 add a4, a0, a4
84 sub a0, a4, a5
85
82 movi a4, __start 86 movi a4, __start
83 movi a5, __reloc_end 87 movi a5, __reloc_end
84 88
@@ -106,9 +110,13 @@ _start:
106 /* We have to flush and invalidate the caches here before we jump. */ 110 /* We have to flush and invalidate the caches here before we jump. */
107 111
108#if XCHAL_DCACHE_IS_WRITEBACK 112#if XCHAL_DCACHE_IS_WRITEBACK
109 dcache_writeback_all a5, a6 113
114 ___flush_dcache_all a5 a6
115
110#endif 116#endif
111 icache_invalidate_all a5, a6 117
118 ___invalidate_icache_all a5 a6
119 isync
112 120
113 movi a11, _reloc 121 movi a11, _reloc
114 jx a11 122 jx a11
@@ -209,9 +217,14 @@ _reloc:
209 /* jump to the kernel */ 217 /* jump to the kernel */
2102: 2182:
211#if XCHAL_DCACHE_IS_WRITEBACK 219#if XCHAL_DCACHE_IS_WRITEBACK
212 dcache_writeback_all a5, a6 220
221 ___flush_dcache_all a5 a6
222
213#endif 223#endif
214 icache_invalidate_all a5, a6 224
225 ___invalidate_icache_all a5 a6
226
227 isync
215 228
216 movi a5, __start 229 movi a5, __start
217 movi a3, boot_initrd_start 230 movi a3, boot_initrd_start