[ACPI] ACPICA 20050930

Completed a major overhaul of the Resource Manager code -
specifically, optimizations in the area of the AML/internal
resource conversion code. The code has been optimized to
simplify and eliminate duplicated code, CPU stack use has
been decreased by optimizing function parameters and local
variables, and naming conventions across the manager have
been standardized for clarity and ease of maintenance (this
includes function, parameter, variable, and struct/typedef
names.)

All Resource Manager dispatch and information tables have
been moved to a single location for clarity and ease of
maintenance. One new file was created, named "rsinfo.c".

The ACPI return macros (return_ACPI_STATUS, etc.) have
been modified to guarantee that the argument is
not evaluated twice, making them less prone to macro
side-effects. However, since there exists the possibility
of additional stack use if a particular compiler cannot
optimize them (such as in the debug generation case),
the original macros are optionally available.  Note that
some invocations of the return_VALUE macro may now cause
size mismatch warnings; the return_UINT8 and return_UINT32
macros are provided to eliminate these. (From Randy Dunlap)

Implemented a new mechanism to enable debug tracing for
individual control methods. A new external interface,
acpi_debug_trace(), is provided to enable this mechanism. The
intent is to allow the host OS to easily enable and disable
tracing for problematic control methods. This interface
can be easily exposed to a user or debugger interface if
desired. See the file psxface.c for details.

acpi_ut_callocate() will now return a valid pointer if a
length of zero is specified - a length of one is used
and a warning is issued. This matches the behavior of
acpi_ut_allocate().

Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>

2 files changed, 9 insertions, 9 deletions

diff --git a/arch/x86_64/kernel/io_apic.c b/arch/x86_64/kernel/io_apic.c
index 97154ab058b4..619767d3ea2b 100644
--- a/arch/x86_64/kernel/io_apic.c
+++ b/arch/x86_64/kernel/io_apic.c
@@ -1956,7 +1956,7 @@ int __init io_apic_get_redir_entries (int ioapic)
 }
 
 
-int io_apic_set_pci_routing (int ioapic, int pin, int irq, int edge_level, int active_high_low)
+int io_apic_set_pci_routing (int ioapic, int pin, int irq, int triggering, int polarity)
 {
         struct IO_APIC_route_entry entry;
         unsigned long flags;
@@ -1978,8 +1978,8 @@ int io_apic_set_pci_routing (int ioapic, int pin, int irq, int edge_level, int a
         entry.delivery_mode = INT_DELIVERY_MODE;
         entry.dest_mode = INT_DEST_MODE;
         entry.dest.logical.logical_dest = cpu_mask_to_apicid(TARGET_CPUS);
-        entry.trigger = edge_level;
-        entry.polarity = active_high_low;
+        entry.trigger = triggering;
+        entry.polarity = polarity;
         entry.mask = 1;                                  /* Disabled (masked) */
 
         irq = gsi_irq_sharing(irq);
@@ -1994,9 +1994,9 @@ int io_apic_set_pci_routing (int ioapic, int pin, int irq, int edge_level, int a
         apic_printk(APIC_VERBOSE,KERN_DEBUG "IOAPIC[%d]: Set PCI routing entry (%d-%d -> 0x%x -> "
                 "IRQ %d Mode:%i Active:%i)\n", ioapic, 
                mp_ioapics[ioapic].mpc_apicid, pin, entry.vector, irq,
-               edge_level, active_high_low);
+               triggering, polarity);
 
-        ioapic_register_intr(irq, entry.vector, edge_level);
+        ioapic_register_intr(irq, entry.vector, triggering);
 
         if (!ioapic && (irq < 16))
                 disable_8259A_irq(irq);
diff --git a/arch/x86_64/kernel/mpparse.c b/arch/x86_64/kernel/mpparse.c
index 1105250bf02c..ba817e7454b2 100644
--- a/arch/x86_64/kernel/mpparse.c
+++ b/arch/x86_64/kernel/mpparse.c
@@ -915,7 +915,7 @@ void __init mp_config_acpi_legacy_irqs (void)
 
 #define MAX_GSI_NUM     4096
 
-int mp_register_gsi(u32 gsi, int edge_level, int active_high_low)
+int mp_register_gsi(u32 gsi, int triggering, int polarity)
 {
         int                     ioapic = -1;
         int                     ioapic_pin = 0;
@@ -964,7 +964,7 @@ int mp_register_gsi(u32 gsi, int edge_level, int active_high_low)
 
         mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1<<bit);
 
-        if (edge_level) {
+        if (triggering) {
                 /*
                  * For PCI devices assign IRQs in order, avoiding gaps
                  * due to unused I/O APIC pins.
@@ -986,8 +986,8 @@ int mp_register_gsi(u32 gsi, int edge_level, int active_high_low)
         }
 
         io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
-                edge_level == ACPI_EDGE_SENSITIVE ? 0 : 1,
-                active_high_low == ACPI_ACTIVE_HIGH ? 0 : 1);
+                triggering == ACPI_EDGE_SENSITIVE ? 0 : 1,
+                polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
         return gsi;
 }