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authorThomas Gleixner <tglx@linutronix.de>2007-08-12 11:46:36 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-08-12 14:05:45 -0400
commitcc75b92d11384ba14f93828a2a0040344ae872e7 (patch)
treeeff53bb649b115ff16a377cc0fd81f5807406ba2 /arch/x86_64
parent2464286ace55b3abddfb9cc30ab95e2dac1de9a6 (diff)
genirq: mark io_apic level interrupts to avoid resend
Level type interrupts do not need to be resent. It was also found that some chipsets get confused in case of the resend. Mark the ioapic level type interrupts as such to avoid the resend functionality in the generic irq code. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/x86_64')
-rw-r--r--arch/x86_64/kernel/io_apic.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/arch/x86_64/kernel/io_apic.c b/arch/x86_64/kernel/io_apic.c
index 050141c0602b..f57f8b901912 100644
--- a/arch/x86_64/kernel/io_apic.c
+++ b/arch/x86_64/kernel/io_apic.c
@@ -800,12 +800,15 @@ static struct irq_chip ioapic_chip;
800 800
801static void ioapic_register_intr(int irq, unsigned long trigger) 801static void ioapic_register_intr(int irq, unsigned long trigger)
802{ 802{
803 if (trigger) 803 if (trigger) {
804 irq_desc[irq].status |= IRQ_LEVEL;
804 set_irq_chip_and_handler_name(irq, &ioapic_chip, 805 set_irq_chip_and_handler_name(irq, &ioapic_chip,
805 handle_fasteoi_irq, "fasteoi"); 806 handle_fasteoi_irq, "fasteoi");
806 else 807 } else {
808 irq_desc[irq].status &= ~IRQ_LEVEL;
807 set_irq_chip_and_handler_name(irq, &ioapic_chip, 809 set_irq_chip_and_handler_name(irq, &ioapic_chip,
808 handle_edge_irq, "edge"); 810 handle_edge_irq, "edge");
811 }
809} 812}
810 813
811static void setup_IO_APIC_irq(int apic, int pin, unsigned int irq, 814static void setup_IO_APIC_irq(int apic, int pin, unsigned int irq,