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authorVojtech Pavlik <vojtech@suse.cz>2006-06-26 07:58:23 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-06-26 13:48:19 -0400
commitf8bf3c65a962530821fa9a9b4bad43d8c7e13574 (patch)
treeb52d7fa60f52e877abced7470e705a6a544701b9 /arch/x86_64
parent05ebb76109f302b949e745724bbf0f0634dba43f (diff)
[PATCH] x86_64: Rename oem_force_hpet_timer to apic_is_clustered_box
Rename oem_force_hpet_timer to apic_is_clustered_box, to give the function a better fitting name - it really isn't at all about HPET. Signed-off-by: Vojtech Pavlik <vojtech@suse.cz> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/x86_64')
-rw-r--r--arch/x86_64/kernel/apic.c7
-rw-r--r--arch/x86_64/kernel/time.c4
2 files changed, 5 insertions, 6 deletions
diff --git a/arch/x86_64/kernel/apic.c b/arch/x86_64/kernel/apic.c
index 29ef99001e05..53fc17d894e8 100644
--- a/arch/x86_64/kernel/apic.c
+++ b/arch/x86_64/kernel/apic.c
@@ -983,7 +983,7 @@ void smp_apic_timer_interrupt(struct pt_regs *regs)
983} 983}
984 984
985/* 985/*
986 * oem_force_hpet_timer -- force HPET mode for some boxes. 986 * apic_is_clustered_box() -- Check if we can expect good TSC
987 * 987 *
988 * Thus far, the major user of this is IBM's Summit2 series: 988 * Thus far, the major user of this is IBM's Summit2 series:
989 * 989 *
@@ -991,7 +991,7 @@ void smp_apic_timer_interrupt(struct pt_regs *regs)
991 * multi-chassis. Use available data to take a good guess. 991 * multi-chassis. Use available data to take a good guess.
992 * If in doubt, go HPET. 992 * If in doubt, go HPET.
993 */ 993 */
994__cpuinit int oem_force_hpet_timer(void) 994__cpuinit int apic_is_clustered_box(void)
995{ 995{
996 int i, clusters, zeros; 996 int i, clusters, zeros;
997 unsigned id; 997 unsigned id;
@@ -1022,8 +1022,7 @@ __cpuinit int oem_force_hpet_timer(void)
1022 } 1022 }
1023 1023
1024 /* 1024 /*
1025 * If clusters > 2, then should be multi-chassis. Return 1 for HPET. 1025 * If clusters > 2, then should be multi-chassis.
1026 * Else return 0 to use TSC.
1027 * May have to revisit this when multi-core + hyperthreaded CPUs come 1026 * May have to revisit this when multi-core + hyperthreaded CPUs come
1028 * out, but AFAIK this will work even for them. 1027 * out, but AFAIK this will work even for them.
1029 */ 1028 */
diff --git a/arch/x86_64/kernel/time.c b/arch/x86_64/kernel/time.c
index 7392570f975d..54b14e3ef66f 100644
--- a/arch/x86_64/kernel/time.c
+++ b/arch/x86_64/kernel/time.c
@@ -956,10 +956,10 @@ void __init time_init(void)
956__cpuinit int unsynchronized_tsc(void) 956__cpuinit int unsynchronized_tsc(void)
957{ 957{
958#ifdef CONFIG_SMP 958#ifdef CONFIG_SMP
959 if (oem_force_hpet_timer()) 959 if (apic_is_clustered_box())
960 return 1; 960 return 1;
961 /* Intel systems are normally all synchronized. Exceptions 961 /* Intel systems are normally all synchronized. Exceptions
962 are handled in the OEM check above. */ 962 are handled in the check above. */
963 if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) 963 if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
964 return 0; 964 return 0;
965#endif 965#endif