diff options
author | Andi Kleen <ak@suse.de> | 2005-09-12 12:49:24 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-09-12 13:49:55 -0400 |
commit | 5a40b7c2abdedcf53c9a6ee790991acfcef5b6c7 (patch) | |
tree | e326a2d01c30be580c14bd6c74c19a2807c1cdad /arch/x86_64 | |
parent | 61c11341ed798db9b99b30c1711c1cf458457806 (diff) |
[PATCH] x86-64: Remove code for outdated APICs
No x86-64 chipset has these APICs.
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/x86_64')
-rw-r--r-- | arch/x86_64/kernel/apic.c | 15 | ||||
-rw-r--r-- | arch/x86_64/kernel/io_apic.c | 20 | ||||
-rw-r--r-- | arch/x86_64/kernel/smpboot.c | 11 |
3 files changed, 10 insertions, 36 deletions
diff --git a/arch/x86_64/kernel/apic.c b/arch/x86_64/kernel/apic.c index 9af0cc3e2ccc..fc84bea42fd4 100644 --- a/arch/x86_64/kernel/apic.c +++ b/arch/x86_64/kernel/apic.c | |||
@@ -109,11 +109,8 @@ void clear_local_APIC(void) | |||
109 | if (maxlvt >= 4) | 109 | if (maxlvt >= 4) |
110 | apic_write_around(APIC_LVTPC, APIC_LVT_MASKED); | 110 | apic_write_around(APIC_LVTPC, APIC_LVT_MASKED); |
111 | v = GET_APIC_VERSION(apic_read(APIC_LVR)); | 111 | v = GET_APIC_VERSION(apic_read(APIC_LVR)); |
112 | if (APIC_INTEGRATED(v)) { /* !82489DX */ | 112 | apic_write(APIC_ESR, 0); |
113 | if (maxlvt > 3) /* Due to Pentium errata 3AP and 11AP. */ | 113 | apic_read(APIC_ESR); |
114 | apic_write(APIC_ESR, 0); | ||
115 | apic_read(APIC_ESR); | ||
116 | } | ||
117 | } | 114 | } |
118 | 115 | ||
119 | void __init connect_bsp_APIC(void) | 116 | void __init connect_bsp_APIC(void) |
@@ -316,8 +313,6 @@ void __init init_bsp_APIC(void) | |||
316 | */ | 313 | */ |
317 | apic_write_around(APIC_LVT0, APIC_DM_EXTINT); | 314 | apic_write_around(APIC_LVT0, APIC_DM_EXTINT); |
318 | value = APIC_DM_NMI; | 315 | value = APIC_DM_NMI; |
319 | if (!APIC_INTEGRATED(ver)) /* 82489DX */ | ||
320 | value |= APIC_LVT_LEVEL_TRIGGER; | ||
321 | apic_write_around(APIC_LVT1, value); | 316 | apic_write_around(APIC_LVT1, value); |
322 | } | 317 | } |
323 | 318 | ||
@@ -422,15 +417,11 @@ void __cpuinit setup_local_APIC (void) | |||
422 | value = APIC_DM_NMI; | 417 | value = APIC_DM_NMI; |
423 | else | 418 | else |
424 | value = APIC_DM_NMI | APIC_LVT_MASKED; | 419 | value = APIC_DM_NMI | APIC_LVT_MASKED; |
425 | if (!APIC_INTEGRATED(ver)) /* 82489DX */ | ||
426 | value |= APIC_LVT_LEVEL_TRIGGER; | ||
427 | apic_write_around(APIC_LVT1, value); | 420 | apic_write_around(APIC_LVT1, value); |
428 | 421 | ||
429 | { | 422 | { |
430 | unsigned oldvalue; | 423 | unsigned oldvalue; |
431 | maxlvt = get_maxlvt(); | 424 | maxlvt = get_maxlvt(); |
432 | if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */ | ||
433 | apic_write(APIC_ESR, 0); | ||
434 | oldvalue = apic_read(APIC_ESR); | 425 | oldvalue = apic_read(APIC_ESR); |
435 | value = ERROR_APIC_VECTOR; // enables sending errors | 426 | value = ERROR_APIC_VECTOR; // enables sending errors |
436 | apic_write_around(APIC_LVTERR, value); | 427 | apic_write_around(APIC_LVTERR, value); |
@@ -674,8 +665,6 @@ static void __setup_APIC_LVTT(unsigned int clocks) | |||
674 | 665 | ||
675 | ver = GET_APIC_VERSION(apic_read(APIC_LVR)); | 666 | ver = GET_APIC_VERSION(apic_read(APIC_LVR)); |
676 | lvtt_value = APIC_LVT_TIMER_PERIODIC | LOCAL_TIMER_VECTOR; | 667 | lvtt_value = APIC_LVT_TIMER_PERIODIC | LOCAL_TIMER_VECTOR; |
677 | if (!APIC_INTEGRATED(ver)) | ||
678 | lvtt_value |= SET_APIC_TIMER_BASE(APIC_TIMER_BASE_DIV); | ||
679 | apic_write_around(APIC_LVTT, lvtt_value); | 668 | apic_write_around(APIC_LVTT, lvtt_value); |
680 | 669 | ||
681 | /* | 670 | /* |
diff --git a/arch/x86_64/kernel/io_apic.c b/arch/x86_64/kernel/io_apic.c index 5f1529be1237..0645dc835527 100644 --- a/arch/x86_64/kernel/io_apic.c +++ b/arch/x86_64/kernel/io_apic.c | |||
@@ -1022,13 +1022,11 @@ void __apicdebuginit print_local_APIC(void * dummy) | |||
1022 | v = apic_read(APIC_TASKPRI); | 1022 | v = apic_read(APIC_TASKPRI); |
1023 | printk(KERN_DEBUG "... APIC TASKPRI: %08x (%02x)\n", v, v & APIC_TPRI_MASK); | 1023 | printk(KERN_DEBUG "... APIC TASKPRI: %08x (%02x)\n", v, v & APIC_TPRI_MASK); |
1024 | 1024 | ||
1025 | if (APIC_INTEGRATED(ver)) { /* !82489DX */ | 1025 | v = apic_read(APIC_ARBPRI); |
1026 | v = apic_read(APIC_ARBPRI); | 1026 | printk(KERN_DEBUG "... APIC ARBPRI: %08x (%02x)\n", v, |
1027 | printk(KERN_DEBUG "... APIC ARBPRI: %08x (%02x)\n", v, | 1027 | v & APIC_ARBPRI_MASK); |
1028 | v & APIC_ARBPRI_MASK); | 1028 | v = apic_read(APIC_PROCPRI); |
1029 | v = apic_read(APIC_PROCPRI); | 1029 | printk(KERN_DEBUG "... APIC PROCPRI: %08x\n", v); |
1030 | printk(KERN_DEBUG "... APIC PROCPRI: %08x\n", v); | ||
1031 | } | ||
1032 | 1030 | ||
1033 | v = apic_read(APIC_EOI); | 1031 | v = apic_read(APIC_EOI); |
1034 | printk(KERN_DEBUG "... APIC EOI: %08x\n", v); | 1032 | printk(KERN_DEBUG "... APIC EOI: %08x\n", v); |
@@ -1048,12 +1046,8 @@ void __apicdebuginit print_local_APIC(void * dummy) | |||
1048 | printk(KERN_DEBUG "... APIC IRR field:\n"); | 1046 | printk(KERN_DEBUG "... APIC IRR field:\n"); |
1049 | print_APIC_bitfield(APIC_IRR); | 1047 | print_APIC_bitfield(APIC_IRR); |
1050 | 1048 | ||
1051 | if (APIC_INTEGRATED(ver)) { /* !82489DX */ | 1049 | v = apic_read(APIC_ESR); |
1052 | if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */ | 1050 | printk(KERN_DEBUG "... APIC ESR: %08x\n", v); |
1053 | apic_write(APIC_ESR, 0); | ||
1054 | v = apic_read(APIC_ESR); | ||
1055 | printk(KERN_DEBUG "... APIC ESR: %08x\n", v); | ||
1056 | } | ||
1057 | 1051 | ||
1058 | v = apic_read(APIC_ICR); | 1052 | v = apic_read(APIC_ICR); |
1059 | printk(KERN_DEBUG "... APIC ICR: %08x\n", v); | 1053 | printk(KERN_DEBUG "... APIC ICR: %08x\n", v); |
diff --git a/arch/x86_64/kernel/smpboot.c b/arch/x86_64/kernel/smpboot.c index d4b63281c0f5..4efe36fe99aa 100644 --- a/arch/x86_64/kernel/smpboot.c +++ b/arch/x86_64/kernel/smpboot.c | |||
@@ -610,16 +610,7 @@ static int __cpuinit wakeup_secondary_via_INIT(int phys_apicid, unsigned int sta | |||
610 | 610 | ||
611 | atomic_set(&init_deasserted, 1); | 611 | atomic_set(&init_deasserted, 1); |
612 | 612 | ||
613 | /* | 613 | num_starts = 2; |
614 | * Should we send STARTUP IPIs ? | ||
615 | * | ||
616 | * Determine this based on the APIC version. | ||
617 | * If we don't have an integrated APIC, don't send the STARTUP IPIs. | ||
618 | */ | ||
619 | if (APIC_INTEGRATED(apic_version[phys_apicid])) | ||
620 | num_starts = 2; | ||
621 | else | ||
622 | num_starts = 0; | ||
623 | 614 | ||
624 | /* | 615 | /* |
625 | * Run STARTUP IPI loop. | 616 | * Run STARTUP IPI loop. |