aboutsummaryrefslogtreecommitdiffstats
path: root/arch/x86_64
diff options
context:
space:
mode:
authordean gaudet <dean@arctic.org>2007-08-10 16:30:59 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-08-11 18:58:12 -0400
commit3320ad994afb2c44ad34b3b34c3c5cf0da297331 (patch)
tree7eb9c73a0513f96a7af3c598cd3103cbf4da5043 /arch/x86_64
parent9535239f6bc99f68e0cfae44505ad402b53ed24c (diff)
x86: Work around mmio config space quirk on AMD Fam10h
Some broken devices have been discovered to require %al/%ax/%eax registers for MMIO config space accesses. Modify mmconfig.c to use these registers explicitly (rather than modify the global readb/writeb/etc inlines). AK: also changed i386 to always use eax AK: moved change to extended space probing to different patch AK: reworked with inlines according to Linus' requirements. AK: improve comments. Signed-off-by: dean gaudet <dean@arctic.org> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/x86_64')
-rw-r--r--arch/x86_64/pci/mmconfig.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/x86_64/pci/mmconfig.c b/arch/x86_64/pci/mmconfig.c
index 65d82736987e..4095e4d66a1d 100644
--- a/arch/x86_64/pci/mmconfig.c
+++ b/arch/x86_64/pci/mmconfig.c
@@ -66,13 +66,13 @@ static int pci_mmcfg_read(unsigned int seg, unsigned int bus,
66 66
67 switch (len) { 67 switch (len) {
68 case 1: 68 case 1:
69 *value = readb(addr + reg); 69 *value = mmio_config_readb(addr + reg);
70 break; 70 break;
71 case 2: 71 case 2:
72 *value = readw(addr + reg); 72 *value = mmio_config_readw(addr + reg);
73 break; 73 break;
74 case 4: 74 case 4:
75 *value = readl(addr + reg); 75 *value = mmio_config_readl(addr + reg);
76 break; 76 break;
77 } 77 }
78 78
@@ -94,13 +94,13 @@ static int pci_mmcfg_write(unsigned int seg, unsigned int bus,
94 94
95 switch (len) { 95 switch (len) {
96 case 1: 96 case 1:
97 writeb(value, addr + reg); 97 mmio_config_writeb(addr + reg, value);
98 break; 98 break;
99 case 2: 99 case 2:
100 writew(value, addr + reg); 100 mmio_config_writew(addr + reg, value);
101 break; 101 break;
102 case 4: 102 case 4:
103 writel(value, addr + reg); 103 mmio_config_writel(addr + reg, value);
104 break; 104 break;
105 } 105 }
106 106