diff options
author | Fenghua Yu <fenghua.yu@intel.com> | 2007-07-19 04:48:13 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-19 13:04:45 -0400 |
commit | f34e3b61f2be9628bd41244f3ecc42009c5eced5 (patch) | |
tree | 192a64c12f84b3d69b9bf12ba56c2c7d86bc269b /arch/x86_64 | |
parent | 5fb7dc37dc16fbc8b80d81318a582201ef7e280d (diff) |
use the new percpu interface for shared data
Currently most of the per cpu data, which is accessed by different cpus,
has a ____cacheline_aligned_in_smp attribute. Move all this data to the
new per cpu shared data section: .data.percpu.shared_aligned.
This will seperate the percpu data which is referenced frequently by other
cpus from the local only percpu data.
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Acked-by: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Christoph Lameter <clameter@sgi.com>
Cc: "Luck, Tony" <tony.luck@intel.com>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/x86_64')
-rw-r--r-- | arch/x86_64/kernel/init_task.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86_64/kernel/init_task.c b/arch/x86_64/kernel/init_task.c index 3dc5854ba21e..4ff33d4f8551 100644 --- a/arch/x86_64/kernel/init_task.c +++ b/arch/x86_64/kernel/init_task.c | |||
@@ -44,7 +44,7 @@ EXPORT_SYMBOL(init_task); | |||
44 | * section. Since TSS's are completely CPU-local, we want them | 44 | * section. Since TSS's are completely CPU-local, we want them |
45 | * on exact cacheline boundaries, to eliminate cacheline ping-pong. | 45 | * on exact cacheline boundaries, to eliminate cacheline ping-pong. |
46 | */ | 46 | */ |
47 | DEFINE_PER_CPU(struct tss_struct, init_tss) ____cacheline_internodealigned_in_smp = INIT_TSS; | 47 | DEFINE_PER_CPU_SHARED_ALIGNED(struct tss_struct, init_tss) = INIT_TSS; |
48 | 48 | ||
49 | /* Copies of the original ist values from the tss are only accessed during | 49 | /* Copies of the original ist values from the tss are only accessed during |
50 | * debugging, no special alignment required. | 50 | * debugging, no special alignment required. |