[PATCH] x86_64 irq: Add constants for the reserved IRQ vectors.

For the ISA irqs we reserve 16 vectors.  This patch adds constants for
those vectors and modifies the code to use them.  Making the code a
little clearer and making it possible to move these vectors in the future.

Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

2 files changed, 36 insertions, 36 deletions

diff --git a/arch/x86_64/kernel/i8259.c b/arch/x86_64/kernel/i8259.c
index 103517d9f8e6..45d85630196a 100644
--- a/arch/x86_64/kernel/i8259.c
+++ b/arch/x86_64/kernel/i8259.c
@@ -299,7 +299,7 @@ void init_8259A(int auto_eoi)
          * outb_p - this has to work on a wide range of PC hardware.
          */
         outb_p(0x11, 0x20);     /* ICW1: select 8259A-1 init */
-        outb_p(0x20 + 0, 0x21); /* ICW2: 8259A-1 IR0-7 mapped to 0x20-0x27 */
+        outb_p(IRQ0_VECTOR, 0x21);      /* ICW2: 8259A-1 IR0-7 mapped to 0x20-0x27 */
         outb_p(0x04, 0x21);     /* 8259A-1 (the master) has a slave on IR2 */
         if (auto_eoi)
                 outb_p(0x03, 0x21);     /* master does Auto EOI */
@@ -307,7 +307,7 @@ void init_8259A(int auto_eoi)
                 outb_p(0x01, 0x21);     /* master expects normal EOI */
 
         outb_p(0x11, 0xA0);     /* ICW1: select 8259A-2 init */
-        outb_p(0x20 + 8, 0xA1); /* ICW2: 8259A-2 IR0-7 mapped to 0x28-0x2f */
+        outb_p(IRQ8_VECTOR, 0xA1);      /* ICW2: 8259A-2 IR0-7 mapped to 0x28-0x2f */
         outb_p(0x02, 0xA1);     /* 8259A-2 is a slave on master's IR2 */
         outb_p(0x01, 0xA1);     /* (slave's support for AEOI in flat mode
                                     is to be investigated) */
@@ -398,24 +398,24 @@ device_initcall(i8259A_init_sysfs);
 
 static struct irqaction irq2 = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL};
 DEFINE_PER_CPU(vector_irq_t, vector_irq) = {
-        [0 ... FIRST_EXTERNAL_VECTOR - 1] = -1,
-        [FIRST_EXTERNAL_VECTOR + 0] = 0,
-        [FIRST_EXTERNAL_VECTOR + 1] = 1,
-        [FIRST_EXTERNAL_VECTOR + 2] = 2,
-        [FIRST_EXTERNAL_VECTOR + 3] = 3,
-        [FIRST_EXTERNAL_VECTOR + 4] = 4,
-        [FIRST_EXTERNAL_VECTOR + 5] = 5,
-        [FIRST_EXTERNAL_VECTOR + 6] = 6,
-        [FIRST_EXTERNAL_VECTOR + 7] = 7,
-        [FIRST_EXTERNAL_VECTOR + 8] = 8,
-        [FIRST_EXTERNAL_VECTOR + 9] = 9,
-        [FIRST_EXTERNAL_VECTOR + 10] = 10,
-        [FIRST_EXTERNAL_VECTOR + 11] = 11,
-        [FIRST_EXTERNAL_VECTOR + 12] = 12,
-        [FIRST_EXTERNAL_VECTOR + 13] = 13,
-        [FIRST_EXTERNAL_VECTOR + 14] = 14,
-        [FIRST_EXTERNAL_VECTOR + 15] = 15,
-        [FIRST_EXTERNAL_VECTOR + 16 ... NR_VECTORS - 1] = -1
+        [0 ... IRQ0_VECTOR - 1] = -1,
+        [IRQ0_VECTOR] = 0,
+        [IRQ1_VECTOR] = 1,
+        [IRQ2_VECTOR] = 2,
+        [IRQ3_VECTOR] = 3,
+        [IRQ4_VECTOR] = 4,
+        [IRQ5_VECTOR] = 5,
+        [IRQ6_VECTOR] = 6,
+        [IRQ7_VECTOR] = 7,
+        [IRQ8_VECTOR] = 8,
+        [IRQ9_VECTOR] = 9,
+        [IRQ10_VECTOR] = 10,
+        [IRQ11_VECTOR] = 11,
+        [IRQ12_VECTOR] = 12,
+        [IRQ13_VECTOR] = 13,
+        [IRQ14_VECTOR] = 14,
+        [IRQ15_VECTOR] = 15,
+        [IRQ15_VECTOR + 1 ... NR_VECTORS - 1] = -1
 };
 
 void __init init_ISA_irqs (void)
diff --git a/arch/x86_64/kernel/io_apic.c b/arch/x86_64/kernel/io_apic.c
index 79fa7b2bbee4..8dede0bd2267 100644
--- a/arch/x86_64/kernel/io_apic.c
+++ b/arch/x86_64/kernel/io_apic.c
@@ -54,22 +54,22 @@ struct irq_cfg {
 
 /* irq_cfg is indexed by the sum of all RTEs in all I/O APICs. */
 struct irq_cfg irq_cfg[NR_IRQS] __read_mostly = {
-        [0] = { .domain = CPU_MASK_ALL, .vector = FIRST_EXTERNAL_VECTOR + 0 },
-        [1] = { .domain = CPU_MASK_ALL, .vector = FIRST_EXTERNAL_VECTOR + 1 },
-        [2] = { .domain = CPU_MASK_ALL, .vector = FIRST_EXTERNAL_VECTOR + 2 },
-        [3] = { .domain = CPU_MASK_ALL, .vector = FIRST_EXTERNAL_VECTOR + 3 },
-        [4] = { .domain = CPU_MASK_ALL, .vector = FIRST_EXTERNAL_VECTOR + 4 },
-        [5] = { .domain = CPU_MASK_ALL, .vector = FIRST_EXTERNAL_VECTOR + 5 },
-        [6] = { .domain = CPU_MASK_ALL, .vector = FIRST_EXTERNAL_VECTOR + 6 },
-        [7] = { .domain = CPU_MASK_ALL, .vector = FIRST_EXTERNAL_VECTOR + 7 },
-        [8] = { .domain = CPU_MASK_ALL, .vector = FIRST_EXTERNAL_VECTOR + 8 },
-        [9] = { .domain = CPU_MASK_ALL, .vector = FIRST_EXTERNAL_VECTOR + 9 },
-        [10] = { .domain = CPU_MASK_ALL, .vector = FIRST_EXTERNAL_VECTOR + 10 },
-        [11] = { .domain = CPU_MASK_ALL, .vector = FIRST_EXTERNAL_VECTOR + 11 },
-        [12] = { .domain = CPU_MASK_ALL, .vector = FIRST_EXTERNAL_VECTOR + 12 },
-        [13] = { .domain = CPU_MASK_ALL, .vector = FIRST_EXTERNAL_VECTOR + 13 },
-        [14] = { .domain = CPU_MASK_ALL, .vector = FIRST_EXTERNAL_VECTOR + 14 },
-        [15] = { .domain = CPU_MASK_ALL, .vector = FIRST_EXTERNAL_VECTOR + 15 },
+        [0]  = { .domain = CPU_MASK_ALL, .vector = IRQ0_VECTOR,  },
+        [1]  = { .domain = CPU_MASK_ALL, .vector = IRQ1_VECTOR,  },
+        [2]  = { .domain = CPU_MASK_ALL, .vector = IRQ2_VECTOR,  },
+        [3]  = { .domain = CPU_MASK_ALL, .vector = IRQ3_VECTOR,  },
+        [4]  = { .domain = CPU_MASK_ALL, .vector = IRQ4_VECTOR,  },
+        [5]  = { .domain = CPU_MASK_ALL, .vector = IRQ5_VECTOR,  },
+        [6]  = { .domain = CPU_MASK_ALL, .vector = IRQ6_VECTOR,  },
+        [7]  = { .domain = CPU_MASK_ALL, .vector = IRQ7_VECTOR,  },
+        [8]  = { .domain = CPU_MASK_ALL, .vector = IRQ8_VECTOR,  },
+        [9]  = { .domain = CPU_MASK_ALL, .vector = IRQ9_VECTOR,  },
+        [10] = { .domain = CPU_MASK_ALL, .vector = IRQ10_VECTOR, },
+        [11] = { .domain = CPU_MASK_ALL, .vector = IRQ11_VECTOR, },
+        [12] = { .domain = CPU_MASK_ALL, .vector = IRQ12_VECTOR, },
+        [13] = { .domain = CPU_MASK_ALL, .vector = IRQ13_VECTOR, },
+        [14] = { .domain = CPU_MASK_ALL, .vector = IRQ14_VECTOR, },
+        [15] = { .domain = CPU_MASK_ALL, .vector = IRQ15_VECTOR, },
 };
 
 static int assign_irq_vector(int irq, cpumask_t mask);