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authorShaohua Li <shaohua.li@intel.com>2006-01-15 19:56:45 -0500
committerLinus Torvalds <torvalds@g5.osdl.org>2006-01-16 14:27:59 -0500
commit5b74357328eb325c12ea76f043524e7924a021e4 (patch)
tree4965d86efce5ef0bfe2f3f5a0fea7faeb832909a /arch/x86_64
parente25db98d9ae542f95d139e316a6d490ceddd141e (diff)
[PATCH] x86_64: lapic resume uses correct base address
uses correct lapic base address. The set_fixmap appears useless. Signed-off-by: Shaohua Li<shaohua.li@intel.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/x86_64')
-rw-r--r--arch/x86_64/kernel/apic.c5
1 files changed, 1 insertions, 4 deletions
diff --git a/arch/x86_64/kernel/apic.c b/arch/x86_64/kernel/apic.c
index 8fdd089fd17e..5d3c5b07b8db 100644
--- a/arch/x86_64/kernel/apic.c
+++ b/arch/x86_64/kernel/apic.c
@@ -499,13 +499,10 @@ static int lapic_resume(struct sys_device *dev)
499 if (!apic_pm_state.active) 499 if (!apic_pm_state.active)
500 return 0; 500 return 0;
501 501
502 /* XXX: Pavel needs this for S3 resume, but can't explain why */
503 set_fixmap_nocache(FIX_APIC_BASE, APIC_DEFAULT_PHYS_BASE);
504
505 local_irq_save(flags); 502 local_irq_save(flags);
506 rdmsr(MSR_IA32_APICBASE, l, h); 503 rdmsr(MSR_IA32_APICBASE, l, h);
507 l &= ~MSR_IA32_APICBASE_BASE; 504 l &= ~MSR_IA32_APICBASE_BASE;
508 l |= MSR_IA32_APICBASE_ENABLE | APIC_DEFAULT_PHYS_BASE; 505 l |= MSR_IA32_APICBASE_ENABLE | mp_lapic_addr;
509 wrmsr(MSR_IA32_APICBASE, l, h); 506 wrmsr(MSR_IA32_APICBASE, l, h);
510 apic_write(APIC_LVTERR, ERROR_APIC_VECTOR | APIC_LVT_MASKED); 507 apic_write(APIC_LVTERR, ERROR_APIC_VECTOR | APIC_LVT_MASKED);
511 apic_write(APIC_ID, apic_pm_state.apic_id); 508 apic_write(APIC_ID, apic_pm_state.apic_id);