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authorIngo Molnar <mingo@elte.hu>2006-06-29 05:24:36 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-06-29 13:26:21 -0400
commitd1bef4ed5faf7d9872337b33c4269e45ae1bf960 (patch)
treea88c58e3102396382e9137a25a884af14421f6a6 /arch/x86_64
parentcfb9e32f2ff32ef5265c1c80fe68dd1a7f03a604 (diff)
[PATCH] genirq: rename desc->handler to desc->chip
This patch-queue improves the generic IRQ layer to be truly generic, by adding various abstractions and features to it, without impacting existing functionality. While the queue can be best described as "fix and improve everything in the generic IRQ layer that we could think of", and thus it consists of many smaller features and lots of cleanups, the one feature that stands out most is the new 'irq chip' abstraction. The irq-chip abstraction is about describing and coding and IRQ controller driver by mapping its raw hardware capabilities [and quirks, if needed] in a straightforward way, without having to think about "IRQ flow" (level/edge/etc.) type of details. This stands in contrast with the current 'irq-type' model of genirq architectures, which 'mixes' raw hardware capabilities with 'flow' details. The patchset supports both types of irq controller designs at once, and converts i386 and x86_64 to the new irq-chip design. As a bonus side-effect of the irq-chip approach, chained interrupt controllers (master/slave PIC constructs, etc.) are now supported by design as well. The end result of this patchset intends to be simpler architecture-level code and more consolidation between architectures. We reused many bits of code and many concepts from Russell King's ARM IRQ layer, the merging of which was one of the motivations for this patchset. This patch: rename desc->handler to desc->chip. Originally i did not want to do this, because it's a big patch. But having both "desc->handler", "desc->handle_irq" and "action->handler" caused a large degree of confusion and made the code appear alot less clean than it truly is. I have also attempted a dual approach as well by introducing a desc->chip alias - but that just wasnt robust enough and broke frequently. So lets get over with this quickly. The conversion was done automatically via scripts and converts all the code in the kernel. This renaming patch is the first one amongst the patches, so that the remaining patches can stay flexible and can be merged and split up without having some big monolithic patch act as a merge barrier. [akpm@osdl.org: build fix] [akpm@osdl.org: another build fix] Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/x86_64')
-rw-r--r--arch/x86_64/kernel/i8259.c6
-rw-r--r--arch/x86_64/kernel/io_apic.c16
-rw-r--r--arch/x86_64/kernel/irq.c6
3 files changed, 15 insertions, 13 deletions
diff --git a/arch/x86_64/kernel/i8259.c b/arch/x86_64/kernel/i8259.c
index 86b2c1e197aa..3dd1659427dc 100644
--- a/arch/x86_64/kernel/i8259.c
+++ b/arch/x86_64/kernel/i8259.c
@@ -235,7 +235,7 @@ void make_8259A_irq(unsigned int irq)
235{ 235{
236 disable_irq_nosync(irq); 236 disable_irq_nosync(irq);
237 io_apic_irqs &= ~(1<<irq); 237 io_apic_irqs &= ~(1<<irq);
238 irq_desc[irq].handler = &i8259A_irq_type; 238 irq_desc[irq].chip = &i8259A_irq_type;
239 enable_irq(irq); 239 enable_irq(irq);
240} 240}
241 241
@@ -468,12 +468,12 @@ void __init init_ISA_irqs (void)
468 /* 468 /*
469 * 16 old-style INTA-cycle interrupts: 469 * 16 old-style INTA-cycle interrupts:
470 */ 470 */
471 irq_desc[i].handler = &i8259A_irq_type; 471 irq_desc[i].chip = &i8259A_irq_type;
472 } else { 472 } else {
473 /* 473 /*
474 * 'high' PCI IRQs filled in on demand 474 * 'high' PCI IRQs filled in on demand
475 */ 475 */
476 irq_desc[i].handler = &no_irq_type; 476 irq_desc[i].chip = &no_irq_type;
477 } 477 }
478 } 478 }
479} 479}
diff --git a/arch/x86_64/kernel/io_apic.c b/arch/x86_64/kernel/io_apic.c
index c768d8a036d0..88a8736eb8ce 100644
--- a/arch/x86_64/kernel/io_apic.c
+++ b/arch/x86_64/kernel/io_apic.c
@@ -876,15 +876,17 @@ static struct hw_interrupt_type ioapic_edge_type;
876#define IOAPIC_EDGE 0 876#define IOAPIC_EDGE 0
877#define IOAPIC_LEVEL 1 877#define IOAPIC_LEVEL 1
878 878
879static inline void ioapic_register_intr(int irq, int vector, unsigned long trigger) 879static void ioapic_register_intr(int irq, int vector, unsigned long trigger)
880{ 880{
881 unsigned idx = use_pci_vector() && !platform_legacy_irq(irq) ? vector : irq; 881 unsigned idx;
882
883 idx = use_pci_vector() && !platform_legacy_irq(irq) ? vector : irq;
882 884
883 if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) || 885 if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) ||
884 trigger == IOAPIC_LEVEL) 886 trigger == IOAPIC_LEVEL)
885 irq_desc[idx].handler = &ioapic_level_type; 887 irq_desc[idx].chip = &ioapic_level_type;
886 else 888 else
887 irq_desc[idx].handler = &ioapic_edge_type; 889 irq_desc[idx].chip = &ioapic_edge_type;
888 set_intr_gate(vector, interrupt[idx]); 890 set_intr_gate(vector, interrupt[idx]);
889} 891}
890 892
@@ -986,7 +988,7 @@ static void __init setup_ExtINT_IRQ0_pin(unsigned int apic, unsigned int pin, in
986 * The timer IRQ doesn't have to know that behind the 988 * The timer IRQ doesn't have to know that behind the
987 * scene we have a 8259A-master in AEOI mode ... 989 * scene we have a 8259A-master in AEOI mode ...
988 */ 990 */
989 irq_desc[0].handler = &ioapic_edge_type; 991 irq_desc[0].chip = &ioapic_edge_type;
990 992
991 /* 993 /*
992 * Add it to the IO-APIC irq-routing table: 994 * Add it to the IO-APIC irq-routing table:
@@ -1683,7 +1685,7 @@ static inline void init_IO_APIC_traps(void)
1683 make_8259A_irq(irq); 1685 make_8259A_irq(irq);
1684 else 1686 else
1685 /* Strange. Oh, well.. */ 1687 /* Strange. Oh, well.. */
1686 irq_desc[irq].handler = &no_irq_type; 1688 irq_desc[irq].chip = &no_irq_type;
1687 } 1689 }
1688 } 1690 }
1689} 1691}
@@ -1900,7 +1902,7 @@ static inline void check_timer(void)
1900 apic_printk(APIC_VERBOSE, KERN_INFO "...trying to set up timer as Virtual Wire IRQ..."); 1902 apic_printk(APIC_VERBOSE, KERN_INFO "...trying to set up timer as Virtual Wire IRQ...");
1901 1903
1902 disable_8259A_irq(0); 1904 disable_8259A_irq(0);
1903 irq_desc[0].handler = &lapic_irq_type; 1905 irq_desc[0].chip = &lapic_irq_type;
1904 apic_write(APIC_LVT0, APIC_DM_FIXED | vector); /* Fixed mode */ 1906 apic_write(APIC_LVT0, APIC_DM_FIXED | vector); /* Fixed mode */
1905 enable_8259A_irq(0); 1907 enable_8259A_irq(0);
1906 1908
diff --git a/arch/x86_64/kernel/irq.c b/arch/x86_64/kernel/irq.c
index bfa82f52a5cc..0c2fb2c77bd0 100644
--- a/arch/x86_64/kernel/irq.c
+++ b/arch/x86_64/kernel/irq.c
@@ -79,7 +79,7 @@ int show_interrupts(struct seq_file *p, void *v)
79 for_each_online_cpu(j) 79 for_each_online_cpu(j)
80 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); 80 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
81#endif 81#endif
82 seq_printf(p, " %14s", irq_desc[i].handler->typename); 82 seq_printf(p, " %14s", irq_desc[i].chip->typename);
83 83
84 seq_printf(p, " %s", action->name); 84 seq_printf(p, " %s", action->name);
85 for (action=action->next; action; action = action->next) 85 for (action=action->next; action; action = action->next)
@@ -151,8 +151,8 @@ void fixup_irqs(cpumask_t map)
151 printk("Breaking affinity for irq %i\n", irq); 151 printk("Breaking affinity for irq %i\n", irq);
152 mask = map; 152 mask = map;
153 } 153 }
154 if (irq_desc[irq].handler->set_affinity) 154 if (irq_desc[irq].chip->set_affinity)
155 irq_desc[irq].handler->set_affinity(irq, mask); 155 irq_desc[irq].chip->set_affinity(irq, mask);
156 else if (irq_desc[irq].action && !(warned++)) 156 else if (irq_desc[irq].action && !(warned++))
157 printk("Cannot set affinity for irq %i\n", irq); 157 printk("Cannot set affinity for irq %i\n", irq);
158 } 158 }