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authorChuck Ebbert <76306.1226@compuserve.com>2006-06-15 04:41:52 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2006-06-21 15:00:01 -0400
commitead2bfeb7f739d2ad6e09dc1343f0da51feb7f51 (patch)
tree08a716dbc0c5f1db461a2f1d5773ce08bcbf7654 /arch/x86_64/pci
parentbdee9d98d281d84718eaff6bf0dd2b6ad418b36f (diff)
[PATCH] PCI: fix issues with extended conf space when MMCONFIG disabled because of e820
On 15 Jun 2006 03:45:10 +0200, Andi Kleen wrote: > Anyways I would say that if the BIOS can't get MCFG right then > it's likely not been validated on that board and shouldn't be used. According to Petr Vandrovec: ... "What is important (and checked) is address of MMCONFIG reported by MCFG table... Unfortunately code does not bother with printing that address :-( "Another problem is that code has hardcoded that MMCONFIG area is 256MB large. Unfortunately for the code PCI specification allows any power of two between 2MB and 256MB if vendor knows that such amount of busses (from 2 to 128) will be sufficient for system. With notebook it is quite possible that not full 8 bits are implemented for MMCONFIG bus number." So here is a patch. Unfortunately my system still fails the test because it doesn't reserve any part of the MMCONFIG area, but this may fix others. Booted on x86_64, only compiled on i386. x86_64 still remaps the max area (256MB) even though only 2MB is checked... but 2.6.16 had no check at all so it is still better. PCI: reduce size of x86 MMCONFIG reserved area check 1. Print the address of the MMCONFIG area when the test for that area being reserved fails. 2. Only check if the first 2MB is reserved, as that is the minimum. Signed-off-by: Chuck Ebbert <76306.1226@compuserve.com> Acked-by: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'arch/x86_64/pci')
-rw-r--r--arch/x86_64/pci/mmconfig.c13
1 files changed, 9 insertions, 4 deletions
diff --git a/arch/x86_64/pci/mmconfig.c b/arch/x86_64/pci/mmconfig.c
index a2060e4d5de6..3c55c76c6fd5 100644
--- a/arch/x86_64/pci/mmconfig.c
+++ b/arch/x86_64/pci/mmconfig.c
@@ -13,7 +13,10 @@
13 13
14#include "pci.h" 14#include "pci.h"
15 15
16#define MMCONFIG_APER_SIZE (256*1024*1024) 16/* aperture is up to 256MB but BIOS may reserve less */
17#define MMCONFIG_APER_MIN (2 * 1024*1024)
18#define MMCONFIG_APER_MAX (256 * 1024*1024)
19
17/* Verify the first 16 busses. We assume that systems with more busses 20/* Verify the first 16 busses. We assume that systems with more busses
18 get MCFG right. */ 21 get MCFG right. */
19#define MAX_CHECK_BUS 16 22#define MAX_CHECK_BUS 16
@@ -175,9 +178,10 @@ void __init pci_mmcfg_init(void)
175 return; 178 return;
176 179
177 if (!e820_all_mapped(pci_mmcfg_config[0].base_address, 180 if (!e820_all_mapped(pci_mmcfg_config[0].base_address,
178 pci_mmcfg_config[0].base_address + MMCONFIG_APER_SIZE, 181 pci_mmcfg_config[0].base_address + MMCONFIG_APER_MIN,
179 E820_RESERVED)) { 182 E820_RESERVED)) {
180 printk(KERN_ERR "PCI: BIOS Bug: MCFG area is not E820-reserved\n"); 183 printk(KERN_ERR "PCI: BIOS Bug: MCFG area at %x is not E820-reserved\n",
184 pci_mmcfg_config[0].base_address);
181 printk(KERN_ERR "PCI: Not using MMCONFIG.\n"); 185 printk(KERN_ERR "PCI: Not using MMCONFIG.\n");
182 return; 186 return;
183 } 187 }
@@ -190,7 +194,8 @@ void __init pci_mmcfg_init(void)
190 } 194 }
191 for (i = 0; i < pci_mmcfg_config_num; ++i) { 195 for (i = 0; i < pci_mmcfg_config_num; ++i) {
192 pci_mmcfg_virt[i].cfg = &pci_mmcfg_config[i]; 196 pci_mmcfg_virt[i].cfg = &pci_mmcfg_config[i];
193 pci_mmcfg_virt[i].virt = ioremap_nocache(pci_mmcfg_config[i].base_address, MMCONFIG_APER_SIZE); 197 pci_mmcfg_virt[i].virt = ioremap_nocache(pci_mmcfg_config[i].base_address,
198 MMCONFIG_APER_MAX);
194 if (!pci_mmcfg_virt[i].virt) { 199 if (!pci_mmcfg_virt[i].virt) {
195 printk("PCI: Cannot map mmconfig aperture for segment %d\n", 200 printk("PCI: Cannot map mmconfig aperture for segment %d\n",
196 pci_mmcfg_config[i].pci_segment_group_number); 201 pci_mmcfg_config[i].pci_segment_group_number);