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authorTony Luck <tony.luck@intel.com>2005-10-31 13:51:57 -0500
committerTony Luck <tony.luck@intel.com>2005-10-31 13:51:57 -0500
commitc7fb577e2a6cb04732541f2dc402bd46747f7558 (patch)
treedf3b1a1922ed13bfbcc45d08650c38beeb1a7bd1 /arch/x86_64/kernel
parent9cec58dc138d6fcad9f447a19c8ff69f6540e667 (diff)
parent581c1b14394aee60aff46ea67d05483261ed6527 (diff)
manual update from upstream:
Applied Al's change 06a544971fad0992fe8b92c5647538d573089dd4 to new location of swiotlb.c Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/x86_64/kernel')
-rw-r--r--arch/x86_64/kernel/i8259.c8
-rw-r--r--arch/x86_64/kernel/pci-gart.c4
-rw-r--r--arch/x86_64/kernel/pci-nommu.c2
-rw-r--r--arch/x86_64/kernel/setup.c2
-rw-r--r--arch/x86_64/kernel/suspend.c95
-rw-r--r--arch/x86_64/kernel/time.c32
6 files changed, 47 insertions, 96 deletions
diff --git a/arch/x86_64/kernel/i8259.c b/arch/x86_64/kernel/i8259.c
index b2a238b5a17e..c6c9791d77c1 100644
--- a/arch/x86_64/kernel/i8259.c
+++ b/arch/x86_64/kernel/i8259.c
@@ -494,7 +494,7 @@ void invalidate_interrupt7(void);
494void thermal_interrupt(void); 494void thermal_interrupt(void);
495void i8254_timer_resume(void); 495void i8254_timer_resume(void);
496 496
497static void setup_timer(void) 497static void setup_timer_hardware(void)
498{ 498{
499 outb_p(0x34,0x43); /* binary, mode 2, LSB/MSB, ch 0 */ 499 outb_p(0x34,0x43); /* binary, mode 2, LSB/MSB, ch 0 */
500 udelay(10); 500 udelay(10);
@@ -505,13 +505,13 @@ static void setup_timer(void)
505 505
506static int timer_resume(struct sys_device *dev) 506static int timer_resume(struct sys_device *dev)
507{ 507{
508 setup_timer(); 508 setup_timer_hardware();
509 return 0; 509 return 0;
510} 510}
511 511
512void i8254_timer_resume(void) 512void i8254_timer_resume(void)
513{ 513{
514 setup_timer(); 514 setup_timer_hardware();
515} 515}
516 516
517static struct sysdev_class timer_sysclass = { 517static struct sysdev_class timer_sysclass = {
@@ -594,7 +594,7 @@ void __init init_IRQ(void)
594 * Set the clock to HZ Hz, we already have a valid 594 * Set the clock to HZ Hz, we already have a valid
595 * vector now: 595 * vector now:
596 */ 596 */
597 setup_timer(); 597 setup_timer_hardware();
598 598
599 if (!acpi_ioapic) 599 if (!acpi_ioapic)
600 setup_irq(2, &irq2); 600 setup_irq(2, &irq2);
diff --git a/arch/x86_64/kernel/pci-gart.c b/arch/x86_64/kernel/pci-gart.c
index cf0a0315d586..88be97c96987 100644
--- a/arch/x86_64/kernel/pci-gart.c
+++ b/arch/x86_64/kernel/pci-gart.c
@@ -187,7 +187,7 @@ static void flush_gart(struct device *dev)
187 187
188/* Allocate DMA memory on node near device */ 188/* Allocate DMA memory on node near device */
189noinline 189noinline
190static void *dma_alloc_pages(struct device *dev, unsigned gfp, unsigned order) 190static void *dma_alloc_pages(struct device *dev, gfp_t gfp, unsigned order)
191{ 191{
192 struct page *page; 192 struct page *page;
193 int node; 193 int node;
@@ -204,7 +204,7 @@ static void *dma_alloc_pages(struct device *dev, unsigned gfp, unsigned order)
204 */ 204 */
205void * 205void *
206dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, 206dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
207 unsigned gfp) 207 gfp_t gfp)
208{ 208{
209 void *memory; 209 void *memory;
210 unsigned long dma_mask = 0; 210 unsigned long dma_mask = 0;
diff --git a/arch/x86_64/kernel/pci-nommu.c b/arch/x86_64/kernel/pci-nommu.c
index 67d90b89af0b..5a981dca87ff 100644
--- a/arch/x86_64/kernel/pci-nommu.c
+++ b/arch/x86_64/kernel/pci-nommu.c
@@ -24,7 +24,7 @@ EXPORT_SYMBOL(iommu_sac_force);
24 */ 24 */
25 25
26void *dma_alloc_coherent(struct device *hwdev, size_t size, 26void *dma_alloc_coherent(struct device *hwdev, size_t size,
27 dma_addr_t *dma_handle, unsigned gfp) 27 dma_addr_t *dma_handle, gfp_t gfp)
28{ 28{
29 void *ret; 29 void *ret;
30 u64 mask; 30 u64 mask;
diff --git a/arch/x86_64/kernel/setup.c b/arch/x86_64/kernel/setup.c
index cb28df14ff6f..da0bc3e7bdf5 100644
--- a/arch/x86_64/kernel/setup.c
+++ b/arch/x86_64/kernel/setup.c
@@ -1213,7 +1213,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
1213 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, 1213 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1214 1214
1215 /* Intel-defined (#2) */ 1215 /* Intel-defined (#2) */
1216 "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "est", 1216 "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", NULL, "est",
1217 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL, 1217 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
1218 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, 1218 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1219 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, 1219 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
diff --git a/arch/x86_64/kernel/suspend.c b/arch/x86_64/kernel/suspend.c
index f066c6ab3618..fd2bef780882 100644
--- a/arch/x86_64/kernel/suspend.c
+++ b/arch/x86_64/kernel/suspend.c
@@ -63,13 +63,12 @@ void save_processor_state(void)
63 __save_processor_state(&saved_context); 63 __save_processor_state(&saved_context);
64} 64}
65 65
66static void 66static void do_fpu_end(void)
67do_fpu_end(void)
68{ 67{
69 /* restore FPU regs if necessary */ 68 /*
70 /* Do it out of line so that gcc does not move cr0 load to some stupid place */ 69 * Restore FPU regs if necessary
71 kernel_fpu_end(); 70 */
72 mxcsr_feature_mask_init(); 71 kernel_fpu_end();
73} 72}
74 73
75void __restore_processor_state(struct saved_context *ctxt) 74void __restore_processor_state(struct saved_context *ctxt)
@@ -148,57 +147,7 @@ extern int restore_image(void);
148 147
149pgd_t *temp_level4_pgt; 148pgd_t *temp_level4_pgt;
150 149
151static void **pages; 150static int res_phys_pud_init(pud_t *pud, unsigned long address, unsigned long end)
152
153static inline void *__add_page(void)
154{
155 void **c;
156
157 c = (void **)get_usable_page(GFP_ATOMIC);
158 if (c) {
159 *c = pages;
160 pages = c;
161 }
162 return c;
163}
164
165static inline void *__next_page(void)
166{
167 void **c;
168
169 c = pages;
170 if (c) {
171 pages = *c;
172 *c = NULL;
173 }
174 return c;
175}
176
177/*
178 * Try to allocate as many usable pages as needed and daisy chain them.
179 * If one allocation fails, free the pages allocated so far
180 */
181static int alloc_usable_pages(unsigned long n)
182{
183 void *p;
184
185 pages = NULL;
186 do
187 if (!__add_page())
188 break;
189 while (--n);
190 if (n) {
191 p = __next_page();
192 while (p) {
193 free_page((unsigned long)p);
194 p = __next_page();
195 }
196 return -ENOMEM;
197 }
198 return 0;
199}
200
201static void res_phys_pud_init(pud_t *pud, unsigned long address, unsigned long end)
202{ 151{
203 long i, j; 152 long i, j;
204 153
@@ -212,7 +161,9 @@ static void res_phys_pud_init(pud_t *pud, unsigned long address, unsigned long e
212 if (paddr >= end) 161 if (paddr >= end)
213 break; 162 break;
214 163
215 pmd = (pmd_t *)__next_page(); 164 pmd = (pmd_t *)get_safe_page(GFP_ATOMIC);
165 if (!pmd)
166 return -ENOMEM;
216 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE)); 167 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
217 for (j = 0; j < PTRS_PER_PMD; pmd++, j++, paddr += PMD_SIZE) { 168 for (j = 0; j < PTRS_PER_PMD; pmd++, j++, paddr += PMD_SIZE) {
218 unsigned long pe; 169 unsigned long pe;
@@ -224,13 +175,17 @@ static void res_phys_pud_init(pud_t *pud, unsigned long address, unsigned long e
224 set_pmd(pmd, __pmd(pe)); 175 set_pmd(pmd, __pmd(pe));
225 } 176 }
226 } 177 }
178 return 0;
227} 179}
228 180
229static void set_up_temporary_mappings(void) 181static int set_up_temporary_mappings(void)
230{ 182{
231 unsigned long start, end, next; 183 unsigned long start, end, next;
184 int error;
232 185
233 temp_level4_pgt = (pgd_t *)__next_page(); 186 temp_level4_pgt = (pgd_t *)get_safe_page(GFP_ATOMIC);
187 if (!temp_level4_pgt)
188 return -ENOMEM;
234 189
235 /* It is safe to reuse the original kernel mapping */ 190 /* It is safe to reuse the original kernel mapping */
236 set_pgd(temp_level4_pgt + pgd_index(__START_KERNEL_map), 191 set_pgd(temp_level4_pgt + pgd_index(__START_KERNEL_map),
@@ -241,29 +196,27 @@ static void set_up_temporary_mappings(void)
241 end = (unsigned long)pfn_to_kaddr(end_pfn); 196 end = (unsigned long)pfn_to_kaddr(end_pfn);
242 197
243 for (; start < end; start = next) { 198 for (; start < end; start = next) {
244 pud_t *pud = (pud_t *)__next_page(); 199 pud_t *pud = (pud_t *)get_safe_page(GFP_ATOMIC);
200 if (!pud)
201 return -ENOMEM;
245 next = start + PGDIR_SIZE; 202 next = start + PGDIR_SIZE;
246 if (next > end) 203 if (next > end)
247 next = end; 204 next = end;
248 res_phys_pud_init(pud, __pa(start), __pa(next)); 205 if ((error = res_phys_pud_init(pud, __pa(start), __pa(next))))
206 return error;
249 set_pgd(temp_level4_pgt + pgd_index(start), 207 set_pgd(temp_level4_pgt + pgd_index(start),
250 mk_kernel_pgd(__pa(pud))); 208 mk_kernel_pgd(__pa(pud)));
251 } 209 }
210 return 0;
252} 211}
253 212
254int swsusp_arch_resume(void) 213int swsusp_arch_resume(void)
255{ 214{
256 unsigned long n; 215 int error;
257 216
258 n = ((end_pfn << PAGE_SHIFT) + PUD_SIZE - 1) >> PUD_SHIFT;
259 n += (n + PTRS_PER_PUD - 1) / PTRS_PER_PUD + 1;
260 pr_debug("swsusp_arch_resume(): pages needed = %lu\n", n);
261 if (alloc_usable_pages(n)) {
262 free_eaten_memory();
263 return -ENOMEM;
264 }
265 /* We have got enough memory and from now on we cannot recover */ 217 /* We have got enough memory and from now on we cannot recover */
266 set_up_temporary_mappings(); 218 if ((error = set_up_temporary_mappings()))
219 return error;
267 restore_image(); 220 restore_image();
268 return 0; 221 return 0;
269} 222}
diff --git a/arch/x86_64/kernel/time.c b/arch/x86_64/kernel/time.c
index 703acde2a1a5..fdaddc4e5284 100644
--- a/arch/x86_64/kernel/time.c
+++ b/arch/x86_64/kernel/time.c
@@ -42,10 +42,6 @@
42#include <asm/apic.h> 42#include <asm/apic.h>
43#endif 43#endif
44 44
45u64 jiffies_64 = INITIAL_JIFFIES;
46
47EXPORT_SYMBOL(jiffies_64);
48
49#ifdef CONFIG_CPU_FREQ 45#ifdef CONFIG_CPU_FREQ
50static void cpufreq_delayed_get(void); 46static void cpufreq_delayed_get(void);
51#endif 47#endif
@@ -481,9 +477,9 @@ static irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
481static unsigned int cyc2ns_scale; 477static unsigned int cyc2ns_scale;
482#define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */ 478#define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */
483 479
484static inline void set_cyc2ns_scale(unsigned long cpu_mhz) 480static inline void set_cyc2ns_scale(unsigned long cpu_khz)
485{ 481{
486 cyc2ns_scale = (1000 << CYC2NS_SCALE_FACTOR)/cpu_mhz; 482 cyc2ns_scale = (1000000 << CYC2NS_SCALE_FACTOR)/cpu_khz;
487} 483}
488 484
489static inline unsigned long long cycles_2_ns(unsigned long long cyc) 485static inline unsigned long long cycles_2_ns(unsigned long long cyc)
@@ -655,7 +651,7 @@ static int time_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
655 vxtime.tsc_quot = (1000L << 32) / cpu_khz; 651 vxtime.tsc_quot = (1000L << 32) / cpu_khz;
656 } 652 }
657 653
658 set_cyc2ns_scale(cpu_khz_ref / 1000); 654 set_cyc2ns_scale(cpu_khz_ref);
659 655
660 return 0; 656 return 0;
661} 657}
@@ -939,7 +935,7 @@ void __init time_init(void)
939 rdtscll_sync(&vxtime.last_tsc); 935 rdtscll_sync(&vxtime.last_tsc);
940 setup_irq(0, &irq0); 936 setup_irq(0, &irq0);
941 937
942 set_cyc2ns_scale(cpu_khz / 1000); 938 set_cyc2ns_scale(cpu_khz);
943 939
944#ifndef CONFIG_SMP 940#ifndef CONFIG_SMP
945 time_init_gtod(); 941 time_init_gtod();
@@ -1093,6 +1089,7 @@ static unsigned long PIE_freq = DEFAULT_RTC_INT_FREQ;
1093static unsigned long PIE_count; 1089static unsigned long PIE_count;
1094 1090
1095static unsigned long hpet_rtc_int_freq; /* RTC interrupt frequency */ 1091static unsigned long hpet_rtc_int_freq; /* RTC interrupt frequency */
1092static unsigned int hpet_t1_cmp; /* cached comparator register */
1096 1093
1097int is_hpet_enabled(void) 1094int is_hpet_enabled(void)
1098{ 1095{
@@ -1129,10 +1126,12 @@ int hpet_rtc_timer_init(void)
1129 cnt = hpet_readl(HPET_COUNTER); 1126 cnt = hpet_readl(HPET_COUNTER);
1130 cnt += ((hpet_tick*HZ)/hpet_rtc_int_freq); 1127 cnt += ((hpet_tick*HZ)/hpet_rtc_int_freq);
1131 hpet_writel(cnt, HPET_T1_CMP); 1128 hpet_writel(cnt, HPET_T1_CMP);
1129 hpet_t1_cmp = cnt;
1132 local_irq_restore(flags); 1130 local_irq_restore(flags);
1133 1131
1134 cfg = hpet_readl(HPET_T1_CFG); 1132 cfg = hpet_readl(HPET_T1_CFG);
1135 cfg |= HPET_TN_ENABLE | HPET_TN_SETVAL | HPET_TN_32BIT; 1133 cfg &= ~HPET_TN_PERIODIC;
1134 cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
1136 hpet_writel(cfg, HPET_T1_CFG); 1135 hpet_writel(cfg, HPET_T1_CFG);
1137 1136
1138 return 1; 1137 return 1;
@@ -1142,8 +1141,12 @@ static void hpet_rtc_timer_reinit(void)
1142{ 1141{
1143 unsigned int cfg, cnt; 1142 unsigned int cfg, cnt;
1144 1143
1145 if (!(PIE_on | AIE_on | UIE_on)) 1144 if (unlikely(!(PIE_on | AIE_on | UIE_on))) {
1145 cfg = hpet_readl(HPET_T1_CFG);
1146 cfg &= ~HPET_TN_ENABLE;
1147 hpet_writel(cfg, HPET_T1_CFG);
1146 return; 1148 return;
1149 }
1147 1150
1148 if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ)) 1151 if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
1149 hpet_rtc_int_freq = PIE_freq; 1152 hpet_rtc_int_freq = PIE_freq;
@@ -1151,15 +1154,10 @@ static void hpet_rtc_timer_reinit(void)
1151 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ; 1154 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
1152 1155
1153 /* It is more accurate to use the comparator value than current count.*/ 1156 /* It is more accurate to use the comparator value than current count.*/
1154 cnt = hpet_readl(HPET_T1_CMP); 1157 cnt = hpet_t1_cmp;
1155 cnt += hpet_tick*HZ/hpet_rtc_int_freq; 1158 cnt += hpet_tick*HZ/hpet_rtc_int_freq;
1156 hpet_writel(cnt, HPET_T1_CMP); 1159 hpet_writel(cnt, HPET_T1_CMP);
1157 1160 hpet_t1_cmp = cnt;
1158 cfg = hpet_readl(HPET_T1_CFG);
1159 cfg |= HPET_TN_ENABLE | HPET_TN_SETVAL | HPET_TN_32BIT;
1160 hpet_writel(cfg, HPET_T1_CFG);
1161
1162 return;
1163} 1161}
1164 1162
1165/* 1163/*