[PATCH] x86_64: apic support for extended apic interrupt

Add support for extended APIC LVT found in future AMD processors.

Signed-off-by: Jacob Shin <jacob.shin@amd.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

1 files changed, 4 insertions, 6 deletions

diff --git a/arch/x86_64/kernel/apic.c b/arch/x86_64/kernel/apic.c
index 53fc17d894e8..396e125cb212 100644
--- a/arch/x86_64/kernel/apic.c
+++ b/arch/x86_64/kernel/apic.c
@@ -909,15 +909,13 @@ int setup_profiling_timer(unsigned int multiplier)
         return -EINVAL;
 }
 
-#ifdef CONFIG_X86_MCE_AMD
-void setup_threshold_lvt(unsigned long lvt_off)
+void setup_APIC_extened_lvt(unsigned char lvt_off, unsigned char vector,
+                            unsigned char msg_type, unsigned char mask)
 {
-        unsigned int v = 0;
-        unsigned long reg = (lvt_off << 4) + 0x500;
-        v |= THRESHOLD_APIC_VECTOR;
+        unsigned long reg = (lvt_off << 4) + K8_APIC_EXT_LVT_BASE;
+        unsigned int  v   = (mask << 16) | (msg_type << 8) | vector;
         apic_write(reg, v);
 }
-#endif /* CONFIG_X86_MCE_AMD */
 
 #undef APIC_DIVISOR