[PATCH] x86_64: disallow multi-byte hardware execution breakpoints

While AMD formally permits multi-byte execution breakpoints, Intel
disallows 8-byte as much as 2- or 4-byte ones.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

1 files changed, 3 insertions, 3 deletions

diff --git a/arch/x86_64/kernel/ptrace.c b/arch/x86_64/kernel/ptrace.c
index 53205622351c..d44b2c1e63a6 100644
--- a/arch/x86_64/kernel/ptrace.c
+++ b/arch/x86_64/kernel/ptrace.c
@@ -420,9 +420,9 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                 case offsetof(struct user, u_debugreg[7]):
                         /* See arch/i386/kernel/ptrace.c for an explanation of
                          * this awkward check.*/
-                                  data &= ~DR_CONTROL_RESERVED;
-                                  for(i=0; i<4; i++)
-                                          if ((0x5454 >> ((data >> (16 + 4*i)) & 0xf)) & 1)
+                        data &= ~DR_CONTROL_RESERVED;
+                        for(i=0; i<4; i++)
+                                if ((0x5554 >> ((data >> (16 + 4*i)) & 0xf)) & 1)
                                         break;
                         if (i == 4) {
                                 child->thread.debugreg7 = data;