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authorJon Mason <jdmason@us.ibm.com>2006-06-26 07:58:11 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-06-26 13:48:18 -0400
commit0dc243ae10c8309c170a3af9f1adad1924a9f217 (patch)
treef550a8097913728ce96322d5f799329489db85a1 /arch/x86_64/kernel/pci-gart.c
parenta3c042a0f022dade8e02bf6c9be5d2379d7e133c (diff)
[PATCH] x86_64: Calgary IOMMU - IOMMU abstractions
This patch creates a new interface for IOMMUs by adding a centralized location for IOMMU allocation (for translation tables/apertures) and IOMMU initialization. In creating these, code was moved around for abstraction, uniformity, and consiceness. Take note of the move of the iommu_setup bootarg parsing code to __setup. This is enabled by moving back the location of the aperture allocation/detection to mem init (which while ugly, was already the location of the swiotlb_init). While a slight departure from the previous patch, I belive this provides the true intention of the previous versions of the patch which changed this code. It also makes the addition of the upcoming calgary code much cleaner than previous patches. [AK: Removed one broken change. iommu_setup still has to be called early] Signed-off-by: Muli Ben-Yehuda <muli@il.ibm.com> Signed-off-by: Jon Mason <jdmason@us.ibm.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/x86_64/kernel/pci-gart.c')
-rw-r--r--arch/x86_64/kernel/pci-gart.c13
1 files changed, 6 insertions, 7 deletions
diff --git a/arch/x86_64/kernel/pci-gart.c b/arch/x86_64/kernel/pci-gart.c
index 4f67957d2b42..9a93954bed37 100644
--- a/arch/x86_64/kernel/pci-gart.c
+++ b/arch/x86_64/kernel/pci-gart.c
@@ -571,7 +571,7 @@ static struct dma_mapping_ops gart_dma_ops = {
571 .unmap_sg = gart_unmap_sg, 571 .unmap_sg = gart_unmap_sg,
572}; 572};
573 573
574static int __init pci_iommu_init(void) 574void __init gart_iommu_init(void)
575{ 575{
576 struct agp_kern_info info; 576 struct agp_kern_info info;
577 unsigned long aper_size; 577 unsigned long aper_size;
@@ -581,7 +581,7 @@ static int __init pci_iommu_init(void)
581 581
582 if (cache_k8_northbridges() < 0 || num_k8_northbridges == 0) { 582 if (cache_k8_northbridges() < 0 || num_k8_northbridges == 0) {
583 printk(KERN_INFO "PCI-GART: No AMD northbridge found.\n"); 583 printk(KERN_INFO "PCI-GART: No AMD northbridge found.\n");
584 return -ENODEV; 584 return;
585 } 585 }
586 586
587#ifndef CONFIG_AGP_AMD64 587#ifndef CONFIG_AGP_AMD64
@@ -595,11 +595,11 @@ static int __init pci_iommu_init(void)
595#endif 595#endif
596 596
597 if (swiotlb) 597 if (swiotlb)
598 return -ENODEV; 598 return;
599 599
600 /* Did we detect a different HW IOMMU? */ 600 /* Did we detect a different HW IOMMU? */
601 if (iommu_detected && !iommu_aperture) 601 if (iommu_detected && !iommu_aperture)
602 return -1; 602 return;
603 603
604 if (no_iommu || 604 if (no_iommu ||
605 (!force_iommu && end_pfn <= MAX_DMA32_PFN) || 605 (!force_iommu && end_pfn <= MAX_DMA32_PFN) ||
@@ -611,7 +611,7 @@ static int __init pci_iommu_init(void)
611 "but IOMMU not available.\n" 611 "but IOMMU not available.\n"
612 KERN_ERR "WARNING 32bit PCI may malfunction.\n"); 612 KERN_ERR "WARNING 32bit PCI may malfunction.\n");
613 } 613 }
614 return -ENODEV; 614 return;
615 } 615 }
616 616
617 printk(KERN_INFO "PCI-DMA: using GART IOMMU.\n"); 617 printk(KERN_INFO "PCI-DMA: using GART IOMMU.\n");
@@ -678,11 +678,10 @@ static int __init pci_iommu_init(void)
678 678
679 flush_gart(); 679 flush_gart();
680 dma_ops = &gart_dma_ops; 680 dma_ops = &gart_dma_ops;
681 return 0;
682} 681}
683 682
684/* Must execute after PCI subsystem */ 683/* Must execute after PCI subsystem */
685fs_initcall(pci_iommu_init); 684fs_initcall(gart_iommu_init);
686 685
687void gart_parse_options(char *p) 686void gart_parse_options(char *p)
688{ 687{