Merge branch 'for-linus' of git://one.firstfloor.org/home/andi/git/linux-2.6

* 'for-linus' of git://one.firstfloor.org/home/andi/git/linux-2.6: (225 commits)
  [PATCH] Don't set calgary iommu as default y
  [PATCH] i386/x86-64: New Intel feature flags
  [PATCH] x86: Add a cumulative thermal throttle event counter.
  [PATCH] i386: Make the jiffies compares use the 64bit safe macros.
  [PATCH] x86: Refactor thermal throttle processing
  [PATCH] Add 64bit jiffies compares (for use with get_jiffies_64)
  [PATCH] Fix unwinder warning in traps.c
  [PATCH] x86: Allow disabling early pci scans with pci=noearly or disallowing conf1
  [PATCH] x86: Move direct PCI scanning functions out of line
  [PATCH] i386/x86-64: Make all early PCI scans dependent on CONFIG_PCI
  [PATCH] Don't leak NT bit into next task
  [PATCH] i386/x86-64: Work around gcc bug with noreturn functions in unwinder
  [PATCH] Fix some broken white space in ia32_signal.c
  [PATCH] Initialize argument registers for 32bit signal handlers.
  [PATCH] Remove all traces of signal number conversion
  [PATCH] Don't synchronize time reading on single core AMD systems
  [PATCH] Remove outdated comment in x86-64 mmconfig code
  [PATCH] Use string instructions for Core2 copy/clear
  [PATCH] x86: - restore i8259A eoi status on resume
  [PATCH] i386: Split multi-line printk in oops output.
  ...

1 files changed, 8 insertions, 7 deletions

diff --git a/arch/x86_64/kernel/head.S b/arch/x86_64/kernel/head.S
index c9739ca81d06..1e6f80870679 100644
--- a/arch/x86_64/kernel/head.S
+++ b/arch/x86_64/kernel/head.S
@@ -5,8 +5,6 @@
  *  Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
  *  Copyright (C) 2000 Karsten Keil <kkeil@suse.de>
  *  Copyright (C) 2001,2002 Andi Kleen <ak@suse.de>
- *
- *  $Id: head.S,v 1.49 2002/03/19 17:39:25 ak Exp $
  */
 
 
@@ -187,12 +185,15 @@ startup_64:
         
         /* Finally jump to run C code and to be on real kernel address
          * Since we are running on identity-mapped space we have to jump
-         * to the full 64bit address , this is only possible as indirect
-         * jump
+         * to the full 64bit address, this is only possible as indirect
+         * jump.  In addition we need to ensure %cs is set so we make this
+         * a far return.
          */
         movq    initial_code(%rip),%rax
-        pushq   $0              # fake return address
-        jmp     *%rax
+        pushq   $0              # fake return address to stop unwinder
+        pushq   $__KERNEL_CS    # set correct cs
+        pushq   %rax            # target address in negative space
+        lretq
 
         /* SMP bootup changes these two */
         .align  8
@@ -371,7 +372,7 @@ ENTRY(cpu_gdt_table)
         .quad   0,0                     /* TSS */
         .quad   0,0                     /* LDT */
         .quad   0,0,0                   /* three TLS descriptors */ 
-        .quad   0                       /* unused */
+        .quad   0x0000f40000000000      /* node/CPU stored in limit */
 gdt_end:        
         /* asm/segment.h:GDT_ENTRIES must match this */ 
         /* This should be a multiple of the cache line size */