diff options
author | Andi Kleen <ak@suse.de> | 2005-09-12 12:49:24 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-09-12 13:49:55 -0400 |
commit | 5a40b7c2abdedcf53c9a6ee790991acfcef5b6c7 (patch) | |
tree | e326a2d01c30be580c14bd6c74c19a2807c1cdad /arch/x86_64/kernel/apic.c | |
parent | 61c11341ed798db9b99b30c1711c1cf458457806 (diff) |
[PATCH] x86-64: Remove code for outdated APICs
No x86-64 chipset has these APICs.
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/x86_64/kernel/apic.c')
-rw-r--r-- | arch/x86_64/kernel/apic.c | 15 |
1 files changed, 2 insertions, 13 deletions
diff --git a/arch/x86_64/kernel/apic.c b/arch/x86_64/kernel/apic.c index 9af0cc3e2ccc..fc84bea42fd4 100644 --- a/arch/x86_64/kernel/apic.c +++ b/arch/x86_64/kernel/apic.c | |||
@@ -109,11 +109,8 @@ void clear_local_APIC(void) | |||
109 | if (maxlvt >= 4) | 109 | if (maxlvt >= 4) |
110 | apic_write_around(APIC_LVTPC, APIC_LVT_MASKED); | 110 | apic_write_around(APIC_LVTPC, APIC_LVT_MASKED); |
111 | v = GET_APIC_VERSION(apic_read(APIC_LVR)); | 111 | v = GET_APIC_VERSION(apic_read(APIC_LVR)); |
112 | if (APIC_INTEGRATED(v)) { /* !82489DX */ | 112 | apic_write(APIC_ESR, 0); |
113 | if (maxlvt > 3) /* Due to Pentium errata 3AP and 11AP. */ | 113 | apic_read(APIC_ESR); |
114 | apic_write(APIC_ESR, 0); | ||
115 | apic_read(APIC_ESR); | ||
116 | } | ||
117 | } | 114 | } |
118 | 115 | ||
119 | void __init connect_bsp_APIC(void) | 116 | void __init connect_bsp_APIC(void) |
@@ -316,8 +313,6 @@ void __init init_bsp_APIC(void) | |||
316 | */ | 313 | */ |
317 | apic_write_around(APIC_LVT0, APIC_DM_EXTINT); | 314 | apic_write_around(APIC_LVT0, APIC_DM_EXTINT); |
318 | value = APIC_DM_NMI; | 315 | value = APIC_DM_NMI; |
319 | if (!APIC_INTEGRATED(ver)) /* 82489DX */ | ||
320 | value |= APIC_LVT_LEVEL_TRIGGER; | ||
321 | apic_write_around(APIC_LVT1, value); | 316 | apic_write_around(APIC_LVT1, value); |
322 | } | 317 | } |
323 | 318 | ||
@@ -422,15 +417,11 @@ void __cpuinit setup_local_APIC (void) | |||
422 | value = APIC_DM_NMI; | 417 | value = APIC_DM_NMI; |
423 | else | 418 | else |
424 | value = APIC_DM_NMI | APIC_LVT_MASKED; | 419 | value = APIC_DM_NMI | APIC_LVT_MASKED; |
425 | if (!APIC_INTEGRATED(ver)) /* 82489DX */ | ||
426 | value |= APIC_LVT_LEVEL_TRIGGER; | ||
427 | apic_write_around(APIC_LVT1, value); | 420 | apic_write_around(APIC_LVT1, value); |
428 | 421 | ||
429 | { | 422 | { |
430 | unsigned oldvalue; | 423 | unsigned oldvalue; |
431 | maxlvt = get_maxlvt(); | 424 | maxlvt = get_maxlvt(); |
432 | if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */ | ||
433 | apic_write(APIC_ESR, 0); | ||
434 | oldvalue = apic_read(APIC_ESR); | 425 | oldvalue = apic_read(APIC_ESR); |
435 | value = ERROR_APIC_VECTOR; // enables sending errors | 426 | value = ERROR_APIC_VECTOR; // enables sending errors |
436 | apic_write_around(APIC_LVTERR, value); | 427 | apic_write_around(APIC_LVTERR, value); |
@@ -674,8 +665,6 @@ static void __setup_APIC_LVTT(unsigned int clocks) | |||
674 | 665 | ||
675 | ver = GET_APIC_VERSION(apic_read(APIC_LVR)); | 666 | ver = GET_APIC_VERSION(apic_read(APIC_LVR)); |
676 | lvtt_value = APIC_LVT_TIMER_PERIODIC | LOCAL_TIMER_VECTOR; | 667 | lvtt_value = APIC_LVT_TIMER_PERIODIC | LOCAL_TIMER_VECTOR; |
677 | if (!APIC_INTEGRATED(ver)) | ||
678 | lvtt_value |= SET_APIC_TIMER_BASE(APIC_TIMER_BASE_DIV); | ||
679 | apic_write_around(APIC_LVTT, lvtt_value); | 668 | apic_write_around(APIC_LVTT, lvtt_value); |
680 | 669 | ||
681 | /* | 670 | /* |