diff options
author | Pallipadi, Venkatesh <venkatesh.pallipadi@intel.com> | 2009-02-06 19:52:05 -0500 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2009-02-09 05:15:15 -0500 |
commit | e736ad548db152776de61d7a26805cfae77ce5ce (patch) | |
tree | bab2cb6560f2e038ccebf891cd847f37fd61a1b8 /arch/x86 | |
parent | 0cd5c3c80a0ebd68c08312fa7d8c13149cc61c4c (diff) |
x86: add clflush before monitor for Intel 7400 series
For Intel 7400 series CPUs, the recommendation is to use a clflush on the
monitored address just before monitor and mwait pair [1].
This clflush makes sure that there are no false wakeups from mwait when the
monitored address was recently written to.
[1] "MONITOR/MWAIT Recommendations for Intel Xeon Processor 7400 series"
section in specification update document of 7400 series
http://download.intel.com/design/xeon/specupdt/32033601.pdf
Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86')
-rw-r--r-- | arch/x86/include/asm/cpufeature.h | 1 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/intel.c | 3 | ||||
-rw-r--r-- | arch/x86/kernel/process.c | 6 |
3 files changed, 10 insertions, 0 deletions
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h index ea408dcba513..7301e60dc4a8 100644 --- a/arch/x86/include/asm/cpufeature.h +++ b/arch/x86/include/asm/cpufeature.h | |||
@@ -93,6 +93,7 @@ | |||
93 | #define X86_FEATURE_XTOPOLOGY (3*32+22) /* cpu topology enum extensions */ | 93 | #define X86_FEATURE_XTOPOLOGY (3*32+22) /* cpu topology enum extensions */ |
94 | #define X86_FEATURE_TSC_RELIABLE (3*32+23) /* TSC is known to be reliable */ | 94 | #define X86_FEATURE_TSC_RELIABLE (3*32+23) /* TSC is known to be reliable */ |
95 | #define X86_FEATURE_NONSTOP_TSC (3*32+24) /* TSC does not stop in C states */ | 95 | #define X86_FEATURE_NONSTOP_TSC (3*32+24) /* TSC does not stop in C states */ |
96 | #define X86_FEATURE_CLFLUSH_MONITOR (3*32+25) /* "" clflush reqd with monitor */ | ||
96 | 97 | ||
97 | /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ | 98 | /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ |
98 | #define X86_FEATURE_XMM3 (4*32+ 0) /* "pni" SSE-3 */ | 99 | #define X86_FEATURE_XMM3 (4*32+ 0) /* "pni" SSE-3 */ |
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index 430e5c38a544..24ff26a38ade 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c | |||
@@ -291,6 +291,9 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c) | |||
291 | ds_init_intel(c); | 291 | ds_init_intel(c); |
292 | } | 292 | } |
293 | 293 | ||
294 | if (c->x86 == 6 && c->x86_model == 29 && cpu_has_clflush) | ||
295 | set_cpu_cap(c, X86_FEATURE_CLFLUSH_MONITOR); | ||
296 | |||
294 | #ifdef CONFIG_X86_64 | 297 | #ifdef CONFIG_X86_64 |
295 | if (c->x86 == 15) | 298 | if (c->x86 == 15) |
296 | c->x86_cache_alignment = c->x86_clflush_size * 2; | 299 | c->x86_cache_alignment = c->x86_clflush_size * 2; |
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c index e68bb9e30864..6d12f7e37f8c 100644 --- a/arch/x86/kernel/process.c +++ b/arch/x86/kernel/process.c | |||
@@ -180,6 +180,9 @@ void mwait_idle_with_hints(unsigned long ax, unsigned long cx) | |||
180 | 180 | ||
181 | trace_power_start(&it, POWER_CSTATE, (ax>>4)+1); | 181 | trace_power_start(&it, POWER_CSTATE, (ax>>4)+1); |
182 | if (!need_resched()) { | 182 | if (!need_resched()) { |
183 | if (cpu_has(¤t_cpu_data, X86_FEATURE_CLFLUSH_MONITOR)) | ||
184 | clflush((void *)¤t_thread_info()->flags); | ||
185 | |||
183 | __monitor((void *)¤t_thread_info()->flags, 0, 0); | 186 | __monitor((void *)¤t_thread_info()->flags, 0, 0); |
184 | smp_mb(); | 187 | smp_mb(); |
185 | if (!need_resched()) | 188 | if (!need_resched()) |
@@ -194,6 +197,9 @@ static void mwait_idle(void) | |||
194 | struct power_trace it; | 197 | struct power_trace it; |
195 | if (!need_resched()) { | 198 | if (!need_resched()) { |
196 | trace_power_start(&it, POWER_CSTATE, 1); | 199 | trace_power_start(&it, POWER_CSTATE, 1); |
200 | if (cpu_has(¤t_cpu_data, X86_FEATURE_CLFLUSH_MONITOR)) | ||
201 | clflush((void *)¤t_thread_info()->flags); | ||
202 | |||
197 | __monitor((void *)¤t_thread_info()->flags, 0, 0); | 203 | __monitor((void *)¤t_thread_info()->flags, 0, 0); |
198 | smp_mb(); | 204 | smp_mb(); |
199 | if (!need_resched()) | 205 | if (!need_resched()) |