diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-03-17 11:13:17 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-03-17 11:13:17 -0400 |
commit | 9e8912e04e612b43897b4b722205408b92f423e5 (patch) | |
tree | 4950be8004d0da8afc485c5301f38e333a1da823 /arch/x86 | |
parent | a6a80e1d8cf82b46a69f88e659da02749231eb36 (diff) |
Fast TSC calibration: calculate proper frequency error bounds
In order for ntpd to correctly synchronize the clocks, the frequency of
the system clock must not be off by more than 500 ppm (or, put another
way, 1:2000), or ntpd will end up giving up on trying to synchronize
properly, and ends up reseting the clock in jumps instead.
The fast TSC PIT calibration sometimes failed this test - it was
assuming that the PIT reads always took about one microsecond each (2us
for the two reads to get a 16-bit timer), and that calibrating TSC to
the PIT over 15ms should thus be sufficient to get much closer than
500ppm (max 2us error on both sides giving 4us over 15ms: a 270 ppm
error value).
However, that assumption does not always hold: apparently some hardware
is either very much slower at reading the PIT registers, or there was
other noise causing at least one machine to get 700+ ppm errors.
So instead of using a fixed 15ms timing loop, this changes the fast PIT
calibration to read the TSC delta over the individual PIT timer reads,
and use the result to calculate the error bars on the PIT read timing
properly. We then successfully calibrate the TSC only if the maximum
error bars fall below 500ppm.
In the process, we also relax the timing to allow up to 25ms for the
calibration, although it can happen much faster depending on hardware.
Reported-and-tested-by: Jesper Krogh <jesper@krogh.cc>
Cc: john stultz <johnstul@us.ibm.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/x86')
-rw-r--r-- | arch/x86/kernel/tsc.c | 101 |
1 files changed, 56 insertions, 45 deletions
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 9e80207c96a2..d5cebb52d45b 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c | |||
@@ -273,30 +273,43 @@ static unsigned long pit_calibrate_tsc(u32 latch, unsigned long ms, int loopmin) | |||
273 | * use the TSC value at the transitions to calculate a pretty | 273 | * use the TSC value at the transitions to calculate a pretty |
274 | * good value for the TSC frequencty. | 274 | * good value for the TSC frequencty. |
275 | */ | 275 | */ |
276 | static inline int pit_expect_msb(unsigned char val) | 276 | static inline int pit_expect_msb(unsigned char val, u64 *tscp, unsigned long *deltap) |
277 | { | 277 | { |
278 | int count = 0; | 278 | int count; |
279 | u64 tsc = 0; | ||
279 | 280 | ||
280 | for (count = 0; count < 50000; count++) { | 281 | for (count = 0; count < 50000; count++) { |
281 | /* Ignore LSB */ | 282 | /* Ignore LSB */ |
282 | inb(0x42); | 283 | inb(0x42); |
283 | if (inb(0x42) != val) | 284 | if (inb(0x42) != val) |
284 | break; | 285 | break; |
286 | tsc = get_cycles(); | ||
285 | } | 287 | } |
286 | return count > 50; | 288 | *deltap = get_cycles() - tsc; |
289 | *tscp = tsc; | ||
290 | |||
291 | /* | ||
292 | * We require _some_ success, but the quality control | ||
293 | * will be based on the error terms on the TSC values. | ||
294 | */ | ||
295 | return count > 5; | ||
287 | } | 296 | } |
288 | 297 | ||
289 | /* | 298 | /* |
290 | * How many MSB values do we want to see? We aim for a | 299 | * How many MSB values do we want to see? We aim for |
291 | * 15ms calibration, which assuming a 2us counter read | 300 | * a maximum error rate of 500ppm (in practice the |
292 | * error should give us roughly 150 ppm precision for | 301 | * real error is much smaller), but refuse to spend |
293 | * the calibration. | 302 | * more than 25ms on it. |
294 | */ | 303 | */ |
295 | #define QUICK_PIT_MS 15 | 304 | #define MAX_QUICK_PIT_MS 25 |
296 | #define QUICK_PIT_ITERATIONS (QUICK_PIT_MS * PIT_TICK_RATE / 1000 / 256) | 305 | #define MAX_QUICK_PIT_ITERATIONS (MAX_QUICK_PIT_MS * PIT_TICK_RATE / 1000 / 256) |
297 | 306 | ||
298 | static unsigned long quick_pit_calibrate(void) | 307 | static unsigned long quick_pit_calibrate(void) |
299 | { | 308 | { |
309 | int i; | ||
310 | u64 tsc, delta; | ||
311 | unsigned long d1, d2; | ||
312 | |||
300 | /* Set the Gate high, disable speaker */ | 313 | /* Set the Gate high, disable speaker */ |
301 | outb((inb(0x61) & ~0x02) | 0x01, 0x61); | 314 | outb((inb(0x61) & ~0x02) | 0x01, 0x61); |
302 | 315 | ||
@@ -324,45 +337,43 @@ static unsigned long quick_pit_calibrate(void) | |||
324 | inb(0x42); | 337 | inb(0x42); |
325 | inb(0x42); | 338 | inb(0x42); |
326 | 339 | ||
327 | if (pit_expect_msb(0xff)) { | 340 | if (pit_expect_msb(0xff, &tsc, &d1)) { |
328 | int i; | 341 | for (i = 1; i <= MAX_QUICK_PIT_ITERATIONS; i++) { |
329 | u64 t1, t2, delta; | 342 | if (!pit_expect_msb(0xff-i, &delta, &d2)) |
330 | unsigned char expect = 0xfe; | 343 | break; |
331 | 344 | ||
332 | t1 = get_cycles(); | 345 | /* |
333 | for (i = 0; i < QUICK_PIT_ITERATIONS; i++, expect--) { | 346 | * Iterate until the error is less than 500 ppm |
334 | if (!pit_expect_msb(expect)) | 347 | */ |
335 | goto failed; | 348 | delta -= tsc; |
349 | if (d1+d2 < delta >> 11) | ||
350 | goto success; | ||
336 | } | 351 | } |
337 | t2 = get_cycles(); | ||
338 | |||
339 | /* | ||
340 | * Make sure we can rely on the second TSC timestamp: | ||
341 | */ | ||
342 | if (!pit_expect_msb(expect)) | ||
343 | goto failed; | ||
344 | |||
345 | /* | ||
346 | * Ok, if we get here, then we've seen the | ||
347 | * MSB of the PIT decrement QUICK_PIT_ITERATIONS | ||
348 | * times, and each MSB had many hits, so we never | ||
349 | * had any sudden jumps. | ||
350 | * | ||
351 | * As a result, we can depend on there not being | ||
352 | * any odd delays anywhere, and the TSC reads are | ||
353 | * reliable. | ||
354 | * | ||
355 | * kHz = ticks / time-in-seconds / 1000; | ||
356 | * kHz = (t2 - t1) / (QPI * 256 / PIT_TICK_RATE) / 1000 | ||
357 | * kHz = ((t2 - t1) * PIT_TICK_RATE) / (QPI * 256 * 1000) | ||
358 | */ | ||
359 | delta = (t2 - t1)*PIT_TICK_RATE; | ||
360 | do_div(delta, QUICK_PIT_ITERATIONS*256*1000); | ||
361 | printk("Fast TSC calibration using PIT\n"); | ||
362 | return delta; | ||
363 | } | 352 | } |
364 | failed: | 353 | printk("Fast TSC calibration failed\n"); |
365 | return 0; | 354 | return 0; |
355 | |||
356 | success: | ||
357 | /* | ||
358 | * Ok, if we get here, then we've seen the | ||
359 | * MSB of the PIT decrement 'i' times, and the | ||
360 | * error has shrunk to less than 500 ppm. | ||
361 | * | ||
362 | * As a result, we can depend on there not being | ||
363 | * any odd delays anywhere, and the TSC reads are | ||
364 | * reliable (within the error). We also adjust the | ||
365 | * delta to the middle of the error bars, just | ||
366 | * because it looks nicer. | ||
367 | * | ||
368 | * kHz = ticks / time-in-seconds / 1000; | ||
369 | * kHz = (t2 - t1) / (I * 256 / PIT_TICK_RATE) / 1000 | ||
370 | * kHz = ((t2 - t1) * PIT_TICK_RATE) / (I * 256 * 1000) | ||
371 | */ | ||
372 | delta += (long)(d2 - d1)/2; | ||
373 | delta *= PIT_TICK_RATE; | ||
374 | do_div(delta, i*256*1000); | ||
375 | printk("Fast TSC calibration using PIT\n"); | ||
376 | return delta; | ||
366 | } | 377 | } |
367 | 378 | ||
368 | /** | 379 | /** |