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authorRobert Richter <robert.richter@amd.com>2009-01-07 15:50:22 -0500
committerRobert Richter <robert.richter@amd.com>2009-01-07 16:48:15 -0500
commit14f0ca8eaea42a5b5a69cfcb699665dd2618db5f (patch)
tree918cdb7d3ace9c84811bc606db631a1dc68496f7 /arch/x86
parentebf8d974e298018f0b4ee02b1b097bf5500d3d27 (diff)
oprofile: make new cpu buffer functions part of the api
This patch creates the new functions oprofile_write_reserve() oprofile_add_data() oprofile_write_commit() and makes them part of the oprofile api. Signed-off-by: Robert Richter <robert.richter@amd.com>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/oprofile/op_model_amd.c57
1 files changed, 24 insertions, 33 deletions
diff --git a/arch/x86/oprofile/op_model_amd.c b/arch/x86/oprofile/op_model_amd.c
index cf310aeb462c..8fdf06e4edf9 100644
--- a/arch/x86/oprofile/op_model_amd.c
+++ b/arch/x86/oprofile/op_model_amd.c
@@ -22,7 +22,6 @@
22 22
23#include "op_x86_model.h" 23#include "op_x86_model.h"
24#include "op_counter.h" 24#include "op_counter.h"
25#include "../../../drivers/oprofile/cpu_buffer.h"
26 25
27#define NUM_COUNTERS 4 26#define NUM_COUNTERS 4
28#define NUM_CONTROLS 4 27#define NUM_CONTROLS 4
@@ -61,14 +60,6 @@ static unsigned long reset_value[NUM_COUNTERS];
61#define IBS_OP_LOW_VALID_BIT (1ULL<<18) /* bit 18 */ 60#define IBS_OP_LOW_VALID_BIT (1ULL<<18) /* bit 18 */
62#define IBS_OP_LOW_ENABLE (1ULL<<17) /* bit 17 */ 61#define IBS_OP_LOW_ENABLE (1ULL<<17) /* bit 17 */
63 62
64/*
65 * The function interface needs to be fixed, something like add
66 * data. Should then be added to linux/oprofile.h.
67 */
68extern
69void oprofile_add_data(struct op_entry *entry, struct pt_regs * const regs,
70 unsigned long pc, int code, int size);
71
72#define IBS_FETCH_SIZE 6 63#define IBS_FETCH_SIZE 6
73#define IBS_OP_SIZE 12 64#define IBS_OP_SIZE 12
74 65
@@ -174,16 +165,16 @@ op_amd_handle_ibs(struct pt_regs * const regs,
174 rdmsr(MSR_AMD64_IBSFETCHCTL, low, high); 165 rdmsr(MSR_AMD64_IBSFETCHCTL, low, high);
175 if (high & IBS_FETCH_HIGH_VALID_BIT) { 166 if (high & IBS_FETCH_HIGH_VALID_BIT) {
176 rdmsrl(MSR_AMD64_IBSFETCHLINAD, msr); 167 rdmsrl(MSR_AMD64_IBSFETCHLINAD, msr);
177 oprofile_add_data(&entry, regs, msr, IBS_FETCH_CODE, 168 oprofile_write_reserve(&entry, regs, msr,
178 IBS_FETCH_SIZE); 169 IBS_FETCH_CODE, IBS_FETCH_SIZE);
179 op_cpu_buffer_add_data(&entry, (u32)msr); 170 oprofile_add_data(&entry, (u32)msr);
180 op_cpu_buffer_add_data(&entry, (u32)(msr >> 32)); 171 oprofile_add_data(&entry, (u32)(msr >> 32));
181 op_cpu_buffer_add_data(&entry, low); 172 oprofile_add_data(&entry, low);
182 op_cpu_buffer_add_data(&entry, high); 173 oprofile_add_data(&entry, high);
183 rdmsrl(MSR_AMD64_IBSFETCHPHYSAD, msr); 174 rdmsrl(MSR_AMD64_IBSFETCHPHYSAD, msr);
184 op_cpu_buffer_add_data(&entry, (u32)msr); 175 oprofile_add_data(&entry, (u32)msr);
185 op_cpu_buffer_add_data(&entry, (u32)(msr >> 32)); 176 oprofile_add_data(&entry, (u32)(msr >> 32));
186 op_cpu_buffer_write_commit(&entry); 177 oprofile_write_commit(&entry);
187 178
188 /* reenable the IRQ */ 179 /* reenable the IRQ */
189 high &= ~IBS_FETCH_HIGH_VALID_BIT; 180 high &= ~IBS_FETCH_HIGH_VALID_BIT;
@@ -197,26 +188,26 @@ op_amd_handle_ibs(struct pt_regs * const regs,
197 rdmsr(MSR_AMD64_IBSOPCTL, low, high); 188 rdmsr(MSR_AMD64_IBSOPCTL, low, high);
198 if (low & IBS_OP_LOW_VALID_BIT) { 189 if (low & IBS_OP_LOW_VALID_BIT) {
199 rdmsrl(MSR_AMD64_IBSOPRIP, msr); 190 rdmsrl(MSR_AMD64_IBSOPRIP, msr);
200 oprofile_add_data(&entry, regs, msr, IBS_OP_CODE, 191 oprofile_write_reserve(&entry, regs, msr,
201 IBS_OP_SIZE); 192 IBS_OP_CODE, IBS_OP_SIZE);
202 op_cpu_buffer_add_data(&entry, (u32)msr); 193 oprofile_add_data(&entry, (u32)msr);
203 op_cpu_buffer_add_data(&entry, (u32)(msr >> 32)); 194 oprofile_add_data(&entry, (u32)(msr >> 32));
204 rdmsrl(MSR_AMD64_IBSOPDATA, msr); 195 rdmsrl(MSR_AMD64_IBSOPDATA, msr);
205 op_cpu_buffer_add_data(&entry, (u32)msr); 196 oprofile_add_data(&entry, (u32)msr);
206 op_cpu_buffer_add_data(&entry, (u32)(msr >> 32)); 197 oprofile_add_data(&entry, (u32)(msr >> 32));
207 rdmsrl(MSR_AMD64_IBSOPDATA2, msr); 198 rdmsrl(MSR_AMD64_IBSOPDATA2, msr);
208 op_cpu_buffer_add_data(&entry, (u32)msr); 199 oprofile_add_data(&entry, (u32)msr);
209 op_cpu_buffer_add_data(&entry, (u32)(msr >> 32)); 200 oprofile_add_data(&entry, (u32)(msr >> 32));
210 rdmsrl(MSR_AMD64_IBSOPDATA3, msr); 201 rdmsrl(MSR_AMD64_IBSOPDATA3, msr);
211 op_cpu_buffer_add_data(&entry, (u32)msr); 202 oprofile_add_data(&entry, (u32)msr);
212 op_cpu_buffer_add_data(&entry, (u32)(msr >> 32)); 203 oprofile_add_data(&entry, (u32)(msr >> 32));
213 rdmsrl(MSR_AMD64_IBSDCLINAD, msr); 204 rdmsrl(MSR_AMD64_IBSDCLINAD, msr);
214 op_cpu_buffer_add_data(&entry, (u32)msr); 205 oprofile_add_data(&entry, (u32)msr);
215 op_cpu_buffer_add_data(&entry, (u32)(msr >> 32)); 206 oprofile_add_data(&entry, (u32)(msr >> 32));
216 rdmsrl(MSR_AMD64_IBSDCPHYSAD, msr); 207 rdmsrl(MSR_AMD64_IBSDCPHYSAD, msr);
217 op_cpu_buffer_add_data(&entry, (u32)msr); 208 oprofile_add_data(&entry, (u32)msr);
218 op_cpu_buffer_add_data(&entry, (u32)(msr >> 32)); 209 oprofile_add_data(&entry, (u32)(msr >> 32));
219 op_cpu_buffer_write_commit(&entry); 210 oprofile_write_commit(&entry);
220 211
221 /* reenable the IRQ */ 212 /* reenable the IRQ */
222 high = 0; 213 high = 0;