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authorAndi Kleen <andi@firstfloor.org>2009-05-27 15:56:51 -0400
committerH. Peter Anvin <hpa@zytor.com>2009-05-28 12:24:14 -0400
commit88921be30296e126896ee4d30758f989d1c4ddfb (patch)
tree4af6f9a4e8fa2532fb240a02c780879917ad08c7 /arch/x86
parent5706001aacba5d3db5f224ca135e5e91a30be39c (diff)
x86, mce: synchronize core after machine check handling
The example code in the IA32 SDM recommends to synchronize the CPU after machine check handling. So do that here. [ Impact: Spec compliance ] Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 156cdf6d9181..495c96808668 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -328,6 +328,8 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
328 * Don't clear MCG_STATUS here because it's only defined for 328 * Don't clear MCG_STATUS here because it's only defined for
329 * exceptions. 329 * exceptions.
330 */ 330 */
331
332 sync_core();
331} 333}
332EXPORT_SYMBOL_GPL(machine_check_poll); 334EXPORT_SYMBOL_GPL(machine_check_poll);
333 335
@@ -501,6 +503,7 @@ void do_machine_check(struct pt_regs *regs, long error_code)
501 mce_wrmsrl(MSR_IA32_MCG_STATUS, 0); 503 mce_wrmsrl(MSR_IA32_MCG_STATUS, 0);
502 out2: 504 out2:
503 atomic_dec(&mce_entry); 505 atomic_dec(&mce_entry);
506 sync_core();
504} 507}
505EXPORT_SYMBOL_GPL(do_machine_check); 508EXPORT_SYMBOL_GPL(do_machine_check);
506 509