diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2007-10-14 16:57:45 -0400 |
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committer | Thomas Gleixner <tglx@inhelltoy.tec.linutronix.de> | 2007-10-14 16:57:45 -0400 |
commit | 3ac508be76bf4ef5861365d9f337f990d523be8f (patch) | |
tree | 3e8f0f75cc539cceeda033d63e48aa2a4f397b44 /arch/x86 | |
parent | 1595f452f3d8daa066bfd3ba4120754bed3329e1 (diff) |
x86: move local APIC timer init to the end of start_secondary()
Preparatory patch for the AMD C1E wreckage fixup.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86')
-rw-r--r-- | arch/x86/kernel/smpboot_64.c | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/arch/x86/kernel/smpboot_64.c b/arch/x86/kernel/smpboot_64.c index 57ccf7cb6b91..720a7d1f8862 100644 --- a/arch/x86/kernel/smpboot_64.c +++ b/arch/x86/kernel/smpboot_64.c | |||
@@ -335,11 +335,6 @@ void __cpuinit start_secondary(void) | |||
335 | */ | 335 | */ |
336 | check_tsc_sync_target(); | 336 | check_tsc_sync_target(); |
337 | 337 | ||
338 | Dprintk("cpu %d: setting up apic clock\n", smp_processor_id()); | ||
339 | setup_secondary_APIC_clock(); | ||
340 | |||
341 | Dprintk("cpu %d: enabling apic timer\n", smp_processor_id()); | ||
342 | |||
343 | if (nmi_watchdog == NMI_IO_APIC) { | 338 | if (nmi_watchdog == NMI_IO_APIC) { |
344 | disable_8259A_irq(0); | 339 | disable_8259A_irq(0); |
345 | enable_NMI_through_LVT0(NULL); | 340 | enable_NMI_through_LVT0(NULL); |
@@ -374,6 +369,8 @@ void __cpuinit start_secondary(void) | |||
374 | 369 | ||
375 | unlock_ipi_call_lock(); | 370 | unlock_ipi_call_lock(); |
376 | 371 | ||
372 | setup_secondary_APIC_clock(); | ||
373 | |||
377 | cpu_idle(); | 374 | cpu_idle(); |
378 | } | 375 | } |
379 | 376 | ||