Merge branch 'origin' into for-linus

Conflicts:
	MAINTAINERS

121 files changed, 1570 insertions, 2290 deletions

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index e5deee2dfcfe..93698794aa3a 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -24,7 +24,7 @@ config X86
         select HAVE_UNSTABLE_SCHED_CLOCK
         select HAVE_IDE
         select HAVE_OPROFILE
-        select HAVE_PERF_COUNTERS if (!M386 && !M486)
+        select HAVE_PERF_EVENTS if (!M386 && !M486)
         select HAVE_IOREMAP_PROT
         select HAVE_KPROBES
         select ARCH_WANT_OPTIONAL_GPIOLIB
@@ -325,6 +325,7 @@ config X86_EXTENDED_PLATFORM
                 SGI 320/540 (Visual Workstation)
                 Summit/EXA (IBM x440)
                 Unisys ES7000 IA32 series
+                Moorestown MID devices
 
           If you have one of these systems, or if you want to build a
           generic distribution kernel, say Y here - otherwise say N.
@@ -384,6 +385,18 @@ config X86_ELAN
 
           If unsure, choose "PC-compatible" instead.
 
+config X86_MRST
+       bool "Moorestown MID platform"
+        depends on X86_32
+        depends on X86_EXTENDED_PLATFORM
+        ---help---
+          Moorestown is Intel's Low Power Intel Architecture (LPIA) based Moblin
+          Internet Device(MID) platform. Moorestown consists of two chips:
+          Lincroft (CPU core, graphics, and memory controller) and Langwell IOH.
+          Unlike standard x86 PCs, Moorestown does not have many legacy devices
+          nor standard legacy replacement devices/features. e.g. Moorestown does
+          not contain i8259, i8254, HPET, legacy BIOS, most of the io ports.
+
 config X86_RDC321X
         bool "RDC R-321x SoC"
         depends on X86_32
@@ -1191,6 +1204,10 @@ config ARCH_DISCONTIGMEM_DEFAULT
         def_bool y
         depends on NUMA && X86_32
 
+config ARCH_PROC_KCORE_TEXT
+        def_bool y
+        depends on X86_64 && PROC_KCORE
+
 config ARCH_SPARSEMEM_DEFAULT
         def_bool y
         depends on X86_64
@@ -1649,6 +1666,8 @@ source "kernel/power/Kconfig"
 
 source "drivers/acpi/Kconfig"
 
+source "drivers/sfi/Kconfig"
+
 config X86_APM_BOOT
         bool
         default y
@@ -1844,7 +1863,7 @@ config PCI_DIRECT
 
 config PCI_MMCONFIG
         def_bool y
-        depends on X86_32 && PCI && ACPI && (PCI_GOMMCONFIG || PCI_GOANY)
+        depends on X86_32 && PCI && (ACPI || SFI) && (PCI_GOMMCONFIG || PCI_GOANY)
 
 config PCI_OLPC
         def_bool y
@@ -1882,7 +1901,7 @@ config DMAR_DEFAULT_ON
 config DMAR_BROKEN_GFX_WA
         def_bool n
         prompt "Workaround broken graphics drivers (going away soon)"
-        depends on DMAR
+        depends on DMAR && BROKEN
         ---help---
           Current Graphics drivers tend to use physical address
           for DMA and avoid using DMA APIs. Setting this config
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
index 7983c420eaf2..a012ee8ef803 100644
--- a/arch/x86/Makefile
+++ b/arch/x86/Makefile
@@ -179,8 +179,8 @@ archclean:
 define archhelp
   echo  '* bzImage      - Compressed kernel image (arch/x86/boot/bzImage)'
   echo  '  install      - Install kernel using'
-  echo  '                  (your) ~/bin/installkernel or'
-  echo  '                  (distribution) /sbin/installkernel or'
+  echo  '                  (your) ~/bin/$(INSTALLKERNEL) or'
+  echo  '                  (distribution) /sbin/$(INSTALLKERNEL) or'
   echo  '                  install to $$(INSTALL_PATH) and run lilo'
   echo  '  fdimage      - Create 1.4MB boot floppy image (arch/x86/boot/fdimage)'
   echo  '  fdimage144   - Create 1.4MB boot floppy image (arch/x86/boot/fdimage)'
diff --git a/arch/x86/boot/install.sh b/arch/x86/boot/install.sh
index 8d60ee15dfd9..d13ec1c38640 100644
--- a/arch/x86/boot/install.sh
+++ b/arch/x86/boot/install.sh
@@ -33,8 +33,8 @@ verify "$3"
 
 # User may have a custom install script
 
-if [ -x ~/bin/${CROSS_COMPILE}installkernel ]; then exec ~/bin/${CROSS_COMPILE}installkernel "$@"; fi
-if [ -x /sbin/${CROSS_COMPILE}installkernel ]; then exec /sbin/${CROSS_COMPILE}installkernel "$@"; fi
+if [ -x ~/bin/${INSTALLKERNEL} ]; then exec ~/bin/${INSTALLKERNEL} "$@"; fi
+if [ -x /sbin/${INSTALLKERNEL} ]; then exec /sbin/${INSTALLKERNEL} "$@"; fi
 
 # Default install - same as make zlilo
 
diff --git a/arch/x86/ia32/ia32entry.S b/arch/x86/ia32/ia32entry.S
index ba331bfd1112..74619c4f9fda 100644
--- a/arch/x86/ia32/ia32entry.S
+++ b/arch/x86/ia32/ia32entry.S
@@ -831,5 +831,5 @@ ia32_sys_call_table:
         .quad compat_sys_preadv
         .quad compat_sys_pwritev
         .quad compat_sys_rt_tgsigqueueinfo      /* 335 */
-        .quad sys_perf_counter_open
+        .quad sys_perf_event_open
 ia32_syscall_end:
diff --git a/arch/x86/include/asm/acpi.h b/arch/x86/include/asm/acpi.h
index 20d1465a2ab0..4518dc500903 100644
--- a/arch/x86/include/asm/acpi.h
+++ b/arch/x86/include/asm/acpi.h
@@ -144,7 +144,6 @@ static inline unsigned int acpi_processor_cstate_check(unsigned int max_cstate)
 
 #else /* !CONFIG_ACPI */
 
-#define acpi_disabled 1
 #define acpi_lapic 0
 #define acpi_ioapic 0
 static inline void acpi_noirq_set(void) { }
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index 586b7adb8e53..474d80d3e6cc 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -66,13 +66,23 @@ static inline void default_inquire_remote_apic(int apicid)
 }
 
 /*
+ * With 82489DX we can't rely on apic feature bit
+ * retrieved via cpuid but still have to deal with
+ * such an apic chip so we assume that SMP configuration
+ * is found from MP table (64bit case uses ACPI mostly
+ * which set smp presence flag as well so we are safe
+ * to use this helper too).
+ */
+static inline bool apic_from_smp_config(void)
+{
+        return smp_found_config && !disable_apic;
+}
+
+/*
  * Basic functions accessing APICs.
  */
 #ifdef CONFIG_PARAVIRT
 #include <asm/paravirt.h>
-#else
-#define setup_boot_clock setup_boot_APIC_clock
-#define setup_secondary_clock setup_secondary_APIC_clock
 #endif
 
 #ifdef CONFIG_X86_64
@@ -252,6 +262,8 @@ static inline void lapic_shutdown(void) { }
 static inline void init_apic_mappings(void) { }
 static inline void disable_local_APIC(void) { }
 static inline void apic_disable(void) { }
+# define setup_boot_APIC_clock x86_init_noop
+# define setup_secondary_APIC_clock x86_init_noop
 #endif /* !CONFIG_X86_LOCAL_APIC */
 
 #ifdef CONFIG_X86_64
@@ -300,7 +312,7 @@ struct apic {
         int (*cpu_present_to_apicid)(int mps_cpu);
         physid_mask_t (*apicid_to_cpu_present)(int phys_apicid);
         void (*setup_portio_remap)(void);
-        int (*check_phys_apicid_present)(int boot_cpu_physical_apicid);
+        int (*check_phys_apicid_present)(int phys_apicid);
         void (*enable_apic_mode)(void);
         int (*phys_pkg_id)(int cpuid_apic, int index_msb);
 
@@ -434,7 +446,7 @@ extern struct apic apic_x2apic_uv_x;
 DECLARE_PER_CPU(int, x2apic_extra_bits);
 
 extern int default_cpu_present_to_apicid(int mps_cpu);
-extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid);
+extern int default_check_phys_apicid_present(int phys_apicid);
 #endif
 
 static inline void default_wait_for_init_deassert(atomic_t *deassert)
@@ -550,9 +562,9 @@ static inline int __default_cpu_present_to_apicid(int mps_cpu)
 }
 
 static inline int
-__default_check_phys_apicid_present(int boot_cpu_physical_apicid)
+__default_check_phys_apicid_present(int phys_apicid)
 {
-        return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
+        return physid_isset(phys_apicid, phys_cpu_present_map);
 }
 
 #ifdef CONFIG_X86_32
@@ -562,13 +574,13 @@ static inline int default_cpu_present_to_apicid(int mps_cpu)
 }
 
 static inline int
-default_check_phys_apicid_present(int boot_cpu_physical_apicid)
+default_check_phys_apicid_present(int phys_apicid)
 {
-        return __default_check_phys_apicid_present(boot_cpu_physical_apicid);
+        return __default_check_phys_apicid_present(phys_apicid);
 }
 #else
 extern int default_cpu_present_to_apicid(int mps_cpu);
-extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid);
+extern int default_check_phys_apicid_present(int phys_apicid);
 #endif
 
 static inline physid_mask_t default_apicid_to_cpu_present(int phys_apicid)
diff --git a/arch/x86/include/asm/bootparam.h b/arch/x86/include/asm/bootparam.h
index 6ca20218dd72..6be33d83c716 100644
--- a/arch/x86/include/asm/bootparam.h
+++ b/arch/x86/include/asm/bootparam.h
@@ -110,4 +110,14 @@ struct boot_params {
         __u8  _pad9[276];                               /* 0xeec */
 } __attribute__((packed));
 
+enum {
+        X86_SUBARCH_PC = 0,
+        X86_SUBARCH_LGUEST,
+        X86_SUBARCH_XEN,
+        X86_SUBARCH_MRST,
+        X86_NR_SUBARCHS,
+};
+
+
+
 #endif /* _ASM_X86_BOOTPARAM_H */
diff --git a/arch/x86/include/asm/cache.h b/arch/x86/include/asm/cache.h
index 5d367caa0e36..549860d3be8f 100644
--- a/arch/x86/include/asm/cache.h
+++ b/arch/x86/include/asm/cache.h
@@ -1,6 +1,8 @@
 #ifndef _ASM_X86_CACHE_H
 #define _ASM_X86_CACHE_H
 
+#include <linux/linkage.h>
+
 /* L1 cache line size */
 #define L1_CACHE_SHIFT  (CONFIG_X86_L1_CACHE_SHIFT)
 #define L1_CACHE_BYTES  (1 << L1_CACHE_SHIFT)
@@ -13,7 +15,7 @@
 #ifdef CONFIG_SMP
 #define __cacheline_aligned_in_smp                                      \
         __attribute__((__aligned__(1 << (INTERNODE_CACHE_SHIFT))))      \
-        __attribute__((__section__(".data.page_aligned")))
+        __page_aligned_data
 #endif
 #endif
 
diff --git a/arch/x86/include/asm/do_timer.h b/arch/x86/include/asm/do_timer.h
deleted file mode 100644
index 23ecda0b28a0..000000000000
--- a/arch/x86/include/asm/do_timer.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/* defines for inline arch setup functions */
-#include <linux/clockchips.h>
-
-#include <asm/i8259.h>
-#include <asm/i8253.h>
-
-/**
- * do_timer_interrupt_hook - hook into timer tick
- *
- * Call the pit clock event handler. see asm/i8253.h
- **/
-
-static inline void do_timer_interrupt_hook(void)
-{
-        global_clock_event->event_handler(global_clock_event);
-}
diff --git a/arch/x86/include/asm/e820.h b/arch/x86/include/asm/e820.h
index 7ecba4d85089..40b4e614fe71 100644
--- a/arch/x86/include/asm/e820.h
+++ b/arch/x86/include/asm/e820.h
@@ -126,8 +126,6 @@ extern void e820_reserve_resources(void);
 extern void e820_reserve_resources_late(void);
 extern void setup_memory_map(void);
 extern char *default_machine_specific_memory_setup(void);
-extern char *machine_specific_memory_setup(void);
-extern char *memory_setup(void);
 #endif /* __KERNEL__ */
 #endif /* __ASSEMBLY__ */
 
diff --git a/arch/x86/include/asm/entry_arch.h b/arch/x86/include/asm/entry_arch.h
index 5e3f2044f0d3..f5693c81a1db 100644
--- a/arch/x86/include/asm/entry_arch.h
+++ b/arch/x86/include/asm/entry_arch.h
@@ -49,7 +49,7 @@ BUILD_INTERRUPT(apic_timer_interrupt,LOCAL_TIMER_VECTOR)
 BUILD_INTERRUPT(error_interrupt,ERROR_APIC_VECTOR)
 BUILD_INTERRUPT(spurious_interrupt,SPURIOUS_APIC_VECTOR)
 
-#ifdef CONFIG_PERF_COUNTERS
+#ifdef CONFIG_PERF_EVENTS
 BUILD_INTERRUPT(perf_pending_interrupt, LOCAL_PENDING_VECTOR)
 #endif
 
diff --git a/arch/x86/include/asm/hypervisor.h b/arch/x86/include/asm/hypervisor.h
index 369f5c5d09a1..b78c0941e422 100644
--- a/arch/x86/include/asm/hypervisor.h
+++ b/arch/x86/include/asm/hypervisor.h
@@ -20,7 +20,7 @@
 #ifndef ASM_X86__HYPERVISOR_H
 #define ASM_X86__HYPERVISOR_H
 
-extern unsigned long get_hypervisor_tsc_freq(void);
 extern void init_hypervisor(struct cpuinfo_x86 *c);
+extern void init_hypervisor_platform(void);
 
 #endif
diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 85232d32fcb8..7c7c16cde1f8 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -143,6 +143,8 @@ extern int noioapicreroute;
 /* 1 if the timer IRQ uses the '8259A Virtual Wire' mode */
 extern int timer_through_8259;
 
+extern void io_apic_disable_legacy(void);
+
 /*
  * If we use the IO-APIC for IRQ routing, disable automatic
  * assignment of PCI IRQ's.
@@ -176,6 +178,7 @@ extern int setup_ioapic_entry(int apic, int irq,
                               int polarity, int vector, int pin);
 extern void ioapic_write_entry(int apic, int pin,
                                struct IO_APIC_route_entry e);
+extern void setup_ioapic_ids_from_mpc(void);
 
 struct mp_ioapic_gsi{
         int gsi_base;
@@ -187,12 +190,14 @@ int mp_find_ioapic_pin(int ioapic, int gsi);
 void __init mp_register_ioapic(int id, u32 address, u32 gsi_base);
 
 #else  /* !CONFIG_X86_IO_APIC */
+
 #define io_apic_assign_pci_irqs 0
+#define setup_ioapic_ids_from_mpc x86_init_noop
 static const int timer_through_8259 = 0;
 static inline void ioapic_init_mappings(void)   { }
 static inline void ioapic_insert_resources(void) { }
-
 static inline void probe_nr_irqs_gsi(void)      { }
+
 #endif
 
 #endif /* _ASM_X86_IO_APIC_H */
diff --git a/arch/x86/include/asm/irq.h b/arch/x86/include/asm/irq.h
index f38481bcd455..ddda6cbed6f4 100644
--- a/arch/x86/include/asm/irq.h
+++ b/arch/x86/include/asm/irq.h
@@ -37,7 +37,6 @@ extern void fixup_irqs(void);
 #endif
 
 extern void (*generic_interrupt_extension)(void);
-extern void init_IRQ(void);
 extern void native_init_IRQ(void);
 extern bool handle_irq(unsigned irq, struct pt_regs *regs);
 
@@ -47,4 +46,6 @@ extern unsigned int do_IRQ(struct pt_regs *regs);
 extern DECLARE_BITMAP(used_vectors, NR_VECTORS);
 extern int vector_used_by_percpu_irq(unsigned int vector);
 
+extern void init_ISA_irqs(void);
+
 #endif /* _ASM_X86_IRQ_H */
diff --git a/arch/x86/include/asm/mmu_context.h b/arch/x86/include/asm/mmu_context.h
index f923203dc39a..4a2d4e0c18d9 100644
--- a/arch/x86/include/asm/mmu_context.h
+++ b/arch/x86/include/asm/mmu_context.h
@@ -37,12 +37,12 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
 
         if (likely(prev != next)) {
                 /* stop flush ipis for the previous mm */
-                cpu_clear(cpu, prev->cpu_vm_mask);
+                cpumask_clear_cpu(cpu, mm_cpumask(prev));
 #ifdef CONFIG_SMP
                 percpu_write(cpu_tlbstate.state, TLBSTATE_OK);
                 percpu_write(cpu_tlbstate.active_mm, next);
 #endif
-                cpu_set(cpu, next->cpu_vm_mask);
+                cpumask_set_cpu(cpu, mm_cpumask(next));
 
                 /* Re-load page tables */
                 load_cr3(next->pgd);
@@ -58,7 +58,7 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
                 percpu_write(cpu_tlbstate.state, TLBSTATE_OK);
                 BUG_ON(percpu_read(cpu_tlbstate.active_mm) != next);
 
-                if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) {
+                if (!cpumask_test_and_set_cpu(cpu, mm_cpumask(next))) {
                         /* We were in lazy tlb mode and leave_mm disabled
                          * tlb flush IPI delivery. We must reload CR3
                          * to make sure to use no freed page tables.
diff --git a/arch/x86/include/asm/mpspec.h b/arch/x86/include/asm/mpspec.h
index e2a1bb6d71ea..79c94500c0bb 100644
--- a/arch/x86/include/asm/mpspec.h
+++ b/arch/x86/include/asm/mpspec.h
@@ -4,6 +4,7 @@
 #include <linux/init.h>
 
 #include <asm/mpspec_def.h>
+#include <asm/x86_init.h>
 
 extern int apic_version[MAX_APICS];
 extern int pic_mode;
@@ -41,9 +42,6 @@ extern int quad_local_to_mp_bus_id [NR_CPUS/4][4];
 
 #endif /* CONFIG_X86_64 */
 
-extern void early_find_smp_config(void);
-extern void early_get_smp_config(void);
-
 #if defined(CONFIG_MCA) || defined(CONFIG_EISA)
 extern int mp_bus_id_to_type[MAX_MP_BUSSES];
 #endif
@@ -52,20 +50,55 @@ extern DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
 
 extern unsigned int boot_cpu_physical_apicid;
 extern unsigned int max_physical_apicid;
-extern int smp_found_config;
 extern int mpc_default_type;
 extern unsigned long mp_lapic_addr;
 
-extern void get_smp_config(void);
+#ifdef CONFIG_X86_LOCAL_APIC
+extern int smp_found_config;
+#else
+# define smp_found_config 0
+#endif
+
+static inline void get_smp_config(void)
+{
+        x86_init.mpparse.get_smp_config(0);
+}
+
+static inline void early_get_smp_config(void)
+{
+        x86_init.mpparse.get_smp_config(1);
+}
+
+static inline void find_smp_config(void)
+{
+        x86_init.mpparse.find_smp_config(1);
+}
+
+static inline void early_find_smp_config(void)
+{
+        x86_init.mpparse.find_smp_config(0);
+}
 
 #ifdef CONFIG_X86_MPPARSE
-extern void find_smp_config(void);
 extern void early_reserve_e820_mpc_new(void);
 extern int enable_update_mptable;
+extern int default_mpc_apic_id(struct mpc_cpu *m);
+extern void default_smp_read_mpc_oem(struct mpc_table *mpc);
+# ifdef CONFIG_X86_IO_APIC
+extern void default_mpc_oem_bus_info(struct mpc_bus *m, char *str);
+# else
+#  define default_mpc_oem_bus_info NULL
+# endif
+extern void default_find_smp_config(unsigned int reserve);
+extern void default_get_smp_config(unsigned int early);
 #else
-static inline void find_smp_config(void) { }
 static inline void early_reserve_e820_mpc_new(void) { }
 #define enable_update_mptable 0
+#define default_mpc_apic_id NULL
+#define default_smp_read_mpc_oem NULL
+#define default_mpc_oem_bus_info NULL
+#define default_find_smp_config x86_init_uint_noop
+#define default_get_smp_config x86_init_uint_noop
 #endif
 
 void __cpuinit generic_processor_info(int apicid, int version);
diff --git a/arch/x86/include/asm/nmi.h b/arch/x86/include/asm/nmi.h
index e63cf7d441e1..139d4c1a33a7 100644
--- a/arch/x86/include/asm/nmi.h
+++ b/arch/x86/include/asm/nmi.h
@@ -40,8 +40,7 @@ extern unsigned int nmi_watchdog;
 #define NMI_INVALID     3
 
 struct ctl_table;
-struct file;
-extern int proc_nmi_enabled(struct ctl_table *, int , struct file *,
+extern int proc_nmi_enabled(struct ctl_table *, int ,
                         void __user *, size_t *, loff_t *);
 extern int unknown_nmi_panic;
 
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index 40d6586af25b..8aebcc41041d 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -24,22 +24,6 @@ static inline void load_sp0(struct tss_struct *tss,
         PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
 }
 
-#define ARCH_SETUP                      pv_init_ops.arch_setup();
-static inline unsigned long get_wallclock(void)
-{
-        return PVOP_CALL0(unsigned long, pv_time_ops.get_wallclock);
-}
-
-static inline int set_wallclock(unsigned long nowtime)
-{
-        return PVOP_CALL1(int, pv_time_ops.set_wallclock, nowtime);
-}
-
-static inline void (*choose_time_init(void))(void)
-{
-        return pv_time_ops.time_init;
-}
-
 /* The paravirtualized CPUID instruction. */
 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
                            unsigned int *ecx, unsigned int *edx)
@@ -245,7 +229,6 @@ static inline unsigned long long paravirt_sched_clock(void)
 {
         return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
 }
-#define calibrate_tsc() (pv_time_ops.get_tsc_khz())
 
 static inline unsigned long long paravirt_read_pmc(int counter)
 {
@@ -363,34 +346,6 @@ static inline void slow_down_io(void)
 #endif
 }
 
-#ifdef CONFIG_X86_LOCAL_APIC
-static inline void setup_boot_clock(void)
-{
-        PVOP_VCALL0(pv_apic_ops.setup_boot_clock);
-}
-
-static inline void setup_secondary_clock(void)
-{
-        PVOP_VCALL0(pv_apic_ops.setup_secondary_clock);
-}
-#endif
-
-static inline void paravirt_post_allocator_init(void)
-{
-        if (pv_init_ops.post_allocator_init)
-                (*pv_init_ops.post_allocator_init)();
-}
-
-static inline void paravirt_pagetable_setup_start(pgd_t *base)
-{
-        (*pv_mmu_ops.pagetable_setup_start)(base);
-}
-
-static inline void paravirt_pagetable_setup_done(pgd_t *base)
-{
-        (*pv_mmu_ops.pagetable_setup_done)(base);
-}
-
 #ifdef CONFIG_SMP
 static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
                                     unsigned long start_esp)
@@ -948,6 +903,8 @@ static inline unsigned long __raw_local_irq_save(void)
 #undef PVOP_VCALL4
 #undef PVOP_CALL4
 
+extern void default_banner(void);
+
 #else  /* __ASSEMBLY__ */
 
 #define _PVSITE(ptype, clobbers, ops, word, algn)       \
@@ -1088,5 +1045,7 @@ static inline unsigned long __raw_local_irq_save(void)
 #endif  /* CONFIG_X86_32 */
 
 #endif /* __ASSEMBLY__ */
-#endif /* CONFIG_PARAVIRT */
+#else  /* CONFIG_PARAVIRT */
+# define default_banner x86_init_noop
+#endif /* !CONFIG_PARAVIRT */
 #endif /* _ASM_X86_PARAVIRT_H */
diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/paravirt_types.h
index 25402d0006e7..dd0f5b32489d 100644
--- a/arch/x86/include/asm/paravirt_types.h
+++ b/arch/x86/include/asm/paravirt_types.h
@@ -78,14 +78,6 @@ struct pv_init_ops {
          */
         unsigned (*patch)(u8 type, u16 clobber, void *insnbuf,
                           unsigned long addr, unsigned len);
-
-        /* Basic arch-specific setup */
-        void (*arch_setup)(void);
-        char *(*memory_setup)(void);
-        void (*post_allocator_init)(void);
-
-        /* Print a banner to identify the environment */
-        void (*banner)(void);
 };
 
 
@@ -96,12 +88,6 @@ struct pv_lazy_ops {
 };
 
 struct pv_time_ops {
-        void (*time_init)(void);
-
-        /* Set and set time of day */
-        unsigned long (*get_wallclock)(void);
-        int (*set_wallclock)(unsigned long);
-
         unsigned long long (*sched_clock)(void);
         unsigned long (*get_tsc_khz)(void);
 };
@@ -203,8 +189,6 @@ struct pv_cpu_ops {
 };
 
 struct pv_irq_ops {
-        void (*init_IRQ)(void);
-
         /*
          * Get/set interrupt state.  save_fl and restore_fl are only
          * expected to use X86_EFLAGS_IF; all other bits
@@ -229,9 +213,6 @@ struct pv_irq_ops {
 
 struct pv_apic_ops {
 #ifdef CONFIG_X86_LOCAL_APIC
-        void (*setup_boot_clock)(void);
-        void (*setup_secondary_clock)(void);
-
         void (*startup_ipi_hook)(int phys_apicid,
                                  unsigned long start_eip,
                                  unsigned long start_esp);
@@ -239,15 +220,6 @@ struct pv_apic_ops {
 };
 
 struct pv_mmu_ops {
-        /*
-         * Called before/after init_mm pagetable setup. setup_start
-         * may reset %cr3, and may pre-install parts of the pagetable;
-         * pagetable setup is expected to preserve any existing
-         * mapping.
-         */
-        void (*pagetable_setup_start)(pgd_t *pgd_base);
-        void (*pagetable_setup_done)(pgd_t *pgd_base);
-
         unsigned long (*read_cr2)(void);
         void (*write_cr2)(unsigned long);
 
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index f76a162c082c..ada8c201d513 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -143,7 +143,11 @@ static inline int __pcibus_to_node(const struct pci_bus *bus)
 static inline const struct cpumask *
 cpumask_of_pcibus(const struct pci_bus *bus)
 {
-        return cpumask_of_node(__pcibus_to_node(bus));
+        int node;
+
+        node = __pcibus_to_node(bus);
+        return (node == -1) ? cpu_online_mask :
+                              cpumask_of_node(node);
 }
 #endif
 
diff --git a/arch/x86/include/asm/perf_counter.h b/arch/x86/include/asm/perf_event.h
index e7b7c938ae27..ad7ce3fd5065 100644
--- a/arch/x86/include/asm/perf_counter.h
+++ b/arch/x86/include/asm/perf_event.h
@@ -1,8 +1,8 @@
-#ifndef _ASM_X86_PERF_COUNTER_H
-#define _ASM_X86_PERF_COUNTER_H
+#ifndef _ASM_X86_PERF_EVENT_H
+#define _ASM_X86_PERF_EVENT_H
 
 /*
- * Performance counter hw details:
+ * Performance event hw details:
  */
 
 #define X86_PMC_MAX_GENERIC                                     8
@@ -43,7 +43,7 @@
 union cpuid10_eax {
         struct {
                 unsigned int version_id:8;
-                unsigned int num_counters:8;
+                unsigned int num_events:8;
                 unsigned int bit_width:8;
                 unsigned int mask_length:8;
         } split;
@@ -52,7 +52,7 @@ union cpuid10_eax {
 
 union cpuid10_edx {
         struct {
-                unsigned int num_counters_fixed:4;
+                unsigned int num_events_fixed:4;
                 unsigned int reserved:28;
         } split;
         unsigned int full;
@@ -60,7 +60,7 @@ union cpuid10_edx {
 
 
 /*
- * Fixed-purpose performance counters:
+ * Fixed-purpose performance events:
  */
 
 /*
@@ -87,22 +87,22 @@ union cpuid10_edx {
 /*
  * We model BTS tracing as another fixed-mode PMC.
  *
- * We choose a value in the middle of the fixed counter range, since lower
- * values are used by actual fixed counters and higher values are used
+ * We choose a value in the middle of the fixed event range, since lower
+ * values are used by actual fixed events and higher values are used
  * to indicate other overflow conditions in the PERF_GLOBAL_STATUS msr.
  */
 #define X86_PMC_IDX_FIXED_BTS                           (X86_PMC_IDX_FIXED + 16)
 
 
-#ifdef CONFIG_PERF_COUNTERS
-extern void init_hw_perf_counters(void);
-extern void perf_counters_lapic_init(void);
+#ifdef CONFIG_PERF_EVENTS
+extern void init_hw_perf_events(void);
+extern void perf_events_lapic_init(void);
 
-#define PERF_COUNTER_INDEX_OFFSET                       0
+#define PERF_EVENT_INDEX_OFFSET                 0
 
 #else
-static inline void init_hw_perf_counters(void)          { }
-static inline void perf_counters_lapic_init(void)       { }
+static inline void init_hw_perf_events(void)            { }
+static inline void perf_events_lapic_init(void) { }
 #endif
 
-#endif /* _ASM_X86_PERF_COUNTER_H */
+#endif /* _ASM_X86_PERF_EVENT_H */
diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
index 4c5b51fdc788..af6fd360ab35 100644
--- a/arch/x86/include/asm/pgtable.h
+++ b/arch/x86/include/asm/pgtable.h
@@ -56,16 +56,6 @@ extern struct list_head pgd_list;
 #define pte_update(mm, addr, ptep)              do { } while (0)
 #define pte_update_defer(mm, addr, ptep)        do { } while (0)
 
-static inline void __init paravirt_pagetable_setup_start(pgd_t *base)
-{
-        native_pagetable_setup_start(base);
-}
-
-static inline void __init paravirt_pagetable_setup_done(pgd_t *base)
-{
-        native_pagetable_setup_done(base);
-}
-
 #define pgd_val(x)      native_pgd_val(x)
 #define __pgd(x)        native_make_pgd(x)
 
diff --git a/arch/x86/include/asm/pgtable_types.h b/arch/x86/include/asm/pgtable_types.h
index 54cb697f4900..7b467bf3c680 100644
--- a/arch/x86/include/asm/pgtable_types.h
+++ b/arch/x86/include/asm/pgtable_types.h
@@ -299,8 +299,8 @@ void set_pte_vaddr(unsigned long vaddr, pte_t pte);
 extern void native_pagetable_setup_start(pgd_t *base);
 extern void native_pagetable_setup_done(pgd_t *base);
 #else
-static inline void native_pagetable_setup_start(pgd_t *base) {}
-static inline void native_pagetable_setup_done(pgd_t *base) {}
+#define native_pagetable_setup_start x86_init_pgd_noop
+#define native_pagetable_setup_done  x86_init_pgd_noop
 #endif
 
 struct seq_file;
diff --git a/arch/x86/include/asm/setup.h b/arch/x86/include/asm/setup.h
index 4093d1ed6db2..18e496c98ff0 100644
--- a/arch/x86/include/asm/setup.h
+++ b/arch/x86/include/asm/setup.h
@@ -5,43 +5,6 @@
 
 #define COMMAND_LINE_SIZE 2048
 
-#ifndef __ASSEMBLY__
-
-/*
- * Any setup quirks to be performed?
- */
-struct mpc_cpu;
-struct mpc_bus;
-struct mpc_oemtable;
-
-struct x86_quirks {
-        int (*arch_pre_time_init)(void);
-        int (*arch_time_init)(void);
-        int (*arch_pre_intr_init)(void);
-        int (*arch_intr_init)(void);
-        int (*arch_trap_init)(void);
-        char * (*arch_memory_setup)(void);
-        int (*mach_get_smp_config)(unsigned int early);
-        int (*mach_find_smp_config)(unsigned int reserve);
-
-        int *mpc_record;
-        int (*mpc_apic_id)(struct mpc_cpu *m);
-        void (*mpc_oem_bus_info)(struct mpc_bus *m, char *name);
-        void (*mpc_oem_pci_bus)(struct mpc_bus *m);
-        void (*smp_read_mpc_oem)(struct mpc_oemtable *oemtable,
-                                unsigned short oemsize);
-        int (*setup_ioapic_ids)(void);
-};
-
-extern void x86_quirk_intr_init(void);
-
-extern void x86_quirk_trap_init(void);
-
-extern void x86_quirk_pre_time_init(void);
-extern void x86_quirk_time_init(void);
-
-#endif /* __ASSEMBLY__ */
-
 #ifdef __i386__
 
 #include <linux/pfn.h>
@@ -61,6 +24,7 @@ extern void x86_quirk_time_init(void);
 
 #ifndef __ASSEMBLY__
 #include <asm/bootparam.h>
+#include <asm/x86_init.h>
 
 /* Interrupt control for vSMPowered x86_64 systems */
 #ifdef CONFIG_X86_64
@@ -79,11 +43,16 @@ static inline void visws_early_detect(void) { }
 static inline int is_visws_box(void) { return 0; }
 #endif
 
-extern struct x86_quirks *x86_quirks;
 extern unsigned long saved_video_mode;
 
-#ifndef CONFIG_PARAVIRT
-#define paravirt_post_allocator_init()  do {} while (0)
+extern void reserve_standard_io_resources(void);
+extern void i386_reserve_resources(void);
+extern void setup_default_timer_irq(void);
+
+#ifdef CONFIG_X86_MRST
+extern void x86_mrst_early_setup(void);
+#else
+static inline void x86_mrst_early_setup(void) { }
 #endif
 
 #ifndef _SETUP
diff --git a/arch/x86/include/asm/smp.h b/arch/x86/include/asm/smp.h
index 6a84ed166aec..1e796782cd7b 100644
--- a/arch/x86/include/asm/smp.h
+++ b/arch/x86/include/asm/smp.h
@@ -121,7 +121,6 @@ static inline void arch_send_call_function_single_ipi(int cpu)
         smp_ops.send_call_func_single_ipi(cpu);
 }
 
-#define arch_send_call_function_ipi_mask arch_send_call_function_ipi_mask
 static inline void arch_send_call_function_ipi_mask(const struct cpumask *mask)
 {
         smp_ops.send_call_func_ipi(mask);
diff --git a/arch/x86/include/asm/string_32.h b/arch/x86/include/asm/string_32.h
index c86f452256de..ae907e617181 100644
--- a/arch/x86/include/asm/string_32.h
+++ b/arch/x86/include/asm/string_32.h
@@ -65,7 +65,6 @@ static __always_inline void *__constant_memcpy(void *to, const void *from,
         case 4:
                 *(int *)to = *(int *)from;
                 return to;
-
         case 3:
                 *(short *)to = *(short *)from;
                 *((char *)to + 2) = *((char *)from + 2);
diff --git a/arch/x86/include/asm/syscall.h b/arch/x86/include/asm/syscall.h
index d82f39bb7905..8d33bc5462d1 100644
--- a/arch/x86/include/asm/syscall.h
+++ b/arch/x86/include/asm/syscall.h
@@ -1,7 +1,7 @@
 /*
  * Access to user system call parameters and results
  *
- * Copyright (C) 2008 Red Hat, Inc.  All rights reserved.
+ * Copyright (C) 2008-2009 Red Hat, Inc.  All rights reserved.
  *
  * This copyrighted material is made available to anyone wishing to use,
  * modify, copy, or redistribute it subject to the terms and conditions
@@ -16,13 +16,13 @@
 #include <linux/sched.h>
 #include <linux/err.h>
 
-static inline long syscall_get_nr(struct task_struct *task,
-                                  struct pt_regs *regs)
+/*
+ * Only the low 32 bits of orig_ax are meaningful, so we return int.
+ * This importantly ignores the high bits on 64-bit, so comparisons
+ * sign-extend the low 32 bits.
+ */
+static inline int syscall_get_nr(struct task_struct *task, struct pt_regs *regs)
 {
-        /*
-         * We always sign-extend a -1 value being set here,
-         * so this is always either -1L or a syscall number.
-         */
         return regs->orig_ax;
 }
 
diff --git a/arch/x86/include/asm/time.h b/arch/x86/include/asm/time.h
index 50c733aac421..7bdec4e9b739 100644
--- a/arch/x86/include/asm/time.h
+++ b/arch/x86/include/asm/time.h
@@ -4,60 +4,7 @@
 extern void hpet_time_init(void);
 
 #include <asm/mc146818rtc.h>
-#ifdef CONFIG_X86_32
-#include <linux/efi.h>
-
-static inline unsigned long native_get_wallclock(void)
-{
-        unsigned long retval;
-
-        if (efi_enabled)
-                retval = efi_get_time();
-        else
-                retval = mach_get_cmos_time();
-
-        return retval;
-}
-
-static inline int native_set_wallclock(unsigned long nowtime)
-{
-        int retval;
-
-        if (efi_enabled)
-                retval = efi_set_rtc_mmss(nowtime);
-        else
-                retval = mach_set_rtc_mmss(nowtime);
-
-        return retval;
-}
-
-#else
-extern void native_time_init_hook(void);
-
-static inline unsigned long native_get_wallclock(void)
-{
-        return mach_get_cmos_time();
-}
-
-static inline int native_set_wallclock(unsigned long nowtime)
-{
-        return mach_set_rtc_mmss(nowtime);
-}
-
-#endif
 
 extern void time_init(void);
 
-#ifdef CONFIG_PARAVIRT
-#include <asm/paravirt.h>
-#else /* !CONFIG_PARAVIRT */
-
-#define get_wallclock() native_get_wallclock()
-#define set_wallclock(x) native_set_wallclock(x)
-#define choose_time_init() hpet_time_init
-
-#endif /* CONFIG_PARAVIRT */
-
-extern unsigned long __init calibrate_cpu(void);
-
 #endif /* _ASM_X86_TIME_H */
diff --git a/arch/x86/include/asm/timer.h b/arch/x86/include/asm/timer.h
index 20ca9c4d4686..5469630b27f5 100644
--- a/arch/x86/include/asm/timer.h
+++ b/arch/x86/include/asm/timer.h
@@ -8,20 +8,16 @@
 #define TICK_SIZE (tick_nsec / 1000)
 
 unsigned long long native_sched_clock(void);
-unsigned long native_calibrate_tsc(void);
+extern int recalibrate_cpu_khz(void);
 
-#ifdef CONFIG_X86_32
+#if defined(CONFIG_X86_32) && defined(CONFIG_X86_IO_APIC)
 extern int timer_ack;
-extern irqreturn_t timer_interrupt(int irq, void *dev_id);
-#endif /* CONFIG_X86_32 */
-extern int recalibrate_cpu_khz(void);
+#else
+# define timer_ack (0)
+#endif
 
 extern int no_timer_check;
 
-#ifndef CONFIG_PARAVIRT
-#define calibrate_tsc() native_calibrate_tsc()
-#endif
-
 /* Accelerators for sched_clock()
  * convert from cycles(64bits) => nanoseconds (64bits)
  *  basic equation:
diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h
index 38ae163cc91b..c0427295e8f5 100644
--- a/arch/x86/include/asm/tsc.h
+++ b/arch/x86/include/asm/tsc.h
@@ -48,7 +48,8 @@ static __always_inline cycles_t vget_cycles(void)
 extern void tsc_init(void);
 extern void mark_tsc_unstable(char *reason);
 extern int unsynchronized_tsc(void);
-int check_tsc_unstable(void);
+extern int check_tsc_unstable(void);
+extern unsigned long native_calibrate_tsc(void);
 
 /*
  * Boot-time check whether the TSCs are synchronized across
diff --git a/arch/x86/include/asm/uaccess_32.h b/arch/x86/include/asm/uaccess_32.h
index 5e06259e90e5..632fb44b4cb5 100644
--- a/arch/x86/include/asm/uaccess_32.h
+++ b/arch/x86/include/asm/uaccess_32.h
@@ -33,7 +33,7 @@ unsigned long __must_check __copy_from_user_ll_nocache_nozero
  * Copy data from kernel space to user space.  Caller must check
  * the specified block with access_ok() before calling this function.
  * The caller should also make sure he pins the user space address
- * so that the we don't result in page fault and sleep.
+ * so that we don't result in page fault and sleep.
  *
  * Here we special-case 1, 2 and 4-byte copy_*_user invocations.  On a fault
  * we return the initial request size (1, 2 or 4), as copy_*_user should do.
diff --git a/arch/x86/include/asm/unistd_32.h b/arch/x86/include/asm/unistd_32.h
index 8deaada61bc8..6fb3c209a7e3 100644
--- a/arch/x86/include/asm/unistd_32.h
+++ b/arch/x86/include/asm/unistd_32.h
@@ -341,7 +341,7 @@
 #define __NR_preadv             333
 #define __NR_pwritev            334
 #define __NR_rt_tgsigqueueinfo  335
-#define __NR_perf_counter_open  336
+#define __NR_perf_event_open    336
 
 #ifdef __KERNEL__
 
diff --git a/arch/x86/include/asm/unistd_64.h b/arch/x86/include/asm/unistd_64.h
index b9f3c60de5f7..8d3ad0adbc68 100644
--- a/arch/x86/include/asm/unistd_64.h
+++ b/arch/x86/include/asm/unistd_64.h
@@ -659,8 +659,8 @@ __SYSCALL(__NR_preadv, sys_preadv)
 __SYSCALL(__NR_pwritev, sys_pwritev)
 #define __NR_rt_tgsigqueueinfo                  297
 __SYSCALL(__NR_rt_tgsigqueueinfo, sys_rt_tgsigqueueinfo)
-#define __NR_perf_counter_open                  298
-__SYSCALL(__NR_perf_counter_open, sys_perf_counter_open)
+#define __NR_perf_event_open                    298
+__SYSCALL(__NR_perf_event_open, sys_perf_event_open)
 
 #ifndef __NO_STUBS
 #define __ARCH_WANT_OLD_READDIR
diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h
index 77a68505419a..04eb6c958b9d 100644
--- a/arch/x86/include/asm/uv/uv_hub.h
+++ b/arch/x86/include/asm/uv/uv_hub.h
@@ -15,6 +15,7 @@
 #include <linux/numa.h>
 #include <linux/percpu.h>
 #include <linux/timer.h>
+#include <linux/io.h>
 #include <asm/types.h>
 #include <asm/percpu.h>
 #include <asm/uv/uv_mmrs.h>
@@ -258,13 +259,13 @@ static inline unsigned long *uv_global_mmr32_address(int pnode,
 static inline void uv_write_global_mmr32(int pnode, unsigned long offset,
                                  unsigned long val)
 {
-        *uv_global_mmr32_address(pnode, offset) = val;
+        writeq(val, uv_global_mmr32_address(pnode, offset));
 }
 
 static inline unsigned long uv_read_global_mmr32(int pnode,
                                                  unsigned long offset)
 {
-        return *uv_global_mmr32_address(pnode, offset);
+        return readq(uv_global_mmr32_address(pnode, offset));
 }
 
 /*
@@ -281,13 +282,13 @@ static inline unsigned long *uv_global_mmr64_address(int pnode,
 static inline void uv_write_global_mmr64(int pnode, unsigned long offset,
                                 unsigned long val)
 {
-        *uv_global_mmr64_address(pnode, offset) = val;
+        writeq(val, uv_global_mmr64_address(pnode, offset));
 }
 
 static inline unsigned long uv_read_global_mmr64(int pnode,
                                                  unsigned long offset)
 {
-        return *uv_global_mmr64_address(pnode, offset);
+        return readq(uv_global_mmr64_address(pnode, offset));
 }
 
 /*
@@ -301,22 +302,22 @@ static inline unsigned long *uv_local_mmr_address(unsigned long offset)
 
 static inline unsigned long uv_read_local_mmr(unsigned long offset)
 {
-        return *uv_local_mmr_address(offset);
+        return readq(uv_local_mmr_address(offset));
 }
 
 static inline void uv_write_local_mmr(unsigned long offset, unsigned long val)
 {
-        *uv_local_mmr_address(offset) = val;
+        writeq(val, uv_local_mmr_address(offset));
 }
 
 static inline unsigned char uv_read_local_mmr8(unsigned long offset)
 {
-        return *((unsigned char *)uv_local_mmr_address(offset));
+        return readb(uv_local_mmr_address(offset));
 }
 
 static inline void uv_write_local_mmr8(unsigned long offset, unsigned char val)
 {
-        *((unsigned char *)uv_local_mmr_address(offset)) = val;
+        writeb(val, uv_local_mmr_address(offset));
 }
 
 /*
@@ -422,7 +423,7 @@ static inline void uv_hub_send_ipi(int pnode, int apicid, int vector)
         unsigned long val;
 
         val = (1UL << UVH_IPI_INT_SEND_SHFT) |
-                        ((apicid & 0x3f) << UVH_IPI_INT_APIC_ID_SHFT) |
+                        ((apicid) << UVH_IPI_INT_APIC_ID_SHFT) |
                         (vector << UVH_IPI_INT_VECTOR_SHFT);
         uv_write_global_mmr64(pnode, UVH_IPI_INT, val);
 }
diff --git a/arch/x86/include/asm/vgtod.h b/arch/x86/include/asm/vgtod.h
index dc27a69e5d2a..3d61e204826f 100644
--- a/arch/x86/include/asm/vgtod.h
+++ b/arch/x86/include/asm/vgtod.h
@@ -21,6 +21,7 @@ struct vsyscall_gtod_data {
                 u32     shift;
         } clock;
         struct timespec wall_to_monotonic;
+        struct timespec wall_time_coarse;
 };
 extern struct vsyscall_gtod_data __vsyscall_gtod_data
 __section_vsyscall_gtod_data;
diff --git a/arch/x86/include/asm/vmware.h b/arch/x86/include/asm/vmware.h
index c11b7e100d83..e49ed6d2fd4e 100644
--- a/arch/x86/include/asm/vmware.h
+++ b/arch/x86/include/asm/vmware.h
@@ -20,7 +20,7 @@
 #ifndef ASM_X86__VMWARE_H
 #define ASM_X86__VMWARE_H
 
-extern unsigned long vmware_get_tsc_khz(void);
+extern void vmware_platform_setup(void);
 extern int vmware_platform(void);
 extern void vmware_set_feature_bits(struct cpuinfo_x86 *c);
 
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
new file mode 100644
index 000000000000..2c756fd4ab0e
--- /dev/null
+++ b/arch/x86/include/asm/x86_init.h
@@ -0,0 +1,133 @@
+#ifndef _ASM_X86_PLATFORM_H
+#define _ASM_X86_PLATFORM_H
+
+#include <asm/pgtable_types.h>
+#include <asm/bootparam.h>
+
+struct mpc_bus;
+struct mpc_cpu;
+struct mpc_table;
+
+/**
+ * struct x86_init_mpparse - platform specific mpparse ops
+ * @mpc_record:                 platform specific mpc record accounting
+ * @setup_ioapic_ids:           platform specific ioapic id override
+ * @mpc_apic_id:                platform specific mpc apic id assignment
+ * @smp_read_mpc_oem:           platform specific oem mpc table setup
+ * @mpc_oem_pci_bus:            platform specific pci bus setup (default NULL)
+ * @mpc_oem_bus_info:           platform specific mpc bus info
+ * @find_smp_config:            find the smp configuration
+ * @get_smp_config:             get the smp configuration
+ */
+struct x86_init_mpparse {
+        void (*mpc_record)(unsigned int mode);
+        void (*setup_ioapic_ids)(void);
+        int (*mpc_apic_id)(struct mpc_cpu *m);
+        void (*smp_read_mpc_oem)(struct mpc_table *mpc);
+        void (*mpc_oem_pci_bus)(struct mpc_bus *m);
+        void (*mpc_oem_bus_info)(struct mpc_bus *m, char *name);
+        void (*find_smp_config)(unsigned int reserve);
+        void (*get_smp_config)(unsigned int early);
+};
+
+/**
+ * struct x86_init_resources - platform specific resource related ops
+ * @probe_roms:                 probe BIOS roms
+ * @reserve_resources:          reserve the standard resources for the
+ *                              platform
+ * @memory_setup:               platform specific memory setup
+ *
+ */
+struct x86_init_resources {
+        void (*probe_roms)(void);
+        void (*reserve_resources)(void);
+        char *(*memory_setup)(void);
+};
+
+/**
+ * struct x86_init_irqs - platform specific interrupt setup
+ * @pre_vector_init:            init code to run before interrupt vectors
+ *                              are set up.
+ * @intr_init:                  interrupt init code
+ * @trap_init:                  platform specific trap setup
+ */
+struct x86_init_irqs {
+        void (*pre_vector_init)(void);
+        void (*intr_init)(void);
+        void (*trap_init)(void);
+};
+
+/**
+ * struct x86_init_oem - oem platform specific customizing functions
+ * @arch_setup:                 platform specific architecure setup
+ * @banner:                     print a platform specific banner
+ */
+struct x86_init_oem {
+        void (*arch_setup)(void);
+        void (*banner)(void);
+};
+
+/**
+ * struct x86_init_paging - platform specific paging functions
+ * @pagetable_setup_start:      platform specific pre paging_init() call
+ * @pagetable_setup_done:       platform specific post paging_init() call
+ */
+struct x86_init_paging {
+        void (*pagetable_setup_start)(pgd_t *base);
+        void (*pagetable_setup_done)(pgd_t *base);
+};
+
+/**
+ * struct x86_init_timers - platform specific timer setup
+ * @setup_perpcu_clockev:       set up the per cpu clock event device for the
+ *                              boot cpu
+ * @tsc_pre_init:               platform function called before TSC init
+ * @timer_init:                 initialize the platform timer (default PIT/HPET)
+ */
+struct x86_init_timers {
+        void (*setup_percpu_clockev)(void);
+        void (*tsc_pre_init)(void);
+        void (*timer_init)(void);
+};
+
+/**
+ * struct x86_init_ops - functions for platform specific setup
+ *
+ */
+struct x86_init_ops {
+        struct x86_init_resources       resources;
+        struct x86_init_mpparse         mpparse;
+        struct x86_init_irqs            irqs;
+        struct x86_init_oem             oem;
+        struct x86_init_paging          paging;
+        struct x86_init_timers          timers;
+};
+
+/**
+ * struct x86_cpuinit_ops - platform specific cpu hotplug setups
+ * @setup_percpu_clockev:       set up the per cpu clock event device
+ */
+struct x86_cpuinit_ops {
+        void (*setup_percpu_clockev)(void);
+};
+
+/**
+ * struct x86_platform_ops - platform specific runtime functions
+ * @calibrate_tsc:              calibrate TSC
+ * @get_wallclock:              get time from HW clock like RTC etc.
+ * @set_wallclock:              set time back to HW clock
+ */
+struct x86_platform_ops {
+        unsigned long (*calibrate_tsc)(void);
+        unsigned long (*get_wallclock)(void);
+        int (*set_wallclock)(unsigned long nowtime);
+};
+
+extern struct x86_init_ops x86_init;
+extern struct x86_cpuinit_ops x86_cpuinit;
+extern struct x86_platform_ops x86_platform;
+
+extern void x86_init_noop(void);
+extern void x86_init_uint_noop(unsigned int unused);
+
+#endif
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index 832cb838cb48..d8e5d0cdd678 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -31,8 +31,8 @@ GCOV_PROFILE_paravirt.o		:= n
 
 obj-y                   := process_$(BITS).o signal.o entry_$(BITS).o
 obj-y                   += traps.o irq.o irq_$(BITS).o dumpstack_$(BITS).o
-obj-y                   += time_$(BITS).o ioport.o ldt.o dumpstack.o
-obj-y                   += setup.o i8259.o irqinit.o
+obj-y                   += time.o ioport.o ldt.o dumpstack.o
+obj-y                   += setup.o x86_init.o i8259.o irqinit.o
 obj-$(CONFIG_X86_VISWS) += visws_quirks.o
 obj-$(CONFIG_X86_32)    += probe_roms_32.o
 obj-$(CONFIG_X86_32)    += sys_i386_32.o i386_ksyms_32.o
@@ -56,6 +56,7 @@ obj-$(CONFIG_INTEL_TXT)		+= tboot.o
 obj-$(CONFIG_STACKTRACE)        += stacktrace.o
 obj-y                           += cpu/
 obj-y                           += acpi/
+obj-$(CONFIG_SFI)               += sfi.o
 obj-y                           += reboot.o
 obj-$(CONFIG_MCA)               += mca_32.o
 obj-$(CONFIG_X86_MSR)           += msr.o
@@ -105,6 +106,7 @@ obj-$(CONFIG_SCx200)		+= scx200.o
 scx200-y                        += scx200_32.o
 
 obj-$(CONFIG_OLPC)              += olpc.o
+obj-$(CONFIG_X86_MRST)          += mrst.o
 
 microcode-y                             := microcode_core.o
 microcode-$(CONFIG_MICROCODE_INTEL)     += microcode_intel.o
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 159740decc41..894aa97f0717 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -14,7 +14,7 @@
  *      Mikael Pettersson       :       PM converted to driver model.
  */
 
-#include <linux/perf_counter.h>
+#include <linux/perf_event.h>
 #include <linux/kernel_stat.h>
 #include <linux/mc146818rtc.h>
 #include <linux/acpi_pmtmr.h>
@@ -35,7 +35,8 @@
 #include <linux/smp.h>
 #include <linux/mm.h>
 
-#include <asm/perf_counter.h>
+#include <asm/perf_event.h>
+#include <asm/x86_init.h>
 #include <asm/pgalloc.h>
 #include <asm/atomic.h>
 #include <asm/mpspec.h>
@@ -61,7 +62,7 @@ unsigned int boot_cpu_physical_apicid = -1U;
 /*
  * The highest APIC ID seen during enumeration.
  *
- * This determines the messaging protocol we can use: if all APIC IDs
+ * On AMD, this determines the messaging protocol we can use: if all APIC IDs
  * are in the 0 ... 7 range, then we can use logical addressing which
  * has some performance advantages (better broadcasting).
  *
@@ -978,7 +979,7 @@ void lapic_shutdown(void)
 {
         unsigned long flags;
 
-        if (!cpu_has_apic)
+        if (!cpu_has_apic && !apic_from_smp_config())
                 return;
 
         local_irq_save(flags);
@@ -1188,7 +1189,7 @@ void __cpuinit setup_local_APIC(void)
                 apic_write(APIC_ESR, 0);
         }
 #endif
-        perf_counters_lapic_init();
+        perf_events_lapic_init();
 
         preempt_disable();
 
@@ -1196,8 +1197,7 @@ void __cpuinit setup_local_APIC(void)
          * Double-check whether this APIC is really registered.
          * This is meaningless in clustered apic mode, so we skip it.
          */
-        if (!apic->apic_id_registered())
-                BUG();
+        BUG_ON(!apic->apic_id_registered());
 
         /*
          * Intel recommends to set DFR, LDR and TPR before enabling
@@ -1709,7 +1709,7 @@ int __init APIC_init_uniprocessor(void)
         localise_nmi_watchdog();
 #endif
 
-        setup_boot_clock();
+        x86_init.timers.setup_percpu_clockev();
 #ifdef CONFIG_X86_64
         check_nmi_watchdog();
 #endif
@@ -1916,24 +1916,14 @@ void __cpuinit generic_processor_info(int apicid, int version)
                 max_physical_apicid = apicid;
 
 #ifdef CONFIG_X86_32
-        /*
-         * Would be preferable to switch to bigsmp when CONFIG_HOTPLUG_CPU=y
-         * but we need to work other dependencies like SMP_SUSPEND etc
-         * before this can be done without some confusion.
-         * if (CPU_HOTPLUG_ENABLED || num_processors > 8)
-         *       - Ashok Raj <ashok.raj@intel.com>
-         */
-        if (max_physical_apicid >= 8) {
-                switch (boot_cpu_data.x86_vendor) {
-                case X86_VENDOR_INTEL:
-                        if (!APIC_XAPIC(version)) {
-                                def_to_bigsmp = 0;
-                                break;
-                        }
-                        /* If P4 and above fall through */
-                case X86_VENDOR_AMD:
+        switch (boot_cpu_data.x86_vendor) {
+        case X86_VENDOR_INTEL:
+                if (num_processors > 8)
+                        def_to_bigsmp = 1;
+                break;
+        case X86_VENDOR_AMD:
+                if (max_physical_apicid >= 8)
                         def_to_bigsmp = 1;
-                }
         }
 #endif
 
diff --git a/arch/x86/kernel/apic/bigsmp_32.c b/arch/x86/kernel/apic/bigsmp_32.c
index 676cdac385c0..77a06413b6b2 100644
--- a/arch/x86/kernel/apic/bigsmp_32.c
+++ b/arch/x86/kernel/apic/bigsmp_32.c
@@ -112,7 +112,7 @@ static physid_mask_t bigsmp_ioapic_phys_id_map(physid_mask_t phys_map)
         return physids_promote(0xFFL);
 }
 
-static int bigsmp_check_phys_apicid_present(int boot_cpu_physical_apicid)
+static int bigsmp_check_phys_apicid_present(int phys_apicid)
 {
         return 1;
 }
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 3c8f9e75d038..dc69f28489f5 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -96,6 +96,11 @@ struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES];
 /* # of MP IRQ source entries */
 int mp_irq_entries;
 
+/* Number of legacy interrupts */
+static int nr_legacy_irqs __read_mostly = NR_IRQS_LEGACY;
+/* GSI interrupts */
+static int nr_irqs_gsi = NR_IRQS_LEGACY;
+
 #if defined (CONFIG_MCA) || defined (CONFIG_EISA)
 int mp_bus_id_to_type[MAX_MP_BUSSES];
 #endif
@@ -173,6 +178,12 @@ static struct irq_cfg irq_cfgx[NR_IRQS] = {
         [15] = { .vector = IRQ15_VECTOR, },
 };
 
+void __init io_apic_disable_legacy(void)
+{
+        nr_legacy_irqs = 0;
+        nr_irqs_gsi = 0;
+}
+
 int __init arch_early_irq_init(void)
 {
         struct irq_cfg *cfg;
@@ -190,7 +201,7 @@ int __init arch_early_irq_init(void)
                 desc->chip_data = &cfg[i];
                 zalloc_cpumask_var_node(&cfg[i].domain, GFP_NOWAIT, node);
                 zalloc_cpumask_var_node(&cfg[i].old_domain, GFP_NOWAIT, node);
-                if (i < NR_IRQS_LEGACY)
+                if (i < nr_legacy_irqs)
                         cpumask_setall(cfg[i].domain);
         }
 
@@ -216,17 +227,14 @@ static struct irq_cfg *get_one_free_irq_cfg(int node)
 
         cfg = kzalloc_node(sizeof(*cfg), GFP_ATOMIC, node);
         if (cfg) {
-                if (!alloc_cpumask_var_node(&cfg->domain, GFP_ATOMIC, node)) {
+                if (!zalloc_cpumask_var_node(&cfg->domain, GFP_ATOMIC, node)) {
                         kfree(cfg);
                         cfg = NULL;
-                } else if (!alloc_cpumask_var_node(&cfg->old_domain,
+                } else if (!zalloc_cpumask_var_node(&cfg->old_domain,
                                                           GFP_ATOMIC, node)) {
                         free_cpumask_var(cfg->domain);
                         kfree(cfg);
                         cfg = NULL;
-                } else {
-                        cpumask_clear(cfg->domain);
-                        cpumask_clear(cfg->old_domain);
                 }
         }
 
@@ -867,7 +875,7 @@ static int __init find_isa_irq_apic(int irq, int type)
  */
 static int EISA_ELCR(unsigned int irq)
 {
-        if (irq < NR_IRQS_LEGACY) {
+        if (irq < nr_legacy_irqs) {
                 unsigned int port = 0x4d0 + (irq >> 3);
                 return (inb(port) >> (irq & 7)) & 1;
         }
@@ -1464,7 +1472,7 @@ static void setup_IO_APIC_irq(int apic_id, int pin, unsigned int irq, struct irq
         }
 
         ioapic_register_intr(irq, desc, trigger);
-        if (irq < NR_IRQS_LEGACY)
+        if (irq < nr_legacy_irqs)
                 disable_8259A_irq(irq);
 
         ioapic_write_entry(apic_id, pin, entry);
@@ -1831,7 +1839,7 @@ __apicdebuginit(void) print_PIC(void)
         unsigned int v;
         unsigned long flags;
 
-        if (apic_verbosity == APIC_QUIET)
+        if (apic_verbosity == APIC_QUIET || !nr_legacy_irqs)
                 return;
 
         printk(KERN_DEBUG "\nprinting PIC contents\n");
@@ -1863,7 +1871,7 @@ __apicdebuginit(int) print_all_ICs(void)
         print_PIC();
 
         /* don't print out if apic is not there */
-        if (!cpu_has_apic || disable_apic)
+        if (!cpu_has_apic && !apic_from_smp_config())
                 return 0;
 
         print_all_local_APICs();
@@ -1894,6 +1902,10 @@ void __init enable_IO_APIC(void)
                 spin_unlock_irqrestore(&ioapic_lock, flags);
                 nr_ioapic_registers[apic] = reg_01.bits.entries+1;
         }
+
+        if (!nr_legacy_irqs)
+                return;
+
         for(apic = 0; apic < nr_ioapics; apic++) {
                 int pin;
                 /* See if any of the pins is in ExtINT mode */
@@ -1948,6 +1960,9 @@ void disable_IO_APIC(void)
          */
         clear_IO_APIC();
 
+        if (!nr_legacy_irqs)
+                return;
+
         /*
          * If the i8259 is routed through an IOAPIC
          * Put that IOAPIC in virtual wire mode
@@ -1981,7 +1996,7 @@ void disable_IO_APIC(void)
         /*
          * Use virtual wire A mode when interrupt remapping is enabled.
          */
-        if (cpu_has_apic)
+        if (cpu_has_apic || apic_from_smp_config())
                 disconnect_bsp_APIC(!intr_remapping_enabled &&
                                 ioapic_i8259.pin != -1);
 }
@@ -1994,7 +2009,7 @@ void disable_IO_APIC(void)
  * by Matt Domsch <Matt_Domsch@dell.com>  Tue Dec 21 12:25:05 CST 1999
  */
 
-static void __init setup_ioapic_ids_from_mpc(void)
+void __init setup_ioapic_ids_from_mpc(void)
 {
         union IO_APIC_reg_00 reg_00;
         physid_mask_t phys_id_present_map;
@@ -2003,9 +2018,8 @@ static void __init setup_ioapic_ids_from_mpc(void)
         unsigned char old_id;
         unsigned long flags;
 
-        if (x86_quirks->setup_ioapic_ids && x86_quirks->setup_ioapic_ids())
+        if (acpi_ioapic)
                 return;
-
         /*
          * Don't check I/O APIC IDs for xAPIC systems.  They have
          * no meaning without the serial APIC bus.
@@ -2179,7 +2193,7 @@ static unsigned int startup_ioapic_irq(unsigned int irq)
         struct irq_cfg *cfg;
 
         spin_lock_irqsave(&ioapic_lock, flags);
-        if (irq < NR_IRQS_LEGACY) {
+        if (irq < nr_legacy_irqs) {
                 disable_8259A_irq(irq);
                 if (i8259A_irq_pending(irq))
                         was_pending = 1;
@@ -2657,7 +2671,7 @@ static inline void init_IO_APIC_traps(void)
                          * so default to an old-fashioned 8259
                          * interrupt if we can..
                          */
-                        if (irq < NR_IRQS_LEGACY)
+                        if (irq < nr_legacy_irqs)
                                 make_8259A_irq(irq);
                         else
                                 /* Strange. Oh, well.. */
@@ -2993,7 +3007,7 @@ out:
  * the I/O APIC in all cases now.  No actual device should request
  * it anyway.  --macro
  */
-#define PIC_IRQS        (1 << PIC_CASCADE_IR)
+#define PIC_IRQS        (1UL << PIC_CASCADE_IR)
 
 void __init setup_IO_APIC(void)
 {
@@ -3001,21 +3015,19 @@ void __init setup_IO_APIC(void)
         /*
          * calling enable_IO_APIC() is moved to setup_local_APIC for BP
          */
-
-        io_apic_irqs = ~PIC_IRQS;
+        io_apic_irqs = nr_legacy_irqs ? ~PIC_IRQS : ~0UL;
 
         apic_printk(APIC_VERBOSE, "ENABLING IO-APIC IRQs\n");
         /*
          * Set up IO-APIC IRQ routing.
          */
-#ifdef CONFIG_X86_32
-        if (!acpi_ioapic)
-                setup_ioapic_ids_from_mpc();
-#endif
+        x86_init.mpparse.setup_ioapic_ids();
+
         sync_Arb_IDs();
         setup_IO_APIC_irqs();
         init_IO_APIC_traps();
-        check_timer();
+        if (nr_legacy_irqs)
+                check_timer();
 }
 
 /*
@@ -3116,7 +3128,6 @@ static int __init ioapic_init_sysfs(void)
 
 device_initcall(ioapic_init_sysfs);
 
-static int nr_irqs_gsi = NR_IRQS_LEGACY;
 /*
  * Dynamic irq allocate and deallocation
  */
@@ -3856,7 +3867,7 @@ static int __io_apic_set_pci_routing(struct device *dev, int irq,
         /*
          * IRQs < 16 are already in the irq_2_pin[] map
          */
-        if (irq >= NR_IRQS_LEGACY) {
+        if (irq >= nr_legacy_irqs) {
                 cfg = desc->chip_data;
                 if (add_pin_to_irq_node_nopanic(cfg, node, ioapic, pin)) {
                         printk(KERN_INFO "can not add pin %d for irq %d\n",
diff --git a/arch/x86/kernel/apic/nmi.c b/arch/x86/kernel/apic/nmi.c
index cb66a22d98ad..7ff61d6a188a 100644
--- a/arch/x86/kernel/apic/nmi.c
+++ b/arch/x86/kernel/apic/nmi.c
@@ -508,14 +508,14 @@ static int unknown_nmi_panic_callback(struct pt_regs *regs, int cpu)
 /*
  * proc handler for /proc/sys/kernel/nmi
  */
-int proc_nmi_enabled(struct ctl_table *table, int write, struct file *file,
+int proc_nmi_enabled(struct ctl_table *table, int write,
                         void __user *buffer, size_t *length, loff_t *ppos)
 {
         int old_state;
 
         nmi_watchdog_enabled = (atomic_read(&nmi_active) > 0) ? 1 : 0;
         old_state = nmi_watchdog_enabled;
-        proc_dointvec(table, write, file, buffer, length, ppos);
+        proc_dointvec(table, write, buffer, length, ppos);
         if (!!old_state == !!nmi_watchdog_enabled)
                 return 0;
 
diff --git a/arch/x86/kernel/apic/numaq_32.c b/arch/x86/kernel/apic/numaq_32.c
index ca96e68f0d23..efa00e2b8505 100644
--- a/arch/x86/kernel/apic/numaq_32.c
+++ b/arch/x86/kernel/apic/numaq_32.c
@@ -66,7 +66,6 @@ struct mpc_trans {
         unsigned short                  trans_reserved;
 };
 
-/* x86_quirks member */
 static int                              mpc_record;
 
 static struct mpc_trans                 *translation_table[MAX_MPC_ENTRY];
@@ -130,10 +129,9 @@ void __cpuinit numaq_tsc_disable(void)
         }
 }
 
-static int __init numaq_pre_time_init(void)
+static void __init numaq_tsc_init(void)
 {
         numaq_tsc_disable();
-        return 0;
 }
 
 static inline int generate_logical_apicid(int quad, int phys_apicid)
@@ -177,6 +175,19 @@ static void mpc_oem_pci_bus(struct mpc_bus *m)
         quad_local_to_mp_bus_id[quad][local] = m->busid;
 }
 
+/*
+ * Called from mpparse code.
+ * mode = 0: prescan
+ * mode = 1: one mpc entry scanned
+ */
+static void numaq_mpc_record(unsigned int mode)
+{
+        if (!mode)
+                mpc_record = 0;
+        else
+                mpc_record++;
+}
+
 static void __init MP_translation_info(struct mpc_trans *m)
 {
         printk(KERN_INFO
@@ -206,9 +217,9 @@ static int __init mpf_checksum(unsigned char *mp, int len)
 /*
  * Read/parse the MPC oem tables
  */
-static void __init
- smp_read_mpc_oem(struct mpc_oemtable *oemtable, unsigned short oemsize)
+static void __init smp_read_mpc_oem(struct mpc_table *mpc)
 {
+        struct mpc_oemtable *oemtable = (void *)(long)mpc->oemptr;
         int count = sizeof(*oemtable);  /* the header size */
         unsigned char *oemptr = ((unsigned char *)oemtable) + count;
 
@@ -250,29 +261,6 @@ static void __init
         }
 }
 
-static int __init numaq_setup_ioapic_ids(void)
-{
-        /* so can skip it */
-        return 1;
-}
-
-static struct x86_quirks numaq_x86_quirks __initdata = {
-        .arch_pre_time_init             = numaq_pre_time_init,
-        .arch_time_init                 = NULL,
-        .arch_pre_intr_init             = NULL,
-        .arch_memory_setup              = NULL,
-        .arch_intr_init                 = NULL,
-        .arch_trap_init                 = NULL,
-        .mach_get_smp_config            = NULL,
-        .mach_find_smp_config           = NULL,
-        .mpc_record                     = &mpc_record,
-        .mpc_apic_id                    = mpc_apic_id,
-        .mpc_oem_bus_info               = mpc_oem_bus_info,
-        .mpc_oem_pci_bus                = mpc_oem_pci_bus,
-        .smp_read_mpc_oem               = smp_read_mpc_oem,
-        .setup_ioapic_ids               = numaq_setup_ioapic_ids,
-};
-
 static __init void early_check_numaq(void)
 {
         /*
@@ -286,8 +274,15 @@ static __init void early_check_numaq(void)
         if (smp_found_config)
                 early_get_smp_config();
 
-        if (found_numaq)
-                x86_quirks = &numaq_x86_quirks;
+        if (found_numaq) {
+                x86_init.mpparse.mpc_record = numaq_mpc_record;
+                x86_init.mpparse.setup_ioapic_ids = x86_init_noop;
+                x86_init.mpparse.mpc_apic_id = mpc_apic_id;
+                x86_init.mpparse.smp_read_mpc_oem = smp_read_mpc_oem;
+                x86_init.mpparse.mpc_oem_pci_bus = mpc_oem_pci_bus;
+                x86_init.mpparse.mpc_oem_bus_info = mpc_oem_bus_info;
+                x86_init.timers.tsc_pre_init = numaq_tsc_init;
+        }
 }
 
 int __init get_memcfg_numaq(void)
@@ -418,7 +413,7 @@ static inline physid_mask_t numaq_apicid_to_cpu_present(int logical_apicid)
 /* Where the IO area was mapped on multiquad, always 0 otherwise */
 void *xquad_portio;
 
-static inline int numaq_check_phys_apicid_present(int boot_cpu_physical_apicid)
+static inline int numaq_check_phys_apicid_present(int phys_apicid)
 {
         return 1;
 }
diff --git a/arch/x86/kernel/apic/probe_64.c b/arch/x86/kernel/apic/probe_64.c
index 65edc180fc82..c4cbd3080c1c 100644
--- a/arch/x86/kernel/apic/probe_64.c
+++ b/arch/x86/kernel/apic/probe_64.c
@@ -64,16 +64,23 @@ void __init default_setup_apic_routing(void)
                         apic = &apic_x2apic_phys;
                 else
                         apic = &apic_x2apic_cluster;
-                printk(KERN_INFO "Setting APIC routing to %s\n", apic->name);
         }
 #endif
 
         if (apic == &apic_flat) {
-                if (max_physical_apicid >= 8)
-                        apic = &apic_physflat;
-                printk(KERN_INFO "Setting APIC routing to %s\n", apic->name);
+                switch (boot_cpu_data.x86_vendor) {
+                case X86_VENDOR_INTEL:
+                        if (num_processors > 8)
+                                apic = &apic_physflat;
+                        break;
+                case X86_VENDOR_AMD:
+                        if (max_physical_apicid >= 8)
+                                apic = &apic_physflat;
+                }
         }
 
+        printk(KERN_INFO "Setting APIC routing to %s\n", apic->name);
+
         if (is_vsmp_box()) {
                 /* need to update phys_pkg_id */
                 apic->phys_pkg_id = apicid_phys_pkg_id;
diff --git a/arch/x86/kernel/apic/summit_32.c b/arch/x86/kernel/apic/summit_32.c
index eafdfbd1ea95..645ecc4ff0be 100644
--- a/arch/x86/kernel/apic/summit_32.c
+++ b/arch/x86/kernel/apic/summit_32.c
@@ -272,7 +272,7 @@ static physid_mask_t summit_apicid_to_cpu_present(int apicid)
         return physid_mask_of_physid(0);
 }
 
-static int summit_check_phys_apicid_present(int boot_cpu_physical_apicid)
+static int summit_check_phys_apicid_present(int physical_apicid)
 {
         return 1;
 }
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index 601159374e87..f5f5886a6b53 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -389,6 +389,16 @@ static __init void map_gru_high(int max_pnode)
                 map_high("GRU", gru.s.base, shift, max_pnode, map_wb);
 }
 
+static __init void map_mmr_high(int max_pnode)
+{
+        union uvh_rh_gam_mmr_overlay_config_mmr_u mmr;
+        int shift = UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR_BASE_SHFT;
+
+        mmr.v = uv_read_local_mmr(UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR);
+        if (mmr.s.enable)
+                map_high("MMR", mmr.s.base, shift, max_pnode, map_uc);
+}
+
 static __init void map_mmioh_high(int max_pnode)
 {
         union uvh_rh_gam_mmioh_overlay_config_mmr_u mmioh;
@@ -643,6 +653,7 @@ void __init uv_system_init(void)
         }
 
         map_gru_high(max_pnode);
+        map_mmr_high(max_pnode);
         map_mmioh_high(max_pnode);
 
         uv_cpu_init();
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index 8dd30638fe44..68537e957a9b 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -27,7 +27,7 @@ obj-$(CONFIG_CPU_SUP_CENTAUR)		+= centaur.o
 obj-$(CONFIG_CPU_SUP_TRANSMETA_32)      += transmeta.o
 obj-$(CONFIG_CPU_SUP_UMC_32)            += umc.o
 
-obj-$(CONFIG_PERF_COUNTERS)             += perf_counter.o
+obj-$(CONFIG_PERF_EVENTS)               += perf_event.o
 
 obj-$(CONFIG_X86_MCE)                   += mcheck/
 obj-$(CONFIG_MTRR)                      += mtrr/
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index f32fa71ccf97..c910a716a71c 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -184,7 +184,7 @@ static void __cpuinit amd_k7_smp_check(struct cpuinfo_x86 *c)
          * approved Athlon
          */
         WARN_ONCE(1, "WARNING: This combination of AMD"
-                "processors is not suitable for SMP.\n");
+                " processors is not suitable for SMP.\n");
         if (!test_taint(TAINT_UNSAFE_SMP))
                 add_taint(TAINT_UNSAFE_SMP);
 
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 2055fc2b2e6b..cc25c2b4a567 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -13,7 +13,7 @@
 #include <linux/io.h>
 
 #include <asm/stackprotector.h>
-#include <asm/perf_counter.h>
+#include <asm/perf_event.h>
 #include <asm/mmu_context.h>
 #include <asm/hypervisor.h>
 #include <asm/processor.h>
@@ -34,7 +34,6 @@
 #include <asm/mce.h>
 #include <asm/msr.h>
 #include <asm/pat.h>
-#include <linux/smp.h>
 
 #ifdef CONFIG_X86_LOCAL_APIC
 #include <asm/uv/uv.h>
@@ -870,7 +869,7 @@ void __init identify_boot_cpu(void)
 #else
         vgetcpu_set_mode();
 #endif
-        init_hw_perf_counters();
+        init_hw_perf_events();
 }
 
 void __cpuinit identify_secondary_cpu(struct cpuinfo_x86 *c)
diff --git a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
index 4109679863c1..7d5c3b0ea8da 100644
--- a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
+++ b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
@@ -33,7 +33,7 @@
 #include <linux/cpufreq.h>
 #include <linux/compiler.h>
 #include <linux/dmi.h>
-#include <trace/power.h>
+#include <trace/events/power.h>
 
 #include <linux/acpi.h>
 #include <linux/io.h>
@@ -72,8 +72,6 @@ static DEFINE_PER_CPU(struct acpi_cpufreq_data *, drv_data);
 
 static DEFINE_PER_CPU(struct aperfmperf, old_perf);
 
-DEFINE_TRACE(power_mark);
-
 /* acpi_perf_data is a pointer to percpu data. */
 static struct acpi_processor_performance *acpi_perf_data;
 
@@ -332,7 +330,6 @@ static int acpi_cpufreq_target(struct cpufreq_policy *policy,
         unsigned int next_perf_state = 0; /* Index into perf table */
         unsigned int i;
         int result = 0;
-        struct power_trace it;
 
         dprintk("acpi_cpufreq_target %d (%d)\n", target_freq, policy->cpu);
 
@@ -364,7 +361,7 @@ static int acpi_cpufreq_target(struct cpufreq_policy *policy,
                 }
         }
 
-        trace_power_mark(&it, POWER_PSTATE, next_perf_state);
+        trace_power_frequency(POWER_PSTATE, data->freq_table[next_state].frequency);
 
         switch (data->cpu_feature) {
         case SYSTEM_INTEL_MSR_CAPABLE:
@@ -526,6 +523,21 @@ static const struct dmi_system_id sw_any_bug_dmi_table[] = {
         },
         { }
 };
+
+static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c)
+{
+        /* http://www.intel.com/Assets/PDF/specupdate/314554.pdf
+         * AL30: A Machine Check Exception (MCE) Occurring during an
+         * Enhanced Intel SpeedStep Technology Ratio Change May Cause
+         * Both Processor Cores to Lock Up when HT is enabled*/
+        if (c->x86_vendor == X86_VENDOR_INTEL) {
+                if ((c->x86 == 15) &&
+                    (c->x86_model == 6) &&
+                    (c->x86_mask == 8) && smt_capable())
+                        return -ENODEV;
+                }
+        return 0;
+}
 #endif
 
 static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
@@ -540,6 +552,12 @@ static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
 
         dprintk("acpi_cpufreq_cpu_init\n");
 
+#ifdef CONFIG_SMP
+        result = acpi_cpufreq_blacklist(c);
+        if (result)
+                return result;
+#endif
+
         data = kzalloc(sizeof(struct acpi_cpufreq_data), GFP_KERNEL);
         if (!data)
                 return -ENOMEM;
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
index 2a50ef891000..6394aa5c7985 100644
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
@@ -605,9 +605,10 @@ static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst,
         return 0;
 }
 
-static void invalidate_entry(struct powernow_k8_data *data, unsigned int entry)
+static void invalidate_entry(struct cpufreq_frequency_table *powernow_table,
+                unsigned int entry)
 {
-        data->powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID;
+        powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID;
 }
 
 static void print_basics(struct powernow_k8_data *data)
@@ -854,6 +855,10 @@ static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
                 goto err_out;
         }
 
+        /* fill in data */
+        data->numps = data->acpi_data.state_count;
+        powernow_k8_acpi_pst_values(data, 0);
+
         if (cpu_family == CPU_HW_PSTATE)
                 ret_val = fill_powernow_table_pstate(data, powernow_table);
         else
@@ -866,11 +871,8 @@ static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
         powernow_table[data->acpi_data.state_count].index = 0;
         data->powernow_table = powernow_table;
 
-        /* fill in data */
-        data->numps = data->acpi_data.state_count;
         if (cpumask_first(cpu_core_mask(data->cpu)) == data->cpu)
                 print_basics(data);
-        powernow_k8_acpi_pst_values(data, 0);
 
         /* notify BIOS that we exist */
         acpi_processor_notify_smm(THIS_MODULE);
@@ -914,13 +916,13 @@ static int fill_powernow_table_pstate(struct powernow_k8_data *data,
                                         "bad value %d.\n", i, index);
                         printk(KERN_ERR PFX "Please report to BIOS "
                                         "manufacturer\n");
-                        invalidate_entry(data, i);
+                        invalidate_entry(powernow_table, i);
                         continue;
                 }
                 rdmsr(MSR_PSTATE_DEF_BASE + index, lo, hi);
                 if (!(hi & HW_PSTATE_VALID_MASK)) {
                         dprintk("invalid pstate %d, ignoring\n", index);
-                        invalidate_entry(data, i);
+                        invalidate_entry(powernow_table, i);
                         continue;
                 }
 
@@ -941,7 +943,6 @@ static int fill_powernow_table_fidvid(struct powernow_k8_data *data,
                 struct cpufreq_frequency_table *powernow_table)
 {
         int i;
-        int cntlofreq = 0;
 
         for (i = 0; i < data->acpi_data.state_count; i++) {
                 u32 fid;
@@ -970,7 +971,7 @@ static int fill_powernow_table_fidvid(struct powernow_k8_data *data,
                 /* verify frequency is OK */
                 if ((freq > (MAX_FREQ * 1000)) || (freq < (MIN_FREQ * 1000))) {
                         dprintk("invalid freq %u kHz, ignoring\n", freq);
-                        invalidate_entry(data, i);
+                        invalidate_entry(powernow_table, i);
                         continue;
                 }
 
@@ -978,38 +979,17 @@ static int fill_powernow_table_fidvid(struct powernow_k8_data *data,
                  * BIOSs are using "off" to indicate invalid */
                 if (vid == VID_OFF) {
                         dprintk("invalid vid %u, ignoring\n", vid);
-                        invalidate_entry(data, i);
+                        invalidate_entry(powernow_table, i);
                         continue;
                 }
 
-                /* verify only 1 entry from the lo frequency table */
-                if (fid < HI_FID_TABLE_BOTTOM) {
-                        if (cntlofreq) {
-                                /* if both entries are the same,
-                                 * ignore this one ... */
-                                if ((freq != powernow_table[cntlofreq].frequency) ||
-                                    (index != powernow_table[cntlofreq].index)) {
-                                        printk(KERN_ERR PFX
-                                                "Too many lo freq table "
-                                                "entries\n");
-                                        return 1;
-                                }
-
-                                dprintk("double low frequency table entry, "
-                                                "ignoring it.\n");
-                                invalidate_entry(data, i);
-                                continue;
-                        } else
-                                cntlofreq = i;
-                }
-
                 if (freq != (data->acpi_data.states[i].core_frequency * 1000)) {
                         printk(KERN_INFO PFX "invalid freq entries "
                                 "%u kHz vs. %u kHz\n", freq,
                                 (unsigned int)
                                 (data->acpi_data.states[i].core_frequency
                                  * 1000));
-                        invalidate_entry(data, i);
+                        invalidate_entry(powernow_table, i);
                         continue;
                 }
         }
diff --git a/arch/x86/kernel/cpu/hypervisor.c b/arch/x86/kernel/cpu/hypervisor.c
index 93ba8eeb100a..08be922de33a 100644
--- a/arch/x86/kernel/cpu/hypervisor.c
+++ b/arch/x86/kernel/cpu/hypervisor.c
@@ -34,13 +34,6 @@ detect_hypervisor_vendor(struct cpuinfo_x86 *c)
                 c->x86_hyper_vendor = X86_HYPER_VENDOR_NONE;
 }
 
-unsigned long get_hypervisor_tsc_freq(void)
-{
-        if (boot_cpu_data.x86_hyper_vendor == X86_HYPER_VENDOR_VMWARE)
-                return vmware_get_tsc_khz();
-        return 0;
-}
-
 static inline void __cpuinit
 hypervisor_set_feature_bits(struct cpuinfo_x86 *c)
 {
@@ -55,3 +48,10 @@ void __cpuinit init_hypervisor(struct cpuinfo_x86 *c)
         detect_hypervisor_vendor(c);
         hypervisor_set_feature_bits(c);
 }
+
+void __init init_hypervisor_platform(void)
+{
+        init_hypervisor(&boot_cpu_data);
+        if (boot_cpu_data.x86_hyper_vendor == X86_HYPER_VENDOR_VMWARE)
+                vmware_platform_setup();
+}
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index 8cd5224943b5..83a3d1f4efca 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -489,8 +489,9 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
         int i, err = 0;
         struct threshold_bank *b = NULL;
         char name[32];
+#ifdef CONFIG_SMP
         struct cpuinfo_x86 *c = &cpu_data(cpu);
-
+#endif
 
         sprintf(name, "threshold_bank%i", bank);
 
diff --git a/arch/x86/kernel/cpu/mtrr/if.c b/arch/x86/kernel/cpu/mtrr/if.c
index 08b6ea4c62b4..f04e72527604 100644
--- a/arch/x86/kernel/cpu/mtrr/if.c
+++ b/arch/x86/kernel/cpu/mtrr/if.c
@@ -126,8 +126,8 @@ mtrr_write(struct file *file, const char __user *buf, size_t len, loff_t * ppos)
                 return -EINVAL;
 
         base = simple_strtoull(line + 5, &ptr, 0);
-        for (; isspace(*ptr); ++ptr)
-                ;
+        while (isspace(*ptr))
+                ptr++;
 
         if (strncmp(ptr, "size=", 5))
                 return -EINVAL;
@@ -135,14 +135,14 @@ mtrr_write(struct file *file, const char __user *buf, size_t len, loff_t * ppos)
         size = simple_strtoull(ptr + 5, &ptr, 0);
         if ((base & 0xfff) || (size & 0xfff))
                 return -EINVAL;
-        for (; isspace(*ptr); ++ptr)
-                ;
+        while (isspace(*ptr))
+                ptr++;
 
         if (strncmp(ptr, "type=", 5))
                 return -EINVAL;
         ptr += 5;
-        for (; isspace(*ptr); ++ptr)
-                ;
+        while (isspace(*ptr))
+                ptr++;
 
         for (i = 0; i < MTRR_NUM_TYPES; ++i) {
                 if (strcmp(ptr, mtrr_strings[i]))
diff --git a/arch/x86/kernel/cpu/perf_counter.c b/arch/x86/kernel/cpu/perf_event.c
index 2732e2c1e4d3..a3c7adb06b78 100644
--- a/arch/x86/kernel/cpu/perf_counter.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -1,5 +1,5 @@
 /*
- * Performance counter x86 architecture code
+ * Performance events x86 architecture code
  *
  *  Copyright (C) 2008 Thomas Gleixner <tglx@linutronix.de>
  *  Copyright (C) 2008-2009 Red Hat, Inc., Ingo Molnar
@@ -11,7 +11,7 @@
  *  For licencing details see kernel-base/COPYING
  */
 
-#include <linux/perf_counter.h>
+#include <linux/perf_event.h>
 #include <linux/capability.h>
 #include <linux/notifier.h>
 #include <linux/hardirq.h>
@@ -27,19 +27,19 @@
 #include <asm/stacktrace.h>
 #include <asm/nmi.h>
 
-static u64 perf_counter_mask __read_mostly;
+static u64 perf_event_mask __read_mostly;
 
-/* The maximal number of PEBS counters: */
-#define MAX_PEBS_COUNTERS       4
+/* The maximal number of PEBS events: */
+#define MAX_PEBS_EVENTS 4
 
 /* The size of a BTS record in bytes: */
 #define BTS_RECORD_SIZE         24
 
 /* The size of a per-cpu BTS buffer in bytes: */
-#define BTS_BUFFER_SIZE         (BTS_RECORD_SIZE * 1024)
+#define BTS_BUFFER_SIZE         (BTS_RECORD_SIZE * 2048)
 
 /* The BTS overflow threshold in bytes from the end of the buffer: */
-#define BTS_OVFL_TH             (BTS_RECORD_SIZE * 64)
+#define BTS_OVFL_TH             (BTS_RECORD_SIZE * 128)
 
 
 /*
@@ -65,11 +65,11 @@ struct debug_store {
         u64     pebs_index;
         u64     pebs_absolute_maximum;
         u64     pebs_interrupt_threshold;
-        u64     pebs_counter_reset[MAX_PEBS_COUNTERS];
+        u64     pebs_event_reset[MAX_PEBS_EVENTS];
 };
 
-struct cpu_hw_counters {
-        struct perf_counter     *counters[X86_PMC_IDX_MAX];
+struct cpu_hw_events {
+        struct perf_event       *events[X86_PMC_IDX_MAX];
         unsigned long           used_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];
         unsigned long           active_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];
         unsigned long           interrupts;
@@ -86,17 +86,17 @@ struct x86_pmu {
         int             (*handle_irq)(struct pt_regs *);
         void            (*disable_all)(void);
         void            (*enable_all)(void);
-        void            (*enable)(struct hw_perf_counter *, int);
-        void            (*disable)(struct hw_perf_counter *, int);
+        void            (*enable)(struct hw_perf_event *, int);
+        void            (*disable)(struct hw_perf_event *, int);
         unsigned        eventsel;
         unsigned        perfctr;
         u64             (*event_map)(int);
         u64             (*raw_event)(u64);
         int             max_events;
-        int             num_counters;
-        int             num_counters_fixed;
-        int             counter_bits;
-        u64             counter_mask;
+        int             num_events;
+        int             num_events_fixed;
+        int             event_bits;
+        u64             event_mask;
         int             apic;
         u64             max_period;
         u64             intel_ctrl;
@@ -106,7 +106,7 @@ struct x86_pmu {
 
 static struct x86_pmu x86_pmu __read_mostly;
 
-static DEFINE_PER_CPU(struct cpu_hw_counters, cpu_hw_counters) = {
+static DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events) = {
         .enabled = 1,
 };
 
@@ -124,35 +124,35 @@ static const u64 p6_perfmon_event_map[] =
   [PERF_COUNT_HW_BUS_CYCLES]            = 0x0062,
 };
 
-static u64 p6_pmu_event_map(int event)
+static u64 p6_pmu_event_map(int hw_event)
 {
-        return p6_perfmon_event_map[event];
+        return p6_perfmon_event_map[hw_event];
 }
 
 /*
- * Counter setting that is specified not to count anything.
+ * Event setting that is specified not to count anything.
  * We use this to effectively disable a counter.
  *
  * L2_RQSTS with 0 MESI unit mask.
  */
-#define P6_NOP_COUNTER                  0x0000002EULL
+#define P6_NOP_EVENT                    0x0000002EULL
 
-static u64 p6_pmu_raw_event(u64 event)
+static u64 p6_pmu_raw_event(u64 hw_event)
 {
 #define P6_EVNTSEL_EVENT_MASK           0x000000FFULL
 #define P6_EVNTSEL_UNIT_MASK            0x0000FF00ULL
 #define P6_EVNTSEL_EDGE_MASK            0x00040000ULL
 #define P6_EVNTSEL_INV_MASK             0x00800000ULL
-#define P6_EVNTSEL_COUNTER_MASK         0xFF000000ULL
+#define P6_EVNTSEL_REG_MASK             0xFF000000ULL
 
 #define P6_EVNTSEL_MASK                 \
         (P6_EVNTSEL_EVENT_MASK |        \
          P6_EVNTSEL_UNIT_MASK  |        \
          P6_EVNTSEL_EDGE_MASK  |        \
          P6_EVNTSEL_INV_MASK   |        \
-         P6_EVNTSEL_COUNTER_MASK)
+         P6_EVNTSEL_REG_MASK)
 
-        return event & P6_EVNTSEL_MASK;
+        return hw_event & P6_EVNTSEL_MASK;
 }
 
 
@@ -170,16 +170,16 @@ static const u64 intel_perfmon_event_map[] =
   [PERF_COUNT_HW_BUS_CYCLES]            = 0x013c,
 };
 
-static u64 intel_pmu_event_map(int event)
+static u64 intel_pmu_event_map(int hw_event)
 {
-        return intel_perfmon_event_map[event];
+        return intel_perfmon_event_map[hw_event];
 }
 
 /*
- * Generalized hw caching related event table, filled
+ * Generalized hw caching related hw_event table, filled
  * in on a per model basis. A value of 0 means
- * 'not supported', -1 means 'event makes no sense on
- * this CPU', any other value means the raw event
+ * 'not supported', -1 means 'hw_event makes no sense on
+ * this CPU', any other value means the raw hw_event
  * ID.
  */
 
@@ -463,22 +463,22 @@ static const u64 atom_hw_cache_event_ids
  },
 };
 
-static u64 intel_pmu_raw_event(u64 event)
+static u64 intel_pmu_raw_event(u64 hw_event)
 {
 #define CORE_EVNTSEL_EVENT_MASK         0x000000FFULL
 #define CORE_EVNTSEL_UNIT_MASK          0x0000FF00ULL
 #define CORE_EVNTSEL_EDGE_MASK          0x00040000ULL
 #define CORE_EVNTSEL_INV_MASK           0x00800000ULL
-#define CORE_EVNTSEL_COUNTER_MASK       0xFF000000ULL
+#define CORE_EVNTSEL_REG_MASK   0xFF000000ULL
 
 #define CORE_EVNTSEL_MASK               \
         (CORE_EVNTSEL_EVENT_MASK |      \
          CORE_EVNTSEL_UNIT_MASK  |      \
          CORE_EVNTSEL_EDGE_MASK  |      \
          CORE_EVNTSEL_INV_MASK  |       \
-         CORE_EVNTSEL_COUNTER_MASK)
+         CORE_EVNTSEL_REG_MASK)
 
-        return event & CORE_EVNTSEL_MASK;
+        return hw_event & CORE_EVNTSEL_MASK;
 }
 
 static const u64 amd_hw_cache_event_ids
@@ -585,39 +585,39 @@ static const u64 amd_perfmon_event_map[] =
   [PERF_COUNT_HW_BRANCH_MISSES]         = 0x00c5,
 };
 
-static u64 amd_pmu_event_map(int event)
+static u64 amd_pmu_event_map(int hw_event)
 {
-        return amd_perfmon_event_map[event];
+        return amd_perfmon_event_map[hw_event];
 }
 
-static u64 amd_pmu_raw_event(u64 event)
+static u64 amd_pmu_raw_event(u64 hw_event)
 {
 #define K7_EVNTSEL_EVENT_MASK   0x7000000FFULL
 #define K7_EVNTSEL_UNIT_MASK    0x00000FF00ULL
 #define K7_EVNTSEL_EDGE_MASK    0x000040000ULL
 #define K7_EVNTSEL_INV_MASK     0x000800000ULL
-#define K7_EVNTSEL_COUNTER_MASK 0x0FF000000ULL
+#define K7_EVNTSEL_REG_MASK     0x0FF000000ULL
 
 #define K7_EVNTSEL_MASK                 \
         (K7_EVNTSEL_EVENT_MASK |        \
          K7_EVNTSEL_UNIT_MASK  |        \
          K7_EVNTSEL_EDGE_MASK  |        \
          K7_EVNTSEL_INV_MASK   |        \
-         K7_EVNTSEL_COUNTER_MASK)
+         K7_EVNTSEL_REG_MASK)
 
-        return event & K7_EVNTSEL_MASK;
+        return hw_event & K7_EVNTSEL_MASK;
 }
 
 /*
- * Propagate counter elapsed time into the generic counter.
- * Can only be executed on the CPU where the counter is active.
+ * Propagate event elapsed time into the generic event.
+ * Can only be executed on the CPU where the event is active.
  * Returns the delta events processed.
  */
 static u64
-x86_perf_counter_update(struct perf_counter *counter,
-                        struct hw_perf_counter *hwc, int idx)
+x86_perf_event_update(struct perf_event *event,
+                        struct hw_perf_event *hwc, int idx)
 {
-        int shift = 64 - x86_pmu.counter_bits;
+        int shift = 64 - x86_pmu.event_bits;
         u64 prev_raw_count, new_raw_count;
         s64 delta;
 
@@ -625,15 +625,15 @@ x86_perf_counter_update(struct perf_counter *counter,
                 return 0;
 
         /*
-         * Careful: an NMI might modify the previous counter value.
+         * Careful: an NMI might modify the previous event value.
          *
          * Our tactic to handle this is to first atomically read and
          * exchange a new raw count - then add that new-prev delta
-         * count to the generic counter atomically:
+         * count to the generic event atomically:
          */
 again:
         prev_raw_count = atomic64_read(&hwc->prev_count);
-        rdmsrl(hwc->counter_base + idx, new_raw_count);
+        rdmsrl(hwc->event_base + idx, new_raw_count);
 
         if (atomic64_cmpxchg(&hwc->prev_count, prev_raw_count,
                                         new_raw_count) != prev_raw_count)
@@ -642,7 +642,7 @@ again:
         /*
          * Now we have the new raw value and have updated the prev
          * timestamp already. We can now calculate the elapsed delta
-         * (counter-)time and add that to the generic counter.
+         * (event-)time and add that to the generic event.
          *
          * Careful, not all hw sign-extends above the physical width
          * of the count.
@@ -650,13 +650,13 @@ again:
         delta = (new_raw_count << shift) - (prev_raw_count << shift);
         delta >>= shift;
 
-        atomic64_add(delta, &counter->count);
+        atomic64_add(delta, &event->count);
         atomic64_sub(delta, &hwc->period_left);
 
         return new_raw_count;
 }
 
-static atomic_t active_counters;
+static atomic_t active_events;
 static DEFINE_MUTEX(pmc_reserve_mutex);
 
 static bool reserve_pmc_hardware(void)
@@ -667,12 +667,12 @@ static bool reserve_pmc_hardware(void)
         if (nmi_watchdog == NMI_LOCAL_APIC)
                 disable_lapic_nmi_watchdog();
 
-        for (i = 0; i < x86_pmu.num_counters; i++) {
+        for (i = 0; i < x86_pmu.num_events; i++) {
                 if (!reserve_perfctr_nmi(x86_pmu.perfctr + i))
                         goto perfctr_fail;
         }
 
-        for (i = 0; i < x86_pmu.num_counters; i++) {
+        for (i = 0; i < x86_pmu.num_events; i++) {
                 if (!reserve_evntsel_nmi(x86_pmu.eventsel + i))
                         goto eventsel_fail;
         }
@@ -685,7 +685,7 @@ eventsel_fail:
         for (i--; i >= 0; i--)
                 release_evntsel_nmi(x86_pmu.eventsel + i);
 
-        i = x86_pmu.num_counters;
+        i = x86_pmu.num_events;
 
 perfctr_fail:
         for (i--; i >= 0; i--)
@@ -703,7 +703,7 @@ static void release_pmc_hardware(void)
 #ifdef CONFIG_X86_LOCAL_APIC
         int i;
 
-        for (i = 0; i < x86_pmu.num_counters; i++) {
+        for (i = 0; i < x86_pmu.num_events; i++) {
                 release_perfctr_nmi(x86_pmu.perfctr + i);
                 release_evntsel_nmi(x86_pmu.eventsel + i);
         }
@@ -720,7 +720,7 @@ static inline bool bts_available(void)
 
 static inline void init_debug_store_on_cpu(int cpu)
 {
-        struct debug_store *ds = per_cpu(cpu_hw_counters, cpu).ds;
+        struct debug_store *ds = per_cpu(cpu_hw_events, cpu).ds;
 
         if (!ds)
                 return;
@@ -732,7 +732,7 @@ static inline void init_debug_store_on_cpu(int cpu)
 
 static inline void fini_debug_store_on_cpu(int cpu)
 {
-        if (!per_cpu(cpu_hw_counters, cpu).ds)
+        if (!per_cpu(cpu_hw_events, cpu).ds)
                 return;
 
         wrmsr_on_cpu(cpu, MSR_IA32_DS_AREA, 0, 0);
@@ -751,12 +751,12 @@ static void release_bts_hardware(void)
                 fini_debug_store_on_cpu(cpu);
 
         for_each_possible_cpu(cpu) {
-                struct debug_store *ds = per_cpu(cpu_hw_counters, cpu).ds;
+                struct debug_store *ds = per_cpu(cpu_hw_events, cpu).ds;
 
                 if (!ds)
                         continue;
 
-                per_cpu(cpu_hw_counters, cpu).ds = NULL;
+                per_cpu(cpu_hw_events, cpu).ds = NULL;
 
                 kfree((void *)(unsigned long)ds->bts_buffer_base);
                 kfree(ds);
@@ -796,7 +796,7 @@ static int reserve_bts_hardware(void)
                 ds->bts_interrupt_threshold =
                         ds->bts_absolute_maximum - BTS_OVFL_TH;
 
-                per_cpu(cpu_hw_counters, cpu).ds = ds;
+                per_cpu(cpu_hw_events, cpu).ds = ds;
                 err = 0;
         }
 
@@ -812,9 +812,9 @@ static int reserve_bts_hardware(void)
         return err;
 }
 
-static void hw_perf_counter_destroy(struct perf_counter *counter)
+static void hw_perf_event_destroy(struct perf_event *event)
 {
-        if (atomic_dec_and_mutex_lock(&active_counters, &pmc_reserve_mutex)) {
+        if (atomic_dec_and_mutex_lock(&active_events, &pmc_reserve_mutex)) {
                 release_pmc_hardware();
                 release_bts_hardware();
                 mutex_unlock(&pmc_reserve_mutex);
@@ -827,7 +827,7 @@ static inline int x86_pmu_initialized(void)
 }
 
 static inline int
-set_ext_hw_attr(struct hw_perf_counter *hwc, struct perf_counter_attr *attr)
+set_ext_hw_attr(struct hw_perf_event *hwc, struct perf_event_attr *attr)
 {
         unsigned int cache_type, cache_op, cache_result;
         u64 config, val;
@@ -880,7 +880,7 @@ static void intel_pmu_enable_bts(u64 config)
 
 static void intel_pmu_disable_bts(void)
 {
-        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
         unsigned long debugctlmsr;
 
         if (!cpuc->ds)
@@ -898,10 +898,10 @@ static void intel_pmu_disable_bts(void)
 /*
  * Setup the hardware configuration for a given attr_type
  */
-static int __hw_perf_counter_init(struct perf_counter *counter)
+static int __hw_perf_event_init(struct perf_event *event)
 {
-        struct perf_counter_attr *attr = &counter->attr;
-        struct hw_perf_counter *hwc = &counter->hw;
+        struct perf_event_attr *attr = &event->attr;
+        struct hw_perf_event *hwc = &event->hw;
         u64 config;
         int err;
 
@@ -909,21 +909,23 @@ static int __hw_perf_counter_init(struct perf_counter *counter)
                 return -ENODEV;
 
         err = 0;
-        if (!atomic_inc_not_zero(&active_counters)) {
+        if (!atomic_inc_not_zero(&active_events)) {
                 mutex_lock(&pmc_reserve_mutex);
-                if (atomic_read(&active_counters) == 0) {
+                if (atomic_read(&active_events) == 0) {
                         if (!reserve_pmc_hardware())
                                 err = -EBUSY;
                         else
                                 err = reserve_bts_hardware();
                 }
                 if (!err)
-                        atomic_inc(&active_counters);
+                        atomic_inc(&active_events);
                 mutex_unlock(&pmc_reserve_mutex);
         }
         if (err)
                 return err;
 
+        event->destroy = hw_perf_event_destroy;
+
         /*
          * Generate PMC IRQs:
          * (keep 'enabled' bit clear for now)
@@ -946,17 +948,15 @@ static int __hw_perf_counter_init(struct perf_counter *counter)
                 /*
                  * If we have a PMU initialized but no APIC
                  * interrupts, we cannot sample hardware
-                 * counters (user-space has to fall back and
-                 * sample via a hrtimer based software counter):
+                 * events (user-space has to fall back and
+                 * sample via a hrtimer based software event):
                  */
                 if (!x86_pmu.apic)
                         return -EOPNOTSUPP;
         }
 
-        counter->destroy = hw_perf_counter_destroy;
-
         /*
-         * Raw event type provide the config in the event structure
+         * Raw hw_event type provide the config in the hw_event structure
          */
         if (attr->type == PERF_TYPE_RAW) {
                 hwc->config |= x86_pmu.raw_event(attr->config);
@@ -1001,7 +1001,7 @@ static int __hw_perf_counter_init(struct perf_counter *counter)
 
 static void p6_pmu_disable_all(void)
 {
-        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
         u64 val;
 
         if (!cpuc->enabled)
@@ -1018,7 +1018,7 @@ static void p6_pmu_disable_all(void)
 
 static void intel_pmu_disable_all(void)
 {
-        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
 
         if (!cpuc->enabled)
                 return;
@@ -1034,7 +1034,7 @@ static void intel_pmu_disable_all(void)
 
 static void amd_pmu_disable_all(void)
 {
-        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
         int idx;
 
         if (!cpuc->enabled)
@@ -1043,12 +1043,12 @@ static void amd_pmu_disable_all(void)
         cpuc->enabled = 0;
         /*
          * ensure we write the disable before we start disabling the
-         * counters proper, so that amd_pmu_enable_counter() does the
+         * events proper, so that amd_pmu_enable_event() does the
          * right thing.
          */
         barrier();
 
-        for (idx = 0; idx < x86_pmu.num_counters; idx++) {
+        for (idx = 0; idx < x86_pmu.num_events; idx++) {
                 u64 val;
 
                 if (!test_bit(idx, cpuc->active_mask))
@@ -1070,7 +1070,7 @@ void hw_perf_disable(void)
 
 static void p6_pmu_enable_all(void)
 {
-        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
         unsigned long val;
 
         if (cpuc->enabled)
@@ -1087,7 +1087,7 @@ static void p6_pmu_enable_all(void)
 
 static void intel_pmu_enable_all(void)
 {
-        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
 
         if (cpuc->enabled)
                 return;
@@ -1098,19 +1098,19 @@ static void intel_pmu_enable_all(void)
         wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, x86_pmu.intel_ctrl);
 
         if (test_bit(X86_PMC_IDX_FIXED_BTS, cpuc->active_mask)) {
-                struct perf_counter *counter =
-                        cpuc->counters[X86_PMC_IDX_FIXED_BTS];
+                struct perf_event *event =
+                        cpuc->events[X86_PMC_IDX_FIXED_BTS];
 
-                if (WARN_ON_ONCE(!counter))
+                if (WARN_ON_ONCE(!event))
                         return;
 
-                intel_pmu_enable_bts(counter->hw.config);
+                intel_pmu_enable_bts(event->hw.config);
         }
 }
 
 static void amd_pmu_enable_all(void)
 {
-        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
         int idx;
 
         if (cpuc->enabled)
@@ -1119,14 +1119,14 @@ static void amd_pmu_enable_all(void)
         cpuc->enabled = 1;
         barrier();
 
-        for (idx = 0; idx < x86_pmu.num_counters; idx++) {
-                struct perf_counter *counter = cpuc->counters[idx];
+        for (idx = 0; idx < x86_pmu.num_events; idx++) {
+                struct perf_event *event = cpuc->events[idx];
                 u64 val;
 
                 if (!test_bit(idx, cpuc->active_mask))
                         continue;
 
-                val = counter->hw.config;
+                val = event->hw.config;
                 val |= ARCH_PERFMON_EVENTSEL0_ENABLE;
                 wrmsrl(MSR_K7_EVNTSEL0 + idx, val);
         }
@@ -1153,19 +1153,19 @@ static inline void intel_pmu_ack_status(u64 ack)
         wrmsrl(MSR_CORE_PERF_GLOBAL_OVF_CTRL, ack);
 }
 
-static inline void x86_pmu_enable_counter(struct hw_perf_counter *hwc, int idx)
+static inline void x86_pmu_enable_event(struct hw_perf_event *hwc, int idx)
 {
         (void)checking_wrmsrl(hwc->config_base + idx,
                               hwc->config | ARCH_PERFMON_EVENTSEL0_ENABLE);
 }
 
-static inline void x86_pmu_disable_counter(struct hw_perf_counter *hwc, int idx)
+static inline void x86_pmu_disable_event(struct hw_perf_event *hwc, int idx)
 {
         (void)checking_wrmsrl(hwc->config_base + idx, hwc->config);
 }
 
 static inline void
-intel_pmu_disable_fixed(struct hw_perf_counter *hwc, int __idx)
+intel_pmu_disable_fixed(struct hw_perf_event *hwc, int __idx)
 {
         int idx = __idx - X86_PMC_IDX_FIXED;
         u64 ctrl_val, mask;
@@ -1178,10 +1178,10 @@ intel_pmu_disable_fixed(struct hw_perf_counter *hwc, int __idx)
 }
 
 static inline void
-p6_pmu_disable_counter(struct hw_perf_counter *hwc, int idx)
+p6_pmu_disable_event(struct hw_perf_event *hwc, int idx)
 {
-        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
-        u64 val = P6_NOP_COUNTER;
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+        u64 val = P6_NOP_EVENT;
 
         if (cpuc->enabled)
                 val |= ARCH_PERFMON_EVENTSEL0_ENABLE;
@@ -1190,7 +1190,7 @@ p6_pmu_disable_counter(struct hw_perf_counter *hwc, int idx)
 }
 
 static inline void
-intel_pmu_disable_counter(struct hw_perf_counter *hwc, int idx)
+intel_pmu_disable_event(struct hw_perf_event *hwc, int idx)
 {
         if (unlikely(idx == X86_PMC_IDX_FIXED_BTS)) {
                 intel_pmu_disable_bts();
@@ -1202,24 +1202,24 @@ intel_pmu_disable_counter(struct hw_perf_counter *hwc, int idx)
                 return;
         }
 
-        x86_pmu_disable_counter(hwc, idx);
+        x86_pmu_disable_event(hwc, idx);
 }
 
 static inline void
-amd_pmu_disable_counter(struct hw_perf_counter *hwc, int idx)
+amd_pmu_disable_event(struct hw_perf_event *hwc, int idx)
 {
-        x86_pmu_disable_counter(hwc, idx);
+        x86_pmu_disable_event(hwc, idx);
 }
 
 static DEFINE_PER_CPU(u64 [X86_PMC_IDX_MAX], pmc_prev_left);
 
 /*
  * Set the next IRQ period, based on the hwc->period_left value.
- * To be called with the counter disabled in hw:
+ * To be called with the event disabled in hw:
  */
 static int
-x86_perf_counter_set_period(struct perf_counter *counter,
-                             struct hw_perf_counter *hwc, int idx)
+x86_perf_event_set_period(struct perf_event *event,
+                             struct hw_perf_event *hwc, int idx)
 {
         s64 left = atomic64_read(&hwc->period_left);
         s64 period = hwc->sample_period;
@@ -1245,7 +1245,7 @@ x86_perf_counter_set_period(struct perf_counter *counter,
                 ret = 1;
         }
         /*
-         * Quirk: certain CPUs dont like it if just 1 event is left:
+         * Quirk: certain CPUs dont like it if just 1 hw_event is left:
          */
         if (unlikely(left < 2))
                 left = 2;
@@ -1256,21 +1256,21 @@ x86_perf_counter_set_period(struct perf_counter *counter,
         per_cpu(pmc_prev_left[idx], smp_processor_id()) = left;
 
         /*
-         * The hw counter starts counting from this counter offset,
+         * The hw event starts counting from this event offset,
          * mark it to be able to extra future deltas:
          */
         atomic64_set(&hwc->prev_count, (u64)-left);
 
-        err = checking_wrmsrl(hwc->counter_base + idx,
-                             (u64)(-left) & x86_pmu.counter_mask);
+        err = checking_wrmsrl(hwc->event_base + idx,
+                             (u64)(-left) & x86_pmu.event_mask);
 
-        perf_counter_update_userpage(counter);
+        perf_event_update_userpage(event);
 
         return ret;
 }
 
 static inline void
-intel_pmu_enable_fixed(struct hw_perf_counter *hwc, int __idx)
+intel_pmu_enable_fixed(struct hw_perf_event *hwc, int __idx)
 {
         int idx = __idx - X86_PMC_IDX_FIXED;
         u64 ctrl_val, bits, mask;
@@ -1295,9 +1295,9 @@ intel_pmu_enable_fixed(struct hw_perf_counter *hwc, int __idx)
         err = checking_wrmsrl(hwc->config_base, ctrl_val);
 }
 
-static void p6_pmu_enable_counter(struct hw_perf_counter *hwc, int idx)
+static void p6_pmu_enable_event(struct hw_perf_event *hwc, int idx)
 {
-        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
         u64 val;
 
         val = hwc->config;
@@ -1308,10 +1308,10 @@ static void p6_pmu_enable_counter(struct hw_perf_counter *hwc, int idx)
 }
 
 
-static void intel_pmu_enable_counter(struct hw_perf_counter *hwc, int idx)
+static void intel_pmu_enable_event(struct hw_perf_event *hwc, int idx)
 {
         if (unlikely(idx == X86_PMC_IDX_FIXED_BTS)) {
-                if (!__get_cpu_var(cpu_hw_counters).enabled)
+                if (!__get_cpu_var(cpu_hw_events).enabled)
                         return;
 
                 intel_pmu_enable_bts(hwc->config);
@@ -1323,134 +1323,134 @@ static void intel_pmu_enable_counter(struct hw_perf_counter *hwc, int idx)
                 return;
         }
 
-        x86_pmu_enable_counter(hwc, idx);
+        x86_pmu_enable_event(hwc, idx);
 }
 
-static void amd_pmu_enable_counter(struct hw_perf_counter *hwc, int idx)
+static void amd_pmu_enable_event(struct hw_perf_event *hwc, int idx)
 {
-        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
 
         if (cpuc->enabled)
-                x86_pmu_enable_counter(hwc, idx);
+                x86_pmu_enable_event(hwc, idx);
 }
 
 static int
-fixed_mode_idx(struct perf_counter *counter, struct hw_perf_counter *hwc)
+fixed_mode_idx(struct perf_event *event, struct hw_perf_event *hwc)
 {
-        unsigned int event;
+        unsigned int hw_event;
 
-        event = hwc->config & ARCH_PERFMON_EVENT_MASK;
+        hw_event = hwc->config & ARCH_PERFMON_EVENT_MASK;
 
-        if (unlikely((event ==
+        if (unlikely((hw_event ==
                       x86_pmu.event_map(PERF_COUNT_HW_BRANCH_INSTRUCTIONS)) &&
                      (hwc->sample_period == 1)))
                 return X86_PMC_IDX_FIXED_BTS;
 
-        if (!x86_pmu.num_counters_fixed)
+        if (!x86_pmu.num_events_fixed)
                 return -1;
 
-        if (unlikely(event == x86_pmu.event_map(PERF_COUNT_HW_INSTRUCTIONS)))
+        if (unlikely(hw_event == x86_pmu.event_map(PERF_COUNT_HW_INSTRUCTIONS)))
                 return X86_PMC_IDX_FIXED_INSTRUCTIONS;
-        if (unlikely(event == x86_pmu.event_map(PERF_COUNT_HW_CPU_CYCLES)))
+        if (unlikely(hw_event == x86_pmu.event_map(PERF_COUNT_HW_CPU_CYCLES)))
                 return X86_PMC_IDX_FIXED_CPU_CYCLES;
-        if (unlikely(event == x86_pmu.event_map(PERF_COUNT_HW_BUS_CYCLES)))
+        if (unlikely(hw_event == x86_pmu.event_map(PERF_COUNT_HW_BUS_CYCLES)))
                 return X86_PMC_IDX_FIXED_BUS_CYCLES;
 
         return -1;
 }
 
 /*
- * Find a PMC slot for the freshly enabled / scheduled in counter:
+ * Find a PMC slot for the freshly enabled / scheduled in event:
  */
-static int x86_pmu_enable(struct perf_counter *counter)
+static int x86_pmu_enable(struct perf_event *event)
 {
-        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
-        struct hw_perf_counter *hwc = &counter->hw;
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+        struct hw_perf_event *hwc = &event->hw;
         int idx;
 
-        idx = fixed_mode_idx(counter, hwc);
+        idx = fixed_mode_idx(event, hwc);
         if (idx == X86_PMC_IDX_FIXED_BTS) {
                 /* BTS is already occupied. */
                 if (test_and_set_bit(idx, cpuc->used_mask))
                         return -EAGAIN;
 
                 hwc->config_base        = 0;
-                hwc->counter_base       = 0;
+                hwc->event_base = 0;
                 hwc->idx                = idx;
         } else if (idx >= 0) {
                 /*
-                 * Try to get the fixed counter, if that is already taken
-                 * then try to get a generic counter:
+                 * Try to get the fixed event, if that is already taken
+                 * then try to get a generic event:
                  */
                 if (test_and_set_bit(idx, cpuc->used_mask))
                         goto try_generic;
 
                 hwc->config_base = MSR_ARCH_PERFMON_FIXED_CTR_CTRL;
                 /*
-                 * We set it so that counter_base + idx in wrmsr/rdmsr maps to
+                 * We set it so that event_base + idx in wrmsr/rdmsr maps to
                  * MSR_ARCH_PERFMON_FIXED_CTR0 ... CTR2:
                  */
-                hwc->counter_base =
+                hwc->event_base =
                         MSR_ARCH_PERFMON_FIXED_CTR0 - X86_PMC_IDX_FIXED;
                 hwc->idx = idx;
         } else {
                 idx = hwc->idx;
-                /* Try to get the previous generic counter again */
+                /* Try to get the previous generic event again */
                 if (test_and_set_bit(idx, cpuc->used_mask)) {
 try_generic:
                         idx = find_first_zero_bit(cpuc->used_mask,
-                                                  x86_pmu.num_counters);
-                        if (idx == x86_pmu.num_counters)
+                                                  x86_pmu.num_events);
+                        if (idx == x86_pmu.num_events)
                                 return -EAGAIN;
 
                         set_bit(idx, cpuc->used_mask);
                         hwc->idx = idx;
                 }
                 hwc->config_base  = x86_pmu.eventsel;
-                hwc->counter_base = x86_pmu.perfctr;
+                hwc->event_base = x86_pmu.perfctr;
         }
 
-        perf_counters_lapic_init();
+        perf_events_lapic_init();
 
         x86_pmu.disable(hwc, idx);
 
-        cpuc->counters[idx] = counter;
+        cpuc->events[idx] = event;
         set_bit(idx, cpuc->active_mask);
 
-        x86_perf_counter_set_period(counter, hwc, idx);
+        x86_perf_event_set_period(event, hwc, idx);
         x86_pmu.enable(hwc, idx);
 
-        perf_counter_update_userpage(counter);
+        perf_event_update_userpage(event);
 
         return 0;
 }
 
-static void x86_pmu_unthrottle(struct perf_counter *counter)
+static void x86_pmu_unthrottle(struct perf_event *event)
 {
-        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
-        struct hw_perf_counter *hwc = &counter->hw;
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+        struct hw_perf_event *hwc = &event->hw;
 
         if (WARN_ON_ONCE(hwc->idx >= X86_PMC_IDX_MAX ||
-                                cpuc->counters[hwc->idx] != counter))
+                                cpuc->events[hwc->idx] != event))
                 return;
 
         x86_pmu.enable(hwc, hwc->idx);
 }
 
-void perf_counter_print_debug(void)
+void perf_event_print_debug(void)
 {
         u64 ctrl, status, overflow, pmc_ctrl, pmc_count, prev_left, fixed;
-        struct cpu_hw_counters *cpuc;
+        struct cpu_hw_events *cpuc;
         unsigned long flags;
         int cpu, idx;
 
-        if (!x86_pmu.num_counters)
+        if (!x86_pmu.num_events)
                 return;
 
         local_irq_save(flags);
 
         cpu = smp_processor_id();
-        cpuc = &per_cpu(cpu_hw_counters, cpu);
+        cpuc = &per_cpu(cpu_hw_events, cpu);
 
         if (x86_pmu.version >= 2) {
                 rdmsrl(MSR_CORE_PERF_GLOBAL_CTRL, ctrl);
@@ -1466,7 +1466,7 @@ void perf_counter_print_debug(void)
         }
         pr_info("CPU#%d: used:       %016llx\n", cpu, *(u64 *)cpuc->used_mask);
 
-        for (idx = 0; idx < x86_pmu.num_counters; idx++) {
+        for (idx = 0; idx < x86_pmu.num_events; idx++) {
                 rdmsrl(x86_pmu.eventsel + idx, pmc_ctrl);
                 rdmsrl(x86_pmu.perfctr  + idx, pmc_count);
 
@@ -1479,7 +1479,7 @@ void perf_counter_print_debug(void)
                 pr_info("CPU#%d:   gen-PMC%d left:  %016llx\n",
                         cpu, idx, prev_left);
         }
-        for (idx = 0; idx < x86_pmu.num_counters_fixed; idx++) {
+        for (idx = 0; idx < x86_pmu.num_events_fixed; idx++) {
                 rdmsrl(MSR_ARCH_PERFMON_FIXED_CTR0 + idx, pmc_count);
 
                 pr_info("CPU#%d: fixed-PMC%d count: %016llx\n",
@@ -1488,8 +1488,7 @@ void perf_counter_print_debug(void)
         local_irq_restore(flags);
 }
 
-static void intel_pmu_drain_bts_buffer(struct cpu_hw_counters *cpuc,
-                                       struct perf_sample_data *data)
+static void intel_pmu_drain_bts_buffer(struct cpu_hw_events *cpuc)
 {
         struct debug_store *ds = cpuc->ds;
         struct bts_record {
@@ -1497,11 +1496,14 @@ static void intel_pmu_drain_bts_buffer(struct cpu_hw_counters *cpuc,
                 u64     to;
                 u64     flags;
         };
-        struct perf_counter *counter = cpuc->counters[X86_PMC_IDX_FIXED_BTS];
-        unsigned long orig_ip = data->regs->ip;
+        struct perf_event *event = cpuc->events[X86_PMC_IDX_FIXED_BTS];
         struct bts_record *at, *top;
+        struct perf_output_handle handle;
+        struct perf_event_header header;
+        struct perf_sample_data data;
+        struct pt_regs regs;
 
-        if (!counter)
+        if (!event)
                 return;
 
         if (!ds)
@@ -1510,26 +1512,45 @@ static void intel_pmu_drain_bts_buffer(struct cpu_hw_counters *cpuc,
         at  = (struct bts_record *)(unsigned long)ds->bts_buffer_base;
         top = (struct bts_record *)(unsigned long)ds->bts_index;
 
+        if (top <= at)
+                return;
+
         ds->bts_index = ds->bts_buffer_base;
 
+
+        data.period     = event->hw.last_period;
+        data.addr       = 0;
+        regs.ip         = 0;
+
+        /*
+         * Prepare a generic sample, i.e. fill in the invariant fields.
+         * We will overwrite the from and to address before we output
+         * the sample.
+         */
+        perf_prepare_sample(&header, &data, event, &regs);
+
+        if (perf_output_begin(&handle, event,
+                              header.size * (top - at), 1, 1))
+                return;
+
         for (; at < top; at++) {
-                data->regs->ip  = at->from;
-                data->addr      = at->to;
+                data.ip         = at->from;
+                data.addr       = at->to;
 
-                perf_counter_output(counter, 1, data);
+                perf_output_sample(&handle, &header, &data, event);
         }
 
-        data->regs->ip  = orig_ip;
-        data->addr      = 0;
+        perf_output_end(&handle);
 
         /* There's new data available. */
-        counter->pending_kill = POLL_IN;
+        event->hw.interrupts++;
+        event->pending_kill = POLL_IN;
 }
 
-static void x86_pmu_disable(struct perf_counter *counter)
+static void x86_pmu_disable(struct perf_event *event)
 {
-        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
-        struct hw_perf_counter *hwc = &counter->hw;
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+        struct hw_perf_event *hwc = &event->hw;
         int idx = hwc->idx;
 
         /*
@@ -1541,67 +1562,63 @@ static void x86_pmu_disable(struct perf_counter *counter)
 
         /*
          * Make sure the cleared pointer becomes visible before we
-         * (potentially) free the counter:
+         * (potentially) free the event:
          */
         barrier();
 
         /*
-         * Drain the remaining delta count out of a counter
+         * Drain the remaining delta count out of a event
          * that we are disabling:
          */
-        x86_perf_counter_update(counter, hwc, idx);
+        x86_perf_event_update(event, hwc, idx);
 
         /* Drain the remaining BTS records. */
-        if (unlikely(idx == X86_PMC_IDX_FIXED_BTS)) {
-                struct perf_sample_data data;
-                struct pt_regs regs;
+        if (unlikely(idx == X86_PMC_IDX_FIXED_BTS))
+                intel_pmu_drain_bts_buffer(cpuc);
 
-                data.regs = &regs;
-                intel_pmu_drain_bts_buffer(cpuc, &data);
-        }
-        cpuc->counters[idx] = NULL;
+        cpuc->events[idx] = NULL;
         clear_bit(idx, cpuc->used_mask);
 
-        perf_counter_update_userpage(counter);
+        perf_event_update_userpage(event);
 }
 
 /*
- * Save and restart an expired counter. Called by NMI contexts,
- * so it has to be careful about preempting normal counter ops:
+ * Save and restart an expired event. Called by NMI contexts,
+ * so it has to be careful about preempting normal event ops:
  */
-static int intel_pmu_save_and_restart(struct perf_counter *counter)
+static int intel_pmu_save_and_restart(struct perf_event *event)
 {
-        struct hw_perf_counter *hwc = &counter->hw;
+        struct hw_perf_event *hwc = &event->hw;
         int idx = hwc->idx;
         int ret;
 
-        x86_perf_counter_update(counter, hwc, idx);
-        ret = x86_perf_counter_set_period(counter, hwc, idx);
+        x86_perf_event_update(event, hwc, idx);
+        ret = x86_perf_event_set_period(event, hwc, idx);
 
-        if (counter->state == PERF_COUNTER_STATE_ACTIVE)
-                intel_pmu_enable_counter(hwc, idx);
+        if (event->state == PERF_EVENT_STATE_ACTIVE)
+                intel_pmu_enable_event(hwc, idx);
 
         return ret;
 }
 
 static void intel_pmu_reset(void)
 {
-        struct debug_store *ds = __get_cpu_var(cpu_hw_counters).ds;
+        struct debug_store *ds = __get_cpu_var(cpu_hw_events).ds;
         unsigned long flags;
         int idx;
 
-        if (!x86_pmu.num_counters)
+        if (!x86_pmu.num_events)
                 return;
 
         local_irq_save(flags);
 
         printk("clearing PMU state on CPU#%d\n", smp_processor_id());
 
-        for (idx = 0; idx < x86_pmu.num_counters; idx++) {
+        for (idx = 0; idx < x86_pmu.num_events; idx++) {
                 checking_wrmsrl(x86_pmu.eventsel + idx, 0ull);
                 checking_wrmsrl(x86_pmu.perfctr  + idx, 0ull);
         }
-        for (idx = 0; idx < x86_pmu.num_counters_fixed; idx++) {
+        for (idx = 0; idx < x86_pmu.num_events_fixed; idx++) {
                 checking_wrmsrl(MSR_ARCH_PERFMON_FIXED_CTR0 + idx, 0ull);
         }
         if (ds)
@@ -1613,39 +1630,38 @@ static void intel_pmu_reset(void)
 static int p6_pmu_handle_irq(struct pt_regs *regs)
 {
         struct perf_sample_data data;
-        struct cpu_hw_counters *cpuc;
-        struct perf_counter *counter;
-        struct hw_perf_counter *hwc;
+        struct cpu_hw_events *cpuc;
+        struct perf_event *event;
+        struct hw_perf_event *hwc;
         int idx, handled = 0;
         u64 val;
 
-        data.regs = regs;
         data.addr = 0;
 
-        cpuc = &__get_cpu_var(cpu_hw_counters);
+        cpuc = &__get_cpu_var(cpu_hw_events);
 
-        for (idx = 0; idx < x86_pmu.num_counters; idx++) {
+        for (idx = 0; idx < x86_pmu.num_events; idx++) {
                 if (!test_bit(idx, cpuc->active_mask))
                         continue;
 
-                counter = cpuc->counters[idx];
-                hwc = &counter->hw;
+                event = cpuc->events[idx];
+                hwc = &event->hw;
 
-                val = x86_perf_counter_update(counter, hwc, idx);
-                if (val & (1ULL << (x86_pmu.counter_bits - 1)))
+                val = x86_perf_event_update(event, hwc, idx);
+                if (val & (1ULL << (x86_pmu.event_bits - 1)))
                         continue;
 
                 /*
-                 * counter overflow
+                 * event overflow
                  */
                 handled         = 1;
-                data.period     = counter->hw.last_period;
+                data.period     = event->hw.last_period;
 
-                if (!x86_perf_counter_set_period(counter, hwc, idx))
+                if (!x86_perf_event_set_period(event, hwc, idx))
                         continue;
 
-                if (perf_counter_overflow(counter, 1, &data))
-                        p6_pmu_disable_counter(hwc, idx);
+                if (perf_event_overflow(event, 1, &data, regs))
+                        p6_pmu_disable_event(hwc, idx);
         }
 
         if (handled)
@@ -1661,17 +1677,16 @@ static int p6_pmu_handle_irq(struct pt_regs *regs)
 static int intel_pmu_handle_irq(struct pt_regs *regs)
 {
         struct perf_sample_data data;
-        struct cpu_hw_counters *cpuc;
+        struct cpu_hw_events *cpuc;
         int bit, loops;
         u64 ack, status;
 
-        data.regs = regs;
         data.addr = 0;
 
-        cpuc = &__get_cpu_var(cpu_hw_counters);
+        cpuc = &__get_cpu_var(cpu_hw_events);
 
         perf_disable();
-        intel_pmu_drain_bts_buffer(cpuc, &data);
+        intel_pmu_drain_bts_buffer(cpuc);
         status = intel_pmu_get_status();
         if (!status) {
                 perf_enable();
@@ -1681,8 +1696,8 @@ static int intel_pmu_handle_irq(struct pt_regs *regs)
         loops = 0;
 again:
         if (++loops > 100) {
-                WARN_ONCE(1, "perfcounters: irq loop stuck!\n");
-                perf_counter_print_debug();
+                WARN_ONCE(1, "perfevents: irq loop stuck!\n");
+                perf_event_print_debug();
                 intel_pmu_reset();
                 perf_enable();
                 return 1;
@@ -1691,19 +1706,19 @@ again:
         inc_irq_stat(apic_perf_irqs);
         ack = status;
         for_each_bit(bit, (unsigned long *)&status, X86_PMC_IDX_MAX) {
-                struct perf_counter *counter = cpuc->counters[bit];
+                struct perf_event *event = cpuc->events[bit];
 
                 clear_bit(bit, (unsigned long *) &status);
                 if (!test_bit(bit, cpuc->active_mask))
                         continue;
 
-                if (!intel_pmu_save_and_restart(counter))
+                if (!intel_pmu_save_and_restart(event))
                         continue;
 
-                data.period = counter->hw.last_period;
+                data.period = event->hw.last_period;
 
-                if (perf_counter_overflow(counter, 1, &data))
-                        intel_pmu_disable_counter(&counter->hw, bit);
+                if (perf_event_overflow(event, 1, &data, regs))
+                        intel_pmu_disable_event(&event->hw, bit);
         }
 
         intel_pmu_ack_status(ack);
@@ -1723,39 +1738,38 @@ again:
 static int amd_pmu_handle_irq(struct pt_regs *regs)
 {
         struct perf_sample_data data;
-        struct cpu_hw_counters *cpuc;
-        struct perf_counter *counter;
-        struct hw_perf_counter *hwc;
+        struct cpu_hw_events *cpuc;
+        struct perf_event *event;
+        struct hw_perf_event *hwc;
         int idx, handled = 0;
         u64 val;
 
-        data.regs = regs;
         data.addr = 0;
 
-        cpuc = &__get_cpu_var(cpu_hw_counters);
+        cpuc = &__get_cpu_var(cpu_hw_events);
 
-        for (idx = 0; idx < x86_pmu.num_counters; idx++) {
+        for (idx = 0; idx < x86_pmu.num_events; idx++) {
                 if (!test_bit(idx, cpuc->active_mask))
                         continue;
 
-                counter = cpuc->counters[idx];
-                hwc = &counter->hw;
+                event = cpuc->events[idx];
+                hwc = &event->hw;
 
-                val = x86_perf_counter_update(counter, hwc, idx);
-                if (val & (1ULL << (x86_pmu.counter_bits - 1)))
+                val = x86_perf_event_update(event, hwc, idx);
+                if (val & (1ULL << (x86_pmu.event_bits - 1)))
                         continue;
 
                 /*
-                 * counter overflow
+                 * event overflow
                  */
                 handled         = 1;
-                data.period     = counter->hw.last_period;
+                data.period     = event->hw.last_period;
 
-                if (!x86_perf_counter_set_period(counter, hwc, idx))
+                if (!x86_perf_event_set_period(event, hwc, idx))
                         continue;
 
-                if (perf_counter_overflow(counter, 1, &data))
-                        amd_pmu_disable_counter(hwc, idx);
+                if (perf_event_overflow(event, 1, &data, regs))
+                        amd_pmu_disable_event(hwc, idx);
         }
 
         if (handled)
@@ -1769,18 +1783,18 @@ void smp_perf_pending_interrupt(struct pt_regs *regs)
         irq_enter();
         ack_APIC_irq();
         inc_irq_stat(apic_pending_irqs);
-        perf_counter_do_pending();
+        perf_event_do_pending();
         irq_exit();
 }
 
-void set_perf_counter_pending(void)
+void set_perf_event_pending(void)
 {
 #ifdef CONFIG_X86_LOCAL_APIC
         apic->send_IPI_self(LOCAL_PENDING_VECTOR);
 #endif
 }
 
-void perf_counters_lapic_init(void)
+void perf_events_lapic_init(void)
 {
 #ifdef CONFIG_X86_LOCAL_APIC
         if (!x86_pmu.apic || !x86_pmu_initialized())
@@ -1794,13 +1808,13 @@ void perf_counters_lapic_init(void)
 }
 
 static int __kprobes
-perf_counter_nmi_handler(struct notifier_block *self,
+perf_event_nmi_handler(struct notifier_block *self,
                          unsigned long cmd, void *__args)
 {
         struct die_args *args = __args;
         struct pt_regs *regs;
 
-        if (!atomic_read(&active_counters))
+        if (!atomic_read(&active_events))
                 return NOTIFY_DONE;
 
         switch (cmd) {
@@ -1819,7 +1833,7 @@ perf_counter_nmi_handler(struct notifier_block *self,
 #endif
         /*
          * Can't rely on the handled return value to say it was our NMI, two
-         * counters could trigger 'simultaneously' raising two back-to-back NMIs.
+         * events could trigger 'simultaneously' raising two back-to-back NMIs.
          *
          * If the first NMI handles both, the latter will be empty and daze
          * the CPU.
@@ -1829,8 +1843,8 @@ perf_counter_nmi_handler(struct notifier_block *self,
         return NOTIFY_STOP;
 }
 
-static __read_mostly struct notifier_block perf_counter_nmi_notifier = {
-        .notifier_call          = perf_counter_nmi_handler,
+static __read_mostly struct notifier_block perf_event_nmi_notifier = {
+        .notifier_call          = perf_event_nmi_handler,
         .next                   = NULL,
         .priority               = 1
 };
@@ -1840,8 +1854,8 @@ static struct x86_pmu p6_pmu = {
         .handle_irq             = p6_pmu_handle_irq,
         .disable_all            = p6_pmu_disable_all,
         .enable_all             = p6_pmu_enable_all,
-        .enable                 = p6_pmu_enable_counter,
-        .disable                = p6_pmu_disable_counter,
+        .enable                 = p6_pmu_enable_event,
+        .disable                = p6_pmu_disable_event,
         .eventsel               = MSR_P6_EVNTSEL0,
         .perfctr                = MSR_P6_PERFCTR0,
         .event_map              = p6_pmu_event_map,
@@ -1850,16 +1864,16 @@ static struct x86_pmu p6_pmu = {
         .apic                   = 1,
         .max_period             = (1ULL << 31) - 1,
         .version                = 0,
-        .num_counters           = 2,
+        .num_events             = 2,
         /*
-         * Counters have 40 bits implemented. However they are designed such
+         * Events have 40 bits implemented. However they are designed such
          * that bits [32-39] are sign extensions of bit 31. As such the
-         * effective width of a counter for P6-like PMU is 32 bits only.
+         * effective width of a event for P6-like PMU is 32 bits only.
          *
          * See IA-32 Intel Architecture Software developer manual Vol 3B
          */
-        .counter_bits           = 32,
-        .counter_mask           = (1ULL << 32) - 1,
+        .event_bits             = 32,
+        .event_mask             = (1ULL << 32) - 1,
 };
 
 static struct x86_pmu intel_pmu = {
@@ -1867,8 +1881,8 @@ static struct x86_pmu intel_pmu = {
         .handle_irq             = intel_pmu_handle_irq,
         .disable_all            = intel_pmu_disable_all,
         .enable_all             = intel_pmu_enable_all,
-        .enable                 = intel_pmu_enable_counter,
-        .disable                = intel_pmu_disable_counter,
+        .enable                 = intel_pmu_enable_event,
+        .disable                = intel_pmu_disable_event,
         .eventsel               = MSR_ARCH_PERFMON_EVENTSEL0,
         .perfctr                = MSR_ARCH_PERFMON_PERFCTR0,
         .event_map              = intel_pmu_event_map,
@@ -1878,7 +1892,7 @@ static struct x86_pmu intel_pmu = {
         /*
          * Intel PMCs cannot be accessed sanely above 32 bit width,
          * so we install an artificial 1<<31 period regardless of
-         * the generic counter period:
+         * the generic event period:
          */
         .max_period             = (1ULL << 31) - 1,
         .enable_bts             = intel_pmu_enable_bts,
@@ -1890,16 +1904,16 @@ static struct x86_pmu amd_pmu = {
         .handle_irq             = amd_pmu_handle_irq,
         .disable_all            = amd_pmu_disable_all,
         .enable_all             = amd_pmu_enable_all,
-        .enable                 = amd_pmu_enable_counter,
-        .disable                = amd_pmu_disable_counter,
+        .enable                 = amd_pmu_enable_event,
+        .disable                = amd_pmu_disable_event,
         .eventsel               = MSR_K7_EVNTSEL0,
         .perfctr                = MSR_K7_PERFCTR0,
         .event_map              = amd_pmu_event_map,
         .raw_event              = amd_pmu_raw_event,
         .max_events             = ARRAY_SIZE(amd_perfmon_event_map),
-        .num_counters           = 4,
-        .counter_bits           = 48,
-        .counter_mask           = (1ULL << 48) - 1,
+        .num_events             = 4,
+        .event_bits             = 48,
+        .event_mask             = (1ULL << 48) - 1,
         .apic                   = 1,
         /* use highest bit to detect overflow */
         .max_period             = (1ULL << 47) - 1,
@@ -1956,7 +1970,7 @@ static int intel_pmu_init(void)
 
         /*
          * Check whether the Architectural PerfMon supports
-         * Branch Misses Retired Event or not.
+         * Branch Misses Retired hw_event or not.
          */
         cpuid(10, &eax.full, &ebx, &unused, &edx.full);
         if (eax.split.mask_length <= ARCH_PERFMON_BRANCH_MISSES_RETIRED)
@@ -1968,15 +1982,15 @@ static int intel_pmu_init(void)
 
         x86_pmu                         = intel_pmu;
         x86_pmu.version                 = version;
-        x86_pmu.num_counters            = eax.split.num_counters;
-        x86_pmu.counter_bits            = eax.split.bit_width;
-        x86_pmu.counter_mask            = (1ULL << eax.split.bit_width) - 1;
+        x86_pmu.num_events              = eax.split.num_events;
+        x86_pmu.event_bits              = eax.split.bit_width;
+        x86_pmu.event_mask              = (1ULL << eax.split.bit_width) - 1;
 
         /*
-         * Quirk: v2 perfmon does not report fixed-purpose counters, so
-         * assume at least 3 counters:
+         * Quirk: v2 perfmon does not report fixed-purpose events, so
+         * assume at least 3 events:
          */
-        x86_pmu.num_counters_fixed      = max((int)edx.split.num_counters_fixed, 3);
+        x86_pmu.num_events_fixed        = max((int)edx.split.num_events_fixed, 3);
 
         /*
          * Install the hw-cache-events table:
@@ -2023,11 +2037,11 @@ static int amd_pmu_init(void)
         return 0;
 }
 
-void __init init_hw_perf_counters(void)
+void __init init_hw_perf_events(void)
 {
         int err;
 
-        pr_info("Performance Counters: ");
+        pr_info("Performance Events: ");
 
         switch (boot_cpu_data.x86_vendor) {
         case X86_VENDOR_INTEL:
@@ -2040,45 +2054,45 @@ void __init init_hw_perf_counters(void)
                 return;
         }
         if (err != 0) {
-                pr_cont("no PMU driver, software counters only.\n");
+                pr_cont("no PMU driver, software events only.\n");
                 return;
         }
 
         pr_cont("%s PMU driver.\n", x86_pmu.name);
 
-        if (x86_pmu.num_counters > X86_PMC_MAX_GENERIC) {
-                WARN(1, KERN_ERR "hw perf counters %d > max(%d), clipping!",
-                     x86_pmu.num_counters, X86_PMC_MAX_GENERIC);
-                x86_pmu.num_counters = X86_PMC_MAX_GENERIC;
+        if (x86_pmu.num_events > X86_PMC_MAX_GENERIC) {
+                WARN(1, KERN_ERR "hw perf events %d > max(%d), clipping!",
+                     x86_pmu.num_events, X86_PMC_MAX_GENERIC);
+                x86_pmu.num_events = X86_PMC_MAX_GENERIC;
         }
-        perf_counter_mask = (1 << x86_pmu.num_counters) - 1;
-        perf_max_counters = x86_pmu.num_counters;
+        perf_event_mask = (1 << x86_pmu.num_events) - 1;
+        perf_max_events = x86_pmu.num_events;
 
-        if (x86_pmu.num_counters_fixed > X86_PMC_MAX_FIXED) {
-                WARN(1, KERN_ERR "hw perf counters fixed %d > max(%d), clipping!",
-                     x86_pmu.num_counters_fixed, X86_PMC_MAX_FIXED);
-                x86_pmu.num_counters_fixed = X86_PMC_MAX_FIXED;
+        if (x86_pmu.num_events_fixed > X86_PMC_MAX_FIXED) {
+                WARN(1, KERN_ERR "hw perf events fixed %d > max(%d), clipping!",
+                     x86_pmu.num_events_fixed, X86_PMC_MAX_FIXED);
+                x86_pmu.num_events_fixed = X86_PMC_MAX_FIXED;
         }
 
-        perf_counter_mask |=
-                ((1LL << x86_pmu.num_counters_fixed)-1) << X86_PMC_IDX_FIXED;
-        x86_pmu.intel_ctrl = perf_counter_mask;
+        perf_event_mask |=
+                ((1LL << x86_pmu.num_events_fixed)-1) << X86_PMC_IDX_FIXED;
+        x86_pmu.intel_ctrl = perf_event_mask;
 
-        perf_counters_lapic_init();
-        register_die_notifier(&perf_counter_nmi_notifier);
+        perf_events_lapic_init();
+        register_die_notifier(&perf_event_nmi_notifier);
 
-        pr_info("... version:                 %d\n",     x86_pmu.version);
-        pr_info("... bit width:               %d\n",     x86_pmu.counter_bits);
-        pr_info("... generic counters:        %d\n",     x86_pmu.num_counters);
-        pr_info("... value mask:              %016Lx\n", x86_pmu.counter_mask);
-        pr_info("... max period:              %016Lx\n", x86_pmu.max_period);
-        pr_info("... fixed-purpose counters:  %d\n",     x86_pmu.num_counters_fixed);
-        pr_info("... counter mask:            %016Lx\n", perf_counter_mask);
+        pr_info("... version:                %d\n",     x86_pmu.version);
+        pr_info("... bit width:              %d\n",     x86_pmu.event_bits);
+        pr_info("... generic registers:      %d\n",     x86_pmu.num_events);
+        pr_info("... value mask:             %016Lx\n", x86_pmu.event_mask);
+        pr_info("... max period:             %016Lx\n", x86_pmu.max_period);
+        pr_info("... fixed-purpose events:   %d\n",     x86_pmu.num_events_fixed);
+        pr_info("... event mask:             %016Lx\n", perf_event_mask);
 }
 
-static inline void x86_pmu_read(struct perf_counter *counter)
+static inline void x86_pmu_read(struct perf_event *event)
 {
-        x86_perf_counter_update(counter, &counter->hw, counter->hw.idx);
+        x86_perf_event_update(event, &event->hw, event->hw.idx);
 }
 
 static const struct pmu pmu = {
@@ -2088,13 +2102,16 @@ static const struct pmu pmu = {
         .unthrottle     = x86_pmu_unthrottle,
 };
 
-const struct pmu *hw_perf_counter_init(struct perf_counter *counter)
+const struct pmu *hw_perf_event_init(struct perf_event *event)
 {
         int err;
 
-        err = __hw_perf_counter_init(counter);
-        if (err)
+        err = __hw_perf_event_init(event);
+        if (err) {
+                if (event->destroy)
+                        event->destroy(event);
                 return ERR_PTR(err);
+        }
 
         return &pmu;
 }
@@ -2275,7 +2292,7 @@ struct perf_callchain_entry *perf_callchain(struct pt_regs *regs)
         return entry;
 }
 
-void hw_perf_counter_setup_online(int cpu)
+void hw_perf_event_setup_online(int cpu)
 {
         init_debug_store_on_cpu(cpu);
 }
diff --git a/arch/x86/kernel/cpu/perfctr-watchdog.c b/arch/x86/kernel/cpu/perfctr-watchdog.c
index 392bea43b890..fab786f60ed6 100644
--- a/arch/x86/kernel/cpu/perfctr-watchdog.c
+++ b/arch/x86/kernel/cpu/perfctr-watchdog.c
@@ -20,7 +20,7 @@
 #include <linux/kprobes.h>
 
 #include <asm/apic.h>
-#include <asm/perf_counter.h>
+#include <asm/perf_event.h>
 
 struct nmi_watchdog_ctlblk {
         unsigned int cccr_msr;
diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c
index bc24f514ec93..1cbed97b59cf 100644
--- a/arch/x86/kernel/cpu/vmware.c
+++ b/arch/x86/kernel/cpu/vmware.c
@@ -24,6 +24,7 @@
 #include <linux/dmi.h>
 #include <asm/div64.h>
 #include <asm/vmware.h>
+#include <asm/x86_init.h>
 
 #define CPUID_VMWARE_INFO_LEAF  0x40000000
 #define VMWARE_HYPERVISOR_MAGIC 0x564D5868
@@ -47,21 +48,35 @@ static inline int __vmware_platform(void)
         return eax != (uint32_t)-1 && ebx == VMWARE_HYPERVISOR_MAGIC;
 }
 
-static unsigned long __vmware_get_tsc_khz(void)
+static unsigned long vmware_get_tsc_khz(void)
 {
         uint64_t tsc_hz;
         uint32_t eax, ebx, ecx, edx;
 
         VMWARE_PORT(GETHZ, eax, ebx, ecx, edx);
 
-        if (ebx == UINT_MAX)
-                return 0;
         tsc_hz = eax | (((uint64_t)ebx) << 32);
         do_div(tsc_hz, 1000);
         BUG_ON(tsc_hz >> 32);
+        printk(KERN_INFO "TSC freq read from hypervisor : %lu.%03lu MHz\n",
+                         (unsigned long) tsc_hz / 1000,
+                         (unsigned long) tsc_hz % 1000);
         return tsc_hz;
 }
 
+void __init vmware_platform_setup(void)
+{
+        uint32_t eax, ebx, ecx, edx;
+
+        VMWARE_PORT(GETHZ, eax, ebx, ecx, edx);
+
+        if (ebx != UINT_MAX)
+                x86_platform.calibrate_tsc = vmware_get_tsc_khz;
+        else
+                printk(KERN_WARNING
+                       "Failed to get TSC freq from the hypervisor\n");
+}
+
 /*
  * While checking the dmi string infomation, just checking the product
  * serial key should be enough, as this will always have a VMware
@@ -87,12 +102,6 @@ int vmware_platform(void)
         return 0;
 }
 
-unsigned long vmware_get_tsc_khz(void)
-{
-        BUG_ON(!vmware_platform());
-        return __vmware_get_tsc_khz();
-}
-
 /*
  * VMware hypervisor takes care of exporting a reliable TSC to the guest.
  * Still, due to timing difference when running on virtual cpus, the TSC can
diff --git a/arch/x86/kernel/cpuid.c b/arch/x86/kernel/cpuid.c
index b07af8861244..6a52d4b36a30 100644
--- a/arch/x86/kernel/cpuid.c
+++ b/arch/x86/kernel/cpuid.c
@@ -182,7 +182,7 @@ static struct notifier_block __refdata cpuid_class_cpu_notifier =
         .notifier_call = cpuid_class_cpu_callback,
 };
 
-static char *cpuid_nodename(struct device *dev)
+static char *cpuid_devnode(struct device *dev, mode_t *mode)
 {
         return kasprintf(GFP_KERNEL, "cpu/%u/cpuid", MINOR(dev->devt));
 }
@@ -203,7 +203,7 @@ static int __init cpuid_init(void)
                 err = PTR_ERR(cpuid_class);
                 goto out_chrdev;
         }
-        cpuid_class->nodename = cpuid_nodename;
+        cpuid_class->devnode = cpuid_devnode;
         for_each_online_cpu(i) {
                 err = cpuid_device_create(i);
                 if (err != 0)
diff --git a/arch/x86/kernel/dumpstack_32.c b/arch/x86/kernel/dumpstack_32.c
index bca5fba91c9e..f7dd2a7c3bf4 100644
--- a/arch/x86/kernel/dumpstack_32.c
+++ b/arch/x86/kernel/dumpstack_32.c
@@ -5,7 +5,6 @@
 #include <linux/kallsyms.h>
 #include <linux/kprobes.h>
 #include <linux/uaccess.h>
-#include <linux/utsname.h>
 #include <linux/hardirq.h>
 #include <linux/kdebug.h>
 #include <linux/module.h>
diff --git a/arch/x86/kernel/dumpstack_64.c b/arch/x86/kernel/dumpstack_64.c
index 54b0a3276766..a071e6be177e 100644
--- a/arch/x86/kernel/dumpstack_64.c
+++ b/arch/x86/kernel/dumpstack_64.c
@@ -5,7 +5,6 @@
 #include <linux/kallsyms.h>
 #include <linux/kprobes.h>
 #include <linux/uaccess.h>
-#include <linux/utsname.h>
 #include <linux/hardirq.h>
 #include <linux/kdebug.h>
 #include <linux/module.h>
diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c
index 147005a1cc3c..85419bb7d4ab 100644
--- a/arch/x86/kernel/e820.c
+++ b/arch/x86/kernel/e820.c
@@ -1331,7 +1331,7 @@ void __init e820_reserve_resources(void)
         struct resource *res;
         u64 end;
 
-        res = alloc_bootmem_low(sizeof(struct resource) * e820.nr_map);
+        res = alloc_bootmem(sizeof(struct resource) * e820.nr_map);
         e820_res = res;
         for (i = 0; i < e820.nr_map; i++) {
                 end = e820.map[i].addr + e820.map[i].size - 1;
@@ -1455,28 +1455,11 @@ char *__init default_machine_specific_memory_setup(void)
         return who;
 }
 
-char *__init __attribute__((weak)) machine_specific_memory_setup(void)
-{
-        if (x86_quirks->arch_memory_setup) {
-                char *who = x86_quirks->arch_memory_setup();
-
-                if (who)
-                        return who;
-        }
-        return default_machine_specific_memory_setup();
-}
-
-/* Overridden in paravirt.c if CONFIG_PARAVIRT */
-char * __init __attribute__((weak)) memory_setup(void)
-{
-        return machine_specific_memory_setup();
-}
-
 void __init setup_memory_map(void)
 {
         char *who;
 
-        who = memory_setup();
+        who = x86_init.resources.memory_setup();
         memcpy(&e820_saved, &e820, sizeof(struct e820map));
         printk(KERN_INFO "BIOS-provided physical RAM map:\n");
         e820_print_map(who);
diff --git a/arch/x86/kernel/early_printk.c b/arch/x86/kernel/early_printk.c
index 335f049d110f..2acfd3fdc0cc 100644
--- a/arch/x86/kernel/early_printk.c
+++ b/arch/x86/kernel/early_printk.c
@@ -160,721 +160,6 @@ static struct console early_serial_console = {
         .index =        -1,
 };
 
-#ifdef CONFIG_EARLY_PRINTK_DBGP
-
-static struct ehci_caps __iomem *ehci_caps;
-static struct ehci_regs __iomem *ehci_regs;
-static struct ehci_dbg_port __iomem *ehci_debug;
-static unsigned int dbgp_endpoint_out;
-
-struct ehci_dev {
-        u32 bus;
-        u32 slot;
-        u32 func;
-};
-
-static struct ehci_dev ehci_dev;
-
-#define USB_DEBUG_DEVNUM 127
-
-#define DBGP_DATA_TOGGLE        0x8800
-
-static inline u32 dbgp_pid_update(u32 x, u32 tok)
-{
-        return ((x ^ DBGP_DATA_TOGGLE) & 0xffff00) | (tok & 0xff);
-}
-
-static inline u32 dbgp_len_update(u32 x, u32 len)
-{
-        return (x & ~0x0f) | (len & 0x0f);
-}
-
-/*
- * USB Packet IDs (PIDs)
- */
-
-/* token */
-#define USB_PID_OUT             0xe1
-#define USB_PID_IN              0x69
-#define USB_PID_SOF             0xa5
-#define USB_PID_SETUP           0x2d
-/* handshake */
-#define USB_PID_ACK             0xd2
-#define USB_PID_NAK             0x5a
-#define USB_PID_STALL           0x1e
-#define USB_PID_NYET            0x96
-/* data */
-#define USB_PID_DATA0           0xc3
-#define USB_PID_DATA1           0x4b
-#define USB_PID_DATA2           0x87
-#define USB_PID_MDATA           0x0f
-/* Special */
-#define USB_PID_PREAMBLE        0x3c
-#define USB_PID_ERR             0x3c
-#define USB_PID_SPLIT           0x78
-#define USB_PID_PING            0xb4
-#define USB_PID_UNDEF_0         0xf0
-
-#define USB_PID_DATA_TOGGLE     0x88
-#define DBGP_CLAIM (DBGP_OWNER | DBGP_ENABLED | DBGP_INUSE)
-
-#define PCI_CAP_ID_EHCI_DEBUG   0xa
-
-#define HUB_ROOT_RESET_TIME     50      /* times are in msec */
-#define HUB_SHORT_RESET_TIME    10
-#define HUB_LONG_RESET_TIME     200
-#define HUB_RESET_TIMEOUT       500
-
-#define DBGP_MAX_PACKET         8
-
-static int dbgp_wait_until_complete(void)
-{
-        u32 ctrl;
-        int loop = 0x100000;
-
-        do {
-                ctrl = readl(&ehci_debug->control);
-                /* Stop when the transaction is finished */
-                if (ctrl & DBGP_DONE)
-                        break;
-        } while (--loop > 0);
-
-        if (!loop)
-                return -1;
-
-        /*
-         * Now that we have observed the completed transaction,
-         * clear the done bit.
-         */
-        writel(ctrl | DBGP_DONE, &ehci_debug->control);
-        return (ctrl & DBGP_ERROR) ? -DBGP_ERRCODE(ctrl) : DBGP_LEN(ctrl);
-}
-
-static void __init dbgp_mdelay(int ms)
-{
-        int i;
-
-        while (ms--) {
-                for (i = 0; i < 1000; i++)
-                        outb(0x1, 0x80);
-        }
-}
-
-static void dbgp_breath(void)
-{
-        /* Sleep to give the debug port a chance to breathe */
-}
-
-static int dbgp_wait_until_done(unsigned ctrl)
-{
-        u32 pids, lpid;
-        int ret;
-        int loop = 3;
-
-retry:
-        writel(ctrl | DBGP_GO, &ehci_debug->control);
-        ret = dbgp_wait_until_complete();
-        pids = readl(&ehci_debug->pids);
-        lpid = DBGP_PID_GET(pids);
-
-        if (ret < 0)
-                return ret;
-
-        /*
-         * If the port is getting full or it has dropped data
-         * start pacing ourselves, not necessary but it's friendly.
-         */
-        if ((lpid == USB_PID_NAK) || (lpid == USB_PID_NYET))
-                dbgp_breath();
-
-        /* If I get a NACK reissue the transmission */
-        if (lpid == USB_PID_NAK) {
-                if (--loop > 0)
-                        goto retry;
-        }
-
-        return ret;
-}
-
-static void dbgp_set_data(const void *buf, int size)
-{
-        const unsigned char *bytes = buf;
-        u32 lo, hi;
-        int i;
-
-        lo = hi = 0;
-        for (i = 0; i < 4 && i < size; i++)
-                lo |= bytes[i] << (8*i);
-        for (; i < 8 && i < size; i++)
-                hi |= bytes[i] << (8*(i - 4));
-        writel(lo, &ehci_debug->data03);
-        writel(hi, &ehci_debug->data47);
-}
-
-static void __init dbgp_get_data(void *buf, int size)
-{
-        unsigned char *bytes = buf;
-        u32 lo, hi;
-        int i;
-
-        lo = readl(&ehci_debug->data03);
-        hi = readl(&ehci_debug->data47);
-        for (i = 0; i < 4 && i < size; i++)
-                bytes[i] = (lo >> (8*i)) & 0xff;
-        for (; i < 8 && i < size; i++)
-                bytes[i] = (hi >> (8*(i - 4))) & 0xff;
-}
-
-static int dbgp_bulk_write(unsigned devnum, unsigned endpoint,
-                         const char *bytes, int size)
-{
-        u32 pids, addr, ctrl;
-        int ret;
-
-        if (size > DBGP_MAX_PACKET)
-                return -1;
-
-        addr = DBGP_EPADDR(devnum, endpoint);
-
-        pids = readl(&ehci_debug->pids);
-        pids = dbgp_pid_update(pids, USB_PID_OUT);
-
-        ctrl = readl(&ehci_debug->control);
-        ctrl = dbgp_len_update(ctrl, size);
-        ctrl |= DBGP_OUT;
-        ctrl |= DBGP_GO;
-
-        dbgp_set_data(bytes, size);
-        writel(addr, &ehci_debug->address);
-        writel(pids, &ehci_debug->pids);
-
-        ret = dbgp_wait_until_done(ctrl);
-        if (ret < 0)
-                return ret;
-
-        return ret;
-}
-
-static int __init dbgp_bulk_read(unsigned devnum, unsigned endpoint, void *data,
-                                 int size)
-{
-        u32 pids, addr, ctrl;
-        int ret;
-
-        if (size > DBGP_MAX_PACKET)
-                return -1;
-
-        addr = DBGP_EPADDR(devnum, endpoint);
-
-        pids = readl(&ehci_debug->pids);
-        pids = dbgp_pid_update(pids, USB_PID_IN);
-
-        ctrl = readl(&ehci_debug->control);
-        ctrl = dbgp_len_update(ctrl, size);
-        ctrl &= ~DBGP_OUT;
-        ctrl |= DBGP_GO;
-
-        writel(addr, &ehci_debug->address);
-        writel(pids, &ehci_debug->pids);
-        ret = dbgp_wait_until_done(ctrl);
-        if (ret < 0)
-                return ret;
-
-        if (size > ret)
-                size = ret;
-        dbgp_get_data(data, size);
-        return ret;
-}
-
-static int __init dbgp_control_msg(unsigned devnum, int requesttype,
-        int request, int value, int index, void *data, int size)
-{
-        u32 pids, addr, ctrl;
-        struct usb_ctrlrequest req;
-        int read;
-        int ret;
-
-        read = (requesttype & USB_DIR_IN) != 0;
-        if (size > (read ? DBGP_MAX_PACKET:0))
-                return -1;
-
-        /* Compute the control message */
-        req.bRequestType = requesttype;
-        req.bRequest = request;
-        req.wValue = cpu_to_le16(value);
-        req.wIndex = cpu_to_le16(index);
-        req.wLength = cpu_to_le16(size);
-
-        pids = DBGP_PID_SET(USB_PID_DATA0, USB_PID_SETUP);
-        addr = DBGP_EPADDR(devnum, 0);
-
-        ctrl = readl(&ehci_debug->control);
-        ctrl = dbgp_len_update(ctrl, sizeof(req));
-        ctrl |= DBGP_OUT;
-        ctrl |= DBGP_GO;
-
-        /* Send the setup message */
-        dbgp_set_data(&req, sizeof(req));
-        writel(addr, &ehci_debug->address);
-        writel(pids, &ehci_debug->pids);
-        ret = dbgp_wait_until_done(ctrl);
-        if (ret < 0)
-                return ret;
-
-        /* Read the result */
-        return dbgp_bulk_read(devnum, 0, data, size);
-}
-
-
-/* Find a PCI capability */
-static u32 __init find_cap(u32 num, u32 slot, u32 func, int cap)
-{
-        u8 pos;
-        int bytes;
-
-        if (!(read_pci_config_16(num, slot, func, PCI_STATUS) &
-                PCI_STATUS_CAP_LIST))
-                return 0;
-
-        pos = read_pci_config_byte(num, slot, func, PCI_CAPABILITY_LIST);
-        for (bytes = 0; bytes < 48 && pos >= 0x40; bytes++) {
-                u8 id;
-
-                pos &= ~3;
-                id = read_pci_config_byte(num, slot, func, pos+PCI_CAP_LIST_ID);
-                if (id == 0xff)
-                        break;
-                if (id == cap)
-                        return pos;
-
-                pos = read_pci_config_byte(num, slot, func,
-                                                 pos+PCI_CAP_LIST_NEXT);
-        }
-        return 0;
-}
-
-static u32 __init __find_dbgp(u32 bus, u32 slot, u32 func)
-{
-        u32 class;
-
-        class = read_pci_config(bus, slot, func, PCI_CLASS_REVISION);
-        if ((class >> 8) != PCI_CLASS_SERIAL_USB_EHCI)
-                return 0;
-
-        return find_cap(bus, slot, func, PCI_CAP_ID_EHCI_DEBUG);
-}
-
-static u32 __init find_dbgp(int ehci_num, u32 *rbus, u32 *rslot, u32 *rfunc)
-{
-        u32 bus, slot, func;
-
-        for (bus = 0; bus < 256; bus++) {
-                for (slot = 0; slot < 32; slot++) {
-                        for (func = 0; func < 8; func++) {
-                                unsigned cap;
-
-                                cap = __find_dbgp(bus, slot, func);
-
-                                if (!cap)
-                                        continue;
-                                if (ehci_num-- != 0)
-                                        continue;
-                                *rbus = bus;
-                                *rslot = slot;
-                                *rfunc = func;
-                                return cap;
-                        }
-                }
-        }
-        return 0;
-}
-
-static int __init ehci_reset_port(int port)
-{
-        u32 portsc;
-        u32 delay_time, delay;
-        int loop;
-
-        /* Reset the usb debug port */
-        portsc = readl(&ehci_regs->port_status[port - 1]);
-        portsc &= ~PORT_PE;
-        portsc |= PORT_RESET;
-        writel(portsc, &ehci_regs->port_status[port - 1]);
-
-        delay = HUB_ROOT_RESET_TIME;
-        for (delay_time = 0; delay_time < HUB_RESET_TIMEOUT;
-             delay_time += delay) {
-                dbgp_mdelay(delay);
-
-                portsc = readl(&ehci_regs->port_status[port - 1]);
-                if (portsc & PORT_RESET) {
-                        /* force reset to complete */
-                        loop = 2;
-                        writel(portsc & ~(PORT_RWC_BITS | PORT_RESET),
-                                &ehci_regs->port_status[port - 1]);
-                        do {
-                                portsc = readl(&ehci_regs->port_status[port-1]);
-                        } while ((portsc & PORT_RESET) && (--loop > 0));
-                }
-
-                /* Device went away? */
-                if (!(portsc & PORT_CONNECT))
-                        return -ENOTCONN;
-
-                /* bomb out completely if something weird happend */
-                if ((portsc & PORT_CSC))
-                        return -EINVAL;
-
-                /* If we've finished resetting, then break out of the loop */
-                if (!(portsc & PORT_RESET) && (portsc & PORT_PE))
-                        return 0;
-        }
-        return -EBUSY;
-}
-
-static int __init ehci_wait_for_port(int port)
-{
-        u32 status;
-        int ret, reps;
-
-        for (reps = 0; reps < 3; reps++) {
-                dbgp_mdelay(100);
-                status = readl(&ehci_regs->status);
-                if (status & STS_PCD) {
-                        ret = ehci_reset_port(port);
-                        if (ret == 0)
-                                return 0;
-                }
-        }
-        return -ENOTCONN;
-}
-
-#ifdef DBGP_DEBUG
-# define dbgp_printk early_printk
-#else
-static inline void dbgp_printk(const char *fmt, ...) { }
-#endif
-
-typedef void (*set_debug_port_t)(int port);
-
-static void __init default_set_debug_port(int port)
-{
-}
-
-static set_debug_port_t __initdata set_debug_port = default_set_debug_port;
-
-static void __init nvidia_set_debug_port(int port)
-{
-        u32 dword;
-        dword = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
-                                 0x74);
-        dword &= ~(0x0f<<12);
-        dword |= ((port & 0x0f)<<12);
-        write_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func, 0x74,
-                                 dword);
-        dbgp_printk("set debug port to %d\n", port);
-}
-
-static void __init detect_set_debug_port(void)
-{
-        u32 vendorid;
-
-        vendorid = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
-                 0x00);
-
-        if ((vendorid & 0xffff) == 0x10de) {
-                dbgp_printk("using nvidia set_debug_port\n");
-                set_debug_port = nvidia_set_debug_port;
-        }
-}
-
-static int __init ehci_setup(void)
-{
-        struct usb_debug_descriptor dbgp_desc;
-        u32 cmd, ctrl, status, portsc, hcs_params;
-        u32 debug_port, new_debug_port = 0, n_ports;
-        u32  devnum;
-        int ret, i;
-        int loop;
-        int port_map_tried;
-        int playtimes = 3;
-
-try_next_time:
-        port_map_tried = 0;
-
-try_next_port:
-
-        hcs_params = readl(&ehci_caps->hcs_params);
-        debug_port = HCS_DEBUG_PORT(hcs_params);
-        n_ports    = HCS_N_PORTS(hcs_params);
-
-        dbgp_printk("debug_port: %d\n", debug_port);
-        dbgp_printk("n_ports:    %d\n", n_ports);
-
-        for (i = 1; i <= n_ports; i++) {
-                portsc = readl(&ehci_regs->port_status[i-1]);
-                dbgp_printk("portstatus%d: %08x\n", i, portsc);
-        }
-
-        if (port_map_tried && (new_debug_port != debug_port)) {
-                if (--playtimes) {
-                        set_debug_port(new_debug_port);
-                        goto try_next_time;
-                }
-                return -1;
-        }
-
-        loop = 10;
-        /* Reset the EHCI controller */
-        cmd = readl(&ehci_regs->command);
-        cmd |= CMD_RESET;
-        writel(cmd, &ehci_regs->command);
-        do {
-                cmd = readl(&ehci_regs->command);
-        } while ((cmd & CMD_RESET) && (--loop > 0));
-
-        if (!loop) {
-                dbgp_printk("can not reset ehci\n");
-                return -1;
-        }
-        dbgp_printk("ehci reset done\n");
-
-        /* Claim ownership, but do not enable yet */
-        ctrl = readl(&ehci_debug->control);
-        ctrl |= DBGP_OWNER;
-        ctrl &= ~(DBGP_ENABLED | DBGP_INUSE);
-        writel(ctrl, &ehci_debug->control);
-
-        /* Start the ehci running */
-        cmd = readl(&ehci_regs->command);
-        cmd &= ~(CMD_LRESET | CMD_IAAD | CMD_PSE | CMD_ASE | CMD_RESET);
-        cmd |= CMD_RUN;
-        writel(cmd, &ehci_regs->command);
-
-        /* Ensure everything is routed to the EHCI */
-        writel(FLAG_CF, &ehci_regs->configured_flag);
-
-        /* Wait until the controller is no longer halted */
-        loop = 10;
-        do {
-                status = readl(&ehci_regs->status);
-        } while ((status & STS_HALT) && (--loop > 0));
-
-        if (!loop) {
-                dbgp_printk("ehci can be started\n");
-                return -1;
-        }
-        dbgp_printk("ehci started\n");
-
-        /* Wait for a device to show up in the debug port */
-        ret = ehci_wait_for_port(debug_port);
-        if (ret < 0) {
-                dbgp_printk("No device found in debug port\n");
-                goto next_debug_port;
-        }
-        dbgp_printk("ehci wait for port done\n");
-
-        /* Enable the debug port */
-        ctrl = readl(&ehci_debug->control);
-        ctrl |= DBGP_CLAIM;
-        writel(ctrl, &ehci_debug->control);
-        ctrl = readl(&ehci_debug->control);
-        if ((ctrl & DBGP_CLAIM) != DBGP_CLAIM) {
-                dbgp_printk("No device in debug port\n");
-                writel(ctrl & ~DBGP_CLAIM, &ehci_debug->control);
-                goto err;
-        }
-        dbgp_printk("debug ported enabled\n");
-
-        /* Completely transfer the debug device to the debug controller */
-        portsc = readl(&ehci_regs->port_status[debug_port - 1]);
-        portsc &= ~PORT_PE;
-        writel(portsc, &ehci_regs->port_status[debug_port - 1]);
-
-        dbgp_mdelay(100);
-
-        /* Find the debug device and make it device number 127 */
-        for (devnum = 0; devnum <= 127; devnum++) {
-                ret = dbgp_control_msg(devnum,
-                        USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
-                        USB_REQ_GET_DESCRIPTOR, (USB_DT_DEBUG << 8), 0,
-                        &dbgp_desc, sizeof(dbgp_desc));
-                if (ret > 0)
-                        break;
-        }
-        if (devnum > 127) {
-                dbgp_printk("Could not find attached debug device\n");
-                goto err;
-        }
-        if (ret < 0) {
-                dbgp_printk("Attached device is not a debug device\n");
-                goto err;
-        }
-        dbgp_endpoint_out = dbgp_desc.bDebugOutEndpoint;
-
-        /* Move the device to 127 if it isn't already there */
-        if (devnum != USB_DEBUG_DEVNUM) {
-                ret = dbgp_control_msg(devnum,
-                        USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
-                        USB_REQ_SET_ADDRESS, USB_DEBUG_DEVNUM, 0, NULL, 0);
-                if (ret < 0) {
-                        dbgp_printk("Could not move attached device to %d\n",
-                                USB_DEBUG_DEVNUM);
-                        goto err;
-                }
-                devnum = USB_DEBUG_DEVNUM;
-                dbgp_printk("debug device renamed to 127\n");
-        }
-
-        /* Enable the debug interface */
-        ret = dbgp_control_msg(USB_DEBUG_DEVNUM,
-                USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
-                USB_REQ_SET_FEATURE, USB_DEVICE_DEBUG_MODE, 0, NULL, 0);
-        if (ret < 0) {
-                dbgp_printk(" Could not enable the debug device\n");
-                goto err;
-        }
-        dbgp_printk("debug interface enabled\n");
-
-        /* Perform a small write to get the even/odd data state in sync
-         */
-        ret = dbgp_bulk_write(USB_DEBUG_DEVNUM, dbgp_endpoint_out, " ", 1);
-        if (ret < 0) {
-                dbgp_printk("dbgp_bulk_write failed: %d\n", ret);
-                goto err;
-        }
-        dbgp_printk("small write doned\n");
-
-        return 0;
-err:
-        /* Things didn't work so remove my claim */
-        ctrl = readl(&ehci_debug->control);
-        ctrl &= ~(DBGP_CLAIM | DBGP_OUT);
-        writel(ctrl, &ehci_debug->control);
-        return -1;
-
-next_debug_port:
-        port_map_tried |= (1<<(debug_port - 1));
-        new_debug_port = ((debug_port-1+1)%n_ports) + 1;
-        if (port_map_tried != ((1<<n_ports) - 1)) {
-                set_debug_port(new_debug_port);
-                goto try_next_port;
-        }
-        if (--playtimes) {
-                set_debug_port(new_debug_port);
-                goto try_next_time;
-        }
-
-        return -1;
-}
-
-static int __init early_dbgp_init(char *s)
-{
-        u32 debug_port, bar, offset;
-        u32 bus, slot, func, cap;
-        void __iomem *ehci_bar;
-        u32 dbgp_num;
-        u32 bar_val;
-        char *e;
-        int ret;
-        u8 byte;
-
-        if (!early_pci_allowed())
-                return -1;
-
-        dbgp_num = 0;
-        if (*s)
-                dbgp_num = simple_strtoul(s, &e, 10);
-        dbgp_printk("dbgp_num: %d\n", dbgp_num);
-
-        cap = find_dbgp(dbgp_num, &bus, &slot, &func);
-        if (!cap)
-                return -1;
-
-        dbgp_printk("Found EHCI debug port on %02x:%02x.%1x\n", bus, slot,
-                         func);
-
-        debug_port = read_pci_config(bus, slot, func, cap);
-        bar = (debug_port >> 29) & 0x7;
-        bar = (bar * 4) + 0xc;
-        offset = (debug_port >> 16) & 0xfff;
-        dbgp_printk("bar: %02x offset: %03x\n", bar, offset);
-        if (bar != PCI_BASE_ADDRESS_0) {
-                dbgp_printk("only debug ports on bar 1 handled.\n");
-
-                return -1;
-        }
-
-        bar_val = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0);
-        dbgp_printk("bar_val: %02x offset: %03x\n", bar_val, offset);
-        if (bar_val & ~PCI_BASE_ADDRESS_MEM_MASK) {
-                dbgp_printk("only simple 32bit mmio bars supported\n");
-
-                return -1;
-        }
-
-        /* double check if the mem space is enabled */
-        byte = read_pci_config_byte(bus, slot, func, 0x04);
-        if (!(byte & 0x2)) {
-                byte  |= 0x02;
-                write_pci_config_byte(bus, slot, func, 0x04, byte);
-                dbgp_printk("mmio for ehci enabled\n");
-        }
-
-        /*
-         * FIXME I don't have the bar size so just guess PAGE_SIZE is more
-         * than enough.  1K is the biggest I have seen.
-         */
-        set_fixmap_nocache(FIX_DBGP_BASE, bar_val & PAGE_MASK);
-        ehci_bar = (void __iomem *)__fix_to_virt(FIX_DBGP_BASE);
-        ehci_bar += bar_val & ~PAGE_MASK;
-        dbgp_printk("ehci_bar: %p\n", ehci_bar);
-
-        ehci_caps  = ehci_bar;
-        ehci_regs  = ehci_bar + HC_LENGTH(readl(&ehci_caps->hc_capbase));
-        ehci_debug = ehci_bar + offset;
-        ehci_dev.bus = bus;
-        ehci_dev.slot = slot;
-        ehci_dev.func = func;
-
-        detect_set_debug_port();
-
-        ret = ehci_setup();
-        if (ret < 0) {
-                dbgp_printk("ehci_setup failed\n");
-                ehci_debug = NULL;
-
-                return -1;
-        }
-
-        return 0;
-}
-
-static void early_dbgp_write(struct console *con, const char *str, u32 n)
-{
-        int chunk, ret;
-
-        if (!ehci_debug)
-                return;
-        while (n > 0) {
-                chunk = n;
-                if (chunk > DBGP_MAX_PACKET)
-                        chunk = DBGP_MAX_PACKET;
-                ret = dbgp_bulk_write(USB_DEBUG_DEVNUM,
-                        dbgp_endpoint_out, str, chunk);
-                str += chunk;
-                n -= chunk;
-        }
-}
-
-static struct console early_dbgp_console = {
-        .name =         "earlydbg",
-        .write =        early_dbgp_write,
-        .flags =        CON_PRINTBUFFER,
-        .index =        -1,
-};
-#endif
-
 /* Direct interface for emergencies */
 static struct console *early_console = &early_vga_console;
 static int __initdata early_console_initialized;
@@ -891,10 +176,19 @@ asmlinkage void early_printk(const char *fmt, ...)
         va_end(ap);
 }
 
+static inline void early_console_register(struct console *con, int keep_early)
+{
+        early_console = con;
+        if (keep_early)
+                early_console->flags &= ~CON_BOOT;
+        else
+                early_console->flags |= CON_BOOT;
+        register_console(early_console);
+}
 
 static int __init setup_early_printk(char *buf)
 {
-        int keep_early;
+        int keep;
 
         if (!buf)
                 return 0;
@@ -903,42 +197,34 @@ static int __init setup_early_printk(char *buf)
                 return 0;
         early_console_initialized = 1;
 
-        keep_early = (strstr(buf, "keep") != NULL);
-
-        if (!strncmp(buf, "serial", 6)) {
-                early_serial_init(buf + 6);
-                early_console = &early_serial_console;
-        } else if (!strncmp(buf, "ttyS", 4)) {
-                early_serial_init(buf);
-                early_console = &early_serial_console;
-        } else if (!strncmp(buf, "vga", 3)
-                && boot_params.screen_info.orig_video_isVGA == 1) {
-                max_xpos = boot_params.screen_info.orig_video_cols;
-                max_ypos = boot_params.screen_info.orig_video_lines;
-                current_ypos = boot_params.screen_info.orig_y;
-                early_console = &early_vga_console;
+        keep = (strstr(buf, "keep") != NULL);
+
+        while (*buf != '\0') {
+                if (!strncmp(buf, "serial", 6)) {
+                        early_serial_init(buf + 6);
+                        early_console_register(&early_serial_console, keep);
+                }
+                if (!strncmp(buf, "ttyS", 4)) {
+                        early_serial_init(buf + 4);
+                        early_console_register(&early_serial_console, keep);
+                }
+                if (!strncmp(buf, "vga", 3) &&
+                    boot_params.screen_info.orig_video_isVGA == 1) {
+                        max_xpos = boot_params.screen_info.orig_video_cols;
+                        max_ypos = boot_params.screen_info.orig_video_lines;
+                        current_ypos = boot_params.screen_info.orig_y;
+                        early_console_register(&early_vga_console, keep);
+                }
 #ifdef CONFIG_EARLY_PRINTK_DBGP
-        } else if (!strncmp(buf, "dbgp", 4)) {
-                if (early_dbgp_init(buf+4) < 0)
-                        return 0;
-                early_console = &early_dbgp_console;
-                /*
-                 * usb subsys will reset ehci controller, so don't keep
-                 * that early console
-                 */
-                keep_early = 0;
+                if (!strncmp(buf, "dbgp", 4) && !early_dbgp_init(buf + 4))
+                        early_console_register(&early_dbgp_console, keep);
 #endif
 #ifdef CONFIG_HVC_XEN
-        } else if (!strncmp(buf, "xen", 3)) {
-                early_console = &xenboot_console;
+                if (!strncmp(buf, "xen", 3))
+                        early_console_register(&xenboot_console, keep);
 #endif
+                buf++;
         }
-
-        if (keep_early)
-                early_console->flags &= ~CON_BOOT;
-        else
-                early_console->flags |= CON_BOOT;
-        register_console(early_console);
         return 0;
 }
 
diff --git a/arch/x86/kernel/efi.c b/arch/x86/kernel/efi.c
index fe26ba3e3451..ad5bd988fb79 100644
--- a/arch/x86/kernel/efi.c
+++ b/arch/x86/kernel/efi.c
@@ -42,6 +42,7 @@
 #include <asm/time.h>
 #include <asm/cacheflush.h>
 #include <asm/tlbflush.h>
+#include <asm/x86_init.h>
 
 #define EFI_DEBUG       1
 #define PFX             "EFI: "
@@ -453,6 +454,9 @@ void __init efi_init(void)
         if (add_efi_memmap)
                 do_add_efi_memmap();
 
+        x86_platform.get_wallclock = efi_get_time;
+        x86_platform.set_wallclock = efi_set_rtc_mmss;
+
         /* Setup for EFI runtime service */
         reboot_type = BOOT_EFI;
 
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
index d59fe323807e..b5c061f8f358 100644
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -536,20 +536,13 @@ sysret_signal:
         bt $TIF_SYSCALL_AUDIT,%edx
         jc sysret_audit
 #endif
-        /* edx: work flags (arg3) */
-        leaq -ARGOFFSET(%rsp),%rdi # &pt_regs -> arg1
-        xorl %esi,%esi # oldset -> arg2
-        SAVE_REST
-        FIXUP_TOP_OF_STACK %r11
-        call do_notify_resume
-        RESTORE_TOP_OF_STACK %r11
-        RESTORE_REST
-        movl $_TIF_WORK_MASK,%edi
-        /* Use IRET because user could have changed frame. This
-           works because ptregscall_common has called FIXUP_TOP_OF_STACK. */
-        DISABLE_INTERRUPTS(CLBR_NONE)
-        TRACE_IRQS_OFF
-        jmp int_with_check
+        /*
+         * We have a signal, or exit tracing or single-step.
+         * These all wind up with the iret return path anyway,
+         * so just join that path right now.
+         */
+        FIXUP_TOP_OF_STACK %r11, -ARGOFFSET
+        jmp int_check_syscall_exit_work
 
 badsys:
         movq $-ENOSYS,RAX-ARGOFFSET(%rsp)
@@ -654,6 +647,7 @@ int_careful:
 int_very_careful:
         TRACE_IRQS_ON
         ENABLE_INTERRUPTS(CLBR_NONE)
+int_check_syscall_exit_work:
         SAVE_REST
         /* Check for syscall exit trace */
         testl $_TIF_WORK_SYSCALL_EXIT,%edx
@@ -1021,7 +1015,7 @@ apicinterrupt ERROR_APIC_VECTOR \
 apicinterrupt SPURIOUS_APIC_VECTOR \
         spurious_interrupt smp_spurious_interrupt
 
-#ifdef CONFIG_PERF_COUNTERS
+#ifdef CONFIG_PERF_EVENTS
 apicinterrupt LOCAL_PENDING_VECTOR \
         perf_pending_interrupt smp_perf_pending_interrupt
 #endif
diff --git a/arch/x86/kernel/head32.c b/arch/x86/kernel/head32.c
index 3f8579f8d42c..4f8e2507e8f3 100644
--- a/arch/x86/kernel/head32.c
+++ b/arch/x86/kernel/head32.c
@@ -11,8 +11,21 @@
 #include <asm/setup.h>
 #include <asm/sections.h>
 #include <asm/e820.h>
-#include <asm/bios_ebda.h>
+#include <asm/page.h>
 #include <asm/trampoline.h>
+#include <asm/apic.h>
+#include <asm/io_apic.h>
+#include <asm/bios_ebda.h>
+
+static void __init i386_default_early_setup(void)
+{
+        /* Initilize 32bit specific setup functions */
+        x86_init.resources.probe_roms = probe_roms;
+        x86_init.resources.reserve_resources = i386_reserve_resources;
+        x86_init.mpparse.setup_ioapic_ids = setup_ioapic_ids_from_mpc;
+
+        reserve_ebda_region();
+}
 
 void __init i386_start_kernel(void)
 {
@@ -29,7 +42,16 @@ void __init i386_start_kernel(void)
                 reserve_early(ramdisk_image, ramdisk_end, "RAMDISK");
         }
 #endif
-        reserve_ebda_region();
+
+        /* Call the subarch specific early setup function */
+        switch (boot_params.hdr.hardware_subarch) {
+        case X86_SUBARCH_MRST:
+                x86_mrst_early_setup();
+                break;
+        default:
+                i386_default_early_setup();
+                break;
+        }
 
         /*
          * At this point everything still needed from the boot loader
diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c
index 70eaa852c732..0b06cd778fd9 100644
--- a/arch/x86/kernel/head64.c
+++ b/arch/x86/kernel/head64.c
@@ -23,8 +23,8 @@
 #include <asm/sections.h>
 #include <asm/kdebug.h>
 #include <asm/e820.h>
-#include <asm/bios_ebda.h>
 #include <asm/trampoline.h>
+#include <asm/bios_ebda.h>
 
 static void __init zap_identity_mappings(void)
 {
diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
index 7ffec6b3b331..218aad7ee76e 100644
--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -157,6 +157,7 @@ subarch_entries:
         .long default_entry             /* normal x86/PC */
         .long lguest_entry              /* lguest hypervisor */
         .long xen_entry                 /* Xen hypervisor */
+        .long default_entry             /* Moorestown MID */
 num_subarch_entries = (. - subarch_entries) / 4
 .previous
 #endif /* CONFIG_PARAVIRT */
@@ -607,7 +608,7 @@ ENTRY(initial_code)
 /*
  * BSS section
  */
-.section ".bss.page_aligned","wa"
+__PAGE_ALIGNED_BSS
         .align PAGE_SIZE_asm
 #ifdef CONFIG_X86_PAE
 swapper_pg_pmd:
@@ -625,7 +626,7 @@ ENTRY(empty_zero_page)
  * This starts the data section.
  */
 #ifdef CONFIG_X86_PAE
-.section ".data.page_aligned","wa"
+__PAGE_ALIGNED_DATA
         /* Page-aligned for the benefit of paravirt? */
         .align PAGE_SIZE_asm
 ENTRY(swapper_pg_dir)
diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
index fa54f78e2a05..d0bc0a13a437 100644
--- a/arch/x86/kernel/head_64.S
+++ b/arch/x86/kernel/head_64.S
@@ -418,7 +418,7 @@ ENTRY(phys_base)
 ENTRY(idt_table)
         .skip IDT_ENTRIES * 16
 
-        .section .bss.page_aligned, "aw", @nobits
+        __PAGE_ALIGNED_BSS
         .align PAGE_SIZE
 ENTRY(empty_zero_page)
         .skip PAGE_SIZE
diff --git a/arch/x86/kernel/i8253.c b/arch/x86/kernel/i8253.c
index 5cf36c053ac4..23c167925a5c 100644
--- a/arch/x86/kernel/i8253.c
+++ b/arch/x86/kernel/i8253.c
@@ -19,12 +19,6 @@
 DEFINE_SPINLOCK(i8253_lock);
 EXPORT_SYMBOL(i8253_lock);
 
-#ifdef CONFIG_X86_32
-static void pit_disable_clocksource(void);
-#else
-static inline void pit_disable_clocksource(void) { }
-#endif
-
 /*
  * HPET replaces the PIT, when enabled. So we need to know, which of
  * the two timers is used
@@ -57,12 +51,10 @@ static void init_pit_timer(enum clock_event_mode mode,
                         outb_pit(0, PIT_CH0);
                         outb_pit(0, PIT_CH0);
                 }
-                pit_disable_clocksource();
                 break;
 
         case CLOCK_EVT_MODE_ONESHOT:
                 /* One shot setup */
-                pit_disable_clocksource();
                 outb_pit(0x38, PIT_MODE);
                 break;
 
@@ -200,17 +192,6 @@ static struct clocksource pit_cs = {
         .shift          = 20,
 };
 
-static void pit_disable_clocksource(void)
-{
-        /*
-         * Use mult to check whether it is registered or not
-         */
-        if (pit_cs.mult) {
-                clocksource_unregister(&pit_cs);
-                pit_cs.mult = 0;
-        }
-}
-
 static int __init init_pit_clocksource(void)
 {
          /*
diff --git a/arch/x86/kernel/init_task.c b/arch/x86/kernel/init_task.c
index 270ff83efc11..3a54dcb9cd0e 100644
--- a/arch/x86/kernel/init_task.c
+++ b/arch/x86/kernel/init_task.c
@@ -20,9 +20,8 @@ static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
  * way process stacks are handled. This is done by having a special
  * "init_task" linker map entry..
  */
-union thread_union init_thread_union
-        __attribute__((__section__(".data.init_task"))) =
-                { INIT_THREAD_INFO(init_task) };
+union thread_union init_thread_union __init_task_data =
+        { INIT_THREAD_INFO(init_task) };
 
 /*
  * Initial task structure.
diff --git a/arch/x86/kernel/irqinit.c b/arch/x86/kernel/irqinit.c
index ccf8ab54f31a..40f30773fb29 100644
--- a/arch/x86/kernel/irqinit.c
+++ b/arch/x86/kernel/irqinit.c
@@ -116,7 +116,7 @@ int vector_used_by_percpu_irq(unsigned int vector)
         return 0;
 }
 
-static void __init init_ISA_irqs(void)
+void __init init_ISA_irqs(void)
 {
         int i;
 
@@ -140,8 +140,10 @@ static void __init init_ISA_irqs(void)
         }
 }
 
-/* Overridden in paravirt.c */
-void init_IRQ(void) __attribute__((weak, alias("native_init_IRQ")));
+void __init init_IRQ(void)
+{
+        x86_init.irqs.intr_init();
+}
 
 static void __init smp_intr_init(void)
 {
@@ -206,39 +208,19 @@ static void __init apic_intr_init(void)
         alloc_intr_gate(ERROR_APIC_VECTOR, error_interrupt);
 
         /* Performance monitoring interrupts: */
-# ifdef CONFIG_PERF_COUNTERS
+# ifdef CONFIG_PERF_EVENTS
         alloc_intr_gate(LOCAL_PENDING_VECTOR, perf_pending_interrupt);
 # endif
 
 #endif
 }
 
-/**
- * x86_quirk_pre_intr_init - initialisation prior to setting up interrupt vectors
- *
- * Description:
- *      Perform any necessary interrupt initialisation prior to setting up
- *      the "ordinary" interrupt call gates.  For legacy reasons, the ISA
- *      interrupts should be initialised here if the machine emulates a PC
- *      in any way.
- **/
-static void __init x86_quirk_pre_intr_init(void)
-{
-#ifdef CONFIG_X86_32
-        if (x86_quirks->arch_pre_intr_init) {
-                if (x86_quirks->arch_pre_intr_init())
-                        return;
-        }
-#endif
-        init_ISA_irqs();
-}
-
 void __init native_init_IRQ(void)
 {
         int i;
 
         /* Execute any quirks before the call gates are initialised: */
-        x86_quirk_pre_intr_init();
+        x86_init.irqs.pre_vector_init();
 
         apic_intr_init();
 
@@ -258,12 +240,6 @@ void __init native_init_IRQ(void)
 
 #ifdef CONFIG_X86_32
         /*
-         * Call quirks after call gates are initialised (usually add in
-         * the architecture specific gates):
-         */
-        x86_quirk_intr_init();
-
-        /*
          * External FPU? Set up irq13 if so, for
          * original braindamaged IBM FERR coupling.
          */
diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c
index e5efcdcca31b..feaeb0d3aa4f 100644
--- a/arch/x86/kernel/kvmclock.c
+++ b/arch/x86/kernel/kvmclock.c
@@ -22,6 +22,8 @@
 #include <asm/msr.h>
 #include <asm/apic.h>
 #include <linux/percpu.h>
+
+#include <asm/x86_init.h>
 #include <asm/reboot.h>
 
 #define KVM_SCALE 22
@@ -182,12 +184,13 @@ void __init kvmclock_init(void)
         if (kvmclock && kvm_para_has_feature(KVM_FEATURE_CLOCKSOURCE)) {
                 if (kvm_register_clock("boot clock"))
                         return;
-                pv_time_ops.get_wallclock = kvm_get_wallclock;
-                pv_time_ops.set_wallclock = kvm_set_wallclock;
                 pv_time_ops.sched_clock = kvm_clock_read;
-                pv_time_ops.get_tsc_khz = kvm_get_tsc_khz;
+                x86_platform.calibrate_tsc = kvm_get_tsc_khz;
+                x86_platform.get_wallclock = kvm_get_wallclock;
+                x86_platform.set_wallclock = kvm_set_wallclock;
 #ifdef CONFIG_X86_LOCAL_APIC
-                pv_apic_ops.setup_secondary_clock = kvm_setup_secondary_clock;
+                x86_cpuinit.setup_percpu_clockev =
+                        kvm_setup_secondary_clock;
 #endif
 #ifdef CONFIG_SMP
                 smp_ops.smp_prepare_boot_cpu = kvm_smp_prepare_boot_cpu;
diff --git a/arch/x86/kernel/ldt.c b/arch/x86/kernel/ldt.c
index 71f1d99a635d..ec6ef60cbd17 100644
--- a/arch/x86/kernel/ldt.c
+++ b/arch/x86/kernel/ldt.c
@@ -67,8 +67,8 @@ static int alloc_ldt(mm_context_t *pc, int mincount, int reload)
 #ifdef CONFIG_SMP
                 preempt_disable();
                 load_LDT(pc);
-                if (!cpus_equal(current->mm->cpu_vm_mask,
-                                cpumask_of_cpu(smp_processor_id())))
+                if (!cpumask_equal(mm_cpumask(current->mm),
+                                   cpumask_of(smp_processor_id())))
                         smp_call_function(flush_ldt, current->mm, 1);
                 preempt_enable();
 #else
diff --git a/arch/x86/kernel/microcode_core.c b/arch/x86/kernel/microcode_core.c
index 9371448290ac..378e9a8f1bf8 100644
--- a/arch/x86/kernel/microcode_core.c
+++ b/arch/x86/kernel/microcode_core.c
@@ -210,8 +210,8 @@ static ssize_t microcode_write(struct file *file, const char __user *buf,
 {
         ssize_t ret = -EINVAL;
 
-        if ((len >> PAGE_SHIFT) > num_physpages) {
-                pr_err("microcode: too much data (max %ld pages)\n", num_physpages);
+        if ((len >> PAGE_SHIFT) > totalram_pages) {
+                pr_err("microcode: too much data (max %ld pages)\n", totalram_pages);
                 return ret;
         }
 
@@ -236,7 +236,7 @@ static const struct file_operations microcode_fops = {
 static struct miscdevice microcode_dev = {
         .minor                  = MICROCODE_MINOR,
         .name                   = "microcode",
-        .devnode                = "cpu/microcode",
+        .nodename               = "cpu/microcode",
         .fops                   = &microcode_fops,
 };
 
diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c
index fcd513bf2846..5be95ef4ffec 100644
--- a/arch/x86/kernel/mpparse.c
+++ b/arch/x86/kernel/mpparse.c
@@ -45,6 +45,11 @@ static int __init mpf_checksum(unsigned char *mp, int len)
         return sum & 0xFF;
 }
 
+int __init default_mpc_apic_id(struct mpc_cpu *m)
+{
+        return m->apicid;
+}
+
 static void __init MP_processor_info(struct mpc_cpu *m)
 {
         int apicid;
@@ -55,10 +60,7 @@ static void __init MP_processor_info(struct mpc_cpu *m)
                 return;
         }
 
-        if (x86_quirks->mpc_apic_id)
-                apicid = x86_quirks->mpc_apic_id(m);
-        else
-                apicid = m->apicid;
+        apicid = x86_init.mpparse.mpc_apic_id(m);
 
         if (m->cpuflag & CPU_BOOTPROCESSOR) {
                 bootup_cpu = " (Bootup-CPU)";
@@ -70,16 +72,18 @@ static void __init MP_processor_info(struct mpc_cpu *m)
 }
 
 #ifdef CONFIG_X86_IO_APIC
-static void __init MP_bus_info(struct mpc_bus *m)
+void __init default_mpc_oem_bus_info(struct mpc_bus *m, char *str)
 {
-        char str[7];
         memcpy(str, m->bustype, 6);
         str[6] = 0;
+        apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str);
+}
 
-        if (x86_quirks->mpc_oem_bus_info)
-                x86_quirks->mpc_oem_bus_info(m, str);
-        else
-                apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str);
+static void __init MP_bus_info(struct mpc_bus *m)
+{
+        char str[7];
+
+        x86_init.mpparse.mpc_oem_bus_info(m, str);
 
 #if MAX_MP_BUSSES < 256
         if (m->busid >= MAX_MP_BUSSES) {
@@ -96,8 +100,8 @@ static void __init MP_bus_info(struct mpc_bus *m)
                 mp_bus_id_to_type[m->busid] = MP_BUS_ISA;
 #endif
         } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {
-                if (x86_quirks->mpc_oem_pci_bus)
-                        x86_quirks->mpc_oem_pci_bus(m);
+                if (x86_init.mpparse.mpc_oem_pci_bus)
+                        x86_init.mpparse.mpc_oem_pci_bus(m);
 
                 clear_bit(m->busid, mp_bus_not_pci);
 #if defined(CONFIG_EISA) || defined(CONFIG_MCA)
@@ -291,6 +295,8 @@ static void __init smp_dump_mptable(struct mpc_table *mpc, unsigned char *mpt)
                         1, mpc, mpc->length, 1);
 }
 
+void __init default_smp_read_mpc_oem(struct mpc_table *mpc) { }
+
 static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
 {
         char str[16];
@@ -312,16 +318,13 @@ static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
         if (early)
                 return 1;
 
-        if (mpc->oemptr && x86_quirks->smp_read_mpc_oem) {
-                struct mpc_oemtable *oem_table = (void *)(long)mpc->oemptr;
-                x86_quirks->smp_read_mpc_oem(oem_table, mpc->oemsize);
-        }
+        if (mpc->oemptr)
+                x86_init.mpparse.smp_read_mpc_oem(mpc);
 
         /*
          *      Now process the configuration blocks.
          */
-        if (x86_quirks->mpc_record)
-                *x86_quirks->mpc_record = 0;
+        x86_init.mpparse.mpc_record(0);
 
         while (count < mpc->length) {
                 switch (*mpt) {
@@ -353,8 +356,7 @@ static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
                         count = mpc->length;
                         break;
                 }
-                if (x86_quirks->mpc_record)
-                        (*x86_quirks->mpc_record)++;
+                x86_init.mpparse.mpc_record(1);
         }
 
 #ifdef CONFIG_X86_BIGSMP
@@ -608,7 +610,7 @@ static int __init check_physptr(struct mpf_intel *mpf, unsigned int early)
 /*
  * Scan the memory blocks for an SMP configuration block.
  */
-static void __init __get_smp_config(unsigned int early)
+void __init default_get_smp_config(unsigned int early)
 {
         struct mpf_intel *mpf = mpf_found;
 
@@ -625,11 +627,6 @@ static void __init __get_smp_config(unsigned int early)
         if (acpi_lapic && acpi_ioapic)
                 return;
 
-        if (x86_quirks->mach_get_smp_config) {
-                if (x86_quirks->mach_get_smp_config(early))
-                        return;
-        }
-
         printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
                mpf->specification);
 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
@@ -670,16 +667,6 @@ static void __init __get_smp_config(unsigned int early)
          */
 }
 
-void __init early_get_smp_config(void)
-{
-        __get_smp_config(1);
-}
-
-void __init get_smp_config(void)
-{
-        __get_smp_config(0);
-}
-
 static void __init smp_reserve_bootmem(struct mpf_intel *mpf)
 {
         unsigned long size = get_mpc_size(mpf->physptr);
@@ -745,14 +732,10 @@ static int __init smp_scan_config(unsigned long base, unsigned long length,
         return 0;
 }
 
-static void __init __find_smp_config(unsigned int reserve)
+void __init default_find_smp_config(unsigned int reserve)
 {
         unsigned int address;
 
-        if (x86_quirks->mach_find_smp_config) {
-                if (x86_quirks->mach_find_smp_config(reserve))
-                        return;
-        }
         /*
          * FIXME: Linux assumes you have 640K of base ram..
          * this continues the error...
@@ -787,16 +770,6 @@ static void __init __find_smp_config(unsigned int reserve)
                 smp_scan_config(address, 0x400, reserve);
 }
 
-void __init early_find_smp_config(void)
-{
-        __find_smp_config(0);
-}
-
-void __init find_smp_config(void)
-{
-        __find_smp_config(1);
-}
-
 #ifdef CONFIG_X86_IO_APIC
 static u8 __initdata irq_used[MAX_IRQ_SOURCES];
 
diff --git a/arch/x86/kernel/mrst.c b/arch/x86/kernel/mrst.c
new file mode 100644
index 000000000000..3b7078abc871
--- /dev/null
+++ b/arch/x86/kernel/mrst.c
@@ -0,0 +1,24 @@
+/*
+ * mrst.c: Intel Moorestown platform specific setup code
+ *
+ * (C) Copyright 2008 Intel Corporation
+ * Author: Jacob Pan (jacob.jun.pan@intel.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2
+ * of the License.
+ */
+#include <linux/init.h>
+
+#include <asm/setup.h>
+
+/*
+ * Moorestown specific x86_init function overrides and early setup
+ * calls.
+ */
+void __init x86_mrst_early_setup(void)
+{
+        x86_init.resources.probe_roms = x86_init_noop;
+        x86_init.resources.reserve_resources = x86_init_noop;
+}
diff --git a/arch/x86/kernel/msr.c b/arch/x86/kernel/msr.c
index 7dd950094178..6a3cefc7dda1 100644
--- a/arch/x86/kernel/msr.c
+++ b/arch/x86/kernel/msr.c
@@ -241,7 +241,7 @@ static struct notifier_block __refdata msr_class_cpu_notifier = {
         .notifier_call = msr_class_cpu_callback,
 };
 
-static char *msr_nodename(struct device *dev)
+static char *msr_devnode(struct device *dev, mode_t *mode)
 {
         return kasprintf(GFP_KERNEL, "cpu/%u/msr", MINOR(dev->devt));
 }
@@ -262,7 +262,7 @@ static int __init msr_init(void)
                 err = PTR_ERR(msr_class);
                 goto out_chrdev;
         }
-        msr_class->nodename = msr_nodename;
+        msr_class->devnode = msr_devnode;
         for_each_online_cpu(i) {
                 err = msr_device_create(i);
                 if (err != 0)
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
index f5b0b4a01fb2..1b1739d16310 100644
--- a/arch/x86/kernel/paravirt.c
+++ b/arch/x86/kernel/paravirt.c
@@ -54,17 +54,12 @@ u64 _paravirt_ident_64(u64 x)
         return x;
 }
 
-static void __init default_banner(void)
+void __init default_banner(void)
 {
         printk(KERN_INFO "Booting paravirtualized kernel on %s\n",
                pv_info.name);
 }
 
-char *memory_setup(void)
-{
-        return pv_init_ops.memory_setup();
-}
-
 /* Simple instruction patching code. */
 #define DEF_NATIVE(ops, name, code)                                     \
         extern const char start_##ops##_##name[], end_##ops##_##name[]; \
@@ -188,11 +183,6 @@ unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
         return insn_len;
 }
 
-void init_IRQ(void)
-{
-        pv_irq_ops.init_IRQ();
-}
-
 static void native_flush_tlb(void)
 {
         __native_flush_tlb();
@@ -218,13 +208,6 @@ extern void native_irq_enable_sysexit(void);
 extern void native_usergs_sysret32(void);
 extern void native_usergs_sysret64(void);
 
-static int __init print_banner(void)
-{
-        pv_init_ops.banner();
-        return 0;
-}
-core_initcall(print_banner);
-
 static struct resource reserve_ioports = {
         .start = 0,
         .end = IO_SPACE_LIMIT,
@@ -320,21 +303,13 @@ struct pv_info pv_info = {
 
 struct pv_init_ops pv_init_ops = {
         .patch = native_patch,
-        .banner = default_banner,
-        .arch_setup = paravirt_nop,
-        .memory_setup = machine_specific_memory_setup,
 };
 
 struct pv_time_ops pv_time_ops = {
-        .time_init = hpet_time_init,
-        .get_wallclock = native_get_wallclock,
-        .set_wallclock = native_set_wallclock,
         .sched_clock = native_sched_clock,
-        .get_tsc_khz = native_calibrate_tsc,
 };
 
 struct pv_irq_ops pv_irq_ops = {
-        .init_IRQ = native_init_IRQ,
         .save_fl = __PV_IS_CALLEE_SAVE(native_save_fl),
         .restore_fl = __PV_IS_CALLEE_SAVE(native_restore_fl),
         .irq_disable = __PV_IS_CALLEE_SAVE(native_irq_disable),
@@ -409,8 +384,6 @@ struct pv_cpu_ops pv_cpu_ops = {
 
 struct pv_apic_ops pv_apic_ops = {
 #ifdef CONFIG_X86_LOCAL_APIC
-        .setup_boot_clock = setup_boot_APIC_clock,
-        .setup_secondary_clock = setup_secondary_APIC_clock,
         .startup_ipi_hook = paravirt_nop,
 #endif
 };
@@ -424,13 +397,6 @@ struct pv_apic_ops pv_apic_ops = {
 #endif
 
 struct pv_mmu_ops pv_mmu_ops = {
-#ifndef CONFIG_X86_64
-        .pagetable_setup_start = native_pagetable_setup_start,
-        .pagetable_setup_done = native_pagetable_setup_done,
-#else
-        .pagetable_setup_start = paravirt_nop,
-        .pagetable_setup_done = paravirt_nop,
-#endif
 
         .read_cr2 = native_read_cr2,
         .write_cr2 = native_write_cr2,
diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c
index e8a35016115f..aaa6b7839f1e 100644
--- a/arch/x86/kernel/pci-swiotlb.c
+++ b/arch/x86/kernel/pci-swiotlb.c
@@ -46,9 +46,8 @@ void __init pci_swiotlb_init(void)
 {
         /* don't initialize swiotlb if iommu=off (no_iommu=1) */
 #ifdef CONFIG_X86_64
-        if ((!iommu_detected && !no_iommu && max_pfn > MAX_DMA32_PFN) ||
-                iommu_pass_through)
-               swiotlb = 1;
+        if ((!iommu_detected && !no_iommu && max_pfn > MAX_DMA32_PFN))
+                swiotlb = 1;
 #endif
         if (swiotlb_force)
                 swiotlb = 1;
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 071166a4ba83..5284cd2b5776 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -9,7 +9,7 @@
 #include <linux/pm.h>
 #include <linux/clockchips.h>
 #include <linux/random.h>
-#include <trace/power.h>
+#include <trace/events/power.h>
 #include <asm/system.h>
 #include <asm/apic.h>
 #include <asm/syscalls.h>
@@ -25,9 +25,6 @@ EXPORT_SYMBOL(idle_nomwait);
 
 struct kmem_cache *task_xstate_cachep;
 
-DEFINE_TRACE(power_start);
-DEFINE_TRACE(power_end);
-
 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
 {
         *dst = *src;
@@ -299,9 +296,7 @@ static inline int hlt_use_halt(void)
 void default_idle(void)
 {
         if (hlt_use_halt()) {
-                struct power_trace it;
-
-                trace_power_start(&it, POWER_CSTATE, 1);
+                trace_power_start(POWER_CSTATE, 1);
                 current_thread_info()->status &= ~TS_POLLING;
                 /*
                  * TS_POLLING-cleared state must be visible before we
@@ -314,7 +309,6 @@ void default_idle(void)
                 else
                         local_irq_enable();
                 current_thread_info()->status |= TS_POLLING;
-                trace_power_end(&it);
         } else {
                 local_irq_enable();
                 /* loop is done by the caller */
@@ -372,9 +366,7 @@ EXPORT_SYMBOL_GPL(cpu_idle_wait);
  */
 void mwait_idle_with_hints(unsigned long ax, unsigned long cx)
 {
-        struct power_trace it;
-
-        trace_power_start(&it, POWER_CSTATE, (ax>>4)+1);
+        trace_power_start(POWER_CSTATE, (ax>>4)+1);
         if (!need_resched()) {
                 if (cpu_has(&current_cpu_data, X86_FEATURE_CLFLUSH_MONITOR))
                         clflush((void *)&current_thread_info()->flags);
@@ -384,15 +376,13 @@ void mwait_idle_with_hints(unsigned long ax, unsigned long cx)
                 if (!need_resched())
                         __mwait(ax, cx);
         }
-        trace_power_end(&it);
 }
 
 /* Default MONITOR/MWAIT with no hints, used for default C1 state */
 static void mwait_idle(void)
 {
-        struct power_trace it;
         if (!need_resched()) {
-                trace_power_start(&it, POWER_CSTATE, 1);
+                trace_power_start(POWER_CSTATE, 1);
                 if (cpu_has(&current_cpu_data, X86_FEATURE_CLFLUSH_MONITOR))
                         clflush((void *)&current_thread_info()->flags);
 
@@ -402,7 +392,6 @@ static void mwait_idle(void)
                         __sti_mwait(0, 0);
                 else
                         local_irq_enable();
-                trace_power_end(&it);
         } else
                 local_irq_enable();
 }
@@ -414,13 +403,11 @@ static void mwait_idle(void)
  */
 static void poll_idle(void)
 {
-        struct power_trace it;
-
-        trace_power_start(&it, POWER_CSTATE, 0);
+        trace_power_start(POWER_CSTATE, 0);
         local_irq_enable();
         while (!need_resched())
                 cpu_relax();
-        trace_power_end(&it);
+        trace_power_end(0);
 }
 
 /*
@@ -568,10 +555,8 @@ void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
 void __init init_c1e_mask(void)
 {
         /* If we're using c1e_idle, we need to allocate c1e_mask. */
-        if (pm_idle == c1e_idle) {
-                alloc_cpumask_var(&c1e_mask, GFP_KERNEL);
-                cpumask_clear(c1e_mask);
-        }
+        if (pm_idle == c1e_idle)
+                zalloc_cpumask_var(&c1e_mask, GFP_KERNEL);
 }
 
 static int __init idle_setup(char *str)
diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c
index 8d7d5c9c1be3..7b058a2dc66a 100644
--- a/arch/x86/kernel/ptrace.c
+++ b/arch/x86/kernel/ptrace.c
@@ -325,16 +325,6 @@ static int putreg(struct task_struct *child,
                 return set_flags(child, value);
 
 #ifdef CONFIG_X86_64
-        /*
-         * Orig_ax is really just a flag with small positive and
-         * negative values, so make sure to always sign-extend it
-         * from 32 bits so that it works correctly regardless of
-         * whether we come from a 32-bit environment or not.
-         */
-        case offsetof(struct user_regs_struct, orig_ax):
-                value = (long) (s32) value;
-                break;
-
         case offsetof(struct user_regs_struct,fs_base):
                 if (value >= TASK_SIZE_OF(child))
                         return -EIO;
@@ -1126,10 +1116,15 @@ static int putreg32(struct task_struct *child, unsigned regno, u32 value)
 
         case offsetof(struct user32, regs.orig_eax):
                 /*
-                 * Sign-extend the value so that orig_eax = -1
-                 * causes (long)orig_ax < 0 tests to fire correctly.
+                 * A 32-bit debugger setting orig_eax means to restore
+                 * the state of the task restarting a 32-bit syscall.
+                 * Make sure we interpret the -ERESTART* codes correctly
+                 * in case the task is not actually still sitting at the
+                 * exit from a 32-bit syscall with TS_COMPAT still set.
                  */
-                regs->orig_ax = (long) (s32) value;
+                regs->orig_ax = value;
+                if (syscall_get_nr(child, regs) >= 0)
+                        task_thread_info(child)->status |= TS_COMPAT;
                 break;
 
         case offsetof(struct user32, regs.eflags):
diff --git a/arch/x86/kernel/rtc.c b/arch/x86/kernel/rtc.c
index 5d465b207e72..1cfbbfc3ae26 100644
--- a/arch/x86/kernel/rtc.c
+++ b/arch/x86/kernel/rtc.c
@@ -8,6 +8,7 @@
 #include <linux/pnp.h>
 
 #include <asm/vsyscall.h>
+#include <asm/x86_init.h>
 #include <asm/time.h>
 
 #ifdef CONFIG_X86_32
@@ -165,33 +166,29 @@ void rtc_cmos_write(unsigned char val, unsigned char addr)
 }
 EXPORT_SYMBOL(rtc_cmos_write);
 
-static int set_rtc_mmss(unsigned long nowtime)
+int update_persistent_clock(struct timespec now)
 {
         unsigned long flags;
         int retval;
 
         spin_lock_irqsave(&rtc_lock, flags);
-        retval = set_wallclock(nowtime);
+        retval = x86_platform.set_wallclock(now.tv_sec);
         spin_unlock_irqrestore(&rtc_lock, flags);
 
         return retval;
 }
 
 /* not static: needed by APM */
-unsigned long read_persistent_clock(void)
+void read_persistent_clock(struct timespec *ts)
 {
         unsigned long retval, flags;
 
         spin_lock_irqsave(&rtc_lock, flags);
-        retval = get_wallclock();
+        retval = x86_platform.get_wallclock();
         spin_unlock_irqrestore(&rtc_lock, flags);
 
-        return retval;
-}
-
-int update_persistent_clock(struct timespec now)
-{
-        return set_rtc_mmss(now.tv_sec);
+        ts->tv_sec = retval;
+        ts->tv_nsec = 0;
 }
 
 unsigned long long native_read_tsc(void)
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 19f15c4076fb..e09f0e2c14b5 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -27,6 +27,7 @@
 #include <linux/screen_info.h>
 #include <linux/ioport.h>
 #include <linux/acpi.h>
+#include <linux/sfi.h>
 #include <linux/apm_bios.h>
 #include <linux/initrd.h>
 #include <linux/bootmem.h>
@@ -109,10 +110,6 @@
 #include <asm/numa_64.h>
 #endif
 
-#ifndef ARCH_SETUP
-#define ARCH_SETUP
-#endif
-
 /*
  * end_pfn only includes RAM, while max_pfn_mapped includes all e820 entries.
  * The direct mapping extends to max_pfn_mapped, so that we can directly access
@@ -134,9 +131,9 @@ int default_cpu_present_to_apicid(int mps_cpu)
         return __default_cpu_present_to_apicid(mps_cpu);
 }
 
-int default_check_phys_apicid_present(int boot_cpu_physical_apicid)
+int default_check_phys_apicid_present(int phys_apicid)
 {
-        return __default_check_phys_apicid_present(boot_cpu_physical_apicid);
+        return __default_check_phys_apicid_present(phys_apicid);
 }
 #endif
 
@@ -172,13 +169,6 @@ static struct resource bss_resource = {
 
 
 #ifdef CONFIG_X86_32
-static struct resource video_ram_resource = {
-        .name   = "Video RAM area",
-        .start  = 0xa0000,
-        .end    = 0xbffff,
-        .flags  = IORESOURCE_BUSY | IORESOURCE_MEM
-};
-
 /* cpu data as detected by the assembly code in head.S */
 struct cpuinfo_x86 new_cpu_data __cpuinitdata = {0, 0, 0, 0, -1, 1, 0, 0, -1};
 /* common cpu data for all cpus */
@@ -606,7 +596,7 @@ static struct resource standard_io_resources[] = {
                 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
 };
 
-static void __init reserve_standard_io_resources(void)
+void __init reserve_standard_io_resources(void)
 {
         int i;
 
@@ -638,10 +628,6 @@ static int __init setup_elfcorehdr(char *arg)
 early_param("elfcorehdr", setup_elfcorehdr);
 #endif
 
-static struct x86_quirks default_x86_quirks __initdata;
-
-struct x86_quirks *x86_quirks __initdata = &default_x86_quirks;
-
 #ifdef CONFIG_X86_RESERVE_LOW_64K
 static int __init dmi_low_memory_corruption(const struct dmi_system_id *d)
 {
@@ -712,21 +698,6 @@ void __init setup_arch(char **cmdline_p)
         printk(KERN_INFO "Command line: %s\n", boot_command_line);
 #endif
 
-        strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE);
-        *cmdline_p = command_line;
-
-#ifdef CONFIG_X86_64
-        /*
-         * Must call this twice: Once just to detect whether hardware doesn't
-         * support NX (so that the early EHCI debug console setup can safely
-         * call set_fixmap(), and then again after parsing early parameters to
-         * honor the respective command line option.
-         */
-        check_efer();
-#endif
-
-        parse_early_param();
-
         /* VMI may relocate the fixmap; do this before touching ioremap area */
         vmi_init();
 
@@ -773,7 +744,7 @@ void __init setup_arch(char **cmdline_p)
         }
 #endif
 
-        ARCH_SETUP
+        x86_init.oem.arch_setup();
 
         setup_memory_map();
         parse_setup_data();
@@ -809,6 +780,21 @@ void __init setup_arch(char **cmdline_p)
 #endif
 #endif
 
+        strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE);
+        *cmdline_p = command_line;
+
+#ifdef CONFIG_X86_64
+        /*
+         * Must call this twice: Once just to detect whether hardware doesn't
+         * support NX (so that the early EHCI debug console setup can safely
+         * call set_fixmap(), and then again after parsing early parameters to
+         * honor the respective command line option.
+         */
+        check_efer();
+#endif
+
+        parse_early_param();
+
 #ifdef CONFIG_X86_64
         check_efer();
 #endif
@@ -844,11 +830,9 @@ void __init setup_arch(char **cmdline_p)
          * VMware detection requires dmi to be available, so this
          * needs to be done after dmi_scan_machine, for the BP.
          */
-        init_hypervisor(&boot_cpu_data);
+        init_hypervisor_platform();
 
-#ifdef CONFIG_X86_32
-        probe_roms();
-#endif
+        x86_init.resources.probe_roms();
 
         /* after parse_early_param, so could debug it */
         insert_resource(&iomem_resource, &code_resource);
@@ -983,10 +967,9 @@ void __init setup_arch(char **cmdline_p)
         kvmclock_init();
 #endif
 
-        paravirt_pagetable_setup_start(swapper_pg_dir);
+        x86_init.paging.pagetable_setup_start(swapper_pg_dir);
         paging_init();
-        paravirt_pagetable_setup_done(swapper_pg_dir);
-        paravirt_post_allocator_init();
+        x86_init.paging.pagetable_setup_done(swapper_pg_dir);
 
         tboot_probe();
 
@@ -1003,13 +986,13 @@ void __init setup_arch(char **cmdline_p)
          */
         acpi_boot_init();
 
-#if defined(CONFIG_X86_MPPARSE) || defined(CONFIG_X86_VISWS)
+        sfi_init();
+
         /*
          * get boot-time SMP configuration:
          */
         if (smp_found_config)
                 get_smp_config();
-#endif
 
         prefill_possible_map();
 
@@ -1028,10 +1011,7 @@ void __init setup_arch(char **cmdline_p)
         e820_reserve_resources();
         e820_mark_nosave_regions(max_low_pfn);
 
-#ifdef CONFIG_X86_32
-        request_resource(&iomem_resource, &video_ram_resource);
-#endif
-        reserve_standard_io_resources();
+        x86_init.resources.reserve_resources();
 
         e820_setup_gap();
 
@@ -1043,78 +1023,22 @@ void __init setup_arch(char **cmdline_p)
         conswitchp = &dummy_con;
 #endif
 #endif
+        x86_init.oem.banner();
 }
 
 #ifdef CONFIG_X86_32
 
-/**
- * x86_quirk_intr_init - post gate setup interrupt initialisation
- *
- * Description:
- *      Fill in any interrupts that may have been left out by the general
- *      init_IRQ() routine.  interrupts having to do with the machine rather
- *      than the devices on the I/O bus (like APIC interrupts in intel MP
- *      systems) are started here.
- **/
-void __init x86_quirk_intr_init(void)
-{
-        if (x86_quirks->arch_intr_init) {
-                if (x86_quirks->arch_intr_init())
-                        return;
-        }
-}
-
-/**
- * x86_quirk_trap_init - initialise system specific traps
- *
- * Description:
- *      Called as the final act of trap_init().  Used in VISWS to initialise
- *      the various board specific APIC traps.
- **/
-void __init x86_quirk_trap_init(void)
-{
-        if (x86_quirks->arch_trap_init) {
-                if (x86_quirks->arch_trap_init())
-                        return;
-        }
-}
-
-static struct irqaction irq0  = {
-        .handler = timer_interrupt,
-        .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER,
-        .name = "timer"
+static struct resource video_ram_resource = {
+        .name   = "Video RAM area",
+        .start  = 0xa0000,
+        .end    = 0xbffff,
+        .flags  = IORESOURCE_BUSY | IORESOURCE_MEM
 };
 
-/**
- * x86_quirk_pre_time_init - do any specific initialisations before.
- *
- **/
-void __init x86_quirk_pre_time_init(void)
+void __init i386_reserve_resources(void)
 {
-        if (x86_quirks->arch_pre_time_init)
-                x86_quirks->arch_pre_time_init();
+        request_resource(&iomem_resource, &video_ram_resource);
+        reserve_standard_io_resources();
 }
 
-/**
- * x86_quirk_time_init - do any specific initialisations for the system timer.
- *
- * Description:
- *      Must plug the system timer interrupt source at HZ into the IRQ listed
- *      in irq_vectors.h:TIMER_IRQ
- **/
-void __init x86_quirk_time_init(void)
-{
-        if (x86_quirks->arch_time_init) {
-                /*
-                 * A nonzero return code does not mean failure, it means
-                 * that the architecture quirk does not want any
-                 * generic (timer) setup to be performed after this:
-                 */
-                if (x86_quirks->arch_time_init())
-                        return;
-        }
-
-        irq0.mask = cpumask_of_cpu(0);
-        setup_irq(0, &irq0);
-}
 #endif /* CONFIG_X86_32 */
diff --git a/arch/x86/kernel/sfi.c b/arch/x86/kernel/sfi.c
new file mode 100644
index 000000000000..34e099382651
--- /dev/null
+++ b/arch/x86/kernel/sfi.c
@@ -0,0 +1,122 @@
+/*
+ * sfi.c - x86 architecture SFI support.
+ *
+ * Copyright (c) 2009, Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ */
+
+#define KMSG_COMPONENT "SFI"
+#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
+
+#include <linux/acpi.h>
+#include <linux/init.h>
+#include <linux/sfi.h>
+#include <linux/io.h>
+
+#include <asm/io_apic.h>
+#include <asm/mpspec.h>
+#include <asm/setup.h>
+#include <asm/apic.h>
+
+#ifdef CONFIG_X86_LOCAL_APIC
+static unsigned long sfi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE;
+
+void __init mp_sfi_register_lapic_address(unsigned long address)
+{
+        mp_lapic_addr = address;
+
+        set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr);
+        if (boot_cpu_physical_apicid == -1U)
+                boot_cpu_physical_apicid = read_apic_id();
+
+        pr_info("Boot CPU = %d\n", boot_cpu_physical_apicid);
+}
+
+/* All CPUs enumerated by SFI must be present and enabled */
+void __cpuinit mp_sfi_register_lapic(u8 id)
+{
+        if (MAX_APICS - id <= 0) {
+                pr_warning("Processor #%d invalid (max %d)\n",
+                        id, MAX_APICS);
+                return;
+        }
+
+        pr_info("registering lapic[%d]\n", id);
+
+        generic_processor_info(id, GET_APIC_VERSION(apic_read(APIC_LVR)));
+}
+
+static int __init sfi_parse_cpus(struct sfi_table_header *table)
+{
+        struct sfi_table_simple *sb;
+        struct sfi_cpu_table_entry *pentry;
+        int i;
+        int cpu_num;
+
+        sb = (struct sfi_table_simple *)table;
+        cpu_num = SFI_GET_NUM_ENTRIES(sb, struct sfi_cpu_table_entry);
+        pentry = (struct sfi_cpu_table_entry *)sb->pentry;
+
+        for (i = 0; i < cpu_num; i++) {
+                mp_sfi_register_lapic(pentry->apic_id);
+                pentry++;
+        }
+
+        smp_found_config = 1;
+        return 0;
+}
+#endif /* CONFIG_X86_LOCAL_APIC */
+
+#ifdef CONFIG_X86_IO_APIC
+static u32 gsi_base;
+
+static int __init sfi_parse_ioapic(struct sfi_table_header *table)
+{
+        struct sfi_table_simple *sb;
+        struct sfi_apic_table_entry *pentry;
+        int i, num;
+
+        sb = (struct sfi_table_simple *)table;
+        num = SFI_GET_NUM_ENTRIES(sb, struct sfi_apic_table_entry);
+        pentry = (struct sfi_apic_table_entry *)sb->pentry;
+
+        for (i = 0; i < num; i++) {
+                mp_register_ioapic(i, pentry->phys_addr, gsi_base);
+                gsi_base += io_apic_get_redir_entries(i);
+                pentry++;
+        }
+
+        WARN(pic_mode, KERN_WARNING
+                "SFI: pic_mod shouldn't be 1 when IOAPIC table is present\n");
+        pic_mode = 0;
+        return 0;
+}
+#endif /* CONFIG_X86_IO_APIC */
+
+/*
+ * sfi_platform_init(): register lapics & io-apics
+ */
+int __init sfi_platform_init(void)
+{
+#ifdef CONFIG_X86_LOCAL_APIC
+        mp_sfi_register_lapic_address(sfi_lapic_addr);
+        sfi_table_parse(SFI_SIG_CPUS, NULL, NULL, sfi_parse_cpus);
+#endif
+#ifdef CONFIG_X86_IO_APIC
+        sfi_table_parse(SFI_SIG_APIC, NULL, NULL, sfi_parse_ioapic);
+#endif
+        return 0;
+}
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index a25eeec00080..565ebc65920e 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -324,7 +324,7 @@ notrace static void __cpuinit start_secondary(void *unused)
         /* enable local interrupts */
         local_irq_enable();
 
-        setup_secondary_clock();
+        x86_cpuinit.setup_percpu_clockev();
 
         wmb();
         cpu_idle();
@@ -1059,12 +1059,9 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus)
 #endif
         current_thread_info()->cpu = 0;  /* needed? */
         for_each_possible_cpu(i) {
-                alloc_cpumask_var(&per_cpu(cpu_sibling_map, i), GFP_KERNEL);
-                alloc_cpumask_var(&per_cpu(cpu_core_map, i), GFP_KERNEL);
-                alloc_cpumask_var(&cpu_data(i).llc_shared_map, GFP_KERNEL);
-                cpumask_clear(per_cpu(cpu_core_map, i));
-                cpumask_clear(per_cpu(cpu_sibling_map, i));
-                cpumask_clear(cpu_data(i).llc_shared_map);
+                zalloc_cpumask_var(&per_cpu(cpu_sibling_map, i), GFP_KERNEL);
+                zalloc_cpumask_var(&per_cpu(cpu_core_map, i), GFP_KERNEL);
+                zalloc_cpumask_var(&cpu_data(i).llc_shared_map, GFP_KERNEL);
         }
         set_cpu_sibling_map(0);
 
@@ -1114,7 +1111,7 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus)
 
         printk(KERN_INFO "CPU%d: ", 0);
         print_cpu_info(&cpu_data(0));
-        setup_boot_clock();
+        x86_init.timers.setup_percpu_clockev();
 
         if (is_uv_system())
                 uv_system_init();
diff --git a/arch/x86/kernel/syscall_table_32.S b/arch/x86/kernel/syscall_table_32.S
index d51321ddafda..0157cd26d7cc 100644
--- a/arch/x86/kernel/syscall_table_32.S
+++ b/arch/x86/kernel/syscall_table_32.S
@@ -335,4 +335,4 @@ ENTRY(sys_call_table)
         .long sys_preadv
         .long sys_pwritev
         .long sys_rt_tgsigqueueinfo     /* 335 */
-        .long sys_perf_counter_open
+        .long sys_perf_event_open
diff --git a/arch/x86/kernel/time.c b/arch/x86/kernel/time.c
new file mode 100644
index 000000000000..dcb00d278512
--- /dev/null
+++ b/arch/x86/kernel/time.c
@@ -0,0 +1,120 @@
+/*
+ *  Copyright (c) 1991,1992,1995  Linus Torvalds
+ *  Copyright (c) 1994  Alan Modra
+ *  Copyright (c) 1995  Markus Kuhn
+ *  Copyright (c) 1996  Ingo Molnar
+ *  Copyright (c) 1998  Andrea Arcangeli
+ *  Copyright (c) 2002,2006  Vojtech Pavlik
+ *  Copyright (c) 2003  Andi Kleen
+ *
+ */
+
+#include <linux/clockchips.h>
+#include <linux/interrupt.h>
+#include <linux/time.h>
+#include <linux/mca.h>
+
+#include <asm/vsyscall.h>
+#include <asm/x86_init.h>
+#include <asm/i8259.h>
+#include <asm/i8253.h>
+#include <asm/timer.h>
+#include <asm/hpet.h>
+#include <asm/time.h>
+
+#if defined(CONFIG_X86_32) && defined(CONFIG_X86_IO_APIC)
+int timer_ack;
+#endif
+
+#ifdef CONFIG_X86_64
+volatile unsigned long __jiffies __section_jiffies = INITIAL_JIFFIES;
+#endif
+
+unsigned long profile_pc(struct pt_regs *regs)
+{
+        unsigned long pc = instruction_pointer(regs);
+
+        if (!user_mode_vm(regs) && in_lock_functions(pc)) {
+#ifdef CONFIG_FRAME_POINTER
+                return *(unsigned long *)(regs->bp + sizeof(long));
+#else
+                unsigned long *sp = (unsigned long *)regs->sp;
+                /*
+                 * Return address is either directly at stack pointer
+                 * or above a saved flags. Eflags has bits 22-31 zero,
+                 * kernel addresses don't.
+                 */
+                if (sp[0] >> 22)
+                        return sp[0];
+                if (sp[1] >> 22)
+                        return sp[1];
+#endif
+        }
+        return pc;
+}
+EXPORT_SYMBOL(profile_pc);
+
+/*
+ * Default timer interrupt handler for PIT/HPET
+ */
+static irqreturn_t timer_interrupt(int irq, void *dev_id)
+{
+        /* Keep nmi watchdog up to date */
+        inc_irq_stat(irq0_irqs);
+
+        /* Optimized out for !IO_APIC and x86_64 */
+        if (timer_ack) {
+                /*
+                 * Subtle, when I/O APICs are used we have to ack timer IRQ
+                 * manually to deassert NMI lines for the watchdog if run
+                 * on an 82489DX-based system.
+                 */
+                spin_lock(&i8259A_lock);
+                outb(0x0c, PIC_MASTER_OCW3);
+                /* Ack the IRQ; AEOI will end it automatically. */
+                inb(PIC_MASTER_POLL);
+                spin_unlock(&i8259A_lock);
+        }
+
+        global_clock_event->event_handler(global_clock_event);
+
+        /* MCA bus quirk: Acknowledge irq0 by setting bit 7 in port 0x61 */
+        if (MCA_bus)
+                outb_p(inb_p(0x61)| 0x80, 0x61);
+
+        return IRQ_HANDLED;
+}
+
+static struct irqaction irq0  = {
+        .handler = timer_interrupt,
+        .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER,
+        .name = "timer"
+};
+
+void __init setup_default_timer_irq(void)
+{
+        setup_irq(0, &irq0);
+}
+
+/* Default timer init function */
+void __init hpet_time_init(void)
+{
+        if (!hpet_enable())
+                setup_pit_timer();
+        setup_default_timer_irq();
+}
+
+static __init void x86_late_time_init(void)
+{
+        x86_init.timers.timer_init();
+        tsc_init();
+}
+
+/*
+ * Initialize TSC and delay the periodic timer init to
+ * late x86_late_time_init() so ioremap works.
+ */
+void __init time_init(void)
+{
+        late_time_init = x86_late_time_init;
+}
diff --git a/arch/x86/kernel/time_32.c b/arch/x86/kernel/time_32.c
deleted file mode 100644
index 5c5d87f0b2e1..000000000000
--- a/arch/x86/kernel/time_32.c
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- *  Copyright (C) 1991, 1992, 1995  Linus Torvalds
- *
- * This file contains the PC-specific time handling details:
- * reading the RTC at bootup, etc..
- * 1994-07-02    Alan Modra
- *      fixed set_rtc_mmss, fixed time.year for >= 2000, new mktime
- * 1995-03-26    Markus Kuhn
- *      fixed 500 ms bug at call to set_rtc_mmss, fixed DS12887
- *      precision CMOS clock update
- * 1996-05-03    Ingo Molnar
- *      fixed time warps in do_[slow|fast]_gettimeoffset()
- * 1997-09-10   Updated NTP code according to technical memorandum Jan '96
- *              "A Kernel Model for Precision Timekeeping" by Dave Mills
- * 1998-09-05    (Various)
- *      More robust do_fast_gettimeoffset() algorithm implemented
- *      (works with APM, Cyrix 6x86MX and Centaur C6),
- *      monotonic gettimeofday() with fast_get_timeoffset(),
- *      drift-proof precision TSC calibration on boot
- *      (C. Scott Ananian <cananian@alumni.princeton.edu>, Andrew D.
- *      Balsa <andrebalsa@altern.org>, Philip Gladstone <philip@raptor.com>;
- *      ported from 2.0.35 Jumbo-9 by Michael Krause <m.krause@tu-harburg.de>).
- * 1998-12-16    Andrea Arcangeli
- *      Fixed Jumbo-9 code in 2.1.131: do_gettimeofday was missing 1 jiffy
- *      because was not accounting lost_ticks.
- * 1998-12-24 Copyright (C) 1998  Andrea Arcangeli
- *      Fixed a xtime SMP race (we need the xtime_lock rw spinlock to
- *      serialize accesses to xtime/lost_ticks).
- */
-
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/time.h>
-#include <linux/mca.h>
-
-#include <asm/setup.h>
-#include <asm/hpet.h>
-#include <asm/time.h>
-#include <asm/timer.h>
-
-#include <asm/do_timer.h>
-
-int timer_ack;
-
-unsigned long profile_pc(struct pt_regs *regs)
-{
-        unsigned long pc = instruction_pointer(regs);
-
-#ifdef CONFIG_SMP
-        if (!user_mode_vm(regs) && in_lock_functions(pc)) {
-#ifdef CONFIG_FRAME_POINTER
-                return *(unsigned long *)(regs->bp + sizeof(long));
-#else
-                unsigned long *sp = (unsigned long *)&regs->sp;
-
-                /* Return address is either directly at stack pointer
-                   or above a saved flags. Eflags has bits 22-31 zero,
-                   kernel addresses don't. */
-                if (sp[0] >> 22)
-                        return sp[0];
-                if (sp[1] >> 22)
-                        return sp[1];
-#endif
-        }
-#endif
-        return pc;
-}
-EXPORT_SYMBOL(profile_pc);
-
-/*
- * This is the same as the above, except we _also_ save the current
- * Time Stamp Counter value at the time of the timer interrupt, so that
- * we later on can estimate the time of day more exactly.
- */
-irqreturn_t timer_interrupt(int irq, void *dev_id)
-{
-        /* Keep nmi watchdog up to date */
-        inc_irq_stat(irq0_irqs);
-
-#ifdef CONFIG_X86_IO_APIC
-        if (timer_ack) {
-                /*
-                 * Subtle, when I/O APICs are used we have to ack timer IRQ
-                 * manually to deassert NMI lines for the watchdog if run
-                 * on an 82489DX-based system.
-                 */
-                spin_lock(&i8259A_lock);
-                outb(0x0c, PIC_MASTER_OCW3);
-                /* Ack the IRQ; AEOI will end it automatically. */
-                inb(PIC_MASTER_POLL);
-                spin_unlock(&i8259A_lock);
-        }
-#endif
-
-        do_timer_interrupt_hook();
-
-#ifdef CONFIG_MCA
-        if (MCA_bus) {
-                /* The PS/2 uses level-triggered interrupts.  You can't
-                turn them off, nor would you want to (any attempt to
-                enable edge-triggered interrupts usually gets intercepted by a
-                special hardware circuit).  Hence we have to acknowledge
-                the timer interrupt.  Through some incredibly stupid
-                design idea, the reset for IRQ 0 is done by setting the
-                high bit of the PPI port B (0x61).  Note that some PS/2s,
-                notably the 55SX, work fine if this is removed.  */
-
-                u8 irq_v = inb_p(0x61);         /* read the current state */
-                outb_p(irq_v | 0x80, 0x61);     /* reset the IRQ */
-        }
-#endif
-
-        return IRQ_HANDLED;
-}
-
-/* Duplicate of time_init() below, with hpet_enable part added */
-void __init hpet_time_init(void)
-{
-        if (!hpet_enable())
-                setup_pit_timer();
-        x86_quirk_time_init();
-}
-
-/*
- * This is called directly from init code; we must delay timer setup in the
- * HPET case as we can't make the decision to turn on HPET this early in the
- * boot process.
- *
- * The chosen time_init function will usually be hpet_time_init, above, but
- * in the case of virtual hardware, an alternative function may be substituted.
- */
-void __init time_init(void)
-{
-        x86_quirk_pre_time_init();
-        tsc_init();
-        late_time_init = choose_time_init();
-}
diff --git a/arch/x86/kernel/time_64.c b/arch/x86/kernel/time_64.c
deleted file mode 100644
index 5ba343e61844..000000000000
--- a/arch/x86/kernel/time_64.c
+++ /dev/null
@@ -1,135 +0,0 @@
-/*
- *  "High Precision Event Timer" based timekeeping.
- *
- *  Copyright (c) 1991,1992,1995  Linus Torvalds
- *  Copyright (c) 1994  Alan Modra
- *  Copyright (c) 1995  Markus Kuhn
- *  Copyright (c) 1996  Ingo Molnar
- *  Copyright (c) 1998  Andrea Arcangeli
- *  Copyright (c) 2002,2006  Vojtech Pavlik
- *  Copyright (c) 2003  Andi Kleen
- *  RTC support code taken from arch/i386/kernel/timers/time_hpet.c
- */
-
-#include <linux/clockchips.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/module.h>
-#include <linux/time.h>
-#include <linux/mca.h>
-#include <linux/nmi.h>
-
-#include <asm/i8253.h>
-#include <asm/hpet.h>
-#include <asm/vgtod.h>
-#include <asm/time.h>
-#include <asm/timer.h>
-
-volatile unsigned long __jiffies __section_jiffies = INITIAL_JIFFIES;
-
-unsigned long profile_pc(struct pt_regs *regs)
-{
-        unsigned long pc = instruction_pointer(regs);
-
-        /* Assume the lock function has either no stack frame or a copy
-           of flags from PUSHF
-           Eflags always has bits 22 and up cleared unlike kernel addresses. */
-        if (!user_mode_vm(regs) && in_lock_functions(pc)) {
-#ifdef CONFIG_FRAME_POINTER
-                return *(unsigned long *)(regs->bp + sizeof(long));
-#else
-                unsigned long *sp = (unsigned long *)regs->sp;
-                if (sp[0] >> 22)
-                        return sp[0];
-                if (sp[1] >> 22)
-                        return sp[1];
-#endif
-        }
-        return pc;
-}
-EXPORT_SYMBOL(profile_pc);
-
-static irqreturn_t timer_interrupt(int irq, void *dev_id)
-{
-        inc_irq_stat(irq0_irqs);
-
-        global_clock_event->event_handler(global_clock_event);
-
-#ifdef CONFIG_MCA
-        if (MCA_bus) {
-                u8 irq_v = inb_p(0x61);       /* read the current state */
-                outb_p(irq_v|0x80, 0x61);     /* reset the IRQ */
-        }
-#endif
-
-        return IRQ_HANDLED;
-}
-
-/* calibrate_cpu is used on systems with fixed rate TSCs to determine
- * processor frequency */
-#define TICK_COUNT 100000000
-unsigned long __init calibrate_cpu(void)
-{
-        int tsc_start, tsc_now;
-        int i, no_ctr_free;
-        unsigned long evntsel3 = 0, pmc3 = 0, pmc_now = 0;
-        unsigned long flags;
-
-        for (i = 0; i < 4; i++)
-                if (avail_to_resrv_perfctr_nmi_bit(i))
-                        break;
-        no_ctr_free = (i == 4);
-        if (no_ctr_free) {
-                WARN(1, KERN_WARNING "Warning: AMD perfctrs busy ... "
-                     "cpu_khz value may be incorrect.\n");
-                i = 3;
-                rdmsrl(MSR_K7_EVNTSEL3, evntsel3);
-                wrmsrl(MSR_K7_EVNTSEL3, 0);
-                rdmsrl(MSR_K7_PERFCTR3, pmc3);
-        } else {
-                reserve_perfctr_nmi(MSR_K7_PERFCTR0 + i);
-                reserve_evntsel_nmi(MSR_K7_EVNTSEL0 + i);
-        }
-        local_irq_save(flags);
-        /* start measuring cycles, incrementing from 0 */
-        wrmsrl(MSR_K7_PERFCTR0 + i, 0);
-        wrmsrl(MSR_K7_EVNTSEL0 + i, 1 << 22 | 3 << 16 | 0x76);
-        rdtscl(tsc_start);
-        do {
-                rdmsrl(MSR_K7_PERFCTR0 + i, pmc_now);
-                tsc_now = get_cycles();
-        } while ((tsc_now - tsc_start) < TICK_COUNT);
-
-        local_irq_restore(flags);
-        if (no_ctr_free) {
-                wrmsrl(MSR_K7_EVNTSEL3, 0);
-                wrmsrl(MSR_K7_PERFCTR3, pmc3);
-                wrmsrl(MSR_K7_EVNTSEL3, evntsel3);
-        } else {
-                release_perfctr_nmi(MSR_K7_PERFCTR0 + i);
-                release_evntsel_nmi(MSR_K7_EVNTSEL0 + i);
-        }
-
-        return pmc_now * tsc_khz / (tsc_now - tsc_start);
-}
-
-static struct irqaction irq0 = {
-        .handler        = timer_interrupt,
-        .flags          = IRQF_DISABLED | IRQF_IRQPOLL | IRQF_NOBALANCING | IRQF_TIMER,
-        .name           = "timer"
-};
-
-void __init hpet_time_init(void)
-{
-        if (!hpet_enable())
-                setup_pit_timer();
-
-        setup_irq(0, &irq0);
-}
-
-void __init time_init(void)
-{
-        tsc_init();
-
-        late_time_init = choose_time_init();
-}
diff --git a/arch/x86/kernel/trampoline.c b/arch/x86/kernel/trampoline.c
index 808031a5ba19..699f7eeb896a 100644
--- a/arch/x86/kernel/trampoline.c
+++ b/arch/x86/kernel/trampoline.c
@@ -4,7 +4,7 @@
 #include <asm/e820.h>
 
 /* ready for x86_64 and x86 */
-unsigned char *trampoline_base = __va(TRAMPOLINE_BASE);
+unsigned char *__cpuinitdata trampoline_base = __va(TRAMPOLINE_BASE);
 
 void __init reserve_trampoline_memory(void)
 {
@@ -26,7 +26,7 @@ void __init reserve_trampoline_memory(void)
  * bootstrap into the page concerned. The caller
  * has made sure it's suitably aligned.
  */
-unsigned long setup_trampoline(void)
+unsigned long __cpuinit setup_trampoline(void)
 {
         memcpy(trampoline_base, trampoline_data, TRAMPOLINE_SIZE);
         return virt_to_phys(trampoline_base);
diff --git a/arch/x86/kernel/trampoline_32.S b/arch/x86/kernel/trampoline_32.S
index 66d874e5404c..8508237e8e43 100644
--- a/arch/x86/kernel/trampoline_32.S
+++ b/arch/x86/kernel/trampoline_32.S
@@ -28,16 +28,12 @@
  */
 
 #include <linux/linkage.h>
+#include <linux/init.h>
 #include <asm/segment.h>
 #include <asm/page_types.h>
 
 /* We can free up trampoline after bootup if cpu hotplug is not supported. */
-#ifndef CONFIG_HOTPLUG_CPU
-.section ".cpuinit.data","aw",@progbits
-#else
-.section .rodata,"a",@progbits
-#endif
-
+__CPUINITRODATA
 .code16
 
 ENTRY(trampoline_data)
diff --git a/arch/x86/kernel/trampoline_64.S b/arch/x86/kernel/trampoline_64.S
index cddfb8d386b9..596d54c660a5 100644
--- a/arch/x86/kernel/trampoline_64.S
+++ b/arch/x86/kernel/trampoline_64.S
@@ -25,14 +25,15 @@
  */
 
 #include <linux/linkage.h>
+#include <linux/init.h>
 #include <asm/pgtable_types.h>
 #include <asm/page_types.h>
 #include <asm/msr.h>
 #include <asm/segment.h>
 #include <asm/processor-flags.h>
 
-.section .rodata, "a", @progbits
-
+/* We can free up the trampoline after bootup if cpu hotplug is not supported. */
+__CPUINITRODATA
 .code16
 
 ENTRY(trampoline_data)
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index 83264922a878..a665c71352b8 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -14,7 +14,6 @@
 #include <linux/spinlock.h>
 #include <linux/kprobes.h>
 #include <linux/uaccess.h>
-#include <linux/utsname.h>
 #include <linux/kdebug.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
@@ -59,12 +58,12 @@
 #include <asm/mach_traps.h>
 
 #ifdef CONFIG_X86_64
+#include <asm/x86_init.h>
 #include <asm/pgalloc.h>
 #include <asm/proto.h>
 #else
 #include <asm/processor-flags.h>
 #include <asm/setup.h>
-#include <asm/traps.h>
 
 asmlinkage int system_call(void);
 
@@ -972,7 +971,5 @@ void __init trap_init(void)
          */
         cpu_init();
 
-#ifdef CONFIG_X86_32
-        x86_quirk_trap_init();
-#endif
+        x86_init.irqs.trap_init();
 }
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 71f4368b357e..cd982f48e23e 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -17,6 +17,8 @@
 #include <asm/time.h>
 #include <asm/delay.h>
 #include <asm/hypervisor.h>
+#include <asm/nmi.h>
+#include <asm/x86_init.h>
 
 unsigned int __read_mostly cpu_khz;     /* TSC clocks / usec, not used here */
 EXPORT_SYMBOL(cpu_khz);
@@ -400,15 +402,9 @@ unsigned long native_calibrate_tsc(void)
 {
         u64 tsc1, tsc2, delta, ref1, ref2;
         unsigned long tsc_pit_min = ULONG_MAX, tsc_ref_min = ULONG_MAX;
-        unsigned long flags, latch, ms, fast_calibrate, hv_tsc_khz;
+        unsigned long flags, latch, ms, fast_calibrate;
         int hpet = is_hpet_enabled(), i, loopmin;
 
-        hv_tsc_khz = get_hypervisor_tsc_freq();
-        if (hv_tsc_khz) {
-                printk(KERN_INFO "TSC: Frequency read from the hypervisor\n");
-                return hv_tsc_khz;
-        }
-
         local_irq_save(flags);
         fast_calibrate = quick_pit_calibrate();
         local_irq_restore(flags);
@@ -566,7 +562,7 @@ int recalibrate_cpu_khz(void)
         unsigned long cpu_khz_old = cpu_khz;
 
         if (cpu_has_tsc) {
-                tsc_khz = calibrate_tsc();
+                tsc_khz = x86_platform.calibrate_tsc();
                 cpu_khz = tsc_khz;
                 cpu_data(0).loops_per_jiffy =
                         cpufreq_scale(cpu_data(0).loops_per_jiffy,
@@ -670,7 +666,7 @@ static int time_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
         if ((val == CPUFREQ_PRECHANGE  && freq->old < freq->new) ||
                         (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
                         (val == CPUFREQ_RESUMECHANGE)) {
-                *lpj =  cpufreq_scale(loops_per_jiffy_ref, ref_freq, freq->new);
+                *lpj = cpufreq_scale(loops_per_jiffy_ref, ref_freq, freq->new);
 
                 tsc_khz = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);
                 if (!(freq->flags & CPUFREQ_CONST_LOOPS))
@@ -744,10 +740,16 @@ static cycle_t __vsyscall_fn vread_tsc(void)
 }
 #endif
 
+static void resume_tsc(void)
+{
+        clocksource_tsc.cycle_last = 0;
+}
+
 static struct clocksource clocksource_tsc = {
         .name                   = "tsc",
         .rating                 = 300,
         .read                   = read_tsc,
+        .resume                 = resume_tsc,
         .mask                   = CLOCKSOURCE_MASK(64),
         .shift                  = 22,
         .flags                  = CLOCK_SOURCE_IS_CONTINUOUS |
@@ -761,12 +763,14 @@ void mark_tsc_unstable(char *reason)
 {
         if (!tsc_unstable) {
                 tsc_unstable = 1;
-                printk("Marking TSC unstable due to %s\n", reason);
+                printk(KERN_INFO "Marking TSC unstable due to %s\n", reason);
                 /* Change only the rating, when not registered */
                 if (clocksource_tsc.mult)
-                        clocksource_change_rating(&clocksource_tsc, 0);
-                else
+                        clocksource_mark_unstable(&clocksource_tsc);
+                else {
+                        clocksource_tsc.flags |= CLOCK_SOURCE_UNSTABLE;
                         clocksource_tsc.rating = 0;
+                }
         }
 }
 
@@ -852,15 +856,71 @@ static void __init init_tsc_clocksource(void)
         clocksource_register(&clocksource_tsc);
 }
 
+#ifdef CONFIG_X86_64
+/*
+ * calibrate_cpu is used on systems with fixed rate TSCs to determine
+ * processor frequency
+ */
+#define TICK_COUNT 100000000
+static unsigned long __init calibrate_cpu(void)
+{
+        int tsc_start, tsc_now;
+        int i, no_ctr_free;
+        unsigned long evntsel3 = 0, pmc3 = 0, pmc_now = 0;
+        unsigned long flags;
+
+        for (i = 0; i < 4; i++)
+                if (avail_to_resrv_perfctr_nmi_bit(i))
+                        break;
+        no_ctr_free = (i == 4);
+        if (no_ctr_free) {
+                WARN(1, KERN_WARNING "Warning: AMD perfctrs busy ... "
+                     "cpu_khz value may be incorrect.\n");
+                i = 3;
+                rdmsrl(MSR_K7_EVNTSEL3, evntsel3);
+                wrmsrl(MSR_K7_EVNTSEL3, 0);
+                rdmsrl(MSR_K7_PERFCTR3, pmc3);
+        } else {
+                reserve_perfctr_nmi(MSR_K7_PERFCTR0 + i);
+                reserve_evntsel_nmi(MSR_K7_EVNTSEL0 + i);
+        }
+        local_irq_save(flags);
+        /* start measuring cycles, incrementing from 0 */
+        wrmsrl(MSR_K7_PERFCTR0 + i, 0);
+        wrmsrl(MSR_K7_EVNTSEL0 + i, 1 << 22 | 3 << 16 | 0x76);
+        rdtscl(tsc_start);
+        do {
+                rdmsrl(MSR_K7_PERFCTR0 + i, pmc_now);
+                tsc_now = get_cycles();
+        } while ((tsc_now - tsc_start) < TICK_COUNT);
+
+        local_irq_restore(flags);
+        if (no_ctr_free) {
+                wrmsrl(MSR_K7_EVNTSEL3, 0);
+                wrmsrl(MSR_K7_PERFCTR3, pmc3);
+                wrmsrl(MSR_K7_EVNTSEL3, evntsel3);
+        } else {
+                release_perfctr_nmi(MSR_K7_PERFCTR0 + i);
+                release_evntsel_nmi(MSR_K7_EVNTSEL0 + i);
+        }
+
+        return pmc_now * tsc_khz / (tsc_now - tsc_start);
+}
+#else
+static inline unsigned long calibrate_cpu(void) { return cpu_khz; }
+#endif
+
 void __init tsc_init(void)
 {
         u64 lpj;
         int cpu;
 
+        x86_init.timers.tsc_pre_init();
+
         if (!cpu_has_tsc)
                 return;
 
-        tsc_khz = calibrate_tsc();
+        tsc_khz = x86_platform.calibrate_tsc();
         cpu_khz = tsc_khz;
 
         if (!tsc_khz) {
@@ -868,11 +928,9 @@ void __init tsc_init(void)
                 return;
         }
 
-#ifdef CONFIG_X86_64
         if (cpu_has(&boot_cpu_data, X86_FEATURE_CONSTANT_TSC) &&
                         (boot_cpu_data.x86_vendor == X86_VENDOR_AMD))
                 cpu_khz = calibrate_cpu();
-#endif
 
         printk("Detected %lu.%03lu MHz processor.\n",
                         (unsigned long)cpu_khz / 1000,
diff --git a/arch/x86/kernel/visws_quirks.c b/arch/x86/kernel/visws_quirks.c
index 31ffc24eec4d..f068553a1b17 100644
--- a/arch/x86/kernel/visws_quirks.c
+++ b/arch/x86/kernel/visws_quirks.c
@@ -30,6 +30,7 @@
 #include <asm/setup.h>
 #include <asm/apic.h>
 #include <asm/e820.h>
+#include <asm/time.h>
 #include <asm/io.h>
 
 #include <linux/kernel_stat.h>
@@ -53,7 +54,7 @@ int is_visws_box(void)
         return visws_board_type >= 0;
 }
 
-static int __init visws_time_init(void)
+static void __init visws_time_init(void)
 {
         printk(KERN_INFO "Starting Cobalt Timer system clock\n");
 
@@ -66,21 +67,13 @@ static int __init visws_time_init(void)
         /* Enable (unmask) the timer interrupt */
         co_cpu_write(CO_CPU_CTRL, co_cpu_read(CO_CPU_CTRL) & ~CO_CTRL_TIMEMASK);
 
-        /*
-         * Zero return means the generic timer setup code will set up
-         * the standard vector:
-         */
-        return 0;
+        setup_default_timer_irq();
 }
 
-static int __init visws_pre_intr_init(void)
+/* Replaces the default init_ISA_irqs in the generic setup */
+static void __init visws_pre_intr_init(void)
 {
         init_VISWS_APIC_irqs();
-
-        /*
-         * We dont want ISA irqs to be set up by the generic code:
-         */
-        return 1;
 }
 
 /* Quirk for machine specific memory setup. */
@@ -156,12 +149,8 @@ static void visws_machine_power_off(void)
         outl(PIIX_SPECIAL_STOP, 0xCFC);
 }
 
-static int __init visws_get_smp_config(unsigned int early)
+static void __init visws_get_smp_config(unsigned int early)
 {
-        /*
-         * Prevent MP-table parsing by the generic code:
-         */
-        return 1;
 }
 
 /*
@@ -208,7 +197,7 @@ static void __init MP_processor_info(struct mpc_cpu *m)
         apic_version[m->apicid] = ver;
 }
 
-static int __init visws_find_smp_config(unsigned int reserve)
+static void __init visws_find_smp_config(unsigned int reserve)
 {
         struct mpc_cpu *mp = phys_to_virt(CO_CPU_TAB_PHYS);
         unsigned short ncpus = readw(phys_to_virt(CO_CPU_NUM_PHYS));
@@ -230,21 +219,9 @@ static int __init visws_find_smp_config(unsigned int reserve)
                 MP_processor_info(mp++);
 
         mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
-
-        return 1;
 }
 
-static int visws_trap_init(void);
-
-static struct x86_quirks visws_x86_quirks __initdata = {
-        .arch_time_init         = visws_time_init,
-        .arch_pre_intr_init     = visws_pre_intr_init,
-        .arch_memory_setup      = visws_memory_setup,
-        .arch_intr_init         = NULL,
-        .arch_trap_init         = visws_trap_init,
-        .mach_get_smp_config    = visws_get_smp_config,
-        .mach_find_smp_config   = visws_find_smp_config,
-};
+static void visws_trap_init(void);
 
 void __init visws_early_detect(void)
 {
@@ -257,11 +234,14 @@ void __init visws_early_detect(void)
                 return;
 
         /*
-         * Install special quirks for timer, interrupt and memory setup:
-         * Fall back to generic behavior for traps:
-         * Override generic MP-table parsing:
+         * Override the default platform setup functions
          */
-        x86_quirks = &visws_x86_quirks;
+        x86_init.resources.memory_setup = visws_memory_setup;
+        x86_init.mpparse.get_smp_config = visws_get_smp_config;
+        x86_init.mpparse.find_smp_config = visws_find_smp_config;
+        x86_init.irqs.pre_vector_init = visws_pre_intr_init;
+        x86_init.irqs.trap_init = visws_trap_init;
+        x86_init.timers.timer_init = visws_time_init;
 
         /*
          * Install reboot quirks:
@@ -400,12 +380,10 @@ static __init void cobalt_init(void)
                 co_apic_read(CO_APIC_ID));
 }
 
-static int __init visws_trap_init(void)
+static void __init visws_trap_init(void)
 {
         lithium_init();
         cobalt_init();
-
-        return 1;
 }
 
 /*
diff --git a/arch/x86/kernel/vmi_32.c b/arch/x86/kernel/vmi_32.c
index 95a7289e4b0c..31e6f6cfe53e 100644
--- a/arch/x86/kernel/vmi_32.c
+++ b/arch/x86/kernel/vmi_32.c
@@ -817,15 +817,15 @@ static inline int __init activate_vmi(void)
                 vmi_timer_ops.set_alarm = vmi_get_function(VMI_CALL_SetAlarm);
                 vmi_timer_ops.cancel_alarm =
                          vmi_get_function(VMI_CALL_CancelAlarm);
-                pv_time_ops.time_init = vmi_time_init;
-                pv_time_ops.get_wallclock = vmi_get_wallclock;
-                pv_time_ops.set_wallclock = vmi_set_wallclock;
+                x86_init.timers.timer_init = vmi_time_init;
 #ifdef CONFIG_X86_LOCAL_APIC
-                pv_apic_ops.setup_boot_clock = vmi_time_bsp_init;
-                pv_apic_ops.setup_secondary_clock = vmi_time_ap_init;
+                x86_init.timers.setup_percpu_clockev = vmi_time_bsp_init;
+                x86_cpuinit.setup_percpu_clockev = vmi_time_ap_init;
 #endif
                 pv_time_ops.sched_clock = vmi_sched_clock;
-                pv_time_ops.get_tsc_khz = vmi_tsc_khz;
+                x86_platform.calibrate_tsc = vmi_tsc_khz;
+                x86_platform.get_wallclock = vmi_get_wallclock;
+                x86_platform.set_wallclock = vmi_set_wallclock;
 
                 /* We have true wallclock functions; disable CMOS clock sync */
                 no_sync_cmos_clock = 1;
diff --git a/arch/x86/kernel/vmiclock_32.c b/arch/x86/kernel/vmiclock_32.c
index 2b3eb82efeeb..611b9e2360d3 100644
--- a/arch/x86/kernel/vmiclock_32.c
+++ b/arch/x86/kernel/vmiclock_32.c
@@ -68,7 +68,7 @@ unsigned long long vmi_sched_clock(void)
         return cycles_2_ns(vmi_timer_ops.get_cycle_counter(VMI_CYCLES_AVAILABLE));
 }
 
-/* paravirt_ops.get_tsc_khz = vmi_tsc_khz */
+/* x86_platform.calibrate_tsc = vmi_tsc_khz */
 unsigned long vmi_tsc_khz(void)
 {
         unsigned long long khz;
diff --git a/arch/x86/kernel/vmlinux.lds.S b/arch/x86/kernel/vmlinux.lds.S
index 0ccb57d5ee35..a46acccec38a 100644
--- a/arch/x86/kernel/vmlinux.lds.S
+++ b/arch/x86/kernel/vmlinux.lds.S
@@ -45,9 +45,9 @@ PHDRS {
         text PT_LOAD FLAGS(5);          /* R_E */
         data PT_LOAD FLAGS(7);          /* RWE */
 #ifdef CONFIG_X86_64
-        user PT_LOAD FLAGS(7);          /* RWE */
+        user PT_LOAD FLAGS(5);          /* R_E */
 #ifdef CONFIG_SMP
-        percpu PT_LOAD FLAGS(7);        /* RWE */
+        percpu PT_LOAD FLAGS(6);        /* RW_ */
 #endif
         init PT_LOAD FLAGS(7);          /* RWE */
 #endif
diff --git a/arch/x86/kernel/vsyscall_64.c b/arch/x86/kernel/vsyscall_64.c
index 25ee06a80aad..8cb4974ff599 100644
--- a/arch/x86/kernel/vsyscall_64.c
+++ b/arch/x86/kernel/vsyscall_64.c
@@ -87,6 +87,7 @@ void update_vsyscall(struct timespec *wall_time, struct clocksource *clock)
         vsyscall_gtod_data.wall_time_sec = wall_time->tv_sec;
         vsyscall_gtod_data.wall_time_nsec = wall_time->tv_nsec;
         vsyscall_gtod_data.wall_to_monotonic = wall_to_monotonic;
+        vsyscall_gtod_data.wall_time_coarse = __current_kernel_time();
         write_sequnlock_irqrestore(&vsyscall_gtod_data.lock, flags);
 }
 
@@ -227,19 +228,11 @@ static long __vsyscall(3) venosys_1(void)
 }
 
 #ifdef CONFIG_SYSCTL
-
-static int
-vsyscall_sysctl_change(ctl_table *ctl, int write, struct file * filp,
-                       void __user *buffer, size_t *lenp, loff_t *ppos)
-{
-        return proc_dointvec(ctl, write, filp, buffer, lenp, ppos);
-}
-
 static ctl_table kernel_table2[] = {
         { .procname = "vsyscall64",
           .data = &vsyscall_gtod_data.sysctl_enabled, .maxlen = sizeof(int),
           .mode = 0644,
-          .proc_handler = vsyscall_sysctl_change },
+          .proc_handler = proc_dointvec },
         {}
 };
 
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
new file mode 100644
index 000000000000..4449a4a2c2ed
--- /dev/null
+++ b/arch/x86/kernel/x86_init.c
@@ -0,0 +1,75 @@
+/*
+ * Copyright (C) 2009 Thomas Gleixner <tglx@linutronix.de>
+ *
+ *  For licencing details see kernel-base/COPYING
+ */
+#include <linux/init.h>
+
+#include <asm/bios_ebda.h>
+#include <asm/paravirt.h>
+#include <asm/mpspec.h>
+#include <asm/setup.h>
+#include <asm/apic.h>
+#include <asm/e820.h>
+#include <asm/time.h>
+#include <asm/irq.h>
+#include <asm/tsc.h>
+
+void __cpuinit x86_init_noop(void) { }
+void __init x86_init_uint_noop(unsigned int unused) { }
+void __init x86_init_pgd_noop(pgd_t *unused) { }
+
+/*
+ * The platform setup functions are preset with the default functions
+ * for standard PC hardware.
+ */
+struct x86_init_ops x86_init __initdata = {
+
+        .resources = {
+                .probe_roms             = x86_init_noop,
+                .reserve_resources      = reserve_standard_io_resources,
+                .memory_setup           = default_machine_specific_memory_setup,
+        },
+
+        .mpparse = {
+                .mpc_record             = x86_init_uint_noop,
+                .setup_ioapic_ids       = x86_init_noop,
+                .mpc_apic_id            = default_mpc_apic_id,
+                .smp_read_mpc_oem       = default_smp_read_mpc_oem,
+                .mpc_oem_bus_info       = default_mpc_oem_bus_info,
+                .find_smp_config        = default_find_smp_config,
+                .get_smp_config         = default_get_smp_config,
+        },
+
+        .irqs = {
+                .pre_vector_init        = init_ISA_irqs,
+                .intr_init              = native_init_IRQ,
+                .trap_init              = x86_init_noop,
+        },
+
+        .oem = {
+                .arch_setup             = x86_init_noop,
+                .banner                 = default_banner,
+        },
+
+        .paging = {
+                .pagetable_setup_start  = native_pagetable_setup_start,
+                .pagetable_setup_done   = native_pagetable_setup_done,
+        },
+
+        .timers = {
+                .setup_percpu_clockev   = setup_boot_APIC_clock,
+                .tsc_pre_init           = x86_init_noop,
+                .timer_init             = hpet_time_init,
+        },
+};
+
+struct x86_cpuinit_ops x86_cpuinit __cpuinitdata = {
+        .setup_percpu_clockev           = setup_secondary_APIC_clock,
+};
+
+struct x86_platform_ops x86_platform = {
+        .calibrate_tsc                  = native_calibrate_tsc,
+        .get_wallclock                  = mach_get_cmos_time,
+        .set_wallclock                  = mach_set_rtc_mmss,
+};
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c
index d677fa9ca650..7e59dc1d3fc2 100644
--- a/arch/x86/lguest/boot.c
+++ b/arch/x86/lguest/boot.c
@@ -1135,11 +1135,6 @@ static struct notifier_block paniced = {
 /* Setting up memory is fairly easy. */
 static __init char *lguest_memory_setup(void)
 {
-        /* We do this here and not earlier because lockcheck used to barf if we
-         * did it before start_kernel().  I think we fixed that, so it'd be
-         * nice to move it back to lguest_init.  Patch welcome... */
-        atomic_notifier_chain_register(&panic_notifier_list, &paniced);
-
         /*
          *The Linux bootloader header contains an "e820" memory map: the
          * Launcher populated the first entry with our memory limit.
@@ -1262,7 +1257,6 @@ __init void lguest_init(void)
          */
 
         /* Interrupt-related operations */
-        pv_irq_ops.init_IRQ = lguest_init_IRQ;
         pv_irq_ops.save_fl = PV_CALLEE_SAVE(save_fl);
         pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(lg_restore_fl);
         pv_irq_ops.irq_disable = PV_CALLEE_SAVE(irq_disable);
@@ -1270,7 +1264,6 @@ __init void lguest_init(void)
         pv_irq_ops.safe_halt = lguest_safe_halt;
 
         /* Setup operations */
-        pv_init_ops.memory_setup = lguest_memory_setup;
         pv_init_ops.patch = lguest_patch;
 
         /* Intercepts of various CPU instructions */
@@ -1320,10 +1313,11 @@ __init void lguest_init(void)
         set_lguest_basic_apic_ops();
 #endif
 
-        /* Time operations */
-        pv_time_ops.get_wallclock = lguest_get_wallclock;
-        pv_time_ops.time_init = lguest_time_init;
-        pv_time_ops.get_tsc_khz = lguest_tsc_khz;
+        x86_init.resources.memory_setup = lguest_memory_setup;
+        x86_init.irqs.intr_init = lguest_init_IRQ;
+        x86_init.timers.timer_init = lguest_time_init;
+        x86_platform.calibrate_tsc = lguest_tsc_khz;
+        x86_platform.get_wallclock =  lguest_get_wallclock;
 
         /*
          * Now is a good time to look at the implementations of these functions
@@ -1365,10 +1359,13 @@ __init void lguest_init(void)
 
         /*
          * If we don't initialize the lock dependency checker now, it crashes
-         * paravirt_disable_iospace.
+         * atomic_notifier_chain_register, then paravirt_disable_iospace.
          */
         lockdep_init();
 
+        /* Hook in our special panic hypercall code. */
+        atomic_notifier_chain_register(&panic_notifier_list, &paniced);
+
         /*
          * The IDE code spends about 3 seconds probing for disks: if we reserve
          * all the I/O ports up front it can't get them and so doesn't probe.
diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
index 775a020990a5..f4cee9028cf0 100644
--- a/arch/x86/mm/fault.c
+++ b/arch/x86/mm/fault.c
@@ -10,7 +10,7 @@
 #include <linux/bootmem.h>              /* max_low_pfn                  */
 #include <linux/kprobes.h>              /* __kprobes, ...               */
 #include <linux/mmiotrace.h>            /* kmmio_handler, ...           */
-#include <linux/perf_counter.h>         /* perf_swcounter_event         */
+#include <linux/perf_event.h>           /* perf_sw_event                */
 
 #include <asm/traps.h>                  /* dotraplinkage, ...           */
 #include <asm/pgalloc.h>                /* pgd_*(), ...                 */
@@ -167,6 +167,7 @@ force_sig_info_fault(int si_signo, int si_code, unsigned long address,
         info.si_errno   = 0;
         info.si_code    = si_code;
         info.si_addr    = (void __user *)address;
+        info.si_addr_lsb = si_code == BUS_MCEERR_AR ? PAGE_SHIFT : 0;
 
         force_sig_info(si_signo, &info, tsk);
 }
@@ -790,10 +791,12 @@ out_of_memory(struct pt_regs *regs, unsigned long error_code,
 }
 
 static void
-do_sigbus(struct pt_regs *regs, unsigned long error_code, unsigned long address)
+do_sigbus(struct pt_regs *regs, unsigned long error_code, unsigned long address,
+          unsigned int fault)
 {
         struct task_struct *tsk = current;
         struct mm_struct *mm = tsk->mm;
+        int code = BUS_ADRERR;
 
         up_read(&mm->mmap_sem);
 
@@ -809,7 +812,15 @@ do_sigbus(struct pt_regs *regs, unsigned long error_code, unsigned long address)
         tsk->thread.error_code  = error_code;
         tsk->thread.trap_no     = 14;
 
-        force_sig_info_fault(SIGBUS, BUS_ADRERR, address, tsk);
+#ifdef CONFIG_MEMORY_FAILURE
+        if (fault & VM_FAULT_HWPOISON) {
+                printk(KERN_ERR
+        "MCE: Killing %s:%d due to hardware memory corruption fault at %lx\n",
+                        tsk->comm, tsk->pid, address);
+                code = BUS_MCEERR_AR;
+        }
+#endif
+        force_sig_info_fault(SIGBUS, code, address, tsk);
 }
 
 static noinline void
@@ -819,8 +830,8 @@ mm_fault_error(struct pt_regs *regs, unsigned long error_code,
         if (fault & VM_FAULT_OOM) {
                 out_of_memory(regs, error_code, address);
         } else {
-                if (fault & VM_FAULT_SIGBUS)
-                        do_sigbus(regs, error_code, address);
+                if (fault & (VM_FAULT_SIGBUS|VM_FAULT_HWPOISON))
+                        do_sigbus(regs, error_code, address, fault);
                 else
                         BUG();
         }
@@ -1017,7 +1028,7 @@ do_page_fault(struct pt_regs *regs, unsigned long error_code)
         if (unlikely(error_code & PF_RSVD))
                 pgtable_bad(regs, error_code, address);
 
-        perf_swcounter_event(PERF_COUNT_SW_PAGE_FAULTS, 1, 0, regs, address);
+        perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, 0, regs, address);
 
         /*
          * If we're in an interrupt, have no user context or are running
@@ -1114,11 +1125,11 @@ good_area:
 
         if (fault & VM_FAULT_MAJOR) {
                 tsk->maj_flt++;
-                perf_swcounter_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, 0,
+                perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, 0,
                                      regs, address);
         } else {
                 tsk->min_flt++;
-                perf_swcounter_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, 0,
+                perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, 0,
                                      regs, address);
         }
 
diff --git a/arch/x86/mm/init_32.c b/arch/x86/mm/init_32.c
index 3cd7711bb949..30938c1d8d5d 100644
--- a/arch/x86/mm/init_32.c
+++ b/arch/x86/mm/init_32.c
@@ -84,7 +84,7 @@ static pmd_t * __init one_md_table_init(pgd_t *pgd)
 #ifdef CONFIG_X86_PAE
         if (!(pgd_val(*pgd) & _PAGE_PRESENT)) {
                 if (after_bootmem)
-                        pmd_table = (pmd_t *)alloc_bootmem_low_pages(PAGE_SIZE);
+                        pmd_table = (pmd_t *)alloc_bootmem_pages(PAGE_SIZE);
                 else
                         pmd_table = (pmd_t *)alloc_low_page();
                 paravirt_alloc_pmd(&init_mm, __pa(pmd_table) >> PAGE_SHIFT);
@@ -116,7 +116,7 @@ static pte_t * __init one_page_table_init(pmd_t *pmd)
 #endif
                         if (!page_table)
                                 page_table =
-                                (pte_t *)alloc_bootmem_low_pages(PAGE_SIZE);
+                                (pte_t *)alloc_bootmem_pages(PAGE_SIZE);
                 } else
                         page_table = (pte_t *)alloc_low_page();
 
@@ -857,8 +857,6 @@ static void __init test_wp_bit(void)
         }
 }
 
-static struct kcore_list kcore_mem, kcore_vmalloc;
-
 void __init mem_init(void)
 {
         int codesize, reservedpages, datasize, initsize;
@@ -886,13 +884,9 @@ void __init mem_init(void)
         datasize =  (unsigned long) &_edata - (unsigned long) &_etext;
         initsize =  (unsigned long) &__init_end - (unsigned long) &__init_begin;
 
-        kclist_add(&kcore_mem, __va(0), max_low_pfn << PAGE_SHIFT);
-        kclist_add(&kcore_vmalloc, (void *)VMALLOC_START,
-                   VMALLOC_END-VMALLOC_START);
-
         printk(KERN_INFO "Memory: %luk/%luk available (%dk kernel code, "
                         "%dk reserved, %dk data, %dk init, %ldk highmem)\n",
-                (unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
+                nr_free_pages() << (PAGE_SHIFT-10),
                 num_physpages << (PAGE_SHIFT-10),
                 codesize >> 10,
                 reservedpages << (PAGE_SHIFT-10),
diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c
index ea56b8cbb6a6..5a4398a6006b 100644
--- a/arch/x86/mm/init_64.c
+++ b/arch/x86/mm/init_64.c
@@ -647,8 +647,7 @@ EXPORT_SYMBOL_GPL(memory_add_physaddr_to_nid);
 
 #endif /* CONFIG_MEMORY_HOTPLUG */
 
-static struct kcore_list kcore_mem, kcore_vmalloc, kcore_kernel,
-                         kcore_modules, kcore_vsyscall;
+static struct kcore_list kcore_vsyscall;
 
 void __init mem_init(void)
 {
@@ -677,17 +676,12 @@ void __init mem_init(void)
         initsize =  (unsigned long) &__init_end - (unsigned long) &__init_begin;
 
         /* Register memory areas for /proc/kcore */
-        kclist_add(&kcore_mem, __va(0), max_low_pfn << PAGE_SHIFT);
-        kclist_add(&kcore_vmalloc, (void *)VMALLOC_START,
-                   VMALLOC_END-VMALLOC_START);
-        kclist_add(&kcore_kernel, &_stext, _end - _stext);
-        kclist_add(&kcore_modules, (void *)MODULES_VADDR, MODULES_LEN);
         kclist_add(&kcore_vsyscall, (void *)VSYSCALL_START,
-                                 VSYSCALL_END - VSYSCALL_START);
+                         VSYSCALL_END - VSYSCALL_START, KCORE_OTHER);
 
         printk(KERN_INFO "Memory: %luk/%luk available (%ldk kernel code, "
                          "%ldk absent, %ldk reserved, %ldk data, %ldk init)\n",
-                (unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
+                nr_free_pages() << (PAGE_SHIFT-10),
                 max_pfn << (PAGE_SHIFT-10),
                 codesize >> 10,
                 absent_pages << (PAGE_SHIFT-10),
diff --git a/arch/x86/mm/kmemcheck/kmemcheck.c b/arch/x86/mm/kmemcheck/kmemcheck.c
index 528bf954eb74..8cc183344140 100644
--- a/arch/x86/mm/kmemcheck/kmemcheck.c
+++ b/arch/x86/mm/kmemcheck/kmemcheck.c
@@ -225,9 +225,6 @@ void kmemcheck_hide(struct pt_regs *regs)
 
         BUG_ON(!irqs_disabled());
 
-        if (data->balance == 0)
-                return;
-
         if (unlikely(data->balance != 1)) {
                 kmemcheck_show_all();
                 kmemcheck_error_save_bug(regs);
diff --git a/arch/x86/mm/kmemcheck/shadow.c b/arch/x86/mm/kmemcheck/shadow.c
index e773b6bd0079..3f66b82076a3 100644
--- a/arch/x86/mm/kmemcheck/shadow.c
+++ b/arch/x86/mm/kmemcheck/shadow.c
@@ -1,7 +1,6 @@
 #include <linux/kmemcheck.h>
 #include <linux/module.h>
 #include <linux/mm.h>
-#include <linux/module.h>
 
 #include <asm/page.h>
 #include <asm/pgtable.h>
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 24952fdc7e40..dd38bfbefd1f 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -144,6 +144,7 @@ void clflush_cache_range(void *vaddr, unsigned int size)
 
         mb();
 }
+EXPORT_SYMBOL_GPL(clflush_cache_range);
 
 static void __cpa_flush_all(void *arg)
 {
diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
index c814e144a3f0..36fe08eeb5c3 100644
--- a/arch/x86/mm/tlb.c
+++ b/arch/x86/mm/tlb.c
@@ -59,7 +59,8 @@ void leave_mm(int cpu)
 {
         if (percpu_read(cpu_tlbstate.state) == TLBSTATE_OK)
                 BUG();
-        cpu_clear(cpu, percpu_read(cpu_tlbstate.active_mm)->cpu_vm_mask);
+        cpumask_clear_cpu(cpu,
+                          mm_cpumask(percpu_read(cpu_tlbstate.active_mm)));
         load_cr3(swapper_pg_dir);
 }
 EXPORT_SYMBOL_GPL(leave_mm);
@@ -234,8 +235,8 @@ void flush_tlb_current_task(void)
         preempt_disable();
 
         local_flush_tlb();
-        if (cpumask_any_but(&mm->cpu_vm_mask, smp_processor_id()) < nr_cpu_ids)
-                flush_tlb_others(&mm->cpu_vm_mask, mm, TLB_FLUSH_ALL);
+        if (cpumask_any_but(mm_cpumask(mm), smp_processor_id()) < nr_cpu_ids)
+                flush_tlb_others(mm_cpumask(mm), mm, TLB_FLUSH_ALL);
         preempt_enable();
 }
 
@@ -249,8 +250,8 @@ void flush_tlb_mm(struct mm_struct *mm)
                 else
                         leave_mm(smp_processor_id());
         }
-        if (cpumask_any_but(&mm->cpu_vm_mask, smp_processor_id()) < nr_cpu_ids)
-                flush_tlb_others(&mm->cpu_vm_mask, mm, TLB_FLUSH_ALL);
+        if (cpumask_any_but(mm_cpumask(mm), smp_processor_id()) < nr_cpu_ids)
+                flush_tlb_others(mm_cpumask(mm), mm, TLB_FLUSH_ALL);
 
         preempt_enable();
 }
@@ -268,8 +269,8 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long va)
                         leave_mm(smp_processor_id());
         }
 
-        if (cpumask_any_but(&mm->cpu_vm_mask, smp_processor_id()) < nr_cpu_ids)
-                flush_tlb_others(&mm->cpu_vm_mask, mm, va);
+        if (cpumask_any_but(mm_cpumask(mm), smp_processor_id()) < nr_cpu_ids)
+                flush_tlb_others(mm_cpumask(mm), mm, va);
 
         preempt_enable();
 }
diff --git a/arch/x86/oprofile/op_model_ppro.c b/arch/x86/oprofile/op_model_ppro.c
index 4899215999de..8eb05878554c 100644
--- a/arch/x86/oprofile/op_model_ppro.c
+++ b/arch/x86/oprofile/op_model_ppro.c
@@ -234,11 +234,11 @@ static void arch_perfmon_setup_counters(void)
         if (eax.split.version_id == 0 && current_cpu_data.x86 == 6 &&
                 current_cpu_data.x86_model == 15) {
                 eax.split.version_id = 2;
-                eax.split.num_counters = 2;
+                eax.split.num_events = 2;
                 eax.split.bit_width = 40;
         }
 
-        num_counters = eax.split.num_counters;
+        num_counters = eax.split.num_events;
 
         op_arch_perfmon_spec.num_counters = num_counters;
         op_arch_perfmon_spec.num_controls = num_counters;
diff --git a/arch/x86/oprofile/op_x86_model.h b/arch/x86/oprofile/op_x86_model.h
index b83776180c7f..7b8e75d16081 100644
--- a/arch/x86/oprofile/op_x86_model.h
+++ b/arch/x86/oprofile/op_x86_model.h
@@ -13,7 +13,7 @@
 #define OP_X86_MODEL_H
 
 #include <asm/types.h>
-#include <asm/perf_counter.h>
+#include <asm/perf_event.h>
 
 struct op_msr {
         unsigned long   addr;
diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c
index 5db96d4304de..1331fcf26143 100644
--- a/arch/x86/pci/common.c
+++ b/arch/x86/pci/common.c
@@ -646,7 +646,7 @@ int get_mp_bus_to_node(int busnum)
 
 #else /* CONFIG_X86_32 */
 
-static unsigned char mp_bus_to_node[BUS_NR] = {
+static int mp_bus_to_node[BUS_NR] = {
         [0 ... BUS_NR - 1] = -1
 };
 
diff --git a/arch/x86/pci/mmconfig-shared.c b/arch/x86/pci/mmconfig-shared.c
index 712443ec6d43..602c172d3bd5 100644
--- a/arch/x86/pci/mmconfig-shared.c
+++ b/arch/x86/pci/mmconfig-shared.c
@@ -13,10 +13,14 @@
 #include <linux/pci.h>
 #include <linux/init.h>
 #include <linux/acpi.h>
+#include <linux/sfi_acpi.h>
 #include <linux/bitmap.h>
 #include <linux/sort.h>
 #include <asm/e820.h>
 #include <asm/pci_x86.h>
+#include <asm/acpi.h>
+
+#define PREFIX "PCI: "
 
 /* aperture is up to 256MB but BIOS may reserve less */
 #define MMCONFIG_APER_MIN       (2 * 1024*1024)
@@ -491,7 +495,7 @@ static void __init pci_mmcfg_reject_broken(int early)
                        (unsigned int)cfg->start_bus_number,
                        (unsigned int)cfg->end_bus_number);
 
-                if (!early)
+                if (!early && !acpi_disabled)
                         valid = is_mmconf_reserved(is_acpi_reserved, addr, size, i, cfg, 0);
 
                 if (valid)
@@ -606,7 +610,7 @@ static void __init __pci_mmcfg_init(int early)
         }
 
         if (!known_bridge)
-                acpi_table_parse(ACPI_SIG_MCFG, pci_parse_mcfg);
+                acpi_sfi_table_parse(ACPI_SIG_MCFG, pci_parse_mcfg);
 
         pci_mmcfg_reject_broken(early);
 
diff --git a/arch/x86/pci/mmconfig_32.c b/arch/x86/pci/mmconfig_32.c
index 8b2d561046a3..f10a7e94a84c 100644
--- a/arch/x86/pci/mmconfig_32.c
+++ b/arch/x86/pci/mmconfig_32.c
@@ -11,9 +11,9 @@
 
 #include <linux/pci.h>
 #include <linux/init.h>
-#include <linux/acpi.h>
 #include <asm/e820.h>
 #include <asm/pci_x86.h>
+#include <acpi/acpi.h>
 
 /* Assume systems with more busses have correct MCFG */
 #define mmcfg_virt_addr ((void __iomem *) fix_to_virt(FIX_PCIE_MCFG))
diff --git a/arch/x86/power/cpu.c b/arch/x86/power/cpu.c
index 417c9f5b4afa..8aa85f17667e 100644
--- a/arch/x86/power/cpu.c
+++ b/arch/x86/power/cpu.c
@@ -243,10 +243,6 @@ static void __restore_processor_state(struct saved_context *ctxt)
 
         do_fpu_end();
         mtrr_bp_restore();
-
-#ifdef CONFIG_X86_OLD_MCE
-        mcheck_init(&boot_cpu_data);
-#endif
 }
 
 /* Needed by apm.c */
diff --git a/arch/x86/vdso/Makefile b/arch/x86/vdso/Makefile
index 88112b49f02c..6b4ffedb93c9 100644
--- a/arch/x86/vdso/Makefile
+++ b/arch/x86/vdso/Makefile
@@ -122,7 +122,7 @@ quiet_cmd_vdso = VDSO    $@
                        $(VDSO_LDFLAGS) $(VDSO_LDFLAGS_$(filter %.lds,$(^F))) \
                        -Wl,-T,$(filter %.lds,$^) $(filter %.o,$^)
 
-VDSO_LDFLAGS = -fPIC -shared $(call ld-option, -Wl$(comma)--hash-style=sysv)
+VDSO_LDFLAGS = -fPIC -shared $(call cc-ldoption, -Wl$(comma)--hash-style=sysv)
 GCOV_PROFILE := n
 
 #
diff --git a/arch/x86/vdso/vclock_gettime.c b/arch/x86/vdso/vclock_gettime.c
index 6a40b78b46aa..ee55754cc3c5 100644
--- a/arch/x86/vdso/vclock_gettime.c
+++ b/arch/x86/vdso/vclock_gettime.c
@@ -86,14 +86,47 @@ notrace static noinline int do_monotonic(struct timespec *ts)
         return 0;
 }
 
+notrace static noinline int do_realtime_coarse(struct timespec *ts)
+{
+        unsigned long seq;
+        do {
+                seq = read_seqbegin(&gtod->lock);
+                ts->tv_sec = gtod->wall_time_coarse.tv_sec;
+                ts->tv_nsec = gtod->wall_time_coarse.tv_nsec;
+        } while (unlikely(read_seqretry(&gtod->lock, seq)));
+        return 0;
+}
+
+notrace static noinline int do_monotonic_coarse(struct timespec *ts)
+{
+        unsigned long seq, ns, secs;
+        do {
+                seq = read_seqbegin(&gtod->lock);
+                secs = gtod->wall_time_coarse.tv_sec;
+                ns = gtod->wall_time_coarse.tv_nsec;
+                secs += gtod->wall_to_monotonic.tv_sec;
+                ns += gtod->wall_to_monotonic.tv_nsec;
+        } while (unlikely(read_seqretry(&gtod->lock, seq)));
+        vset_normalized_timespec(ts, secs, ns);
+        return 0;
+}
+
 notrace int __vdso_clock_gettime(clockid_t clock, struct timespec *ts)
 {
-        if (likely(gtod->sysctl_enabled && gtod->clock.vread))
+        if (likely(gtod->sysctl_enabled))
                 switch (clock) {
                 case CLOCK_REALTIME:
-                        return do_realtime(ts);
+                        if (likely(gtod->clock.vread))
+                                return do_realtime(ts);
+                        break;
                 case CLOCK_MONOTONIC:
-                        return do_monotonic(ts);
+                        if (likely(gtod->clock.vread))
+                                return do_monotonic(ts);
+                        break;
+                case CLOCK_REALTIME_COARSE:
+                        return do_realtime_coarse(ts);
+                case CLOCK_MONOTONIC_COARSE:
+                        return do_monotonic_coarse(ts);
                 }
         return vdso_fallback_gettime(clock, ts);
 }
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index 0dd0c2c6cae0..544eb7496531 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -912,19 +912,9 @@ static const struct pv_info xen_info __initdata = {
 
 static const struct pv_init_ops xen_init_ops __initdata = {
         .patch = xen_patch,
-
-        .banner = xen_banner,
-        .memory_setup = xen_memory_setup,
-        .arch_setup = xen_arch_setup,
-        .post_allocator_init = xen_post_allocator_init,
 };
 
 static const struct pv_time_ops xen_time_ops __initdata = {
-        .time_init = xen_time_init,
-
-        .set_wallclock = xen_set_wallclock,
-        .get_wallclock = xen_get_wallclock,
-        .get_tsc_khz = xen_tsc_khz,
         .sched_clock = xen_sched_clock,
 };
 
@@ -990,8 +980,6 @@ static const struct pv_cpu_ops xen_cpu_ops __initdata = {
 
 static const struct pv_apic_ops xen_apic_ops __initdata = {
 #ifdef CONFIG_X86_LOCAL_APIC
-        .setup_boot_clock = paravirt_nop,
-        .setup_secondary_clock = paravirt_nop,
         .startup_ipi_hook = paravirt_nop,
 #endif
 };
@@ -1070,7 +1058,18 @@ asmlinkage void __init xen_start_kernel(void)
         pv_time_ops = xen_time_ops;
         pv_cpu_ops = xen_cpu_ops;
         pv_apic_ops = xen_apic_ops;
-        pv_mmu_ops = xen_mmu_ops;
+
+        x86_init.resources.memory_setup = xen_memory_setup;
+        x86_init.oem.arch_setup = xen_arch_setup;
+        x86_init.oem.banner = xen_banner;
+
+        x86_init.timers.timer_init = xen_time_init;
+        x86_init.timers.setup_percpu_clockev = x86_init_noop;
+        x86_cpuinit.setup_percpu_clockev = x86_init_noop;
+
+        x86_platform.calibrate_tsc = xen_tsc_khz;
+        x86_platform.get_wallclock = xen_get_wallclock;
+        x86_platform.set_wallclock = xen_set_wallclock;
 
         /*
          * Set up some pagetable state before starting to set any ptes.
@@ -1095,6 +1094,7 @@ asmlinkage void __init xen_start_kernel(void)
          */
         xen_setup_stackprotector();
 
+        xen_init_mmu_ops();
         xen_init_irq_ops();
         xen_init_cpuid_mask();
 
diff --git a/arch/x86/xen/irq.c b/arch/x86/xen/irq.c
index cfd17799bd6d..9d30105a0c4a 100644
--- a/arch/x86/xen/irq.c
+++ b/arch/x86/xen/irq.c
@@ -1,5 +1,7 @@
 #include <linux/hardirq.h>
 
+#include <asm/x86_init.h>
+
 #include <xen/interface/xen.h>
 #include <xen/interface/sched.h>
 #include <xen/interface/vcpu.h>
@@ -112,8 +114,6 @@ static void xen_halt(void)
 }
 
 static const struct pv_irq_ops xen_irq_ops __initdata = {
-        .init_IRQ = xen_init_IRQ,
-
         .save_fl = PV_CALLEE_SAVE(xen_save_fl),
         .restore_fl = PV_CALLEE_SAVE(xen_restore_fl),
         .irq_disable = PV_CALLEE_SAVE(xen_irq_disable),
@@ -129,4 +129,5 @@ static const struct pv_irq_ops xen_irq_ops __initdata = {
 void __init xen_init_irq_ops()
 {
         pv_irq_ops = xen_irq_ops;
+        x86_init.irqs.intr_init = xen_init_IRQ;
 }
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index 4ceb28581652..3bf7b1d250ce 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -1165,14 +1165,14 @@ static void xen_drop_mm_ref(struct mm_struct *mm)
         /* Get the "official" set of cpus referring to our pagetable. */
         if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) {
                 for_each_online_cpu(cpu) {
-                        if (!cpumask_test_cpu(cpu, &mm->cpu_vm_mask)
+                        if (!cpumask_test_cpu(cpu, mm_cpumask(mm))
                             && per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd))
                                 continue;
                         smp_call_function_single(cpu, drop_other_mm_ref, mm, 1);
                 }
                 return;
         }
-        cpumask_copy(mask, &mm->cpu_vm_mask);
+        cpumask_copy(mask, mm_cpumask(mm));
 
         /* It's possible that a vcpu may have a stale reference to our
            cr3, because its in lazy mode, and it hasn't yet flushed
@@ -1229,9 +1229,12 @@ static __init void xen_pagetable_setup_start(pgd_t *base)
 {
 }
 
+static void xen_post_allocator_init(void);
+
 static __init void xen_pagetable_setup_done(pgd_t *base)
 {
         xen_setup_shared_info();
+        xen_post_allocator_init();
 }
 
 static void xen_write_cr2(unsigned long cr2)
@@ -1841,7 +1844,7 @@ static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)
 #endif
 }
 
-__init void xen_post_allocator_init(void)
+static __init void xen_post_allocator_init(void)
 {
         pv_mmu_ops.set_pte = xen_set_pte;
         pv_mmu_ops.set_pmd = xen_set_pmd;
@@ -1875,10 +1878,7 @@ static void xen_leave_lazy_mmu(void)
         preempt_enable();
 }
 
-const struct pv_mmu_ops xen_mmu_ops __initdata = {
-        .pagetable_setup_start = xen_pagetable_setup_start,
-        .pagetable_setup_done = xen_pagetable_setup_done,
-
+static const struct pv_mmu_ops xen_mmu_ops __initdata = {
         .read_cr2 = xen_read_cr2,
         .write_cr2 = xen_write_cr2,
 
@@ -1954,6 +1954,12 @@ const struct pv_mmu_ops xen_mmu_ops __initdata = {
         .set_fixmap = xen_set_fixmap,
 };
 
+void __init xen_init_mmu_ops(void)
+{
+        x86_init.paging.pagetable_setup_start = xen_pagetable_setup_start;
+        x86_init.paging.pagetable_setup_done = xen_pagetable_setup_done;
+        pv_mmu_ops = xen_mmu_ops;
+}
 
 #ifdef CONFIG_XEN_DEBUG_FS
 
diff --git a/arch/x86/xen/mmu.h b/arch/x86/xen/mmu.h
index da7302624897..5fe6bc7f5ecf 100644
--- a/arch/x86/xen/mmu.h
+++ b/arch/x86/xen/mmu.h
@@ -59,5 +59,5 @@ void  xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
 
 unsigned long xen_read_cr2_direct(void);
 
-extern const struct pv_mmu_ops xen_mmu_ops;
+extern void xen_init_mmu_ops(void);
 #endif  /* _XEN_MMU_H */
diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h
index 22494fd4c9b5..355fa6b99c9c 100644
--- a/arch/x86/xen/xen-ops.h
+++ b/arch/x86/xen/xen-ops.h
@@ -30,8 +30,6 @@ pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn);
 void xen_ident_map_ISA(void);
 void xen_reserve_top(void);
 
-void xen_post_allocator_init(void);
-
 char * __init xen_memory_setup(void);
 void __init xen_arch_setup(void);
 void __init xen_init_IRQ(void);