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author | Ingo Molnar <mingo@elte.hu> | 2012-02-24 10:26:39 -0500 |
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committer | Ingo Molnar <mingo@elte.hu> | 2012-02-24 10:26:39 -0500 |
commit | 11b91d6fe7272452c999573bab33c15c2f03dc31 (patch) | |
tree | 45302d4a070ac380b655f30c04bf7af4d0b3a9c8 /arch/x86 | |
parent | 4e9f44ba29f20484615a461244bfd3a419391490 (diff) | |
parent | 08dda402d60a721ac94e79efd7646b332be3e3b2 (diff) |
Merge tag 'mce-recovery-for-tip' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras into x86/mce
Add symbolic defines for architectural MCACOD constants
Diffstat (limited to 'arch/x86')
-rw-r--r-- | arch/x86/kernel/cpu/mcheck/mce-severity.c | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/arch/x86/kernel/cpu/mcheck/mce-severity.c b/arch/x86/kernel/cpu/mcheck/mce-severity.c index f6c92f99efa0..0c82091b1652 100644 --- a/arch/x86/kernel/cpu/mcheck/mce-severity.c +++ b/arch/x86/kernel/cpu/mcheck/mce-severity.c | |||
@@ -56,6 +56,12 @@ static struct severity { | |||
56 | #define MCI_UC_SAR (MCI_STATUS_UC|MCI_STATUS_S|MCI_STATUS_AR) | 56 | #define MCI_UC_SAR (MCI_STATUS_UC|MCI_STATUS_S|MCI_STATUS_AR) |
57 | #define MCI_ADDR (MCI_STATUS_ADDRV|MCI_STATUS_MISCV) | 57 | #define MCI_ADDR (MCI_STATUS_ADDRV|MCI_STATUS_MISCV) |
58 | #define MCACOD 0xffff | 58 | #define MCACOD 0xffff |
59 | /* Architecturally defined codes from SDM Vol. 3B Chapter 15 */ | ||
60 | #define MCACOD_SCRUB 0x00C0 /* 0xC0-0xCF Memory Scrubbing */ | ||
61 | #define MCACOD_SCRUBMSK 0xfff0 | ||
62 | #define MCACOD_L3WB 0x017A /* L3 Explicit Writeback */ | ||
63 | #define MCACOD_DATA 0x0134 /* Data Load */ | ||
64 | #define MCACOD_INSTR 0x0150 /* Instruction Fetch */ | ||
59 | 65 | ||
60 | MCESEV( | 66 | MCESEV( |
61 | NO, "Invalid", | 67 | NO, "Invalid", |
@@ -112,12 +118,12 @@ static struct severity { | |||
112 | #ifdef CONFIG_MEMORY_FAILURE | 118 | #ifdef CONFIG_MEMORY_FAILURE |
113 | MCESEV( | 119 | MCESEV( |
114 | KEEP, "HT thread notices Action required: data load error", | 120 | KEEP, "HT thread notices Action required: data load error", |
115 | SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|0x0134), | 121 | SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_DATA), |
116 | MCGMASK(MCG_STATUS_EIPV, 0) | 122 | MCGMASK(MCG_STATUS_EIPV, 0) |
117 | ), | 123 | ), |
118 | MCESEV( | 124 | MCESEV( |
119 | AR, "Action required: data load error", | 125 | AR, "Action required: data load error", |
120 | SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|0x0134), | 126 | SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_DATA), |
121 | USER | 127 | USER |
122 | ), | 128 | ), |
123 | #endif | 129 | #endif |
@@ -129,11 +135,11 @@ static struct severity { | |||
129 | /* known AO MCACODs: */ | 135 | /* known AO MCACODs: */ |
130 | MCESEV( | 136 | MCESEV( |
131 | AO, "Action optional: memory scrubbing error", | 137 | AO, "Action optional: memory scrubbing error", |
132 | SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|0xfff0, MCI_UC_S|0x00c0) | 138 | SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCACOD_SCRUBMSK, MCI_UC_S|MCACOD_SCRUB) |
133 | ), | 139 | ), |
134 | MCESEV( | 140 | MCESEV( |
135 | AO, "Action optional: last level cache writeback error", | 141 | AO, "Action optional: last level cache writeback error", |
136 | SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCACOD, MCI_UC_S|0x017a) | 142 | SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCACOD, MCI_UC_S|MCACOD_L3WB) |
137 | ), | 143 | ), |
138 | MCESEV( | 144 | MCESEV( |
139 | SOME, "Action optional: unknown MCACOD", | 145 | SOME, "Action optional: unknown MCACOD", |