diff options
author | Roedel, Joerg <Joerg.Roedel@amd.com> | 2011-05-19 05:13:39 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2011-05-20 06:57:18 -0400 |
commit | d47cc0db8fd6011de2248df505fc34990b7451bf (patch) | |
tree | a019570daeba6e6f9ad3410b9adf2d0c2760223b /arch/x86 | |
parent | 257313b2a87795e07a0bdf58d0fffbdba8b31051 (diff) |
x86, amd: Use _safe() msr access for GartTlbWlk disable code
The workaround for Bugzilla:
https://bugzilla.kernel.org/show_bug.cgi?id=33012
introduced a read and a write to the MC4 mask msr.
Unfortunatly this MSR is not emulated by the KVM hypervisor
so that the kernel will get a #GP and crashes when applying
this workaround when running inside KVM.
This issue was reported as:
https://bugzilla.kernel.org/show_bug.cgi?id=35132
and is fixed with this patch. The change just let the kernel
ignore any #GP it gets while accessing this MSR by using the
_safe msr access methods.
Reported-by: Török Edwin <edwintorok@gmail.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Cc: Rafael J. Wysocki <rjw@sisk.pl>
Cc: Maciej Rutecki <maciej.rutecki@gmail.com>
Cc: Avi Kivity <avi@redhat.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: <stable@kernel.org> # .39.x
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86')
-rw-r--r-- | arch/x86/kernel/cpu/amd.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index 6f9d1f6063e9..8f5cabb3c5b0 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c | |||
@@ -629,10 +629,13 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) | |||
629 | * Fixes: https://bugzilla.kernel.org/show_bug.cgi?id=33012 | 629 | * Fixes: https://bugzilla.kernel.org/show_bug.cgi?id=33012 |
630 | */ | 630 | */ |
631 | u64 mask; | 631 | u64 mask; |
632 | int err; | ||
632 | 633 | ||
633 | rdmsrl(MSR_AMD64_MCx_MASK(4), mask); | 634 | err = rdmsrl_safe(MSR_AMD64_MCx_MASK(4), &mask); |
634 | mask |= (1 << 10); | 635 | if (err == 0) { |
635 | wrmsrl(MSR_AMD64_MCx_MASK(4), mask); | 636 | mask |= (1 << 10); |
637 | checking_wrmsrl(MSR_AMD64_MCx_MASK(4), mask); | ||
638 | } | ||
636 | } | 639 | } |
637 | } | 640 | } |
638 | 641 | ||