Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6

30 files changed, 311 insertions, 249 deletions

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 45161b816313..748e50a1a152 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -165,6 +165,9 @@ config AUDIT_ARCH
 config ARCH_SUPPORTS_OPTIMIZED_INLINING
         def_bool y
 
+config ARCH_SUPPORTS_DEBUG_PAGEALLOC
+        def_bool y
+
 # Use the generic interrupt handling code in kernel/irq/:
 config GENERIC_HARDIRQS
         bool
diff --git a/arch/x86/Kconfig.debug b/arch/x86/Kconfig.debug
index fdb45df608b6..a345cb5447a8 100644
--- a/arch/x86/Kconfig.debug
+++ b/arch/x86/Kconfig.debug
@@ -75,6 +75,7 @@ config DEBUG_STACK_USAGE
 config DEBUG_PAGEALLOC
         bool "Debug page memory allocations"
         depends on DEBUG_KERNEL
+        depends on ARCH_SUPPORTS_DEBUG_PAGEALLOC
         ---help---
           Unmap pages from the kernel linear mapping after free_pages().
           This results in a large slowdown, but helps to find certain types
diff --git a/arch/x86/boot/memory.c b/arch/x86/boot/memory.c
index 8c3c25f35578..5054c2ddd1a0 100644
--- a/arch/x86/boot/memory.c
+++ b/arch/x86/boot/memory.c
@@ -2,6 +2,7 @@
  *
  *   Copyright (C) 1991, 1992 Linus Torvalds
  *   Copyright 2007 rPath, Inc. - All Rights Reserved
+ *   Copyright 2009 Intel Corporation; author H. Peter Anvin
  *
  *   This file is part of the Linux kernel, and is made available under
  *   the terms of the GNU General Public License version 2.
@@ -16,24 +17,38 @@
 
 #define SMAP    0x534d4150      /* ASCII "SMAP" */
 
+struct e820_ext_entry {
+        struct e820entry std;
+        u32 ext_flags;
+} __attribute__((packed));
+
 static int detect_memory_e820(void)
 {
         int count = 0;
         u32 next = 0;
-        u32 size, id;
+        u32 size, id, edi;
         u8 err;
         struct e820entry *desc = boot_params.e820_map;
+        static struct e820_ext_entry buf; /* static so it is zeroed */
+
+        /*
+         * Set this here so that if the BIOS doesn't change this field
+         * but still doesn't change %ecx, we're still okay...
+         */
+        buf.ext_flags = 1;
 
         do {
-                size = sizeof(struct e820entry);
+                size = sizeof buf;
 
-                /* Important: %edx is clobbered by some BIOSes,
-                   so it must be either used for the error output
-                   or explicitly marked clobbered. */
-                asm("int $0x15; setc %0"
+                /* Important: %edx and %esi are clobbered by some BIOSes,
+                   so they must be either used for the error output
+                   or explicitly marked clobbered.  Given that, assume there
+                   is something out there clobbering %ebp and %edi, too. */
+                asm("pushl %%ebp; int $0x15; popl %%ebp; setc %0"
                     : "=d" (err), "+b" (next), "=a" (id), "+c" (size),
-                      "=m" (*desc)
-                    : "D" (desc), "d" (SMAP), "a" (0xe820));
+                      "=D" (edi), "+m" (buf)
+                    : "D" (&buf), "d" (SMAP), "a" (0xe820)
+                    : "esi");
 
                 /* BIOSes which terminate the chain with CF = 1 as opposed
                    to %ebx = 0 don't always report the SMAP signature on
@@ -51,8 +66,14 @@ static int detect_memory_e820(void)
                         break;
                 }
 
+                /* ACPI 3.0 added the extended flags support.  If bit 0
+                   in the extended flags is zero, we're supposed to simply
+                   ignore the entry -- a backwards incompatible change! */
+                if (size > 20 && !(buf.ext_flags & 1))
+                        continue;
+
+                *desc++ = buf.std;
                 count++;
-                desc++;
         } while (next && count < ARRAY_SIZE(boot_params.e820_map));
 
         return boot_params.e820_entries = count;
diff --git a/arch/x86/include/asm/lguest_hcall.h b/arch/x86/include/asm/lguest_hcall.h
index 43894428c3c2..0f4ee7148afe 100644
--- a/arch/x86/include/asm/lguest_hcall.h
+++ b/arch/x86/include/asm/lguest_hcall.h
@@ -26,36 +26,20 @@
 
 #ifndef __ASSEMBLY__
 #include <asm/hw_irq.h>
+#include <asm/kvm_para.h>
 
 /*G:031 But first, how does our Guest contact the Host to ask for privileged
  * operations?  There are two ways: the direct way is to make a "hypercall",
  * to make requests of the Host Itself.
  *
- * Our hypercall mechanism uses the highest unused trap code (traps 32 and
- * above are used by real hardware interrupts).  Fifteen hypercalls are
+ * We use the KVM hypercall mechanism. Eighteen hypercalls are
  * available: the hypercall number is put in the %eax register, and the
- * arguments (when required) are placed in %edx, %ebx and %ecx.  If a return
+ * arguments (when required) are placed in %ebx, %ecx and %edx.  If a return
  * value makes sense, it's returned in %eax.
  *
  * Grossly invalid calls result in Sudden Death at the hands of the vengeful
  * Host, rather than returning failure.  This reflects Winston Churchill's
  * definition of a gentleman: "someone who is only rude intentionally". */
-static inline unsigned long
-hcall(unsigned long call,
-      unsigned long arg1, unsigned long arg2, unsigned long arg3)
-{
-        /* "int" is the Intel instruction to trigger a trap. */
-        asm volatile("int $" __stringify(LGUEST_TRAP_ENTRY)
-                     /* The call in %eax (aka "a") might be overwritten */
-                     : "=a"(call)
-                       /* The arguments are in %eax, %edx, %ebx & %ecx */
-                     : "a"(call), "d"(arg1), "b"(arg2), "c"(arg3)
-                       /* "memory" means this might write somewhere in memory.
-                        * This isn't true for all calls, but it's safe to tell
-                        * gcc that it might happen so it doesn't get clever. */
-                     : "memory");
-        return call;
-}
 /*:*/
 
 /* Can't use our min() macro here: needs to be a constant */
@@ -64,7 +48,7 @@ hcall(unsigned long call,
 #define LHCALL_RING_SIZE 64
 struct hcall_args {
         /* These map directly onto eax, ebx, ecx, edx in struct lguest_regs */
-        unsigned long arg0, arg2, arg3, arg1;
+        unsigned long arg0, arg1, arg2, arg3;
 };
 
 #endif /* !__ASSEMBLY__ */
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index a977de23cb4d..a0301bfeb954 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -86,6 +86,9 @@ static inline void early_quirks(void) { }
 
 extern void pci_iommu_alloc(void);
 
+/* MSI arch hook */
+#define arch_setup_msi_irqs arch_setup_msi_irqs
+
 #endif  /* __KERNEL__ */
 
 #ifdef CONFIG_X86_32
diff --git a/arch/x86/include/asm/suspend_32.h b/arch/x86/include/asm/suspend_32.h
index a5074bd0f8be..48dcfa62ea07 100644
--- a/arch/x86/include/asm/suspend_32.h
+++ b/arch/x86/include/asm/suspend_32.h
@@ -24,28 +24,4 @@ struct saved_context {
         unsigned long return_address;
 } __attribute__((packed));
 
-#ifdef CONFIG_ACPI
-extern unsigned long saved_eip;
-extern unsigned long saved_esp;
-extern unsigned long saved_ebp;
-extern unsigned long saved_ebx;
-extern unsigned long saved_esi;
-extern unsigned long saved_edi;
-
-static inline void acpi_save_register_state(unsigned long return_point)
-{
-        saved_eip = return_point;
-        asm volatile("movl %%esp,%0" : "=m" (saved_esp));
-        asm volatile("movl %%ebp,%0" : "=m" (saved_ebp));
-        asm volatile("movl %%ebx,%0" : "=m" (saved_ebx));
-        asm volatile("movl %%edi,%0" : "=m" (saved_edi));
-        asm volatile("movl %%esi,%0" : "=m" (saved_esi));
-}
-
-#define acpi_restore_register_state()  do {} while (0)
-
-/* routines for saving/restoring kernel state */
-extern int acpi_save_state_mem(void);
-#endif
-
 #endif /* _ASM_X86_SUSPEND_32_H */
diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h
index 77cfb2cfb386..744299c0b774 100644
--- a/arch/x86/include/asm/topology.h
+++ b/arch/x86/include/asm/topology.h
@@ -217,10 +217,6 @@ static inline cpumask_t node_to_cpumask(int node)
 {
         return cpu_online_map;
 }
-static inline int node_to_first_cpu(int node)
-{
-        return first_cpu(cpu_online_map);
-}
 
 static inline void setup_node_to_cpumask_map(void) { }
 
@@ -237,14 +233,6 @@ static inline void setup_node_to_cpumask_map(void) { }
 
 #include <asm-generic/topology.h>
 
-#ifdef CONFIG_NUMA
-/* Returns the number of the first CPU on Node 'node'. */
-static inline int node_to_first_cpu(int node)
-{
-        return cpumask_first(cpumask_of_node(node));
-}
-#endif
-
 extern cpumask_t cpu_coregroup_map(int cpu);
 extern const struct cpumask *cpu_coregroup_mask(int cpu);
 
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index da99ffcdfde6..1bb5c6cee3eb 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -3468,6 +3468,10 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
         struct intel_iommu *iommu = NULL;
         int index = 0;
 
+        /* x86 doesn't support multiple MSI yet */
+        if (type == PCI_CAP_ID_MSI && nvec > 1)
+                return 1;
+
         irq_want = nr_irqs_gsi;
         sub_handle = 0;
         list_for_each_entry(msidesc, &dev->msi_list, list) {
diff --git a/arch/x86/kernel/asm-offsets_32.c b/arch/x86/kernel/asm-offsets_32.c
index fbf2f33e3080..5a6aa1c1162f 100644
--- a/arch/x86/kernel/asm-offsets_32.c
+++ b/arch/x86/kernel/asm-offsets_32.c
@@ -18,6 +18,7 @@
 #include <asm/thread_info.h>
 #include <asm/bootparam.h>
 #include <asm/elf.h>
+#include <asm/suspend.h>
 
 #include <xen/interface/xen.h>
 
diff --git a/arch/x86/kernel/asm-offsets_64.c b/arch/x86/kernel/asm-offsets_64.c
index 8793ab33e2c1..e72f062fb4b5 100644
--- a/arch/x86/kernel/asm-offsets_64.c
+++ b/arch/x86/kernel/asm-offsets_64.c
@@ -16,6 +16,7 @@
 #include <asm/thread_info.h>
 #include <asm/ia32.h>
 #include <asm/bootparam.h>
+#include <asm/suspend.h>
 
 #include <xen/interface/xen.h>
 
diff --git a/arch/x86/kernel/cpu/mtrr/if.c b/arch/x86/kernel/cpu/mtrr/if.c
index 4c4214690dd1..fb73a52913a4 100644
--- a/arch/x86/kernel/cpu/mtrr/if.c
+++ b/arch/x86/kernel/cpu/mtrr/if.c
@@ -377,10 +377,6 @@ static const struct file_operations mtrr_fops = {
         .release = mtrr_close,
 };
 
-
-static struct proc_dir_entry *proc_root_mtrr;
-
-
 static int mtrr_seq_show(struct seq_file *seq, void *offset)
 {
         char factor;
@@ -423,11 +419,7 @@ static int __init mtrr_if_init(void)
             (!cpu_has(c, X86_FEATURE_CENTAUR_MCR)))
                 return -ENODEV;
 
-        proc_root_mtrr =
-                proc_create("mtrr", S_IWUSR | S_IRUGO, NULL, &mtrr_fops);
-
-        if (proc_root_mtrr)
-                proc_root_mtrr->owner = THIS_MODULE;
+        proc_create("mtrr", S_IWUSR | S_IRUGO, NULL, &mtrr_fops);
         return 0;
 }
 
diff --git a/arch/x86/kernel/irqinit_32.c b/arch/x86/kernel/irqinit_32.c
index bc1326105448..368b0a8836f9 100644
--- a/arch/x86/kernel/irqinit_32.c
+++ b/arch/x86/kernel/irqinit_32.c
@@ -50,7 +50,6 @@ static irqreturn_t math_error_irq(int cpl, void *dev_id)
  */
 static struct irqaction fpu_irq = {
         .handler = math_error_irq,
-        .mask = CPU_MASK_NONE,
         .name = "fpu",
 };
 
@@ -83,7 +82,6 @@ void __init init_ISA_irqs(void)
  */
 static struct irqaction irq2 = {
         .handler = no_action,
-        .mask = CPU_MASK_NONE,
         .name = "cascade",
 };
 
diff --git a/arch/x86/kernel/irqinit_64.c b/arch/x86/kernel/irqinit_64.c
index c7a49e0ffbfb..8cd10537fd46 100644
--- a/arch/x86/kernel/irqinit_64.c
+++ b/arch/x86/kernel/irqinit_64.c
@@ -45,7 +45,6 @@
 
 static struct irqaction irq2 = {
         .handler = no_action,
-        .mask = CPU_MASK_NONE,
         .name = "cascade",
 };
 DEFINE_PER_CPU(vector_irq_t, vector_irq) = {
diff --git a/arch/x86/kernel/mfgpt_32.c b/arch/x86/kernel/mfgpt_32.c
index 8815f3c7fec7..846510b78a09 100644
--- a/arch/x86/kernel/mfgpt_32.c
+++ b/arch/x86/kernel/mfgpt_32.c
@@ -348,7 +348,6 @@ static irqreturn_t mfgpt_tick(int irq, void *dev_id)
 static struct irqaction mfgptirq  = {
         .handler = mfgpt_tick,
         .flags = IRQF_DISABLED | IRQF_NOBALANCING,
-        .mask = CPU_MASK_NONE,
         .name = "mfgpt-timer"
 };
 
diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c
index c7c4776ff630..90f5b9ef5def 100644
--- a/arch/x86/kernel/pci-dma.c
+++ b/arch/x86/kernel/pci-dma.c
@@ -300,8 +300,7 @@ fs_initcall(pci_iommu_init);
 static __devinit void via_no_dac(struct pci_dev *dev)
 {
         if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI && forbid_dac == 0) {
-                printk(KERN_INFO
-                        "PCI: VIA PCI bridge detected. Disabling DAC.\n");
+                dev_info(&dev->dev, "disabling DAC on VIA PCI bridge\n");
                 forbid_dac = 1;
         }
 }
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index a0d26237d7cf..b4158439bf63 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -1049,7 +1049,6 @@ void __init x86_quirk_trap_init(void)
 static struct irqaction irq0  = {
         .handler = timer_interrupt,
         .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER,
-        .mask = CPU_MASK_NONE,
         .name = "timer"
 };
 
diff --git a/arch/x86/kernel/time_64.c b/arch/x86/kernel/time_64.c
index 241ec3923f61..5ba343e61844 100644
--- a/arch/x86/kernel/time_64.c
+++ b/arch/x86/kernel/time_64.c
@@ -116,7 +116,6 @@ unsigned long __init calibrate_cpu(void)
 static struct irqaction irq0 = {
         .handler        = timer_interrupt,
         .flags          = IRQF_DISABLED | IRQF_IRQPOLL | IRQF_NOBALANCING | IRQF_TIMER,
-        .mask           = CPU_MASK_NONE,
         .name           = "timer"
 };
 
@@ -125,7 +124,6 @@ void __init hpet_time_init(void)
         if (!hpet_enable())
                 setup_pit_timer();
 
-        irq0.mask = cpumask_of_cpu(0);
         setup_irq(0, &irq0);
 }
 
diff --git a/arch/x86/kernel/vmiclock_32.c b/arch/x86/kernel/vmiclock_32.c
index 33a788d5879c..d303369a7bad 100644
--- a/arch/x86/kernel/vmiclock_32.c
+++ b/arch/x86/kernel/vmiclock_32.c
@@ -202,7 +202,6 @@ static struct irqaction vmi_clock_action  = {
         .name           = "vmi-timer",
         .handler        = vmi_timer_interrupt,
         .flags          = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_TIMER,
-        .mask           = CPU_MASK_ALL,
 };
 
 static void __devinit vmi_time_init_clockevent(void)
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c
index 90e44a10e68a..e94a11e42f98 100644
--- a/arch/x86/lguest/boot.c
+++ b/arch/x86/lguest/boot.c
@@ -107,7 +107,7 @@ static void async_hcall(unsigned long call, unsigned long arg1,
         local_irq_save(flags);
         if (lguest_data.hcall_status[next_call] != 0xFF) {
                 /* Table full, so do normal hcall which will flush table. */
-                hcall(call, arg1, arg2, arg3);
+                kvm_hypercall3(call, arg1, arg2, arg3);
         } else {
                 lguest_data.hcalls[next_call].arg0 = call;
                 lguest_data.hcalls[next_call].arg1 = arg1;
@@ -134,13 +134,32 @@ static void async_hcall(unsigned long call, unsigned long arg1,
  *
  * So, when we're in lazy mode, we call async_hcall() to store the call for
  * future processing: */
-static void lazy_hcall(unsigned long call,
+static void lazy_hcall1(unsigned long call,
+                       unsigned long arg1)
+{
+        if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_NONE)
+                kvm_hypercall1(call, arg1);
+        else
+                async_hcall(call, arg1, 0, 0);
+}
+
+static void lazy_hcall2(unsigned long call,
+                       unsigned long arg1,
+                       unsigned long arg2)
+{
+        if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_NONE)
+                kvm_hypercall2(call, arg1, arg2);
+        else
+                async_hcall(call, arg1, arg2, 0);
+}
+
+static void lazy_hcall3(unsigned long call,
                        unsigned long arg1,
                        unsigned long arg2,
                        unsigned long arg3)
 {
         if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_NONE)
-                hcall(call, arg1, arg2, arg3);
+                kvm_hypercall3(call, arg1, arg2, arg3);
         else
                 async_hcall(call, arg1, arg2, arg3);
 }
@@ -150,7 +169,7 @@ static void lazy_hcall(unsigned long call,
 static void lguest_leave_lazy_mode(void)
 {
         paravirt_leave_lazy(paravirt_get_lazy_mode());
-        hcall(LHCALL_FLUSH_ASYNC, 0, 0, 0);
+        kvm_hypercall0(LHCALL_FLUSH_ASYNC);
 }
 
 /*G:033
@@ -229,7 +248,7 @@ static void lguest_write_idt_entry(gate_desc *dt,
         /* Keep the local copy up to date. */
         native_write_idt_entry(dt, entrynum, g);
         /* Tell Host about this new entry. */
-        hcall(LHCALL_LOAD_IDT_ENTRY, entrynum, desc[0], desc[1]);
+        kvm_hypercall3(LHCALL_LOAD_IDT_ENTRY, entrynum, desc[0], desc[1]);
 }
 
 /* Changing to a different IDT is very rare: we keep the IDT up-to-date every
@@ -241,7 +260,7 @@ static void lguest_load_idt(const struct desc_ptr *desc)
         struct desc_struct *idt = (void *)desc->address;
 
         for (i = 0; i < (desc->size+1)/8; i++)
-                hcall(LHCALL_LOAD_IDT_ENTRY, i, idt[i].a, idt[i].b);
+                kvm_hypercall3(LHCALL_LOAD_IDT_ENTRY, i, idt[i].a, idt[i].b);
 }
 
 /*
@@ -261,8 +280,8 @@ static void lguest_load_idt(const struct desc_ptr *desc)
  */
 static void lguest_load_gdt(const struct desc_ptr *desc)
 {
-        BUG_ON((desc->size+1)/8 != GDT_ENTRIES);
-        hcall(LHCALL_LOAD_GDT, __pa(desc->address), GDT_ENTRIES, 0);
+        BUG_ON((desc->size + 1) / 8 != GDT_ENTRIES);
+        kvm_hypercall2(LHCALL_LOAD_GDT, __pa(desc->address), GDT_ENTRIES);
 }
 
 /* For a single GDT entry which changes, we do the lazy thing: alter our GDT,
@@ -272,7 +291,7 @@ static void lguest_write_gdt_entry(struct desc_struct *dt, int entrynum,
                                    const void *desc, int type)
 {
         native_write_gdt_entry(dt, entrynum, desc, type);
-        hcall(LHCALL_LOAD_GDT, __pa(dt), GDT_ENTRIES, 0);
+        kvm_hypercall2(LHCALL_LOAD_GDT, __pa(dt), GDT_ENTRIES);
 }
 
 /* OK, I lied.  There are three "thread local storage" GDT entries which change
@@ -284,7 +303,7 @@ static void lguest_load_tls(struct thread_struct *t, unsigned int cpu)
          * can't handle us removing entries we're currently using.  So we clear
          * the GS register here: if it's needed it'll be reloaded anyway. */
         lazy_load_gs(0);
-        lazy_hcall(LHCALL_LOAD_TLS, __pa(&t->tls_array), cpu, 0);
+        lazy_hcall2(LHCALL_LOAD_TLS, __pa(&t->tls_array), cpu);
 }
 
 /*G:038 That's enough excitement for now, back to ploughing through each of
@@ -382,7 +401,7 @@ static void lguest_cpuid(unsigned int *ax, unsigned int *bx,
 static unsigned long current_cr0;
 static void lguest_write_cr0(unsigned long val)
 {
-        lazy_hcall(LHCALL_TS, val & X86_CR0_TS, 0, 0);
+        lazy_hcall1(LHCALL_TS, val & X86_CR0_TS);
         current_cr0 = val;
 }
 
@@ -396,7 +415,7 @@ static unsigned long lguest_read_cr0(void)
  * the vowels have been optimized out. */
 static void lguest_clts(void)
 {
-        lazy_hcall(LHCALL_TS, 0, 0, 0);
+        lazy_hcall1(LHCALL_TS, 0);
         current_cr0 &= ~X86_CR0_TS;
 }
 
@@ -418,7 +437,7 @@ static bool cr3_changed = false;
 static void lguest_write_cr3(unsigned long cr3)
 {
         lguest_data.pgdir = cr3;
-        lazy_hcall(LHCALL_NEW_PGTABLE, cr3, 0, 0);
+        lazy_hcall1(LHCALL_NEW_PGTABLE, cr3);
         cr3_changed = true;
 }
 
@@ -490,11 +509,17 @@ static void lguest_write_cr4(unsigned long val)
  * into a process' address space.  We set the entry then tell the Host the
  * toplevel and address this corresponds to.  The Guest uses one pagetable per
  * process, so we need to tell the Host which one we're changing (mm->pgd). */
+static void lguest_pte_update(struct mm_struct *mm, unsigned long addr,
+                               pte_t *ptep)
+{
+        lazy_hcall3(LHCALL_SET_PTE, __pa(mm->pgd), addr, ptep->pte_low);
+}
+
 static void lguest_set_pte_at(struct mm_struct *mm, unsigned long addr,
                               pte_t *ptep, pte_t pteval)
 {
         *ptep = pteval;
-        lazy_hcall(LHCALL_SET_PTE, __pa(mm->pgd), addr, pteval.pte_low);
+        lguest_pte_update(mm, addr, ptep);
 }
 
 /* The Guest calls this to set a top-level entry.  Again, we set the entry then
@@ -503,8 +528,8 @@ static void lguest_set_pte_at(struct mm_struct *mm, unsigned long addr,
 static void lguest_set_pmd(pmd_t *pmdp, pmd_t pmdval)
 {
         *pmdp = pmdval;
-        lazy_hcall(LHCALL_SET_PMD, __pa(pmdp)&PAGE_MASK,
-                   (__pa(pmdp)&(PAGE_SIZE-1))/4, 0);
+        lazy_hcall2(LHCALL_SET_PMD, __pa(pmdp) & PAGE_MASK,
+                   (__pa(pmdp) & (PAGE_SIZE - 1)) / 4);
 }
 
 /* There are a couple of legacy places where the kernel sets a PTE, but we
@@ -520,7 +545,7 @@ static void lguest_set_pte(pte_t *ptep, pte_t pteval)
 {
         *ptep = pteval;
         if (cr3_changed)
-                lazy_hcall(LHCALL_FLUSH_TLB, 1, 0, 0);
+                lazy_hcall1(LHCALL_FLUSH_TLB, 1);
 }
 
 /* Unfortunately for Lguest, the pv_mmu_ops for page tables were based on
@@ -536,7 +561,7 @@ static void lguest_set_pte(pte_t *ptep, pte_t pteval)
 static void lguest_flush_tlb_single(unsigned long addr)
 {
         /* Simply set it to zero: if it was not, it will fault back in. */
-        lazy_hcall(LHCALL_SET_PTE, lguest_data.pgdir, addr, 0);
+        lazy_hcall3(LHCALL_SET_PTE, lguest_data.pgdir, addr, 0);
 }
 
 /* This is what happens after the Guest has removed a large number of entries.
@@ -544,7 +569,7 @@ static void lguest_flush_tlb_single(unsigned long addr)
  * have changed, ie. virtual addresses below PAGE_OFFSET. */
 static void lguest_flush_tlb_user(void)
 {
-        lazy_hcall(LHCALL_FLUSH_TLB, 0, 0, 0);
+        lazy_hcall1(LHCALL_FLUSH_TLB, 0);
 }
 
 /* This is called when the kernel page tables have changed.  That's not very
@@ -552,7 +577,7 @@ static void lguest_flush_tlb_user(void)
  * slow), so it's worth separating this from the user flushing above. */
 static void lguest_flush_tlb_kernel(void)
 {
-        lazy_hcall(LHCALL_FLUSH_TLB, 1, 0, 0);
+        lazy_hcall1(LHCALL_FLUSH_TLB, 1);
 }
 
 /*
@@ -689,7 +714,7 @@ static int lguest_clockevent_set_next_event(unsigned long delta,
         }
 
         /* Please wake us this far in the future. */
-        hcall(LHCALL_SET_CLOCKEVENT, delta, 0, 0);
+        kvm_hypercall1(LHCALL_SET_CLOCKEVENT, delta);
         return 0;
 }
 
@@ -700,7 +725,7 @@ static void lguest_clockevent_set_mode(enum clock_event_mode mode,
         case CLOCK_EVT_MODE_UNUSED:
         case CLOCK_EVT_MODE_SHUTDOWN:
                 /* A 0 argument shuts the clock down. */
-                hcall(LHCALL_SET_CLOCKEVENT, 0, 0, 0);
+                kvm_hypercall0(LHCALL_SET_CLOCKEVENT);
                 break;
         case CLOCK_EVT_MODE_ONESHOT:
                 /* This is what we expect. */
@@ -775,8 +800,8 @@ static void lguest_time_init(void)
 static void lguest_load_sp0(struct tss_struct *tss,
                             struct thread_struct *thread)
 {
-        lazy_hcall(LHCALL_SET_STACK, __KERNEL_DS|0x1, thread->sp0,
-                   THREAD_SIZE/PAGE_SIZE);
+        lazy_hcall3(LHCALL_SET_STACK, __KERNEL_DS | 0x1, thread->sp0,
+                   THREAD_SIZE / PAGE_SIZE);
 }
 
 /* Let's just say, I wouldn't do debugging under a Guest. */
@@ -849,7 +874,7 @@ static void set_lguest_basic_apic_ops(void)
 /* STOP!  Until an interrupt comes in. */
 static void lguest_safe_halt(void)
 {
-        hcall(LHCALL_HALT, 0, 0, 0);
+        kvm_hypercall0(LHCALL_HALT);
 }
 
 /* The SHUTDOWN hypercall takes a string to describe what's happening, and
@@ -859,7 +884,8 @@ static void lguest_safe_halt(void)
  * rather than virtual addresses, so we use __pa() here. */
 static void lguest_power_off(void)
 {
-        hcall(LHCALL_SHUTDOWN, __pa("Power down"), LGUEST_SHUTDOWN_POWEROFF, 0);
+        kvm_hypercall2(LHCALL_SHUTDOWN, __pa("Power down"),
+                                        LGUEST_SHUTDOWN_POWEROFF);
 }
 
 /*
@@ -869,7 +895,7 @@ static void lguest_power_off(void)
  */
 static int lguest_panic(struct notifier_block *nb, unsigned long l, void *p)
 {
-        hcall(LHCALL_SHUTDOWN, __pa(p), LGUEST_SHUTDOWN_POWEROFF, 0);
+        kvm_hypercall2(LHCALL_SHUTDOWN, __pa(p), LGUEST_SHUTDOWN_POWEROFF);
         /* The hcall won't return, but to keep gcc happy, we're "done". */
         return NOTIFY_DONE;
 }
@@ -910,7 +936,7 @@ static __init int early_put_chars(u32 vtermno, const char *buf, int count)
                 len = sizeof(scratch) - 1;
         scratch[len] = '\0';
         memcpy(scratch, buf, len);
-        hcall(LHCALL_NOTIFY, __pa(scratch), 0, 0);
+        kvm_hypercall1(LHCALL_NOTIFY, __pa(scratch));
 
         /* This routine returns the number of bytes actually written. */
         return len;
@@ -920,7 +946,7 @@ static __init int early_put_chars(u32 vtermno, const char *buf, int count)
  * Launcher to reboot us. */
 static void lguest_restart(char *reason)
 {
-        hcall(LHCALL_SHUTDOWN, __pa(reason), LGUEST_SHUTDOWN_RESTART, 0);
+        kvm_hypercall2(LHCALL_SHUTDOWN, __pa(reason), LGUEST_SHUTDOWN_RESTART);
 }
 
 /*G:050
@@ -1040,6 +1066,8 @@ __init void lguest_init(void)
         pv_mmu_ops.read_cr3 = lguest_read_cr3;
         pv_mmu_ops.lazy_mode.enter = paravirt_enter_lazy_mmu;
         pv_mmu_ops.lazy_mode.leave = lguest_leave_lazy_mode;
+        pv_mmu_ops.pte_update = lguest_pte_update;
+        pv_mmu_ops.pte_update_defer = lguest_pte_update;
 
 #ifdef CONFIG_X86_LOCAL_APIC
         /* apic read/write intercepts */
diff --git a/arch/x86/lguest/i386_head.S b/arch/x86/lguest/i386_head.S
index 10b9bd35a8ff..f79541989471 100644
--- a/arch/x86/lguest/i386_head.S
+++ b/arch/x86/lguest/i386_head.S
@@ -27,8 +27,8 @@ ENTRY(lguest_entry)
         /* We make the "initialization" hypercall now to tell the Host about
          * us, and also find out where it put our page tables. */
         movl $LHCALL_LGUEST_INIT, %eax
-        movl $lguest_data - __PAGE_OFFSET, %edx
-        int $LGUEST_TRAP_ENTRY
+        movl $lguest_data - __PAGE_OFFSET, %ebx
+        .byte 0x0f,0x01,0xc1 /* KVM_HYPERCALL */
 
         /* Set up the initial stack so we can run C code. */
         movl $(init_thread_union+THREAD_SIZE),%esp
diff --git a/arch/x86/mm/highmem_32.c b/arch/x86/mm/highmem_32.c
index 522db5e3d0bf..5bc5d1688c1c 100644
--- a/arch/x86/mm/highmem_32.c
+++ b/arch/x86/mm/highmem_32.c
@@ -19,49 +19,6 @@ void kunmap(struct page *page)
         kunmap_high(page);
 }
 
-static void debug_kmap_atomic_prot(enum km_type type)
-{
-#ifdef CONFIG_DEBUG_HIGHMEM
-        static unsigned warn_count = 10;
-
-        if (unlikely(warn_count == 0))
-                return;
-
-        if (unlikely(in_interrupt())) {
-                if (in_irq()) {
-                        if (type != KM_IRQ0 && type != KM_IRQ1 &&
-                            type != KM_BIO_SRC_IRQ && type != KM_BIO_DST_IRQ &&
-                            type != KM_BOUNCE_READ) {
-                                WARN_ON(1);
-                                warn_count--;
-                        }
-                } else if (!irqs_disabled()) {  /* softirq */
-                        if (type != KM_IRQ0 && type != KM_IRQ1 &&
-                            type != KM_SOFTIRQ0 && type != KM_SOFTIRQ1 &&
-                            type != KM_SKB_SUNRPC_DATA &&
-                            type != KM_SKB_DATA_SOFTIRQ &&
-                            type != KM_BOUNCE_READ) {
-                                WARN_ON(1);
-                                warn_count--;
-                        }
-                }
-        }
-
-        if (type == KM_IRQ0 || type == KM_IRQ1 || type == KM_BOUNCE_READ ||
-                        type == KM_BIO_SRC_IRQ || type == KM_BIO_DST_IRQ) {
-                if (!irqs_disabled()) {
-                        WARN_ON(1);
-                        warn_count--;
-                }
-        } else if (type == KM_SOFTIRQ0 || type == KM_SOFTIRQ1) {
-                if (irq_count() == 0 && !irqs_disabled()) {
-                        WARN_ON(1);
-                        warn_count--;
-                }
-        }
-#endif
-}
-
 /*
  * kmap_atomic/kunmap_atomic is significantly faster than kmap/kunmap because
  * no global lock is needed and because the kmap code must perform a global TLB
@@ -81,8 +38,9 @@ void *kmap_atomic_prot(struct page *page, enum km_type type, pgprot_t prot)
         if (!PageHighMem(page))
                 return page_address(page);
 
-        debug_kmap_atomic_prot(type);
+        debug_kmap_atomic(type);
 
+        debug_kmap_atomic(type);
         idx = type + KM_TYPE_NR*smp_processor_id();
         vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
         BUG_ON(!pte_none(*(kmap_pte-idx)));
diff --git a/arch/x86/mm/iomap_32.c b/arch/x86/mm/iomap_32.c
index 699c9b2895ae..bff0c9032f8c 100644
--- a/arch/x86/mm/iomap_32.c
+++ b/arch/x86/mm/iomap_32.c
@@ -19,6 +19,7 @@
 #include <asm/iomap.h>
 #include <asm/pat.h>
 #include <linux/module.h>
+#include <linux/highmem.h>
 
 int is_io_mapping_possible(resource_size_t base, unsigned long size)
 {
@@ -71,6 +72,7 @@ iounmap_atomic(void *kvaddr, enum km_type type)
         unsigned long vaddr = (unsigned long) kvaddr & PAGE_MASK;
         enum fixed_addresses idx = type + KM_TYPE_NR*smp_processor_id();
 
+        debug_kmap_atomic(type);
         /*
          * Force other mappings to Oops if they'll try to access this pte
          * without first remap it.  Keeping stale mappings around is a bad idea
diff --git a/arch/x86/pci/early.c b/arch/x86/pci/early.c
index f6adf2c6d751..aaf26ae58cd5 100644
--- a/arch/x86/pci/early.c
+++ b/arch/x86/pci/early.c
@@ -69,11 +69,12 @@ void early_dump_pci_device(u8 bus, u8 slot, u8 func)
         int j;
         u32 val;
 
-        printk(KERN_INFO "PCI: %02x:%02x:%02x", bus, slot, func);
+        printk(KERN_INFO "pci 0000:%02x:%02x.%d config space:",
+               bus, slot, func);
 
         for (i = 0; i < 256; i += 4) {
                 if (!(i & 0x0f))
-                        printk("\n%04x:",i);
+                        printk("\n  %02x:",i);
 
                 val = read_pci_config(bus, slot, func, i);
                 for (j = 0; j < 4; j++) {
@@ -96,20 +97,22 @@ void early_dump_pci_devices(void)
                         for (func = 0; func < 8; func++) {
                                 u32 class;
                                 u8 type;
+
                                 class = read_pci_config(bus, slot, func,
                                                         PCI_CLASS_REVISION);
                                 if (class == 0xffffffff)
-                                        break;
+                                        continue;
 
                                 early_dump_pci_device(bus, slot, func);
 
-                                /* No multi-function device? */
-                                type = read_pci_config_byte(bus, slot, func,
+                                if (func == 0) {
+                                        type = read_pci_config_byte(bus, slot,
+                                                                    func,
                                                                PCI_HEADER_TYPE);
-                                if (!(type & 0x80))
-                                        break;
+                                        if (!(type & 0x80))
+                                                break;
+                                }
                         }
                 }
         }
 }
-
diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c
index 9c49919e4d1c..6dd89555fbfa 100644
--- a/arch/x86/pci/fixup.c
+++ b/arch/x86/pci/fixup.c
@@ -495,26 +495,6 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SIEMENS, 0x0015,
                           pci_siemens_interrupt_controller);
 
 /*
- * Regular PCI devices have 256 bytes, but AMD Family 10h/11h CPUs have
- * 4096 bytes configuration space for each function of their processor
- * configuration space.
- */
-static void amd_cpu_pci_cfg_space_size(struct pci_dev *dev)
-{
-        dev->cfg_size = pci_cfg_space_size_ext(dev);
-}
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, 0x1200, amd_cpu_pci_cfg_space_size);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, 0x1201, amd_cpu_pci_cfg_space_size);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, 0x1202, amd_cpu_pci_cfg_space_size);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, 0x1203, amd_cpu_pci_cfg_space_size);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, 0x1204, amd_cpu_pci_cfg_space_size);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, 0x1300, amd_cpu_pci_cfg_space_size);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, 0x1301, amd_cpu_pci_cfg_space_size);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, 0x1302, amd_cpu_pci_cfg_space_size);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, 0x1303, amd_cpu_pci_cfg_space_size);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, 0x1304, amd_cpu_pci_cfg_space_size);
-
-/*
  * SB600: Disable BAR1 on device 14.0 to avoid HPET resources from
  * confusing the PCI engine:
  */
diff --git a/arch/x86/pci/legacy.c b/arch/x86/pci/legacy.c
index f1065b129e9c..4061bb0f267d 100644
--- a/arch/x86/pci/legacy.c
+++ b/arch/x86/pci/legacy.c
@@ -50,8 +50,6 @@ static int __init pci_legacy_init(void)
         if (pci_root_bus)
                 pci_bus_add_devices(pci_root_bus);
 
-        pcibios_fixup_peer_bridges();
-
         return 0;
 }
 
@@ -67,6 +65,7 @@ int __init pci_subsys_init(void)
         pci_visws_init();
 #endif
         pci_legacy_init();
+        pcibios_fixup_peer_bridges();
         pcibios_irq_init();
         pcibios_init();
 
diff --git a/arch/x86/pci/mmconfig-shared.c b/arch/x86/pci/mmconfig-shared.c
index 89bf9242c80a..905bb526b133 100644
--- a/arch/x86/pci/mmconfig-shared.c
+++ b/arch/x86/pci/mmconfig-shared.c
@@ -14,6 +14,7 @@
 #include <linux/init.h>
 #include <linux/acpi.h>
 #include <linux/bitmap.h>
+#include <linux/sort.h>
 #include <asm/e820.h>
 #include <asm/pci_x86.h>
 
@@ -24,24 +25,49 @@
 /* Indicate if the mmcfg resources have been placed into the resource table. */
 static int __initdata pci_mmcfg_resources_inserted;
 
+static __init int extend_mmcfg(int num)
+{
+        struct acpi_mcfg_allocation *new;
+        int new_num = pci_mmcfg_config_num + num;
+
+        new = kzalloc(sizeof(pci_mmcfg_config[0]) * new_num, GFP_KERNEL);
+        if (!new)
+                return -1;
+
+        if (pci_mmcfg_config) {
+                memcpy(new, pci_mmcfg_config,
+                         sizeof(pci_mmcfg_config[0]) * new_num);
+                kfree(pci_mmcfg_config);
+        }
+        pci_mmcfg_config = new;
+
+        return 0;
+}
+
+static __init void fill_one_mmcfg(u64 addr, int segment, int start, int end)
+{
+        int i = pci_mmcfg_config_num;
+
+        pci_mmcfg_config_num++;
+        pci_mmcfg_config[i].address = addr;
+        pci_mmcfg_config[i].pci_segment = segment;
+        pci_mmcfg_config[i].start_bus_number = start;
+        pci_mmcfg_config[i].end_bus_number = end;
+}
+
 static const char __init *pci_mmcfg_e7520(void)
 {
         u32 win;
         raw_pci_ops->read(0, 0, PCI_DEVFN(0, 0), 0xce, 2, &win);
 
         win = win & 0xf000;
-        if(win == 0x0000 || win == 0xf000)
-                pci_mmcfg_config_num = 0;
-        else {
-                pci_mmcfg_config_num = 1;
-                pci_mmcfg_config = kzalloc(sizeof(pci_mmcfg_config[0]), GFP_KERNEL);
-                if (!pci_mmcfg_config)
-                        return NULL;
-                pci_mmcfg_config[0].address = win << 16;
-                pci_mmcfg_config[0].pci_segment = 0;
-                pci_mmcfg_config[0].start_bus_number = 0;
-                pci_mmcfg_config[0].end_bus_number = 255;
-        }
+        if (win == 0x0000 || win == 0xf000)
+                return NULL;
+
+        if (extend_mmcfg(1) == -1)
+                return NULL;
+
+        fill_one_mmcfg(win << 16, 0, 0, 255);
 
         return "Intel Corporation E7520 Memory Controller Hub";
 }
@@ -50,13 +76,11 @@ static const char __init *pci_mmcfg_intel_945(void)
 {
         u32 pciexbar, mask = 0, len = 0;
 
-        pci_mmcfg_config_num = 1;
-
         raw_pci_ops->read(0, 0, PCI_DEVFN(0, 0), 0x48, 4, &pciexbar);
 
         /* Enable bit */
         if (!(pciexbar & 1))
-                pci_mmcfg_config_num = 0;
+                return NULL;
 
         /* Size bits */
         switch ((pciexbar >> 1) & 3) {
@@ -73,28 +97,23 @@ static const char __init *pci_mmcfg_intel_945(void)
                 len  = 0x04000000U;
                 break;
         default:
-                pci_mmcfg_config_num = 0;
+                return NULL;
         }
 
         /* Errata #2, things break when not aligned on a 256Mb boundary */
         /* Can only happen in 64M/128M mode */
 
         if ((pciexbar & mask) & 0x0fffffffU)
-                pci_mmcfg_config_num = 0;
+                return NULL;
 
         /* Don't hit the APIC registers and their friends */
         if ((pciexbar & mask) >= 0xf0000000U)
-                pci_mmcfg_config_num = 0;
-
-        if (pci_mmcfg_config_num) {
-                pci_mmcfg_config = kzalloc(sizeof(pci_mmcfg_config[0]), GFP_KERNEL);
-                if (!pci_mmcfg_config)
-                        return NULL;
-                pci_mmcfg_config[0].address = pciexbar & mask;
-                pci_mmcfg_config[0].pci_segment = 0;
-                pci_mmcfg_config[0].start_bus_number = 0;
-                pci_mmcfg_config[0].end_bus_number = (len >> 20) - 1;
-        }
+                return NULL;
+
+        if (extend_mmcfg(1) == -1)
+                return NULL;
+
+        fill_one_mmcfg(pciexbar & mask, 0, 0, (len >> 20) - 1);
 
         return "Intel Corporation 945G/GZ/P/PL Express Memory Controller Hub";
 }
@@ -138,22 +157,77 @@ static const char __init *pci_mmcfg_amd_fam10h(void)
                 busnbits = 8;
         }
 
-        pci_mmcfg_config_num = (1 << segnbits);
-        pci_mmcfg_config = kzalloc(sizeof(pci_mmcfg_config[0]) *
-                                   pci_mmcfg_config_num, GFP_KERNEL);
-        if (!pci_mmcfg_config)
+        if (extend_mmcfg(1 << segnbits) == -1)
                 return NULL;
 
-        for (i = 0; i < (1 << segnbits); i++) {
-                pci_mmcfg_config[i].address = base + (1<<28) * i;
-                pci_mmcfg_config[i].pci_segment = i;
-                pci_mmcfg_config[i].start_bus_number = 0;
-                pci_mmcfg_config[i].end_bus_number = (1 << busnbits) - 1;
-        }
+        for (i = 0; i < (1 << segnbits); i++)
+                fill_one_mmcfg(base + (1<<28) * i, i, 0, (1 << busnbits) - 1);
 
         return "AMD Family 10h NB";
 }
 
+static bool __initdata mcp55_checked;
+static const char __init *pci_mmcfg_nvidia_mcp55(void)
+{
+        int bus;
+        int mcp55_mmconf_found = 0;
+
+        static const u32 extcfg_regnum          = 0x90;
+        static const u32 extcfg_regsize         = 4;
+        static const u32 extcfg_enable_mask     = 1<<31;
+        static const u32 extcfg_start_mask      = 0xff<<16;
+        static const int extcfg_start_shift     = 16;
+        static const u32 extcfg_size_mask       = 0x3<<28;
+        static const int extcfg_size_shift      = 28;
+        static const int extcfg_sizebus[]       = {0x100, 0x80, 0x40, 0x20};
+        static const u32 extcfg_base_mask[]     = {0x7ff8, 0x7ffc, 0x7ffe, 0x7fff};
+        static const int extcfg_base_lshift     = 25;
+
+        /*
+         * do check if amd fam10h already took over
+         */
+        if (!acpi_disabled || pci_mmcfg_config_num || mcp55_checked)
+                return NULL;
+
+        mcp55_checked = true;
+        for (bus = 0; bus < 256; bus++) {
+                u64 base;
+                u32 l, extcfg;
+                u16 vendor, device;
+                int start, size_index, end;
+
+                raw_pci_ops->read(0, bus, PCI_DEVFN(0, 0), 0, 4, &l);
+                vendor = l & 0xffff;
+                device = (l >> 16) & 0xffff;
+
+                if (PCI_VENDOR_ID_NVIDIA != vendor || 0x0369 != device)
+                        continue;
+
+                raw_pci_ops->read(0, bus, PCI_DEVFN(0, 0), extcfg_regnum,
+                                  extcfg_regsize, &extcfg);
+
+                if (!(extcfg & extcfg_enable_mask))
+                        continue;
+
+                if (extend_mmcfg(1) == -1)
+                        continue;
+
+                size_index = (extcfg & extcfg_size_mask) >> extcfg_size_shift;
+                base = extcfg & extcfg_base_mask[size_index];
+                /* base could > 4G */
+                base <<= extcfg_base_lshift;
+                start = (extcfg & extcfg_start_mask) >> extcfg_start_shift;
+                end = start + extcfg_sizebus[size_index] - 1;
+                fill_one_mmcfg(base, 0, start, end);
+                mcp55_mmconf_found++;
+        }
+
+        if (!mcp55_mmconf_found)
+                return NULL;
+
+        return "nVidia MCP55";
+}
+
 struct pci_mmcfg_hostbridge_probe {
         u32 bus;
         u32 devfn;
@@ -171,8 +245,52 @@ static struct pci_mmcfg_hostbridge_probe pci_mmcfg_probes[] __initdata = {
           0x1200, pci_mmcfg_amd_fam10h },
         { 0xff, PCI_DEVFN(0, 0), PCI_VENDOR_ID_AMD,
           0x1200, pci_mmcfg_amd_fam10h },
+        { 0, PCI_DEVFN(0, 0), PCI_VENDOR_ID_NVIDIA,
+          0x0369, pci_mmcfg_nvidia_mcp55 },
 };
 
+static int __init cmp_mmcfg(const void *x1, const void *x2)
+{
+        const typeof(pci_mmcfg_config[0]) *m1 = x1;
+        const typeof(pci_mmcfg_config[0]) *m2 = x2;
+        int start1, start2;
+
+        start1 = m1->start_bus_number;
+        start2 = m2->start_bus_number;
+
+        return start1 - start2;
+}
+
+static void __init pci_mmcfg_check_end_bus_number(void)
+{
+        int i;
+        typeof(pci_mmcfg_config[0]) *cfg, *cfgx;
+
+        /* sort them at first */
+        sort(pci_mmcfg_config, pci_mmcfg_config_num,
+                 sizeof(pci_mmcfg_config[0]), cmp_mmcfg, NULL);
+
+        /* last one*/
+        if (pci_mmcfg_config_num > 0) {
+                i = pci_mmcfg_config_num - 1;
+                cfg = &pci_mmcfg_config[i];
+                if (cfg->end_bus_number < cfg->start_bus_number)
+                        cfg->end_bus_number = 255;
+        }
+
+        /* don't overlap please */
+        for (i = 0; i < pci_mmcfg_config_num - 1; i++) {
+                cfg = &pci_mmcfg_config[i];
+                cfgx = &pci_mmcfg_config[i+1];
+
+                if (cfg->end_bus_number < cfg->start_bus_number)
+                        cfg->end_bus_number = 255;
+
+                if (cfg->end_bus_number >= cfgx->start_bus_number)
+                        cfg->end_bus_number = cfgx->start_bus_number - 1;
+        }
+}
+
 static int __init pci_mmcfg_check_hostbridge(void)
 {
         u32 l;
@@ -186,31 +304,33 @@ static int __init pci_mmcfg_check_hostbridge(void)
 
         pci_mmcfg_config_num = 0;
         pci_mmcfg_config = NULL;
-        name = NULL;
 
-        for (i = 0; !name && i < ARRAY_SIZE(pci_mmcfg_probes); i++) {
+        for (i = 0; i < ARRAY_SIZE(pci_mmcfg_probes); i++) {
                 bus =  pci_mmcfg_probes[i].bus;
                 devfn = pci_mmcfg_probes[i].devfn;
                 raw_pci_ops->read(0, bus, devfn, 0, 4, &l);
                 vendor = l & 0xffff;
                 device = (l >> 16) & 0xffff;
 
+                name = NULL;
                 if (pci_mmcfg_probes[i].vendor == vendor &&
                     pci_mmcfg_probes[i].device == device)
                         name = pci_mmcfg_probes[i].probe();
-        }
 
-        if (name) {
-                printk(KERN_INFO "PCI: Found %s %s MMCONFIG support.\n",
-                       name, pci_mmcfg_config_num ? "with" : "without");
+                if (name)
+                        printk(KERN_INFO "PCI: Found %s with MMCONFIG support.\n",
+                               name);
         }
 
-        return name != NULL;
+        /* some end_bus_number is crazy, fix it */
+        pci_mmcfg_check_end_bus_number();
+
+        return pci_mmcfg_config_num != 0;
 }
 
 static void __init pci_mmcfg_insert_resources(void)
 {
-#define PCI_MMCFG_RESOURCE_NAME_LEN 19
+#define PCI_MMCFG_RESOURCE_NAME_LEN 24
         int i;
         struct resource *res;
         char *names;
@@ -228,9 +348,10 @@ static void __init pci_mmcfg_insert_resources(void)
                 struct acpi_mcfg_allocation *cfg = &pci_mmcfg_config[i];
                 num_buses = cfg->end_bus_number - cfg->start_bus_number + 1;
                 res->name = names;
-                snprintf(names, PCI_MMCFG_RESOURCE_NAME_LEN, "PCI MMCONFIG %u",
-                         cfg->pci_segment);
-                res->start = cfg->address;
+                snprintf(names, PCI_MMCFG_RESOURCE_NAME_LEN,
+                         "PCI MMCONFIG %u [%02x-%02x]", cfg->pci_segment,
+                         cfg->start_bus_number, cfg->end_bus_number);
+                res->start = cfg->address + (cfg->start_bus_number << 20);
                 res->end = res->start + (num_buses << 20) - 1;
                 res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
                 insert_resource(&iomem_resource, res);
@@ -354,8 +475,6 @@ static void __init pci_mmcfg_reject_broken(int early)
             (pci_mmcfg_config[0].address == 0))
                 return;
 
-        cfg = &pci_mmcfg_config[0];
-
         for (i = 0; i < pci_mmcfg_config_num; i++) {
                 int valid = 0;
                 u64 addr, size;
@@ -423,10 +542,10 @@ static void __init __pci_mmcfg_init(int early)
                         known_bridge = 1;
         }
 
-        if (!known_bridge) {
+        if (!known_bridge)
                 acpi_table_parse(ACPI_SIG_MCFG, acpi_parse_mcfg);
-                pci_mmcfg_reject_broken(early);
-        }
+
+        pci_mmcfg_reject_broken(early);
 
         if ((pci_mmcfg_config_num == 0) ||
             (pci_mmcfg_config == NULL) ||
diff --git a/arch/x86/pci/mmconfig_64.c b/arch/x86/pci/mmconfig_64.c
index 30007ffc8e11..94349f8b2f96 100644
--- a/arch/x86/pci/mmconfig_64.c
+++ b/arch/x86/pci/mmconfig_64.c
@@ -112,13 +112,18 @@ static struct pci_raw_ops pci_mmcfg = {
 static void __iomem * __init mcfg_ioremap(struct acpi_mcfg_allocation *cfg)
 {
         void __iomem *addr;
-        u32 size;
-
-        size = (cfg->end_bus_number + 1) << 20;
-        addr = ioremap_nocache(cfg->address, size);
+        u64 start, size;
+
+        start = cfg->start_bus_number;
+        start <<= 20;
+        start += cfg->address;
+        size = cfg->end_bus_number + 1 - cfg->start_bus_number;
+        size <<= 20;
+        addr = ioremap_nocache(start, size);
         if (addr) {
                 printk(KERN_INFO "PCI: Using MMCONFIG at %Lx - %Lx\n",
-                       cfg->address, cfg->address + size - 1);
+                       start, start + size - 1);
+                addr -= cfg->start_bus_number << 20;
         }
         return addr;
 }
@@ -157,7 +162,7 @@ void __init pci_mmcfg_arch_free(void)
 
         for (i = 0; i < pci_mmcfg_config_num; ++i) {
                 if (pci_mmcfg_virt[i].virt) {
-                        iounmap(pci_mmcfg_virt[i].virt);
+                        iounmap(pci_mmcfg_virt[i].virt + (pci_mmcfg_virt[i].cfg->start_bus_number << 20));
                         pci_mmcfg_virt[i].virt = NULL;
                         pci_mmcfg_virt[i].cfg = NULL;
                 }
diff --git a/arch/x86/power/cpu_32.c b/arch/x86/power/cpu_32.c
index 274d06082f48..ce702c5b3a2c 100644
--- a/arch/x86/power/cpu_32.c
+++ b/arch/x86/power/cpu_32.c
@@ -12,6 +12,7 @@
 #include <asm/mtrr.h>
 #include <asm/mce.h>
 #include <asm/xcr.h>
+#include <asm/suspend.h>
 
 static struct saved_context saved_context;
 
diff --git a/arch/x86/power/cpu_64.c b/arch/x86/power/cpu_64.c
index e3b6cf70d62c..5343540f2607 100644
--- a/arch/x86/power/cpu_64.c
+++ b/arch/x86/power/cpu_64.c
@@ -15,6 +15,7 @@
 #include <asm/pgtable.h>
 #include <asm/mtrr.h>
 #include <asm/xcr.h>
+#include <asm/suspend.h>
 
 static void fix_processor_context(void);
 
diff --git a/arch/x86/power/hibernate_64.c b/arch/x86/power/hibernate_64.c
index 6dd000dd7933..65fdc86e923f 100644
--- a/arch/x86/power/hibernate_64.c
+++ b/arch/x86/power/hibernate_64.c
@@ -14,6 +14,7 @@
 #include <asm/page.h>
 #include <asm/pgtable.h>
 #include <asm/mtrr.h>
+#include <asm/suspend.h>
 
 /* References to section boundaries */
 extern const void __nosave_begin, __nosave_end;