diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-05-19 20:44:13 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-05-19 20:44:13 -0400 |
commit | 0f1bdc1815c4cb29b3cd71a7091b478e426faa0b (patch) | |
tree | b4d70c6a305d91bf7d1c8a6bbf87508587d55633 /arch/x86 | |
parent | 80fe02b5daf176f99d3afc8f6c9dc9dece019836 (diff) | |
parent | a18f22a968de17b29f2310cdb7ba69163e65ec15 (diff) |
Merge branch 'timers-clocksource-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'timers-clocksource-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
clocksource: convert mips to generic i8253 clocksource
clocksource: convert x86 to generic i8253 clocksource
clocksource: convert footbridge to generic i8253 clocksource
clocksource: add common i8253 PIT clocksource
blackfin: convert to clocksource_register_hz
mips: convert to clocksource_register_hz/khz
sparc: convert to clocksource_register_hz/khz
alpha: convert to clocksource_register_hz
microblaze: convert to clocksource_register_hz/khz
ia64: convert to clocksource_register_hz/khz
x86: Convert remaining x86 clocksources to clocksource_register_hz/khz
Make clocksource name const
Diffstat (limited to 'arch/x86')
-rw-r--r-- | arch/x86/Kconfig | 1 | ||||
-rw-r--r-- | arch/x86/include/asm/i8253.h | 2 | ||||
-rw-r--r-- | arch/x86/kernel/apb_timer.c | 10 | ||||
-rw-r--r-- | arch/x86/kernel/i8253.c | 80 | ||||
-rw-r--r-- | arch/x86/kernel/kvmclock.c | 6 | ||||
-rw-r--r-- | arch/x86/lguest/boot.c | 4 | ||||
-rw-r--r-- | arch/x86/platform/uv/uv_time.c | 6 | ||||
-rw-r--r-- | arch/x86/xen/time.c | 6 |
8 files changed, 9 insertions, 106 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 650bb8c47eca..7a0ff52c73fa 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig | |||
@@ -8,6 +8,7 @@ config 64BIT | |||
8 | 8 | ||
9 | config X86_32 | 9 | config X86_32 |
10 | def_bool !64BIT | 10 | def_bool !64BIT |
11 | select CLKSRC_I8253 | ||
11 | 12 | ||
12 | config X86_64 | 13 | config X86_64 |
13 | def_bool 64BIT | 14 | def_bool 64BIT |
diff --git a/arch/x86/include/asm/i8253.h b/arch/x86/include/asm/i8253.h index fc1f579fb965..65aaa91d5850 100644 --- a/arch/x86/include/asm/i8253.h +++ b/arch/x86/include/asm/i8253.h | |||
@@ -6,6 +6,8 @@ | |||
6 | #define PIT_CH0 0x40 | 6 | #define PIT_CH0 0x40 |
7 | #define PIT_CH2 0x42 | 7 | #define PIT_CH2 0x42 |
8 | 8 | ||
9 | #define PIT_LATCH LATCH | ||
10 | |||
9 | extern raw_spinlock_t i8253_lock; | 11 | extern raw_spinlock_t i8253_lock; |
10 | 12 | ||
11 | extern struct clock_event_device *global_clock_event; | 13 | extern struct clock_event_device *global_clock_event; |
diff --git a/arch/x86/kernel/apb_timer.c b/arch/x86/kernel/apb_timer.c index cd1ffed4ee22..289e92862fd9 100644 --- a/arch/x86/kernel/apb_timer.c +++ b/arch/x86/kernel/apb_timer.c | |||
@@ -177,7 +177,6 @@ static struct clocksource clocksource_apbt = { | |||
177 | .rating = APBT_CLOCKSOURCE_RATING, | 177 | .rating = APBT_CLOCKSOURCE_RATING, |
178 | .read = apbt_read_clocksource, | 178 | .read = apbt_read_clocksource, |
179 | .mask = APBT_MASK, | 179 | .mask = APBT_MASK, |
180 | .shift = APBT_SHIFT, | ||
181 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 180 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
182 | .resume = apbt_restart_clocksource, | 181 | .resume = apbt_restart_clocksource, |
183 | }; | 182 | }; |
@@ -543,14 +542,7 @@ static int apbt_clocksource_register(void) | |||
543 | if (t1 == apbt_read_clocksource(&clocksource_apbt)) | 542 | if (t1 == apbt_read_clocksource(&clocksource_apbt)) |
544 | panic("APBT counter not counting. APBT disabled\n"); | 543 | panic("APBT counter not counting. APBT disabled\n"); |
545 | 544 | ||
546 | /* | 545 | clocksource_register_khz(&clocksource_apbt, (u32)apbt_freq*1000); |
547 | * initialize and register APBT clocksource | ||
548 | * convert that to ns/clock cycle | ||
549 | * mult = (ns/c) * 2^APBT_SHIFT | ||
550 | */ | ||
551 | clocksource_apbt.mult = div_sc(MSEC_PER_SEC, | ||
552 | (unsigned long) apbt_freq, APBT_SHIFT); | ||
553 | clocksource_register(&clocksource_apbt); | ||
554 | 546 | ||
555 | return 0; | 547 | return 0; |
556 | } | 548 | } |
diff --git a/arch/x86/kernel/i8253.c b/arch/x86/kernel/i8253.c index 2dfd31597443..577e90cadaeb 100644 --- a/arch/x86/kernel/i8253.c +++ b/arch/x86/kernel/i8253.c | |||
@@ -117,81 +117,6 @@ void __init setup_pit_timer(void) | |||
117 | } | 117 | } |
118 | 118 | ||
119 | #ifndef CONFIG_X86_64 | 119 | #ifndef CONFIG_X86_64 |
120 | /* | ||
121 | * Since the PIT overflows every tick, its not very useful | ||
122 | * to just read by itself. So use jiffies to emulate a free | ||
123 | * running counter: | ||
124 | */ | ||
125 | static cycle_t pit_read(struct clocksource *cs) | ||
126 | { | ||
127 | static int old_count; | ||
128 | static u32 old_jifs; | ||
129 | unsigned long flags; | ||
130 | int count; | ||
131 | u32 jifs; | ||
132 | |||
133 | raw_spin_lock_irqsave(&i8253_lock, flags); | ||
134 | /* | ||
135 | * Although our caller may have the read side of xtime_lock, | ||
136 | * this is now a seqlock, and we are cheating in this routine | ||
137 | * by having side effects on state that we cannot undo if | ||
138 | * there is a collision on the seqlock and our caller has to | ||
139 | * retry. (Namely, old_jifs and old_count.) So we must treat | ||
140 | * jiffies as volatile despite the lock. We read jiffies | ||
141 | * before latching the timer count to guarantee that although | ||
142 | * the jiffies value might be older than the count (that is, | ||
143 | * the counter may underflow between the last point where | ||
144 | * jiffies was incremented and the point where we latch the | ||
145 | * count), it cannot be newer. | ||
146 | */ | ||
147 | jifs = jiffies; | ||
148 | outb_pit(0x00, PIT_MODE); /* latch the count ASAP */ | ||
149 | count = inb_pit(PIT_CH0); /* read the latched count */ | ||
150 | count |= inb_pit(PIT_CH0) << 8; | ||
151 | |||
152 | /* VIA686a test code... reset the latch if count > max + 1 */ | ||
153 | if (count > LATCH) { | ||
154 | outb_pit(0x34, PIT_MODE); | ||
155 | outb_pit(LATCH & 0xff, PIT_CH0); | ||
156 | outb_pit(LATCH >> 8, PIT_CH0); | ||
157 | count = LATCH - 1; | ||
158 | } | ||
159 | |||
160 | /* | ||
161 | * It's possible for count to appear to go the wrong way for a | ||
162 | * couple of reasons: | ||
163 | * | ||
164 | * 1. The timer counter underflows, but we haven't handled the | ||
165 | * resulting interrupt and incremented jiffies yet. | ||
166 | * 2. Hardware problem with the timer, not giving us continuous time, | ||
167 | * the counter does small "jumps" upwards on some Pentium systems, | ||
168 | * (see c't 95/10 page 335 for Neptun bug.) | ||
169 | * | ||
170 | * Previous attempts to handle these cases intelligently were | ||
171 | * buggy, so we just do the simple thing now. | ||
172 | */ | ||
173 | if (count > old_count && jifs == old_jifs) | ||
174 | count = old_count; | ||
175 | |||
176 | old_count = count; | ||
177 | old_jifs = jifs; | ||
178 | |||
179 | raw_spin_unlock_irqrestore(&i8253_lock, flags); | ||
180 | |||
181 | count = (LATCH - 1) - count; | ||
182 | |||
183 | return (cycle_t)(jifs * LATCH) + count; | ||
184 | } | ||
185 | |||
186 | static struct clocksource pit_cs = { | ||
187 | .name = "pit", | ||
188 | .rating = 110, | ||
189 | .read = pit_read, | ||
190 | .mask = CLOCKSOURCE_MASK(32), | ||
191 | .mult = 0, | ||
192 | .shift = 20, | ||
193 | }; | ||
194 | |||
195 | static int __init init_pit_clocksource(void) | 120 | static int __init init_pit_clocksource(void) |
196 | { | 121 | { |
197 | /* | 122 | /* |
@@ -205,10 +130,7 @@ static int __init init_pit_clocksource(void) | |||
205 | pit_ce.mode != CLOCK_EVT_MODE_PERIODIC) | 130 | pit_ce.mode != CLOCK_EVT_MODE_PERIODIC) |
206 | return 0; | 131 | return 0; |
207 | 132 | ||
208 | pit_cs.mult = clocksource_hz2mult(CLOCK_TICK_RATE, pit_cs.shift); | 133 | return clocksource_i8253_init(); |
209 | |||
210 | return clocksource_register(&pit_cs); | ||
211 | } | 134 | } |
212 | arch_initcall(init_pit_clocksource); | 135 | arch_initcall(init_pit_clocksource); |
213 | |||
214 | #endif /* !CONFIG_X86_64 */ | 136 | #endif /* !CONFIG_X86_64 */ |
diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index f98d3eafe07a..6389a6bca11b 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c | |||
@@ -26,8 +26,6 @@ | |||
26 | #include <asm/x86_init.h> | 26 | #include <asm/x86_init.h> |
27 | #include <asm/reboot.h> | 27 | #include <asm/reboot.h> |
28 | 28 | ||
29 | #define KVM_SCALE 22 | ||
30 | |||
31 | static int kvmclock = 1; | 29 | static int kvmclock = 1; |
32 | static int msr_kvm_system_time = MSR_KVM_SYSTEM_TIME; | 30 | static int msr_kvm_system_time = MSR_KVM_SYSTEM_TIME; |
33 | static int msr_kvm_wall_clock = MSR_KVM_WALL_CLOCK; | 31 | static int msr_kvm_wall_clock = MSR_KVM_WALL_CLOCK; |
@@ -120,8 +118,6 @@ static struct clocksource kvm_clock = { | |||
120 | .read = kvm_clock_get_cycles, | 118 | .read = kvm_clock_get_cycles, |
121 | .rating = 400, | 119 | .rating = 400, |
122 | .mask = CLOCKSOURCE_MASK(64), | 120 | .mask = CLOCKSOURCE_MASK(64), |
123 | .mult = 1 << KVM_SCALE, | ||
124 | .shift = KVM_SCALE, | ||
125 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 121 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
126 | }; | 122 | }; |
127 | 123 | ||
@@ -203,7 +199,7 @@ void __init kvmclock_init(void) | |||
203 | machine_ops.crash_shutdown = kvm_crash_shutdown; | 199 | machine_ops.crash_shutdown = kvm_crash_shutdown; |
204 | #endif | 200 | #endif |
205 | kvm_get_preset_lpj(); | 201 | kvm_get_preset_lpj(); |
206 | clocksource_register(&kvm_clock); | 202 | clocksource_register_hz(&kvm_clock, NSEC_PER_SEC); |
207 | pv_info.paravirt_enabled = 1; | 203 | pv_info.paravirt_enabled = 1; |
208 | pv_info.name = "KVM"; | 204 | pv_info.name = "KVM"; |
209 | 205 | ||
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c index 395bf0114aad..e191c096ab90 100644 --- a/arch/x86/lguest/boot.c +++ b/arch/x86/lguest/boot.c | |||
@@ -913,8 +913,6 @@ static struct clocksource lguest_clock = { | |||
913 | .rating = 200, | 913 | .rating = 200, |
914 | .read = lguest_clock_read, | 914 | .read = lguest_clock_read, |
915 | .mask = CLOCKSOURCE_MASK(64), | 915 | .mask = CLOCKSOURCE_MASK(64), |
916 | .mult = 1 << 22, | ||
917 | .shift = 22, | ||
918 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 916 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
919 | }; | 917 | }; |
920 | 918 | ||
@@ -997,7 +995,7 @@ static void lguest_time_init(void) | |||
997 | /* Set up the timer interrupt (0) to go to our simple timer routine */ | 995 | /* Set up the timer interrupt (0) to go to our simple timer routine */ |
998 | irq_set_handler(0, lguest_time_irq); | 996 | irq_set_handler(0, lguest_time_irq); |
999 | 997 | ||
1000 | clocksource_register(&lguest_clock); | 998 | clocksource_register_hz(&lguest_clock, NSEC_PER_SEC); |
1001 | 999 | ||
1002 | /* We can't set cpumask in the initializer: damn C limitations! Set it | 1000 | /* We can't set cpumask in the initializer: damn C limitations! Set it |
1003 | * here and register our timer device. */ | 1001 | * here and register our timer device. */ |
diff --git a/arch/x86/platform/uv/uv_time.c b/arch/x86/platform/uv/uv_time.c index 9daf5d1af9f1..0eb90184515f 100644 --- a/arch/x86/platform/uv/uv_time.c +++ b/arch/x86/platform/uv/uv_time.c | |||
@@ -40,7 +40,6 @@ static struct clocksource clocksource_uv = { | |||
40 | .rating = 400, | 40 | .rating = 400, |
41 | .read = uv_read_rtc, | 41 | .read = uv_read_rtc, |
42 | .mask = (cycle_t)UVH_RTC_REAL_TIME_CLOCK_MASK, | 42 | .mask = (cycle_t)UVH_RTC_REAL_TIME_CLOCK_MASK, |
43 | .shift = 10, | ||
44 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 43 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
45 | }; | 44 | }; |
46 | 45 | ||
@@ -372,14 +371,11 @@ static __init int uv_rtc_setup_clock(void) | |||
372 | if (!is_uv_system()) | 371 | if (!is_uv_system()) |
373 | return -ENODEV; | 372 | return -ENODEV; |
374 | 373 | ||
375 | clocksource_uv.mult = clocksource_hz2mult(sn_rtc_cycles_per_second, | ||
376 | clocksource_uv.shift); | ||
377 | |||
378 | /* If single blade, prefer tsc */ | 374 | /* If single blade, prefer tsc */ |
379 | if (uv_num_possible_blades() == 1) | 375 | if (uv_num_possible_blades() == 1) |
380 | clocksource_uv.rating = 250; | 376 | clocksource_uv.rating = 250; |
381 | 377 | ||
382 | rc = clocksource_register(&clocksource_uv); | 378 | rc = clocksource_register_hz(&clocksource_uv, sn_rtc_cycles_per_second); |
383 | if (rc) | 379 | if (rc) |
384 | printk(KERN_INFO "UV RTC clocksource failed rc %d\n", rc); | 380 | printk(KERN_INFO "UV RTC clocksource failed rc %d\n", rc); |
385 | else | 381 | else |
diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c index bd4ffd7d9589..5158c505bef9 100644 --- a/arch/x86/xen/time.c +++ b/arch/x86/xen/time.c | |||
@@ -26,8 +26,6 @@ | |||
26 | 26 | ||
27 | #include "xen-ops.h" | 27 | #include "xen-ops.h" |
28 | 28 | ||
29 | #define XEN_SHIFT 22 | ||
30 | |||
31 | /* Xen may fire a timer up to this many ns early */ | 29 | /* Xen may fire a timer up to this many ns early */ |
32 | #define TIMER_SLOP 100000 | 30 | #define TIMER_SLOP 100000 |
33 | #define NS_PER_TICK (1000000000LL / HZ) | 31 | #define NS_PER_TICK (1000000000LL / HZ) |
@@ -211,8 +209,6 @@ static struct clocksource xen_clocksource __read_mostly = { | |||
211 | .rating = 400, | 209 | .rating = 400, |
212 | .read = xen_clocksource_get_cycles, | 210 | .read = xen_clocksource_get_cycles, |
213 | .mask = ~0, | 211 | .mask = ~0, |
214 | .mult = 1<<XEN_SHIFT, /* time directly in nanoseconds */ | ||
215 | .shift = XEN_SHIFT, | ||
216 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 212 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
217 | }; | 213 | }; |
218 | 214 | ||
@@ -448,7 +444,7 @@ static void __init xen_time_init(void) | |||
448 | int cpu = smp_processor_id(); | 444 | int cpu = smp_processor_id(); |
449 | struct timespec tp; | 445 | struct timespec tp; |
450 | 446 | ||
451 | clocksource_register(&xen_clocksource); | 447 | clocksource_register_hz(&xen_clocksource, NSEC_PER_SEC); |
452 | 448 | ||
453 | if (HYPERVISOR_vcpu_op(VCPUOP_stop_periodic_timer, cpu, NULL) == 0) { | 449 | if (HYPERVISOR_vcpu_op(VCPUOP_stop_periodic_timer, cpu, NULL) == 0) { |
454 | /* Successfully turned off 100Hz tick, so we have the | 450 | /* Successfully turned off 100Hz tick, so we have the |