perf_counter: frequency based adaptive irq_period

Instead of specifying the irq_period for a counter, provide a target interrupt
frequency and dynamically adapt the irq_period to match this frequency.

[ Impact: new perf-counter attribute/feature ]

Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Corey Ashford <cjashfor@linux.vnet.ibm.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
LKML-Reference: <20090515132018.646195868@chello.nl>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

1 files changed, 3 insertions, 6 deletions

diff --git a/arch/x86/kernel/cpu/perf_counter.c b/arch/x86/kernel/cpu/perf_counter.c
index 5a7f718eb1e1..886dcf334bc3 100644
--- a/arch/x86/kernel/cpu/perf_counter.c
+++ b/arch/x86/kernel/cpu/perf_counter.c
@@ -286,11 +286,8 @@ static int __hw_perf_counter_init(struct perf_counter *counter)
                 hwc->nmi = 1;
         }
 
-        hwc->irq_period = hw_event->irq_period;
-        if ((s64)hwc->irq_period <= 0 || hwc->irq_period > x86_pmu.max_period)
-                hwc->irq_period = x86_pmu.max_period;
-
-        atomic64_set(&hwc->period_left, hwc->irq_period);
+        atomic64_set(&hwc->period_left,
+                        min(x86_pmu.max_period, hwc->irq_period));
 
         /*
          * Raw event type provide the config in the event structure
@@ -458,7 +455,7 @@ x86_perf_counter_set_period(struct perf_counter *counter,
                              struct hw_perf_counter *hwc, int idx)
 {
         s64 left = atomic64_read(&hwc->period_left);
-        s64 period = hwc->irq_period;
+        s64 period = min(x86_pmu.max_period, hwc->irq_period);
         int err;
 
         /*