diff options
author | Ingo Molnar <mingo@elte.hu> | 2008-12-23 10:24:15 -0500 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-12-23 10:24:15 -0500 |
commit | bf8bd66d0580f296f257d371ee41a0a137b541c7 (patch) | |
tree | 4c7f7471005b4436d40ba52edd51214d12331f25 /arch/x86 | |
parent | 8ae936690972dfcad73d0dde1095b9f32af5ee95 (diff) | |
parent | 1ccedb7cdba6886939dd8b4c8f965a826f696e56 (diff) |
Merge branch 'x86/apic' into x86/irq
Conflicts:
arch/x86/kernel/apic.c
Diffstat (limited to 'arch/x86')
-rw-r--r-- | arch/x86/include/asm/vmi.h | 8 | ||||
-rw-r--r-- | arch/x86/kernel/apic.c | 121 | ||||
-rw-r--r-- | arch/x86/kernel/nmi.c | 43 | ||||
-rw-r--r-- | arch/x86/kernel/setup.c | 12 | ||||
-rw-r--r-- | arch/x86/kernel/smpboot.c | 2 | ||||
-rw-r--r-- | arch/x86/kernel/vmi_32.c | 16 |
6 files changed, 113 insertions, 89 deletions
diff --git a/arch/x86/include/asm/vmi.h b/arch/x86/include/asm/vmi.h index b7c0dea119fe..61e08c0a2907 100644 --- a/arch/x86/include/asm/vmi.h +++ b/arch/x86/include/asm/vmi.h | |||
@@ -223,9 +223,15 @@ struct pci_header { | |||
223 | } __attribute__((packed)); | 223 | } __attribute__((packed)); |
224 | 224 | ||
225 | /* Function prototypes for bootstrapping */ | 225 | /* Function prototypes for bootstrapping */ |
226 | #ifdef CONFIG_VMI | ||
226 | extern void vmi_init(void); | 227 | extern void vmi_init(void); |
228 | extern void vmi_activate(void); | ||
227 | extern void vmi_bringup(void); | 229 | extern void vmi_bringup(void); |
228 | extern void vmi_apply_boot_page_allocations(void); | 230 | #else |
231 | static inline void vmi_init(void) {} | ||
232 | static inline void vmi_activate(void) {} | ||
233 | static inline void vmi_bringup(void) {} | ||
234 | #endif | ||
229 | 235 | ||
230 | /* State needed to start an application processor in an SMP system. */ | 236 | /* State needed to start an application processor in an SMP system. */ |
231 | struct vmi_ap_state { | 237 | struct vmi_ap_state { |
diff --git a/arch/x86/kernel/apic.c b/arch/x86/kernel/apic.c index 1771dd746811..47cbaa237b7b 100644 --- a/arch/x86/kernel/apic.c +++ b/arch/x86/kernel/apic.c | |||
@@ -441,6 +441,7 @@ static void lapic_timer_setup(enum clock_event_mode mode, | |||
441 | v = apic_read(APIC_LVTT); | 441 | v = apic_read(APIC_LVTT); |
442 | v |= (APIC_LVT_MASKED | LOCAL_TIMER_VECTOR); | 442 | v |= (APIC_LVT_MASKED | LOCAL_TIMER_VECTOR); |
443 | apic_write(APIC_LVTT, v); | 443 | apic_write(APIC_LVTT, v); |
444 | apic_write(APIC_TMICT, 0xffffffff); | ||
444 | break; | 445 | break; |
445 | case CLOCK_EVT_MODE_RESUME: | 446 | case CLOCK_EVT_MODE_RESUME: |
446 | /* Nothing to do here */ | 447 | /* Nothing to do here */ |
@@ -559,13 +560,13 @@ static int __init calibrate_by_pmtimer(long deltapm, long *delta) | |||
559 | } else { | 560 | } else { |
560 | res = (((u64)deltapm) * mult) >> 22; | 561 | res = (((u64)deltapm) * mult) >> 22; |
561 | do_div(res, 1000000); | 562 | do_div(res, 1000000); |
562 | printk(KERN_WARNING "APIC calibration not consistent " | 563 | pr_warning("APIC calibration not consistent " |
563 | "with PM Timer: %ldms instead of 100ms\n", | 564 | "with PM Timer: %ldms instead of 100ms\n", |
564 | (long)res); | 565 | (long)res); |
565 | /* Correct the lapic counter value */ | 566 | /* Correct the lapic counter value */ |
566 | res = (((u64)(*delta)) * pm_100ms); | 567 | res = (((u64)(*delta)) * pm_100ms); |
567 | do_div(res, deltapm); | 568 | do_div(res, deltapm); |
568 | printk(KERN_INFO "APIC delta adjusted to PM-Timer: " | 569 | pr_info("APIC delta adjusted to PM-Timer: " |
569 | "%lu (%ld)\n", (unsigned long)res, *delta); | 570 | "%lu (%ld)\n", (unsigned long)res, *delta); |
570 | *delta = (long)res; | 571 | *delta = (long)res; |
571 | } | 572 | } |
@@ -645,8 +646,7 @@ static int __init calibrate_APIC_clock(void) | |||
645 | */ | 646 | */ |
646 | if (calibration_result < (1000000 / HZ)) { | 647 | if (calibration_result < (1000000 / HZ)) { |
647 | local_irq_enable(); | 648 | local_irq_enable(); |
648 | printk(KERN_WARNING | 649 | pr_warning("APIC frequency too slow, disabling apic timer\n"); |
649 | "APIC frequency too slow, disabling apic timer\n"); | ||
650 | return -1; | 650 | return -1; |
651 | } | 651 | } |
652 | 652 | ||
@@ -672,13 +672,9 @@ static int __init calibrate_APIC_clock(void) | |||
672 | while (lapic_cal_loops <= LAPIC_CAL_LOOPS) | 672 | while (lapic_cal_loops <= LAPIC_CAL_LOOPS) |
673 | cpu_relax(); | 673 | cpu_relax(); |
674 | 674 | ||
675 | local_irq_disable(); | ||
676 | |||
677 | /* Stop the lapic timer */ | 675 | /* Stop the lapic timer */ |
678 | lapic_timer_setup(CLOCK_EVT_MODE_SHUTDOWN, levt); | 676 | lapic_timer_setup(CLOCK_EVT_MODE_SHUTDOWN, levt); |
679 | 677 | ||
680 | local_irq_enable(); | ||
681 | |||
682 | /* Jiffies delta */ | 678 | /* Jiffies delta */ |
683 | deltaj = lapic_cal_j2 - lapic_cal_j1; | 679 | deltaj = lapic_cal_j2 - lapic_cal_j1; |
684 | apic_printk(APIC_VERBOSE, "... jiffies delta = %lu\n", deltaj); | 680 | apic_printk(APIC_VERBOSE, "... jiffies delta = %lu\n", deltaj); |
@@ -692,8 +688,7 @@ static int __init calibrate_APIC_clock(void) | |||
692 | local_irq_enable(); | 688 | local_irq_enable(); |
693 | 689 | ||
694 | if (levt->features & CLOCK_EVT_FEAT_DUMMY) { | 690 | if (levt->features & CLOCK_EVT_FEAT_DUMMY) { |
695 | printk(KERN_WARNING | 691 | pr_warning("APIC timer disabled due to verification failure.\n"); |
696 | "APIC timer disabled due to verification failure.\n"); | ||
697 | return -1; | 692 | return -1; |
698 | } | 693 | } |
699 | 694 | ||
@@ -714,7 +709,7 @@ void __init setup_boot_APIC_clock(void) | |||
714 | * broadcast mechanism is used. On UP systems simply ignore it. | 709 | * broadcast mechanism is used. On UP systems simply ignore it. |
715 | */ | 710 | */ |
716 | if (disable_apic_timer) { | 711 | if (disable_apic_timer) { |
717 | printk(KERN_INFO "Disabling APIC timer\n"); | 712 | pr_info("Disabling APIC timer\n"); |
718 | /* No broadcast on UP ! */ | 713 | /* No broadcast on UP ! */ |
719 | if (num_possible_cpus() > 1) { | 714 | if (num_possible_cpus() > 1) { |
720 | lapic_clockevent.mult = 1; | 715 | lapic_clockevent.mult = 1; |
@@ -741,7 +736,7 @@ void __init setup_boot_APIC_clock(void) | |||
741 | if (nmi_watchdog != NMI_IO_APIC) | 736 | if (nmi_watchdog != NMI_IO_APIC) |
742 | lapic_clockevent.features &= ~CLOCK_EVT_FEAT_DUMMY; | 737 | lapic_clockevent.features &= ~CLOCK_EVT_FEAT_DUMMY; |
743 | else | 738 | else |
744 | printk(KERN_WARNING "APIC timer registered as dummy," | 739 | pr_warning("APIC timer registered as dummy," |
745 | " due to nmi_watchdog=%d!\n", nmi_watchdog); | 740 | " due to nmi_watchdog=%d!\n", nmi_watchdog); |
746 | 741 | ||
747 | /* Setup the lapic or request the broadcast */ | 742 | /* Setup the lapic or request the broadcast */ |
@@ -773,8 +768,7 @@ static void local_apic_timer_interrupt(void) | |||
773 | * spurious. | 768 | * spurious. |
774 | */ | 769 | */ |
775 | if (!evt->event_handler) { | 770 | if (!evt->event_handler) { |
776 | printk(KERN_WARNING | 771 | pr_warning("Spurious LAPIC timer interrupt on cpu %d\n", cpu); |
777 | "Spurious LAPIC timer interrupt on cpu %d\n", cpu); | ||
778 | /* Switch it off */ | 772 | /* Switch it off */ |
779 | lapic_timer_setup(CLOCK_EVT_MODE_SHUTDOWN, evt); | 773 | lapic_timer_setup(CLOCK_EVT_MODE_SHUTDOWN, evt); |
780 | return; | 774 | return; |
@@ -1089,7 +1083,7 @@ static void __cpuinit lapic_setup_esr(void) | |||
1089 | unsigned int oldvalue, value, maxlvt; | 1083 | unsigned int oldvalue, value, maxlvt; |
1090 | 1084 | ||
1091 | if (!lapic_is_integrated()) { | 1085 | if (!lapic_is_integrated()) { |
1092 | printk(KERN_INFO "No ESR for 82489DX.\n"); | 1086 | pr_info("No ESR for 82489DX.\n"); |
1093 | return; | 1087 | return; |
1094 | } | 1088 | } |
1095 | 1089 | ||
@@ -1100,7 +1094,7 @@ static void __cpuinit lapic_setup_esr(void) | |||
1100 | * ESR disabled - we can't do anything useful with the | 1094 | * ESR disabled - we can't do anything useful with the |
1101 | * errors anyway - mbligh | 1095 | * errors anyway - mbligh |
1102 | */ | 1096 | */ |
1103 | printk(KERN_INFO "Leaving ESR disabled.\n"); | 1097 | pr_info("Leaving ESR disabled.\n"); |
1104 | return; | 1098 | return; |
1105 | } | 1099 | } |
1106 | 1100 | ||
@@ -1294,7 +1288,7 @@ void check_x2apic(void) | |||
1294 | rdmsr(MSR_IA32_APICBASE, msr, msr2); | 1288 | rdmsr(MSR_IA32_APICBASE, msr, msr2); |
1295 | 1289 | ||
1296 | if (msr & X2APIC_ENABLE) { | 1290 | if (msr & X2APIC_ENABLE) { |
1297 | printk("x2apic enabled by BIOS, switching to x2apic ops\n"); | 1291 | pr_info("x2apic enabled by BIOS, switching to x2apic ops\n"); |
1298 | x2apic_preenabled = x2apic = 1; | 1292 | x2apic_preenabled = x2apic = 1; |
1299 | apic_ops = &x2apic_ops; | 1293 | apic_ops = &x2apic_ops; |
1300 | } | 1294 | } |
@@ -1306,7 +1300,7 @@ void enable_x2apic(void) | |||
1306 | 1300 | ||
1307 | rdmsr(MSR_IA32_APICBASE, msr, msr2); | 1301 | rdmsr(MSR_IA32_APICBASE, msr, msr2); |
1308 | if (!(msr & X2APIC_ENABLE)) { | 1302 | if (!(msr & X2APIC_ENABLE)) { |
1309 | printk("Enabling x2apic\n"); | 1303 | pr_info("Enabling x2apic\n"); |
1310 | wrmsr(MSR_IA32_APICBASE, msr | X2APIC_ENABLE, 0); | 1304 | wrmsr(MSR_IA32_APICBASE, msr | X2APIC_ENABLE, 0); |
1311 | } | 1305 | } |
1312 | } | 1306 | } |
@@ -1321,9 +1315,8 @@ void __init enable_IR_x2apic(void) | |||
1321 | return; | 1315 | return; |
1322 | 1316 | ||
1323 | if (!x2apic_preenabled && disable_x2apic) { | 1317 | if (!x2apic_preenabled && disable_x2apic) { |
1324 | printk(KERN_INFO | 1318 | pr_info("Skipped enabling x2apic and Interrupt-remapping " |
1325 | "Skipped enabling x2apic and Interrupt-remapping " | 1319 | "because of nox2apic\n"); |
1326 | "because of nox2apic\n"); | ||
1327 | return; | 1320 | return; |
1328 | } | 1321 | } |
1329 | 1322 | ||
@@ -1331,22 +1324,19 @@ void __init enable_IR_x2apic(void) | |||
1331 | panic("Bios already enabled x2apic, can't enforce nox2apic"); | 1324 | panic("Bios already enabled x2apic, can't enforce nox2apic"); |
1332 | 1325 | ||
1333 | if (!x2apic_preenabled && skip_ioapic_setup) { | 1326 | if (!x2apic_preenabled && skip_ioapic_setup) { |
1334 | printk(KERN_INFO | 1327 | pr_info("Skipped enabling x2apic and Interrupt-remapping " |
1335 | "Skipped enabling x2apic and Interrupt-remapping " | 1328 | "because of skipping io-apic setup\n"); |
1336 | "because of skipping io-apic setup\n"); | ||
1337 | return; | 1329 | return; |
1338 | } | 1330 | } |
1339 | 1331 | ||
1340 | ret = dmar_table_init(); | 1332 | ret = dmar_table_init(); |
1341 | if (ret) { | 1333 | if (ret) { |
1342 | printk(KERN_INFO | 1334 | pr_info("dmar_table_init() failed with %d:\n", ret); |
1343 | "dmar_table_init() failed with %d:\n", ret); | ||
1344 | 1335 | ||
1345 | if (x2apic_preenabled) | 1336 | if (x2apic_preenabled) |
1346 | panic("x2apic enabled by bios. But IR enabling failed"); | 1337 | panic("x2apic enabled by bios. But IR enabling failed"); |
1347 | else | 1338 | else |
1348 | printk(KERN_INFO | 1339 | pr_info("Not enabling x2apic,Intr-remapping\n"); |
1349 | "Not enabling x2apic,Intr-remapping\n"); | ||
1350 | return; | 1340 | return; |
1351 | } | 1341 | } |
1352 | 1342 | ||
@@ -1355,7 +1345,7 @@ void __init enable_IR_x2apic(void) | |||
1355 | 1345 | ||
1356 | ret = save_mask_IO_APIC_setup(); | 1346 | ret = save_mask_IO_APIC_setup(); |
1357 | if (ret) { | 1347 | if (ret) { |
1358 | printk(KERN_INFO "Saving IO-APIC state failed: %d\n", ret); | 1348 | pr_info("Saving IO-APIC state failed: %d\n", ret); |
1359 | goto end; | 1349 | goto end; |
1360 | } | 1350 | } |
1361 | 1351 | ||
@@ -1390,14 +1380,11 @@ end: | |||
1390 | 1380 | ||
1391 | if (!ret) { | 1381 | if (!ret) { |
1392 | if (!x2apic_preenabled) | 1382 | if (!x2apic_preenabled) |
1393 | printk(KERN_INFO | 1383 | pr_info("Enabled x2apic and interrupt-remapping\n"); |
1394 | "Enabled x2apic and interrupt-remapping\n"); | ||
1395 | else | 1384 | else |
1396 | printk(KERN_INFO | 1385 | pr_info("Enabled Interrupt-remapping\n"); |
1397 | "Enabled Interrupt-remapping\n"); | ||
1398 | } else | 1386 | } else |
1399 | printk(KERN_ERR | 1387 | pr_err("Failed to enable Interrupt-remapping and x2apic\n"); |
1400 | "Failed to enable Interrupt-remapping and x2apic\n"); | ||
1401 | #else | 1388 | #else |
1402 | if (!cpu_has_x2apic) | 1389 | if (!cpu_has_x2apic) |
1403 | return; | 1390 | return; |
@@ -1406,8 +1393,8 @@ end: | |||
1406 | panic("x2apic enabled prior OS handover," | 1393 | panic("x2apic enabled prior OS handover," |
1407 | " enable CONFIG_INTR_REMAP"); | 1394 | " enable CONFIG_INTR_REMAP"); |
1408 | 1395 | ||
1409 | printk(KERN_INFO "Enable CONFIG_INTR_REMAP for enabling intr-remapping " | 1396 | pr_info("Enable CONFIG_INTR_REMAP for enabling intr-remapping " |
1410 | " and x2apic\n"); | 1397 | " and x2apic\n"); |
1411 | #endif | 1398 | #endif |
1412 | 1399 | ||
1413 | return; | 1400 | return; |
@@ -1424,7 +1411,7 @@ end: | |||
1424 | static int __init detect_init_APIC(void) | 1411 | static int __init detect_init_APIC(void) |
1425 | { | 1412 | { |
1426 | if (!cpu_has_apic) { | 1413 | if (!cpu_has_apic) { |
1427 | printk(KERN_INFO "No local APIC present\n"); | 1414 | pr_info("No local APIC present\n"); |
1428 | return -1; | 1415 | return -1; |
1429 | } | 1416 | } |
1430 | 1417 | ||
@@ -1465,8 +1452,8 @@ static int __init detect_init_APIC(void) | |||
1465 | * "lapic" specified. | 1452 | * "lapic" specified. |
1466 | */ | 1453 | */ |
1467 | if (!force_enable_local_apic) { | 1454 | if (!force_enable_local_apic) { |
1468 | printk(KERN_INFO "Local APIC disabled by BIOS -- " | 1455 | pr_info("Local APIC disabled by BIOS -- " |
1469 | "you can enable it with \"lapic\"\n"); | 1456 | "you can enable it with \"lapic\"\n"); |
1470 | return -1; | 1457 | return -1; |
1471 | } | 1458 | } |
1472 | /* | 1459 | /* |
@@ -1476,8 +1463,7 @@ static int __init detect_init_APIC(void) | |||
1476 | */ | 1463 | */ |
1477 | rdmsr(MSR_IA32_APICBASE, l, h); | 1464 | rdmsr(MSR_IA32_APICBASE, l, h); |
1478 | if (!(l & MSR_IA32_APICBASE_ENABLE)) { | 1465 | if (!(l & MSR_IA32_APICBASE_ENABLE)) { |
1479 | printk(KERN_INFO | 1466 | pr_info("Local APIC disabled by BIOS -- reenabling.\n"); |
1480 | "Local APIC disabled by BIOS -- reenabling.\n"); | ||
1481 | l &= ~MSR_IA32_APICBASE_BASE; | 1467 | l &= ~MSR_IA32_APICBASE_BASE; |
1482 | l |= MSR_IA32_APICBASE_ENABLE | APIC_DEFAULT_PHYS_BASE; | 1468 | l |= MSR_IA32_APICBASE_ENABLE | APIC_DEFAULT_PHYS_BASE; |
1483 | wrmsr(MSR_IA32_APICBASE, l, h); | 1469 | wrmsr(MSR_IA32_APICBASE, l, h); |
@@ -1490,7 +1476,7 @@ static int __init detect_init_APIC(void) | |||
1490 | */ | 1476 | */ |
1491 | features = cpuid_edx(1); | 1477 | features = cpuid_edx(1); |
1492 | if (!(features & (1 << X86_FEATURE_APIC))) { | 1478 | if (!(features & (1 << X86_FEATURE_APIC))) { |
1493 | printk(KERN_WARNING "Could not enable APIC!\n"); | 1479 | pr_warning("Could not enable APIC!\n"); |
1494 | return -1; | 1480 | return -1; |
1495 | } | 1481 | } |
1496 | set_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC); | 1482 | set_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC); |
@@ -1501,14 +1487,14 @@ static int __init detect_init_APIC(void) | |||
1501 | if (l & MSR_IA32_APICBASE_ENABLE) | 1487 | if (l & MSR_IA32_APICBASE_ENABLE) |
1502 | mp_lapic_addr = l & MSR_IA32_APICBASE_BASE; | 1488 | mp_lapic_addr = l & MSR_IA32_APICBASE_BASE; |
1503 | 1489 | ||
1504 | printk(KERN_INFO "Found and enabled local APIC!\n"); | 1490 | pr_info("Found and enabled local APIC!\n"); |
1505 | 1491 | ||
1506 | apic_pm_activate(); | 1492 | apic_pm_activate(); |
1507 | 1493 | ||
1508 | return 0; | 1494 | return 0; |
1509 | 1495 | ||
1510 | no_apic: | 1496 | no_apic: |
1511 | printk(KERN_INFO "No local APIC present or hardware disabled\n"); | 1497 | pr_info("No local APIC present or hardware disabled\n"); |
1512 | return -1; | 1498 | return -1; |
1513 | } | 1499 | } |
1514 | #endif | 1500 | #endif |
@@ -1584,12 +1570,12 @@ int __init APIC_init_uniprocessor(void) | |||
1584 | { | 1570 | { |
1585 | #ifdef CONFIG_X86_64 | 1571 | #ifdef CONFIG_X86_64 |
1586 | if (disable_apic) { | 1572 | if (disable_apic) { |
1587 | printk(KERN_INFO "Apic disabled\n"); | 1573 | pr_info("Apic disabled\n"); |
1588 | return -1; | 1574 | return -1; |
1589 | } | 1575 | } |
1590 | if (!cpu_has_apic) { | 1576 | if (!cpu_has_apic) { |
1591 | disable_apic = 1; | 1577 | disable_apic = 1; |
1592 | printk(KERN_INFO "Apic disabled by BIOS\n"); | 1578 | pr_info("Apic disabled by BIOS\n"); |
1593 | return -1; | 1579 | return -1; |
1594 | } | 1580 | } |
1595 | #else | 1581 | #else |
@@ -1601,8 +1587,8 @@ int __init APIC_init_uniprocessor(void) | |||
1601 | */ | 1587 | */ |
1602 | if (!cpu_has_apic && | 1588 | if (!cpu_has_apic && |
1603 | APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) { | 1589 | APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) { |
1604 | printk(KERN_ERR "BIOS bug, local APIC 0x%x not detected!...\n", | 1590 | pr_err("BIOS bug, local APIC 0x%x not detected!...\n", |
1605 | boot_cpu_physical_apicid); | 1591 | boot_cpu_physical_apicid); |
1606 | clear_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC); | 1592 | clear_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC); |
1607 | return -1; | 1593 | return -1; |
1608 | } | 1594 | } |
@@ -1694,8 +1680,8 @@ void smp_spurious_interrupt(struct pt_regs *regs) | |||
1694 | inc_irq_stat(irq_spurious_count); | 1680 | inc_irq_stat(irq_spurious_count); |
1695 | 1681 | ||
1696 | /* see sw-dev-man vol 3, chapter 7.4.13.5 */ | 1682 | /* see sw-dev-man vol 3, chapter 7.4.13.5 */ |
1697 | printk(KERN_INFO "spurious APIC interrupt on CPU#%d, " | 1683 | pr_info("spurious APIC interrupt on CPU#%d, " |
1698 | "should never happen.\n", smp_processor_id()); | 1684 | "should never happen.\n", smp_processor_id()); |
1699 | irq_exit(); | 1685 | irq_exit(); |
1700 | } | 1686 | } |
1701 | 1687 | ||
@@ -1717,17 +1703,18 @@ void smp_error_interrupt(struct pt_regs *regs) | |||
1717 | ack_APIC_irq(); | 1703 | ack_APIC_irq(); |
1718 | atomic_inc(&irq_err_count); | 1704 | atomic_inc(&irq_err_count); |
1719 | 1705 | ||
1720 | /* Here is what the APIC error bits mean: | 1706 | /* |
1721 | 0: Send CS error | 1707 | * Here is what the APIC error bits mean: |
1722 | 1: Receive CS error | 1708 | * 0: Send CS error |
1723 | 2: Send accept error | 1709 | * 1: Receive CS error |
1724 | 3: Receive accept error | 1710 | * 2: Send accept error |
1725 | 4: Reserved | 1711 | * 3: Receive accept error |
1726 | 5: Send illegal vector | 1712 | * 4: Reserved |
1727 | 6: Received illegal vector | 1713 | * 5: Send illegal vector |
1728 | 7: Illegal register address | 1714 | * 6: Received illegal vector |
1729 | */ | 1715 | * 7: Illegal register address |
1730 | printk(KERN_DEBUG "APIC error on CPU%d: %02x(%02x)\n", | 1716 | */ |
1717 | pr_debug("APIC error on CPU%d: %02x(%02x)\n", | ||
1731 | smp_processor_id(), v , v1); | 1718 | smp_processor_id(), v , v1); |
1732 | irq_exit(); | 1719 | irq_exit(); |
1733 | } | 1720 | } |
@@ -1831,15 +1818,15 @@ void __cpuinit generic_processor_info(int apicid, int version) | |||
1831 | * Validate version | 1818 | * Validate version |
1832 | */ | 1819 | */ |
1833 | if (version == 0x0) { | 1820 | if (version == 0x0) { |
1834 | printk(KERN_WARNING "BIOS bug, APIC version is 0 for CPU#%d! " | 1821 | pr_warning("BIOS bug, APIC version is 0 for CPU#%d! " |
1835 | "fixing up to 0x10. (tell your hw vendor)\n", | 1822 | "fixing up to 0x10. (tell your hw vendor)\n", |
1836 | version); | 1823 | version); |
1837 | version = 0x10; | 1824 | version = 0x10; |
1838 | } | 1825 | } |
1839 | apic_version[apicid] = version; | 1826 | apic_version[apicid] = version; |
1840 | 1827 | ||
1841 | if (num_processors >= NR_CPUS) { | 1828 | if (num_processors >= NR_CPUS) { |
1842 | printk(KERN_WARNING "WARNING: NR_CPUS limit of %i reached." | 1829 | pr_warning("WARNING: NR_CPUS limit of %i reached." |
1843 | " Processor ignored.\n", NR_CPUS); | 1830 | " Processor ignored.\n", NR_CPUS); |
1844 | return; | 1831 | return; |
1845 | } | 1832 | } |
@@ -2202,7 +2189,7 @@ static int __init apic_set_verbosity(char *arg) | |||
2202 | else if (strcmp("verbose", arg) == 0) | 2189 | else if (strcmp("verbose", arg) == 0) |
2203 | apic_verbosity = APIC_VERBOSE; | 2190 | apic_verbosity = APIC_VERBOSE; |
2204 | else { | 2191 | else { |
2205 | printk(KERN_WARNING "APIC Verbosity level %s not recognised" | 2192 | pr_warning("APIC Verbosity level %s not recognised" |
2206 | " use apic=verbose or apic=debug\n", arg); | 2193 | " use apic=verbose or apic=debug\n", arg); |
2207 | return -EINVAL; | 2194 | return -EINVAL; |
2208 | } | 2195 | } |
diff --git a/arch/x86/kernel/nmi.c b/arch/x86/kernel/nmi.c index 2c97f07f1c2c..13316cf57cdb 100644 --- a/arch/x86/kernel/nmi.c +++ b/arch/x86/kernel/nmi.c | |||
@@ -131,6 +131,11 @@ static void report_broken_nmi(int cpu, int *prev_nmi_count) | |||
131 | atomic_dec(&nmi_active); | 131 | atomic_dec(&nmi_active); |
132 | } | 132 | } |
133 | 133 | ||
134 | static void __acpi_nmi_disable(void *__unused) | ||
135 | { | ||
136 | apic_write(APIC_LVT0, APIC_DM_NMI | APIC_LVT_MASKED); | ||
137 | } | ||
138 | |||
134 | int __init check_nmi_watchdog(void) | 139 | int __init check_nmi_watchdog(void) |
135 | { | 140 | { |
136 | unsigned int *prev_nmi_count; | 141 | unsigned int *prev_nmi_count; |
@@ -179,8 +184,12 @@ int __init check_nmi_watchdog(void) | |||
179 | kfree(prev_nmi_count); | 184 | kfree(prev_nmi_count); |
180 | return 0; | 185 | return 0; |
181 | error: | 186 | error: |
182 | if (nmi_watchdog == NMI_IO_APIC && !timer_through_8259) | 187 | if (nmi_watchdog == NMI_IO_APIC) { |
183 | disable_8259A_irq(0); | 188 | if (!timer_through_8259) |
189 | disable_8259A_irq(0); | ||
190 | on_each_cpu(__acpi_nmi_disable, NULL, 1); | ||
191 | } | ||
192 | |||
184 | #ifdef CONFIG_X86_32 | 193 | #ifdef CONFIG_X86_32 |
185 | timer_ack = 0; | 194 | timer_ack = 0; |
186 | #endif | 195 | #endif |
@@ -285,11 +294,6 @@ void acpi_nmi_enable(void) | |||
285 | on_each_cpu(__acpi_nmi_enable, NULL, 1); | 294 | on_each_cpu(__acpi_nmi_enable, NULL, 1); |
286 | } | 295 | } |
287 | 296 | ||
288 | static void __acpi_nmi_disable(void *__unused) | ||
289 | { | ||
290 | apic_write(APIC_LVT0, APIC_DM_NMI | APIC_LVT_MASKED); | ||
291 | } | ||
292 | |||
293 | /* | 297 | /* |
294 | * Disable timer based NMIs on all CPUs: | 298 | * Disable timer based NMIs on all CPUs: |
295 | */ | 299 | */ |
@@ -340,6 +344,8 @@ void stop_apic_nmi_watchdog(void *unused) | |||
340 | return; | 344 | return; |
341 | if (nmi_watchdog == NMI_LOCAL_APIC) | 345 | if (nmi_watchdog == NMI_LOCAL_APIC) |
342 | lapic_watchdog_stop(); | 346 | lapic_watchdog_stop(); |
347 | else | ||
348 | __acpi_nmi_disable(NULL); | ||
343 | __get_cpu_var(wd_enabled) = 0; | 349 | __get_cpu_var(wd_enabled) = 0; |
344 | atomic_dec(&nmi_active); | 350 | atomic_dec(&nmi_active); |
345 | } | 351 | } |
@@ -465,6 +471,24 @@ nmi_watchdog_tick(struct pt_regs *regs, unsigned reason) | |||
465 | 471 | ||
466 | #ifdef CONFIG_SYSCTL | 472 | #ifdef CONFIG_SYSCTL |
467 | 473 | ||
474 | static void enable_ioapic_nmi_watchdog_single(void *unused) | ||
475 | { | ||
476 | __get_cpu_var(wd_enabled) = 1; | ||
477 | atomic_inc(&nmi_active); | ||
478 | __acpi_nmi_enable(NULL); | ||
479 | } | ||
480 | |||
481 | static void enable_ioapic_nmi_watchdog(void) | ||
482 | { | ||
483 | on_each_cpu(enable_ioapic_nmi_watchdog_single, NULL, 1); | ||
484 | touch_nmi_watchdog(); | ||
485 | } | ||
486 | |||
487 | static void disable_ioapic_nmi_watchdog(void) | ||
488 | { | ||
489 | on_each_cpu(stop_apic_nmi_watchdog, NULL, 1); | ||
490 | } | ||
491 | |||
468 | static int __init setup_unknown_nmi_panic(char *str) | 492 | static int __init setup_unknown_nmi_panic(char *str) |
469 | { | 493 | { |
470 | unknown_nmi_panic = 1; | 494 | unknown_nmi_panic = 1; |
@@ -507,6 +531,11 @@ int proc_nmi_enabled(struct ctl_table *table, int write, struct file *file, | |||
507 | enable_lapic_nmi_watchdog(); | 531 | enable_lapic_nmi_watchdog(); |
508 | else | 532 | else |
509 | disable_lapic_nmi_watchdog(); | 533 | disable_lapic_nmi_watchdog(); |
534 | } else if (nmi_watchdog == NMI_IO_APIC) { | ||
535 | if (nmi_watchdog_enabled) | ||
536 | enable_ioapic_nmi_watchdog(); | ||
537 | else | ||
538 | disable_ioapic_nmi_watchdog(); | ||
510 | } else { | 539 | } else { |
511 | printk(KERN_WARNING | 540 | printk(KERN_WARNING |
512 | "NMI watchdog doesn't know what hardware to touch\n"); | 541 | "NMI watchdog doesn't know what hardware to touch\n"); |
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c index 9d5674f7b6cc..bdec76e55594 100644 --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c | |||
@@ -794,6 +794,9 @@ void __init setup_arch(char **cmdline_p) | |||
794 | printk(KERN_INFO "Command line: %s\n", boot_command_line); | 794 | printk(KERN_INFO "Command line: %s\n", boot_command_line); |
795 | #endif | 795 | #endif |
796 | 796 | ||
797 | /* VMI may relocate the fixmap; do this before touching ioremap area */ | ||
798 | vmi_init(); | ||
799 | |||
797 | early_cpu_init(); | 800 | early_cpu_init(); |
798 | early_ioremap_init(); | 801 | early_ioremap_init(); |
799 | 802 | ||
@@ -880,13 +883,8 @@ void __init setup_arch(char **cmdline_p) | |||
880 | check_efer(); | 883 | check_efer(); |
881 | #endif | 884 | #endif |
882 | 885 | ||
883 | #if defined(CONFIG_VMI) && defined(CONFIG_X86_32) | 886 | /* Must be before kernel pagetables are setup */ |
884 | /* | 887 | vmi_activate(); |
885 | * Must be before kernel pagetables are setup | ||
886 | * or fixmap area is touched. | ||
887 | */ | ||
888 | vmi_init(); | ||
889 | #endif | ||
890 | 888 | ||
891 | /* after early param, so could get panic from serial */ | 889 | /* after early param, so could get panic from serial */ |
892 | reserve_early_setup_data(); | 890 | reserve_early_setup_data(); |
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c index 7b1093397319..f71f96fc9e62 100644 --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c | |||
@@ -294,9 +294,7 @@ static void __cpuinit start_secondary(void *unused) | |||
294 | * fragile that we want to limit the things done here to the | 294 | * fragile that we want to limit the things done here to the |
295 | * most necessary things. | 295 | * most necessary things. |
296 | */ | 296 | */ |
297 | #ifdef CONFIG_VMI | ||
298 | vmi_bringup(); | 297 | vmi_bringup(); |
299 | #endif | ||
300 | cpu_init(); | 298 | cpu_init(); |
301 | preempt_disable(); | 299 | preempt_disable(); |
302 | smp_callin(); | 300 | smp_callin(); |
diff --git a/arch/x86/kernel/vmi_32.c b/arch/x86/kernel/vmi_32.c index 8b6c393ab9fd..22fd6577156a 100644 --- a/arch/x86/kernel/vmi_32.c +++ b/arch/x86/kernel/vmi_32.c | |||
@@ -960,8 +960,6 @@ static inline int __init activate_vmi(void) | |||
960 | 960 | ||
961 | void __init vmi_init(void) | 961 | void __init vmi_init(void) |
962 | { | 962 | { |
963 | unsigned long flags; | ||
964 | |||
965 | if (!vmi_rom) | 963 | if (!vmi_rom) |
966 | probe_vmi_rom(); | 964 | probe_vmi_rom(); |
967 | else | 965 | else |
@@ -973,13 +971,21 @@ void __init vmi_init(void) | |||
973 | 971 | ||
974 | reserve_top_address(-vmi_rom->virtual_top); | 972 | reserve_top_address(-vmi_rom->virtual_top); |
975 | 973 | ||
976 | local_irq_save(flags); | ||
977 | activate_vmi(); | ||
978 | |||
979 | #ifdef CONFIG_X86_IO_APIC | 974 | #ifdef CONFIG_X86_IO_APIC |
980 | /* This is virtual hardware; timer routing is wired correctly */ | 975 | /* This is virtual hardware; timer routing is wired correctly */ |
981 | no_timer_check = 1; | 976 | no_timer_check = 1; |
982 | #endif | 977 | #endif |
978 | } | ||
979 | |||
980 | void vmi_activate(void) | ||
981 | { | ||
982 | unsigned long flags; | ||
983 | |||
984 | if (!vmi_rom) | ||
985 | return; | ||
986 | |||
987 | local_irq_save(flags); | ||
988 | activate_vmi(); | ||
983 | local_irq_restore(flags & X86_EFLAGS_IF); | 989 | local_irq_restore(flags & X86_EFLAGS_IF); |
984 | } | 990 | } |
985 | 991 | ||