diff options
author | Jack Steiner <steiner@sgi.com> | 2008-04-16 12:45:15 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-04-19 13:19:58 -0400 |
commit | 34d0559178393547505ec9492321255405f4e441 (patch) | |
tree | 7b2b41cc24c901736ed75f1b57dd917e40e46410 /arch/x86 | |
parent | 098cb7f27ed69276e4db560a444b94b982e4bb8f (diff) |
x86: UV startup of slave cpus
This patch changes smpboot.c so that it can start slave cpus running
in UV non-unique apicid mode. The SIPI must be sent using a UV-specific
mechanism.
Signed-off-by: Jack Steiner <steiner@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86')
-rw-r--r-- | arch/x86/kernel/genx2apic_uv_x.c | 17 | ||||
-rw-r--r-- | arch/x86/kernel/smpboot.c | 29 |
2 files changed, 31 insertions, 15 deletions
diff --git a/arch/x86/kernel/genx2apic_uv_x.c b/arch/x86/kernel/genx2apic_uv_x.c index 5d77c9cd8e15..ebf13908a743 100644 --- a/arch/x86/kernel/genx2apic_uv_x.c +++ b/arch/x86/kernel/genx2apic_uv_x.c | |||
@@ -61,26 +61,31 @@ int uv_wakeup_secondary(int phys_apicid, unsigned int start_rip) | |||
61 | val = (1UL << UVH_IPI_INT_SEND_SHFT) | | 61 | val = (1UL << UVH_IPI_INT_SEND_SHFT) | |
62 | (phys_apicid << UVH_IPI_INT_APIC_ID_SHFT) | | 62 | (phys_apicid << UVH_IPI_INT_APIC_ID_SHFT) | |
63 | (((long)start_rip << UVH_IPI_INT_VECTOR_SHFT) >> 12) | | 63 | (((long)start_rip << UVH_IPI_INT_VECTOR_SHFT) >> 12) | |
64 | (6 << UVH_IPI_INT_DELIVERY_MODE_SHFT); | 64 | APIC_DM_INIT; |
65 | uv_write_global_mmr64(nasid, UVH_IPI_INT, val); | ||
66 | mdelay(10); | ||
67 | |||
68 | val = (1UL << UVH_IPI_INT_SEND_SHFT) | | ||
69 | (phys_apicid << UVH_IPI_INT_APIC_ID_SHFT) | | ||
70 | (((long)start_rip << UVH_IPI_INT_VECTOR_SHFT) >> 12) | | ||
71 | APIC_DM_STARTUP; | ||
65 | uv_write_global_mmr64(nasid, UVH_IPI_INT, val); | 72 | uv_write_global_mmr64(nasid, UVH_IPI_INT, val); |
66 | return 0; | 73 | return 0; |
67 | } | 74 | } |
68 | 75 | ||
69 | static void uv_send_IPI_one(int cpu, int vector) | 76 | static void uv_send_IPI_one(int cpu, int vector) |
70 | { | 77 | { |
71 | unsigned long val, apicid; | 78 | unsigned long val, apicid, lapicid; |
72 | int nasid; | 79 | int nasid; |
73 | 80 | ||
74 | apicid = per_cpu(x86_cpu_to_apicid, cpu); /* ZZZ - cache node-local ? */ | 81 | apicid = per_cpu(x86_cpu_to_apicid, cpu); /* ZZZ - cache node-local ? */ |
82 | lapicid = apicid & 0x3f; /* ZZZ macro needed */ | ||
75 | nasid = uv_apicid_to_nasid(apicid); | 83 | nasid = uv_apicid_to_nasid(apicid); |
76 | val = | 84 | val = |
77 | (1UL << UVH_IPI_INT_SEND_SHFT) | (apicid << | 85 | (1UL << UVH_IPI_INT_SEND_SHFT) | (lapicid << |
78 | UVH_IPI_INT_APIC_ID_SHFT) | | 86 | UVH_IPI_INT_APIC_ID_SHFT) | |
79 | (vector << UVH_IPI_INT_VECTOR_SHFT); | 87 | (vector << UVH_IPI_INT_VECTOR_SHFT); |
80 | uv_write_global_mmr64(nasid, UVH_IPI_INT, val); | 88 | uv_write_global_mmr64(nasid, UVH_IPI_INT, val); |
81 | printk(KERN_DEBUG | ||
82 | "UV: IPI to cpu %d, apicid 0x%lx, vec %d, nasid%d, val 0x%lx\n", | ||
83 | cpu, apicid, vector, nasid, val); | ||
84 | } | 89 | } |
85 | 90 | ||
86 | static void uv_send_IPI_mask(cpumask_t mask, int vector) | 91 | static void uv_send_IPI_mask(cpumask_t mask, int vector) |
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c index e6abe8a49b1f..6a925394bc7e 100644 --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c | |||
@@ -61,6 +61,7 @@ | |||
61 | #include <asm/mtrr.h> | 61 | #include <asm/mtrr.h> |
62 | #include <asm/nmi.h> | 62 | #include <asm/nmi.h> |
63 | #include <asm/vmi.h> | 63 | #include <asm/vmi.h> |
64 | #include <asm/genapic.h> | ||
64 | #include <linux/mc146818rtc.h> | 65 | #include <linux/mc146818rtc.h> |
65 | 66 | ||
66 | #include <mach_apic.h> | 67 | #include <mach_apic.h> |
@@ -677,6 +678,12 @@ wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip) | |||
677 | unsigned long send_status, accept_status = 0; | 678 | unsigned long send_status, accept_status = 0; |
678 | int maxlvt, num_starts, j; | 679 | int maxlvt, num_starts, j; |
679 | 680 | ||
681 | if (get_uv_system_type() == UV_NON_UNIQUE_APIC) { | ||
682 | send_status = uv_wakeup_secondary(phys_apicid, start_eip); | ||
683 | atomic_set(&init_deasserted, 1); | ||
684 | return send_status; | ||
685 | } | ||
686 | |||
680 | /* | 687 | /* |
681 | * Be paranoid about clearing APIC errors. | 688 | * Be paranoid about clearing APIC errors. |
682 | */ | 689 | */ |
@@ -918,16 +925,19 @@ do_rest: | |||
918 | 925 | ||
919 | atomic_set(&init_deasserted, 0); | 926 | atomic_set(&init_deasserted, 0); |
920 | 927 | ||
921 | Dprintk("Setting warm reset code and vector.\n"); | 928 | if (get_uv_system_type() != UV_NON_UNIQUE_APIC) { |
922 | 929 | ||
923 | store_NMI_vector(&nmi_high, &nmi_low); | 930 | Dprintk("Setting warm reset code and vector.\n"); |
924 | 931 | ||
925 | smpboot_setup_warm_reset_vector(start_ip); | 932 | store_NMI_vector(&nmi_high, &nmi_low); |
926 | /* | 933 | |
927 | * Be paranoid about clearing APIC errors. | 934 | smpboot_setup_warm_reset_vector(start_ip); |
928 | */ | 935 | /* |
929 | apic_write(APIC_ESR, 0); | 936 | * Be paranoid about clearing APIC errors. |
930 | apic_read(APIC_ESR); | 937 | */ |
938 | apic_write(APIC_ESR, 0); | ||
939 | apic_read(APIC_ESR); | ||
940 | } | ||
931 | 941 | ||
932 | /* | 942 | /* |
933 | * Starting actual IPI sequence... | 943 | * Starting actual IPI sequence... |
@@ -966,7 +976,8 @@ do_rest: | |||
966 | else | 976 | else |
967 | /* trampoline code not run */ | 977 | /* trampoline code not run */ |
968 | printk(KERN_ERR "Not responding.\n"); | 978 | printk(KERN_ERR "Not responding.\n"); |
969 | inquire_remote_apic(apicid); | 979 | if (get_uv_system_type() != UV_NON_UNIQUE_APIC) |
980 | inquire_remote_apic(apicid); | ||
970 | } | 981 | } |
971 | } | 982 | } |
972 | 983 | ||