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authorShaohua Li <shli@kernel.org>2014-04-08 03:58:09 -0400
committerIngo Molnar <mingo@kernel.org>2014-04-16 02:57:08 -0400
commitb13b1d2d8692b437203de7a404c6b809d2cc4d99 (patch)
tree38a4528a0b2cf7d3a9a315d0528fa667494dd6ea /arch/x86
parent5be44a6fb1edb57d7d2d77151870dcd79c8c0e58 (diff)
x86/mm: In the PTE swapout page reclaim case clear the accessed bit instead of flushing the TLB
We use the accessed bit to age a page at page reclaim time, and currently we also flush the TLB when doing so. But in some workloads TLB flush overhead is very heavy. In my simple multithreaded app with a lot of swap to several pcie SSDs, removing the tlb flush gives about 20% ~ 30% swapout speedup. Fortunately just removing the TLB flush is a valid optimization: on x86 CPUs, clearing the accessed bit without a TLB flush doesn't cause data corruption. It could cause incorrect page aging and the (mistaken) reclaim of hot pages, but the chance of that should be relatively low. So as a performance optimization don't flush the TLB when clearing the accessed bit, it will eventually be flushed by a context switch or a VM operation anyway. [ In the rare event of it not getting flushed for a long time the delay shouldn't really matter because there's no real memory pressure for swapout to react to. ] Suggested-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Shaohua Li <shli@fusionio.com> Acked-by: Rik van Riel <riel@redhat.com> Acked-by: Mel Gorman <mgorman@suse.de> Acked-by: Hugh Dickins <hughd@google.com> Acked-by: Johannes Weiner <hannes@cmpxchg.org> Cc: linux-mm@kvack.org Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/20140408075809.GA1764@kernel.org [ Rewrote the changelog and the code comments. ] Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/mm/pgtable.c21
1 files changed, 14 insertions, 7 deletions
diff --git a/arch/x86/mm/pgtable.c b/arch/x86/mm/pgtable.c
index c96314abd144..0004ac72dbdd 100644
--- a/arch/x86/mm/pgtable.c
+++ b/arch/x86/mm/pgtable.c
@@ -399,13 +399,20 @@ int pmdp_test_and_clear_young(struct vm_area_struct *vma,
399int ptep_clear_flush_young(struct vm_area_struct *vma, 399int ptep_clear_flush_young(struct vm_area_struct *vma,
400 unsigned long address, pte_t *ptep) 400 unsigned long address, pte_t *ptep)
401{ 401{
402 int young; 402 /*
403 403 * On x86 CPUs, clearing the accessed bit without a TLB flush
404 young = ptep_test_and_clear_young(vma, address, ptep); 404 * doesn't cause data corruption. [ It could cause incorrect
405 if (young) 405 * page aging and the (mistaken) reclaim of hot pages, but the
406 flush_tlb_page(vma, address); 406 * chance of that should be relatively low. ]
407 407 *
408 return young; 408 * So as a performance optimization don't flush the TLB when
409 * clearing the accessed bit, it will eventually be flushed by
410 * a context switch or a VM operation anyway. [ In the rare
411 * event of it not getting flushed for a long time the delay
412 * shouldn't really matter because there's no real memory
413 * pressure for swapout to react to. ]
414 */
415 return ptep_test_and_clear_young(vma, address, ptep);
409} 416}
410 417
411#ifdef CONFIG_TRANSPARENT_HUGEPAGE 418#ifdef CONFIG_TRANSPARENT_HUGEPAGE