diff options
author | Ingo Molnar <mingo@elte.hu> | 2009-06-11 11:55:42 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2009-06-11 11:55:42 -0400 |
commit | 940010c5a314a7bd9b498593bc6ba1718ac5aec5 (patch) | |
tree | d141e08ced08c40c6a8e3ab2cdecde5ff14e560f /arch/x86 | |
parent | 8dc8e5e8bc0ce00b0f656bf972f67cd8a72759e5 (diff) | |
parent | 991ec02cdca33b03a132a0cacfe6f0aa0be9aa8d (diff) |
Merge branch 'linus' into perfcounters/core
Conflicts:
arch/x86/kernel/irqinit.c
arch/x86/kernel/irqinit_64.c
arch/x86/kernel/traps.c
arch/x86/mm/fault.c
include/linux/sched.h
kernel/exit.c
Diffstat (limited to 'arch/x86')
178 files changed, 5706 insertions, 4583 deletions
diff --git a/arch/x86/Kbuild b/arch/x86/Kbuild new file mode 100644 index 000000000000..ad8ec356fb36 --- /dev/null +++ b/arch/x86/Kbuild | |||
@@ -0,0 +1,16 @@ | |||
1 | |||
2 | obj-$(CONFIG_KVM) += kvm/ | ||
3 | |||
4 | # Xen paravirtualization support | ||
5 | obj-$(CONFIG_XEN) += xen/ | ||
6 | |||
7 | # lguest paravirtualization support | ||
8 | obj-$(CONFIG_LGUEST_GUEST) += lguest/ | ||
9 | |||
10 | obj-y += kernel/ | ||
11 | obj-y += mm/ | ||
12 | |||
13 | obj-y += crypto/ | ||
14 | obj-y += vdso/ | ||
15 | obj-$(CONFIG_IA32_EMULATION) += ia32/ | ||
16 | |||
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index cfd78c87a573..68f5578fe38e 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig | |||
@@ -47,6 +47,11 @@ config X86 | |||
47 | select HAVE_KERNEL_BZIP2 | 47 | select HAVE_KERNEL_BZIP2 |
48 | select HAVE_KERNEL_LZMA | 48 | select HAVE_KERNEL_LZMA |
49 | 49 | ||
50 | config OUTPUT_FORMAT | ||
51 | string | ||
52 | default "elf32-i386" if X86_32 | ||
53 | default "elf64-x86-64" if X86_64 | ||
54 | |||
50 | config ARCH_DEFCONFIG | 55 | config ARCH_DEFCONFIG |
51 | string | 56 | string |
52 | default "arch/x86/configs/i386_defconfig" if X86_32 | 57 | default "arch/x86/configs/i386_defconfig" if X86_32 |
@@ -274,15 +279,9 @@ config SPARSE_IRQ | |||
274 | 279 | ||
275 | If you don't know what to do here, say N. | 280 | If you don't know what to do here, say N. |
276 | 281 | ||
277 | config NUMA_MIGRATE_IRQ_DESC | 282 | config NUMA_IRQ_DESC |
278 | bool "Move irq desc when changing irq smp_affinity" | 283 | def_bool y |
279 | depends on SPARSE_IRQ && NUMA | 284 | depends on SPARSE_IRQ && NUMA |
280 | depends on BROKEN | ||
281 | default n | ||
282 | ---help--- | ||
283 | This enables moving irq_desc to cpu/node that irq will use handled. | ||
284 | |||
285 | If you don't know what to do here, say N. | ||
286 | 285 | ||
287 | config X86_MPPARSE | 286 | config X86_MPPARSE |
288 | bool "Enable MPS table" if ACPI | 287 | bool "Enable MPS table" if ACPI |
@@ -355,7 +354,7 @@ config X86_UV | |||
355 | depends on X86_64 | 354 | depends on X86_64 |
356 | depends on X86_EXTENDED_PLATFORM | 355 | depends on X86_EXTENDED_PLATFORM |
357 | depends on NUMA | 356 | depends on NUMA |
358 | select X86_X2APIC | 357 | depends on X86_X2APIC |
359 | ---help--- | 358 | ---help--- |
360 | This option is needed in order to support SGI Ultraviolet systems. | 359 | This option is needed in order to support SGI Ultraviolet systems. |
361 | If you don't have one of these, you should say N here. | 360 | If you don't have one of these, you should say N here. |
@@ -1467,9 +1466,7 @@ config KEXEC_JUMP | |||
1467 | 1466 | ||
1468 | config PHYSICAL_START | 1467 | config PHYSICAL_START |
1469 | hex "Physical address where the kernel is loaded" if (EMBEDDED || CRASH_DUMP) | 1468 | hex "Physical address where the kernel is loaded" if (EMBEDDED || CRASH_DUMP) |
1470 | default "0x1000000" if X86_NUMAQ | 1469 | default "0x1000000" |
1471 | default "0x200000" if X86_64 | ||
1472 | default "0x100000" | ||
1473 | ---help--- | 1470 | ---help--- |
1474 | This gives the physical address where the kernel is loaded. | 1471 | This gives the physical address where the kernel is loaded. |
1475 | 1472 | ||
@@ -1488,15 +1485,15 @@ config PHYSICAL_START | |||
1488 | to be specifically compiled to run from a specific memory area | 1485 | to be specifically compiled to run from a specific memory area |
1489 | (normally a reserved region) and this option comes handy. | 1486 | (normally a reserved region) and this option comes handy. |
1490 | 1487 | ||
1491 | So if you are using bzImage for capturing the crash dump, leave | 1488 | So if you are using bzImage for capturing the crash dump, |
1492 | the value here unchanged to 0x100000 and set CONFIG_RELOCATABLE=y. | 1489 | leave the value here unchanged to 0x1000000 and set |
1493 | Otherwise if you plan to use vmlinux for capturing the crash dump | 1490 | CONFIG_RELOCATABLE=y. Otherwise if you plan to use vmlinux |
1494 | change this value to start of the reserved region (Typically 16MB | 1491 | for capturing the crash dump change this value to start of |
1495 | 0x1000000). In other words, it can be set based on the "X" value as | 1492 | the reserved region. In other words, it can be set based on |
1496 | specified in the "crashkernel=YM@XM" command line boot parameter | 1493 | the "X" value as specified in the "crashkernel=YM@XM" |
1497 | passed to the panic-ed kernel. Typically this parameter is set as | 1494 | command line boot parameter passed to the panic-ed |
1498 | crashkernel=64M@16M. Please take a look at | 1495 | kernel. Please take a look at Documentation/kdump/kdump.txt |
1499 | Documentation/kdump/kdump.txt for more details about crash dumps. | 1496 | for more details about crash dumps. |
1500 | 1497 | ||
1501 | Usage of bzImage for capturing the crash dump is recommended as | 1498 | Usage of bzImage for capturing the crash dump is recommended as |
1502 | one does not have to build two kernels. Same kernel can be used | 1499 | one does not have to build two kernels. Same kernel can be used |
@@ -1509,8 +1506,8 @@ config PHYSICAL_START | |||
1509 | Don't change this unless you know what you are doing. | 1506 | Don't change this unless you know what you are doing. |
1510 | 1507 | ||
1511 | config RELOCATABLE | 1508 | config RELOCATABLE |
1512 | bool "Build a relocatable kernel (EXPERIMENTAL)" | 1509 | bool "Build a relocatable kernel" |
1513 | depends on EXPERIMENTAL | 1510 | default y |
1514 | ---help--- | 1511 | ---help--- |
1515 | This builds a kernel image that retains relocation information | 1512 | This builds a kernel image that retains relocation information |
1516 | so it can be loaded someplace besides the default 1MB. | 1513 | so it can be loaded someplace besides the default 1MB. |
@@ -1525,12 +1522,16 @@ config RELOCATABLE | |||
1525 | it has been loaded at and the compile time physical address | 1522 | it has been loaded at and the compile time physical address |
1526 | (CONFIG_PHYSICAL_START) is ignored. | 1523 | (CONFIG_PHYSICAL_START) is ignored. |
1527 | 1524 | ||
1525 | # Relocation on x86-32 needs some additional build support | ||
1526 | config X86_NEED_RELOCS | ||
1527 | def_bool y | ||
1528 | depends on X86_32 && RELOCATABLE | ||
1529 | |||
1528 | config PHYSICAL_ALIGN | 1530 | config PHYSICAL_ALIGN |
1529 | hex | 1531 | hex |
1530 | prompt "Alignment value to which kernel should be aligned" if X86_32 | 1532 | prompt "Alignment value to which kernel should be aligned" if X86_32 |
1531 | default "0x100000" if X86_32 | 1533 | default "0x1000000" |
1532 | default "0x200000" if X86_64 | 1534 | range 0x2000 0x1000000 |
1533 | range 0x2000 0x400000 | ||
1534 | ---help--- | 1535 | ---help--- |
1535 | This value puts the alignment restrictions on physical address | 1536 | This value puts the alignment restrictions on physical address |
1536 | where kernel is loaded and run from. Kernel is compiled for an | 1537 | where kernel is loaded and run from. Kernel is compiled for an |
diff --git a/arch/x86/Kconfig.debug b/arch/x86/Kconfig.debug index d8359e73317f..d105f29bb6bb 100644 --- a/arch/x86/Kconfig.debug +++ b/arch/x86/Kconfig.debug | |||
@@ -159,14 +159,30 @@ config IOMMU_DEBUG | |||
159 | options. See Documentation/x86_64/boot-options.txt for more | 159 | options. See Documentation/x86_64/boot-options.txt for more |
160 | details. | 160 | details. |
161 | 161 | ||
162 | config IOMMU_STRESS | ||
163 | bool "Enable IOMMU stress-test mode" | ||
164 | ---help--- | ||
165 | This option disables various optimizations in IOMMU related | ||
166 | code to do real stress testing of the IOMMU code. This option | ||
167 | will cause a performance drop and should only be enabled for | ||
168 | testing. | ||
169 | |||
162 | config IOMMU_LEAK | 170 | config IOMMU_LEAK |
163 | bool "IOMMU leak tracing" | 171 | bool "IOMMU leak tracing" |
164 | depends on DEBUG_KERNEL | 172 | depends on IOMMU_DEBUG && DMA_API_DEBUG |
165 | depends on IOMMU_DEBUG | ||
166 | ---help--- | 173 | ---help--- |
167 | Add a simple leak tracer to the IOMMU code. This is useful when you | 174 | Add a simple leak tracer to the IOMMU code. This is useful when you |
168 | are debugging a buggy device driver that leaks IOMMU mappings. | 175 | are debugging a buggy device driver that leaks IOMMU mappings. |
169 | 176 | ||
177 | config X86_DS_SELFTEST | ||
178 | bool "DS selftest" | ||
179 | default y | ||
180 | depends on DEBUG_KERNEL | ||
181 | depends on X86_DS | ||
182 | ---help--- | ||
183 | Perform Debug Store selftests at boot time. | ||
184 | If in doubt, say "N". | ||
185 | |||
170 | config HAVE_MMIOTRACE_SUPPORT | 186 | config HAVE_MMIOTRACE_SUPPORT |
171 | def_bool y | 187 | def_bool y |
172 | 188 | ||
diff --git a/arch/x86/Makefile b/arch/x86/Makefile index 8c86b72afdc2..edbd0ca62067 100644 --- a/arch/x86/Makefile +++ b/arch/x86/Makefile | |||
@@ -7,8 +7,6 @@ else | |||
7 | KBUILD_DEFCONFIG := $(ARCH)_defconfig | 7 | KBUILD_DEFCONFIG := $(ARCH)_defconfig |
8 | endif | 8 | endif |
9 | 9 | ||
10 | core-$(CONFIG_KVM) += arch/x86/kvm/ | ||
11 | |||
12 | # BITS is used as extension for files which are available in a 32 bit | 10 | # BITS is used as extension for files which are available in a 32 bit |
13 | # and a 64 bit version to simplify shared Makefiles. | 11 | # and a 64 bit version to simplify shared Makefiles. |
14 | # e.g.: obj-y += foo_$(BITS).o | 12 | # e.g.: obj-y += foo_$(BITS).o |
@@ -118,21 +116,8 @@ head-y += arch/x86/kernel/init_task.o | |||
118 | 116 | ||
119 | libs-y += arch/x86/lib/ | 117 | libs-y += arch/x86/lib/ |
120 | 118 | ||
121 | # Sub architecture files that needs linking first | 119 | # See arch/x86/Kbuild for content of core part of the kernel |
122 | core-y += $(fcore-y) | 120 | core-y += arch/x86/ |
123 | |||
124 | # Xen paravirtualization support | ||
125 | core-$(CONFIG_XEN) += arch/x86/xen/ | ||
126 | |||
127 | # lguest paravirtualization support | ||
128 | core-$(CONFIG_LGUEST_GUEST) += arch/x86/lguest/ | ||
129 | |||
130 | core-y += arch/x86/kernel/ | ||
131 | core-y += arch/x86/mm/ | ||
132 | |||
133 | core-y += arch/x86/crypto/ | ||
134 | core-y += arch/x86/vdso/ | ||
135 | core-$(CONFIG_IA32_EMULATION) += arch/x86/ia32/ | ||
136 | 121 | ||
137 | # drivers-y are linked after core-y | 122 | # drivers-y are linked after core-y |
138 | drivers-$(CONFIG_MATH_EMULATION) += arch/x86/math-emu/ | 123 | drivers-$(CONFIG_MATH_EMULATION) += arch/x86/math-emu/ |
diff --git a/arch/x86/boot/.gitignore b/arch/x86/boot/.gitignore index 172cf8a98bdd..851fe936d242 100644 --- a/arch/x86/boot/.gitignore +++ b/arch/x86/boot/.gitignore | |||
@@ -3,6 +3,8 @@ bzImage | |||
3 | cpustr.h | 3 | cpustr.h |
4 | mkcpustr | 4 | mkcpustr |
5 | offsets.h | 5 | offsets.h |
6 | voffset.h | ||
7 | zoffset.h | ||
6 | setup | 8 | setup |
7 | setup.bin | 9 | setup.bin |
8 | setup.elf | 10 | setup.elf |
diff --git a/arch/x86/boot/Makefile b/arch/x86/boot/Makefile index 6633b6e7505a..8d16ada25048 100644 --- a/arch/x86/boot/Makefile +++ b/arch/x86/boot/Makefile | |||
@@ -26,9 +26,10 @@ targets := vmlinux.bin setup.bin setup.elf bzImage | |||
26 | targets += fdimage fdimage144 fdimage288 image.iso mtools.conf | 26 | targets += fdimage fdimage144 fdimage288 image.iso mtools.conf |
27 | subdir- := compressed | 27 | subdir- := compressed |
28 | 28 | ||
29 | setup-y += a20.o cmdline.o copy.o cpu.o cpucheck.o edd.o | 29 | setup-y += a20.o bioscall.o cmdline.o copy.o cpu.o cpucheck.o edd.o |
30 | setup-y += header.o main.o mca.o memory.o pm.o pmjump.o | 30 | setup-y += header.o main.o mca.o memory.o pm.o pmjump.o |
31 | setup-y += printf.o string.o tty.o video.o video-mode.o version.o | 31 | setup-y += printf.o regs.o string.o tty.o video.o video-mode.o |
32 | setup-y += version.o | ||
32 | setup-$(CONFIG_X86_APM_BOOT) += apm.o | 33 | setup-$(CONFIG_X86_APM_BOOT) += apm.o |
33 | 34 | ||
34 | # The link order of the video-*.o modules can matter. In particular, | 35 | # The link order of the video-*.o modules can matter. In particular, |
@@ -86,19 +87,27 @@ $(obj)/vmlinux.bin: $(obj)/compressed/vmlinux FORCE | |||
86 | 87 | ||
87 | SETUP_OBJS = $(addprefix $(obj)/,$(setup-y)) | 88 | SETUP_OBJS = $(addprefix $(obj)/,$(setup-y)) |
88 | 89 | ||
89 | sed-offsets := -e 's/^00*/0/' \ | 90 | sed-voffset := -e 's/^\([0-9a-fA-F]*\) . \(_text\|_end\)$$/\#define VO_\2 0x\1/p' |
90 | -e 's/^\([0-9a-fA-F]*\) . \(input_data\|input_data_end\)$$/\#define \2 0x\1/p' | ||
91 | 91 | ||
92 | quiet_cmd_offsets = OFFSETS $@ | 92 | quiet_cmd_voffset = VOFFSET $@ |
93 | cmd_offsets = $(NM) $< | sed -n $(sed-offsets) > $@ | 93 | cmd_voffset = $(NM) $< | sed -n $(sed-voffset) > $@ |
94 | 94 | ||
95 | $(obj)/offsets.h: $(obj)/compressed/vmlinux FORCE | 95 | targets += voffset.h |
96 | $(call if_changed,offsets) | 96 | $(obj)/voffset.h: vmlinux FORCE |
97 | $(call if_changed,voffset) | ||
98 | |||
99 | sed-zoffset := -e 's/^\([0-9a-fA-F]*\) . \(startup_32\|input_data\|_end\|z_.*\)$$/\#define ZO_\2 0x\1/p' | ||
100 | |||
101 | quiet_cmd_zoffset = ZOFFSET $@ | ||
102 | cmd_zoffset = $(NM) $< | sed -n $(sed-zoffset) > $@ | ||
103 | |||
104 | targets += zoffset.h | ||
105 | $(obj)/zoffset.h: $(obj)/compressed/vmlinux FORCE | ||
106 | $(call if_changed,zoffset) | ||
97 | 107 | ||
98 | targets += offsets.h | ||
99 | 108 | ||
100 | AFLAGS_header.o += -I$(obj) | 109 | AFLAGS_header.o += -I$(obj) |
101 | $(obj)/header.o: $(obj)/offsets.h | 110 | $(obj)/header.o: $(obj)/voffset.h $(obj)/zoffset.h |
102 | 111 | ||
103 | LDFLAGS_setup.elf := -T | 112 | LDFLAGS_setup.elf := -T |
104 | $(obj)/setup.elf: $(src)/setup.ld $(SETUP_OBJS) FORCE | 113 | $(obj)/setup.elf: $(src)/setup.ld $(SETUP_OBJS) FORCE |
diff --git a/arch/x86/boot/a20.c b/arch/x86/boot/a20.c index 7c19ce8c2442..64a31a6d751a 100644 --- a/arch/x86/boot/a20.c +++ b/arch/x86/boot/a20.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * | 2 | * |
3 | * Copyright (C) 1991, 1992 Linus Torvalds | 3 | * Copyright (C) 1991, 1992 Linus Torvalds |
4 | * Copyright 2007-2008 rPath, Inc. - All Rights Reserved | 4 | * Copyright 2007-2008 rPath, Inc. - All Rights Reserved |
5 | * Copyright 2009 Intel Corporation | 5 | * Copyright 2009 Intel Corporation; author H. Peter Anvin |
6 | * | 6 | * |
7 | * This file is part of the Linux kernel, and is made available under | 7 | * This file is part of the Linux kernel, and is made available under |
8 | * the terms of the GNU General Public License version 2. | 8 | * the terms of the GNU General Public License version 2. |
@@ -90,8 +90,11 @@ static int a20_test_long(void) | |||
90 | 90 | ||
91 | static void enable_a20_bios(void) | 91 | static void enable_a20_bios(void) |
92 | { | 92 | { |
93 | asm volatile("pushfl; int $0x15; popfl" | 93 | struct biosregs ireg; |
94 | : : "a" ((u16)0x2401)); | 94 | |
95 | initregs(&ireg); | ||
96 | ireg.ax = 0x2401; | ||
97 | intcall(0x15, &ireg, NULL); | ||
95 | } | 98 | } |
96 | 99 | ||
97 | static void enable_a20_kbc(void) | 100 | static void enable_a20_kbc(void) |
diff --git a/arch/x86/boot/apm.c b/arch/x86/boot/apm.c index 7aa6033001f9..ee274834ea8b 100644 --- a/arch/x86/boot/apm.c +++ b/arch/x86/boot/apm.c | |||
@@ -2,6 +2,7 @@ | |||
2 | * | 2 | * |
3 | * Copyright (C) 1991, 1992 Linus Torvalds | 3 | * Copyright (C) 1991, 1992 Linus Torvalds |
4 | * Copyright 2007 rPath, Inc. - All Rights Reserved | 4 | * Copyright 2007 rPath, Inc. - All Rights Reserved |
5 | * Copyright 2009 Intel Corporation; author H. Peter Anvin | ||
5 | * | 6 | * |
6 | * Original APM BIOS checking by Stephen Rothwell, May 1994 | 7 | * Original APM BIOS checking by Stephen Rothwell, May 1994 |
7 | * (sfr@canb.auug.org.au) | 8 | * (sfr@canb.auug.org.au) |
@@ -19,75 +20,56 @@ | |||
19 | 20 | ||
20 | int query_apm_bios(void) | 21 | int query_apm_bios(void) |
21 | { | 22 | { |
22 | u16 ax, bx, cx, dx, di; | 23 | struct biosregs ireg, oreg; |
23 | u32 ebx, esi; | ||
24 | u8 err; | ||
25 | 24 | ||
26 | /* APM BIOS installation check */ | 25 | /* APM BIOS installation check */ |
27 | ax = 0x5300; | 26 | initregs(&ireg); |
28 | bx = cx = 0; | 27 | ireg.ah = 0x53; |
29 | asm volatile("pushl %%ebp ; int $0x15 ; popl %%ebp ; setc %0" | 28 | intcall(0x15, &ireg, &oreg); |
30 | : "=d" (err), "+a" (ax), "+b" (bx), "+c" (cx) | ||
31 | : : "esi", "edi"); | ||
32 | 29 | ||
33 | if (err) | 30 | if (oreg.flags & X86_EFLAGS_CF) |
34 | return -1; /* No APM BIOS */ | 31 | return -1; /* No APM BIOS */ |
35 | 32 | ||
36 | if (bx != 0x504d) /* "PM" signature */ | 33 | if (oreg.bx != 0x504d) /* "PM" signature */ |
37 | return -1; | 34 | return -1; |
38 | 35 | ||
39 | if (!(cx & 0x02)) /* 32 bits supported? */ | 36 | if (!(oreg.cx & 0x02)) /* 32 bits supported? */ |
40 | return -1; | 37 | return -1; |
41 | 38 | ||
42 | /* Disconnect first, just in case */ | 39 | /* Disconnect first, just in case */ |
43 | ax = 0x5304; | 40 | ireg.al = 0x04; |
44 | bx = 0; | 41 | intcall(0x15, &ireg, NULL); |
45 | asm volatile("pushl %%ebp ; int $0x15 ; popl %%ebp" | ||
46 | : "+a" (ax), "+b" (bx) | ||
47 | : : "ecx", "edx", "esi", "edi"); | ||
48 | |||
49 | /* Paranoia */ | ||
50 | ebx = esi = 0; | ||
51 | cx = dx = di = 0; | ||
52 | 42 | ||
53 | /* 32-bit connect */ | 43 | /* 32-bit connect */ |
54 | asm volatile("pushl %%ebp ; int $0x15 ; popl %%ebp ; setc %6" | 44 | ireg.al = 0x03; |
55 | : "=a" (ax), "+b" (ebx), "+c" (cx), "+d" (dx), | 45 | intcall(0x15, &ireg, &oreg); |
56 | "+S" (esi), "+D" (di), "=m" (err) | 46 | |
57 | : "a" (0x5303)); | 47 | boot_params.apm_bios_info.cseg = oreg.ax; |
58 | 48 | boot_params.apm_bios_info.offset = oreg.ebx; | |
59 | boot_params.apm_bios_info.cseg = ax; | 49 | boot_params.apm_bios_info.cseg_16 = oreg.cx; |
60 | boot_params.apm_bios_info.offset = ebx; | 50 | boot_params.apm_bios_info.dseg = oreg.dx; |
61 | boot_params.apm_bios_info.cseg_16 = cx; | 51 | boot_params.apm_bios_info.cseg_len = oreg.si; |
62 | boot_params.apm_bios_info.dseg = dx; | 52 | boot_params.apm_bios_info.cseg_16_len = oreg.hsi; |
63 | boot_params.apm_bios_info.cseg_len = (u16)esi; | 53 | boot_params.apm_bios_info.dseg_len = oreg.di; |
64 | boot_params.apm_bios_info.cseg_16_len = esi >> 16; | 54 | |
65 | boot_params.apm_bios_info.dseg_len = di; | 55 | if (oreg.flags & X86_EFLAGS_CF) |
66 | |||
67 | if (err) | ||
68 | return -1; | 56 | return -1; |
69 | 57 | ||
70 | /* Redo the installation check as the 32-bit connect; | 58 | /* Redo the installation check as the 32-bit connect; |
71 | some BIOSes return different flags this way... */ | 59 | some BIOSes return different flags this way... */ |
72 | 60 | ||
73 | ax = 0x5300; | 61 | ireg.al = 0x00; |
74 | bx = cx = 0; | 62 | intcall(0x15, &ireg, &oreg); |
75 | asm volatile("pushl %%ebp ; int $0x15 ; popl %%ebp ; setc %0" | ||
76 | : "=d" (err), "+a" (ax), "+b" (bx), "+c" (cx) | ||
77 | : : "esi", "edi"); | ||
78 | 63 | ||
79 | if (err || bx != 0x504d) { | 64 | if ((oreg.eflags & X86_EFLAGS_CF) || oreg.bx != 0x504d) { |
80 | /* Failure with 32-bit connect, try to disconect and ignore */ | 65 | /* Failure with 32-bit connect, try to disconect and ignore */ |
81 | ax = 0x5304; | 66 | ireg.al = 0x04; |
82 | bx = 0; | 67 | intcall(0x15, &ireg, NULL); |
83 | asm volatile("pushl %%ebp ; int $0x15 ; popl %%ebp" | ||
84 | : "+a" (ax), "+b" (bx) | ||
85 | : : "ecx", "edx", "esi", "edi"); | ||
86 | return -1; | 68 | return -1; |
87 | } | 69 | } |
88 | 70 | ||
89 | boot_params.apm_bios_info.version = ax; | 71 | boot_params.apm_bios_info.version = oreg.ax; |
90 | boot_params.apm_bios_info.flags = cx; | 72 | boot_params.apm_bios_info.flags = oreg.cx; |
91 | return 0; | 73 | return 0; |
92 | } | 74 | } |
93 | 75 | ||
diff --git a/arch/x86/boot/bioscall.S b/arch/x86/boot/bioscall.S new file mode 100644 index 000000000000..507793739ea5 --- /dev/null +++ b/arch/x86/boot/bioscall.S | |||
@@ -0,0 +1,82 @@ | |||
1 | /* ----------------------------------------------------------------------- | ||
2 | * | ||
3 | * Copyright 2009 Intel Corporation; author H. Peter Anvin | ||
4 | * | ||
5 | * This file is part of the Linux kernel, and is made available under | ||
6 | * the terms of the GNU General Public License version 2 or (at your | ||
7 | * option) any later version; incorporated herein by reference. | ||
8 | * | ||
9 | * ----------------------------------------------------------------------- */ | ||
10 | |||
11 | /* | ||
12 | * "Glove box" for BIOS calls. Avoids the constant problems with BIOSes | ||
13 | * touching registers they shouldn't be. | ||
14 | */ | ||
15 | |||
16 | .code16 | ||
17 | .text | ||
18 | .globl intcall | ||
19 | .type intcall, @function | ||
20 | intcall: | ||
21 | /* Self-modify the INT instruction. Ugly, but works. */ | ||
22 | cmpb %al, 3f | ||
23 | je 1f | ||
24 | movb %al, 3f | ||
25 | jmp 1f /* Synchronize pipeline */ | ||
26 | 1: | ||
27 | /* Save state */ | ||
28 | pushfl | ||
29 | pushw %fs | ||
30 | pushw %gs | ||
31 | pushal | ||
32 | |||
33 | /* Copy input state to stack frame */ | ||
34 | subw $44, %sp | ||
35 | movw %dx, %si | ||
36 | movw %sp, %di | ||
37 | movw $11, %cx | ||
38 | rep; movsd | ||
39 | |||
40 | /* Pop full state from the stack */ | ||
41 | popal | ||
42 | popw %gs | ||
43 | popw %fs | ||
44 | popw %es | ||
45 | popw %ds | ||
46 | popfl | ||
47 | |||
48 | /* Actual INT */ | ||
49 | .byte 0xcd /* INT opcode */ | ||
50 | 3: .byte 0 | ||
51 | |||
52 | /* Push full state to the stack */ | ||
53 | pushfl | ||
54 | pushw %ds | ||
55 | pushw %es | ||
56 | pushw %fs | ||
57 | pushw %gs | ||
58 | pushal | ||
59 | |||
60 | /* Re-establish C environment invariants */ | ||
61 | cld | ||
62 | movzwl %sp, %esp | ||
63 | movw %cs, %ax | ||
64 | movw %ax, %ds | ||
65 | movw %ax, %es | ||
66 | |||
67 | /* Copy output state from stack frame */ | ||
68 | movw 68(%esp), %di /* Original %cx == 3rd argument */ | ||
69 | andw %di, %di | ||
70 | jz 4f | ||
71 | movw %sp, %si | ||
72 | movw $11, %cx | ||
73 | rep; movsd | ||
74 | 4: addw $44, %sp | ||
75 | |||
76 | /* Restore state and return */ | ||
77 | popal | ||
78 | popw %gs | ||
79 | popw %fs | ||
80 | popfl | ||
81 | retl | ||
82 | .size intcall, .-intcall | ||
diff --git a/arch/x86/boot/boot.h b/arch/x86/boot/boot.h index 7b2692e897e5..98239d2658f2 100644 --- a/arch/x86/boot/boot.h +++ b/arch/x86/boot/boot.h | |||
@@ -2,6 +2,7 @@ | |||
2 | * | 2 | * |
3 | * Copyright (C) 1991, 1992 Linus Torvalds | 3 | * Copyright (C) 1991, 1992 Linus Torvalds |
4 | * Copyright 2007 rPath, Inc. - All Rights Reserved | 4 | * Copyright 2007 rPath, Inc. - All Rights Reserved |
5 | * Copyright 2009 Intel Corporation; author H. Peter Anvin | ||
5 | * | 6 | * |
6 | * This file is part of the Linux kernel, and is made available under | 7 | * This file is part of the Linux kernel, and is made available under |
7 | * the terms of the GNU General Public License version 2. | 8 | * the terms of the GNU General Public License version 2. |
@@ -26,6 +27,7 @@ | |||
26 | #include <asm/setup.h> | 27 | #include <asm/setup.h> |
27 | #include "bitops.h" | 28 | #include "bitops.h" |
28 | #include <asm/cpufeature.h> | 29 | #include <asm/cpufeature.h> |
30 | #include <asm/processor-flags.h> | ||
29 | 31 | ||
30 | /* Useful macros */ | 32 | /* Useful macros */ |
31 | #define BUILD_BUG_ON(condition) ((void)sizeof(char[1 - 2*!!(condition)])) | 33 | #define BUILD_BUG_ON(condition) ((void)sizeof(char[1 - 2*!!(condition)])) |
@@ -241,6 +243,49 @@ int enable_a20(void); | |||
241 | /* apm.c */ | 243 | /* apm.c */ |
242 | int query_apm_bios(void); | 244 | int query_apm_bios(void); |
243 | 245 | ||
246 | /* bioscall.c */ | ||
247 | struct biosregs { | ||
248 | union { | ||
249 | struct { | ||
250 | u32 edi; | ||
251 | u32 esi; | ||
252 | u32 ebp; | ||
253 | u32 _esp; | ||
254 | u32 ebx; | ||
255 | u32 edx; | ||
256 | u32 ecx; | ||
257 | u32 eax; | ||
258 | u32 _fsgs; | ||
259 | u32 _dses; | ||
260 | u32 eflags; | ||
261 | }; | ||
262 | struct { | ||
263 | u16 di, hdi; | ||
264 | u16 si, hsi; | ||
265 | u16 bp, hbp; | ||
266 | u16 _sp, _hsp; | ||
267 | u16 bx, hbx; | ||
268 | u16 dx, hdx; | ||
269 | u16 cx, hcx; | ||
270 | u16 ax, hax; | ||
271 | u16 gs, fs; | ||
272 | u16 es, ds; | ||
273 | u16 flags, hflags; | ||
274 | }; | ||
275 | struct { | ||
276 | u8 dil, dih, edi2, edi3; | ||
277 | u8 sil, sih, esi2, esi3; | ||
278 | u8 bpl, bph, ebp2, ebp3; | ||
279 | u8 _spl, _sph, _esp2, _esp3; | ||
280 | u8 bl, bh, ebx2, ebx3; | ||
281 | u8 dl, dh, edx2, edx3; | ||
282 | u8 cl, ch, ecx2, ecx3; | ||
283 | u8 al, ah, eax2, eax3; | ||
284 | }; | ||
285 | }; | ||
286 | }; | ||
287 | void intcall(u8 int_no, const struct biosregs *ireg, struct biosregs *oreg); | ||
288 | |||
244 | /* cmdline.c */ | 289 | /* cmdline.c */ |
245 | int cmdline_find_option(const char *option, char *buffer, int bufsize); | 290 | int cmdline_find_option(const char *option, char *buffer, int bufsize); |
246 | int cmdline_find_option_bool(const char *option); | 291 | int cmdline_find_option_bool(const char *option); |
@@ -279,6 +324,9 @@ int sprintf(char *buf, const char *fmt, ...); | |||
279 | int vsprintf(char *buf, const char *fmt, va_list args); | 324 | int vsprintf(char *buf, const char *fmt, va_list args); |
280 | int printf(const char *fmt, ...); | 325 | int printf(const char *fmt, ...); |
281 | 326 | ||
327 | /* regs.c */ | ||
328 | void initregs(struct biosregs *regs); | ||
329 | |||
282 | /* string.c */ | 330 | /* string.c */ |
283 | int strcmp(const char *str1, const char *str2); | 331 | int strcmp(const char *str1, const char *str2); |
284 | size_t strnlen(const char *s, size_t maxlen); | 332 | size_t strnlen(const char *s, size_t maxlen); |
diff --git a/arch/x86/boot/compressed/.gitignore b/arch/x86/boot/compressed/.gitignore index 63eff3b04d01..4a46fab7162e 100644 --- a/arch/x86/boot/compressed/.gitignore +++ b/arch/x86/boot/compressed/.gitignore | |||
@@ -1,3 +1,6 @@ | |||
1 | relocs | 1 | relocs |
2 | vmlinux.bin.all | 2 | vmlinux.bin.all |
3 | vmlinux.relocs | 3 | vmlinux.relocs |
4 | vmlinux.lds | ||
5 | mkpiggy | ||
6 | piggy.S | ||
diff --git a/arch/x86/boot/compressed/Makefile b/arch/x86/boot/compressed/Makefile index 65551c9f8571..49c8a4c37d7c 100644 --- a/arch/x86/boot/compressed/Makefile +++ b/arch/x86/boot/compressed/Makefile | |||
@@ -19,7 +19,9 @@ KBUILD_AFLAGS := $(KBUILD_CFLAGS) -D__ASSEMBLY__ | |||
19 | LDFLAGS := -m elf_$(UTS_MACHINE) | 19 | LDFLAGS := -m elf_$(UTS_MACHINE) |
20 | LDFLAGS_vmlinux := -T | 20 | LDFLAGS_vmlinux := -T |
21 | 21 | ||
22 | $(obj)/vmlinux: $(src)/vmlinux_$(BITS).lds $(obj)/head_$(BITS).o $(obj)/misc.o $(obj)/piggy.o FORCE | 22 | hostprogs-y := mkpiggy |
23 | |||
24 | $(obj)/vmlinux: $(obj)/vmlinux.lds $(obj)/head_$(BITS).o $(obj)/misc.o $(obj)/piggy.o FORCE | ||
23 | $(call if_changed,ld) | 25 | $(call if_changed,ld) |
24 | @: | 26 | @: |
25 | 27 | ||
@@ -29,7 +31,7 @@ $(obj)/vmlinux.bin: vmlinux FORCE | |||
29 | 31 | ||
30 | 32 | ||
31 | targets += vmlinux.bin.all vmlinux.relocs relocs | 33 | targets += vmlinux.bin.all vmlinux.relocs relocs |
32 | hostprogs-$(CONFIG_X86_32) += relocs | 34 | hostprogs-$(CONFIG_X86_NEED_RELOCS) += relocs |
33 | 35 | ||
34 | quiet_cmd_relocs = RELOCS $@ | 36 | quiet_cmd_relocs = RELOCS $@ |
35 | cmd_relocs = $(obj)/relocs $< > $@;$(obj)/relocs --abs-relocs $< | 37 | cmd_relocs = $(obj)/relocs $< > $@;$(obj)/relocs --abs-relocs $< |
@@ -37,46 +39,22 @@ $(obj)/vmlinux.relocs: vmlinux $(obj)/relocs FORCE | |||
37 | $(call if_changed,relocs) | 39 | $(call if_changed,relocs) |
38 | 40 | ||
39 | vmlinux.bin.all-y := $(obj)/vmlinux.bin | 41 | vmlinux.bin.all-y := $(obj)/vmlinux.bin |
40 | vmlinux.bin.all-$(CONFIG_RELOCATABLE) += $(obj)/vmlinux.relocs | 42 | vmlinux.bin.all-$(CONFIG_X86_NEED_RELOCS) += $(obj)/vmlinux.relocs |
41 | quiet_cmd_relocbin = BUILD $@ | ||
42 | cmd_relocbin = cat $(filter-out FORCE,$^) > $@ | ||
43 | $(obj)/vmlinux.bin.all: $(vmlinux.bin.all-y) FORCE | ||
44 | $(call if_changed,relocbin) | ||
45 | |||
46 | ifeq ($(CONFIG_X86_32),y) | ||
47 | 43 | ||
48 | ifdef CONFIG_RELOCATABLE | 44 | $(obj)/vmlinux.bin.gz: $(vmlinux.bin.all-y) FORCE |
49 | $(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin.all FORCE | ||
50 | $(call if_changed,gzip) | ||
51 | $(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin.all FORCE | ||
52 | $(call if_changed,bzip2) | ||
53 | $(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin.all FORCE | ||
54 | $(call if_changed,lzma) | ||
55 | else | ||
56 | $(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE | ||
57 | $(call if_changed,gzip) | 45 | $(call if_changed,gzip) |
58 | $(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin FORCE | 46 | $(obj)/vmlinux.bin.bz2: $(vmlinux.bin.all-y) FORCE |
59 | $(call if_changed,bzip2) | 47 | $(call if_changed,bzip2) |
60 | $(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE | 48 | $(obj)/vmlinux.bin.lzma: $(vmlinux.bin.all-y) FORCE |
61 | $(call if_changed,lzma) | 49 | $(call if_changed,lzma) |
62 | endif | ||
63 | LDFLAGS_piggy.o := -r --format binary --oformat elf32-i386 -T | ||
64 | 50 | ||
65 | else | 51 | suffix-$(CONFIG_KERNEL_GZIP) := gz |
52 | suffix-$(CONFIG_KERNEL_BZIP2) := bz2 | ||
53 | suffix-$(CONFIG_KERNEL_LZMA) := lzma | ||
66 | 54 | ||
67 | $(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE | 55 | quiet_cmd_mkpiggy = MKPIGGY $@ |
68 | $(call if_changed,gzip) | 56 | cmd_mkpiggy = $(obj)/mkpiggy $< > $@ || ( rm -f $@ ; false ) |
69 | $(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin FORCE | ||
70 | $(call if_changed,bzip2) | ||
71 | $(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE | ||
72 | $(call if_changed,lzma) | ||
73 | |||
74 | LDFLAGS_piggy.o := -r --format binary --oformat elf64-x86-64 -T | ||
75 | endif | ||
76 | 57 | ||
77 | suffix_$(CONFIG_KERNEL_GZIP) = gz | 58 | targets += piggy.S |
78 | suffix_$(CONFIG_KERNEL_BZIP2) = bz2 | 59 | $(obj)/piggy.S: $(obj)/vmlinux.bin.$(suffix-y) $(obj)/mkpiggy FORCE |
79 | suffix_$(CONFIG_KERNEL_LZMA) = lzma | 60 | $(call if_changed,mkpiggy) |
80 | |||
81 | $(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.$(suffix_y) FORCE | ||
82 | $(call if_changed,ld) | ||
diff --git a/arch/x86/boot/compressed/head_32.S b/arch/x86/boot/compressed/head_32.S index 3a8a866fb2e2..75e4f001e706 100644 --- a/arch/x86/boot/compressed/head_32.S +++ b/arch/x86/boot/compressed/head_32.S | |||
@@ -12,16 +12,16 @@ | |||
12 | * the page directory. [According to comments etc elsewhere on a compressed | 12 | * the page directory. [According to comments etc elsewhere on a compressed |
13 | * kernel it will end up at 0x1000 + 1Mb I hope so as I assume this. - AC] | 13 | * kernel it will end up at 0x1000 + 1Mb I hope so as I assume this. - AC] |
14 | * | 14 | * |
15 | * Page 0 is deliberately kept safe, since System Management Mode code in | 15 | * Page 0 is deliberately kept safe, since System Management Mode code in |
16 | * laptops may need to access the BIOS data stored there. This is also | 16 | * laptops may need to access the BIOS data stored there. This is also |
17 | * useful for future device drivers that either access the BIOS via VM86 | 17 | * useful for future device drivers that either access the BIOS via VM86 |
18 | * mode. | 18 | * mode. |
19 | */ | 19 | */ |
20 | 20 | ||
21 | /* | 21 | /* |
22 | * High loaded stuff by Hans Lermen & Werner Almesberger, Feb. 1996 | 22 | * High loaded stuff by Hans Lermen & Werner Almesberger, Feb. 1996 |
23 | */ | 23 | */ |
24 | .text | 24 | .text |
25 | 25 | ||
26 | #include <linux/linkage.h> | 26 | #include <linux/linkage.h> |
27 | #include <asm/segment.h> | 27 | #include <asm/segment.h> |
@@ -29,161 +29,151 @@ | |||
29 | #include <asm/boot.h> | 29 | #include <asm/boot.h> |
30 | #include <asm/asm-offsets.h> | 30 | #include <asm/asm-offsets.h> |
31 | 31 | ||
32 | .section ".text.head","ax",@progbits | 32 | .section ".text.head","ax",@progbits |
33 | ENTRY(startup_32) | 33 | ENTRY(startup_32) |
34 | cld | 34 | cld |
35 | /* test KEEP_SEGMENTS flag to see if the bootloader is asking | 35 | /* |
36 | * us to not reload segments */ | 36 | * Test KEEP_SEGMENTS flag to see if the bootloader is asking |
37 | testb $(1<<6), BP_loadflags(%esi) | 37 | * us to not reload segments |
38 | jnz 1f | 38 | */ |
39 | testb $(1<<6), BP_loadflags(%esi) | ||
40 | jnz 1f | ||
39 | 41 | ||
40 | cli | 42 | cli |
41 | movl $(__BOOT_DS),%eax | 43 | movl $__BOOT_DS, %eax |
42 | movl %eax,%ds | 44 | movl %eax, %ds |
43 | movl %eax,%es | 45 | movl %eax, %es |
44 | movl %eax,%fs | 46 | movl %eax, %fs |
45 | movl %eax,%gs | 47 | movl %eax, %gs |
46 | movl %eax,%ss | 48 | movl %eax, %ss |
47 | 1: | 49 | 1: |
48 | 50 | ||
49 | /* Calculate the delta between where we were compiled to run | 51 | /* |
52 | * Calculate the delta between where we were compiled to run | ||
50 | * at and where we were actually loaded at. This can only be done | 53 | * at and where we were actually loaded at. This can only be done |
51 | * with a short local call on x86. Nothing else will tell us what | 54 | * with a short local call on x86. Nothing else will tell us what |
52 | * address we are running at. The reserved chunk of the real-mode | 55 | * address we are running at. The reserved chunk of the real-mode |
53 | * data at 0x1e4 (defined as a scratch field) are used as the stack | 56 | * data at 0x1e4 (defined as a scratch field) are used as the stack |
54 | * for this calculation. Only 4 bytes are needed. | 57 | * for this calculation. Only 4 bytes are needed. |
55 | */ | 58 | */ |
56 | leal (0x1e4+4)(%esi), %esp | 59 | leal (BP_scratch+4)(%esi), %esp |
57 | call 1f | 60 | call 1f |
58 | 1: popl %ebp | 61 | 1: popl %ebp |
59 | subl $1b, %ebp | 62 | subl $1b, %ebp |
60 | 63 | ||
61 | /* %ebp contains the address we are loaded at by the boot loader and %ebx | 64 | /* |
65 | * %ebp contains the address we are loaded at by the boot loader and %ebx | ||
62 | * contains the address where we should move the kernel image temporarily | 66 | * contains the address where we should move the kernel image temporarily |
63 | * for safe in-place decompression. | 67 | * for safe in-place decompression. |
64 | */ | 68 | */ |
65 | 69 | ||
66 | #ifdef CONFIG_RELOCATABLE | 70 | #ifdef CONFIG_RELOCATABLE |
67 | movl %ebp, %ebx | 71 | movl %ebp, %ebx |
68 | addl $(CONFIG_PHYSICAL_ALIGN - 1), %ebx | 72 | movl BP_kernel_alignment(%esi), %eax |
69 | andl $(~(CONFIG_PHYSICAL_ALIGN - 1)), %ebx | 73 | decl %eax |
74 | addl %eax, %ebx | ||
75 | notl %eax | ||
76 | andl %eax, %ebx | ||
70 | #else | 77 | #else |
71 | movl $LOAD_PHYSICAL_ADDR, %ebx | 78 | movl $LOAD_PHYSICAL_ADDR, %ebx |
72 | #endif | 79 | #endif |
73 | 80 | ||
74 | /* Replace the compressed data size with the uncompressed size */ | 81 | /* Target address to relocate to for decompression */ |
75 | subl input_len(%ebp), %ebx | 82 | addl $z_extract_offset, %ebx |
76 | movl output_len(%ebp), %eax | 83 | |
77 | addl %eax, %ebx | 84 | /* Set up the stack */ |
78 | /* Add 8 bytes for every 32K input block */ | 85 | leal boot_stack_end(%ebx), %esp |
79 | shrl $12, %eax | 86 | |
80 | addl %eax, %ebx | 87 | /* Zero EFLAGS */ |
81 | /* Add 32K + 18 bytes of extra slack */ | 88 | pushl $0 |
82 | addl $(32768 + 18), %ebx | 89 | popfl |
83 | /* Align on a 4K boundary */ | 90 | |
84 | addl $4095, %ebx | 91 | /* |
85 | andl $~4095, %ebx | 92 | * Copy the compressed kernel to the end of our buffer |
86 | |||
87 | /* Copy the compressed kernel to the end of our buffer | ||
88 | * where decompression in place becomes safe. | 93 | * where decompression in place becomes safe. |
89 | */ | 94 | */ |
90 | pushl %esi | 95 | pushl %esi |
91 | leal _end(%ebp), %esi | 96 | leal (_bss-4)(%ebp), %esi |
92 | leal _end(%ebx), %edi | 97 | leal (_bss-4)(%ebx), %edi |
93 | movl $(_end - startup_32), %ecx | 98 | movl $(_bss - startup_32), %ecx |
99 | shrl $2, %ecx | ||
94 | std | 100 | std |
95 | rep | 101 | rep movsl |
96 | movsb | ||
97 | cld | 102 | cld |
98 | popl %esi | 103 | popl %esi |
99 | |||
100 | /* Compute the kernel start address. | ||
101 | */ | ||
102 | #ifdef CONFIG_RELOCATABLE | ||
103 | addl $(CONFIG_PHYSICAL_ALIGN - 1), %ebp | ||
104 | andl $(~(CONFIG_PHYSICAL_ALIGN - 1)), %ebp | ||
105 | #else | ||
106 | movl $LOAD_PHYSICAL_ADDR, %ebp | ||
107 | #endif | ||
108 | 104 | ||
109 | /* | 105 | /* |
110 | * Jump to the relocated address. | 106 | * Jump to the relocated address. |
111 | */ | 107 | */ |
112 | leal relocated(%ebx), %eax | 108 | leal relocated(%ebx), %eax |
113 | jmp *%eax | 109 | jmp *%eax |
114 | ENDPROC(startup_32) | 110 | ENDPROC(startup_32) |
115 | 111 | ||
116 | .section ".text" | 112 | .text |
117 | relocated: | 113 | relocated: |
118 | 114 | ||
119 | /* | 115 | /* |
120 | * Clear BSS | 116 | * Clear BSS (stack is currently empty) |
121 | */ | ||
122 | xorl %eax,%eax | ||
123 | leal _edata(%ebx),%edi | ||
124 | leal _end(%ebx), %ecx | ||
125 | subl %edi,%ecx | ||
126 | cld | ||
127 | rep | ||
128 | stosb | ||
129 | |||
130 | /* | ||
131 | * Setup the stack for the decompressor | ||
132 | */ | 117 | */ |
133 | leal boot_stack_end(%ebx), %esp | 118 | xorl %eax, %eax |
119 | leal _bss(%ebx), %edi | ||
120 | leal _ebss(%ebx), %ecx | ||
121 | subl %edi, %ecx | ||
122 | shrl $2, %ecx | ||
123 | rep stosl | ||
134 | 124 | ||
135 | /* | 125 | /* |
136 | * Do the decompression, and jump to the new kernel.. | 126 | * Do the decompression, and jump to the new kernel.. |
137 | */ | 127 | */ |
138 | movl output_len(%ebx), %eax | 128 | leal z_extract_offset_negative(%ebx), %ebp |
139 | pushl %eax | 129 | /* push arguments for decompress_kernel: */ |
140 | # push arguments for decompress_kernel: | 130 | pushl %ebp /* output address */ |
141 | pushl %ebp # output address | 131 | pushl $z_input_len /* input_len */ |
142 | movl input_len(%ebx), %eax | 132 | leal input_data(%ebx), %eax |
143 | pushl %eax # input_len | 133 | pushl %eax /* input_data */ |
144 | leal input_data(%ebx), %eax | 134 | leal boot_heap(%ebx), %eax |
145 | pushl %eax # input_data | 135 | pushl %eax /* heap area */ |
146 | leal boot_heap(%ebx), %eax | 136 | pushl %esi /* real mode pointer */ |
147 | pushl %eax # heap area | 137 | call decompress_kernel |
148 | pushl %esi # real mode pointer | 138 | addl $20, %esp |
149 | call decompress_kernel | ||
150 | addl $20, %esp | ||
151 | popl %ecx | ||
152 | 139 | ||
153 | #if CONFIG_RELOCATABLE | 140 | #if CONFIG_RELOCATABLE |
154 | /* Find the address of the relocations. | 141 | /* |
142 | * Find the address of the relocations. | ||
155 | */ | 143 | */ |
156 | movl %ebp, %edi | 144 | leal z_output_len(%ebp), %edi |
157 | addl %ecx, %edi | ||
158 | 145 | ||
159 | /* Calculate the delta between where vmlinux was compiled to run | 146 | /* |
147 | * Calculate the delta between where vmlinux was compiled to run | ||
160 | * and where it was actually loaded. | 148 | * and where it was actually loaded. |
161 | */ | 149 | */ |
162 | movl %ebp, %ebx | 150 | movl %ebp, %ebx |
163 | subl $LOAD_PHYSICAL_ADDR, %ebx | 151 | subl $LOAD_PHYSICAL_ADDR, %ebx |
164 | jz 2f /* Nothing to be done if loaded at compiled addr. */ | 152 | jz 2f /* Nothing to be done if loaded at compiled addr. */ |
165 | /* | 153 | /* |
166 | * Process relocations. | 154 | * Process relocations. |
167 | */ | 155 | */ |
168 | 156 | ||
169 | 1: subl $4, %edi | 157 | 1: subl $4, %edi |
170 | movl 0(%edi), %ecx | 158 | movl (%edi), %ecx |
171 | testl %ecx, %ecx | 159 | testl %ecx, %ecx |
172 | jz 2f | 160 | jz 2f |
173 | addl %ebx, -__PAGE_OFFSET(%ebx, %ecx) | 161 | addl %ebx, -__PAGE_OFFSET(%ebx, %ecx) |
174 | jmp 1b | 162 | jmp 1b |
175 | 2: | 163 | 2: |
176 | #endif | 164 | #endif |
177 | 165 | ||
178 | /* | 166 | /* |
179 | * Jump to the decompressed kernel. | 167 | * Jump to the decompressed kernel. |
180 | */ | 168 | */ |
181 | xorl %ebx,%ebx | 169 | xorl %ebx, %ebx |
182 | jmp *%ebp | 170 | jmp *%ebp |
183 | 171 | ||
184 | .bss | 172 | /* |
185 | /* Stack and heap for uncompression */ | 173 | * Stack and heap for uncompression |
186 | .balign 4 | 174 | */ |
175 | .bss | ||
176 | .balign 4 | ||
187 | boot_heap: | 177 | boot_heap: |
188 | .fill BOOT_HEAP_SIZE, 1, 0 | 178 | .fill BOOT_HEAP_SIZE, 1, 0 |
189 | boot_stack: | 179 | boot_stack: |
diff --git a/arch/x86/boot/compressed/head_64.S b/arch/x86/boot/compressed/head_64.S index ed4a82948002..f62c284db9eb 100644 --- a/arch/x86/boot/compressed/head_64.S +++ b/arch/x86/boot/compressed/head_64.S | |||
@@ -21,8 +21,8 @@ | |||
21 | /* | 21 | /* |
22 | * High loaded stuff by Hans Lermen & Werner Almesberger, Feb. 1996 | 22 | * High loaded stuff by Hans Lermen & Werner Almesberger, Feb. 1996 |
23 | */ | 23 | */ |
24 | .code32 | 24 | .code32 |
25 | .text | 25 | .text |
26 | 26 | ||
27 | #include <linux/linkage.h> | 27 | #include <linux/linkage.h> |
28 | #include <asm/segment.h> | 28 | #include <asm/segment.h> |
@@ -33,12 +33,14 @@ | |||
33 | #include <asm/processor-flags.h> | 33 | #include <asm/processor-flags.h> |
34 | #include <asm/asm-offsets.h> | 34 | #include <asm/asm-offsets.h> |
35 | 35 | ||
36 | .section ".text.head" | 36 | .section ".text.head" |
37 | .code32 | 37 | .code32 |
38 | ENTRY(startup_32) | 38 | ENTRY(startup_32) |
39 | cld | 39 | cld |
40 | /* test KEEP_SEGMENTS flag to see if the bootloader is asking | 40 | /* |
41 | * us to not reload segments */ | 41 | * Test KEEP_SEGMENTS flag to see if the bootloader is asking |
42 | * us to not reload segments | ||
43 | */ | ||
42 | testb $(1<<6), BP_loadflags(%esi) | 44 | testb $(1<<6), BP_loadflags(%esi) |
43 | jnz 1f | 45 | jnz 1f |
44 | 46 | ||
@@ -49,14 +51,15 @@ ENTRY(startup_32) | |||
49 | movl %eax, %ss | 51 | movl %eax, %ss |
50 | 1: | 52 | 1: |
51 | 53 | ||
52 | /* Calculate the delta between where we were compiled to run | 54 | /* |
55 | * Calculate the delta between where we were compiled to run | ||
53 | * at and where we were actually loaded at. This can only be done | 56 | * at and where we were actually loaded at. This can only be done |
54 | * with a short local call on x86. Nothing else will tell us what | 57 | * with a short local call on x86. Nothing else will tell us what |
55 | * address we are running at. The reserved chunk of the real-mode | 58 | * address we are running at. The reserved chunk of the real-mode |
56 | * data at 0x1e4 (defined as a scratch field) are used as the stack | 59 | * data at 0x1e4 (defined as a scratch field) are used as the stack |
57 | * for this calculation. Only 4 bytes are needed. | 60 | * for this calculation. Only 4 bytes are needed. |
58 | */ | 61 | */ |
59 | leal (0x1e4+4)(%esi), %esp | 62 | leal (BP_scratch+4)(%esi), %esp |
60 | call 1f | 63 | call 1f |
61 | 1: popl %ebp | 64 | 1: popl %ebp |
62 | subl $1b, %ebp | 65 | subl $1b, %ebp |
@@ -70,32 +73,28 @@ ENTRY(startup_32) | |||
70 | testl %eax, %eax | 73 | testl %eax, %eax |
71 | jnz no_longmode | 74 | jnz no_longmode |
72 | 75 | ||
73 | /* Compute the delta between where we were compiled to run at | 76 | /* |
77 | * Compute the delta between where we were compiled to run at | ||
74 | * and where the code will actually run at. | 78 | * and where the code will actually run at. |
75 | */ | 79 | * |
76 | /* %ebp contains the address we are loaded at by the boot loader and %ebx | 80 | * %ebp contains the address we are loaded at by the boot loader and %ebx |
77 | * contains the address where we should move the kernel image temporarily | 81 | * contains the address where we should move the kernel image temporarily |
78 | * for safe in-place decompression. | 82 | * for safe in-place decompression. |
79 | */ | 83 | */ |
80 | 84 | ||
81 | #ifdef CONFIG_RELOCATABLE | 85 | #ifdef CONFIG_RELOCATABLE |
82 | movl %ebp, %ebx | 86 | movl %ebp, %ebx |
83 | addl $(PMD_PAGE_SIZE -1), %ebx | 87 | movl BP_kernel_alignment(%esi), %eax |
84 | andl $PMD_PAGE_MASK, %ebx | 88 | decl %eax |
89 | addl %eax, %ebx | ||
90 | notl %eax | ||
91 | andl %eax, %ebx | ||
85 | #else | 92 | #else |
86 | movl $CONFIG_PHYSICAL_START, %ebx | 93 | movl $LOAD_PHYSICAL_ADDR, %ebx |
87 | #endif | 94 | #endif |
88 | 95 | ||
89 | /* Replace the compressed data size with the uncompressed size */ | 96 | /* Target address to relocate to for decompression */ |
90 | subl input_len(%ebp), %ebx | 97 | addl $z_extract_offset, %ebx |
91 | movl output_len(%ebp), %eax | ||
92 | addl %eax, %ebx | ||
93 | /* Add 8 bytes for every 32K input block */ | ||
94 | shrl $12, %eax | ||
95 | addl %eax, %ebx | ||
96 | /* Add 32K + 18 bytes of extra slack and align on a 4K boundary */ | ||
97 | addl $(32768 + 18 + 4095), %ebx | ||
98 | andl $~4095, %ebx | ||
99 | 98 | ||
100 | /* | 99 | /* |
101 | * Prepare for entering 64 bit mode | 100 | * Prepare for entering 64 bit mode |
@@ -114,7 +113,7 @@ ENTRY(startup_32) | |||
114 | /* | 113 | /* |
115 | * Build early 4G boot pagetable | 114 | * Build early 4G boot pagetable |
116 | */ | 115 | */ |
117 | /* Initialize Page tables to 0*/ | 116 | /* Initialize Page tables to 0 */ |
118 | leal pgtable(%ebx), %edi | 117 | leal pgtable(%ebx), %edi |
119 | xorl %eax, %eax | 118 | xorl %eax, %eax |
120 | movl $((4096*6)/4), %ecx | 119 | movl $((4096*6)/4), %ecx |
@@ -155,7 +154,8 @@ ENTRY(startup_32) | |||
155 | btsl $_EFER_LME, %eax | 154 | btsl $_EFER_LME, %eax |
156 | wrmsr | 155 | wrmsr |
157 | 156 | ||
158 | /* Setup for the jump to 64bit mode | 157 | /* |
158 | * Setup for the jump to 64bit mode | ||
159 | * | 159 | * |
160 | * When the jump is performend we will be in long mode but | 160 | * When the jump is performend we will be in long mode but |
161 | * in 32bit compatibility mode with EFER.LME = 1, CS.L = 0, CS.D = 1 | 161 | * in 32bit compatibility mode with EFER.LME = 1, CS.L = 0, CS.D = 1 |
@@ -184,7 +184,8 @@ no_longmode: | |||
184 | 184 | ||
185 | #include "../../kernel/verify_cpu_64.S" | 185 | #include "../../kernel/verify_cpu_64.S" |
186 | 186 | ||
187 | /* Be careful here startup_64 needs to be at a predictable | 187 | /* |
188 | * Be careful here startup_64 needs to be at a predictable | ||
188 | * address so I can export it in an ELF header. Bootloaders | 189 | * address so I can export it in an ELF header. Bootloaders |
189 | * should look at the ELF header to find this address, as | 190 | * should look at the ELF header to find this address, as |
190 | * it may change in the future. | 191 | * it may change in the future. |
@@ -192,7 +193,8 @@ no_longmode: | |||
192 | .code64 | 193 | .code64 |
193 | .org 0x200 | 194 | .org 0x200 |
194 | ENTRY(startup_64) | 195 | ENTRY(startup_64) |
195 | /* We come here either from startup_32 or directly from a | 196 | /* |
197 | * We come here either from startup_32 or directly from a | ||
196 | * 64bit bootloader. If we come here from a bootloader we depend on | 198 | * 64bit bootloader. If we come here from a bootloader we depend on |
197 | * an identity mapped page table being provied that maps our | 199 | * an identity mapped page table being provied that maps our |
198 | * entire text+data+bss and hopefully all of memory. | 200 | * entire text+data+bss and hopefully all of memory. |
@@ -209,50 +211,54 @@ ENTRY(startup_64) | |||
209 | movl $0x20, %eax | 211 | movl $0x20, %eax |
210 | ltr %ax | 212 | ltr %ax |
211 | 213 | ||
212 | /* Compute the decompressed kernel start address. It is where | 214 | /* |
215 | * Compute the decompressed kernel start address. It is where | ||
213 | * we were loaded at aligned to a 2M boundary. %rbp contains the | 216 | * we were loaded at aligned to a 2M boundary. %rbp contains the |
214 | * decompressed kernel start address. | 217 | * decompressed kernel start address. |
215 | * | 218 | * |
216 | * If it is a relocatable kernel then decompress and run the kernel | 219 | * If it is a relocatable kernel then decompress and run the kernel |
217 | * from load address aligned to 2MB addr, otherwise decompress and | 220 | * from load address aligned to 2MB addr, otherwise decompress and |
218 | * run the kernel from CONFIG_PHYSICAL_START | 221 | * run the kernel from LOAD_PHYSICAL_ADDR |
222 | * | ||
223 | * We cannot rely on the calculation done in 32-bit mode, since we | ||
224 | * may have been invoked via the 64-bit entry point. | ||
219 | */ | 225 | */ |
220 | 226 | ||
221 | /* Start with the delta to where the kernel will run at. */ | 227 | /* Start with the delta to where the kernel will run at. */ |
222 | #ifdef CONFIG_RELOCATABLE | 228 | #ifdef CONFIG_RELOCATABLE |
223 | leaq startup_32(%rip) /* - $startup_32 */, %rbp | 229 | leaq startup_32(%rip) /* - $startup_32 */, %rbp |
224 | addq $(PMD_PAGE_SIZE - 1), %rbp | 230 | movl BP_kernel_alignment(%rsi), %eax |
225 | andq $PMD_PAGE_MASK, %rbp | 231 | decl %eax |
226 | movq %rbp, %rbx | 232 | addq %rax, %rbp |
233 | notq %rax | ||
234 | andq %rax, %rbp | ||
227 | #else | 235 | #else |
228 | movq $CONFIG_PHYSICAL_START, %rbp | 236 | movq $LOAD_PHYSICAL_ADDR, %rbp |
229 | movq %rbp, %rbx | ||
230 | #endif | 237 | #endif |
231 | 238 | ||
232 | /* Replace the compressed data size with the uncompressed size */ | 239 | /* Target address to relocate to for decompression */ |
233 | movl input_len(%rip), %eax | 240 | leaq z_extract_offset(%rbp), %rbx |
234 | subq %rax, %rbx | 241 | |
235 | movl output_len(%rip), %eax | 242 | /* Set up the stack */ |
236 | addq %rax, %rbx | 243 | leaq boot_stack_end(%rbx), %rsp |
237 | /* Add 8 bytes for every 32K input block */ | 244 | |
238 | shrq $12, %rax | 245 | /* Zero EFLAGS */ |
239 | addq %rax, %rbx | 246 | pushq $0 |
240 | /* Add 32K + 18 bytes of extra slack and align on a 4K boundary */ | 247 | popfq |
241 | addq $(32768 + 18 + 4095), %rbx | 248 | |
242 | andq $~4095, %rbx | 249 | /* |
243 | 250 | * Copy the compressed kernel to the end of our buffer | |
244 | /* Copy the compressed kernel to the end of our buffer | ||
245 | * where decompression in place becomes safe. | 251 | * where decompression in place becomes safe. |
246 | */ | 252 | */ |
247 | leaq _end_before_pgt(%rip), %r8 | 253 | pushq %rsi |
248 | leaq _end_before_pgt(%rbx), %r9 | 254 | leaq (_bss-8)(%rip), %rsi |
249 | movq $_end_before_pgt /* - $startup_32 */, %rcx | 255 | leaq (_bss-8)(%rbx), %rdi |
250 | 1: subq $8, %r8 | 256 | movq $_bss /* - $startup_32 */, %rcx |
251 | subq $8, %r9 | 257 | shrq $3, %rcx |
252 | movq 0(%r8), %rax | 258 | std |
253 | movq %rax, 0(%r9) | 259 | rep movsq |
254 | subq $8, %rcx | 260 | cld |
255 | jnz 1b | 261 | popq %rsi |
256 | 262 | ||
257 | /* | 263 | /* |
258 | * Jump to the relocated address. | 264 | * Jump to the relocated address. |
@@ -260,37 +266,28 @@ ENTRY(startup_64) | |||
260 | leaq relocated(%rbx), %rax | 266 | leaq relocated(%rbx), %rax |
261 | jmp *%rax | 267 | jmp *%rax |
262 | 268 | ||
263 | .section ".text" | 269 | .text |
264 | relocated: | 270 | relocated: |
265 | 271 | ||
266 | /* | 272 | /* |
267 | * Clear BSS | 273 | * Clear BSS (stack is currently empty) |
268 | */ | 274 | */ |
269 | xorq %rax, %rax | 275 | xorl %eax, %eax |
270 | leaq _edata(%rbx), %rdi | 276 | leaq _bss(%rip), %rdi |
271 | leaq _end_before_pgt(%rbx), %rcx | 277 | leaq _ebss(%rip), %rcx |
272 | subq %rdi, %rcx | 278 | subq %rdi, %rcx |
273 | cld | 279 | shrq $3, %rcx |
274 | rep | 280 | rep stosq |
275 | stosb | ||
276 | |||
277 | /* Setup the stack */ | ||
278 | leaq boot_stack_end(%rip), %rsp | ||
279 | |||
280 | /* zero EFLAGS after setting rsp */ | ||
281 | pushq $0 | ||
282 | popfq | ||
283 | 281 | ||
284 | /* | 282 | /* |
285 | * Do the decompression, and jump to the new kernel.. | 283 | * Do the decompression, and jump to the new kernel.. |
286 | */ | 284 | */ |
287 | pushq %rsi # Save the real mode argument | 285 | pushq %rsi /* Save the real mode argument */ |
288 | movq %rsi, %rdi # real mode address | 286 | movq %rsi, %rdi /* real mode address */ |
289 | leaq boot_heap(%rip), %rsi # malloc area for uncompression | 287 | leaq boot_heap(%rip), %rsi /* malloc area for uncompression */ |
290 | leaq input_data(%rip), %rdx # input_data | 288 | leaq input_data(%rip), %rdx /* input_data */ |
291 | movl input_len(%rip), %eax | 289 | movl $z_input_len, %ecx /* input_len */ |
292 | movq %rax, %rcx # input_len | 290 | movq %rbp, %r8 /* output target address */ |
293 | movq %rbp, %r8 # output | ||
294 | call decompress_kernel | 291 | call decompress_kernel |
295 | popq %rsi | 292 | popq %rsi |
296 | 293 | ||
@@ -311,11 +308,21 @@ gdt: | |||
311 | .quad 0x0000000000000000 /* TS continued */ | 308 | .quad 0x0000000000000000 /* TS continued */ |
312 | gdt_end: | 309 | gdt_end: |
313 | 310 | ||
314 | .bss | 311 | /* |
315 | /* Stack and heap for uncompression */ | 312 | * Stack and heap for uncompression |
316 | .balign 4 | 313 | */ |
314 | .bss | ||
315 | .balign 4 | ||
317 | boot_heap: | 316 | boot_heap: |
318 | .fill BOOT_HEAP_SIZE, 1, 0 | 317 | .fill BOOT_HEAP_SIZE, 1, 0 |
319 | boot_stack: | 318 | boot_stack: |
320 | .fill BOOT_STACK_SIZE, 1, 0 | 319 | .fill BOOT_STACK_SIZE, 1, 0 |
321 | boot_stack_end: | 320 | boot_stack_end: |
321 | |||
322 | /* | ||
323 | * Space for page tables (not in .bss so not zeroed) | ||
324 | */ | ||
325 | .section ".pgtable","a",@nobits | ||
326 | .balign 4096 | ||
327 | pgtable: | ||
328 | .fill 6*4096, 1, 0 | ||
diff --git a/arch/x86/boot/compressed/misc.c b/arch/x86/boot/compressed/misc.c index e45be73684ff..842b2a36174a 100644 --- a/arch/x86/boot/compressed/misc.c +++ b/arch/x86/boot/compressed/misc.c | |||
@@ -325,21 +325,19 @@ asmlinkage void decompress_kernel(void *rmode, memptr heap, | |||
325 | free_mem_ptr = heap; /* Heap */ | 325 | free_mem_ptr = heap; /* Heap */ |
326 | free_mem_end_ptr = heap + BOOT_HEAP_SIZE; | 326 | free_mem_end_ptr = heap + BOOT_HEAP_SIZE; |
327 | 327 | ||
328 | if ((unsigned long)output & (MIN_KERNEL_ALIGN - 1)) | ||
329 | error("Destination address inappropriately aligned"); | ||
328 | #ifdef CONFIG_X86_64 | 330 | #ifdef CONFIG_X86_64 |
329 | if ((unsigned long)output & (__KERNEL_ALIGN - 1)) | 331 | if (heap > 0x3fffffffffffUL) |
330 | error("Destination address not 2M aligned"); | ||
331 | if ((unsigned long)output >= 0xffffffffffUL) | ||
332 | error("Destination address too large"); | 332 | error("Destination address too large"); |
333 | #else | 333 | #else |
334 | if ((u32)output & (CONFIG_PHYSICAL_ALIGN - 1)) | ||
335 | error("Destination address not CONFIG_PHYSICAL_ALIGN aligned"); | ||
336 | if (heap > ((-__PAGE_OFFSET-(512<<20)-1) & 0x7fffffff)) | 334 | if (heap > ((-__PAGE_OFFSET-(512<<20)-1) & 0x7fffffff)) |
337 | error("Destination address too large"); | 335 | error("Destination address too large"); |
336 | #endif | ||
338 | #ifndef CONFIG_RELOCATABLE | 337 | #ifndef CONFIG_RELOCATABLE |
339 | if ((u32)output != LOAD_PHYSICAL_ADDR) | 338 | if ((unsigned long)output != LOAD_PHYSICAL_ADDR) |
340 | error("Wrong destination address"); | 339 | error("Wrong destination address"); |
341 | #endif | 340 | #endif |
342 | #endif | ||
343 | 341 | ||
344 | if (!quiet) | 342 | if (!quiet) |
345 | putstr("\nDecompressing Linux... "); | 343 | putstr("\nDecompressing Linux... "); |
diff --git a/arch/x86/boot/compressed/mkpiggy.c b/arch/x86/boot/compressed/mkpiggy.c new file mode 100644 index 000000000000..bcbd36c41432 --- /dev/null +++ b/arch/x86/boot/compressed/mkpiggy.c | |||
@@ -0,0 +1,97 @@ | |||
1 | /* ----------------------------------------------------------------------- * | ||
2 | * | ||
3 | * Copyright (C) 2009 Intel Corporation. All rights reserved. | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or | ||
6 | * modify it under the terms of the GNU General Public License version | ||
7 | * 2 as published by the Free Software Foundation. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License | ||
15 | * along with this program; if not, write to the Free Software | ||
16 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | ||
17 | * 02110-1301, USA. | ||
18 | * | ||
19 | * H. Peter Anvin <hpa@linux.intel.com> | ||
20 | * | ||
21 | * ----------------------------------------------------------------------- */ | ||
22 | |||
23 | /* | ||
24 | * Compute the desired load offset from a compressed program; outputs | ||
25 | * a small assembly wrapper with the appropriate symbols defined. | ||
26 | */ | ||
27 | |||
28 | #include <stdlib.h> | ||
29 | #include <stdio.h> | ||
30 | #include <string.h> | ||
31 | #include <inttypes.h> | ||
32 | |||
33 | static uint32_t getle32(const void *p) | ||
34 | { | ||
35 | const uint8_t *cp = p; | ||
36 | |||
37 | return (uint32_t)cp[0] + ((uint32_t)cp[1] << 8) + | ||
38 | ((uint32_t)cp[2] << 16) + ((uint32_t)cp[3] << 24); | ||
39 | } | ||
40 | |||
41 | int main(int argc, char *argv[]) | ||
42 | { | ||
43 | uint32_t olen; | ||
44 | long ilen; | ||
45 | unsigned long offs; | ||
46 | FILE *f; | ||
47 | |||
48 | if (argc < 2) { | ||
49 | fprintf(stderr, "Usage: %s compressed_file\n", argv[0]); | ||
50 | return 1; | ||
51 | } | ||
52 | |||
53 | /* Get the information for the compressed kernel image first */ | ||
54 | |||
55 | f = fopen(argv[1], "r"); | ||
56 | if (!f) { | ||
57 | perror(argv[1]); | ||
58 | return 1; | ||
59 | } | ||
60 | |||
61 | |||
62 | if (fseek(f, -4L, SEEK_END)) { | ||
63 | perror(argv[1]); | ||
64 | } | ||
65 | fread(&olen, sizeof olen, 1, f); | ||
66 | ilen = ftell(f); | ||
67 | olen = getle32(&olen); | ||
68 | fclose(f); | ||
69 | |||
70 | /* | ||
71 | * Now we have the input (compressed) and output (uncompressed) | ||
72 | * sizes, compute the necessary decompression offset... | ||
73 | */ | ||
74 | |||
75 | offs = (olen > ilen) ? olen - ilen : 0; | ||
76 | offs += olen >> 12; /* Add 8 bytes for each 32K block */ | ||
77 | offs += 32*1024 + 18; /* Add 32K + 18 bytes slack */ | ||
78 | offs = (offs+4095) & ~4095; /* Round to a 4K boundary */ | ||
79 | |||
80 | printf(".section \".rodata.compressed\",\"a\",@progbits\n"); | ||
81 | printf(".globl z_input_len\n"); | ||
82 | printf("z_input_len = %lu\n", ilen); | ||
83 | printf(".globl z_output_len\n"); | ||
84 | printf("z_output_len = %lu\n", (unsigned long)olen); | ||
85 | printf(".globl z_extract_offset\n"); | ||
86 | printf("z_extract_offset = 0x%lx\n", offs); | ||
87 | /* z_extract_offset_negative allows simplification of head_32.S */ | ||
88 | printf(".globl z_extract_offset_negative\n"); | ||
89 | printf("z_extract_offset_negative = -0x%lx\n", offs); | ||
90 | |||
91 | printf(".globl input_data, input_data_end\n"); | ||
92 | printf("input_data:\n"); | ||
93 | printf(".incbin \"%s\"\n", argv[1]); | ||
94 | printf("input_data_end:\n"); | ||
95 | |||
96 | return 0; | ||
97 | } | ||
diff --git a/arch/x86/boot/compressed/vmlinux_64.lds b/arch/x86/boot/compressed/vmlinux.lds.S index bef1ac891bce..cc353e1b3ffd 100644 --- a/arch/x86/boot/compressed/vmlinux_64.lds +++ b/arch/x86/boot/compressed/vmlinux.lds.S | |||
@@ -1,6 +1,17 @@ | |||
1 | OUTPUT_FORMAT("elf64-x86-64", "elf64-x86-64", "elf64-x86-64") | 1 | OUTPUT_FORMAT(CONFIG_OUTPUT_FORMAT, CONFIG_OUTPUT_FORMAT, CONFIG_OUTPUT_FORMAT) |
2 | |||
3 | #undef i386 | ||
4 | |||
5 | #include <asm/page_types.h> | ||
6 | |||
7 | #ifdef CONFIG_X86_64 | ||
2 | OUTPUT_ARCH(i386:x86-64) | 8 | OUTPUT_ARCH(i386:x86-64) |
3 | ENTRY(startup_64) | 9 | ENTRY(startup_64) |
10 | #else | ||
11 | OUTPUT_ARCH(i386) | ||
12 | ENTRY(startup_32) | ||
13 | #endif | ||
14 | |||
4 | SECTIONS | 15 | SECTIONS |
5 | { | 16 | { |
6 | /* Be careful parts of head_64.S assume startup_32 is at | 17 | /* Be careful parts of head_64.S assume startup_32 is at |
@@ -33,16 +44,22 @@ SECTIONS | |||
33 | *(.data.*) | 44 | *(.data.*) |
34 | _edata = . ; | 45 | _edata = . ; |
35 | } | 46 | } |
47 | . = ALIGN(CONFIG_X86_L1_CACHE_BYTES); | ||
36 | .bss : { | 48 | .bss : { |
37 | _bss = . ; | 49 | _bss = . ; |
38 | *(.bss) | 50 | *(.bss) |
39 | *(.bss.*) | 51 | *(.bss.*) |
40 | *(COMMON) | 52 | *(COMMON) |
41 | . = ALIGN(8); | 53 | . = ALIGN(8); /* For convenience during zeroing */ |
42 | _end_before_pgt = . ; | ||
43 | . = ALIGN(4096); | ||
44 | pgtable = . ; | ||
45 | . = . + 4096 * 6; | ||
46 | _ebss = .; | 54 | _ebss = .; |
47 | } | 55 | } |
56 | #ifdef CONFIG_X86_64 | ||
57 | . = ALIGN(PAGE_SIZE); | ||
58 | .pgtable : { | ||
59 | _pgtable = . ; | ||
60 | *(.pgtable) | ||
61 | _epgtable = . ; | ||
62 | } | ||
63 | #endif | ||
64 | _end = .; | ||
48 | } | 65 | } |
diff --git a/arch/x86/boot/compressed/vmlinux.scr b/arch/x86/boot/compressed/vmlinux.scr deleted file mode 100644 index f02382ae5c48..000000000000 --- a/arch/x86/boot/compressed/vmlinux.scr +++ /dev/null | |||
@@ -1,10 +0,0 @@ | |||
1 | SECTIONS | ||
2 | { | ||
3 | .rodata.compressed : { | ||
4 | input_len = .; | ||
5 | LONG(input_data_end - input_data) input_data = .; | ||
6 | *(.data) | ||
7 | output_len = . - 4; | ||
8 | input_data_end = .; | ||
9 | } | ||
10 | } | ||
diff --git a/arch/x86/boot/compressed/vmlinux_32.lds b/arch/x86/boot/compressed/vmlinux_32.lds deleted file mode 100644 index bb3c48379c40..000000000000 --- a/arch/x86/boot/compressed/vmlinux_32.lds +++ /dev/null | |||
@@ -1,43 +0,0 @@ | |||
1 | OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386") | ||
2 | OUTPUT_ARCH(i386) | ||
3 | ENTRY(startup_32) | ||
4 | SECTIONS | ||
5 | { | ||
6 | /* Be careful parts of head_32.S assume startup_32 is at | ||
7 | * address 0. | ||
8 | */ | ||
9 | . = 0; | ||
10 | .text.head : { | ||
11 | _head = . ; | ||
12 | *(.text.head) | ||
13 | _ehead = . ; | ||
14 | } | ||
15 | .rodata.compressed : { | ||
16 | *(.rodata.compressed) | ||
17 | } | ||
18 | .text : { | ||
19 | _text = .; /* Text */ | ||
20 | *(.text) | ||
21 | *(.text.*) | ||
22 | _etext = . ; | ||
23 | } | ||
24 | .rodata : { | ||
25 | _rodata = . ; | ||
26 | *(.rodata) /* read-only data */ | ||
27 | *(.rodata.*) | ||
28 | _erodata = . ; | ||
29 | } | ||
30 | .data : { | ||
31 | _data = . ; | ||
32 | *(.data) | ||
33 | *(.data.*) | ||
34 | _edata = . ; | ||
35 | } | ||
36 | .bss : { | ||
37 | _bss = . ; | ||
38 | *(.bss) | ||
39 | *(.bss.*) | ||
40 | *(COMMON) | ||
41 | _end = . ; | ||
42 | } | ||
43 | } | ||
diff --git a/arch/x86/boot/edd.c b/arch/x86/boot/edd.c index 1aae8f3e5ca1..c501a5b466f8 100644 --- a/arch/x86/boot/edd.c +++ b/arch/x86/boot/edd.c | |||
@@ -2,6 +2,7 @@ | |||
2 | * | 2 | * |
3 | * Copyright (C) 1991, 1992 Linus Torvalds | 3 | * Copyright (C) 1991, 1992 Linus Torvalds |
4 | * Copyright 2007 rPath, Inc. - All Rights Reserved | 4 | * Copyright 2007 rPath, Inc. - All Rights Reserved |
5 | * Copyright 2009 Intel Corporation; author H. Peter Anvin | ||
5 | * | 6 | * |
6 | * This file is part of the Linux kernel, and is made available under | 7 | * This file is part of the Linux kernel, and is made available under |
7 | * the terms of the GNU General Public License version 2. | 8 | * the terms of the GNU General Public License version 2. |
@@ -22,17 +23,17 @@ | |||
22 | */ | 23 | */ |
23 | static int read_mbr(u8 devno, void *buf) | 24 | static int read_mbr(u8 devno, void *buf) |
24 | { | 25 | { |
25 | u16 ax, bx, cx, dx; | 26 | struct biosregs ireg, oreg; |
26 | 27 | ||
27 | ax = 0x0201; /* Legacy Read, one sector */ | 28 | initregs(&ireg); |
28 | cx = 0x0001; /* Sector 0-0-1 */ | 29 | ireg.ax = 0x0201; /* Legacy Read, one sector */ |
29 | dx = devno; | 30 | ireg.cx = 0x0001; /* Sector 0-0-1 */ |
30 | bx = (size_t)buf; | 31 | ireg.dl = devno; |
31 | asm volatile("pushfl; stc; int $0x13; setc %%al; popfl" | 32 | ireg.bx = (size_t)buf; |
32 | : "+a" (ax), "+c" (cx), "+d" (dx), "+b" (bx) | ||
33 | : : "esi", "edi", "memory"); | ||
34 | 33 | ||
35 | return -(u8)ax; /* 0 or -1 */ | 34 | intcall(0x13, &ireg, &oreg); |
35 | |||
36 | return -(oreg.eflags & X86_EFLAGS_CF); /* 0 or -1 */ | ||
36 | } | 37 | } |
37 | 38 | ||
38 | static u32 read_mbr_sig(u8 devno, struct edd_info *ei, u32 *mbrsig) | 39 | static u32 read_mbr_sig(u8 devno, struct edd_info *ei, u32 *mbrsig) |
@@ -72,56 +73,46 @@ static u32 read_mbr_sig(u8 devno, struct edd_info *ei, u32 *mbrsig) | |||
72 | 73 | ||
73 | static int get_edd_info(u8 devno, struct edd_info *ei) | 74 | static int get_edd_info(u8 devno, struct edd_info *ei) |
74 | { | 75 | { |
75 | u16 ax, bx, cx, dx, di; | 76 | struct biosregs ireg, oreg; |
76 | 77 | ||
77 | memset(ei, 0, sizeof *ei); | 78 | memset(ei, 0, sizeof *ei); |
78 | 79 | ||
79 | /* Check Extensions Present */ | 80 | /* Check Extensions Present */ |
80 | 81 | ||
81 | ax = 0x4100; | 82 | initregs(&ireg); |
82 | bx = EDDMAGIC1; | 83 | ireg.ah = 0x41; |
83 | dx = devno; | 84 | ireg.bx = EDDMAGIC1; |
84 | asm("pushfl; stc; int $0x13; setc %%al; popfl" | 85 | ireg.dl = devno; |
85 | : "+a" (ax), "+b" (bx), "=c" (cx), "+d" (dx) | 86 | intcall(0x13, &ireg, &oreg); |
86 | : : "esi", "edi"); | ||
87 | 87 | ||
88 | if ((u8)ax) | 88 | if (oreg.eflags & X86_EFLAGS_CF) |
89 | return -1; /* No extended information */ | 89 | return -1; /* No extended information */ |
90 | 90 | ||
91 | if (bx != EDDMAGIC2) | 91 | if (oreg.bx != EDDMAGIC2) |
92 | return -1; | 92 | return -1; |
93 | 93 | ||
94 | ei->device = devno; | 94 | ei->device = devno; |
95 | ei->version = ax >> 8; /* EDD version number */ | 95 | ei->version = oreg.ah; /* EDD version number */ |
96 | ei->interface_support = cx; /* EDD functionality subsets */ | 96 | ei->interface_support = oreg.cx; /* EDD functionality subsets */ |
97 | 97 | ||
98 | /* Extended Get Device Parameters */ | 98 | /* Extended Get Device Parameters */ |
99 | 99 | ||
100 | ei->params.length = sizeof(ei->params); | 100 | ei->params.length = sizeof(ei->params); |
101 | ax = 0x4800; | 101 | ireg.ah = 0x48; |
102 | dx = devno; | 102 | ireg.si = (size_t)&ei->params; |
103 | asm("pushfl; int $0x13; popfl" | 103 | intcall(0x13, &ireg, &oreg); |
104 | : "+a" (ax), "+d" (dx), "=m" (ei->params) | ||
105 | : "S" (&ei->params) | ||
106 | : "ebx", "ecx", "edi"); | ||
107 | 104 | ||
108 | /* Get legacy CHS parameters */ | 105 | /* Get legacy CHS parameters */ |
109 | 106 | ||
110 | /* Ralf Brown recommends setting ES:DI to 0:0 */ | 107 | /* Ralf Brown recommends setting ES:DI to 0:0 */ |
111 | ax = 0x0800; | 108 | ireg.ah = 0x08; |
112 | dx = devno; | 109 | ireg.es = 0; |
113 | di = 0; | 110 | intcall(0x13, &ireg, &oreg); |
114 | asm("pushw %%es; " | 111 | |
115 | "movw %%di,%%es; " | 112 | if (!(oreg.eflags & X86_EFLAGS_CF)) { |
116 | "pushfl; stc; int $0x13; setc %%al; popfl; " | 113 | ei->legacy_max_cylinder = oreg.ch + ((oreg.cl & 0xc0) << 2); |
117 | "popw %%es" | 114 | ei->legacy_max_head = oreg.dh; |
118 | : "+a" (ax), "=b" (bx), "=c" (cx), "+d" (dx), "+D" (di) | 115 | ei->legacy_sectors_per_track = oreg.cl & 0x3f; |
119 | : : "esi"); | ||
120 | |||
121 | if ((u8)ax == 0) { | ||
122 | ei->legacy_max_cylinder = (cx >> 8) + ((cx & 0xc0) << 2); | ||
123 | ei->legacy_max_head = dx >> 8; | ||
124 | ei->legacy_sectors_per_track = cx & 0x3f; | ||
125 | } | 116 | } |
126 | 117 | ||
127 | return 0; | 118 | return 0; |
diff --git a/arch/x86/boot/header.S b/arch/x86/boot/header.S index 5d84d1c74e4c..b31cc54b4641 100644 --- a/arch/x86/boot/header.S +++ b/arch/x86/boot/header.S | |||
@@ -22,7 +22,8 @@ | |||
22 | #include <asm/page_types.h> | 22 | #include <asm/page_types.h> |
23 | #include <asm/setup.h> | 23 | #include <asm/setup.h> |
24 | #include "boot.h" | 24 | #include "boot.h" |
25 | #include "offsets.h" | 25 | #include "voffset.h" |
26 | #include "zoffset.h" | ||
26 | 27 | ||
27 | BOOTSEG = 0x07C0 /* original address of boot-sector */ | 28 | BOOTSEG = 0x07C0 /* original address of boot-sector */ |
28 | SYSSEG = 0x1000 /* historical load address >> 4 */ | 29 | SYSSEG = 0x1000 /* historical load address >> 4 */ |
@@ -115,7 +116,7 @@ _start: | |||
115 | # Part 2 of the header, from the old setup.S | 116 | # Part 2 of the header, from the old setup.S |
116 | 117 | ||
117 | .ascii "HdrS" # header signature | 118 | .ascii "HdrS" # header signature |
118 | .word 0x0209 # header version number (>= 0x0105) | 119 | .word 0x020a # header version number (>= 0x0105) |
119 | # or else old loadlin-1.5 will fail) | 120 | # or else old loadlin-1.5 will fail) |
120 | .globl realmode_swtch | 121 | .globl realmode_swtch |
121 | realmode_swtch: .word 0, 0 # default_switch, SETUPSEG | 122 | realmode_swtch: .word 0, 0 # default_switch, SETUPSEG |
@@ -168,7 +169,11 @@ heap_end_ptr: .word _end+STACK_SIZE-512 | |||
168 | # end of setup code can be used by setup | 169 | # end of setup code can be used by setup |
169 | # for local heap purposes. | 170 | # for local heap purposes. |
170 | 171 | ||
171 | pad1: .word 0 | 172 | ext_loader_ver: |
173 | .byte 0 # Extended boot loader version | ||
174 | ext_loader_type: | ||
175 | .byte 0 # Extended boot loader type | ||
176 | |||
172 | cmd_line_ptr: .long 0 # (Header version 0x0202 or later) | 177 | cmd_line_ptr: .long 0 # (Header version 0x0202 or later) |
173 | # If nonzero, a 32-bit pointer | 178 | # If nonzero, a 32-bit pointer |
174 | # to the kernel command line. | 179 | # to the kernel command line. |
@@ -200,7 +205,7 @@ relocatable_kernel: .byte 1 | |||
200 | #else | 205 | #else |
201 | relocatable_kernel: .byte 0 | 206 | relocatable_kernel: .byte 0 |
202 | #endif | 207 | #endif |
203 | pad2: .byte 0 | 208 | min_alignment: .byte MIN_KERNEL_ALIGN_LG2 # minimum alignment |
204 | pad3: .word 0 | 209 | pad3: .word 0 |
205 | 210 | ||
206 | cmdline_size: .long COMMAND_LINE_SIZE-1 #length of the command line, | 211 | cmdline_size: .long COMMAND_LINE_SIZE-1 #length of the command line, |
@@ -212,16 +217,27 @@ hardware_subarch: .long 0 # subarchitecture, added with 2.07 | |||
212 | 217 | ||
213 | hardware_subarch_data: .quad 0 | 218 | hardware_subarch_data: .quad 0 |
214 | 219 | ||
215 | payload_offset: .long input_data | 220 | payload_offset: .long ZO_input_data |
216 | payload_length: .long input_data_end-input_data | 221 | payload_length: .long ZO_z_input_len |
217 | 222 | ||
218 | setup_data: .quad 0 # 64-bit physical pointer to | 223 | setup_data: .quad 0 # 64-bit physical pointer to |
219 | # single linked list of | 224 | # single linked list of |
220 | # struct setup_data | 225 | # struct setup_data |
221 | 226 | ||
227 | pref_address: .quad LOAD_PHYSICAL_ADDR # preferred load addr | ||
228 | |||
229 | #define ZO_INIT_SIZE (ZO__end - ZO_startup_32 + ZO_z_extract_offset) | ||
230 | #define VO_INIT_SIZE (VO__end - VO__text) | ||
231 | #if ZO_INIT_SIZE > VO_INIT_SIZE | ||
232 | #define INIT_SIZE ZO_INIT_SIZE | ||
233 | #else | ||
234 | #define INIT_SIZE VO_INIT_SIZE | ||
235 | #endif | ||
236 | init_size: .long INIT_SIZE # kernel initialization size | ||
237 | |||
222 | # End of setup header ##################################################### | 238 | # End of setup header ##################################################### |
223 | 239 | ||
224 | .section ".inittext", "ax" | 240 | .section ".entrytext", "ax" |
225 | start_of_setup: | 241 | start_of_setup: |
226 | #ifdef SAFE_RESET_DISK_CONTROLLER | 242 | #ifdef SAFE_RESET_DISK_CONTROLLER |
227 | # Reset the disk controller. | 243 | # Reset the disk controller. |
diff --git a/arch/x86/boot/main.c b/arch/x86/boot/main.c index 58f0415d3ae0..140172b895bd 100644 --- a/arch/x86/boot/main.c +++ b/arch/x86/boot/main.c | |||
@@ -2,6 +2,7 @@ | |||
2 | * | 2 | * |
3 | * Copyright (C) 1991, 1992 Linus Torvalds | 3 | * Copyright (C) 1991, 1992 Linus Torvalds |
4 | * Copyright 2007 rPath, Inc. - All Rights Reserved | 4 | * Copyright 2007 rPath, Inc. - All Rights Reserved |
5 | * Copyright 2009 Intel Corporation; author H. Peter Anvin | ||
5 | * | 6 | * |
6 | * This file is part of the Linux kernel, and is made available under | 7 | * This file is part of the Linux kernel, and is made available under |
7 | * the terms of the GNU General Public License version 2. | 8 | * the terms of the GNU General Public License version 2. |
@@ -61,11 +62,10 @@ static void copy_boot_params(void) | |||
61 | */ | 62 | */ |
62 | static void keyboard_set_repeat(void) | 63 | static void keyboard_set_repeat(void) |
63 | { | 64 | { |
64 | u16 ax = 0x0305; | 65 | struct biosregs ireg; |
65 | u16 bx = 0; | 66 | initregs(&ireg); |
66 | asm volatile("int $0x16" | 67 | ireg.ax = 0x0305; |
67 | : "+a" (ax), "+b" (bx) | 68 | intcall(0x16, &ireg, NULL); |
68 | : : "ecx", "edx", "esi", "edi"); | ||
69 | } | 69 | } |
70 | 70 | ||
71 | /* | 71 | /* |
@@ -73,18 +73,22 @@ static void keyboard_set_repeat(void) | |||
73 | */ | 73 | */ |
74 | static void query_ist(void) | 74 | static void query_ist(void) |
75 | { | 75 | { |
76 | struct biosregs ireg, oreg; | ||
77 | |||
76 | /* Some older BIOSes apparently crash on this call, so filter | 78 | /* Some older BIOSes apparently crash on this call, so filter |
77 | it from machines too old to have SpeedStep at all. */ | 79 | it from machines too old to have SpeedStep at all. */ |
78 | if (cpu.level < 6) | 80 | if (cpu.level < 6) |
79 | return; | 81 | return; |
80 | 82 | ||
81 | asm("int $0x15" | 83 | initregs(&ireg); |
82 | : "=a" (boot_params.ist_info.signature), | 84 | ireg.ax = 0xe980; /* IST Support */ |
83 | "=b" (boot_params.ist_info.command), | 85 | ireg.edx = 0x47534943; /* Request value */ |
84 | "=c" (boot_params.ist_info.event), | 86 | intcall(0x15, &ireg, &oreg); |
85 | "=d" (boot_params.ist_info.perf_level) | 87 | |
86 | : "a" (0x0000e980), /* IST Support */ | 88 | boot_params.ist_info.signature = oreg.eax; |
87 | "d" (0x47534943)); /* Request value */ | 89 | boot_params.ist_info.command = oreg.ebx; |
90 | boot_params.ist_info.event = oreg.ecx; | ||
91 | boot_params.ist_info.perf_level = oreg.edx; | ||
88 | } | 92 | } |
89 | 93 | ||
90 | /* | 94 | /* |
@@ -93,13 +97,12 @@ static void query_ist(void) | |||
93 | static void set_bios_mode(void) | 97 | static void set_bios_mode(void) |
94 | { | 98 | { |
95 | #ifdef CONFIG_X86_64 | 99 | #ifdef CONFIG_X86_64 |
96 | u32 eax, ebx; | 100 | struct biosregs ireg; |
97 | 101 | ||
98 | eax = 0xec00; | 102 | initregs(&ireg); |
99 | ebx = 2; | 103 | ireg.ax = 0xec00; |
100 | asm volatile("int $0x15" | 104 | ireg.bx = 2; |
101 | : "+a" (eax), "+b" (ebx) | 105 | intcall(0x15, &ireg, NULL); |
102 | : : "ecx", "edx", "esi", "edi"); | ||
103 | #endif | 106 | #endif |
104 | } | 107 | } |
105 | 108 | ||
diff --git a/arch/x86/boot/mca.c b/arch/x86/boot/mca.c index 911eaae5d696..a95a531148ef 100644 --- a/arch/x86/boot/mca.c +++ b/arch/x86/boot/mca.c | |||
@@ -2,6 +2,7 @@ | |||
2 | * | 2 | * |
3 | * Copyright (C) 1991, 1992 Linus Torvalds | 3 | * Copyright (C) 1991, 1992 Linus Torvalds |
4 | * Copyright 2007 rPath, Inc. - All Rights Reserved | 4 | * Copyright 2007 rPath, Inc. - All Rights Reserved |
5 | * Copyright 2009 Intel Corporation; author H. Peter Anvin | ||
5 | * | 6 | * |
6 | * This file is part of the Linux kernel, and is made available under | 7 | * This file is part of the Linux kernel, and is made available under |
7 | * the terms of the GNU General Public License version 2. | 8 | * the terms of the GNU General Public License version 2. |
@@ -16,26 +17,22 @@ | |||
16 | 17 | ||
17 | int query_mca(void) | 18 | int query_mca(void) |
18 | { | 19 | { |
19 | u8 err; | 20 | struct biosregs ireg, oreg; |
20 | u16 es, bx, len; | 21 | u16 len; |
21 | 22 | ||
22 | asm("pushw %%es ; " | 23 | initregs(&ireg); |
23 | "int $0x15 ; " | 24 | ireg.ah = 0xc0; |
24 | "setc %0 ; " | 25 | intcall(0x15, &ireg, &oreg); |
25 | "movw %%es, %1 ; " | 26 | |
26 | "popw %%es" | 27 | if (oreg.eflags & X86_EFLAGS_CF) |
27 | : "=acd" (err), "=acdSD" (es), "=b" (bx) | ||
28 | : "a" (0xc000)); | ||
29 | |||
30 | if (err) | ||
31 | return -1; /* No MCA present */ | 28 | return -1; /* No MCA present */ |
32 | 29 | ||
33 | set_fs(es); | 30 | set_fs(oreg.es); |
34 | len = rdfs16(bx); | 31 | len = rdfs16(oreg.bx); |
35 | 32 | ||
36 | if (len > sizeof(boot_params.sys_desc_table)) | 33 | if (len > sizeof(boot_params.sys_desc_table)) |
37 | len = sizeof(boot_params.sys_desc_table); | 34 | len = sizeof(boot_params.sys_desc_table); |
38 | 35 | ||
39 | copy_from_fs(&boot_params.sys_desc_table, bx, len); | 36 | copy_from_fs(&boot_params.sys_desc_table, oreg.bx, len); |
40 | return 0; | 37 | return 0; |
41 | } | 38 | } |
diff --git a/arch/x86/boot/memory.c b/arch/x86/boot/memory.c index 74b3d2ba84e9..cae3feb1035e 100644 --- a/arch/x86/boot/memory.c +++ b/arch/x86/boot/memory.c | |||
@@ -20,12 +20,16 @@ | |||
20 | static int detect_memory_e820(void) | 20 | static int detect_memory_e820(void) |
21 | { | 21 | { |
22 | int count = 0; | 22 | int count = 0; |
23 | u32 next = 0; | 23 | struct biosregs ireg, oreg; |
24 | u32 size, id, edi; | ||
25 | u8 err; | ||
26 | struct e820entry *desc = boot_params.e820_map; | 24 | struct e820entry *desc = boot_params.e820_map; |
27 | static struct e820entry buf; /* static so it is zeroed */ | 25 | static struct e820entry buf; /* static so it is zeroed */ |
28 | 26 | ||
27 | initregs(&ireg); | ||
28 | ireg.ax = 0xe820; | ||
29 | ireg.cx = sizeof buf; | ||
30 | ireg.edx = SMAP; | ||
31 | ireg.di = (size_t)&buf; | ||
32 | |||
29 | /* | 33 | /* |
30 | * Note: at least one BIOS is known which assumes that the | 34 | * Note: at least one BIOS is known which assumes that the |
31 | * buffer pointed to by one e820 call is the same one as | 35 | * buffer pointed to by one e820 call is the same one as |
@@ -41,22 +45,13 @@ static int detect_memory_e820(void) | |||
41 | */ | 45 | */ |
42 | 46 | ||
43 | do { | 47 | do { |
44 | size = sizeof buf; | 48 | intcall(0x15, &ireg, &oreg); |
45 | 49 | ireg.ebx = oreg.ebx; /* for next iteration... */ | |
46 | /* Important: %edx and %esi are clobbered by some BIOSes, | ||
47 | so they must be either used for the error output | ||
48 | or explicitly marked clobbered. Given that, assume there | ||
49 | is something out there clobbering %ebp and %edi, too. */ | ||
50 | asm("pushl %%ebp; int $0x15; popl %%ebp; setc %0" | ||
51 | : "=d" (err), "+b" (next), "=a" (id), "+c" (size), | ||
52 | "=D" (edi), "+m" (buf) | ||
53 | : "D" (&buf), "d" (SMAP), "a" (0xe820) | ||
54 | : "esi"); | ||
55 | 50 | ||
56 | /* BIOSes which terminate the chain with CF = 1 as opposed | 51 | /* BIOSes which terminate the chain with CF = 1 as opposed |
57 | to %ebx = 0 don't always report the SMAP signature on | 52 | to %ebx = 0 don't always report the SMAP signature on |
58 | the final, failing, probe. */ | 53 | the final, failing, probe. */ |
59 | if (err) | 54 | if (oreg.eflags & X86_EFLAGS_CF) |
60 | break; | 55 | break; |
61 | 56 | ||
62 | /* Some BIOSes stop returning SMAP in the middle of | 57 | /* Some BIOSes stop returning SMAP in the middle of |
@@ -64,60 +59,64 @@ static int detect_memory_e820(void) | |||
64 | screwed up the map at that point, we might have a | 59 | screwed up the map at that point, we might have a |
65 | partial map, the full map, or complete garbage, so | 60 | partial map, the full map, or complete garbage, so |
66 | just return failure. */ | 61 | just return failure. */ |
67 | if (id != SMAP) { | 62 | if (oreg.eax != SMAP) { |
68 | count = 0; | 63 | count = 0; |
69 | break; | 64 | break; |
70 | } | 65 | } |
71 | 66 | ||
72 | *desc++ = buf; | 67 | *desc++ = buf; |
73 | count++; | 68 | count++; |
74 | } while (next && count < ARRAY_SIZE(boot_params.e820_map)); | 69 | } while (ireg.ebx && count < ARRAY_SIZE(boot_params.e820_map)); |
75 | 70 | ||
76 | return boot_params.e820_entries = count; | 71 | return boot_params.e820_entries = count; |
77 | } | 72 | } |
78 | 73 | ||
79 | static int detect_memory_e801(void) | 74 | static int detect_memory_e801(void) |
80 | { | 75 | { |
81 | u16 ax, bx, cx, dx; | 76 | struct biosregs ireg, oreg; |
82 | u8 err; | ||
83 | 77 | ||
84 | bx = cx = dx = 0; | 78 | initregs(&ireg); |
85 | ax = 0xe801; | 79 | ireg.ax = 0xe801; |
86 | asm("stc; int $0x15; setc %0" | 80 | intcall(0x15, &ireg, &oreg); |
87 | : "=m" (err), "+a" (ax), "+b" (bx), "+c" (cx), "+d" (dx)); | ||
88 | 81 | ||
89 | if (err) | 82 | if (oreg.eflags & X86_EFLAGS_CF) |
90 | return -1; | 83 | return -1; |
91 | 84 | ||
92 | /* Do we really need to do this? */ | 85 | /* Do we really need to do this? */ |
93 | if (cx || dx) { | 86 | if (oreg.cx || oreg.dx) { |
94 | ax = cx; | 87 | oreg.ax = oreg.cx; |
95 | bx = dx; | 88 | oreg.bx = oreg.dx; |
96 | } | 89 | } |
97 | 90 | ||
98 | if (ax > 15*1024) | 91 | if (oreg.ax > 15*1024) { |
99 | return -1; /* Bogus! */ | 92 | return -1; /* Bogus! */ |
100 | 93 | } else if (oreg.ax == 15*1024) { | |
101 | /* This ignores memory above 16MB if we have a memory hole | 94 | boot_params.alt_mem_k = (oreg.dx << 6) + oreg.ax; |
102 | there. If someone actually finds a machine with a memory | 95 | } else { |
103 | hole at 16MB and no support for 0E820h they should probably | 96 | /* |
104 | generate a fake e820 map. */ | 97 | * This ignores memory above 16MB if we have a memory |
105 | boot_params.alt_mem_k = (ax == 15*1024) ? (dx << 6)+ax : ax; | 98 | * hole there. If someone actually finds a machine |
99 | * with a memory hole at 16MB and no support for | ||
100 | * 0E820h they should probably generate a fake e820 | ||
101 | * map. | ||
102 | */ | ||
103 | boot_params.alt_mem_k = oreg.ax; | ||
104 | } | ||
106 | 105 | ||
107 | return 0; | 106 | return 0; |
108 | } | 107 | } |
109 | 108 | ||
110 | static int detect_memory_88(void) | 109 | static int detect_memory_88(void) |
111 | { | 110 | { |
112 | u16 ax; | 111 | struct biosregs ireg, oreg; |
113 | u8 err; | ||
114 | 112 | ||
115 | ax = 0x8800; | 113 | initregs(&ireg); |
116 | asm("stc; int $0x15; setc %0" : "=bcdm" (err), "+a" (ax)); | 114 | ireg.ah = 0x88; |
115 | intcall(0x15, &ireg, &oreg); | ||
117 | 116 | ||
118 | boot_params.screen_info.ext_mem_k = ax; | 117 | boot_params.screen_info.ext_mem_k = oreg.ax; |
119 | 118 | ||
120 | return -err; | 119 | return -(oreg.eflags & X86_EFLAGS_CF); /* 0 or -1 */ |
121 | } | 120 | } |
122 | 121 | ||
123 | int detect_memory(void) | 122 | int detect_memory(void) |
diff --git a/arch/x86/boot/regs.c b/arch/x86/boot/regs.c new file mode 100644 index 000000000000..958019b1cfa5 --- /dev/null +++ b/arch/x86/boot/regs.c | |||
@@ -0,0 +1,29 @@ | |||
1 | /* ----------------------------------------------------------------------- | ||
2 | * | ||
3 | * Copyright 2009 Intel Corporation; author H. Peter Anvin | ||
4 | * | ||
5 | * This file is part of the Linux kernel, and is made available under | ||
6 | * the terms of the GNU General Public License version 2 or (at your | ||
7 | * option) any later version; incorporated herein by reference. | ||
8 | * | ||
9 | * ----------------------------------------------------------------------- */ | ||
10 | |||
11 | /* | ||
12 | * Simple helper function for initializing a register set. | ||
13 | * | ||
14 | * Note that this sets EFLAGS_CF in the input register set; this | ||
15 | * makes it easier to catch functions which do nothing but don't | ||
16 | * explicitly set CF. | ||
17 | */ | ||
18 | |||
19 | #include "boot.h" | ||
20 | |||
21 | void initregs(struct biosregs *reg) | ||
22 | { | ||
23 | memset(reg, 0, sizeof *reg); | ||
24 | reg->eflags |= X86_EFLAGS_CF; | ||
25 | reg->ds = ds(); | ||
26 | reg->es = ds(); | ||
27 | reg->fs = fs(); | ||
28 | reg->gs = gs(); | ||
29 | } | ||
diff --git a/arch/x86/boot/setup.ld b/arch/x86/boot/setup.ld index bb8dc2de7969..0f6ec455a2b1 100644 --- a/arch/x86/boot/setup.ld +++ b/arch/x86/boot/setup.ld | |||
@@ -15,8 +15,11 @@ SECTIONS | |||
15 | 15 | ||
16 | . = 497; | 16 | . = 497; |
17 | .header : { *(.header) } | 17 | .header : { *(.header) } |
18 | .entrytext : { *(.entrytext) } | ||
18 | .inittext : { *(.inittext) } | 19 | .inittext : { *(.inittext) } |
19 | .initdata : { *(.initdata) } | 20 | .initdata : { *(.initdata) } |
21 | __end_init = .; | ||
22 | |||
20 | .text : { *(.text) } | 23 | .text : { *(.text) } |
21 | .text32 : { *(.text32) } | 24 | .text32 : { *(.text32) } |
22 | 25 | ||
@@ -52,4 +55,7 @@ SECTIONS | |||
52 | 55 | ||
53 | . = ASSERT(_end <= 0x8000, "Setup too big!"); | 56 | . = ASSERT(_end <= 0x8000, "Setup too big!"); |
54 | . = ASSERT(hdr == 0x1f1, "The setup header has the wrong offset!"); | 57 | . = ASSERT(hdr == 0x1f1, "The setup header has the wrong offset!"); |
58 | /* Necessary for the very-old-loader check to work... */ | ||
59 | . = ASSERT(__end_init <= 5*512, "init sections too big!"); | ||
60 | |||
55 | } | 61 | } |
diff --git a/arch/x86/boot/tty.c b/arch/x86/boot/tty.c index 7e8e8b25f5f6..01ec69c901c7 100644 --- a/arch/x86/boot/tty.c +++ b/arch/x86/boot/tty.c | |||
@@ -2,6 +2,7 @@ | |||
2 | * | 2 | * |
3 | * Copyright (C) 1991, 1992 Linus Torvalds | 3 | * Copyright (C) 1991, 1992 Linus Torvalds |
4 | * Copyright 2007 rPath, Inc. - All Rights Reserved | 4 | * Copyright 2007 rPath, Inc. - All Rights Reserved |
5 | * Copyright 2009 Intel Corporation; author H. Peter Anvin | ||
5 | * | 6 | * |
6 | * This file is part of the Linux kernel, and is made available under | 7 | * This file is part of the Linux kernel, and is made available under |
7 | * the terms of the GNU General Public License version 2. | 8 | * the terms of the GNU General Public License version 2. |
@@ -22,24 +23,23 @@ | |||
22 | 23 | ||
23 | void __attribute__((section(".inittext"))) putchar(int ch) | 24 | void __attribute__((section(".inittext"))) putchar(int ch) |
24 | { | 25 | { |
25 | unsigned char c = ch; | 26 | struct biosregs ireg; |
26 | 27 | ||
27 | if (c == '\n') | 28 | if (ch == '\n') |
28 | putchar('\r'); /* \n -> \r\n */ | 29 | putchar('\r'); /* \n -> \r\n */ |
29 | 30 | ||
30 | /* int $0x10 is known to have bugs involving touching registers | 31 | initregs(&ireg); |
31 | it shouldn't. Be extra conservative... */ | 32 | ireg.bx = 0x0007; |
32 | asm volatile("pushal; pushw %%ds; int $0x10; popw %%ds; popal" | 33 | ireg.cx = 0x0001; |
33 | : : "b" (0x0007), "c" (0x0001), "a" (0x0e00|ch)); | 34 | ireg.ah = 0x0e; |
35 | ireg.al = ch; | ||
36 | intcall(0x10, &ireg, NULL); | ||
34 | } | 37 | } |
35 | 38 | ||
36 | void __attribute__((section(".inittext"))) puts(const char *str) | 39 | void __attribute__((section(".inittext"))) puts(const char *str) |
37 | { | 40 | { |
38 | int n = 0; | 41 | while (*str) |
39 | while (*str) { | ||
40 | putchar(*str++); | 42 | putchar(*str++); |
41 | n++; | ||
42 | } | ||
43 | } | 43 | } |
44 | 44 | ||
45 | /* | 45 | /* |
@@ -49,14 +49,13 @@ void __attribute__((section(".inittext"))) puts(const char *str) | |||
49 | 49 | ||
50 | static u8 gettime(void) | 50 | static u8 gettime(void) |
51 | { | 51 | { |
52 | u16 ax = 0x0200; | 52 | struct biosregs ireg, oreg; |
53 | u16 cx, dx; | ||
54 | 53 | ||
55 | asm volatile("int $0x1a" | 54 | initregs(&ireg); |
56 | : "+a" (ax), "=c" (cx), "=d" (dx) | 55 | ireg.ah = 0x02; |
57 | : : "ebx", "esi", "edi"); | 56 | intcall(0x1a, &ireg, &oreg); |
58 | 57 | ||
59 | return dx >> 8; | 58 | return oreg.dh; |
60 | } | 59 | } |
61 | 60 | ||
62 | /* | 61 | /* |
@@ -64,19 +63,24 @@ static u8 gettime(void) | |||
64 | */ | 63 | */ |
65 | int getchar(void) | 64 | int getchar(void) |
66 | { | 65 | { |
67 | u16 ax = 0; | 66 | struct biosregs ireg, oreg; |
68 | asm volatile("int $0x16" : "+a" (ax)); | 67 | |
68 | initregs(&ireg); | ||
69 | /* ireg.ah = 0x00; */ | ||
70 | intcall(0x16, &ireg, &oreg); | ||
69 | 71 | ||
70 | return ax & 0xff; | 72 | return oreg.al; |
71 | } | 73 | } |
72 | 74 | ||
73 | static int kbd_pending(void) | 75 | static int kbd_pending(void) |
74 | { | 76 | { |
75 | u8 pending; | 77 | struct biosregs ireg, oreg; |
76 | asm volatile("int $0x16; setnz %0" | 78 | |
77 | : "=qm" (pending) | 79 | initregs(&ireg); |
78 | : "a" (0x0100)); | 80 | ireg.ah = 0x01; |
79 | return pending; | 81 | intcall(0x16, &ireg, &oreg); |
82 | |||
83 | return !(oreg.eflags & X86_EFLAGS_ZF); | ||
80 | } | 84 | } |
81 | 85 | ||
82 | void kbd_flush(void) | 86 | void kbd_flush(void) |
diff --git a/arch/x86/boot/video-bios.c b/arch/x86/boot/video-bios.c index 3fa979c9c363..d660be492363 100644 --- a/arch/x86/boot/video-bios.c +++ b/arch/x86/boot/video-bios.c | |||
@@ -2,6 +2,7 @@ | |||
2 | * | 2 | * |
3 | * Copyright (C) 1991, 1992 Linus Torvalds | 3 | * Copyright (C) 1991, 1992 Linus Torvalds |
4 | * Copyright 2007 rPath, Inc. - All Rights Reserved | 4 | * Copyright 2007 rPath, Inc. - All Rights Reserved |
5 | * Copyright 2009 Intel Corporation; author H. Peter Anvin | ||
5 | * | 6 | * |
6 | * This file is part of the Linux kernel, and is made available under | 7 | * This file is part of the Linux kernel, and is made available under |
7 | * the terms of the GNU General Public License version 2. | 8 | * the terms of the GNU General Public License version 2. |
@@ -29,21 +30,21 @@ static int bios_set_mode(struct mode_info *mi) | |||
29 | 30 | ||
30 | static int set_bios_mode(u8 mode) | 31 | static int set_bios_mode(u8 mode) |
31 | { | 32 | { |
32 | u16 ax; | 33 | struct biosregs ireg, oreg; |
33 | u8 new_mode; | 34 | u8 new_mode; |
34 | 35 | ||
35 | ax = mode; /* AH=0x00 Set Video Mode */ | 36 | initregs(&ireg); |
36 | asm volatile(INT10 | 37 | ireg.al = mode; /* AH=0x00 Set Video Mode */ |
37 | : "+a" (ax) | 38 | intcall(0x10, &ireg, NULL); |
38 | : : "ebx", "ecx", "edx", "esi", "edi"); | ||
39 | 39 | ||
40 | ax = 0x0f00; /* Get Current Video Mode */ | 40 | |
41 | asm volatile(INT10 | 41 | ireg.ah = 0x0f; /* Get Current Video Mode */ |
42 | : "+a" (ax) | 42 | intcall(0x10, &ireg, &oreg); |
43 | : : "ebx", "ecx", "edx", "esi", "edi"); | ||
44 | 43 | ||
45 | do_restore = 1; /* Assume video contents were lost */ | 44 | do_restore = 1; /* Assume video contents were lost */ |
46 | new_mode = ax & 0x7f; /* Not all BIOSes are clean with the top bit */ | 45 | |
46 | /* Not all BIOSes are clean with the top bit */ | ||
47 | new_mode = ireg.al & 0x7f; | ||
47 | 48 | ||
48 | if (new_mode == mode) | 49 | if (new_mode == mode) |
49 | return 0; /* Mode change OK */ | 50 | return 0; /* Mode change OK */ |
@@ -53,10 +54,8 @@ static int set_bios_mode(u8 mode) | |||
53 | /* Mode setting failed, but we didn't end up where we | 54 | /* Mode setting failed, but we didn't end up where we |
54 | started. That's bad. Try to revert to the original | 55 | started. That's bad. Try to revert to the original |
55 | video mode. */ | 56 | video mode. */ |
56 | ax = boot_params.screen_info.orig_video_mode; | 57 | ireg.ax = boot_params.screen_info.orig_video_mode; |
57 | asm volatile(INT10 | 58 | intcall(0x10, &ireg, NULL); |
58 | : "+a" (ax) | ||
59 | : : "ebx", "ecx", "edx", "esi", "edi"); | ||
60 | } | 59 | } |
61 | #endif | 60 | #endif |
62 | return -1; | 61 | return -1; |
diff --git a/arch/x86/boot/video-vesa.c b/arch/x86/boot/video-vesa.c index 4a58c8ce3f69..c700147d6ffb 100644 --- a/arch/x86/boot/video-vesa.c +++ b/arch/x86/boot/video-vesa.c | |||
@@ -2,6 +2,7 @@ | |||
2 | * | 2 | * |
3 | * Copyright (C) 1991, 1992 Linus Torvalds | 3 | * Copyright (C) 1991, 1992 Linus Torvalds |
4 | * Copyright 2007 rPath, Inc. - All Rights Reserved | 4 | * Copyright 2007 rPath, Inc. - All Rights Reserved |
5 | * Copyright 2009 Intel Corporation; author H. Peter Anvin | ||
5 | * | 6 | * |
6 | * This file is part of the Linux kernel, and is made available under | 7 | * This file is part of the Linux kernel, and is made available under |
7 | * the terms of the GNU General Public License version 2. | 8 | * the terms of the GNU General Public License version 2. |
@@ -31,7 +32,7 @@ static inline void vesa_store_mode_params_graphics(void) {} | |||
31 | static int vesa_probe(void) | 32 | static int vesa_probe(void) |
32 | { | 33 | { |
33 | #if defined(CONFIG_VIDEO_VESA) || defined(CONFIG_FIRMWARE_EDID) | 34 | #if defined(CONFIG_VIDEO_VESA) || defined(CONFIG_FIRMWARE_EDID) |
34 | u16 ax, cx, di; | 35 | struct biosregs ireg, oreg; |
35 | u16 mode; | 36 | u16 mode; |
36 | addr_t mode_ptr; | 37 | addr_t mode_ptr; |
37 | struct mode_info *mi; | 38 | struct mode_info *mi; |
@@ -39,13 +40,12 @@ static int vesa_probe(void) | |||
39 | 40 | ||
40 | video_vesa.modes = GET_HEAP(struct mode_info, 0); | 41 | video_vesa.modes = GET_HEAP(struct mode_info, 0); |
41 | 42 | ||
42 | ax = 0x4f00; | 43 | initregs(&ireg); |
43 | di = (size_t)&vginfo; | 44 | ireg.ax = 0x4f00; |
44 | asm(INT10 | 45 | ireg.di = (size_t)&vginfo; |
45 | : "+a" (ax), "+D" (di), "=m" (vginfo) | 46 | intcall(0x10, &ireg, &oreg); |
46 | : : "ebx", "ecx", "edx", "esi"); | ||
47 | 47 | ||
48 | if (ax != 0x004f || | 48 | if (ireg.ax != 0x004f || |
49 | vginfo.signature != VESA_MAGIC || | 49 | vginfo.signature != VESA_MAGIC || |
50 | vginfo.version < 0x0102) | 50 | vginfo.version < 0x0102) |
51 | return 0; /* Not present */ | 51 | return 0; /* Not present */ |
@@ -65,14 +65,12 @@ static int vesa_probe(void) | |||
65 | 65 | ||
66 | memset(&vminfo, 0, sizeof vminfo); /* Just in case... */ | 66 | memset(&vminfo, 0, sizeof vminfo); /* Just in case... */ |
67 | 67 | ||
68 | ax = 0x4f01; | 68 | ireg.ax = 0x4f01; |
69 | cx = mode; | 69 | ireg.cx = mode; |
70 | di = (size_t)&vminfo; | 70 | ireg.di = (size_t)&vminfo; |
71 | asm(INT10 | 71 | intcall(0x10, &ireg, &oreg); |
72 | : "+a" (ax), "+c" (cx), "+D" (di), "=m" (vminfo) | ||
73 | : : "ebx", "edx", "esi"); | ||
74 | 72 | ||
75 | if (ax != 0x004f) | 73 | if (ireg.ax != 0x004f) |
76 | continue; | 74 | continue; |
77 | 75 | ||
78 | if ((vminfo.mode_attr & 0x15) == 0x05) { | 76 | if ((vminfo.mode_attr & 0x15) == 0x05) { |
@@ -111,20 +109,19 @@ static int vesa_probe(void) | |||
111 | 109 | ||
112 | static int vesa_set_mode(struct mode_info *mode) | 110 | static int vesa_set_mode(struct mode_info *mode) |
113 | { | 111 | { |
114 | u16 ax, bx, cx, di; | 112 | struct biosregs ireg, oreg; |
115 | int is_graphic; | 113 | int is_graphic; |
116 | u16 vesa_mode = mode->mode - VIDEO_FIRST_VESA; | 114 | u16 vesa_mode = mode->mode - VIDEO_FIRST_VESA; |
117 | 115 | ||
118 | memset(&vminfo, 0, sizeof vminfo); /* Just in case... */ | 116 | memset(&vminfo, 0, sizeof vminfo); /* Just in case... */ |
119 | 117 | ||
120 | ax = 0x4f01; | 118 | initregs(&ireg); |
121 | cx = vesa_mode; | 119 | ireg.ax = 0x4f01; |
122 | di = (size_t)&vminfo; | 120 | ireg.cx = vesa_mode; |
123 | asm(INT10 | 121 | ireg.di = (size_t)&vminfo; |
124 | : "+a" (ax), "+c" (cx), "+D" (di), "=m" (vminfo) | 122 | intcall(0x10, &ireg, &oreg); |
125 | : : "ebx", "edx", "esi"); | ||
126 | 123 | ||
127 | if (ax != 0x004f) | 124 | if (oreg.ax != 0x004f) |
128 | return -1; | 125 | return -1; |
129 | 126 | ||
130 | if ((vminfo.mode_attr & 0x15) == 0x05) { | 127 | if ((vminfo.mode_attr & 0x15) == 0x05) { |
@@ -141,14 +138,12 @@ static int vesa_set_mode(struct mode_info *mode) | |||
141 | } | 138 | } |
142 | 139 | ||
143 | 140 | ||
144 | ax = 0x4f02; | 141 | initregs(&ireg); |
145 | bx = vesa_mode; | 142 | ireg.ax = 0x4f02; |
146 | di = 0; | 143 | ireg.bx = vesa_mode; |
147 | asm volatile(INT10 | 144 | intcall(0x10, &ireg, &oreg); |
148 | : "+a" (ax), "+b" (bx), "+D" (di) | ||
149 | : : "ecx", "edx", "esi"); | ||
150 | 145 | ||
151 | if (ax != 0x004f) | 146 | if (oreg.ax != 0x004f) |
152 | return -1; | 147 | return -1; |
153 | 148 | ||
154 | graphic_mode = is_graphic; | 149 | graphic_mode = is_graphic; |
@@ -171,50 +166,45 @@ static int vesa_set_mode(struct mode_info *mode) | |||
171 | /* Switch DAC to 8-bit mode */ | 166 | /* Switch DAC to 8-bit mode */ |
172 | static void vesa_dac_set_8bits(void) | 167 | static void vesa_dac_set_8bits(void) |
173 | { | 168 | { |
169 | struct biosregs ireg, oreg; | ||
174 | u8 dac_size = 6; | 170 | u8 dac_size = 6; |
175 | 171 | ||
176 | /* If possible, switch the DAC to 8-bit mode */ | 172 | /* If possible, switch the DAC to 8-bit mode */ |
177 | if (vginfo.capabilities & 1) { | 173 | if (vginfo.capabilities & 1) { |
178 | u16 ax, bx; | 174 | initregs(&ireg); |
179 | 175 | ireg.ax = 0x4f08; | |
180 | ax = 0x4f08; | 176 | ireg.bh = 0x08; |
181 | bx = 0x0800; | 177 | intcall(0x10, &ireg, &oreg); |
182 | asm volatile(INT10 | 178 | if (oreg.ax == 0x004f) |
183 | : "+a" (ax), "+b" (bx) | 179 | dac_size = oreg.bh; |
184 | : : "ecx", "edx", "esi", "edi"); | ||
185 | |||
186 | if (ax == 0x004f) | ||
187 | dac_size = bx >> 8; | ||
188 | } | 180 | } |
189 | 181 | ||
190 | /* Set the color sizes to the DAC size, and offsets to 0 */ | 182 | /* Set the color sizes to the DAC size, and offsets to 0 */ |
191 | boot_params.screen_info.red_size = dac_size; | 183 | boot_params.screen_info.red_size = dac_size; |
192 | boot_params.screen_info.green_size = dac_size; | 184 | boot_params.screen_info.green_size = dac_size; |
193 | boot_params.screen_info.blue_size = dac_size; | 185 | boot_params.screen_info.blue_size = dac_size; |
194 | boot_params.screen_info.rsvd_size = dac_size; | 186 | boot_params.screen_info.rsvd_size = dac_size; |
195 | 187 | ||
196 | boot_params.screen_info.red_pos = 0; | 188 | boot_params.screen_info.red_pos = 0; |
197 | boot_params.screen_info.green_pos = 0; | 189 | boot_params.screen_info.green_pos = 0; |
198 | boot_params.screen_info.blue_pos = 0; | 190 | boot_params.screen_info.blue_pos = 0; |
199 | boot_params.screen_info.rsvd_pos = 0; | 191 | boot_params.screen_info.rsvd_pos = 0; |
200 | } | 192 | } |
201 | 193 | ||
202 | /* Save the VESA protected mode info */ | 194 | /* Save the VESA protected mode info */ |
203 | static void vesa_store_pm_info(void) | 195 | static void vesa_store_pm_info(void) |
204 | { | 196 | { |
205 | u16 ax, bx, di, es; | 197 | struct biosregs ireg, oreg; |
206 | 198 | ||
207 | ax = 0x4f0a; | 199 | initregs(&ireg); |
208 | bx = di = 0; | 200 | ireg.ax = 0x4f0a; |
209 | asm("pushw %%es; "INT10"; movw %%es,%0; popw %%es" | 201 | intcall(0x10, &ireg, &oreg); |
210 | : "=d" (es), "+a" (ax), "+b" (bx), "+D" (di) | ||
211 | : : "ecx", "esi"); | ||
212 | 202 | ||
213 | if (ax != 0x004f) | 203 | if (oreg.ax != 0x004f) |
214 | return; | 204 | return; |
215 | 205 | ||
216 | boot_params.screen_info.vesapm_seg = es; | 206 | boot_params.screen_info.vesapm_seg = oreg.es; |
217 | boot_params.screen_info.vesapm_off = di; | 207 | boot_params.screen_info.vesapm_off = oreg.di; |
218 | } | 208 | } |
219 | 209 | ||
220 | /* | 210 | /* |
@@ -252,7 +242,7 @@ static void vesa_store_mode_params_graphics(void) | |||
252 | void vesa_store_edid(void) | 242 | void vesa_store_edid(void) |
253 | { | 243 | { |
254 | #ifdef CONFIG_FIRMWARE_EDID | 244 | #ifdef CONFIG_FIRMWARE_EDID |
255 | u16 ax, bx, cx, dx, di; | 245 | struct biosregs ireg, oreg; |
256 | 246 | ||
257 | /* Apparently used as a nonsense token... */ | 247 | /* Apparently used as a nonsense token... */ |
258 | memset(&boot_params.edid_info, 0x13, sizeof boot_params.edid_info); | 248 | memset(&boot_params.edid_info, 0x13, sizeof boot_params.edid_info); |
@@ -260,33 +250,26 @@ void vesa_store_edid(void) | |||
260 | if (vginfo.version < 0x0200) | 250 | if (vginfo.version < 0x0200) |
261 | return; /* EDID requires VBE 2.0+ */ | 251 | return; /* EDID requires VBE 2.0+ */ |
262 | 252 | ||
263 | ax = 0x4f15; /* VBE DDC */ | 253 | initregs(&ireg); |
264 | bx = 0x0000; /* Report DDC capabilities */ | 254 | ireg.ax = 0x4f15; /* VBE DDC */ |
265 | cx = 0; /* Controller 0 */ | 255 | /* ireg.bx = 0x0000; */ /* Report DDC capabilities */ |
266 | di = 0; /* ES:DI must be 0 by spec */ | 256 | /* ireg.cx = 0; */ /* Controller 0 */ |
267 | 257 | ireg.es = 0; /* ES:DI must be 0 by spec */ | |
268 | /* Note: The VBE DDC spec is different from the main VESA spec; | 258 | intcall(0x10, &ireg, &oreg); |
269 | we genuinely have to assume all registers are destroyed here. */ | ||
270 | |||
271 | asm("pushw %%es; movw %2,%%es; "INT10"; popw %%es" | ||
272 | : "+a" (ax), "+b" (bx), "+c" (cx), "+D" (di) | ||
273 | : : "esi", "edx"); | ||
274 | 259 | ||
275 | if (ax != 0x004f) | 260 | if (oreg.ax != 0x004f) |
276 | return; /* No EDID */ | 261 | return; /* No EDID */ |
277 | 262 | ||
278 | /* BH = time in seconds to transfer EDD information */ | 263 | /* BH = time in seconds to transfer EDD information */ |
279 | /* BL = DDC level supported */ | 264 | /* BL = DDC level supported */ |
280 | 265 | ||
281 | ax = 0x4f15; /* VBE DDC */ | 266 | ireg.ax = 0x4f15; /* VBE DDC */ |
282 | bx = 0x0001; /* Read EDID */ | 267 | ireg.bx = 0x0001; /* Read EDID */ |
283 | cx = 0; /* Controller 0 */ | 268 | /* ireg.cx = 0; */ /* Controller 0 */ |
284 | dx = 0; /* EDID block number */ | 269 | /* ireg.dx = 0; */ /* EDID block number */ |
285 | di =(size_t) &boot_params.edid_info; /* (ES:)Pointer to block */ | 270 | ireg.es = ds(); |
286 | asm(INT10 | 271 | ireg.di =(size_t)&boot_params.edid_info; /* (ES:)Pointer to block */ |
287 | : "+a" (ax), "+b" (bx), "+d" (dx), "=m" (boot_params.edid_info), | 272 | intcall(0x10, &ireg, &oreg); |
288 | "+c" (cx), "+D" (di) | ||
289 | : : "esi"); | ||
290 | #endif /* CONFIG_FIRMWARE_EDID */ | 273 | #endif /* CONFIG_FIRMWARE_EDID */ |
291 | } | 274 | } |
292 | 275 | ||
diff --git a/arch/x86/boot/video-vga.c b/arch/x86/boot/video-vga.c index 9e0587a37768..8f8d827e254d 100644 --- a/arch/x86/boot/video-vga.c +++ b/arch/x86/boot/video-vga.c | |||
@@ -2,6 +2,7 @@ | |||
2 | * | 2 | * |
3 | * Copyright (C) 1991, 1992 Linus Torvalds | 3 | * Copyright (C) 1991, 1992 Linus Torvalds |
4 | * Copyright 2007 rPath, Inc. - All Rights Reserved | 4 | * Copyright 2007 rPath, Inc. - All Rights Reserved |
5 | * Copyright 2009 Intel Corporation; author H. Peter Anvin | ||
5 | * | 6 | * |
6 | * This file is part of the Linux kernel, and is made available under | 7 | * This file is part of the Linux kernel, and is made available under |
7 | * the terms of the GNU General Public License version 2. | 8 | * the terms of the GNU General Public License version 2. |
@@ -39,30 +40,30 @@ static __videocard video_vga; | |||
39 | /* Set basic 80x25 mode */ | 40 | /* Set basic 80x25 mode */ |
40 | static u8 vga_set_basic_mode(void) | 41 | static u8 vga_set_basic_mode(void) |
41 | { | 42 | { |
43 | struct biosregs ireg, oreg; | ||
42 | u16 ax; | 44 | u16 ax; |
43 | u8 rows; | 45 | u8 rows; |
44 | u8 mode; | 46 | u8 mode; |
45 | 47 | ||
48 | initregs(&ireg); | ||
49 | |||
46 | #ifdef CONFIG_VIDEO_400_HACK | 50 | #ifdef CONFIG_VIDEO_400_HACK |
47 | if (adapter >= ADAPTER_VGA) { | 51 | if (adapter >= ADAPTER_VGA) { |
48 | asm volatile(INT10 | 52 | ireg.ax = 0x1202; |
49 | : : "a" (0x1202), "b" (0x0030) | 53 | ireg.bx = 0x0030; |
50 | : "ecx", "edx", "esi", "edi"); | 54 | intcall(0x10, &ireg, NULL); |
51 | } | 55 | } |
52 | #endif | 56 | #endif |
53 | 57 | ||
54 | ax = 0x0f00; | 58 | ax = 0x0f00; |
55 | asm volatile(INT10 | 59 | intcall(0x10, &ireg, &oreg); |
56 | : "+a" (ax) | 60 | mode = oreg.al; |
57 | : : "ebx", "ecx", "edx", "esi", "edi"); | ||
58 | |||
59 | mode = (u8)ax; | ||
60 | 61 | ||
61 | set_fs(0); | 62 | set_fs(0); |
62 | rows = rdfs8(0x484); /* rows minus one */ | 63 | rows = rdfs8(0x484); /* rows minus one */ |
63 | 64 | ||
64 | #ifndef CONFIG_VIDEO_400_HACK | 65 | #ifndef CONFIG_VIDEO_400_HACK |
65 | if ((ax == 0x5003 || ax == 0x5007) && | 66 | if ((oreg.ax == 0x5003 || oreg.ax == 0x5007) && |
66 | (rows == 0 || rows == 24)) | 67 | (rows == 0 || rows == 24)) |
67 | return mode; | 68 | return mode; |
68 | #endif | 69 | #endif |
@@ -71,10 +72,8 @@ static u8 vga_set_basic_mode(void) | |||
71 | mode = 3; | 72 | mode = 3; |
72 | 73 | ||
73 | /* Set the mode */ | 74 | /* Set the mode */ |
74 | ax = mode; | 75 | ireg.ax = mode; /* AH=0: set mode */ |
75 | asm volatile(INT10 | 76 | intcall(0x10, &ireg, NULL); |
76 | : "+a" (ax) | ||
77 | : : "ebx", "ecx", "edx", "esi", "edi"); | ||
78 | do_restore = 1; | 77 | do_restore = 1; |
79 | return mode; | 78 | return mode; |
80 | } | 79 | } |
@@ -82,43 +81,69 @@ static u8 vga_set_basic_mode(void) | |||
82 | static void vga_set_8font(void) | 81 | static void vga_set_8font(void) |
83 | { | 82 | { |
84 | /* Set 8x8 font - 80x43 on EGA, 80x50 on VGA */ | 83 | /* Set 8x8 font - 80x43 on EGA, 80x50 on VGA */ |
84 | struct biosregs ireg; | ||
85 | |||
86 | initregs(&ireg); | ||
85 | 87 | ||
86 | /* Set 8x8 font */ | 88 | /* Set 8x8 font */ |
87 | asm volatile(INT10 : : "a" (0x1112), "b" (0)); | 89 | ireg.ax = 0x1112; |
90 | /* ireg.bl = 0; */ | ||
91 | intcall(0x10, &ireg, NULL); | ||
88 | 92 | ||
89 | /* Use alternate print screen */ | 93 | /* Use alternate print screen */ |
90 | asm volatile(INT10 : : "a" (0x1200), "b" (0x20)); | 94 | ireg.ax = 0x1200; |
95 | ireg.bl = 0x20; | ||
96 | intcall(0x10, &ireg, NULL); | ||
91 | 97 | ||
92 | /* Turn off cursor emulation */ | 98 | /* Turn off cursor emulation */ |
93 | asm volatile(INT10 : : "a" (0x1201), "b" (0x34)); | 99 | ireg.ax = 0x1201; |
100 | ireg.bl = 0x34; | ||
101 | intcall(0x10, &ireg, NULL); | ||
94 | 102 | ||
95 | /* Cursor is scan lines 6-7 */ | 103 | /* Cursor is scan lines 6-7 */ |
96 | asm volatile(INT10 : : "a" (0x0100), "c" (0x0607)); | 104 | ireg.ax = 0x0100; |
105 | ireg.cx = 0x0607; | ||
106 | intcall(0x10, &ireg, NULL); | ||
97 | } | 107 | } |
98 | 108 | ||
99 | static void vga_set_14font(void) | 109 | static void vga_set_14font(void) |
100 | { | 110 | { |
101 | /* Set 9x14 font - 80x28 on VGA */ | 111 | /* Set 9x14 font - 80x28 on VGA */ |
112 | struct biosregs ireg; | ||
113 | |||
114 | initregs(&ireg); | ||
102 | 115 | ||
103 | /* Set 9x14 font */ | 116 | /* Set 9x14 font */ |
104 | asm volatile(INT10 : : "a" (0x1111), "b" (0)); | 117 | ireg.ax = 0x1111; |
118 | /* ireg.bl = 0; */ | ||
119 | intcall(0x10, &ireg, NULL); | ||
105 | 120 | ||
106 | /* Turn off cursor emulation */ | 121 | /* Turn off cursor emulation */ |
107 | asm volatile(INT10 : : "a" (0x1201), "b" (0x34)); | 122 | ireg.ax = 0x1201; |
123 | ireg.bl = 0x34; | ||
124 | intcall(0x10, &ireg, NULL); | ||
108 | 125 | ||
109 | /* Cursor is scan lines 11-12 */ | 126 | /* Cursor is scan lines 11-12 */ |
110 | asm volatile(INT10 : : "a" (0x0100), "c" (0x0b0c)); | 127 | ireg.ax = 0x0100; |
128 | ireg.cx = 0x0b0c; | ||
129 | intcall(0x10, &ireg, NULL); | ||
111 | } | 130 | } |
112 | 131 | ||
113 | static void vga_set_80x43(void) | 132 | static void vga_set_80x43(void) |
114 | { | 133 | { |
115 | /* Set 80x43 mode on VGA (not EGA) */ | 134 | /* Set 80x43 mode on VGA (not EGA) */ |
135 | struct biosregs ireg; | ||
136 | |||
137 | initregs(&ireg); | ||
116 | 138 | ||
117 | /* Set 350 scans */ | 139 | /* Set 350 scans */ |
118 | asm volatile(INT10 : : "a" (0x1201), "b" (0x30)); | 140 | ireg.ax = 0x1201; |
141 | ireg.bl = 0x30; | ||
142 | intcall(0x10, &ireg, NULL); | ||
119 | 143 | ||
120 | /* Reset video mode */ | 144 | /* Reset video mode */ |
121 | asm volatile(INT10 : : "a" (0x0003)); | 145 | ireg.ax = 0x0003; |
146 | intcall(0x10, &ireg, NULL); | ||
122 | 147 | ||
123 | vga_set_8font(); | 148 | vga_set_8font(); |
124 | } | 149 | } |
@@ -225,8 +250,6 @@ static int vga_set_mode(struct mode_info *mode) | |||
225 | */ | 250 | */ |
226 | static int vga_probe(void) | 251 | static int vga_probe(void) |
227 | { | 252 | { |
228 | u16 ega_bx; | ||
229 | |||
230 | static const char *card_name[] = { | 253 | static const char *card_name[] = { |
231 | "CGA/MDA/HGC", "EGA", "VGA" | 254 | "CGA/MDA/HGC", "EGA", "VGA" |
232 | }; | 255 | }; |
@@ -240,26 +263,26 @@ static int vga_probe(void) | |||
240 | sizeof(ega_modes)/sizeof(struct mode_info), | 263 | sizeof(ega_modes)/sizeof(struct mode_info), |
241 | sizeof(vga_modes)/sizeof(struct mode_info), | 264 | sizeof(vga_modes)/sizeof(struct mode_info), |
242 | }; | 265 | }; |
243 | u8 vga_flag; | ||
244 | 266 | ||
245 | asm(INT10 | 267 | struct biosregs ireg, oreg; |
246 | : "=b" (ega_bx) | 268 | |
247 | : "a" (0x1200), "b" (0x10) /* Check EGA/VGA */ | 269 | initregs(&ireg); |
248 | : "ecx", "edx", "esi", "edi"); | 270 | |
271 | ireg.ax = 0x1200; | ||
272 | ireg.bl = 0x10; /* Check EGA/VGA */ | ||
273 | intcall(0x10, &ireg, &oreg); | ||
249 | 274 | ||
250 | #ifndef _WAKEUP | 275 | #ifndef _WAKEUP |
251 | boot_params.screen_info.orig_video_ega_bx = ega_bx; | 276 | boot_params.screen_info.orig_video_ega_bx = oreg.bx; |
252 | #endif | 277 | #endif |
253 | 278 | ||
254 | /* If we have MDA/CGA/HGC then BL will be unchanged at 0x10 */ | 279 | /* If we have MDA/CGA/HGC then BL will be unchanged at 0x10 */ |
255 | if ((u8)ega_bx != 0x10) { | 280 | if (oreg.bl != 0x10) { |
256 | /* EGA/VGA */ | 281 | /* EGA/VGA */ |
257 | asm(INT10 | 282 | ireg.ax = 0x1a00; |
258 | : "=a" (vga_flag) | 283 | intcall(0x10, &ireg, &oreg); |
259 | : "a" (0x1a00) | ||
260 | : "ebx", "ecx", "edx", "esi", "edi"); | ||
261 | 284 | ||
262 | if (vga_flag == 0x1a) { | 285 | if (oreg.al == 0x1a) { |
263 | adapter = ADAPTER_VGA; | 286 | adapter = ADAPTER_VGA; |
264 | #ifndef _WAKEUP | 287 | #ifndef _WAKEUP |
265 | boot_params.screen_info.orig_video_isVGA = 1; | 288 | boot_params.screen_info.orig_video_isVGA = 1; |
diff --git a/arch/x86/boot/video.c b/arch/x86/boot/video.c index 3bef2c1febe9..bad728b76fc2 100644 --- a/arch/x86/boot/video.c +++ b/arch/x86/boot/video.c | |||
@@ -2,6 +2,7 @@ | |||
2 | * | 2 | * |
3 | * Copyright (C) 1991, 1992 Linus Torvalds | 3 | * Copyright (C) 1991, 1992 Linus Torvalds |
4 | * Copyright 2007 rPath, Inc. - All Rights Reserved | 4 | * Copyright 2007 rPath, Inc. - All Rights Reserved |
5 | * Copyright 2009 Intel Corporation; author H. Peter Anvin | ||
5 | * | 6 | * |
6 | * This file is part of the Linux kernel, and is made available under | 7 | * This file is part of the Linux kernel, and is made available under |
7 | * the terms of the GNU General Public License version 2. | 8 | * the terms of the GNU General Public License version 2. |
@@ -18,33 +19,29 @@ | |||
18 | 19 | ||
19 | static void store_cursor_position(void) | 20 | static void store_cursor_position(void) |
20 | { | 21 | { |
21 | u16 curpos; | 22 | struct biosregs ireg, oreg; |
22 | u16 ax, bx; | ||
23 | 23 | ||
24 | ax = 0x0300; | 24 | initregs(&ireg); |
25 | bx = 0; | 25 | ireg.ah = 0x03; |
26 | asm(INT10 | 26 | intcall(0x10, &ireg, &oreg); |
27 | : "=d" (curpos), "+a" (ax), "+b" (bx) | ||
28 | : : "ecx", "esi", "edi"); | ||
29 | 27 | ||
30 | boot_params.screen_info.orig_x = curpos; | 28 | boot_params.screen_info.orig_x = oreg.dl; |
31 | boot_params.screen_info.orig_y = curpos >> 8; | 29 | boot_params.screen_info.orig_y = oreg.dh; |
32 | } | 30 | } |
33 | 31 | ||
34 | static void store_video_mode(void) | 32 | static void store_video_mode(void) |
35 | { | 33 | { |
36 | u16 ax, page; | 34 | struct biosregs ireg, oreg; |
37 | 35 | ||
38 | /* N.B.: the saving of the video page here is a bit silly, | 36 | /* N.B.: the saving of the video page here is a bit silly, |
39 | since we pretty much assume page 0 everywhere. */ | 37 | since we pretty much assume page 0 everywhere. */ |
40 | ax = 0x0f00; | 38 | initregs(&ireg); |
41 | asm(INT10 | 39 | ireg.ah = 0x0f; |
42 | : "+a" (ax), "=b" (page) | 40 | intcall(0x10, &ireg, &oreg); |
43 | : : "ecx", "edx", "esi", "edi"); | ||
44 | 41 | ||
45 | /* Not all BIOSes are clean with respect to the top bit */ | 42 | /* Not all BIOSes are clean with respect to the top bit */ |
46 | boot_params.screen_info.orig_video_mode = ax & 0x7f; | 43 | boot_params.screen_info.orig_video_mode = oreg.al & 0x7f; |
47 | boot_params.screen_info.orig_video_page = page >> 8; | 44 | boot_params.screen_info.orig_video_page = oreg.bh; |
48 | } | 45 | } |
49 | 46 | ||
50 | /* | 47 | /* |
@@ -257,7 +254,7 @@ static void restore_screen(void) | |||
257 | int y; | 254 | int y; |
258 | addr_t dst = 0; | 255 | addr_t dst = 0; |
259 | u16 *src = saved.data; | 256 | u16 *src = saved.data; |
260 | u16 ax, bx, dx; | 257 | struct biosregs ireg; |
261 | 258 | ||
262 | if (graphic_mode) | 259 | if (graphic_mode) |
263 | return; /* Can't restore onto a graphic mode */ | 260 | return; /* Can't restore onto a graphic mode */ |
@@ -296,12 +293,11 @@ static void restore_screen(void) | |||
296 | } | 293 | } |
297 | 294 | ||
298 | /* Restore cursor position */ | 295 | /* Restore cursor position */ |
299 | ax = 0x0200; /* Set cursor position */ | 296 | initregs(&ireg); |
300 | bx = 0; /* Page number (<< 8) */ | 297 | ireg.ah = 0x02; /* Set cursor position */ |
301 | dx = (saved.cury << 8)+saved.curx; | 298 | ireg.dh = saved.cury; |
302 | asm volatile(INT10 | 299 | ireg.dl = saved.curx; |
303 | : "+a" (ax), "+b" (bx), "+d" (dx) | 300 | intcall(0x10, &ireg, NULL); |
304 | : : "ecx", "esi", "edi"); | ||
305 | } | 301 | } |
306 | #else | 302 | #else |
307 | #define save_screen() ((void)0) | 303 | #define save_screen() ((void)0) |
diff --git a/arch/x86/boot/video.h b/arch/x86/boot/video.h index ee63f5d14461..5bb174a997fc 100644 --- a/arch/x86/boot/video.h +++ b/arch/x86/boot/video.h | |||
@@ -112,20 +112,6 @@ extern int force_x, force_y; /* Don't query the BIOS for cols/rows */ | |||
112 | extern int do_restore; /* Restore screen contents */ | 112 | extern int do_restore; /* Restore screen contents */ |
113 | extern int graphic_mode; /* Graphics mode with linear frame buffer */ | 113 | extern int graphic_mode; /* Graphics mode with linear frame buffer */ |
114 | 114 | ||
115 | /* | ||
116 | * int $0x10 is notorious for touching registers it shouldn't. | ||
117 | * gcc doesn't like %ebp being clobbered, so define it as a push/pop | ||
118 | * sequence here. | ||
119 | * | ||
120 | * A number of systems, including the original PC can clobber %bp in | ||
121 | * certain circumstances, like when scrolling. There exists at least | ||
122 | * one Trident video card which could clobber DS under a set of | ||
123 | * circumstances that we are unlikely to encounter (scrolling when | ||
124 | * using an extended graphics mode of more than 800x600 pixels), but | ||
125 | * it's cheap insurance to deal with that here. | ||
126 | */ | ||
127 | #define INT10 "pushl %%ebp; pushw %%ds; int $0x10; popw %%ds; popl %%ebp" | ||
128 | |||
129 | /* Accessing VGA indexed registers */ | 115 | /* Accessing VGA indexed registers */ |
130 | static inline u8 in_idx(u16 port, u8 index) | 116 | static inline u8 in_idx(u16 port, u8 index) |
131 | { | 117 | { |
diff --git a/arch/x86/configs/i386_defconfig b/arch/x86/configs/i386_defconfig index 235b81d0f6f2..edb992ebef92 100644 --- a/arch/x86/configs/i386_defconfig +++ b/arch/x86/configs/i386_defconfig | |||
@@ -1,12 +1,13 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.29-rc4 | 3 | # Linux kernel version: 2.6.30-rc2 |
4 | # Tue Feb 24 15:50:58 2009 | 4 | # Mon May 11 16:21:55 2009 |
5 | # | 5 | # |
6 | # CONFIG_64BIT is not set | 6 | # CONFIG_64BIT is not set |
7 | CONFIG_X86_32=y | 7 | CONFIG_X86_32=y |
8 | # CONFIG_X86_64 is not set | 8 | # CONFIG_X86_64 is not set |
9 | CONFIG_X86=y | 9 | CONFIG_X86=y |
10 | CONFIG_OUTPUT_FORMAT="elf32-i386" | ||
10 | CONFIG_ARCH_DEFCONFIG="arch/x86/configs/i386_defconfig" | 11 | CONFIG_ARCH_DEFCONFIG="arch/x86/configs/i386_defconfig" |
11 | CONFIG_GENERIC_TIME=y | 12 | CONFIG_GENERIC_TIME=y |
12 | CONFIG_GENERIC_CMOS_UPDATE=y | 13 | CONFIG_GENERIC_CMOS_UPDATE=y |
@@ -33,6 +34,7 @@ CONFIG_ARCH_HAS_CPU_RELAX=y | |||
33 | CONFIG_ARCH_HAS_DEFAULT_IDLE=y | 34 | CONFIG_ARCH_HAS_DEFAULT_IDLE=y |
34 | CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y | 35 | CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y |
35 | CONFIG_HAVE_SETUP_PER_CPU_AREA=y | 36 | CONFIG_HAVE_SETUP_PER_CPU_AREA=y |
37 | CONFIG_HAVE_DYNAMIC_PER_CPU_AREA=y | ||
36 | # CONFIG_HAVE_CPUMASK_OF_CPU_MAP is not set | 38 | # CONFIG_HAVE_CPUMASK_OF_CPU_MAP is not set |
37 | CONFIG_ARCH_HIBERNATION_POSSIBLE=y | 39 | CONFIG_ARCH_HIBERNATION_POSSIBLE=y |
38 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | 40 | CONFIG_ARCH_SUSPEND_POSSIBLE=y |
@@ -40,15 +42,16 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y | |||
40 | CONFIG_ARCH_POPULATES_NODE_MAP=y | 42 | CONFIG_ARCH_POPULATES_NODE_MAP=y |
41 | # CONFIG_AUDIT_ARCH is not set | 43 | # CONFIG_AUDIT_ARCH is not set |
42 | CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y | 44 | CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y |
45 | CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y | ||
43 | CONFIG_GENERIC_HARDIRQS=y | 46 | CONFIG_GENERIC_HARDIRQS=y |
47 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
44 | CONFIG_GENERIC_IRQ_PROBE=y | 48 | CONFIG_GENERIC_IRQ_PROBE=y |
45 | CONFIG_GENERIC_PENDING_IRQ=y | 49 | CONFIG_GENERIC_PENDING_IRQ=y |
46 | CONFIG_X86_SMP=y | ||
47 | CONFIG_USE_GENERIC_SMP_HELPERS=y | 50 | CONFIG_USE_GENERIC_SMP_HELPERS=y |
48 | CONFIG_X86_32_SMP=y | 51 | CONFIG_X86_32_SMP=y |
49 | CONFIG_X86_HT=y | 52 | CONFIG_X86_HT=y |
50 | CONFIG_X86_BIOS_REBOOT=y | ||
51 | CONFIG_X86_TRAMPOLINE=y | 53 | CONFIG_X86_TRAMPOLINE=y |
54 | CONFIG_X86_32_LAZY_GS=y | ||
52 | CONFIG_KTIME_SCALAR=y | 55 | CONFIG_KTIME_SCALAR=y |
53 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 56 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
54 | 57 | ||
@@ -60,10 +63,17 @@ CONFIG_LOCK_KERNEL=y | |||
60 | CONFIG_INIT_ENV_ARG_LIMIT=32 | 63 | CONFIG_INIT_ENV_ARG_LIMIT=32 |
61 | CONFIG_LOCALVERSION="" | 64 | CONFIG_LOCALVERSION="" |
62 | # CONFIG_LOCALVERSION_AUTO is not set | 65 | # CONFIG_LOCALVERSION_AUTO is not set |
66 | CONFIG_HAVE_KERNEL_GZIP=y | ||
67 | CONFIG_HAVE_KERNEL_BZIP2=y | ||
68 | CONFIG_HAVE_KERNEL_LZMA=y | ||
69 | CONFIG_KERNEL_GZIP=y | ||
70 | # CONFIG_KERNEL_BZIP2 is not set | ||
71 | # CONFIG_KERNEL_LZMA is not set | ||
63 | CONFIG_SWAP=y | 72 | CONFIG_SWAP=y |
64 | CONFIG_SYSVIPC=y | 73 | CONFIG_SYSVIPC=y |
65 | CONFIG_SYSVIPC_SYSCTL=y | 74 | CONFIG_SYSVIPC_SYSCTL=y |
66 | CONFIG_POSIX_MQUEUE=y | 75 | CONFIG_POSIX_MQUEUE=y |
76 | CONFIG_POSIX_MQUEUE_SYSCTL=y | ||
67 | CONFIG_BSD_PROCESS_ACCT=y | 77 | CONFIG_BSD_PROCESS_ACCT=y |
68 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set | 78 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set |
69 | CONFIG_TASKSTATS=y | 79 | CONFIG_TASKSTATS=y |
@@ -113,23 +123,26 @@ CONFIG_PID_NS=y | |||
113 | CONFIG_NET_NS=y | 123 | CONFIG_NET_NS=y |
114 | CONFIG_BLK_DEV_INITRD=y | 124 | CONFIG_BLK_DEV_INITRD=y |
115 | CONFIG_INITRAMFS_SOURCE="" | 125 | CONFIG_INITRAMFS_SOURCE="" |
126 | CONFIG_RD_GZIP=y | ||
127 | CONFIG_RD_BZIP2=y | ||
128 | CONFIG_RD_LZMA=y | ||
116 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | 129 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y |
117 | CONFIG_SYSCTL=y | 130 | CONFIG_SYSCTL=y |
131 | CONFIG_ANON_INODES=y | ||
118 | # CONFIG_EMBEDDED is not set | 132 | # CONFIG_EMBEDDED is not set |
119 | CONFIG_UID16=y | 133 | CONFIG_UID16=y |
120 | CONFIG_SYSCTL_SYSCALL=y | 134 | CONFIG_SYSCTL_SYSCALL=y |
121 | CONFIG_KALLSYMS=y | 135 | CONFIG_KALLSYMS=y |
122 | CONFIG_KALLSYMS_ALL=y | 136 | CONFIG_KALLSYMS_ALL=y |
123 | CONFIG_KALLSYMS_EXTRA_PASS=y | 137 | CONFIG_KALLSYMS_EXTRA_PASS=y |
138 | # CONFIG_STRIP_ASM_SYMS is not set | ||
124 | CONFIG_HOTPLUG=y | 139 | CONFIG_HOTPLUG=y |
125 | CONFIG_PRINTK=y | 140 | CONFIG_PRINTK=y |
126 | CONFIG_BUG=y | 141 | CONFIG_BUG=y |
127 | CONFIG_ELF_CORE=y | 142 | CONFIG_ELF_CORE=y |
128 | CONFIG_PCSPKR_PLATFORM=y | 143 | CONFIG_PCSPKR_PLATFORM=y |
129 | # CONFIG_COMPAT_BRK is not set | ||
130 | CONFIG_BASE_FULL=y | 144 | CONFIG_BASE_FULL=y |
131 | CONFIG_FUTEX=y | 145 | CONFIG_FUTEX=y |
132 | CONFIG_ANON_INODES=y | ||
133 | CONFIG_EPOLL=y | 146 | CONFIG_EPOLL=y |
134 | CONFIG_SIGNALFD=y | 147 | CONFIG_SIGNALFD=y |
135 | CONFIG_TIMERFD=y | 148 | CONFIG_TIMERFD=y |
@@ -139,6 +152,7 @@ CONFIG_AIO=y | |||
139 | CONFIG_VM_EVENT_COUNTERS=y | 152 | CONFIG_VM_EVENT_COUNTERS=y |
140 | CONFIG_PCI_QUIRKS=y | 153 | CONFIG_PCI_QUIRKS=y |
141 | CONFIG_SLUB_DEBUG=y | 154 | CONFIG_SLUB_DEBUG=y |
155 | # CONFIG_COMPAT_BRK is not set | ||
142 | # CONFIG_SLAB is not set | 156 | # CONFIG_SLAB is not set |
143 | CONFIG_SLUB=y | 157 | CONFIG_SLUB=y |
144 | # CONFIG_SLOB is not set | 158 | # CONFIG_SLOB is not set |
@@ -154,6 +168,8 @@ CONFIG_HAVE_IOREMAP_PROT=y | |||
154 | CONFIG_HAVE_KPROBES=y | 168 | CONFIG_HAVE_KPROBES=y |
155 | CONFIG_HAVE_KRETPROBES=y | 169 | CONFIG_HAVE_KRETPROBES=y |
156 | CONFIG_HAVE_ARCH_TRACEHOOK=y | 170 | CONFIG_HAVE_ARCH_TRACEHOOK=y |
171 | CONFIG_HAVE_DMA_API_DEBUG=y | ||
172 | # CONFIG_SLOW_WORK is not set | ||
157 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | 173 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y |
158 | CONFIG_SLABINFO=y | 174 | CONFIG_SLABINFO=y |
159 | CONFIG_RT_MUTEXES=y | 175 | CONFIG_RT_MUTEXES=y |
@@ -167,7 +183,6 @@ CONFIG_MODULE_FORCE_UNLOAD=y | |||
167 | CONFIG_STOP_MACHINE=y | 183 | CONFIG_STOP_MACHINE=y |
168 | CONFIG_BLOCK=y | 184 | CONFIG_BLOCK=y |
169 | # CONFIG_LBD is not set | 185 | # CONFIG_LBD is not set |
170 | CONFIG_BLK_DEV_IO_TRACE=y | ||
171 | CONFIG_BLK_DEV_BSG=y | 186 | CONFIG_BLK_DEV_BSG=y |
172 | # CONFIG_BLK_DEV_INTEGRITY is not set | 187 | # CONFIG_BLK_DEV_INTEGRITY is not set |
173 | 188 | ||
@@ -194,12 +209,12 @@ CONFIG_HIGH_RES_TIMERS=y | |||
194 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | 209 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y |
195 | CONFIG_SMP=y | 210 | CONFIG_SMP=y |
196 | CONFIG_SPARSE_IRQ=y | 211 | CONFIG_SPARSE_IRQ=y |
197 | CONFIG_X86_FIND_SMP_CONFIG=y | ||
198 | CONFIG_X86_MPPARSE=y | 212 | CONFIG_X86_MPPARSE=y |
213 | # CONFIG_X86_BIGSMP is not set | ||
214 | CONFIG_X86_EXTENDED_PLATFORM=y | ||
199 | # CONFIG_X86_ELAN is not set | 215 | # CONFIG_X86_ELAN is not set |
200 | # CONFIG_X86_GENERICARCH is not set | ||
201 | # CONFIG_X86_VSMP is not set | ||
202 | # CONFIG_X86_RDC321X is not set | 216 | # CONFIG_X86_RDC321X is not set |
217 | # CONFIG_X86_32_NON_STANDARD is not set | ||
203 | CONFIG_SCHED_OMIT_FRAME_POINTER=y | 218 | CONFIG_SCHED_OMIT_FRAME_POINTER=y |
204 | # CONFIG_PARAVIRT_GUEST is not set | 219 | # CONFIG_PARAVIRT_GUEST is not set |
205 | # CONFIG_MEMTEST is not set | 220 | # CONFIG_MEMTEST is not set |
@@ -230,8 +245,10 @@ CONFIG_M686=y | |||
230 | # CONFIG_GENERIC_CPU is not set | 245 | # CONFIG_GENERIC_CPU is not set |
231 | CONFIG_X86_GENERIC=y | 246 | CONFIG_X86_GENERIC=y |
232 | CONFIG_X86_CPU=y | 247 | CONFIG_X86_CPU=y |
248 | CONFIG_X86_L1_CACHE_BYTES=64 | ||
249 | CONFIG_X86_INTERNODE_CACHE_BYTES=64 | ||
233 | CONFIG_X86_CMPXCHG=y | 250 | CONFIG_X86_CMPXCHG=y |
234 | CONFIG_X86_L1_CACHE_SHIFT=7 | 251 | CONFIG_X86_L1_CACHE_SHIFT=5 |
235 | CONFIG_X86_XADD=y | 252 | CONFIG_X86_XADD=y |
236 | # CONFIG_X86_PPRO_FENCE is not set | 253 | # CONFIG_X86_PPRO_FENCE is not set |
237 | CONFIG_X86_WP_WORKS_OK=y | 254 | CONFIG_X86_WP_WORKS_OK=y |
@@ -247,7 +264,7 @@ CONFIG_X86_DEBUGCTLMSR=y | |||
247 | CONFIG_CPU_SUP_INTEL=y | 264 | CONFIG_CPU_SUP_INTEL=y |
248 | CONFIG_CPU_SUP_CYRIX_32=y | 265 | CONFIG_CPU_SUP_CYRIX_32=y |
249 | CONFIG_CPU_SUP_AMD=y | 266 | CONFIG_CPU_SUP_AMD=y |
250 | CONFIG_CPU_SUP_CENTAUR_32=y | 267 | CONFIG_CPU_SUP_CENTAUR=y |
251 | CONFIG_CPU_SUP_TRANSMETA_32=y | 268 | CONFIG_CPU_SUP_TRANSMETA_32=y |
252 | CONFIG_CPU_SUP_UMC_32=y | 269 | CONFIG_CPU_SUP_UMC_32=y |
253 | CONFIG_X86_DS=y | 270 | CONFIG_X86_DS=y |
@@ -279,6 +296,7 @@ CONFIG_MICROCODE_AMD=y | |||
279 | CONFIG_MICROCODE_OLD_INTERFACE=y | 296 | CONFIG_MICROCODE_OLD_INTERFACE=y |
280 | CONFIG_X86_MSR=y | 297 | CONFIG_X86_MSR=y |
281 | CONFIG_X86_CPUID=y | 298 | CONFIG_X86_CPUID=y |
299 | # CONFIG_X86_CPU_DEBUG is not set | ||
282 | # CONFIG_NOHIGHMEM is not set | 300 | # CONFIG_NOHIGHMEM is not set |
283 | CONFIG_HIGHMEM4G=y | 301 | CONFIG_HIGHMEM4G=y |
284 | # CONFIG_HIGHMEM64G is not set | 302 | # CONFIG_HIGHMEM64G is not set |
@@ -302,6 +320,8 @@ CONFIG_ZONE_DMA_FLAG=1 | |||
302 | CONFIG_BOUNCE=y | 320 | CONFIG_BOUNCE=y |
303 | CONFIG_VIRT_TO_BUS=y | 321 | CONFIG_VIRT_TO_BUS=y |
304 | CONFIG_UNEVICTABLE_LRU=y | 322 | CONFIG_UNEVICTABLE_LRU=y |
323 | CONFIG_HAVE_MLOCK=y | ||
324 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
305 | CONFIG_HIGHPTE=y | 325 | CONFIG_HIGHPTE=y |
306 | CONFIG_X86_CHECK_BIOS_CORRUPTION=y | 326 | CONFIG_X86_CHECK_BIOS_CORRUPTION=y |
307 | CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y | 327 | CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y |
@@ -312,6 +332,7 @@ CONFIG_MTRR=y | |||
312 | CONFIG_X86_PAT=y | 332 | CONFIG_X86_PAT=y |
313 | CONFIG_EFI=y | 333 | CONFIG_EFI=y |
314 | CONFIG_SECCOMP=y | 334 | CONFIG_SECCOMP=y |
335 | # CONFIG_CC_STACKPROTECTOR is not set | ||
315 | # CONFIG_HZ_100 is not set | 336 | # CONFIG_HZ_100 is not set |
316 | # CONFIG_HZ_250 is not set | 337 | # CONFIG_HZ_250 is not set |
317 | # CONFIG_HZ_300 is not set | 338 | # CONFIG_HZ_300 is not set |
@@ -322,8 +343,9 @@ CONFIG_KEXEC=y | |||
322 | CONFIG_CRASH_DUMP=y | 343 | CONFIG_CRASH_DUMP=y |
323 | # CONFIG_KEXEC_JUMP is not set | 344 | # CONFIG_KEXEC_JUMP is not set |
324 | CONFIG_PHYSICAL_START=0x1000000 | 345 | CONFIG_PHYSICAL_START=0x1000000 |
325 | # CONFIG_RELOCATABLE is not set | 346 | CONFIG_RELOCATABLE=y |
326 | CONFIG_PHYSICAL_ALIGN=0x200000 | 347 | CONFIG_X86_NEED_RELOCS=y |
348 | CONFIG_PHYSICAL_ALIGN=0x1000000 | ||
327 | CONFIG_HOTPLUG_CPU=y | 349 | CONFIG_HOTPLUG_CPU=y |
328 | # CONFIG_COMPAT_VDSO is not set | 350 | # CONFIG_COMPAT_VDSO is not set |
329 | # CONFIG_CMDLINE_BOOL is not set | 351 | # CONFIG_CMDLINE_BOOL is not set |
@@ -363,7 +385,6 @@ CONFIG_ACPI_THERMAL=y | |||
363 | CONFIG_ACPI_BLACKLIST_YEAR=0 | 385 | CONFIG_ACPI_BLACKLIST_YEAR=0 |
364 | # CONFIG_ACPI_DEBUG is not set | 386 | # CONFIG_ACPI_DEBUG is not set |
365 | # CONFIG_ACPI_PCI_SLOT is not set | 387 | # CONFIG_ACPI_PCI_SLOT is not set |
366 | CONFIG_ACPI_SYSTEM=y | ||
367 | CONFIG_X86_PM_TIMER=y | 388 | CONFIG_X86_PM_TIMER=y |
368 | CONFIG_ACPI_CONTAINER=y | 389 | CONFIG_ACPI_CONTAINER=y |
369 | # CONFIG_ACPI_SBS is not set | 390 | # CONFIG_ACPI_SBS is not set |
@@ -425,6 +446,7 @@ CONFIG_PCI_BIOS=y | |||
425 | CONFIG_PCI_DIRECT=y | 446 | CONFIG_PCI_DIRECT=y |
426 | CONFIG_PCI_MMCONFIG=y | 447 | CONFIG_PCI_MMCONFIG=y |
427 | CONFIG_PCI_DOMAINS=y | 448 | CONFIG_PCI_DOMAINS=y |
449 | # CONFIG_DMAR is not set | ||
428 | CONFIG_PCIEPORTBUS=y | 450 | CONFIG_PCIEPORTBUS=y |
429 | # CONFIG_HOTPLUG_PCI_PCIE is not set | 451 | # CONFIG_HOTPLUG_PCI_PCIE is not set |
430 | CONFIG_PCIEAER=y | 452 | CONFIG_PCIEAER=y |
@@ -435,6 +457,7 @@ CONFIG_PCI_MSI=y | |||
435 | # CONFIG_PCI_DEBUG is not set | 457 | # CONFIG_PCI_DEBUG is not set |
436 | # CONFIG_PCI_STUB is not set | 458 | # CONFIG_PCI_STUB is not set |
437 | CONFIG_HT_IRQ=y | 459 | CONFIG_HT_IRQ=y |
460 | # CONFIG_PCI_IOV is not set | ||
438 | CONFIG_ISA_DMA_API=y | 461 | CONFIG_ISA_DMA_API=y |
439 | # CONFIG_ISA is not set | 462 | # CONFIG_ISA is not set |
440 | # CONFIG_MCA is not set | 463 | # CONFIG_MCA is not set |
@@ -481,7 +504,6 @@ CONFIG_NET=y | |||
481 | # | 504 | # |
482 | # Networking options | 505 | # Networking options |
483 | # | 506 | # |
484 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
485 | CONFIG_PACKET=y | 507 | CONFIG_PACKET=y |
486 | CONFIG_PACKET_MMAP=y | 508 | CONFIG_PACKET_MMAP=y |
487 | CONFIG_UNIX=y | 509 | CONFIG_UNIX=y |
@@ -639,6 +661,7 @@ CONFIG_LLC=y | |||
639 | # CONFIG_LAPB is not set | 661 | # CONFIG_LAPB is not set |
640 | # CONFIG_ECONET is not set | 662 | # CONFIG_ECONET is not set |
641 | # CONFIG_WAN_ROUTER is not set | 663 | # CONFIG_WAN_ROUTER is not set |
664 | # CONFIG_PHONET is not set | ||
642 | CONFIG_NET_SCHED=y | 665 | CONFIG_NET_SCHED=y |
643 | 666 | ||
644 | # | 667 | # |
@@ -696,6 +719,7 @@ CONFIG_NET_SCH_FIFO=y | |||
696 | # | 719 | # |
697 | # CONFIG_NET_PKTGEN is not set | 720 | # CONFIG_NET_PKTGEN is not set |
698 | # CONFIG_NET_TCPPROBE is not set | 721 | # CONFIG_NET_TCPPROBE is not set |
722 | # CONFIG_NET_DROP_MONITOR is not set | ||
699 | CONFIG_HAMRADIO=y | 723 | CONFIG_HAMRADIO=y |
700 | 724 | ||
701 | # | 725 | # |
@@ -706,12 +730,10 @@ CONFIG_HAMRADIO=y | |||
706 | # CONFIG_IRDA is not set | 730 | # CONFIG_IRDA is not set |
707 | # CONFIG_BT is not set | 731 | # CONFIG_BT is not set |
708 | # CONFIG_AF_RXRPC is not set | 732 | # CONFIG_AF_RXRPC is not set |
709 | # CONFIG_PHONET is not set | ||
710 | CONFIG_FIB_RULES=y | 733 | CONFIG_FIB_RULES=y |
711 | CONFIG_WIRELESS=y | 734 | CONFIG_WIRELESS=y |
712 | CONFIG_CFG80211=y | 735 | CONFIG_CFG80211=y |
713 | # CONFIG_CFG80211_REG_DEBUG is not set | 736 | # CONFIG_CFG80211_REG_DEBUG is not set |
714 | CONFIG_NL80211=y | ||
715 | CONFIG_WIRELESS_OLD_REGULATORY=y | 737 | CONFIG_WIRELESS_OLD_REGULATORY=y |
716 | CONFIG_WIRELESS_EXT=y | 738 | CONFIG_WIRELESS_EXT=y |
717 | CONFIG_WIRELESS_EXT_SYSFS=y | 739 | CONFIG_WIRELESS_EXT_SYSFS=y |
@@ -789,6 +811,7 @@ CONFIG_MISC_DEVICES=y | |||
789 | # CONFIG_ICS932S401 is not set | 811 | # CONFIG_ICS932S401 is not set |
790 | # CONFIG_ENCLOSURE_SERVICES is not set | 812 | # CONFIG_ENCLOSURE_SERVICES is not set |
791 | # CONFIG_HP_ILO is not set | 813 | # CONFIG_HP_ILO is not set |
814 | # CONFIG_ISL29003 is not set | ||
792 | # CONFIG_C2PORT is not set | 815 | # CONFIG_C2PORT is not set |
793 | 816 | ||
794 | # | 817 | # |
@@ -842,6 +865,7 @@ CONFIG_SCSI_SPI_ATTRS=y | |||
842 | # CONFIG_SCSI_LOWLEVEL is not set | 865 | # CONFIG_SCSI_LOWLEVEL is not set |
843 | # CONFIG_SCSI_LOWLEVEL_PCMCIA is not set | 866 | # CONFIG_SCSI_LOWLEVEL_PCMCIA is not set |
844 | # CONFIG_SCSI_DH is not set | 867 | # CONFIG_SCSI_DH is not set |
868 | # CONFIG_SCSI_OSD_INITIATOR is not set | ||
845 | CONFIG_ATA=y | 869 | CONFIG_ATA=y |
846 | # CONFIG_ATA_NONSTANDARD is not set | 870 | # CONFIG_ATA_NONSTANDARD is not set |
847 | CONFIG_ATA_ACPI=y | 871 | CONFIG_ATA_ACPI=y |
@@ -940,6 +964,7 @@ CONFIG_DM_ZERO=y | |||
940 | CONFIG_MACINTOSH_DRIVERS=y | 964 | CONFIG_MACINTOSH_DRIVERS=y |
941 | CONFIG_MAC_EMUMOUSEBTN=y | 965 | CONFIG_MAC_EMUMOUSEBTN=y |
942 | CONFIG_NETDEVICES=y | 966 | CONFIG_NETDEVICES=y |
967 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
943 | # CONFIG_IFB is not set | 968 | # CONFIG_IFB is not set |
944 | # CONFIG_DUMMY is not set | 969 | # CONFIG_DUMMY is not set |
945 | # CONFIG_BONDING is not set | 970 | # CONFIG_BONDING is not set |
@@ -977,6 +1002,8 @@ CONFIG_MII=y | |||
977 | CONFIG_NET_VENDOR_3COM=y | 1002 | CONFIG_NET_VENDOR_3COM=y |
978 | # CONFIG_VORTEX is not set | 1003 | # CONFIG_VORTEX is not set |
979 | # CONFIG_TYPHOON is not set | 1004 | # CONFIG_TYPHOON is not set |
1005 | # CONFIG_ETHOC is not set | ||
1006 | # CONFIG_DNET is not set | ||
980 | CONFIG_NET_TULIP=y | 1007 | CONFIG_NET_TULIP=y |
981 | # CONFIG_DE2104X is not set | 1008 | # CONFIG_DE2104X is not set |
982 | # CONFIG_TULIP is not set | 1009 | # CONFIG_TULIP is not set |
@@ -1026,6 +1053,7 @@ CONFIG_E1000=y | |||
1026 | CONFIG_E1000E=y | 1053 | CONFIG_E1000E=y |
1027 | # CONFIG_IP1000 is not set | 1054 | # CONFIG_IP1000 is not set |
1028 | # CONFIG_IGB is not set | 1055 | # CONFIG_IGB is not set |
1056 | # CONFIG_IGBVF is not set | ||
1029 | # CONFIG_NS83820 is not set | 1057 | # CONFIG_NS83820 is not set |
1030 | # CONFIG_HAMACHI is not set | 1058 | # CONFIG_HAMACHI is not set |
1031 | # CONFIG_YELLOWFIN is not set | 1059 | # CONFIG_YELLOWFIN is not set |
@@ -1040,6 +1068,7 @@ CONFIG_BNX2=y | |||
1040 | # CONFIG_QLA3XXX is not set | 1068 | # CONFIG_QLA3XXX is not set |
1041 | # CONFIG_ATL1 is not set | 1069 | # CONFIG_ATL1 is not set |
1042 | # CONFIG_ATL1E is not set | 1070 | # CONFIG_ATL1E is not set |
1071 | # CONFIG_ATL1C is not set | ||
1043 | # CONFIG_JME is not set | 1072 | # CONFIG_JME is not set |
1044 | CONFIG_NETDEV_10000=y | 1073 | CONFIG_NETDEV_10000=y |
1045 | # CONFIG_CHELSIO_T1 is not set | 1074 | # CONFIG_CHELSIO_T1 is not set |
@@ -1049,6 +1078,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y | |||
1049 | # CONFIG_IXGBE is not set | 1078 | # CONFIG_IXGBE is not set |
1050 | # CONFIG_IXGB is not set | 1079 | # CONFIG_IXGB is not set |
1051 | # CONFIG_S2IO is not set | 1080 | # CONFIG_S2IO is not set |
1081 | # CONFIG_VXGE is not set | ||
1052 | # CONFIG_MYRI10GE is not set | 1082 | # CONFIG_MYRI10GE is not set |
1053 | # CONFIG_NETXEN_NIC is not set | 1083 | # CONFIG_NETXEN_NIC is not set |
1054 | # CONFIG_NIU is not set | 1084 | # CONFIG_NIU is not set |
@@ -1058,6 +1088,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y | |||
1058 | # CONFIG_BNX2X is not set | 1088 | # CONFIG_BNX2X is not set |
1059 | # CONFIG_QLGE is not set | 1089 | # CONFIG_QLGE is not set |
1060 | # CONFIG_SFC is not set | 1090 | # CONFIG_SFC is not set |
1091 | # CONFIG_BE2NET is not set | ||
1061 | CONFIG_TR=y | 1092 | CONFIG_TR=y |
1062 | # CONFIG_IBMOL is not set | 1093 | # CONFIG_IBMOL is not set |
1063 | # CONFIG_IBMLS is not set | 1094 | # CONFIG_IBMLS is not set |
@@ -1073,8 +1104,8 @@ CONFIG_WLAN_80211=y | |||
1073 | # CONFIG_LIBERTAS is not set | 1104 | # CONFIG_LIBERTAS is not set |
1074 | # CONFIG_LIBERTAS_THINFIRM is not set | 1105 | # CONFIG_LIBERTAS_THINFIRM is not set |
1075 | # CONFIG_AIRO is not set | 1106 | # CONFIG_AIRO is not set |
1076 | # CONFIG_HERMES is not set | ||
1077 | # CONFIG_ATMEL is not set | 1107 | # CONFIG_ATMEL is not set |
1108 | # CONFIG_AT76C50X_USB is not set | ||
1078 | # CONFIG_AIRO_CS is not set | 1109 | # CONFIG_AIRO_CS is not set |
1079 | # CONFIG_PCMCIA_WL3501 is not set | 1110 | # CONFIG_PCMCIA_WL3501 is not set |
1080 | # CONFIG_PRISM54 is not set | 1111 | # CONFIG_PRISM54 is not set |
@@ -1084,21 +1115,21 @@ CONFIG_WLAN_80211=y | |||
1084 | # CONFIG_RTL8187 is not set | 1115 | # CONFIG_RTL8187 is not set |
1085 | # CONFIG_ADM8211 is not set | 1116 | # CONFIG_ADM8211 is not set |
1086 | # CONFIG_MAC80211_HWSIM is not set | 1117 | # CONFIG_MAC80211_HWSIM is not set |
1118 | # CONFIG_MWL8K is not set | ||
1087 | # CONFIG_P54_COMMON is not set | 1119 | # CONFIG_P54_COMMON is not set |
1088 | CONFIG_ATH5K=y | 1120 | CONFIG_ATH5K=y |
1089 | # CONFIG_ATH5K_DEBUG is not set | 1121 | # CONFIG_ATH5K_DEBUG is not set |
1090 | # CONFIG_ATH9K is not set | 1122 | # CONFIG_ATH9K is not set |
1123 | # CONFIG_AR9170_USB is not set | ||
1091 | # CONFIG_IPW2100 is not set | 1124 | # CONFIG_IPW2100 is not set |
1092 | # CONFIG_IPW2200 is not set | 1125 | # CONFIG_IPW2200 is not set |
1093 | # CONFIG_IWLCORE is not set | 1126 | # CONFIG_IWLWIFI is not set |
1094 | # CONFIG_IWLWIFI_LEDS is not set | ||
1095 | # CONFIG_IWLAGN is not set | ||
1096 | # CONFIG_IWL3945 is not set | ||
1097 | # CONFIG_HOSTAP is not set | 1127 | # CONFIG_HOSTAP is not set |
1098 | # CONFIG_B43 is not set | 1128 | # CONFIG_B43 is not set |
1099 | # CONFIG_B43LEGACY is not set | 1129 | # CONFIG_B43LEGACY is not set |
1100 | # CONFIG_ZD1211RW is not set | 1130 | # CONFIG_ZD1211RW is not set |
1101 | # CONFIG_RT2X00 is not set | 1131 | # CONFIG_RT2X00 is not set |
1132 | # CONFIG_HERMES is not set | ||
1102 | 1133 | ||
1103 | # | 1134 | # |
1104 | # Enable WiMAX (Networking options) to see the WiMAX drivers | 1135 | # Enable WiMAX (Networking options) to see the WiMAX drivers |
@@ -1209,6 +1240,8 @@ CONFIG_INPUT_TABLET=y | |||
1209 | # CONFIG_TABLET_USB_KBTAB is not set | 1240 | # CONFIG_TABLET_USB_KBTAB is not set |
1210 | # CONFIG_TABLET_USB_WACOM is not set | 1241 | # CONFIG_TABLET_USB_WACOM is not set |
1211 | CONFIG_INPUT_TOUCHSCREEN=y | 1242 | CONFIG_INPUT_TOUCHSCREEN=y |
1243 | # CONFIG_TOUCHSCREEN_AD7879_I2C is not set | ||
1244 | # CONFIG_TOUCHSCREEN_AD7879 is not set | ||
1212 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | 1245 | # CONFIG_TOUCHSCREEN_FUJITSU is not set |
1213 | # CONFIG_TOUCHSCREEN_GUNZE is not set | 1246 | # CONFIG_TOUCHSCREEN_GUNZE is not set |
1214 | # CONFIG_TOUCHSCREEN_ELO is not set | 1247 | # CONFIG_TOUCHSCREEN_ELO is not set |
@@ -1303,6 +1336,7 @@ CONFIG_UNIX98_PTYS=y | |||
1303 | # CONFIG_LEGACY_PTYS is not set | 1336 | # CONFIG_LEGACY_PTYS is not set |
1304 | # CONFIG_IPMI_HANDLER is not set | 1337 | # CONFIG_IPMI_HANDLER is not set |
1305 | CONFIG_HW_RANDOM=y | 1338 | CONFIG_HW_RANDOM=y |
1339 | # CONFIG_HW_RANDOM_TIMERIOMEM is not set | ||
1306 | CONFIG_HW_RANDOM_INTEL=y | 1340 | CONFIG_HW_RANDOM_INTEL=y |
1307 | CONFIG_HW_RANDOM_AMD=y | 1341 | CONFIG_HW_RANDOM_AMD=y |
1308 | CONFIG_HW_RANDOM_GEODE=y | 1342 | CONFIG_HW_RANDOM_GEODE=y |
@@ -1390,7 +1424,6 @@ CONFIG_I2C_I801=y | |||
1390 | # CONFIG_SENSORS_PCF8574 is not set | 1424 | # CONFIG_SENSORS_PCF8574 is not set |
1391 | # CONFIG_PCF8575 is not set | 1425 | # CONFIG_PCF8575 is not set |
1392 | # CONFIG_SENSORS_PCA9539 is not set | 1426 | # CONFIG_SENSORS_PCA9539 is not set |
1393 | # CONFIG_SENSORS_PCF8591 is not set | ||
1394 | # CONFIG_SENSORS_MAX6875 is not set | 1427 | # CONFIG_SENSORS_MAX6875 is not set |
1395 | # CONFIG_SENSORS_TSL2550 is not set | 1428 | # CONFIG_SENSORS_TSL2550 is not set |
1396 | # CONFIG_I2C_DEBUG_CORE is not set | 1429 | # CONFIG_I2C_DEBUG_CORE is not set |
@@ -1424,6 +1457,7 @@ CONFIG_HWMON=y | |||
1424 | # CONFIG_SENSORS_ADT7475 is not set | 1457 | # CONFIG_SENSORS_ADT7475 is not set |
1425 | # CONFIG_SENSORS_K8TEMP is not set | 1458 | # CONFIG_SENSORS_K8TEMP is not set |
1426 | # CONFIG_SENSORS_ASB100 is not set | 1459 | # CONFIG_SENSORS_ASB100 is not set |
1460 | # CONFIG_SENSORS_ATK0110 is not set | ||
1427 | # CONFIG_SENSORS_ATXP1 is not set | 1461 | # CONFIG_SENSORS_ATXP1 is not set |
1428 | # CONFIG_SENSORS_DS1621 is not set | 1462 | # CONFIG_SENSORS_DS1621 is not set |
1429 | # CONFIG_SENSORS_I5K_AMB is not set | 1463 | # CONFIG_SENSORS_I5K_AMB is not set |
@@ -1433,6 +1467,7 @@ CONFIG_HWMON=y | |||
1433 | # CONFIG_SENSORS_FSCHER is not set | 1467 | # CONFIG_SENSORS_FSCHER is not set |
1434 | # CONFIG_SENSORS_FSCPOS is not set | 1468 | # CONFIG_SENSORS_FSCPOS is not set |
1435 | # CONFIG_SENSORS_FSCHMD is not set | 1469 | # CONFIG_SENSORS_FSCHMD is not set |
1470 | # CONFIG_SENSORS_G760A is not set | ||
1436 | # CONFIG_SENSORS_GL518SM is not set | 1471 | # CONFIG_SENSORS_GL518SM is not set |
1437 | # CONFIG_SENSORS_GL520SM is not set | 1472 | # CONFIG_SENSORS_GL520SM is not set |
1438 | # CONFIG_SENSORS_CORETEMP is not set | 1473 | # CONFIG_SENSORS_CORETEMP is not set |
@@ -1448,11 +1483,14 @@ CONFIG_HWMON=y | |||
1448 | # CONFIG_SENSORS_LM90 is not set | 1483 | # CONFIG_SENSORS_LM90 is not set |
1449 | # CONFIG_SENSORS_LM92 is not set | 1484 | # CONFIG_SENSORS_LM92 is not set |
1450 | # CONFIG_SENSORS_LM93 is not set | 1485 | # CONFIG_SENSORS_LM93 is not set |
1486 | # CONFIG_SENSORS_LTC4215 is not set | ||
1451 | # CONFIG_SENSORS_LTC4245 is not set | 1487 | # CONFIG_SENSORS_LTC4245 is not set |
1488 | # CONFIG_SENSORS_LM95241 is not set | ||
1452 | # CONFIG_SENSORS_MAX1619 is not set | 1489 | # CONFIG_SENSORS_MAX1619 is not set |
1453 | # CONFIG_SENSORS_MAX6650 is not set | 1490 | # CONFIG_SENSORS_MAX6650 is not set |
1454 | # CONFIG_SENSORS_PC87360 is not set | 1491 | # CONFIG_SENSORS_PC87360 is not set |
1455 | # CONFIG_SENSORS_PC87427 is not set | 1492 | # CONFIG_SENSORS_PC87427 is not set |
1493 | # CONFIG_SENSORS_PCF8591 is not set | ||
1456 | # CONFIG_SENSORS_SIS5595 is not set | 1494 | # CONFIG_SENSORS_SIS5595 is not set |
1457 | # CONFIG_SENSORS_DME1737 is not set | 1495 | # CONFIG_SENSORS_DME1737 is not set |
1458 | # CONFIG_SENSORS_SMSC47M1 is not set | 1496 | # CONFIG_SENSORS_SMSC47M1 is not set |
@@ -1643,7 +1681,6 @@ CONFIG_FB_EFI=y | |||
1643 | # CONFIG_FB_3DFX is not set | 1681 | # CONFIG_FB_3DFX is not set |
1644 | # CONFIG_FB_VOODOO1 is not set | 1682 | # CONFIG_FB_VOODOO1 is not set |
1645 | # CONFIG_FB_VT8623 is not set | 1683 | # CONFIG_FB_VT8623 is not set |
1646 | # CONFIG_FB_CYBLA is not set | ||
1647 | # CONFIG_FB_TRIDENT is not set | 1684 | # CONFIG_FB_TRIDENT is not set |
1648 | # CONFIG_FB_ARK is not set | 1685 | # CONFIG_FB_ARK is not set |
1649 | # CONFIG_FB_PM3 is not set | 1686 | # CONFIG_FB_PM3 is not set |
@@ -1652,6 +1689,7 @@ CONFIG_FB_EFI=y | |||
1652 | # CONFIG_FB_VIRTUAL is not set | 1689 | # CONFIG_FB_VIRTUAL is not set |
1653 | # CONFIG_FB_METRONOME is not set | 1690 | # CONFIG_FB_METRONOME is not set |
1654 | # CONFIG_FB_MB862XX is not set | 1691 | # CONFIG_FB_MB862XX is not set |
1692 | # CONFIG_FB_BROADSHEET is not set | ||
1655 | CONFIG_BACKLIGHT_LCD_SUPPORT=y | 1693 | CONFIG_BACKLIGHT_LCD_SUPPORT=y |
1656 | # CONFIG_LCD_CLASS_DEVICE is not set | 1694 | # CONFIG_LCD_CLASS_DEVICE is not set |
1657 | CONFIG_BACKLIGHT_CLASS_DEVICE=y | 1695 | CONFIG_BACKLIGHT_CLASS_DEVICE=y |
@@ -1738,6 +1776,8 @@ CONFIG_SND_PCI=y | |||
1738 | # CONFIG_SND_INDIGO is not set | 1776 | # CONFIG_SND_INDIGO is not set |
1739 | # CONFIG_SND_INDIGOIO is not set | 1777 | # CONFIG_SND_INDIGOIO is not set |
1740 | # CONFIG_SND_INDIGODJ is not set | 1778 | # CONFIG_SND_INDIGODJ is not set |
1779 | # CONFIG_SND_INDIGOIOX is not set | ||
1780 | # CONFIG_SND_INDIGODJX is not set | ||
1741 | # CONFIG_SND_EMU10K1 is not set | 1781 | # CONFIG_SND_EMU10K1 is not set |
1742 | # CONFIG_SND_EMU10K1X is not set | 1782 | # CONFIG_SND_EMU10K1X is not set |
1743 | # CONFIG_SND_ENS1370 is not set | 1783 | # CONFIG_SND_ENS1370 is not set |
@@ -1811,15 +1851,17 @@ CONFIG_USB_HIDDEV=y | |||
1811 | # | 1851 | # |
1812 | # Special HID drivers | 1852 | # Special HID drivers |
1813 | # | 1853 | # |
1814 | CONFIG_HID_COMPAT=y | ||
1815 | CONFIG_HID_A4TECH=y | 1854 | CONFIG_HID_A4TECH=y |
1816 | CONFIG_HID_APPLE=y | 1855 | CONFIG_HID_APPLE=y |
1817 | CONFIG_HID_BELKIN=y | 1856 | CONFIG_HID_BELKIN=y |
1818 | CONFIG_HID_CHERRY=y | 1857 | CONFIG_HID_CHERRY=y |
1819 | CONFIG_HID_CHICONY=y | 1858 | CONFIG_HID_CHICONY=y |
1820 | CONFIG_HID_CYPRESS=y | 1859 | CONFIG_HID_CYPRESS=y |
1860 | # CONFIG_DRAGONRISE_FF is not set | ||
1821 | CONFIG_HID_EZKEY=y | 1861 | CONFIG_HID_EZKEY=y |
1862 | CONFIG_HID_KYE=y | ||
1822 | CONFIG_HID_GYRATION=y | 1863 | CONFIG_HID_GYRATION=y |
1864 | CONFIG_HID_KENSINGTON=y | ||
1823 | CONFIG_HID_LOGITECH=y | 1865 | CONFIG_HID_LOGITECH=y |
1824 | CONFIG_LOGITECH_FF=y | 1866 | CONFIG_LOGITECH_FF=y |
1825 | # CONFIG_LOGIRUMBLEPAD2_FF is not set | 1867 | # CONFIG_LOGIRUMBLEPAD2_FF is not set |
@@ -1885,11 +1927,11 @@ CONFIG_USB_PRINTER=y | |||
1885 | # CONFIG_USB_TMC is not set | 1927 | # CONFIG_USB_TMC is not set |
1886 | 1928 | ||
1887 | # | 1929 | # |
1888 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; | 1930 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may |
1889 | # | 1931 | # |
1890 | 1932 | ||
1891 | # | 1933 | # |
1892 | # see USB_STORAGE Help for more information | 1934 | # also be needed; see USB_STORAGE Help for more info |
1893 | # | 1935 | # |
1894 | CONFIG_USB_STORAGE=y | 1936 | CONFIG_USB_STORAGE=y |
1895 | # CONFIG_USB_STORAGE_DEBUG is not set | 1937 | # CONFIG_USB_STORAGE_DEBUG is not set |
@@ -1931,7 +1973,6 @@ CONFIG_USB_LIBUSUAL=y | |||
1931 | # CONFIG_USB_LED is not set | 1973 | # CONFIG_USB_LED is not set |
1932 | # CONFIG_USB_CYPRESS_CY7C63 is not set | 1974 | # CONFIG_USB_CYPRESS_CY7C63 is not set |
1933 | # CONFIG_USB_CYTHERM is not set | 1975 | # CONFIG_USB_CYTHERM is not set |
1934 | # CONFIG_USB_PHIDGET is not set | ||
1935 | # CONFIG_USB_IDMOUSE is not set | 1976 | # CONFIG_USB_IDMOUSE is not set |
1936 | # CONFIG_USB_FTDI_ELAN is not set | 1977 | # CONFIG_USB_FTDI_ELAN is not set |
1937 | # CONFIG_USB_APPLEDISPLAY is not set | 1978 | # CONFIG_USB_APPLEDISPLAY is not set |
@@ -1947,6 +1988,7 @@ CONFIG_USB_LIBUSUAL=y | |||
1947 | # | 1988 | # |
1948 | # OTG and related infrastructure | 1989 | # OTG and related infrastructure |
1949 | # | 1990 | # |
1991 | # CONFIG_NOP_USB_XCEIV is not set | ||
1950 | # CONFIG_UWB is not set | 1992 | # CONFIG_UWB is not set |
1951 | # CONFIG_MMC is not set | 1993 | # CONFIG_MMC is not set |
1952 | # CONFIG_MEMSTICK is not set | 1994 | # CONFIG_MEMSTICK is not set |
@@ -1958,8 +2000,10 @@ CONFIG_LEDS_CLASS=y | |||
1958 | # | 2000 | # |
1959 | # CONFIG_LEDS_ALIX2 is not set | 2001 | # CONFIG_LEDS_ALIX2 is not set |
1960 | # CONFIG_LEDS_PCA9532 is not set | 2002 | # CONFIG_LEDS_PCA9532 is not set |
2003 | # CONFIG_LEDS_LP5521 is not set | ||
1961 | # CONFIG_LEDS_CLEVO_MAIL is not set | 2004 | # CONFIG_LEDS_CLEVO_MAIL is not set |
1962 | # CONFIG_LEDS_PCA955X is not set | 2005 | # CONFIG_LEDS_PCA955X is not set |
2006 | # CONFIG_LEDS_BD2802 is not set | ||
1963 | 2007 | ||
1964 | # | 2008 | # |
1965 | # LED Triggers | 2009 | # LED Triggers |
@@ -1969,6 +2013,10 @@ CONFIG_LEDS_TRIGGERS=y | |||
1969 | # CONFIG_LEDS_TRIGGER_HEARTBEAT is not set | 2013 | # CONFIG_LEDS_TRIGGER_HEARTBEAT is not set |
1970 | # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set | 2014 | # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set |
1971 | # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set | 2015 | # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set |
2016 | |||
2017 | # | ||
2018 | # iptables trigger is under Netfilter config (LED target) | ||
2019 | # | ||
1972 | # CONFIG_ACCESSIBILITY is not set | 2020 | # CONFIG_ACCESSIBILITY is not set |
1973 | # CONFIG_INFINIBAND is not set | 2021 | # CONFIG_INFINIBAND is not set |
1974 | CONFIG_EDAC=y | 2022 | CONFIG_EDAC=y |
@@ -2037,6 +2085,7 @@ CONFIG_DMADEVICES=y | |||
2037 | # DMA Devices | 2085 | # DMA Devices |
2038 | # | 2086 | # |
2039 | # CONFIG_INTEL_IOATDMA is not set | 2087 | # CONFIG_INTEL_IOATDMA is not set |
2088 | # CONFIG_AUXDISPLAY is not set | ||
2040 | # CONFIG_UIO is not set | 2089 | # CONFIG_UIO is not set |
2041 | # CONFIG_STAGING is not set | 2090 | # CONFIG_STAGING is not set |
2042 | CONFIG_X86_PLATFORM_DEVICES=y | 2091 | CONFIG_X86_PLATFORM_DEVICES=y |
@@ -2071,6 +2120,7 @@ CONFIG_DMIID=y | |||
2071 | # | 2120 | # |
2072 | # CONFIG_EXT2_FS is not set | 2121 | # CONFIG_EXT2_FS is not set |
2073 | CONFIG_EXT3_FS=y | 2122 | CONFIG_EXT3_FS=y |
2123 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
2074 | CONFIG_EXT3_FS_XATTR=y | 2124 | CONFIG_EXT3_FS_XATTR=y |
2075 | CONFIG_EXT3_FS_POSIX_ACL=y | 2125 | CONFIG_EXT3_FS_POSIX_ACL=y |
2076 | CONFIG_EXT3_FS_SECURITY=y | 2126 | CONFIG_EXT3_FS_SECURITY=y |
@@ -2101,6 +2151,11 @@ CONFIG_AUTOFS4_FS=y | |||
2101 | CONFIG_GENERIC_ACL=y | 2151 | CONFIG_GENERIC_ACL=y |
2102 | 2152 | ||
2103 | # | 2153 | # |
2154 | # Caches | ||
2155 | # | ||
2156 | # CONFIG_FSCACHE is not set | ||
2157 | |||
2158 | # | ||
2104 | # CD-ROM/DVD Filesystems | 2159 | # CD-ROM/DVD Filesystems |
2105 | # | 2160 | # |
2106 | CONFIG_ISO9660_FS=y | 2161 | CONFIG_ISO9660_FS=y |
@@ -2151,6 +2206,7 @@ CONFIG_MISC_FILESYSTEMS=y | |||
2151 | # CONFIG_ROMFS_FS is not set | 2206 | # CONFIG_ROMFS_FS is not set |
2152 | # CONFIG_SYSV_FS is not set | 2207 | # CONFIG_SYSV_FS is not set |
2153 | # CONFIG_UFS_FS is not set | 2208 | # CONFIG_UFS_FS is not set |
2209 | # CONFIG_NILFS2_FS is not set | ||
2154 | CONFIG_NETWORK_FILESYSTEMS=y | 2210 | CONFIG_NETWORK_FILESYSTEMS=y |
2155 | CONFIG_NFS_FS=y | 2211 | CONFIG_NFS_FS=y |
2156 | CONFIG_NFS_V3=y | 2212 | CONFIG_NFS_V3=y |
@@ -2164,7 +2220,6 @@ CONFIG_NFS_ACL_SUPPORT=y | |||
2164 | CONFIG_NFS_COMMON=y | 2220 | CONFIG_NFS_COMMON=y |
2165 | CONFIG_SUNRPC=y | 2221 | CONFIG_SUNRPC=y |
2166 | CONFIG_SUNRPC_GSS=y | 2222 | CONFIG_SUNRPC_GSS=y |
2167 | # CONFIG_SUNRPC_REGISTER_V4 is not set | ||
2168 | CONFIG_RPCSEC_GSS_KRB5=y | 2223 | CONFIG_RPCSEC_GSS_KRB5=y |
2169 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | 2224 | # CONFIG_RPCSEC_GSS_SPKM3 is not set |
2170 | # CONFIG_SMB_FS is not set | 2225 | # CONFIG_SMB_FS is not set |
@@ -2251,6 +2306,7 @@ CONFIG_DEBUG_FS=y | |||
2251 | CONFIG_DEBUG_KERNEL=y | 2306 | CONFIG_DEBUG_KERNEL=y |
2252 | # CONFIG_DEBUG_SHIRQ is not set | 2307 | # CONFIG_DEBUG_SHIRQ is not set |
2253 | # CONFIG_DETECT_SOFTLOCKUP is not set | 2308 | # CONFIG_DETECT_SOFTLOCKUP is not set |
2309 | # CONFIG_DETECT_HUNG_TASK is not set | ||
2254 | # CONFIG_SCHED_DEBUG is not set | 2310 | # CONFIG_SCHED_DEBUG is not set |
2255 | CONFIG_SCHEDSTATS=y | 2311 | CONFIG_SCHEDSTATS=y |
2256 | CONFIG_TIMER_STATS=y | 2312 | CONFIG_TIMER_STATS=y |
@@ -2266,6 +2322,7 @@ CONFIG_TIMER_STATS=y | |||
2266 | # CONFIG_LOCK_STAT is not set | 2322 | # CONFIG_LOCK_STAT is not set |
2267 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | 2323 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set |
2268 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | 2324 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set |
2325 | CONFIG_STACKTRACE=y | ||
2269 | # CONFIG_DEBUG_KOBJECT is not set | 2326 | # CONFIG_DEBUG_KOBJECT is not set |
2270 | # CONFIG_DEBUG_HIGHMEM is not set | 2327 | # CONFIG_DEBUG_HIGHMEM is not set |
2271 | CONFIG_DEBUG_BUGVERBOSE=y | 2328 | CONFIG_DEBUG_BUGVERBOSE=y |
@@ -2289,13 +2346,19 @@ CONFIG_FRAME_POINTER=y | |||
2289 | # CONFIG_FAULT_INJECTION is not set | 2346 | # CONFIG_FAULT_INJECTION is not set |
2290 | # CONFIG_LATENCYTOP is not set | 2347 | # CONFIG_LATENCYTOP is not set |
2291 | CONFIG_SYSCTL_SYSCALL_CHECK=y | 2348 | CONFIG_SYSCTL_SYSCALL_CHECK=y |
2349 | # CONFIG_DEBUG_PAGEALLOC is not set | ||
2292 | CONFIG_USER_STACKTRACE_SUPPORT=y | 2350 | CONFIG_USER_STACKTRACE_SUPPORT=y |
2351 | CONFIG_NOP_TRACER=y | ||
2293 | CONFIG_HAVE_FUNCTION_TRACER=y | 2352 | CONFIG_HAVE_FUNCTION_TRACER=y |
2294 | CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y | 2353 | CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y |
2295 | CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y | 2354 | CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y |
2296 | CONFIG_HAVE_DYNAMIC_FTRACE=y | 2355 | CONFIG_HAVE_DYNAMIC_FTRACE=y |
2297 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | 2356 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y |
2298 | CONFIG_HAVE_HW_BRANCH_TRACER=y | 2357 | CONFIG_HAVE_HW_BRANCH_TRACER=y |
2358 | CONFIG_HAVE_FTRACE_SYSCALLS=y | ||
2359 | CONFIG_RING_BUFFER=y | ||
2360 | CONFIG_TRACING=y | ||
2361 | CONFIG_TRACING_SUPPORT=y | ||
2299 | 2362 | ||
2300 | # | 2363 | # |
2301 | # Tracers | 2364 | # Tracers |
@@ -2305,13 +2368,21 @@ CONFIG_HAVE_HW_BRANCH_TRACER=y | |||
2305 | # CONFIG_SYSPROF_TRACER is not set | 2368 | # CONFIG_SYSPROF_TRACER is not set |
2306 | # CONFIG_SCHED_TRACER is not set | 2369 | # CONFIG_SCHED_TRACER is not set |
2307 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | 2370 | # CONFIG_CONTEXT_SWITCH_TRACER is not set |
2371 | # CONFIG_EVENT_TRACER is not set | ||
2372 | # CONFIG_FTRACE_SYSCALLS is not set | ||
2308 | # CONFIG_BOOT_TRACER is not set | 2373 | # CONFIG_BOOT_TRACER is not set |
2309 | # CONFIG_TRACE_BRANCH_PROFILING is not set | 2374 | # CONFIG_TRACE_BRANCH_PROFILING is not set |
2310 | # CONFIG_POWER_TRACER is not set | 2375 | # CONFIG_POWER_TRACER is not set |
2311 | # CONFIG_STACK_TRACER is not set | 2376 | # CONFIG_STACK_TRACER is not set |
2312 | # CONFIG_HW_BRANCH_TRACER is not set | 2377 | # CONFIG_HW_BRANCH_TRACER is not set |
2378 | # CONFIG_KMEMTRACE is not set | ||
2379 | # CONFIG_WORKQUEUE_TRACER is not set | ||
2380 | CONFIG_BLK_DEV_IO_TRACE=y | ||
2381 | # CONFIG_FTRACE_STARTUP_TEST is not set | ||
2382 | # CONFIG_MMIOTRACE is not set | ||
2313 | CONFIG_PROVIDE_OHCI1394_DMA_INIT=y | 2383 | CONFIG_PROVIDE_OHCI1394_DMA_INIT=y |
2314 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set | 2384 | # CONFIG_DYNAMIC_DEBUG is not set |
2385 | # CONFIG_DMA_API_DEBUG is not set | ||
2315 | # CONFIG_SAMPLES is not set | 2386 | # CONFIG_SAMPLES is not set |
2316 | CONFIG_HAVE_ARCH_KGDB=y | 2387 | CONFIG_HAVE_ARCH_KGDB=y |
2317 | # CONFIG_KGDB is not set | 2388 | # CONFIG_KGDB is not set |
@@ -2321,7 +2392,6 @@ CONFIG_EARLY_PRINTK=y | |||
2321 | CONFIG_EARLY_PRINTK_DBGP=y | 2392 | CONFIG_EARLY_PRINTK_DBGP=y |
2322 | CONFIG_DEBUG_STACKOVERFLOW=y | 2393 | CONFIG_DEBUG_STACKOVERFLOW=y |
2323 | CONFIG_DEBUG_STACK_USAGE=y | 2394 | CONFIG_DEBUG_STACK_USAGE=y |
2324 | # CONFIG_DEBUG_PAGEALLOC is not set | ||
2325 | # CONFIG_DEBUG_PER_CPU_MAPS is not set | 2395 | # CONFIG_DEBUG_PER_CPU_MAPS is not set |
2326 | # CONFIG_X86_PTDUMP is not set | 2396 | # CONFIG_X86_PTDUMP is not set |
2327 | CONFIG_DEBUG_RODATA=y | 2397 | CONFIG_DEBUG_RODATA=y |
@@ -2329,7 +2399,7 @@ CONFIG_DEBUG_RODATA=y | |||
2329 | CONFIG_DEBUG_NX_TEST=m | 2399 | CONFIG_DEBUG_NX_TEST=m |
2330 | # CONFIG_4KSTACKS is not set | 2400 | # CONFIG_4KSTACKS is not set |
2331 | CONFIG_DOUBLEFAULT=y | 2401 | CONFIG_DOUBLEFAULT=y |
2332 | # CONFIG_MMIOTRACE is not set | 2402 | CONFIG_HAVE_MMIOTRACE_SUPPORT=y |
2333 | CONFIG_IO_DELAY_TYPE_0X80=0 | 2403 | CONFIG_IO_DELAY_TYPE_0X80=0 |
2334 | CONFIG_IO_DELAY_TYPE_0XED=1 | 2404 | CONFIG_IO_DELAY_TYPE_0XED=1 |
2335 | CONFIG_IO_DELAY_TYPE_UDELAY=2 | 2405 | CONFIG_IO_DELAY_TYPE_UDELAY=2 |
@@ -2365,6 +2435,8 @@ CONFIG_SECURITY_SELINUX_AVC_STATS=y | |||
2365 | CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 | 2435 | CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 |
2366 | # CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set | 2436 | # CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set |
2367 | # CONFIG_SECURITY_SMACK is not set | 2437 | # CONFIG_SECURITY_SMACK is not set |
2438 | # CONFIG_SECURITY_TOMOYO is not set | ||
2439 | # CONFIG_IMA is not set | ||
2368 | CONFIG_CRYPTO=y | 2440 | CONFIG_CRYPTO=y |
2369 | 2441 | ||
2370 | # | 2442 | # |
@@ -2380,10 +2452,12 @@ CONFIG_CRYPTO_BLKCIPHER2=y | |||
2380 | CONFIG_CRYPTO_HASH=y | 2452 | CONFIG_CRYPTO_HASH=y |
2381 | CONFIG_CRYPTO_HASH2=y | 2453 | CONFIG_CRYPTO_HASH2=y |
2382 | CONFIG_CRYPTO_RNG2=y | 2454 | CONFIG_CRYPTO_RNG2=y |
2455 | CONFIG_CRYPTO_PCOMP=y | ||
2383 | CONFIG_CRYPTO_MANAGER=y | 2456 | CONFIG_CRYPTO_MANAGER=y |
2384 | CONFIG_CRYPTO_MANAGER2=y | 2457 | CONFIG_CRYPTO_MANAGER2=y |
2385 | # CONFIG_CRYPTO_GF128MUL is not set | 2458 | # CONFIG_CRYPTO_GF128MUL is not set |
2386 | # CONFIG_CRYPTO_NULL is not set | 2459 | # CONFIG_CRYPTO_NULL is not set |
2460 | CONFIG_CRYPTO_WORKQUEUE=y | ||
2387 | # CONFIG_CRYPTO_CRYPTD is not set | 2461 | # CONFIG_CRYPTO_CRYPTD is not set |
2388 | CONFIG_CRYPTO_AUTHENC=y | 2462 | CONFIG_CRYPTO_AUTHENC=y |
2389 | # CONFIG_CRYPTO_TEST is not set | 2463 | # CONFIG_CRYPTO_TEST is not set |
@@ -2456,6 +2530,7 @@ CONFIG_CRYPTO_DES=y | |||
2456 | # Compression | 2530 | # Compression |
2457 | # | 2531 | # |
2458 | # CONFIG_CRYPTO_DEFLATE is not set | 2532 | # CONFIG_CRYPTO_DEFLATE is not set |
2533 | # CONFIG_CRYPTO_ZLIB is not set | ||
2459 | # CONFIG_CRYPTO_LZO is not set | 2534 | # CONFIG_CRYPTO_LZO is not set |
2460 | 2535 | ||
2461 | # | 2536 | # |
@@ -2467,11 +2542,13 @@ CONFIG_CRYPTO_HW=y | |||
2467 | # CONFIG_CRYPTO_DEV_GEODE is not set | 2542 | # CONFIG_CRYPTO_DEV_GEODE is not set |
2468 | # CONFIG_CRYPTO_DEV_HIFN_795X is not set | 2543 | # CONFIG_CRYPTO_DEV_HIFN_795X is not set |
2469 | CONFIG_HAVE_KVM=y | 2544 | CONFIG_HAVE_KVM=y |
2545 | CONFIG_HAVE_KVM_IRQCHIP=y | ||
2470 | CONFIG_VIRTUALIZATION=y | 2546 | CONFIG_VIRTUALIZATION=y |
2471 | # CONFIG_KVM is not set | 2547 | # CONFIG_KVM is not set |
2472 | # CONFIG_LGUEST is not set | 2548 | # CONFIG_LGUEST is not set |
2473 | # CONFIG_VIRTIO_PCI is not set | 2549 | # CONFIG_VIRTIO_PCI is not set |
2474 | # CONFIG_VIRTIO_BALLOON is not set | 2550 | # CONFIG_VIRTIO_BALLOON is not set |
2551 | CONFIG_BINARY_PRINTF=y | ||
2475 | 2552 | ||
2476 | # | 2553 | # |
2477 | # Library routines | 2554 | # Library routines |
@@ -2489,7 +2566,10 @@ CONFIG_CRC32=y | |||
2489 | # CONFIG_LIBCRC32C is not set | 2566 | # CONFIG_LIBCRC32C is not set |
2490 | CONFIG_AUDIT_GENERIC=y | 2567 | CONFIG_AUDIT_GENERIC=y |
2491 | CONFIG_ZLIB_INFLATE=y | 2568 | CONFIG_ZLIB_INFLATE=y |
2492 | CONFIG_PLIST=y | 2569 | CONFIG_DECOMPRESS_GZIP=y |
2570 | CONFIG_DECOMPRESS_BZIP2=y | ||
2571 | CONFIG_DECOMPRESS_LZMA=y | ||
2493 | CONFIG_HAS_IOMEM=y | 2572 | CONFIG_HAS_IOMEM=y |
2494 | CONFIG_HAS_IOPORT=y | 2573 | CONFIG_HAS_IOPORT=y |
2495 | CONFIG_HAS_DMA=y | 2574 | CONFIG_HAS_DMA=y |
2575 | CONFIG_NLATTR=y | ||
diff --git a/arch/x86/configs/x86_64_defconfig b/arch/x86/configs/x86_64_defconfig index 9fe5d212ab4c..cee1dd2e69b2 100644 --- a/arch/x86/configs/x86_64_defconfig +++ b/arch/x86/configs/x86_64_defconfig | |||
@@ -1,12 +1,13 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.29-rc4 | 3 | # Linux kernel version: 2.6.30-rc2 |
4 | # Tue Feb 24 15:44:16 2009 | 4 | # Mon May 11 16:22:00 2009 |
5 | # | 5 | # |
6 | CONFIG_64BIT=y | 6 | CONFIG_64BIT=y |
7 | # CONFIG_X86_32 is not set | 7 | # CONFIG_X86_32 is not set |
8 | CONFIG_X86_64=y | 8 | CONFIG_X86_64=y |
9 | CONFIG_X86=y | 9 | CONFIG_X86=y |
10 | CONFIG_OUTPUT_FORMAT="elf64-x86-64" | ||
10 | CONFIG_ARCH_DEFCONFIG="arch/x86/configs/x86_64_defconfig" | 11 | CONFIG_ARCH_DEFCONFIG="arch/x86/configs/x86_64_defconfig" |
11 | CONFIG_GENERIC_TIME=y | 12 | CONFIG_GENERIC_TIME=y |
12 | CONFIG_GENERIC_CMOS_UPDATE=y | 13 | CONFIG_GENERIC_CMOS_UPDATE=y |
@@ -34,6 +35,7 @@ CONFIG_ARCH_HAS_CPU_RELAX=y | |||
34 | CONFIG_ARCH_HAS_DEFAULT_IDLE=y | 35 | CONFIG_ARCH_HAS_DEFAULT_IDLE=y |
35 | CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y | 36 | CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y |
36 | CONFIG_HAVE_SETUP_PER_CPU_AREA=y | 37 | CONFIG_HAVE_SETUP_PER_CPU_AREA=y |
38 | CONFIG_HAVE_DYNAMIC_PER_CPU_AREA=y | ||
37 | CONFIG_HAVE_CPUMASK_OF_CPU_MAP=y | 39 | CONFIG_HAVE_CPUMASK_OF_CPU_MAP=y |
38 | CONFIG_ARCH_HIBERNATION_POSSIBLE=y | 40 | CONFIG_ARCH_HIBERNATION_POSSIBLE=y |
39 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | 41 | CONFIG_ARCH_SUSPEND_POSSIBLE=y |
@@ -41,14 +43,14 @@ CONFIG_ZONE_DMA32=y | |||
41 | CONFIG_ARCH_POPULATES_NODE_MAP=y | 43 | CONFIG_ARCH_POPULATES_NODE_MAP=y |
42 | CONFIG_AUDIT_ARCH=y | 44 | CONFIG_AUDIT_ARCH=y |
43 | CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y | 45 | CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y |
46 | CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y | ||
44 | CONFIG_GENERIC_HARDIRQS=y | 47 | CONFIG_GENERIC_HARDIRQS=y |
48 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
45 | CONFIG_GENERIC_IRQ_PROBE=y | 49 | CONFIG_GENERIC_IRQ_PROBE=y |
46 | CONFIG_GENERIC_PENDING_IRQ=y | 50 | CONFIG_GENERIC_PENDING_IRQ=y |
47 | CONFIG_X86_SMP=y | ||
48 | CONFIG_USE_GENERIC_SMP_HELPERS=y | 51 | CONFIG_USE_GENERIC_SMP_HELPERS=y |
49 | CONFIG_X86_64_SMP=y | 52 | CONFIG_X86_64_SMP=y |
50 | CONFIG_X86_HT=y | 53 | CONFIG_X86_HT=y |
51 | CONFIG_X86_BIOS_REBOOT=y | ||
52 | CONFIG_X86_TRAMPOLINE=y | 54 | CONFIG_X86_TRAMPOLINE=y |
53 | # CONFIG_KTIME_SCALAR is not set | 55 | # CONFIG_KTIME_SCALAR is not set |
54 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 56 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
@@ -61,10 +63,17 @@ CONFIG_LOCK_KERNEL=y | |||
61 | CONFIG_INIT_ENV_ARG_LIMIT=32 | 63 | CONFIG_INIT_ENV_ARG_LIMIT=32 |
62 | CONFIG_LOCALVERSION="" | 64 | CONFIG_LOCALVERSION="" |
63 | # CONFIG_LOCALVERSION_AUTO is not set | 65 | # CONFIG_LOCALVERSION_AUTO is not set |
66 | CONFIG_HAVE_KERNEL_GZIP=y | ||
67 | CONFIG_HAVE_KERNEL_BZIP2=y | ||
68 | CONFIG_HAVE_KERNEL_LZMA=y | ||
69 | CONFIG_KERNEL_GZIP=y | ||
70 | # CONFIG_KERNEL_BZIP2 is not set | ||
71 | # CONFIG_KERNEL_LZMA is not set | ||
64 | CONFIG_SWAP=y | 72 | CONFIG_SWAP=y |
65 | CONFIG_SYSVIPC=y | 73 | CONFIG_SYSVIPC=y |
66 | CONFIG_SYSVIPC_SYSCTL=y | 74 | CONFIG_SYSVIPC_SYSCTL=y |
67 | CONFIG_POSIX_MQUEUE=y | 75 | CONFIG_POSIX_MQUEUE=y |
76 | CONFIG_POSIX_MQUEUE_SYSCTL=y | ||
68 | CONFIG_BSD_PROCESS_ACCT=y | 77 | CONFIG_BSD_PROCESS_ACCT=y |
69 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set | 78 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set |
70 | CONFIG_TASKSTATS=y | 79 | CONFIG_TASKSTATS=y |
@@ -114,23 +123,26 @@ CONFIG_PID_NS=y | |||
114 | CONFIG_NET_NS=y | 123 | CONFIG_NET_NS=y |
115 | CONFIG_BLK_DEV_INITRD=y | 124 | CONFIG_BLK_DEV_INITRD=y |
116 | CONFIG_INITRAMFS_SOURCE="" | 125 | CONFIG_INITRAMFS_SOURCE="" |
126 | CONFIG_RD_GZIP=y | ||
127 | CONFIG_RD_BZIP2=y | ||
128 | CONFIG_RD_LZMA=y | ||
117 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | 129 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y |
118 | CONFIG_SYSCTL=y | 130 | CONFIG_SYSCTL=y |
131 | CONFIG_ANON_INODES=y | ||
119 | # CONFIG_EMBEDDED is not set | 132 | # CONFIG_EMBEDDED is not set |
120 | CONFIG_UID16=y | 133 | CONFIG_UID16=y |
121 | CONFIG_SYSCTL_SYSCALL=y | 134 | CONFIG_SYSCTL_SYSCALL=y |
122 | CONFIG_KALLSYMS=y | 135 | CONFIG_KALLSYMS=y |
123 | CONFIG_KALLSYMS_ALL=y | 136 | CONFIG_KALLSYMS_ALL=y |
124 | CONFIG_KALLSYMS_EXTRA_PASS=y | 137 | CONFIG_KALLSYMS_EXTRA_PASS=y |
138 | # CONFIG_STRIP_ASM_SYMS is not set | ||
125 | CONFIG_HOTPLUG=y | 139 | CONFIG_HOTPLUG=y |
126 | CONFIG_PRINTK=y | 140 | CONFIG_PRINTK=y |
127 | CONFIG_BUG=y | 141 | CONFIG_BUG=y |
128 | CONFIG_ELF_CORE=y | 142 | CONFIG_ELF_CORE=y |
129 | CONFIG_PCSPKR_PLATFORM=y | 143 | CONFIG_PCSPKR_PLATFORM=y |
130 | # CONFIG_COMPAT_BRK is not set | ||
131 | CONFIG_BASE_FULL=y | 144 | CONFIG_BASE_FULL=y |
132 | CONFIG_FUTEX=y | 145 | CONFIG_FUTEX=y |
133 | CONFIG_ANON_INODES=y | ||
134 | CONFIG_EPOLL=y | 146 | CONFIG_EPOLL=y |
135 | CONFIG_SIGNALFD=y | 147 | CONFIG_SIGNALFD=y |
136 | CONFIG_TIMERFD=y | 148 | CONFIG_TIMERFD=y |
@@ -140,6 +152,7 @@ CONFIG_AIO=y | |||
140 | CONFIG_VM_EVENT_COUNTERS=y | 152 | CONFIG_VM_EVENT_COUNTERS=y |
141 | CONFIG_PCI_QUIRKS=y | 153 | CONFIG_PCI_QUIRKS=y |
142 | CONFIG_SLUB_DEBUG=y | 154 | CONFIG_SLUB_DEBUG=y |
155 | # CONFIG_COMPAT_BRK is not set | ||
143 | # CONFIG_SLAB is not set | 156 | # CONFIG_SLAB is not set |
144 | CONFIG_SLUB=y | 157 | CONFIG_SLUB=y |
145 | # CONFIG_SLOB is not set | 158 | # CONFIG_SLOB is not set |
@@ -155,6 +168,8 @@ CONFIG_HAVE_IOREMAP_PROT=y | |||
155 | CONFIG_HAVE_KPROBES=y | 168 | CONFIG_HAVE_KPROBES=y |
156 | CONFIG_HAVE_KRETPROBES=y | 169 | CONFIG_HAVE_KRETPROBES=y |
157 | CONFIG_HAVE_ARCH_TRACEHOOK=y | 170 | CONFIG_HAVE_ARCH_TRACEHOOK=y |
171 | CONFIG_HAVE_DMA_API_DEBUG=y | ||
172 | # CONFIG_SLOW_WORK is not set | ||
158 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | 173 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set |
159 | CONFIG_SLABINFO=y | 174 | CONFIG_SLABINFO=y |
160 | CONFIG_RT_MUTEXES=y | 175 | CONFIG_RT_MUTEXES=y |
@@ -167,7 +182,6 @@ CONFIG_MODULE_FORCE_UNLOAD=y | |||
167 | # CONFIG_MODULE_SRCVERSION_ALL is not set | 182 | # CONFIG_MODULE_SRCVERSION_ALL is not set |
168 | CONFIG_STOP_MACHINE=y | 183 | CONFIG_STOP_MACHINE=y |
169 | CONFIG_BLOCK=y | 184 | CONFIG_BLOCK=y |
170 | CONFIG_BLK_DEV_IO_TRACE=y | ||
171 | CONFIG_BLK_DEV_BSG=y | 185 | CONFIG_BLK_DEV_BSG=y |
172 | # CONFIG_BLK_DEV_INTEGRITY is not set | 186 | # CONFIG_BLK_DEV_INTEGRITY is not set |
173 | CONFIG_BLOCK_COMPAT=y | 187 | CONFIG_BLOCK_COMPAT=y |
@@ -195,12 +209,10 @@ CONFIG_HIGH_RES_TIMERS=y | |||
195 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | 209 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y |
196 | CONFIG_SMP=y | 210 | CONFIG_SMP=y |
197 | CONFIG_SPARSE_IRQ=y | 211 | CONFIG_SPARSE_IRQ=y |
198 | # CONFIG_NUMA_MIGRATE_IRQ_DESC is not set | ||
199 | CONFIG_X86_FIND_SMP_CONFIG=y | ||
200 | CONFIG_X86_MPPARSE=y | 212 | CONFIG_X86_MPPARSE=y |
201 | # CONFIG_X86_ELAN is not set | 213 | CONFIG_X86_EXTENDED_PLATFORM=y |
202 | # CONFIG_X86_GENERICARCH is not set | ||
203 | # CONFIG_X86_VSMP is not set | 214 | # CONFIG_X86_VSMP is not set |
215 | # CONFIG_X86_UV is not set | ||
204 | CONFIG_SCHED_OMIT_FRAME_POINTER=y | 216 | CONFIG_SCHED_OMIT_FRAME_POINTER=y |
205 | # CONFIG_PARAVIRT_GUEST is not set | 217 | # CONFIG_PARAVIRT_GUEST is not set |
206 | # CONFIG_MEMTEST is not set | 218 | # CONFIG_MEMTEST is not set |
@@ -230,10 +242,10 @@ CONFIG_SCHED_OMIT_FRAME_POINTER=y | |||
230 | # CONFIG_MCORE2 is not set | 242 | # CONFIG_MCORE2 is not set |
231 | CONFIG_GENERIC_CPU=y | 243 | CONFIG_GENERIC_CPU=y |
232 | CONFIG_X86_CPU=y | 244 | CONFIG_X86_CPU=y |
233 | CONFIG_X86_L1_CACHE_BYTES=128 | 245 | CONFIG_X86_L1_CACHE_BYTES=64 |
234 | CONFIG_X86_INTERNODE_CACHE_BYTES=128 | 246 | CONFIG_X86_INTERNODE_CACHE_BYTES=64 |
235 | CONFIG_X86_CMPXCHG=y | 247 | CONFIG_X86_CMPXCHG=y |
236 | CONFIG_X86_L1_CACHE_SHIFT=7 | 248 | CONFIG_X86_L1_CACHE_SHIFT=6 |
237 | CONFIG_X86_WP_WORKS_OK=y | 249 | CONFIG_X86_WP_WORKS_OK=y |
238 | CONFIG_X86_TSC=y | 250 | CONFIG_X86_TSC=y |
239 | CONFIG_X86_CMPXCHG64=y | 251 | CONFIG_X86_CMPXCHG64=y |
@@ -242,7 +254,7 @@ CONFIG_X86_MINIMUM_CPU_FAMILY=64 | |||
242 | CONFIG_X86_DEBUGCTLMSR=y | 254 | CONFIG_X86_DEBUGCTLMSR=y |
243 | CONFIG_CPU_SUP_INTEL=y | 255 | CONFIG_CPU_SUP_INTEL=y |
244 | CONFIG_CPU_SUP_AMD=y | 256 | CONFIG_CPU_SUP_AMD=y |
245 | CONFIG_CPU_SUP_CENTAUR_64=y | 257 | CONFIG_CPU_SUP_CENTAUR=y |
246 | CONFIG_X86_DS=y | 258 | CONFIG_X86_DS=y |
247 | CONFIG_X86_PTRACE_BTS=y | 259 | CONFIG_X86_PTRACE_BTS=y |
248 | CONFIG_HPET_TIMER=y | 260 | CONFIG_HPET_TIMER=y |
@@ -269,6 +281,7 @@ CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS=y | |||
269 | CONFIG_X86_MCE=y | 281 | CONFIG_X86_MCE=y |
270 | CONFIG_X86_MCE_INTEL=y | 282 | CONFIG_X86_MCE_INTEL=y |
271 | CONFIG_X86_MCE_AMD=y | 283 | CONFIG_X86_MCE_AMD=y |
284 | CONFIG_X86_MCE_THRESHOLD=y | ||
272 | # CONFIG_I8K is not set | 285 | # CONFIG_I8K is not set |
273 | CONFIG_MICROCODE=y | 286 | CONFIG_MICROCODE=y |
274 | CONFIG_MICROCODE_INTEL=y | 287 | CONFIG_MICROCODE_INTEL=y |
@@ -276,6 +289,7 @@ CONFIG_MICROCODE_AMD=y | |||
276 | CONFIG_MICROCODE_OLD_INTERFACE=y | 289 | CONFIG_MICROCODE_OLD_INTERFACE=y |
277 | CONFIG_X86_MSR=y | 290 | CONFIG_X86_MSR=y |
278 | CONFIG_X86_CPUID=y | 291 | CONFIG_X86_CPUID=y |
292 | # CONFIG_X86_CPU_DEBUG is not set | ||
279 | CONFIG_ARCH_PHYS_ADDR_T_64BIT=y | 293 | CONFIG_ARCH_PHYS_ADDR_T_64BIT=y |
280 | CONFIG_DIRECT_GBPAGES=y | 294 | CONFIG_DIRECT_GBPAGES=y |
281 | CONFIG_NUMA=y | 295 | CONFIG_NUMA=y |
@@ -309,6 +323,8 @@ CONFIG_ZONE_DMA_FLAG=1 | |||
309 | CONFIG_BOUNCE=y | 323 | CONFIG_BOUNCE=y |
310 | CONFIG_VIRT_TO_BUS=y | 324 | CONFIG_VIRT_TO_BUS=y |
311 | CONFIG_UNEVICTABLE_LRU=y | 325 | CONFIG_UNEVICTABLE_LRU=y |
326 | CONFIG_HAVE_MLOCK=y | ||
327 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
312 | CONFIG_X86_CHECK_BIOS_CORRUPTION=y | 328 | CONFIG_X86_CHECK_BIOS_CORRUPTION=y |
313 | CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y | 329 | CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y |
314 | CONFIG_X86_RESERVE_LOW_64K=y | 330 | CONFIG_X86_RESERVE_LOW_64K=y |
@@ -317,6 +333,7 @@ CONFIG_MTRR=y | |||
317 | CONFIG_X86_PAT=y | 333 | CONFIG_X86_PAT=y |
318 | CONFIG_EFI=y | 334 | CONFIG_EFI=y |
319 | CONFIG_SECCOMP=y | 335 | CONFIG_SECCOMP=y |
336 | # CONFIG_CC_STACKPROTECTOR is not set | ||
320 | # CONFIG_HZ_100 is not set | 337 | # CONFIG_HZ_100 is not set |
321 | # CONFIG_HZ_250 is not set | 338 | # CONFIG_HZ_250 is not set |
322 | # CONFIG_HZ_300 is not set | 339 | # CONFIG_HZ_300 is not set |
@@ -325,9 +342,10 @@ CONFIG_HZ=1000 | |||
325 | CONFIG_SCHED_HRTICK=y | 342 | CONFIG_SCHED_HRTICK=y |
326 | CONFIG_KEXEC=y | 343 | CONFIG_KEXEC=y |
327 | CONFIG_CRASH_DUMP=y | 344 | CONFIG_CRASH_DUMP=y |
345 | # CONFIG_KEXEC_JUMP is not set | ||
328 | CONFIG_PHYSICAL_START=0x1000000 | 346 | CONFIG_PHYSICAL_START=0x1000000 |
329 | # CONFIG_RELOCATABLE is not set | 347 | CONFIG_RELOCATABLE=y |
330 | CONFIG_PHYSICAL_ALIGN=0x200000 | 348 | CONFIG_PHYSICAL_ALIGN=0x1000000 |
331 | CONFIG_HOTPLUG_CPU=y | 349 | CONFIG_HOTPLUG_CPU=y |
332 | # CONFIG_COMPAT_VDSO is not set | 350 | # CONFIG_COMPAT_VDSO is not set |
333 | # CONFIG_CMDLINE_BOOL is not set | 351 | # CONFIG_CMDLINE_BOOL is not set |
@@ -370,7 +388,6 @@ CONFIG_ACPI_NUMA=y | |||
370 | CONFIG_ACPI_BLACKLIST_YEAR=0 | 388 | CONFIG_ACPI_BLACKLIST_YEAR=0 |
371 | # CONFIG_ACPI_DEBUG is not set | 389 | # CONFIG_ACPI_DEBUG is not set |
372 | # CONFIG_ACPI_PCI_SLOT is not set | 390 | # CONFIG_ACPI_PCI_SLOT is not set |
373 | CONFIG_ACPI_SYSTEM=y | ||
374 | CONFIG_X86_PM_TIMER=y | 391 | CONFIG_X86_PM_TIMER=y |
375 | CONFIG_ACPI_CONTAINER=y | 392 | CONFIG_ACPI_CONTAINER=y |
376 | # CONFIG_ACPI_SBS is not set | 393 | # CONFIG_ACPI_SBS is not set |
@@ -436,6 +453,7 @@ CONFIG_PCI_MSI=y | |||
436 | # CONFIG_PCI_DEBUG is not set | 453 | # CONFIG_PCI_DEBUG is not set |
437 | # CONFIG_PCI_STUB is not set | 454 | # CONFIG_PCI_STUB is not set |
438 | CONFIG_HT_IRQ=y | 455 | CONFIG_HT_IRQ=y |
456 | # CONFIG_PCI_IOV is not set | ||
439 | CONFIG_ISA_DMA_API=y | 457 | CONFIG_ISA_DMA_API=y |
440 | CONFIG_K8_NB=y | 458 | CONFIG_K8_NB=y |
441 | CONFIG_PCCARD=y | 459 | CONFIG_PCCARD=y |
@@ -481,7 +499,6 @@ CONFIG_NET=y | |||
481 | # | 499 | # |
482 | # Networking options | 500 | # Networking options |
483 | # | 501 | # |
484 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
485 | CONFIG_PACKET=y | 502 | CONFIG_PACKET=y |
486 | CONFIG_PACKET_MMAP=y | 503 | CONFIG_PACKET_MMAP=y |
487 | CONFIG_UNIX=y | 504 | CONFIG_UNIX=y |
@@ -639,6 +656,7 @@ CONFIG_LLC=y | |||
639 | # CONFIG_LAPB is not set | 656 | # CONFIG_LAPB is not set |
640 | # CONFIG_ECONET is not set | 657 | # CONFIG_ECONET is not set |
641 | # CONFIG_WAN_ROUTER is not set | 658 | # CONFIG_WAN_ROUTER is not set |
659 | # CONFIG_PHONET is not set | ||
642 | CONFIG_NET_SCHED=y | 660 | CONFIG_NET_SCHED=y |
643 | 661 | ||
644 | # | 662 | # |
@@ -696,6 +714,7 @@ CONFIG_NET_SCH_FIFO=y | |||
696 | # | 714 | # |
697 | # CONFIG_NET_PKTGEN is not set | 715 | # CONFIG_NET_PKTGEN is not set |
698 | # CONFIG_NET_TCPPROBE is not set | 716 | # CONFIG_NET_TCPPROBE is not set |
717 | # CONFIG_NET_DROP_MONITOR is not set | ||
699 | CONFIG_HAMRADIO=y | 718 | CONFIG_HAMRADIO=y |
700 | 719 | ||
701 | # | 720 | # |
@@ -706,12 +725,10 @@ CONFIG_HAMRADIO=y | |||
706 | # CONFIG_IRDA is not set | 725 | # CONFIG_IRDA is not set |
707 | # CONFIG_BT is not set | 726 | # CONFIG_BT is not set |
708 | # CONFIG_AF_RXRPC is not set | 727 | # CONFIG_AF_RXRPC is not set |
709 | # CONFIG_PHONET is not set | ||
710 | CONFIG_FIB_RULES=y | 728 | CONFIG_FIB_RULES=y |
711 | CONFIG_WIRELESS=y | 729 | CONFIG_WIRELESS=y |
712 | CONFIG_CFG80211=y | 730 | CONFIG_CFG80211=y |
713 | # CONFIG_CFG80211_REG_DEBUG is not set | 731 | # CONFIG_CFG80211_REG_DEBUG is not set |
714 | CONFIG_NL80211=y | ||
715 | CONFIG_WIRELESS_OLD_REGULATORY=y | 732 | CONFIG_WIRELESS_OLD_REGULATORY=y |
716 | CONFIG_WIRELESS_EXT=y | 733 | CONFIG_WIRELESS_EXT=y |
717 | CONFIG_WIRELESS_EXT_SYSFS=y | 734 | CONFIG_WIRELESS_EXT_SYSFS=y |
@@ -788,9 +805,8 @@ CONFIG_MISC_DEVICES=y | |||
788 | # CONFIG_TIFM_CORE is not set | 805 | # CONFIG_TIFM_CORE is not set |
789 | # CONFIG_ICS932S401 is not set | 806 | # CONFIG_ICS932S401 is not set |
790 | # CONFIG_ENCLOSURE_SERVICES is not set | 807 | # CONFIG_ENCLOSURE_SERVICES is not set |
791 | # CONFIG_SGI_XP is not set | ||
792 | # CONFIG_HP_ILO is not set | 808 | # CONFIG_HP_ILO is not set |
793 | # CONFIG_SGI_GRU is not set | 809 | # CONFIG_ISL29003 is not set |
794 | # CONFIG_C2PORT is not set | 810 | # CONFIG_C2PORT is not set |
795 | 811 | ||
796 | # | 812 | # |
@@ -844,6 +860,7 @@ CONFIG_SCSI_SPI_ATTRS=y | |||
844 | # CONFIG_SCSI_LOWLEVEL is not set | 860 | # CONFIG_SCSI_LOWLEVEL is not set |
845 | # CONFIG_SCSI_LOWLEVEL_PCMCIA is not set | 861 | # CONFIG_SCSI_LOWLEVEL_PCMCIA is not set |
846 | # CONFIG_SCSI_DH is not set | 862 | # CONFIG_SCSI_DH is not set |
863 | # CONFIG_SCSI_OSD_INITIATOR is not set | ||
847 | CONFIG_ATA=y | 864 | CONFIG_ATA=y |
848 | # CONFIG_ATA_NONSTANDARD is not set | 865 | # CONFIG_ATA_NONSTANDARD is not set |
849 | CONFIG_ATA_ACPI=y | 866 | CONFIG_ATA_ACPI=y |
@@ -940,6 +957,7 @@ CONFIG_DM_ZERO=y | |||
940 | CONFIG_MACINTOSH_DRIVERS=y | 957 | CONFIG_MACINTOSH_DRIVERS=y |
941 | CONFIG_MAC_EMUMOUSEBTN=y | 958 | CONFIG_MAC_EMUMOUSEBTN=y |
942 | CONFIG_NETDEVICES=y | 959 | CONFIG_NETDEVICES=y |
960 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
943 | # CONFIG_IFB is not set | 961 | # CONFIG_IFB is not set |
944 | # CONFIG_DUMMY is not set | 962 | # CONFIG_DUMMY is not set |
945 | # CONFIG_BONDING is not set | 963 | # CONFIG_BONDING is not set |
@@ -977,6 +995,8 @@ CONFIG_MII=y | |||
977 | CONFIG_NET_VENDOR_3COM=y | 995 | CONFIG_NET_VENDOR_3COM=y |
978 | # CONFIG_VORTEX is not set | 996 | # CONFIG_VORTEX is not set |
979 | # CONFIG_TYPHOON is not set | 997 | # CONFIG_TYPHOON is not set |
998 | # CONFIG_ETHOC is not set | ||
999 | # CONFIG_DNET is not set | ||
980 | CONFIG_NET_TULIP=y | 1000 | CONFIG_NET_TULIP=y |
981 | # CONFIG_DE2104X is not set | 1001 | # CONFIG_DE2104X is not set |
982 | # CONFIG_TULIP is not set | 1002 | # CONFIG_TULIP is not set |
@@ -1026,6 +1046,7 @@ CONFIG_E1000=y | |||
1026 | # CONFIG_E1000E is not set | 1046 | # CONFIG_E1000E is not set |
1027 | # CONFIG_IP1000 is not set | 1047 | # CONFIG_IP1000 is not set |
1028 | # CONFIG_IGB is not set | 1048 | # CONFIG_IGB is not set |
1049 | # CONFIG_IGBVF is not set | ||
1029 | # CONFIG_NS83820 is not set | 1050 | # CONFIG_NS83820 is not set |
1030 | # CONFIG_HAMACHI is not set | 1051 | # CONFIG_HAMACHI is not set |
1031 | # CONFIG_YELLOWFIN is not set | 1052 | # CONFIG_YELLOWFIN is not set |
@@ -1040,6 +1061,7 @@ CONFIG_TIGON3=y | |||
1040 | # CONFIG_QLA3XXX is not set | 1061 | # CONFIG_QLA3XXX is not set |
1041 | # CONFIG_ATL1 is not set | 1062 | # CONFIG_ATL1 is not set |
1042 | # CONFIG_ATL1E is not set | 1063 | # CONFIG_ATL1E is not set |
1064 | # CONFIG_ATL1C is not set | ||
1043 | # CONFIG_JME is not set | 1065 | # CONFIG_JME is not set |
1044 | CONFIG_NETDEV_10000=y | 1066 | CONFIG_NETDEV_10000=y |
1045 | # CONFIG_CHELSIO_T1 is not set | 1067 | # CONFIG_CHELSIO_T1 is not set |
@@ -1049,6 +1071,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y | |||
1049 | # CONFIG_IXGBE is not set | 1071 | # CONFIG_IXGBE is not set |
1050 | # CONFIG_IXGB is not set | 1072 | # CONFIG_IXGB is not set |
1051 | # CONFIG_S2IO is not set | 1073 | # CONFIG_S2IO is not set |
1074 | # CONFIG_VXGE is not set | ||
1052 | # CONFIG_MYRI10GE is not set | 1075 | # CONFIG_MYRI10GE is not set |
1053 | # CONFIG_NETXEN_NIC is not set | 1076 | # CONFIG_NETXEN_NIC is not set |
1054 | # CONFIG_NIU is not set | 1077 | # CONFIG_NIU is not set |
@@ -1058,6 +1081,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y | |||
1058 | # CONFIG_BNX2X is not set | 1081 | # CONFIG_BNX2X is not set |
1059 | # CONFIG_QLGE is not set | 1082 | # CONFIG_QLGE is not set |
1060 | # CONFIG_SFC is not set | 1083 | # CONFIG_SFC is not set |
1084 | # CONFIG_BE2NET is not set | ||
1061 | CONFIG_TR=y | 1085 | CONFIG_TR=y |
1062 | # CONFIG_IBMOL is not set | 1086 | # CONFIG_IBMOL is not set |
1063 | # CONFIG_3C359 is not set | 1087 | # CONFIG_3C359 is not set |
@@ -1072,8 +1096,8 @@ CONFIG_WLAN_80211=y | |||
1072 | # CONFIG_LIBERTAS is not set | 1096 | # CONFIG_LIBERTAS is not set |
1073 | # CONFIG_LIBERTAS_THINFIRM is not set | 1097 | # CONFIG_LIBERTAS_THINFIRM is not set |
1074 | # CONFIG_AIRO is not set | 1098 | # CONFIG_AIRO is not set |
1075 | # CONFIG_HERMES is not set | ||
1076 | # CONFIG_ATMEL is not set | 1099 | # CONFIG_ATMEL is not set |
1100 | # CONFIG_AT76C50X_USB is not set | ||
1077 | # CONFIG_AIRO_CS is not set | 1101 | # CONFIG_AIRO_CS is not set |
1078 | # CONFIG_PCMCIA_WL3501 is not set | 1102 | # CONFIG_PCMCIA_WL3501 is not set |
1079 | # CONFIG_PRISM54 is not set | 1103 | # CONFIG_PRISM54 is not set |
@@ -1083,21 +1107,21 @@ CONFIG_WLAN_80211=y | |||
1083 | # CONFIG_RTL8187 is not set | 1107 | # CONFIG_RTL8187 is not set |
1084 | # CONFIG_ADM8211 is not set | 1108 | # CONFIG_ADM8211 is not set |
1085 | # CONFIG_MAC80211_HWSIM is not set | 1109 | # CONFIG_MAC80211_HWSIM is not set |
1110 | # CONFIG_MWL8K is not set | ||
1086 | # CONFIG_P54_COMMON is not set | 1111 | # CONFIG_P54_COMMON is not set |
1087 | CONFIG_ATH5K=y | 1112 | CONFIG_ATH5K=y |
1088 | # CONFIG_ATH5K_DEBUG is not set | 1113 | # CONFIG_ATH5K_DEBUG is not set |
1089 | # CONFIG_ATH9K is not set | 1114 | # CONFIG_ATH9K is not set |
1115 | # CONFIG_AR9170_USB is not set | ||
1090 | # CONFIG_IPW2100 is not set | 1116 | # CONFIG_IPW2100 is not set |
1091 | # CONFIG_IPW2200 is not set | 1117 | # CONFIG_IPW2200 is not set |
1092 | # CONFIG_IWLCORE is not set | 1118 | # CONFIG_IWLWIFI is not set |
1093 | # CONFIG_IWLWIFI_LEDS is not set | ||
1094 | # CONFIG_IWLAGN is not set | ||
1095 | # CONFIG_IWL3945 is not set | ||
1096 | # CONFIG_HOSTAP is not set | 1119 | # CONFIG_HOSTAP is not set |
1097 | # CONFIG_B43 is not set | 1120 | # CONFIG_B43 is not set |
1098 | # CONFIG_B43LEGACY is not set | 1121 | # CONFIG_B43LEGACY is not set |
1099 | # CONFIG_ZD1211RW is not set | 1122 | # CONFIG_ZD1211RW is not set |
1100 | # CONFIG_RT2X00 is not set | 1123 | # CONFIG_RT2X00 is not set |
1124 | # CONFIG_HERMES is not set | ||
1101 | 1125 | ||
1102 | # | 1126 | # |
1103 | # Enable WiMAX (Networking options) to see the WiMAX drivers | 1127 | # Enable WiMAX (Networking options) to see the WiMAX drivers |
@@ -1208,6 +1232,8 @@ CONFIG_INPUT_TABLET=y | |||
1208 | # CONFIG_TABLET_USB_KBTAB is not set | 1232 | # CONFIG_TABLET_USB_KBTAB is not set |
1209 | # CONFIG_TABLET_USB_WACOM is not set | 1233 | # CONFIG_TABLET_USB_WACOM is not set |
1210 | CONFIG_INPUT_TOUCHSCREEN=y | 1234 | CONFIG_INPUT_TOUCHSCREEN=y |
1235 | # CONFIG_TOUCHSCREEN_AD7879_I2C is not set | ||
1236 | # CONFIG_TOUCHSCREEN_AD7879 is not set | ||
1211 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | 1237 | # CONFIG_TOUCHSCREEN_FUJITSU is not set |
1212 | # CONFIG_TOUCHSCREEN_GUNZE is not set | 1238 | # CONFIG_TOUCHSCREEN_GUNZE is not set |
1213 | # CONFIG_TOUCHSCREEN_ELO is not set | 1239 | # CONFIG_TOUCHSCREEN_ELO is not set |
@@ -1301,6 +1327,7 @@ CONFIG_UNIX98_PTYS=y | |||
1301 | # CONFIG_LEGACY_PTYS is not set | 1327 | # CONFIG_LEGACY_PTYS is not set |
1302 | # CONFIG_IPMI_HANDLER is not set | 1328 | # CONFIG_IPMI_HANDLER is not set |
1303 | CONFIG_HW_RANDOM=y | 1329 | CONFIG_HW_RANDOM=y |
1330 | # CONFIG_HW_RANDOM_TIMERIOMEM is not set | ||
1304 | # CONFIG_HW_RANDOM_INTEL is not set | 1331 | # CONFIG_HW_RANDOM_INTEL is not set |
1305 | # CONFIG_HW_RANDOM_AMD is not set | 1332 | # CONFIG_HW_RANDOM_AMD is not set |
1306 | CONFIG_NVRAM=y | 1333 | CONFIG_NVRAM=y |
@@ -1382,7 +1409,6 @@ CONFIG_I2C_I801=y | |||
1382 | # CONFIG_SENSORS_PCF8574 is not set | 1409 | # CONFIG_SENSORS_PCF8574 is not set |
1383 | # CONFIG_PCF8575 is not set | 1410 | # CONFIG_PCF8575 is not set |
1384 | # CONFIG_SENSORS_PCA9539 is not set | 1411 | # CONFIG_SENSORS_PCA9539 is not set |
1385 | # CONFIG_SENSORS_PCF8591 is not set | ||
1386 | # CONFIG_SENSORS_MAX6875 is not set | 1412 | # CONFIG_SENSORS_MAX6875 is not set |
1387 | # CONFIG_SENSORS_TSL2550 is not set | 1413 | # CONFIG_SENSORS_TSL2550 is not set |
1388 | # CONFIG_I2C_DEBUG_CORE is not set | 1414 | # CONFIG_I2C_DEBUG_CORE is not set |
@@ -1416,6 +1442,7 @@ CONFIG_HWMON=y | |||
1416 | # CONFIG_SENSORS_ADT7475 is not set | 1442 | # CONFIG_SENSORS_ADT7475 is not set |
1417 | # CONFIG_SENSORS_K8TEMP is not set | 1443 | # CONFIG_SENSORS_K8TEMP is not set |
1418 | # CONFIG_SENSORS_ASB100 is not set | 1444 | # CONFIG_SENSORS_ASB100 is not set |
1445 | # CONFIG_SENSORS_ATK0110 is not set | ||
1419 | # CONFIG_SENSORS_ATXP1 is not set | 1446 | # CONFIG_SENSORS_ATXP1 is not set |
1420 | # CONFIG_SENSORS_DS1621 is not set | 1447 | # CONFIG_SENSORS_DS1621 is not set |
1421 | # CONFIG_SENSORS_I5K_AMB is not set | 1448 | # CONFIG_SENSORS_I5K_AMB is not set |
@@ -1425,6 +1452,7 @@ CONFIG_HWMON=y | |||
1425 | # CONFIG_SENSORS_FSCHER is not set | 1452 | # CONFIG_SENSORS_FSCHER is not set |
1426 | # CONFIG_SENSORS_FSCPOS is not set | 1453 | # CONFIG_SENSORS_FSCPOS is not set |
1427 | # CONFIG_SENSORS_FSCHMD is not set | 1454 | # CONFIG_SENSORS_FSCHMD is not set |
1455 | # CONFIG_SENSORS_G760A is not set | ||
1428 | # CONFIG_SENSORS_GL518SM is not set | 1456 | # CONFIG_SENSORS_GL518SM is not set |
1429 | # CONFIG_SENSORS_GL520SM is not set | 1457 | # CONFIG_SENSORS_GL520SM is not set |
1430 | # CONFIG_SENSORS_CORETEMP is not set | 1458 | # CONFIG_SENSORS_CORETEMP is not set |
@@ -1440,11 +1468,14 @@ CONFIG_HWMON=y | |||
1440 | # CONFIG_SENSORS_LM90 is not set | 1468 | # CONFIG_SENSORS_LM90 is not set |
1441 | # CONFIG_SENSORS_LM92 is not set | 1469 | # CONFIG_SENSORS_LM92 is not set |
1442 | # CONFIG_SENSORS_LM93 is not set | 1470 | # CONFIG_SENSORS_LM93 is not set |
1471 | # CONFIG_SENSORS_LTC4215 is not set | ||
1443 | # CONFIG_SENSORS_LTC4245 is not set | 1472 | # CONFIG_SENSORS_LTC4245 is not set |
1473 | # CONFIG_SENSORS_LM95241 is not set | ||
1444 | # CONFIG_SENSORS_MAX1619 is not set | 1474 | # CONFIG_SENSORS_MAX1619 is not set |
1445 | # CONFIG_SENSORS_MAX6650 is not set | 1475 | # CONFIG_SENSORS_MAX6650 is not set |
1446 | # CONFIG_SENSORS_PC87360 is not set | 1476 | # CONFIG_SENSORS_PC87360 is not set |
1447 | # CONFIG_SENSORS_PC87427 is not set | 1477 | # CONFIG_SENSORS_PC87427 is not set |
1478 | # CONFIG_SENSORS_PCF8591 is not set | ||
1448 | # CONFIG_SENSORS_SIS5595 is not set | 1479 | # CONFIG_SENSORS_SIS5595 is not set |
1449 | # CONFIG_SENSORS_DME1737 is not set | 1480 | # CONFIG_SENSORS_DME1737 is not set |
1450 | # CONFIG_SENSORS_SMSC47M1 is not set | 1481 | # CONFIG_SENSORS_SMSC47M1 is not set |
@@ -1635,6 +1666,7 @@ CONFIG_FB_EFI=y | |||
1635 | # CONFIG_FB_VIRTUAL is not set | 1666 | # CONFIG_FB_VIRTUAL is not set |
1636 | # CONFIG_FB_METRONOME is not set | 1667 | # CONFIG_FB_METRONOME is not set |
1637 | # CONFIG_FB_MB862XX is not set | 1668 | # CONFIG_FB_MB862XX is not set |
1669 | # CONFIG_FB_BROADSHEET is not set | ||
1638 | CONFIG_BACKLIGHT_LCD_SUPPORT=y | 1670 | CONFIG_BACKLIGHT_LCD_SUPPORT=y |
1639 | # CONFIG_LCD_CLASS_DEVICE is not set | 1671 | # CONFIG_LCD_CLASS_DEVICE is not set |
1640 | CONFIG_BACKLIGHT_CLASS_DEVICE=y | 1672 | CONFIG_BACKLIGHT_CLASS_DEVICE=y |
@@ -1720,6 +1752,8 @@ CONFIG_SND_PCI=y | |||
1720 | # CONFIG_SND_INDIGO is not set | 1752 | # CONFIG_SND_INDIGO is not set |
1721 | # CONFIG_SND_INDIGOIO is not set | 1753 | # CONFIG_SND_INDIGOIO is not set |
1722 | # CONFIG_SND_INDIGODJ is not set | 1754 | # CONFIG_SND_INDIGODJ is not set |
1755 | # CONFIG_SND_INDIGOIOX is not set | ||
1756 | # CONFIG_SND_INDIGODJX is not set | ||
1723 | # CONFIG_SND_EMU10K1 is not set | 1757 | # CONFIG_SND_EMU10K1 is not set |
1724 | # CONFIG_SND_EMU10K1X is not set | 1758 | # CONFIG_SND_EMU10K1X is not set |
1725 | # CONFIG_SND_ENS1370 is not set | 1759 | # CONFIG_SND_ENS1370 is not set |
@@ -1792,15 +1826,17 @@ CONFIG_USB_HIDDEV=y | |||
1792 | # | 1826 | # |
1793 | # Special HID drivers | 1827 | # Special HID drivers |
1794 | # | 1828 | # |
1795 | CONFIG_HID_COMPAT=y | ||
1796 | CONFIG_HID_A4TECH=y | 1829 | CONFIG_HID_A4TECH=y |
1797 | CONFIG_HID_APPLE=y | 1830 | CONFIG_HID_APPLE=y |
1798 | CONFIG_HID_BELKIN=y | 1831 | CONFIG_HID_BELKIN=y |
1799 | CONFIG_HID_CHERRY=y | 1832 | CONFIG_HID_CHERRY=y |
1800 | CONFIG_HID_CHICONY=y | 1833 | CONFIG_HID_CHICONY=y |
1801 | CONFIG_HID_CYPRESS=y | 1834 | CONFIG_HID_CYPRESS=y |
1835 | # CONFIG_DRAGONRISE_FF is not set | ||
1802 | CONFIG_HID_EZKEY=y | 1836 | CONFIG_HID_EZKEY=y |
1837 | CONFIG_HID_KYE=y | ||
1803 | CONFIG_HID_GYRATION=y | 1838 | CONFIG_HID_GYRATION=y |
1839 | CONFIG_HID_KENSINGTON=y | ||
1804 | CONFIG_HID_LOGITECH=y | 1840 | CONFIG_HID_LOGITECH=y |
1805 | CONFIG_LOGITECH_FF=y | 1841 | CONFIG_LOGITECH_FF=y |
1806 | # CONFIG_LOGIRUMBLEPAD2_FF is not set | 1842 | # CONFIG_LOGIRUMBLEPAD2_FF is not set |
@@ -1866,11 +1902,11 @@ CONFIG_USB_PRINTER=y | |||
1866 | # CONFIG_USB_TMC is not set | 1902 | # CONFIG_USB_TMC is not set |
1867 | 1903 | ||
1868 | # | 1904 | # |
1869 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; | 1905 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may |
1870 | # | 1906 | # |
1871 | 1907 | ||
1872 | # | 1908 | # |
1873 | # see USB_STORAGE Help for more information | 1909 | # also be needed; see USB_STORAGE Help for more info |
1874 | # | 1910 | # |
1875 | CONFIG_USB_STORAGE=y | 1911 | CONFIG_USB_STORAGE=y |
1876 | # CONFIG_USB_STORAGE_DEBUG is not set | 1912 | # CONFIG_USB_STORAGE_DEBUG is not set |
@@ -1912,7 +1948,6 @@ CONFIG_USB_LIBUSUAL=y | |||
1912 | # CONFIG_USB_LED is not set | 1948 | # CONFIG_USB_LED is not set |
1913 | # CONFIG_USB_CYPRESS_CY7C63 is not set | 1949 | # CONFIG_USB_CYPRESS_CY7C63 is not set |
1914 | # CONFIG_USB_CYTHERM is not set | 1950 | # CONFIG_USB_CYTHERM is not set |
1915 | # CONFIG_USB_PHIDGET is not set | ||
1916 | # CONFIG_USB_IDMOUSE is not set | 1951 | # CONFIG_USB_IDMOUSE is not set |
1917 | # CONFIG_USB_FTDI_ELAN is not set | 1952 | # CONFIG_USB_FTDI_ELAN is not set |
1918 | # CONFIG_USB_APPLEDISPLAY is not set | 1953 | # CONFIG_USB_APPLEDISPLAY is not set |
@@ -1928,6 +1963,7 @@ CONFIG_USB_LIBUSUAL=y | |||
1928 | # | 1963 | # |
1929 | # OTG and related infrastructure | 1964 | # OTG and related infrastructure |
1930 | # | 1965 | # |
1966 | # CONFIG_NOP_USB_XCEIV is not set | ||
1931 | # CONFIG_UWB is not set | 1967 | # CONFIG_UWB is not set |
1932 | # CONFIG_MMC is not set | 1968 | # CONFIG_MMC is not set |
1933 | # CONFIG_MEMSTICK is not set | 1969 | # CONFIG_MEMSTICK is not set |
@@ -1939,8 +1975,10 @@ CONFIG_LEDS_CLASS=y | |||
1939 | # | 1975 | # |
1940 | # CONFIG_LEDS_ALIX2 is not set | 1976 | # CONFIG_LEDS_ALIX2 is not set |
1941 | # CONFIG_LEDS_PCA9532 is not set | 1977 | # CONFIG_LEDS_PCA9532 is not set |
1978 | # CONFIG_LEDS_LP5521 is not set | ||
1942 | # CONFIG_LEDS_CLEVO_MAIL is not set | 1979 | # CONFIG_LEDS_CLEVO_MAIL is not set |
1943 | # CONFIG_LEDS_PCA955X is not set | 1980 | # CONFIG_LEDS_PCA955X is not set |
1981 | # CONFIG_LEDS_BD2802 is not set | ||
1944 | 1982 | ||
1945 | # | 1983 | # |
1946 | # LED Triggers | 1984 | # LED Triggers |
@@ -1950,6 +1988,10 @@ CONFIG_LEDS_TRIGGERS=y | |||
1950 | # CONFIG_LEDS_TRIGGER_HEARTBEAT is not set | 1988 | # CONFIG_LEDS_TRIGGER_HEARTBEAT is not set |
1951 | # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set | 1989 | # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set |
1952 | # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set | 1990 | # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set |
1991 | |||
1992 | # | ||
1993 | # iptables trigger is under Netfilter config (LED target) | ||
1994 | # | ||
1953 | # CONFIG_ACCESSIBILITY is not set | 1995 | # CONFIG_ACCESSIBILITY is not set |
1954 | # CONFIG_INFINIBAND is not set | 1996 | # CONFIG_INFINIBAND is not set |
1955 | CONFIG_EDAC=y | 1997 | CONFIG_EDAC=y |
@@ -2018,6 +2060,7 @@ CONFIG_DMADEVICES=y | |||
2018 | # DMA Devices | 2060 | # DMA Devices |
2019 | # | 2061 | # |
2020 | # CONFIG_INTEL_IOATDMA is not set | 2062 | # CONFIG_INTEL_IOATDMA is not set |
2063 | # CONFIG_AUXDISPLAY is not set | ||
2021 | # CONFIG_UIO is not set | 2064 | # CONFIG_UIO is not set |
2022 | # CONFIG_STAGING is not set | 2065 | # CONFIG_STAGING is not set |
2023 | CONFIG_X86_PLATFORM_DEVICES=y | 2066 | CONFIG_X86_PLATFORM_DEVICES=y |
@@ -2051,6 +2094,7 @@ CONFIG_DMIID=y | |||
2051 | # | 2094 | # |
2052 | # CONFIG_EXT2_FS is not set | 2095 | # CONFIG_EXT2_FS is not set |
2053 | CONFIG_EXT3_FS=y | 2096 | CONFIG_EXT3_FS=y |
2097 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
2054 | CONFIG_EXT3_FS_XATTR=y | 2098 | CONFIG_EXT3_FS_XATTR=y |
2055 | CONFIG_EXT3_FS_POSIX_ACL=y | 2099 | CONFIG_EXT3_FS_POSIX_ACL=y |
2056 | CONFIG_EXT3_FS_SECURITY=y | 2100 | CONFIG_EXT3_FS_SECURITY=y |
@@ -2082,6 +2126,11 @@ CONFIG_AUTOFS4_FS=y | |||
2082 | CONFIG_GENERIC_ACL=y | 2126 | CONFIG_GENERIC_ACL=y |
2083 | 2127 | ||
2084 | # | 2128 | # |
2129 | # Caches | ||
2130 | # | ||
2131 | # CONFIG_FSCACHE is not set | ||
2132 | |||
2133 | # | ||
2085 | # CD-ROM/DVD Filesystems | 2134 | # CD-ROM/DVD Filesystems |
2086 | # | 2135 | # |
2087 | CONFIG_ISO9660_FS=y | 2136 | CONFIG_ISO9660_FS=y |
@@ -2132,6 +2181,7 @@ CONFIG_MISC_FILESYSTEMS=y | |||
2132 | # CONFIG_ROMFS_FS is not set | 2181 | # CONFIG_ROMFS_FS is not set |
2133 | # CONFIG_SYSV_FS is not set | 2182 | # CONFIG_SYSV_FS is not set |
2134 | # CONFIG_UFS_FS is not set | 2183 | # CONFIG_UFS_FS is not set |
2184 | # CONFIG_NILFS2_FS is not set | ||
2135 | CONFIG_NETWORK_FILESYSTEMS=y | 2185 | CONFIG_NETWORK_FILESYSTEMS=y |
2136 | CONFIG_NFS_FS=y | 2186 | CONFIG_NFS_FS=y |
2137 | CONFIG_NFS_V3=y | 2187 | CONFIG_NFS_V3=y |
@@ -2145,7 +2195,6 @@ CONFIG_NFS_ACL_SUPPORT=y | |||
2145 | CONFIG_NFS_COMMON=y | 2195 | CONFIG_NFS_COMMON=y |
2146 | CONFIG_SUNRPC=y | 2196 | CONFIG_SUNRPC=y |
2147 | CONFIG_SUNRPC_GSS=y | 2197 | CONFIG_SUNRPC_GSS=y |
2148 | # CONFIG_SUNRPC_REGISTER_V4 is not set | ||
2149 | CONFIG_RPCSEC_GSS_KRB5=y | 2198 | CONFIG_RPCSEC_GSS_KRB5=y |
2150 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | 2199 | # CONFIG_RPCSEC_GSS_SPKM3 is not set |
2151 | # CONFIG_SMB_FS is not set | 2200 | # CONFIG_SMB_FS is not set |
@@ -2232,6 +2281,7 @@ CONFIG_DEBUG_FS=y | |||
2232 | CONFIG_DEBUG_KERNEL=y | 2281 | CONFIG_DEBUG_KERNEL=y |
2233 | # CONFIG_DEBUG_SHIRQ is not set | 2282 | # CONFIG_DEBUG_SHIRQ is not set |
2234 | # CONFIG_DETECT_SOFTLOCKUP is not set | 2283 | # CONFIG_DETECT_SOFTLOCKUP is not set |
2284 | # CONFIG_DETECT_HUNG_TASK is not set | ||
2235 | # CONFIG_SCHED_DEBUG is not set | 2285 | # CONFIG_SCHED_DEBUG is not set |
2236 | CONFIG_SCHEDSTATS=y | 2286 | CONFIG_SCHEDSTATS=y |
2237 | CONFIG_TIMER_STATS=y | 2287 | CONFIG_TIMER_STATS=y |
@@ -2247,6 +2297,7 @@ CONFIG_TIMER_STATS=y | |||
2247 | # CONFIG_LOCK_STAT is not set | 2297 | # CONFIG_LOCK_STAT is not set |
2248 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | 2298 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set |
2249 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | 2299 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set |
2300 | CONFIG_STACKTRACE=y | ||
2250 | # CONFIG_DEBUG_KOBJECT is not set | 2301 | # CONFIG_DEBUG_KOBJECT is not set |
2251 | CONFIG_DEBUG_BUGVERBOSE=y | 2302 | CONFIG_DEBUG_BUGVERBOSE=y |
2252 | # CONFIG_DEBUG_INFO is not set | 2303 | # CONFIG_DEBUG_INFO is not set |
@@ -2269,13 +2320,19 @@ CONFIG_FRAME_POINTER=y | |||
2269 | # CONFIG_FAULT_INJECTION is not set | 2320 | # CONFIG_FAULT_INJECTION is not set |
2270 | # CONFIG_LATENCYTOP is not set | 2321 | # CONFIG_LATENCYTOP is not set |
2271 | CONFIG_SYSCTL_SYSCALL_CHECK=y | 2322 | CONFIG_SYSCTL_SYSCALL_CHECK=y |
2323 | # CONFIG_DEBUG_PAGEALLOC is not set | ||
2272 | CONFIG_USER_STACKTRACE_SUPPORT=y | 2324 | CONFIG_USER_STACKTRACE_SUPPORT=y |
2325 | CONFIG_NOP_TRACER=y | ||
2273 | CONFIG_HAVE_FUNCTION_TRACER=y | 2326 | CONFIG_HAVE_FUNCTION_TRACER=y |
2274 | CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y | 2327 | CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y |
2275 | CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y | 2328 | CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y |
2276 | CONFIG_HAVE_DYNAMIC_FTRACE=y | 2329 | CONFIG_HAVE_DYNAMIC_FTRACE=y |
2277 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | 2330 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y |
2278 | CONFIG_HAVE_HW_BRANCH_TRACER=y | 2331 | CONFIG_HAVE_HW_BRANCH_TRACER=y |
2332 | CONFIG_HAVE_FTRACE_SYSCALLS=y | ||
2333 | CONFIG_RING_BUFFER=y | ||
2334 | CONFIG_TRACING=y | ||
2335 | CONFIG_TRACING_SUPPORT=y | ||
2279 | 2336 | ||
2280 | # | 2337 | # |
2281 | # Tracers | 2338 | # Tracers |
@@ -2285,13 +2342,21 @@ CONFIG_HAVE_HW_BRANCH_TRACER=y | |||
2285 | # CONFIG_SYSPROF_TRACER is not set | 2342 | # CONFIG_SYSPROF_TRACER is not set |
2286 | # CONFIG_SCHED_TRACER is not set | 2343 | # CONFIG_SCHED_TRACER is not set |
2287 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | 2344 | # CONFIG_CONTEXT_SWITCH_TRACER is not set |
2345 | # CONFIG_EVENT_TRACER is not set | ||
2346 | # CONFIG_FTRACE_SYSCALLS is not set | ||
2288 | # CONFIG_BOOT_TRACER is not set | 2347 | # CONFIG_BOOT_TRACER is not set |
2289 | # CONFIG_TRACE_BRANCH_PROFILING is not set | 2348 | # CONFIG_TRACE_BRANCH_PROFILING is not set |
2290 | # CONFIG_POWER_TRACER is not set | 2349 | # CONFIG_POWER_TRACER is not set |
2291 | # CONFIG_STACK_TRACER is not set | 2350 | # CONFIG_STACK_TRACER is not set |
2292 | # CONFIG_HW_BRANCH_TRACER is not set | 2351 | # CONFIG_HW_BRANCH_TRACER is not set |
2352 | # CONFIG_KMEMTRACE is not set | ||
2353 | # CONFIG_WORKQUEUE_TRACER is not set | ||
2354 | CONFIG_BLK_DEV_IO_TRACE=y | ||
2355 | # CONFIG_FTRACE_STARTUP_TEST is not set | ||
2356 | # CONFIG_MMIOTRACE is not set | ||
2293 | CONFIG_PROVIDE_OHCI1394_DMA_INIT=y | 2357 | CONFIG_PROVIDE_OHCI1394_DMA_INIT=y |
2294 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set | 2358 | # CONFIG_DYNAMIC_DEBUG is not set |
2359 | # CONFIG_DMA_API_DEBUG is not set | ||
2295 | # CONFIG_SAMPLES is not set | 2360 | # CONFIG_SAMPLES is not set |
2296 | CONFIG_HAVE_ARCH_KGDB=y | 2361 | CONFIG_HAVE_ARCH_KGDB=y |
2297 | # CONFIG_KGDB is not set | 2362 | # CONFIG_KGDB is not set |
@@ -2301,14 +2366,13 @@ CONFIG_EARLY_PRINTK=y | |||
2301 | CONFIG_EARLY_PRINTK_DBGP=y | 2366 | CONFIG_EARLY_PRINTK_DBGP=y |
2302 | CONFIG_DEBUG_STACKOVERFLOW=y | 2367 | CONFIG_DEBUG_STACKOVERFLOW=y |
2303 | CONFIG_DEBUG_STACK_USAGE=y | 2368 | CONFIG_DEBUG_STACK_USAGE=y |
2304 | # CONFIG_DEBUG_PAGEALLOC is not set | ||
2305 | # CONFIG_DEBUG_PER_CPU_MAPS is not set | 2369 | # CONFIG_DEBUG_PER_CPU_MAPS is not set |
2306 | # CONFIG_X86_PTDUMP is not set | 2370 | # CONFIG_X86_PTDUMP is not set |
2307 | CONFIG_DEBUG_RODATA=y | 2371 | CONFIG_DEBUG_RODATA=y |
2308 | # CONFIG_DEBUG_RODATA_TEST is not set | 2372 | # CONFIG_DEBUG_RODATA_TEST is not set |
2309 | CONFIG_DEBUG_NX_TEST=m | 2373 | CONFIG_DEBUG_NX_TEST=m |
2310 | # CONFIG_IOMMU_DEBUG is not set | 2374 | # CONFIG_IOMMU_DEBUG is not set |
2311 | # CONFIG_MMIOTRACE is not set | 2375 | CONFIG_HAVE_MMIOTRACE_SUPPORT=y |
2312 | CONFIG_IO_DELAY_TYPE_0X80=0 | 2376 | CONFIG_IO_DELAY_TYPE_0X80=0 |
2313 | CONFIG_IO_DELAY_TYPE_0XED=1 | 2377 | CONFIG_IO_DELAY_TYPE_0XED=1 |
2314 | CONFIG_IO_DELAY_TYPE_UDELAY=2 | 2378 | CONFIG_IO_DELAY_TYPE_UDELAY=2 |
@@ -2344,6 +2408,8 @@ CONFIG_SECURITY_SELINUX_AVC_STATS=y | |||
2344 | CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 | 2408 | CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 |
2345 | # CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set | 2409 | # CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set |
2346 | # CONFIG_SECURITY_SMACK is not set | 2410 | # CONFIG_SECURITY_SMACK is not set |
2411 | # CONFIG_SECURITY_TOMOYO is not set | ||
2412 | # CONFIG_IMA is not set | ||
2347 | CONFIG_CRYPTO=y | 2413 | CONFIG_CRYPTO=y |
2348 | 2414 | ||
2349 | # | 2415 | # |
@@ -2359,10 +2425,12 @@ CONFIG_CRYPTO_BLKCIPHER2=y | |||
2359 | CONFIG_CRYPTO_HASH=y | 2425 | CONFIG_CRYPTO_HASH=y |
2360 | CONFIG_CRYPTO_HASH2=y | 2426 | CONFIG_CRYPTO_HASH2=y |
2361 | CONFIG_CRYPTO_RNG2=y | 2427 | CONFIG_CRYPTO_RNG2=y |
2428 | CONFIG_CRYPTO_PCOMP=y | ||
2362 | CONFIG_CRYPTO_MANAGER=y | 2429 | CONFIG_CRYPTO_MANAGER=y |
2363 | CONFIG_CRYPTO_MANAGER2=y | 2430 | CONFIG_CRYPTO_MANAGER2=y |
2364 | # CONFIG_CRYPTO_GF128MUL is not set | 2431 | # CONFIG_CRYPTO_GF128MUL is not set |
2365 | # CONFIG_CRYPTO_NULL is not set | 2432 | # CONFIG_CRYPTO_NULL is not set |
2433 | CONFIG_CRYPTO_WORKQUEUE=y | ||
2366 | # CONFIG_CRYPTO_CRYPTD is not set | 2434 | # CONFIG_CRYPTO_CRYPTD is not set |
2367 | CONFIG_CRYPTO_AUTHENC=y | 2435 | CONFIG_CRYPTO_AUTHENC=y |
2368 | # CONFIG_CRYPTO_TEST is not set | 2436 | # CONFIG_CRYPTO_TEST is not set |
@@ -2414,6 +2482,7 @@ CONFIG_CRYPTO_SHA1=y | |||
2414 | # | 2482 | # |
2415 | CONFIG_CRYPTO_AES=y | 2483 | CONFIG_CRYPTO_AES=y |
2416 | # CONFIG_CRYPTO_AES_X86_64 is not set | 2484 | # CONFIG_CRYPTO_AES_X86_64 is not set |
2485 | # CONFIG_CRYPTO_AES_NI_INTEL is not set | ||
2417 | # CONFIG_CRYPTO_ANUBIS is not set | 2486 | # CONFIG_CRYPTO_ANUBIS is not set |
2418 | CONFIG_CRYPTO_ARC4=y | 2487 | CONFIG_CRYPTO_ARC4=y |
2419 | # CONFIG_CRYPTO_BLOWFISH is not set | 2488 | # CONFIG_CRYPTO_BLOWFISH is not set |
@@ -2435,6 +2504,7 @@ CONFIG_CRYPTO_DES=y | |||
2435 | # Compression | 2504 | # Compression |
2436 | # | 2505 | # |
2437 | # CONFIG_CRYPTO_DEFLATE is not set | 2506 | # CONFIG_CRYPTO_DEFLATE is not set |
2507 | # CONFIG_CRYPTO_ZLIB is not set | ||
2438 | # CONFIG_CRYPTO_LZO is not set | 2508 | # CONFIG_CRYPTO_LZO is not set |
2439 | 2509 | ||
2440 | # | 2510 | # |
@@ -2444,10 +2514,12 @@ CONFIG_CRYPTO_DES=y | |||
2444 | CONFIG_CRYPTO_HW=y | 2514 | CONFIG_CRYPTO_HW=y |
2445 | # CONFIG_CRYPTO_DEV_HIFN_795X is not set | 2515 | # CONFIG_CRYPTO_DEV_HIFN_795X is not set |
2446 | CONFIG_HAVE_KVM=y | 2516 | CONFIG_HAVE_KVM=y |
2517 | CONFIG_HAVE_KVM_IRQCHIP=y | ||
2447 | CONFIG_VIRTUALIZATION=y | 2518 | CONFIG_VIRTUALIZATION=y |
2448 | # CONFIG_KVM is not set | 2519 | # CONFIG_KVM is not set |
2449 | # CONFIG_VIRTIO_PCI is not set | 2520 | # CONFIG_VIRTIO_PCI is not set |
2450 | # CONFIG_VIRTIO_BALLOON is not set | 2521 | # CONFIG_VIRTIO_BALLOON is not set |
2522 | CONFIG_BINARY_PRINTF=y | ||
2451 | 2523 | ||
2452 | # | 2524 | # |
2453 | # Library routines | 2525 | # Library routines |
@@ -2464,7 +2536,10 @@ CONFIG_CRC32=y | |||
2464 | # CONFIG_CRC7 is not set | 2536 | # CONFIG_CRC7 is not set |
2465 | # CONFIG_LIBCRC32C is not set | 2537 | # CONFIG_LIBCRC32C is not set |
2466 | CONFIG_ZLIB_INFLATE=y | 2538 | CONFIG_ZLIB_INFLATE=y |
2467 | CONFIG_PLIST=y | 2539 | CONFIG_DECOMPRESS_GZIP=y |
2540 | CONFIG_DECOMPRESS_BZIP2=y | ||
2541 | CONFIG_DECOMPRESS_LZMA=y | ||
2468 | CONFIG_HAS_IOMEM=y | 2542 | CONFIG_HAS_IOMEM=y |
2469 | CONFIG_HAS_IOPORT=y | 2543 | CONFIG_HAS_IOPORT=y |
2470 | CONFIG_HAS_DMA=y | 2544 | CONFIG_HAS_DMA=y |
2545 | CONFIG_NLATTR=y | ||
diff --git a/arch/x86/include/asm/alternative.h b/arch/x86/include/asm/alternative.h index f6aa18eadf71..1a37bcdc8606 100644 --- a/arch/x86/include/asm/alternative.h +++ b/arch/x86/include/asm/alternative.h | |||
@@ -3,6 +3,7 @@ | |||
3 | 3 | ||
4 | #include <linux/types.h> | 4 | #include <linux/types.h> |
5 | #include <linux/stddef.h> | 5 | #include <linux/stddef.h> |
6 | #include <linux/stringify.h> | ||
6 | #include <asm/asm.h> | 7 | #include <asm/asm.h> |
7 | 8 | ||
8 | /* | 9 | /* |
@@ -74,6 +75,22 @@ static inline void alternatives_smp_switch(int smp) {} | |||
74 | 75 | ||
75 | const unsigned char *const *find_nop_table(void); | 76 | const unsigned char *const *find_nop_table(void); |
76 | 77 | ||
78 | /* alternative assembly primitive: */ | ||
79 | #define ALTERNATIVE(oldinstr, newinstr, feature) \ | ||
80 | \ | ||
81 | "661:\n\t" oldinstr "\n662:\n" \ | ||
82 | ".section .altinstructions,\"a\"\n" \ | ||
83 | _ASM_ALIGN "\n" \ | ||
84 | _ASM_PTR "661b\n" /* label */ \ | ||
85 | _ASM_PTR "663f\n" /* new instruction */ \ | ||
86 | " .byte " __stringify(feature) "\n" /* feature bit */ \ | ||
87 | " .byte 662b-661b\n" /* sourcelen */ \ | ||
88 | " .byte 664f-663f\n" /* replacementlen */ \ | ||
89 | ".previous\n" \ | ||
90 | ".section .altinstr_replacement, \"ax\"\n" \ | ||
91 | "663:\n\t" newinstr "\n664:\n" /* replacement */ \ | ||
92 | ".previous" | ||
93 | |||
77 | /* | 94 | /* |
78 | * Alternative instructions for different CPU types or capabilities. | 95 | * Alternative instructions for different CPU types or capabilities. |
79 | * | 96 | * |
@@ -87,18 +104,7 @@ const unsigned char *const *find_nop_table(void); | |||
87 | * without volatile and memory clobber. | 104 | * without volatile and memory clobber. |
88 | */ | 105 | */ |
89 | #define alternative(oldinstr, newinstr, feature) \ | 106 | #define alternative(oldinstr, newinstr, feature) \ |
90 | asm volatile ("661:\n\t" oldinstr "\n662:\n" \ | 107 | asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) : : : "memory") |
91 | ".section .altinstructions,\"a\"\n" \ | ||
92 | _ASM_ALIGN "\n" \ | ||
93 | _ASM_PTR "661b\n" /* label */ \ | ||
94 | _ASM_PTR "663f\n" /* new instruction */ \ | ||
95 | " .byte %c0\n" /* feature bit */ \ | ||
96 | " .byte 662b-661b\n" /* sourcelen */ \ | ||
97 | " .byte 664f-663f\n" /* replacementlen */ \ | ||
98 | ".previous\n" \ | ||
99 | ".section .altinstr_replacement,\"ax\"\n" \ | ||
100 | "663:\n\t" newinstr "\n664:\n" /* replacement */ \ | ||
101 | ".previous" :: "i" (feature) : "memory") | ||
102 | 108 | ||
103 | /* | 109 | /* |
104 | * Alternative inline assembly with input. | 110 | * Alternative inline assembly with input. |
@@ -109,35 +115,16 @@ const unsigned char *const *find_nop_table(void); | |||
109 | * Best is to use constraints that are fixed size (like (%1) ... "r") | 115 | * Best is to use constraints that are fixed size (like (%1) ... "r") |
110 | * If you use variable sized constraints like "m" or "g" in the | 116 | * If you use variable sized constraints like "m" or "g" in the |
111 | * replacement make sure to pad to the worst case length. | 117 | * replacement make sure to pad to the worst case length. |
118 | * Leaving an unused argument 0 to keep API compatibility. | ||
112 | */ | 119 | */ |
113 | #define alternative_input(oldinstr, newinstr, feature, input...) \ | 120 | #define alternative_input(oldinstr, newinstr, feature, input...) \ |
114 | asm volatile ("661:\n\t" oldinstr "\n662:\n" \ | 121 | asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) \ |
115 | ".section .altinstructions,\"a\"\n" \ | 122 | : : "i" (0), ## input) |
116 | _ASM_ALIGN "\n" \ | ||
117 | _ASM_PTR "661b\n" /* label */ \ | ||
118 | _ASM_PTR "663f\n" /* new instruction */ \ | ||
119 | " .byte %c0\n" /* feature bit */ \ | ||
120 | " .byte 662b-661b\n" /* sourcelen */ \ | ||
121 | " .byte 664f-663f\n" /* replacementlen */ \ | ||
122 | ".previous\n" \ | ||
123 | ".section .altinstr_replacement,\"ax\"\n" \ | ||
124 | "663:\n\t" newinstr "\n664:\n" /* replacement */ \ | ||
125 | ".previous" :: "i" (feature), ##input) | ||
126 | 123 | ||
127 | /* Like alternative_input, but with a single output argument */ | 124 | /* Like alternative_input, but with a single output argument */ |
128 | #define alternative_io(oldinstr, newinstr, feature, output, input...) \ | 125 | #define alternative_io(oldinstr, newinstr, feature, output, input...) \ |
129 | asm volatile ("661:\n\t" oldinstr "\n662:\n" \ | 126 | asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) \ |
130 | ".section .altinstructions,\"a\"\n" \ | 127 | : output : "i" (0), ## input) |
131 | _ASM_ALIGN "\n" \ | ||
132 | _ASM_PTR "661b\n" /* label */ \ | ||
133 | _ASM_PTR "663f\n" /* new instruction */ \ | ||
134 | " .byte %c[feat]\n" /* feature bit */ \ | ||
135 | " .byte 662b-661b\n" /* sourcelen */ \ | ||
136 | " .byte 664f-663f\n" /* replacementlen */ \ | ||
137 | ".previous\n" \ | ||
138 | ".section .altinstr_replacement,\"ax\"\n" \ | ||
139 | "663:\n\t" newinstr "\n664:\n" /* replacement */ \ | ||
140 | ".previous" : output : [feat] "i" (feature), ##input) | ||
141 | 128 | ||
142 | /* | 129 | /* |
143 | * use this macro(s) if you need more than one output parameter | 130 | * use this macro(s) if you need more than one output parameter |
diff --git a/arch/x86/include/asm/amd_iommu.h b/arch/x86/include/asm/amd_iommu.h index f712344329bc..262e02820049 100644 --- a/arch/x86/include/asm/amd_iommu.h +++ b/arch/x86/include/asm/amd_iommu.h | |||
@@ -27,6 +27,8 @@ extern int amd_iommu_init(void); | |||
27 | extern int amd_iommu_init_dma_ops(void); | 27 | extern int amd_iommu_init_dma_ops(void); |
28 | extern void amd_iommu_detect(void); | 28 | extern void amd_iommu_detect(void); |
29 | extern irqreturn_t amd_iommu_int_handler(int irq, void *data); | 29 | extern irqreturn_t amd_iommu_int_handler(int irq, void *data); |
30 | extern void amd_iommu_flush_all_domains(void); | ||
31 | extern void amd_iommu_flush_all_devices(void); | ||
30 | #else | 32 | #else |
31 | static inline int amd_iommu_init(void) { return -ENODEV; } | 33 | static inline int amd_iommu_init(void) { return -ENODEV; } |
32 | static inline void amd_iommu_detect(void) { } | 34 | static inline void amd_iommu_detect(void) { } |
diff --git a/arch/x86/include/asm/amd_iommu_types.h b/arch/x86/include/asm/amd_iommu_types.h index 95c8cd9d22b5..0c878caaa0a2 100644 --- a/arch/x86/include/asm/amd_iommu_types.h +++ b/arch/x86/include/asm/amd_iommu_types.h | |||
@@ -194,6 +194,27 @@ | |||
194 | #define PD_DMA_OPS_MASK (1UL << 0) /* domain used for dma_ops */ | 194 | #define PD_DMA_OPS_MASK (1UL << 0) /* domain used for dma_ops */ |
195 | #define PD_DEFAULT_MASK (1UL << 1) /* domain is a default dma_ops | 195 | #define PD_DEFAULT_MASK (1UL << 1) /* domain is a default dma_ops |
196 | domain for an IOMMU */ | 196 | domain for an IOMMU */ |
197 | extern bool amd_iommu_dump; | ||
198 | #define DUMP_printk(format, arg...) \ | ||
199 | do { \ | ||
200 | if (amd_iommu_dump) \ | ||
201 | printk(KERN_INFO "AMD IOMMU: " format, ## arg); \ | ||
202 | } while(0); | ||
203 | |||
204 | /* | ||
205 | * Make iterating over all IOMMUs easier | ||
206 | */ | ||
207 | #define for_each_iommu(iommu) \ | ||
208 | list_for_each_entry((iommu), &amd_iommu_list, list) | ||
209 | #define for_each_iommu_safe(iommu, next) \ | ||
210 | list_for_each_entry_safe((iommu), (next), &amd_iommu_list, list) | ||
211 | |||
212 | #define APERTURE_RANGE_SHIFT 27 /* 128 MB */ | ||
213 | #define APERTURE_RANGE_SIZE (1ULL << APERTURE_RANGE_SHIFT) | ||
214 | #define APERTURE_RANGE_PAGES (APERTURE_RANGE_SIZE >> PAGE_SHIFT) | ||
215 | #define APERTURE_MAX_RANGES 32 /* allows 4GB of DMA address space */ | ||
216 | #define APERTURE_RANGE_INDEX(a) ((a) >> APERTURE_RANGE_SHIFT) | ||
217 | #define APERTURE_PAGE_INDEX(a) (((a) >> 21) & 0x3fULL) | ||
197 | 218 | ||
198 | /* | 219 | /* |
199 | * This structure contains generic data for IOMMU protection domains | 220 | * This structure contains generic data for IOMMU protection domains |
@@ -210,6 +231,26 @@ struct protection_domain { | |||
210 | }; | 231 | }; |
211 | 232 | ||
212 | /* | 233 | /* |
234 | * For dynamic growth the aperture size is split into ranges of 128MB of | ||
235 | * DMA address space each. This struct represents one such range. | ||
236 | */ | ||
237 | struct aperture_range { | ||
238 | |||
239 | /* address allocation bitmap */ | ||
240 | unsigned long *bitmap; | ||
241 | |||
242 | /* | ||
243 | * Array of PTE pages for the aperture. In this array we save all the | ||
244 | * leaf pages of the domain page table used for the aperture. This way | ||
245 | * we don't need to walk the page table to find a specific PTE. We can | ||
246 | * just calculate its address in constant time. | ||
247 | */ | ||
248 | u64 *pte_pages[64]; | ||
249 | |||
250 | unsigned long offset; | ||
251 | }; | ||
252 | |||
253 | /* | ||
213 | * Data container for a dma_ops specific protection domain | 254 | * Data container for a dma_ops specific protection domain |
214 | */ | 255 | */ |
215 | struct dma_ops_domain { | 256 | struct dma_ops_domain { |
@@ -222,18 +263,10 @@ struct dma_ops_domain { | |||
222 | unsigned long aperture_size; | 263 | unsigned long aperture_size; |
223 | 264 | ||
224 | /* address we start to search for free addresses */ | 265 | /* address we start to search for free addresses */ |
225 | unsigned long next_bit; | 266 | unsigned long next_address; |
226 | |||
227 | /* address allocation bitmap */ | ||
228 | unsigned long *bitmap; | ||
229 | 267 | ||
230 | /* | 268 | /* address space relevant data */ |
231 | * Array of PTE pages for the aperture. In this array we save all the | 269 | struct aperture_range *aperture[APERTURE_MAX_RANGES]; |
232 | * leaf pages of the domain page table used for the aperture. This way | ||
233 | * we don't need to walk the page table to find a specific PTE. We can | ||
234 | * just calculate its address in constant time. | ||
235 | */ | ||
236 | u64 **pte_pages; | ||
237 | 270 | ||
238 | /* This will be set to true when TLB needs to be flushed */ | 271 | /* This will be set to true when TLB needs to be flushed */ |
239 | bool need_flush; | 272 | bool need_flush; |
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h index 42f2f8377422..bb7d47925847 100644 --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h | |||
@@ -107,8 +107,7 @@ extern u32 native_safe_apic_wait_icr_idle(void); | |||
107 | extern void native_apic_icr_write(u32 low, u32 id); | 107 | extern void native_apic_icr_write(u32 low, u32 id); |
108 | extern u64 native_apic_icr_read(void); | 108 | extern u64 native_apic_icr_read(void); |
109 | 109 | ||
110 | #define EIM_8BIT_APIC_ID 0 | 110 | extern int x2apic_mode; |
111 | #define EIM_32BIT_APIC_ID 1 | ||
112 | 111 | ||
113 | #ifdef CONFIG_X86_X2APIC | 112 | #ifdef CONFIG_X86_X2APIC |
114 | /* | 113 | /* |
@@ -166,10 +165,9 @@ static inline u64 native_x2apic_icr_read(void) | |||
166 | return val; | 165 | return val; |
167 | } | 166 | } |
168 | 167 | ||
169 | extern int x2apic, x2apic_phys; | 168 | extern int x2apic_phys; |
170 | extern void check_x2apic(void); | 169 | extern void check_x2apic(void); |
171 | extern void enable_x2apic(void); | 170 | extern void enable_x2apic(void); |
172 | extern void enable_IR_x2apic(void); | ||
173 | extern void x2apic_icr_write(u32 low, u32 id); | 171 | extern void x2apic_icr_write(u32 low, u32 id); |
174 | static inline int x2apic_enabled(void) | 172 | static inline int x2apic_enabled(void) |
175 | { | 173 | { |
@@ -183,6 +181,8 @@ static inline int x2apic_enabled(void) | |||
183 | return 1; | 181 | return 1; |
184 | return 0; | 182 | return 0; |
185 | } | 183 | } |
184 | |||
185 | #define x2apic_supported() (cpu_has_x2apic) | ||
186 | #else | 186 | #else |
187 | static inline void check_x2apic(void) | 187 | static inline void check_x2apic(void) |
188 | { | 188 | { |
@@ -190,28 +190,20 @@ static inline void check_x2apic(void) | |||
190 | static inline void enable_x2apic(void) | 190 | static inline void enable_x2apic(void) |
191 | { | 191 | { |
192 | } | 192 | } |
193 | static inline void enable_IR_x2apic(void) | ||
194 | { | ||
195 | } | ||
196 | static inline int x2apic_enabled(void) | 193 | static inline int x2apic_enabled(void) |
197 | { | 194 | { |
198 | return 0; | 195 | return 0; |
199 | } | 196 | } |
200 | 197 | ||
201 | #define x2apic 0 | 198 | #define x2apic_preenabled 0 |
202 | 199 | #define x2apic_supported() 0 | |
203 | #endif | 200 | #endif |
204 | 201 | ||
205 | extern int get_physical_broadcast(void); | 202 | extern void enable_IR_x2apic(void); |
206 | 203 | ||
207 | #ifdef CONFIG_X86_X2APIC | 204 | extern int get_physical_broadcast(void); |
208 | static inline void ack_x2APIC_irq(void) | ||
209 | { | ||
210 | /* Docs say use 0 for future compatibility */ | ||
211 | native_apic_msr_write(APIC_EOI, 0); | ||
212 | } | ||
213 | #endif | ||
214 | 205 | ||
206 | extern void apic_disable(void); | ||
215 | extern int lapic_get_maxlvt(void); | 207 | extern int lapic_get_maxlvt(void); |
216 | extern void clear_local_APIC(void); | 208 | extern void clear_local_APIC(void); |
217 | extern void connect_bsp_APIC(void); | 209 | extern void connect_bsp_APIC(void); |
@@ -252,7 +244,7 @@ static inline void lapic_shutdown(void) { } | |||
252 | #define local_apic_timer_c2_ok 1 | 244 | #define local_apic_timer_c2_ok 1 |
253 | static inline void init_apic_mappings(void) { } | 245 | static inline void init_apic_mappings(void) { } |
254 | static inline void disable_local_APIC(void) { } | 246 | static inline void disable_local_APIC(void) { } |
255 | 247 | static inline void apic_disable(void) { } | |
256 | #endif /* !CONFIG_X86_LOCAL_APIC */ | 248 | #endif /* !CONFIG_X86_LOCAL_APIC */ |
257 | 249 | ||
258 | #ifdef CONFIG_X86_64 | 250 | #ifdef CONFIG_X86_64 |
@@ -410,7 +402,7 @@ static inline unsigned default_get_apic_id(unsigned long x) | |||
410 | { | 402 | { |
411 | unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR)); | 403 | unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR)); |
412 | 404 | ||
413 | if (APIC_XAPIC(ver)) | 405 | if (APIC_XAPIC(ver) || boot_cpu_has(X86_FEATURE_EXTD_APICID)) |
414 | return (x >> 24) & 0xFF; | 406 | return (x >> 24) & 0xFF; |
415 | else | 407 | else |
416 | return (x >> 24) & 0x0F; | 408 | return (x >> 24) & 0x0F; |
@@ -478,6 +470,9 @@ static inline unsigned int read_apic_id(void) | |||
478 | extern void default_setup_apic_routing(void); | 470 | extern void default_setup_apic_routing(void); |
479 | 471 | ||
480 | #ifdef CONFIG_X86_32 | 472 | #ifdef CONFIG_X86_32 |
473 | |||
474 | extern struct apic apic_default; | ||
475 | |||
481 | /* | 476 | /* |
482 | * Set up the logical destination ID. | 477 | * Set up the logical destination ID. |
483 | * | 478 | * |
diff --git a/arch/x86/include/asm/apicdef.h b/arch/x86/include/asm/apicdef.h index bc9514fb3b13..7ddb36ab933b 100644 --- a/arch/x86/include/asm/apicdef.h +++ b/arch/x86/include/asm/apicdef.h | |||
@@ -22,6 +22,7 @@ | |||
22 | # define APIC_INTEGRATED(x) (1) | 22 | # define APIC_INTEGRATED(x) (1) |
23 | #endif | 23 | #endif |
24 | #define APIC_XAPIC(x) ((x) >= 0x14) | 24 | #define APIC_XAPIC(x) ((x) >= 0x14) |
25 | #define APIC_EXT_SPACE(x) ((x) & 0x80000000) | ||
25 | #define APIC_TASKPRI 0x80 | 26 | #define APIC_TASKPRI 0x80 |
26 | #define APIC_TPRI_MASK 0xFFu | 27 | #define APIC_TPRI_MASK 0xFFu |
27 | #define APIC_ARBPRI 0x90 | 28 | #define APIC_ARBPRI 0x90 |
@@ -116,7 +117,9 @@ | |||
116 | #define APIC_TDR_DIV_32 0x8 | 117 | #define APIC_TDR_DIV_32 0x8 |
117 | #define APIC_TDR_DIV_64 0x9 | 118 | #define APIC_TDR_DIV_64 0x9 |
118 | #define APIC_TDR_DIV_128 0xA | 119 | #define APIC_TDR_DIV_128 0xA |
119 | #define APIC_EILVT0 0x500 | 120 | #define APIC_EFEAT 0x400 |
121 | #define APIC_ECTRL 0x410 | ||
122 | #define APIC_EILVTn(n) (0x500 + 0x10 * n) | ||
120 | #define APIC_EILVT_NR_AMD_K8 1 /* # of extended interrupts */ | 123 | #define APIC_EILVT_NR_AMD_K8 1 /* # of extended interrupts */ |
121 | #define APIC_EILVT_NR_AMD_10H 4 | 124 | #define APIC_EILVT_NR_AMD_10H 4 |
122 | #define APIC_EILVT_LVTOFF(x) (((x) >> 4) & 0xF) | 125 | #define APIC_EILVT_LVTOFF(x) (((x) >> 4) & 0xF) |
@@ -125,9 +128,6 @@ | |||
125 | #define APIC_EILVT_MSG_NMI 0x4 | 128 | #define APIC_EILVT_MSG_NMI 0x4 |
126 | #define APIC_EILVT_MSG_EXT 0x7 | 129 | #define APIC_EILVT_MSG_EXT 0x7 |
127 | #define APIC_EILVT_MASKED (1 << 16) | 130 | #define APIC_EILVT_MASKED (1 << 16) |
128 | #define APIC_EILVT1 0x510 | ||
129 | #define APIC_EILVT2 0x520 | ||
130 | #define APIC_EILVT3 0x530 | ||
131 | 131 | ||
132 | #define APIC_BASE (fix_to_virt(FIX_APIC_BASE)) | 132 | #define APIC_BASE (fix_to_virt(FIX_APIC_BASE)) |
133 | #define APIC_BASE_MSR 0x800 | 133 | #define APIC_BASE_MSR 0x800 |
diff --git a/arch/x86/include/asm/boot.h b/arch/x86/include/asm/boot.h index 6ba23dd9fc92..418e632d4a80 100644 --- a/arch/x86/include/asm/boot.h +++ b/arch/x86/include/asm/boot.h | |||
@@ -8,11 +8,26 @@ | |||
8 | 8 | ||
9 | #ifdef __KERNEL__ | 9 | #ifdef __KERNEL__ |
10 | 10 | ||
11 | #include <asm/page_types.h> | ||
12 | |||
11 | /* Physical address where kernel should be loaded. */ | 13 | /* Physical address where kernel should be loaded. */ |
12 | #define LOAD_PHYSICAL_ADDR ((CONFIG_PHYSICAL_START \ | 14 | #define LOAD_PHYSICAL_ADDR ((CONFIG_PHYSICAL_START \ |
13 | + (CONFIG_PHYSICAL_ALIGN - 1)) \ | 15 | + (CONFIG_PHYSICAL_ALIGN - 1)) \ |
14 | & ~(CONFIG_PHYSICAL_ALIGN - 1)) | 16 | & ~(CONFIG_PHYSICAL_ALIGN - 1)) |
15 | 17 | ||
18 | /* Minimum kernel alignment, as a power of two */ | ||
19 | #ifdef CONFIG_x86_64 | ||
20 | #define MIN_KERNEL_ALIGN_LG2 PMD_SHIFT | ||
21 | #else | ||
22 | #define MIN_KERNEL_ALIGN_LG2 (PAGE_SHIFT+1) | ||
23 | #endif | ||
24 | #define MIN_KERNEL_ALIGN (_AC(1, UL) << MIN_KERNEL_ALIGN_LG2) | ||
25 | |||
26 | #if (CONFIG_PHYSICAL_ALIGN & (CONFIG_PHYSICAL_ALIGN-1)) || \ | ||
27 | (CONFIG_PHYSICAL_ALIGN < (_AC(1, UL) << MIN_KERNEL_ALIGN_LG2)) | ||
28 | #error "Invalid value for CONFIG_PHYSICAL_ALIGN" | ||
29 | #endif | ||
30 | |||
16 | #ifdef CONFIG_KERNEL_BZIP2 | 31 | #ifdef CONFIG_KERNEL_BZIP2 |
17 | #define BOOT_HEAP_SIZE 0x400000 | 32 | #define BOOT_HEAP_SIZE 0x400000 |
18 | #else /* !CONFIG_KERNEL_BZIP2 */ | 33 | #else /* !CONFIG_KERNEL_BZIP2 */ |
diff --git a/arch/x86/include/asm/bootparam.h b/arch/x86/include/asm/bootparam.h index 433adaebf9b6..1724e8de317c 100644 --- a/arch/x86/include/asm/bootparam.h +++ b/arch/x86/include/asm/bootparam.h | |||
@@ -50,7 +50,8 @@ struct setup_header { | |||
50 | __u32 ramdisk_size; | 50 | __u32 ramdisk_size; |
51 | __u32 bootsect_kludge; | 51 | __u32 bootsect_kludge; |
52 | __u16 heap_end_ptr; | 52 | __u16 heap_end_ptr; |
53 | __u16 _pad1; | 53 | __u8 ext_loader_ver; |
54 | __u8 ext_loader_type; | ||
54 | __u32 cmd_line_ptr; | 55 | __u32 cmd_line_ptr; |
55 | __u32 initrd_addr_max; | 56 | __u32 initrd_addr_max; |
56 | __u32 kernel_alignment; | 57 | __u32 kernel_alignment; |
diff --git a/arch/x86/include/asm/cpu_debug.h b/arch/x86/include/asm/cpu_debug.h index 222802029fa6..d96c1ee3a95c 100644 --- a/arch/x86/include/asm/cpu_debug.h +++ b/arch/x86/include/asm/cpu_debug.h | |||
@@ -86,105 +86,7 @@ enum cpu_file_bit { | |||
86 | CPU_VALUE_BIT, /* value */ | 86 | CPU_VALUE_BIT, /* value */ |
87 | }; | 87 | }; |
88 | 88 | ||
89 | #define CPU_FILE_VALUE (1 << CPU_VALUE_BIT) | 89 | #define CPU_FILE_VALUE (1 << CPU_VALUE_BIT) |
90 | |||
91 | /* | ||
92 | * DisplayFamily_DisplayModel Processor Families/Processor Number Series | ||
93 | * -------------------------- ------------------------------------------ | ||
94 | * 05_01, 05_02, 05_04 Pentium, Pentium with MMX | ||
95 | * | ||
96 | * 06_01 Pentium Pro | ||
97 | * 06_03, 06_05 Pentium II Xeon, Pentium II | ||
98 | * 06_07, 06_08, 06_0A, 06_0B Pentium III Xeon, Pentum III | ||
99 | * | ||
100 | * 06_09, 060D Pentium M | ||
101 | * | ||
102 | * 06_0E Core Duo, Core Solo | ||
103 | * | ||
104 | * 06_0F Xeon 3000, 3200, 5100, 5300, 7300 series, | ||
105 | * Core 2 Quad, Core 2 Extreme, Core 2 Duo, | ||
106 | * Pentium dual-core | ||
107 | * 06_17 Xeon 5200, 5400 series, Core 2 Quad Q9650 | ||
108 | * | ||
109 | * 06_1C Atom | ||
110 | * | ||
111 | * 0F_00, 0F_01, 0F_02 Xeon, Xeon MP, Pentium 4 | ||
112 | * 0F_03, 0F_04 Xeon, Xeon MP, Pentium 4, Pentium D | ||
113 | * | ||
114 | * 0F_06 Xeon 7100, 5000 Series, Xeon MP, | ||
115 | * Pentium 4, Pentium D | ||
116 | */ | ||
117 | |||
118 | /* Register processors bits */ | ||
119 | enum cpu_processor_bit { | ||
120 | CPU_NONE, | ||
121 | /* Intel */ | ||
122 | CPU_INTEL_PENTIUM_BIT, | ||
123 | CPU_INTEL_P6_BIT, | ||
124 | CPU_INTEL_PENTIUM_M_BIT, | ||
125 | CPU_INTEL_CORE_BIT, | ||
126 | CPU_INTEL_CORE2_BIT, | ||
127 | CPU_INTEL_ATOM_BIT, | ||
128 | CPU_INTEL_XEON_P4_BIT, | ||
129 | CPU_INTEL_XEON_MP_BIT, | ||
130 | /* AMD */ | ||
131 | CPU_AMD_K6_BIT, | ||
132 | CPU_AMD_K7_BIT, | ||
133 | CPU_AMD_K8_BIT, | ||
134 | CPU_AMD_0F_BIT, | ||
135 | CPU_AMD_10_BIT, | ||
136 | CPU_AMD_11_BIT, | ||
137 | }; | ||
138 | |||
139 | #define CPU_INTEL_PENTIUM (1 << CPU_INTEL_PENTIUM_BIT) | ||
140 | #define CPU_INTEL_P6 (1 << CPU_INTEL_P6_BIT) | ||
141 | #define CPU_INTEL_PENTIUM_M (1 << CPU_INTEL_PENTIUM_M_BIT) | ||
142 | #define CPU_INTEL_CORE (1 << CPU_INTEL_CORE_BIT) | ||
143 | #define CPU_INTEL_CORE2 (1 << CPU_INTEL_CORE2_BIT) | ||
144 | #define CPU_INTEL_ATOM (1 << CPU_INTEL_ATOM_BIT) | ||
145 | #define CPU_INTEL_XEON_P4 (1 << CPU_INTEL_XEON_P4_BIT) | ||
146 | #define CPU_INTEL_XEON_MP (1 << CPU_INTEL_XEON_MP_BIT) | ||
147 | |||
148 | #define CPU_INTEL_PX (CPU_INTEL_P6 | CPU_INTEL_PENTIUM_M) | ||
149 | #define CPU_INTEL_COREX (CPU_INTEL_CORE | CPU_INTEL_CORE2) | ||
150 | #define CPU_INTEL_XEON (CPU_INTEL_XEON_P4 | CPU_INTEL_XEON_MP) | ||
151 | #define CPU_CO_AT (CPU_INTEL_CORE | CPU_INTEL_ATOM) | ||
152 | #define CPU_C2_AT (CPU_INTEL_CORE2 | CPU_INTEL_ATOM) | ||
153 | #define CPU_CX_AT (CPU_INTEL_COREX | CPU_INTEL_ATOM) | ||
154 | #define CPU_CX_XE (CPU_INTEL_COREX | CPU_INTEL_XEON) | ||
155 | #define CPU_P6_XE (CPU_INTEL_P6 | CPU_INTEL_XEON) | ||
156 | #define CPU_PM_CO_AT (CPU_INTEL_PENTIUM_M | CPU_CO_AT) | ||
157 | #define CPU_C2_AT_XE (CPU_C2_AT | CPU_INTEL_XEON) | ||
158 | #define CPU_CX_AT_XE (CPU_CX_AT | CPU_INTEL_XEON) | ||
159 | #define CPU_P6_CX_AT (CPU_INTEL_P6 | CPU_CX_AT) | ||
160 | #define CPU_P6_CX_XE (CPU_P6_XE | CPU_INTEL_COREX) | ||
161 | #define CPU_P6_CX_AT_XE (CPU_INTEL_P6 | CPU_CX_AT_XE) | ||
162 | #define CPU_PM_CX_AT_XE (CPU_INTEL_PENTIUM_M | CPU_CX_AT_XE) | ||
163 | #define CPU_PM_CX_AT (CPU_INTEL_PENTIUM_M | CPU_CX_AT) | ||
164 | #define CPU_PM_CX_XE (CPU_INTEL_PENTIUM_M | CPU_CX_XE) | ||
165 | #define CPU_PX_CX_AT (CPU_INTEL_PX | CPU_CX_AT) | ||
166 | #define CPU_PX_CX_AT_XE (CPU_INTEL_PX | CPU_CX_AT_XE) | ||
167 | |||
168 | /* Select all supported Intel CPUs */ | ||
169 | #define CPU_INTEL_ALL (CPU_INTEL_PENTIUM | CPU_PX_CX_AT_XE) | ||
170 | |||
171 | #define CPU_AMD_K6 (1 << CPU_AMD_K6_BIT) | ||
172 | #define CPU_AMD_K7 (1 << CPU_AMD_K7_BIT) | ||
173 | #define CPU_AMD_K8 (1 << CPU_AMD_K8_BIT) | ||
174 | #define CPU_AMD_0F (1 << CPU_AMD_0F_BIT) | ||
175 | #define CPU_AMD_10 (1 << CPU_AMD_10_BIT) | ||
176 | #define CPU_AMD_11 (1 << CPU_AMD_11_BIT) | ||
177 | |||
178 | #define CPU_K10_PLUS (CPU_AMD_10 | CPU_AMD_11) | ||
179 | #define CPU_K0F_PLUS (CPU_AMD_0F | CPU_K10_PLUS) | ||
180 | #define CPU_K8_PLUS (CPU_AMD_K8 | CPU_K0F_PLUS) | ||
181 | #define CPU_K7_PLUS (CPU_AMD_K7 | CPU_K8_PLUS) | ||
182 | |||
183 | /* Select all supported AMD CPUs */ | ||
184 | #define CPU_AMD_ALL (CPU_AMD_K6 | CPU_K7_PLUS) | ||
185 | |||
186 | /* Select all supported CPUs */ | ||
187 | #define CPU_ALL (CPU_INTEL_ALL | CPU_AMD_ALL) | ||
188 | 90 | ||
189 | #define MAX_CPU_FILES 512 | 91 | #define MAX_CPU_FILES 512 |
190 | 92 | ||
@@ -220,7 +122,6 @@ struct cpu_debug_range { | |||
220 | unsigned min; /* Register range min */ | 122 | unsigned min; /* Register range min */ |
221 | unsigned max; /* Register range max */ | 123 | unsigned max; /* Register range max */ |
222 | unsigned flag; /* Supported flags */ | 124 | unsigned flag; /* Supported flags */ |
223 | unsigned model; /* Supported models */ | ||
224 | }; | 125 | }; |
225 | 126 | ||
226 | #endif /* _ASM_X86_CPU_DEBUG_H */ | 127 | #endif /* _ASM_X86_CPU_DEBUG_H */ |
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h index bb83b1c397aa..19af42138f78 100644 --- a/arch/x86/include/asm/cpufeature.h +++ b/arch/x86/include/asm/cpufeature.h | |||
@@ -22,7 +22,7 @@ | |||
22 | #define X86_FEATURE_TSC (0*32+ 4) /* Time Stamp Counter */ | 22 | #define X86_FEATURE_TSC (0*32+ 4) /* Time Stamp Counter */ |
23 | #define X86_FEATURE_MSR (0*32+ 5) /* Model-Specific Registers */ | 23 | #define X86_FEATURE_MSR (0*32+ 5) /* Model-Specific Registers */ |
24 | #define X86_FEATURE_PAE (0*32+ 6) /* Physical Address Extensions */ | 24 | #define X86_FEATURE_PAE (0*32+ 6) /* Physical Address Extensions */ |
25 | #define X86_FEATURE_MCE (0*32+ 7) /* Machine Check Architecture */ | 25 | #define X86_FEATURE_MCE (0*32+ 7) /* Machine Check Exception */ |
26 | #define X86_FEATURE_CX8 (0*32+ 8) /* CMPXCHG8 instruction */ | 26 | #define X86_FEATURE_CX8 (0*32+ 8) /* CMPXCHG8 instruction */ |
27 | #define X86_FEATURE_APIC (0*32+ 9) /* Onboard APIC */ | 27 | #define X86_FEATURE_APIC (0*32+ 9) /* Onboard APIC */ |
28 | #define X86_FEATURE_SEP (0*32+11) /* SYSENTER/SYSEXIT */ | 28 | #define X86_FEATURE_SEP (0*32+11) /* SYSENTER/SYSEXIT */ |
@@ -94,6 +94,7 @@ | |||
94 | #define X86_FEATURE_TSC_RELIABLE (3*32+23) /* TSC is known to be reliable */ | 94 | #define X86_FEATURE_TSC_RELIABLE (3*32+23) /* TSC is known to be reliable */ |
95 | #define X86_FEATURE_NONSTOP_TSC (3*32+24) /* TSC does not stop in C states */ | 95 | #define X86_FEATURE_NONSTOP_TSC (3*32+24) /* TSC does not stop in C states */ |
96 | #define X86_FEATURE_CLFLUSH_MONITOR (3*32+25) /* "" clflush reqd with monitor */ | 96 | #define X86_FEATURE_CLFLUSH_MONITOR (3*32+25) /* "" clflush reqd with monitor */ |
97 | #define X86_FEATURE_EXTD_APICID (3*32+26) /* has extended APICID (8 bits) */ | ||
97 | 98 | ||
98 | /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ | 99 | /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ |
99 | #define X86_FEATURE_XMM3 (4*32+ 0) /* "pni" SSE-3 */ | 100 | #define X86_FEATURE_XMM3 (4*32+ 0) /* "pni" SSE-3 */ |
@@ -192,11 +193,11 @@ extern const char * const x86_power_flags[32]; | |||
192 | #define clear_cpu_cap(c, bit) clear_bit(bit, (unsigned long *)((c)->x86_capability)) | 193 | #define clear_cpu_cap(c, bit) clear_bit(bit, (unsigned long *)((c)->x86_capability)) |
193 | #define setup_clear_cpu_cap(bit) do { \ | 194 | #define setup_clear_cpu_cap(bit) do { \ |
194 | clear_cpu_cap(&boot_cpu_data, bit); \ | 195 | clear_cpu_cap(&boot_cpu_data, bit); \ |
195 | set_bit(bit, (unsigned long *)cleared_cpu_caps); \ | 196 | set_bit(bit, (unsigned long *)cpu_caps_cleared); \ |
196 | } while (0) | 197 | } while (0) |
197 | #define setup_force_cpu_cap(bit) do { \ | 198 | #define setup_force_cpu_cap(bit) do { \ |
198 | set_cpu_cap(&boot_cpu_data, bit); \ | 199 | set_cpu_cap(&boot_cpu_data, bit); \ |
199 | clear_bit(bit, (unsigned long *)cleared_cpu_caps); \ | 200 | set_bit(bit, (unsigned long *)cpu_caps_set); \ |
200 | } while (0) | 201 | } while (0) |
201 | 202 | ||
202 | #define cpu_has_fpu boot_cpu_has(X86_FEATURE_FPU) | 203 | #define cpu_has_fpu boot_cpu_has(X86_FEATURE_FPU) |
diff --git a/arch/x86/include/asm/ds.h b/arch/x86/include/asm/ds.h index a8f672ba100c..70dac199b093 100644 --- a/arch/x86/include/asm/ds.h +++ b/arch/x86/include/asm/ds.h | |||
@@ -15,8 +15,8 @@ | |||
15 | * - buffer allocation (memory accounting) | 15 | * - buffer allocation (memory accounting) |
16 | * | 16 | * |
17 | * | 17 | * |
18 | * Copyright (C) 2007-2008 Intel Corporation. | 18 | * Copyright (C) 2007-2009 Intel Corporation. |
19 | * Markus Metzger <markus.t.metzger@intel.com>, 2007-2008 | 19 | * Markus Metzger <markus.t.metzger@intel.com>, 2007-2009 |
20 | */ | 20 | */ |
21 | 21 | ||
22 | #ifndef _ASM_X86_DS_H | 22 | #ifndef _ASM_X86_DS_H |
@@ -83,8 +83,10 @@ enum ds_feature { | |||
83 | * The interrupt threshold is independent from the overflow callback | 83 | * The interrupt threshold is independent from the overflow callback |
84 | * to allow users to use their own overflow interrupt handling mechanism. | 84 | * to allow users to use their own overflow interrupt handling mechanism. |
85 | * | 85 | * |
86 | * task: the task to request recording for; | 86 | * The function might sleep. |
87 | * NULL for per-cpu recording on the current cpu | 87 | * |
88 | * task: the task to request recording for | ||
89 | * cpu: the cpu to request recording for | ||
88 | * base: the base pointer for the (non-pageable) buffer; | 90 | * base: the base pointer for the (non-pageable) buffer; |
89 | * size: the size of the provided buffer in bytes | 91 | * size: the size of the provided buffer in bytes |
90 | * ovfl: pointer to a function to be called on buffer overflow; | 92 | * ovfl: pointer to a function to be called on buffer overflow; |
@@ -93,19 +95,28 @@ enum ds_feature { | |||
93 | * -1 if no interrupt threshold is requested. | 95 | * -1 if no interrupt threshold is requested. |
94 | * flags: a bit-mask of the above flags | 96 | * flags: a bit-mask of the above flags |
95 | */ | 97 | */ |
96 | extern struct bts_tracer *ds_request_bts(struct task_struct *task, | 98 | extern struct bts_tracer *ds_request_bts_task(struct task_struct *task, |
97 | void *base, size_t size, | 99 | void *base, size_t size, |
98 | bts_ovfl_callback_t ovfl, | 100 | bts_ovfl_callback_t ovfl, |
99 | size_t th, unsigned int flags); | 101 | size_t th, unsigned int flags); |
100 | extern struct pebs_tracer *ds_request_pebs(struct task_struct *task, | 102 | extern struct bts_tracer *ds_request_bts_cpu(int cpu, void *base, size_t size, |
101 | void *base, size_t size, | 103 | bts_ovfl_callback_t ovfl, |
102 | pebs_ovfl_callback_t ovfl, | 104 | size_t th, unsigned int flags); |
103 | size_t th, unsigned int flags); | 105 | extern struct pebs_tracer *ds_request_pebs_task(struct task_struct *task, |
106 | void *base, size_t size, | ||
107 | pebs_ovfl_callback_t ovfl, | ||
108 | size_t th, unsigned int flags); | ||
109 | extern struct pebs_tracer *ds_request_pebs_cpu(int cpu, | ||
110 | void *base, size_t size, | ||
111 | pebs_ovfl_callback_t ovfl, | ||
112 | size_t th, unsigned int flags); | ||
104 | 113 | ||
105 | /* | 114 | /* |
106 | * Release BTS or PEBS resources | 115 | * Release BTS or PEBS resources |
107 | * Suspend and resume BTS or PEBS tracing | 116 | * Suspend and resume BTS or PEBS tracing |
108 | * | 117 | * |
118 | * Must be called with irq's enabled. | ||
119 | * | ||
109 | * tracer: the tracer handle returned from ds_request_~() | 120 | * tracer: the tracer handle returned from ds_request_~() |
110 | */ | 121 | */ |
111 | extern void ds_release_bts(struct bts_tracer *tracer); | 122 | extern void ds_release_bts(struct bts_tracer *tracer); |
@@ -115,6 +126,28 @@ extern void ds_release_pebs(struct pebs_tracer *tracer); | |||
115 | extern void ds_suspend_pebs(struct pebs_tracer *tracer); | 126 | extern void ds_suspend_pebs(struct pebs_tracer *tracer); |
116 | extern void ds_resume_pebs(struct pebs_tracer *tracer); | 127 | extern void ds_resume_pebs(struct pebs_tracer *tracer); |
117 | 128 | ||
129 | /* | ||
130 | * Release BTS or PEBS resources | ||
131 | * Suspend and resume BTS or PEBS tracing | ||
132 | * | ||
133 | * Cpu tracers must call this on the traced cpu. | ||
134 | * Task tracers must call ds_release_~_noirq() for themselves. | ||
135 | * | ||
136 | * May be called with irq's disabled. | ||
137 | * | ||
138 | * Returns 0 if successful; | ||
139 | * -EPERM if the cpu tracer does not trace the current cpu. | ||
140 | * -EPERM if the task tracer does not trace itself. | ||
141 | * | ||
142 | * tracer: the tracer handle returned from ds_request_~() | ||
143 | */ | ||
144 | extern int ds_release_bts_noirq(struct bts_tracer *tracer); | ||
145 | extern int ds_suspend_bts_noirq(struct bts_tracer *tracer); | ||
146 | extern int ds_resume_bts_noirq(struct bts_tracer *tracer); | ||
147 | extern int ds_release_pebs_noirq(struct pebs_tracer *tracer); | ||
148 | extern int ds_suspend_pebs_noirq(struct pebs_tracer *tracer); | ||
149 | extern int ds_resume_pebs_noirq(struct pebs_tracer *tracer); | ||
150 | |||
118 | 151 | ||
119 | /* | 152 | /* |
120 | * The raw DS buffer state as it is used for BTS and PEBS recording. | 153 | * The raw DS buffer state as it is used for BTS and PEBS recording. |
@@ -170,9 +203,9 @@ struct bts_struct { | |||
170 | } lbr; | 203 | } lbr; |
171 | /* BTS_TASK_ARRIVES or BTS_TASK_DEPARTS */ | 204 | /* BTS_TASK_ARRIVES or BTS_TASK_DEPARTS */ |
172 | struct { | 205 | struct { |
173 | __u64 jiffies; | 206 | __u64 clock; |
174 | pid_t pid; | 207 | pid_t pid; |
175 | } timestamp; | 208 | } event; |
176 | } variant; | 209 | } variant; |
177 | }; | 210 | }; |
178 | 211 | ||
@@ -201,8 +234,12 @@ struct bts_trace { | |||
201 | struct pebs_trace { | 234 | struct pebs_trace { |
202 | struct ds_trace ds; | 235 | struct ds_trace ds; |
203 | 236 | ||
204 | /* the PEBS reset value */ | 237 | /* the number of valid counters in the below array */ |
205 | unsigned long long reset_value; | 238 | unsigned int counters; |
239 | |||
240 | #define MAX_PEBS_COUNTERS 4 | ||
241 | /* the counter reset value */ | ||
242 | unsigned long long counter_reset[MAX_PEBS_COUNTERS]; | ||
206 | }; | 243 | }; |
207 | 244 | ||
208 | 245 | ||
@@ -237,9 +274,11 @@ extern int ds_reset_pebs(struct pebs_tracer *tracer); | |||
237 | * Returns 0 on success; -Eerrno on error | 274 | * Returns 0 on success; -Eerrno on error |
238 | * | 275 | * |
239 | * tracer: the tracer handle returned from ds_request_pebs() | 276 | * tracer: the tracer handle returned from ds_request_pebs() |
277 | * counter: the index of the counter | ||
240 | * value: the new counter reset value | 278 | * value: the new counter reset value |
241 | */ | 279 | */ |
242 | extern int ds_set_pebs_reset(struct pebs_tracer *tracer, u64 value); | 280 | extern int ds_set_pebs_reset(struct pebs_tracer *tracer, |
281 | unsigned int counter, u64 value); | ||
243 | 282 | ||
244 | /* | 283 | /* |
245 | * Initialization | 284 | * Initialization |
@@ -252,21 +291,12 @@ extern void __cpuinit ds_init_intel(struct cpuinfo_x86 *); | |||
252 | */ | 291 | */ |
253 | extern void ds_switch_to(struct task_struct *prev, struct task_struct *next); | 292 | extern void ds_switch_to(struct task_struct *prev, struct task_struct *next); |
254 | 293 | ||
255 | /* | ||
256 | * Task clone/init and cleanup work | ||
257 | */ | ||
258 | extern void ds_copy_thread(struct task_struct *tsk, struct task_struct *father); | ||
259 | extern void ds_exit_thread(struct task_struct *tsk); | ||
260 | |||
261 | #else /* CONFIG_X86_DS */ | 294 | #else /* CONFIG_X86_DS */ |
262 | 295 | ||
263 | struct cpuinfo_x86; | 296 | struct cpuinfo_x86; |
264 | static inline void __cpuinit ds_init_intel(struct cpuinfo_x86 *ignored) {} | 297 | static inline void __cpuinit ds_init_intel(struct cpuinfo_x86 *ignored) {} |
265 | static inline void ds_switch_to(struct task_struct *prev, | 298 | static inline void ds_switch_to(struct task_struct *prev, |
266 | struct task_struct *next) {} | 299 | struct task_struct *next) {} |
267 | static inline void ds_copy_thread(struct task_struct *tsk, | ||
268 | struct task_struct *father) {} | ||
269 | static inline void ds_exit_thread(struct task_struct *tsk) {} | ||
270 | 300 | ||
271 | #endif /* CONFIG_X86_DS */ | 301 | #endif /* CONFIG_X86_DS */ |
272 | #endif /* _ASM_X86_DS_H */ | 302 | #endif /* _ASM_X86_DS_H */ |
diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h index 4b4921d7a28e..6df45f639666 100644 --- a/arch/x86/include/asm/hw_irq.h +++ b/arch/x86/include/asm/hw_irq.h | |||
@@ -65,7 +65,26 @@ extern unsigned long io_apic_irqs; | |||
65 | extern void init_VISWS_APIC_irqs(void); | 65 | extern void init_VISWS_APIC_irqs(void); |
66 | extern void setup_IO_APIC(void); | 66 | extern void setup_IO_APIC(void); |
67 | extern void disable_IO_APIC(void); | 67 | extern void disable_IO_APIC(void); |
68 | extern int IO_APIC_get_PCI_irq_vector(int bus, int slot, int fn); | 68 | |
69 | struct io_apic_irq_attr { | ||
70 | int ioapic; | ||
71 | int ioapic_pin; | ||
72 | int trigger; | ||
73 | int polarity; | ||
74 | }; | ||
75 | |||
76 | static inline void set_io_apic_irq_attr(struct io_apic_irq_attr *irq_attr, | ||
77 | int ioapic, int ioapic_pin, | ||
78 | int trigger, int polarity) | ||
79 | { | ||
80 | irq_attr->ioapic = ioapic; | ||
81 | irq_attr->ioapic_pin = ioapic_pin; | ||
82 | irq_attr->trigger = trigger; | ||
83 | irq_attr->polarity = polarity; | ||
84 | } | ||
85 | |||
86 | extern int IO_APIC_get_PCI_irq_vector(int bus, int devfn, int pin, | ||
87 | struct io_apic_irq_attr *irq_attr); | ||
69 | extern void setup_ioapic_dest(void); | 88 | extern void setup_ioapic_dest(void); |
70 | 89 | ||
71 | extern void enable_IO_APIC(void); | 90 | extern void enable_IO_APIC(void); |
@@ -80,7 +99,11 @@ extern void eisa_set_level_irq(unsigned int irq); | |||
80 | /* SMP */ | 99 | /* SMP */ |
81 | extern void smp_apic_timer_interrupt(struct pt_regs *); | 100 | extern void smp_apic_timer_interrupt(struct pt_regs *); |
82 | extern void smp_spurious_interrupt(struct pt_regs *); | 101 | extern void smp_spurious_interrupt(struct pt_regs *); |
102 | extern void smp_generic_interrupt(struct pt_regs *); | ||
83 | extern void smp_error_interrupt(struct pt_regs *); | 103 | extern void smp_error_interrupt(struct pt_regs *); |
104 | #ifdef CONFIG_X86_IO_APIC | ||
105 | extern asmlinkage void smp_irq_move_cleanup_interrupt(void); | ||
106 | #endif | ||
84 | #ifdef CONFIG_SMP | 107 | #ifdef CONFIG_SMP |
85 | extern void smp_reschedule_interrupt(struct pt_regs *); | 108 | extern void smp_reschedule_interrupt(struct pt_regs *); |
86 | extern void smp_call_function_interrupt(struct pt_regs *); | 109 | extern void smp_call_function_interrupt(struct pt_regs *); |
diff --git a/arch/x86/include/asm/i387.h b/arch/x86/include/asm/i387.h index 71c9e5183982..175adf58dd4f 100644 --- a/arch/x86/include/asm/i387.h +++ b/arch/x86/include/asm/i387.h | |||
@@ -67,7 +67,7 @@ static inline int fxrstor_checking(struct i387_fxsave_struct *fx) | |||
67 | ".previous\n" | 67 | ".previous\n" |
68 | _ASM_EXTABLE(1b, 3b) | 68 | _ASM_EXTABLE(1b, 3b) |
69 | : [err] "=r" (err) | 69 | : [err] "=r" (err) |
70 | #if 0 /* See comment in __save_init_fpu() below. */ | 70 | #if 0 /* See comment in fxsave() below. */ |
71 | : [fx] "r" (fx), "m" (*fx), "0" (0)); | 71 | : [fx] "r" (fx), "m" (*fx), "0" (0)); |
72 | #else | 72 | #else |
73 | : [fx] "cdaSDb" (fx), "m" (*fx), "0" (0)); | 73 | : [fx] "cdaSDb" (fx), "m" (*fx), "0" (0)); |
@@ -75,14 +75,6 @@ static inline int fxrstor_checking(struct i387_fxsave_struct *fx) | |||
75 | return err; | 75 | return err; |
76 | } | 76 | } |
77 | 77 | ||
78 | static inline int restore_fpu_checking(struct task_struct *tsk) | ||
79 | { | ||
80 | if (task_thread_info(tsk)->status & TS_XSAVE) | ||
81 | return xrstor_checking(&tsk->thread.xstate->xsave); | ||
82 | else | ||
83 | return fxrstor_checking(&tsk->thread.xstate->fxsave); | ||
84 | } | ||
85 | |||
86 | /* AMD CPUs don't save/restore FDP/FIP/FOP unless an exception | 78 | /* AMD CPUs don't save/restore FDP/FIP/FOP unless an exception |
87 | is pending. Clear the x87 state here by setting it to fixed | 79 | is pending. Clear the x87 state here by setting it to fixed |
88 | values. The kernel data segment can be sometimes 0 and sometimes | 80 | values. The kernel data segment can be sometimes 0 and sometimes |
@@ -120,7 +112,7 @@ static inline int fxsave_user(struct i387_fxsave_struct __user *fx) | |||
120 | ".previous\n" | 112 | ".previous\n" |
121 | _ASM_EXTABLE(1b, 3b) | 113 | _ASM_EXTABLE(1b, 3b) |
122 | : [err] "=r" (err), "=m" (*fx) | 114 | : [err] "=r" (err), "=m" (*fx) |
123 | #if 0 /* See comment in __fxsave_clear() below. */ | 115 | #if 0 /* See comment in fxsave() below. */ |
124 | : [fx] "r" (fx), "0" (0)); | 116 | : [fx] "r" (fx), "0" (0)); |
125 | #else | 117 | #else |
126 | : [fx] "cdaSDb" (fx), "0" (0)); | 118 | : [fx] "cdaSDb" (fx), "0" (0)); |
@@ -185,12 +177,9 @@ static inline void tolerant_fwait(void) | |||
185 | asm volatile("fnclex ; fwait"); | 177 | asm volatile("fnclex ; fwait"); |
186 | } | 178 | } |
187 | 179 | ||
188 | static inline void restore_fpu(struct task_struct *tsk) | 180 | /* perform fxrstor iff the processor has extended states, otherwise frstor */ |
181 | static inline int fxrstor_checking(struct i387_fxsave_struct *fx) | ||
189 | { | 182 | { |
190 | if (task_thread_info(tsk)->status & TS_XSAVE) { | ||
191 | xrstor_checking(&tsk->thread.xstate->xsave); | ||
192 | return; | ||
193 | } | ||
194 | /* | 183 | /* |
195 | * The "nop" is needed to make the instructions the same | 184 | * The "nop" is needed to make the instructions the same |
196 | * length. | 185 | * length. |
@@ -199,7 +188,9 @@ static inline void restore_fpu(struct task_struct *tsk) | |||
199 | "nop ; frstor %1", | 188 | "nop ; frstor %1", |
200 | "fxrstor %1", | 189 | "fxrstor %1", |
201 | X86_FEATURE_FXSR, | 190 | X86_FEATURE_FXSR, |
202 | "m" (tsk->thread.xstate->fxsave)); | 191 | "m" (*fx)); |
192 | |||
193 | return 0; | ||
203 | } | 194 | } |
204 | 195 | ||
205 | /* We need a safe address that is cheap to find and that is already | 196 | /* We need a safe address that is cheap to find and that is already |
@@ -262,6 +253,14 @@ end: | |||
262 | 253 | ||
263 | #endif /* CONFIG_X86_64 */ | 254 | #endif /* CONFIG_X86_64 */ |
264 | 255 | ||
256 | static inline int restore_fpu_checking(struct task_struct *tsk) | ||
257 | { | ||
258 | if (task_thread_info(tsk)->status & TS_XSAVE) | ||
259 | return xrstor_checking(&tsk->thread.xstate->xsave); | ||
260 | else | ||
261 | return fxrstor_checking(&tsk->thread.xstate->fxsave); | ||
262 | } | ||
263 | |||
265 | /* | 264 | /* |
266 | * Signal frame handlers... | 265 | * Signal frame handlers... |
267 | */ | 266 | */ |
@@ -305,18 +304,18 @@ static inline void kernel_fpu_end(void) | |||
305 | /* | 304 | /* |
306 | * Some instructions like VIA's padlock instructions generate a spurious | 305 | * Some instructions like VIA's padlock instructions generate a spurious |
307 | * DNA fault but don't modify SSE registers. And these instructions | 306 | * DNA fault but don't modify SSE registers. And these instructions |
308 | * get used from interrupt context aswell. To prevent these kernel instructions | 307 | * get used from interrupt context as well. To prevent these kernel instructions |
309 | * in interrupt context interact wrongly with other user/kernel fpu usage, we | 308 | * in interrupt context interacting wrongly with other user/kernel fpu usage, we |
310 | * should use them only in the context of irq_ts_save/restore() | 309 | * should use them only in the context of irq_ts_save/restore() |
311 | */ | 310 | */ |
312 | static inline int irq_ts_save(void) | 311 | static inline int irq_ts_save(void) |
313 | { | 312 | { |
314 | /* | 313 | /* |
315 | * If we are in process context, we are ok to take a spurious DNA fault. | 314 | * If in process context and not atomic, we can take a spurious DNA fault. |
316 | * Otherwise, doing clts() in process context require pre-emption to | 315 | * Otherwise, doing clts() in process context requires disabling preemption |
317 | * be disabled or some heavy lifting like kernel_fpu_begin() | 316 | * or some heavy lifting like kernel_fpu_begin() |
318 | */ | 317 | */ |
319 | if (!in_interrupt()) | 318 | if (!in_atomic()) |
320 | return 0; | 319 | return 0; |
321 | 320 | ||
322 | if (read_cr0() & X86_CR0_TS) { | 321 | if (read_cr0() & X86_CR0_TS) { |
diff --git a/arch/x86/include/asm/i8259.h b/arch/x86/include/asm/i8259.h index 1a99e6c092af..58d7091eeb1f 100644 --- a/arch/x86/include/asm/i8259.h +++ b/arch/x86/include/asm/i8259.h | |||
@@ -60,8 +60,4 @@ extern struct irq_chip i8259A_chip; | |||
60 | extern void mask_8259A(void); | 60 | extern void mask_8259A(void); |
61 | extern void unmask_8259A(void); | 61 | extern void unmask_8259A(void); |
62 | 62 | ||
63 | #ifdef CONFIG_X86_32 | ||
64 | extern void init_ISA_irqs(void); | ||
65 | #endif | ||
66 | |||
67 | #endif /* _ASM_X86_I8259_H */ | 63 | #endif /* _ASM_X86_I8259_H */ |
diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h index 9d826e436010..daf866ed0612 100644 --- a/arch/x86/include/asm/io_apic.h +++ b/arch/x86/include/asm/io_apic.h | |||
@@ -154,22 +154,19 @@ extern int timer_through_8259; | |||
154 | extern int io_apic_get_unique_id(int ioapic, int apic_id); | 154 | extern int io_apic_get_unique_id(int ioapic, int apic_id); |
155 | extern int io_apic_get_version(int ioapic); | 155 | extern int io_apic_get_version(int ioapic); |
156 | extern int io_apic_get_redir_entries(int ioapic); | 156 | extern int io_apic_get_redir_entries(int ioapic); |
157 | extern int io_apic_set_pci_routing(int ioapic, int pin, int irq, | ||
158 | int edge_level, int active_high_low); | ||
159 | #endif /* CONFIG_ACPI */ | 157 | #endif /* CONFIG_ACPI */ |
160 | 158 | ||
159 | struct io_apic_irq_attr; | ||
160 | extern int io_apic_set_pci_routing(struct device *dev, int irq, | ||
161 | struct io_apic_irq_attr *irq_attr); | ||
161 | extern int (*ioapic_renumber_irq)(int ioapic, int irq); | 162 | extern int (*ioapic_renumber_irq)(int ioapic, int irq); |
162 | extern void ioapic_init_mappings(void); | 163 | extern void ioapic_init_mappings(void); |
163 | 164 | ||
164 | #ifdef CONFIG_X86_64 | ||
165 | extern struct IO_APIC_route_entry **alloc_ioapic_entries(void); | 165 | extern struct IO_APIC_route_entry **alloc_ioapic_entries(void); |
166 | extern void free_ioapic_entries(struct IO_APIC_route_entry **ioapic_entries); | 166 | extern void free_ioapic_entries(struct IO_APIC_route_entry **ioapic_entries); |
167 | extern int save_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries); | 167 | extern int save_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries); |
168 | extern void mask_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries); | 168 | extern void mask_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries); |
169 | extern int restore_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries); | 169 | extern int restore_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries); |
170 | extern void reinit_intr_remapped_IO_APIC(int intr_remapping, | ||
171 | struct IO_APIC_route_entry **ioapic_entries); | ||
172 | #endif | ||
173 | 170 | ||
174 | extern void probe_nr_irqs_gsi(void); | 171 | extern void probe_nr_irqs_gsi(void); |
175 | 172 | ||
diff --git a/arch/x86/include/asm/iomap.h b/arch/x86/include/asm/iomap.h index 86af26091d6c..0e9fe1d9d971 100644 --- a/arch/x86/include/asm/iomap.h +++ b/arch/x86/include/asm/iomap.h | |||
@@ -1,3 +1,6 @@ | |||
1 | #ifndef _ASM_X86_IOMAP_H | ||
2 | #define _ASM_X86_IOMAP_H | ||
3 | |||
1 | /* | 4 | /* |
2 | * Copyright © 2008 Ingo Molnar | 5 | * Copyright © 2008 Ingo Molnar |
3 | * | 6 | * |
@@ -31,3 +34,5 @@ iomap_atomic_prot_pfn(unsigned long pfn, enum km_type type, pgprot_t prot); | |||
31 | 34 | ||
32 | void | 35 | void |
33 | iounmap_atomic(void *kvaddr, enum km_type type); | 36 | iounmap_atomic(void *kvaddr, enum km_type type); |
37 | |||
38 | #endif /* _ASM_X86_IOMAP_H */ | ||
diff --git a/arch/x86/include/asm/irq_remapping.h b/arch/x86/include/asm/irq_remapping.h index 0396760fccb8..f275e2244505 100644 --- a/arch/x86/include/asm/irq_remapping.h +++ b/arch/x86/include/asm/irq_remapping.h | |||
@@ -1,6 +1,6 @@ | |||
1 | #ifndef _ASM_X86_IRQ_REMAPPING_H | 1 | #ifndef _ASM_X86_IRQ_REMAPPING_H |
2 | #define _ASM_X86_IRQ_REMAPPING_H | 2 | #define _ASM_X86_IRQ_REMAPPING_H |
3 | 3 | ||
4 | #define IRTE_DEST(dest) ((x2apic) ? dest : dest << 8) | 4 | #define IRTE_DEST(dest) ((x2apic_mode) ? dest : dest << 8) |
5 | 5 | ||
6 | #endif /* _ASM_X86_IRQ_REMAPPING_H */ | 6 | #endif /* _ASM_X86_IRQ_REMAPPING_H */ |
diff --git a/arch/x86/include/asm/irq_vectors.h b/arch/x86/include/asm/irq_vectors.h index 4492e19f8391..e997be98c9b9 100644 --- a/arch/x86/include/asm/irq_vectors.h +++ b/arch/x86/include/asm/irq_vectors.h | |||
@@ -34,6 +34,7 @@ | |||
34 | 34 | ||
35 | #ifdef CONFIG_X86_32 | 35 | #ifdef CONFIG_X86_32 |
36 | # define SYSCALL_VECTOR 0x80 | 36 | # define SYSCALL_VECTOR 0x80 |
37 | # define IA32_SYSCALL_VECTOR 0x80 | ||
37 | #else | 38 | #else |
38 | # define IA32_SYSCALL_VECTOR 0x80 | 39 | # define IA32_SYSCALL_VECTOR 0x80 |
39 | #endif | 40 | #endif |
diff --git a/arch/x86/include/asm/k8.h b/arch/x86/include/asm/k8.h index 54c8cc53b24d..c2d1f3b58e5f 100644 --- a/arch/x86/include/asm/k8.h +++ b/arch/x86/include/asm/k8.h | |||
@@ -12,4 +12,17 @@ extern int cache_k8_northbridges(void); | |||
12 | extern void k8_flush_garts(void); | 12 | extern void k8_flush_garts(void); |
13 | extern int k8_scan_nodes(unsigned long start, unsigned long end); | 13 | extern int k8_scan_nodes(unsigned long start, unsigned long end); |
14 | 14 | ||
15 | #ifdef CONFIG_K8_NB | ||
16 | static inline struct pci_dev *node_to_k8_nb_misc(int node) | ||
17 | { | ||
18 | return (node < num_k8_northbridges) ? k8_northbridges[node] : NULL; | ||
19 | } | ||
20 | #else | ||
21 | static inline struct pci_dev *node_to_k8_nb_misc(int node) | ||
22 | { | ||
23 | return NULL; | ||
24 | } | ||
25 | #endif | ||
26 | |||
27 | |||
15 | #endif /* _ASM_X86_K8_H */ | 28 | #endif /* _ASM_X86_K8_H */ |
diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h index c882664716c1..ef51b501e22a 100644 --- a/arch/x86/include/asm/microcode.h +++ b/arch/x86/include/asm/microcode.h | |||
@@ -9,20 +9,31 @@ struct cpu_signature { | |||
9 | 9 | ||
10 | struct device; | 10 | struct device; |
11 | 11 | ||
12 | enum ucode_state { UCODE_ERROR, UCODE_OK, UCODE_NFOUND }; | ||
13 | |||
12 | struct microcode_ops { | 14 | struct microcode_ops { |
13 | int (*request_microcode_user) (int cpu, const void __user *buf, size_t size); | 15 | enum ucode_state (*request_microcode_user) (int cpu, |
14 | int (*request_microcode_fw) (int cpu, struct device *device); | 16 | const void __user *buf, size_t size); |
15 | 17 | ||
16 | void (*apply_microcode) (int cpu); | 18 | enum ucode_state (*request_microcode_fw) (int cpu, |
19 | struct device *device); | ||
17 | 20 | ||
18 | int (*collect_cpu_info) (int cpu, struct cpu_signature *csig); | ||
19 | void (*microcode_fini_cpu) (int cpu); | 21 | void (*microcode_fini_cpu) (int cpu); |
22 | |||
23 | /* | ||
24 | * The generic 'microcode_core' part guarantees that | ||
25 | * the callbacks below run on a target cpu when they | ||
26 | * are being called. | ||
27 | * See also the "Synchronization" section in microcode_core.c. | ||
28 | */ | ||
29 | int (*apply_microcode) (int cpu); | ||
30 | int (*collect_cpu_info) (int cpu, struct cpu_signature *csig); | ||
20 | }; | 31 | }; |
21 | 32 | ||
22 | struct ucode_cpu_info { | 33 | struct ucode_cpu_info { |
23 | struct cpu_signature cpu_sig; | 34 | struct cpu_signature cpu_sig; |
24 | int valid; | 35 | int valid; |
25 | void *mc; | 36 | void *mc; |
26 | }; | 37 | }; |
27 | extern struct ucode_cpu_info ucode_cpu_info[]; | 38 | extern struct ucode_cpu_info ucode_cpu_info[]; |
28 | 39 | ||
diff --git a/arch/x86/include/asm/mpspec.h b/arch/x86/include/asm/mpspec.h index 642fc7fc8cdc..e2a1bb6d71ea 100644 --- a/arch/x86/include/asm/mpspec.h +++ b/arch/x86/include/asm/mpspec.h | |||
@@ -61,9 +61,11 @@ extern void get_smp_config(void); | |||
61 | #ifdef CONFIG_X86_MPPARSE | 61 | #ifdef CONFIG_X86_MPPARSE |
62 | extern void find_smp_config(void); | 62 | extern void find_smp_config(void); |
63 | extern void early_reserve_e820_mpc_new(void); | 63 | extern void early_reserve_e820_mpc_new(void); |
64 | extern int enable_update_mptable; | ||
64 | #else | 65 | #else |
65 | static inline void find_smp_config(void) { } | 66 | static inline void find_smp_config(void) { } |
66 | static inline void early_reserve_e820_mpc_new(void) { } | 67 | static inline void early_reserve_e820_mpc_new(void) { } |
68 | #define enable_update_mptable 0 | ||
67 | #endif | 69 | #endif |
68 | 70 | ||
69 | void __cpuinit generic_processor_info(int apicid, int version); | 71 | void __cpuinit generic_processor_info(int apicid, int version); |
@@ -72,20 +74,13 @@ extern void mp_register_ioapic(int id, u32 address, u32 gsi_base); | |||
72 | extern void mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, | 74 | extern void mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, |
73 | u32 gsi); | 75 | u32 gsi); |
74 | extern void mp_config_acpi_legacy_irqs(void); | 76 | extern void mp_config_acpi_legacy_irqs(void); |
75 | extern int mp_register_gsi(u32 gsi, int edge_level, int active_high_low); | 77 | struct device; |
78 | extern int mp_register_gsi(struct device *dev, u32 gsi, int edge_level, | ||
79 | int active_high_low); | ||
76 | extern int acpi_probe_gsi(void); | 80 | extern int acpi_probe_gsi(void); |
77 | #ifdef CONFIG_X86_IO_APIC | 81 | #ifdef CONFIG_X86_IO_APIC |
78 | extern int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin, | ||
79 | u32 gsi, int triggering, int polarity); | ||
80 | extern int mp_find_ioapic(int gsi); | 82 | extern int mp_find_ioapic(int gsi); |
81 | extern int mp_find_ioapic_pin(int ioapic, int gsi); | 83 | extern int mp_find_ioapic_pin(int ioapic, int gsi); |
82 | #else | ||
83 | static inline int | ||
84 | mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin, | ||
85 | u32 gsi, int triggering, int polarity) | ||
86 | { | ||
87 | return 0; | ||
88 | } | ||
89 | #endif | 84 | #endif |
90 | #else /* !CONFIG_ACPI: */ | 85 | #else /* !CONFIG_ACPI: */ |
91 | static inline int acpi_probe_gsi(void) | 86 | static inline int acpi_probe_gsi(void) |
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index ec41fc16c167..4d58d04fca83 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h | |||
@@ -121,7 +121,6 @@ | |||
121 | #define MSR_K8_TOP_MEM1 0xc001001a | 121 | #define MSR_K8_TOP_MEM1 0xc001001a |
122 | #define MSR_K8_TOP_MEM2 0xc001001d | 122 | #define MSR_K8_TOP_MEM2 0xc001001d |
123 | #define MSR_K8_SYSCFG 0xc0010010 | 123 | #define MSR_K8_SYSCFG 0xc0010010 |
124 | #define MSR_K8_HWCR 0xc0010015 | ||
125 | #define MSR_K8_INT_PENDING_MSG 0xc0010055 | 124 | #define MSR_K8_INT_PENDING_MSG 0xc0010055 |
126 | /* C1E active bits in int pending message */ | 125 | /* C1E active bits in int pending message */ |
127 | #define K8_INTP_C1E_ACTIVE_MASK 0x18000000 | 126 | #define K8_INTP_C1E_ACTIVE_MASK 0x18000000 |
diff --git a/arch/x86/include/asm/nmi.h b/arch/x86/include/asm/nmi.h index c45a0a568dff..c97264409934 100644 --- a/arch/x86/include/asm/nmi.h +++ b/arch/x86/include/asm/nmi.h | |||
@@ -64,7 +64,7 @@ static inline int nmi_watchdog_active(void) | |||
64 | * but since they are power of two we could use a | 64 | * but since they are power of two we could use a |
65 | * cheaper way --cvg | 65 | * cheaper way --cvg |
66 | */ | 66 | */ |
67 | return nmi_watchdog & 0x3; | 67 | return nmi_watchdog & (NMI_LOCAL_APIC | NMI_IO_APIC); |
68 | } | 68 | } |
69 | #endif | 69 | #endif |
70 | 70 | ||
diff --git a/arch/x86/include/asm/numa_64.h b/arch/x86/include/asm/numa_64.h index 064ed6df4cbe..c4ae822e415f 100644 --- a/arch/x86/include/asm/numa_64.h +++ b/arch/x86/include/asm/numa_64.h | |||
@@ -17,9 +17,6 @@ extern int compute_hash_shift(struct bootnode *nodes, int numblks, | |||
17 | extern void numa_init_array(void); | 17 | extern void numa_init_array(void); |
18 | extern int numa_off; | 18 | extern int numa_off; |
19 | 19 | ||
20 | extern void srat_reserve_add_area(int nodeid); | ||
21 | extern int hotadd_percent; | ||
22 | |||
23 | extern s16 apicid_to_node[MAX_LOCAL_APIC]; | 20 | extern s16 apicid_to_node[MAX_LOCAL_APIC]; |
24 | 21 | ||
25 | extern unsigned long numa_free_all_bootmem(void); | 22 | extern unsigned long numa_free_all_bootmem(void); |
@@ -27,6 +24,13 @@ extern void setup_node_bootmem(int nodeid, unsigned long start, | |||
27 | unsigned long end); | 24 | unsigned long end); |
28 | 25 | ||
29 | #ifdef CONFIG_NUMA | 26 | #ifdef CONFIG_NUMA |
27 | /* | ||
28 | * Too small node sizes may confuse the VM badly. Usually they | ||
29 | * result from BIOS bugs. So dont recognize nodes as standalone | ||
30 | * NUMA entities that have less than this amount of RAM listed: | ||
31 | */ | ||
32 | #define NODE_MIN_SIZE (4*1024*1024) | ||
33 | |||
30 | extern void __init init_cpu_to_node(void); | 34 | extern void __init init_cpu_to_node(void); |
31 | extern void __cpuinit numa_set_node(int cpu, int node); | 35 | extern void __cpuinit numa_set_node(int cpu, int node); |
32 | extern void __cpuinit numa_clear_node(int cpu); | 36 | extern void __cpuinit numa_clear_node(int cpu); |
diff --git a/arch/x86/include/asm/page_32_types.h b/arch/x86/include/asm/page_32_types.h index 0f915ae649a7..6f1b7331313f 100644 --- a/arch/x86/include/asm/page_32_types.h +++ b/arch/x86/include/asm/page_32_types.h | |||
@@ -54,10 +54,6 @@ extern unsigned int __VMALLOC_RESERVE; | |||
54 | extern int sysctl_legacy_va_layout; | 54 | extern int sysctl_legacy_va_layout; |
55 | 55 | ||
56 | extern void find_low_pfn_range(void); | 56 | extern void find_low_pfn_range(void); |
57 | extern unsigned long init_memory_mapping(unsigned long start, | ||
58 | unsigned long end); | ||
59 | extern void initmem_init(unsigned long, unsigned long); | ||
60 | extern void free_initmem(void); | ||
61 | extern void setup_bootmem_allocator(void); | 57 | extern void setup_bootmem_allocator(void); |
62 | 58 | ||
63 | #endif /* !__ASSEMBLY__ */ | 59 | #endif /* !__ASSEMBLY__ */ |
diff --git a/arch/x86/include/asm/page_64_types.h b/arch/x86/include/asm/page_64_types.h index d38c91b70248..8d382d3abf38 100644 --- a/arch/x86/include/asm/page_64_types.h +++ b/arch/x86/include/asm/page_64_types.h | |||
@@ -32,22 +32,14 @@ | |||
32 | */ | 32 | */ |
33 | #define __PAGE_OFFSET _AC(0xffff880000000000, UL) | 33 | #define __PAGE_OFFSET _AC(0xffff880000000000, UL) |
34 | 34 | ||
35 | #define __PHYSICAL_START CONFIG_PHYSICAL_START | 35 | #define __PHYSICAL_START ((CONFIG_PHYSICAL_START + \ |
36 | #define __KERNEL_ALIGN 0x200000 | 36 | (CONFIG_PHYSICAL_ALIGN - 1)) & \ |
37 | 37 | ~(CONFIG_PHYSICAL_ALIGN - 1)) | |
38 | /* | ||
39 | * Make sure kernel is aligned to 2MB address. Catching it at compile | ||
40 | * time is better. Change your config file and compile the kernel | ||
41 | * for a 2MB aligned address (CONFIG_PHYSICAL_START) | ||
42 | */ | ||
43 | #if (CONFIG_PHYSICAL_START % __KERNEL_ALIGN) != 0 | ||
44 | #error "CONFIG_PHYSICAL_START must be a multiple of 2MB" | ||
45 | #endif | ||
46 | 38 | ||
47 | #define __START_KERNEL (__START_KERNEL_map + __PHYSICAL_START) | 39 | #define __START_KERNEL (__START_KERNEL_map + __PHYSICAL_START) |
48 | #define __START_KERNEL_map _AC(0xffffffff80000000, UL) | 40 | #define __START_KERNEL_map _AC(0xffffffff80000000, UL) |
49 | 41 | ||
50 | /* See Documentation/x86_64/mm.txt for a description of the memory map. */ | 42 | /* See Documentation/x86/x86_64/mm.txt for a description of the memory map. */ |
51 | #define __PHYSICAL_MASK_SHIFT 46 | 43 | #define __PHYSICAL_MASK_SHIFT 46 |
52 | #define __VIRTUAL_MASK_SHIFT 48 | 44 | #define __VIRTUAL_MASK_SHIFT 48 |
53 | 45 | ||
@@ -71,12 +63,6 @@ extern unsigned long __phys_addr(unsigned long); | |||
71 | 63 | ||
72 | #define vmemmap ((struct page *)VMEMMAP_START) | 64 | #define vmemmap ((struct page *)VMEMMAP_START) |
73 | 65 | ||
74 | extern unsigned long init_memory_mapping(unsigned long start, | ||
75 | unsigned long end); | ||
76 | |||
77 | extern void initmem_init(unsigned long start_pfn, unsigned long end_pfn); | ||
78 | extern void free_initmem(void); | ||
79 | |||
80 | extern void init_extra_mapping_uc(unsigned long phys, unsigned long size); | 66 | extern void init_extra_mapping_uc(unsigned long phys, unsigned long size); |
81 | extern void init_extra_mapping_wb(unsigned long phys, unsigned long size); | 67 | extern void init_extra_mapping_wb(unsigned long phys, unsigned long size); |
82 | 68 | ||
diff --git a/arch/x86/include/asm/page_types.h b/arch/x86/include/asm/page_types.h index 826ad37006ab..6473f5ccff85 100644 --- a/arch/x86/include/asm/page_types.h +++ b/arch/x86/include/asm/page_types.h | |||
@@ -46,6 +46,12 @@ extern int devmem_is_allowed(unsigned long pagenr); | |||
46 | extern unsigned long max_low_pfn_mapped; | 46 | extern unsigned long max_low_pfn_mapped; |
47 | extern unsigned long max_pfn_mapped; | 47 | extern unsigned long max_pfn_mapped; |
48 | 48 | ||
49 | extern unsigned long init_memory_mapping(unsigned long start, | ||
50 | unsigned long end); | ||
51 | |||
52 | extern void initmem_init(unsigned long start_pfn, unsigned long end_pfn); | ||
53 | extern void free_initmem(void); | ||
54 | |||
49 | #endif /* !__ASSEMBLY__ */ | 55 | #endif /* !__ASSEMBLY__ */ |
50 | 56 | ||
51 | #endif /* _ASM_X86_PAGE_DEFS_H */ | 57 | #endif /* _ASM_X86_PAGE_DEFS_H */ |
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h index a53da004e08e..4fb37c8a0832 100644 --- a/arch/x86/include/asm/paravirt.h +++ b/arch/x86/include/asm/paravirt.h | |||
@@ -56,6 +56,7 @@ struct desc_ptr; | |||
56 | struct tss_struct; | 56 | struct tss_struct; |
57 | struct mm_struct; | 57 | struct mm_struct; |
58 | struct desc_struct; | 58 | struct desc_struct; |
59 | struct task_struct; | ||
59 | 60 | ||
60 | /* | 61 | /* |
61 | * Wrapper type for pointers to code which uses the non-standard | 62 | * Wrapper type for pointers to code which uses the non-standard |
@@ -203,7 +204,8 @@ struct pv_cpu_ops { | |||
203 | 204 | ||
204 | void (*swapgs)(void); | 205 | void (*swapgs)(void); |
205 | 206 | ||
206 | struct pv_lazy_ops lazy_mode; | 207 | void (*start_context_switch)(struct task_struct *prev); |
208 | void (*end_context_switch)(struct task_struct *next); | ||
207 | }; | 209 | }; |
208 | 210 | ||
209 | struct pv_irq_ops { | 211 | struct pv_irq_ops { |
@@ -1399,25 +1401,23 @@ enum paravirt_lazy_mode { | |||
1399 | }; | 1401 | }; |
1400 | 1402 | ||
1401 | enum paravirt_lazy_mode paravirt_get_lazy_mode(void); | 1403 | enum paravirt_lazy_mode paravirt_get_lazy_mode(void); |
1402 | void paravirt_enter_lazy_cpu(void); | 1404 | void paravirt_start_context_switch(struct task_struct *prev); |
1403 | void paravirt_leave_lazy_cpu(void); | 1405 | void paravirt_end_context_switch(struct task_struct *next); |
1406 | |||
1404 | void paravirt_enter_lazy_mmu(void); | 1407 | void paravirt_enter_lazy_mmu(void); |
1405 | void paravirt_leave_lazy_mmu(void); | 1408 | void paravirt_leave_lazy_mmu(void); |
1406 | void paravirt_leave_lazy(enum paravirt_lazy_mode mode); | ||
1407 | 1409 | ||
1408 | #define __HAVE_ARCH_ENTER_LAZY_CPU_MODE | 1410 | #define __HAVE_ARCH_START_CONTEXT_SWITCH |
1409 | static inline void arch_enter_lazy_cpu_mode(void) | 1411 | static inline void arch_start_context_switch(struct task_struct *prev) |
1410 | { | 1412 | { |
1411 | PVOP_VCALL0(pv_cpu_ops.lazy_mode.enter); | 1413 | PVOP_VCALL1(pv_cpu_ops.start_context_switch, prev); |
1412 | } | 1414 | } |
1413 | 1415 | ||
1414 | static inline void arch_leave_lazy_cpu_mode(void) | 1416 | static inline void arch_end_context_switch(struct task_struct *next) |
1415 | { | 1417 | { |
1416 | PVOP_VCALL0(pv_cpu_ops.lazy_mode.leave); | 1418 | PVOP_VCALL1(pv_cpu_ops.end_context_switch, next); |
1417 | } | 1419 | } |
1418 | 1420 | ||
1419 | void arch_flush_lazy_cpu_mode(void); | ||
1420 | |||
1421 | #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE | 1421 | #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE |
1422 | static inline void arch_enter_lazy_mmu_mode(void) | 1422 | static inline void arch_enter_lazy_mmu_mode(void) |
1423 | { | 1423 | { |
diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h index 29d96d168bc0..18ef7ebf2631 100644 --- a/arch/x86/include/asm/pgtable.h +++ b/arch/x86/include/asm/pgtable.h | |||
@@ -81,6 +81,8 @@ static inline void __init paravirt_pagetable_setup_done(pgd_t *base) | |||
81 | #define pte_val(x) native_pte_val(x) | 81 | #define pte_val(x) native_pte_val(x) |
82 | #define __pte(x) native_make_pte(x) | 82 | #define __pte(x) native_make_pte(x) |
83 | 83 | ||
84 | #define arch_end_context_switch(prev) do {} while(0) | ||
85 | |||
84 | #endif /* CONFIG_PARAVIRT */ | 86 | #endif /* CONFIG_PARAVIRT */ |
85 | 87 | ||
86 | /* | 88 | /* |
@@ -503,6 +505,8 @@ static inline int pgd_none(pgd_t pgd) | |||
503 | 505 | ||
504 | #ifndef __ASSEMBLY__ | 506 | #ifndef __ASSEMBLY__ |
505 | 507 | ||
508 | extern int direct_gbpages; | ||
509 | |||
506 | /* local pte updates need not use xchg for locking */ | 510 | /* local pte updates need not use xchg for locking */ |
507 | static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep) | 511 | static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep) |
508 | { | 512 | { |
diff --git a/arch/x86/include/asm/pgtable_64.h b/arch/x86/include/asm/pgtable_64.h index 6b87bc6d5018..abde308fdb0f 100644 --- a/arch/x86/include/asm/pgtable_64.h +++ b/arch/x86/include/asm/pgtable_64.h | |||
@@ -25,10 +25,6 @@ extern pgd_t init_level4_pgt[]; | |||
25 | 25 | ||
26 | extern void paging_init(void); | 26 | extern void paging_init(void); |
27 | 27 | ||
28 | #endif /* !__ASSEMBLY__ */ | ||
29 | |||
30 | #ifndef __ASSEMBLY__ | ||
31 | |||
32 | #define pte_ERROR(e) \ | 28 | #define pte_ERROR(e) \ |
33 | printk("%s:%d: bad pte %p(%016lx).\n", \ | 29 | printk("%s:%d: bad pte %p(%016lx).\n", \ |
34 | __FILE__, __LINE__, &(e), pte_val(e)) | 30 | __FILE__, __LINE__, &(e), pte_val(e)) |
@@ -135,8 +131,6 @@ static inline int pgd_large(pgd_t pgd) { return 0; } | |||
135 | 131 | ||
136 | #define update_mmu_cache(vma, address, pte) do { } while (0) | 132 | #define update_mmu_cache(vma, address, pte) do { } while (0) |
137 | 133 | ||
138 | extern int direct_gbpages; | ||
139 | |||
140 | /* Encode and de-code a swap entry */ | 134 | /* Encode and de-code a swap entry */ |
141 | #if _PAGE_BIT_FILE < _PAGE_BIT_PROTNONE | 135 | #if _PAGE_BIT_FILE < _PAGE_BIT_PROTNONE |
142 | #define SWP_TYPE_BITS (_PAGE_BIT_FILE - _PAGE_BIT_PRESENT - 1) | 136 | #define SWP_TYPE_BITS (_PAGE_BIT_FILE - _PAGE_BIT_PRESENT - 1) |
diff --git a/arch/x86/include/asm/pgtable_64_types.h b/arch/x86/include/asm/pgtable_64_types.h index fbf42b8e0383..766ea16fbbbd 100644 --- a/arch/x86/include/asm/pgtable_64_types.h +++ b/arch/x86/include/asm/pgtable_64_types.h | |||
@@ -51,11 +51,11 @@ typedef struct { pteval_t pte; } pte_t; | |||
51 | #define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT) | 51 | #define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT) |
52 | #define PGDIR_MASK (~(PGDIR_SIZE - 1)) | 52 | #define PGDIR_MASK (~(PGDIR_SIZE - 1)) |
53 | 53 | ||
54 | 54 | /* See Documentation/x86/x86_64/mm.txt for a description of the memory map. */ | |
55 | #define MAXMEM _AC(__AC(1, UL) << MAX_PHYSMEM_BITS, UL) | 55 | #define MAXMEM _AC(__AC(1, UL) << MAX_PHYSMEM_BITS, UL) |
56 | #define VMALLOC_START _AC(0xffffc20000000000, UL) | 56 | #define VMALLOC_START _AC(0xffffc90000000000, UL) |
57 | #define VMALLOC_END _AC(0xffffe1ffffffffff, UL) | 57 | #define VMALLOC_END _AC(0xffffe8ffffffffff, UL) |
58 | #define VMEMMAP_START _AC(0xffffe20000000000, UL) | 58 | #define VMEMMAP_START _AC(0xffffea0000000000, UL) |
59 | #define MODULES_VADDR _AC(0xffffffffa0000000, UL) | 59 | #define MODULES_VADDR _AC(0xffffffffa0000000, UL) |
60 | #define MODULES_END _AC(0xffffffffff000000, UL) | 60 | #define MODULES_END _AC(0xffffffffff000000, UL) |
61 | #define MODULES_LEN (MODULES_END - MODULES_VADDR) | 61 | #define MODULES_LEN (MODULES_END - MODULES_VADDR) |
diff --git a/arch/x86/include/asm/pgtable_types.h b/arch/x86/include/asm/pgtable_types.h index b8238dc8786d..4d258ad76a0f 100644 --- a/arch/x86/include/asm/pgtable_types.h +++ b/arch/x86/include/asm/pgtable_types.h | |||
@@ -273,7 +273,6 @@ typedef struct page *pgtable_t; | |||
273 | 273 | ||
274 | extern pteval_t __supported_pte_mask; | 274 | extern pteval_t __supported_pte_mask; |
275 | extern int nx_enabled; | 275 | extern int nx_enabled; |
276 | extern void set_nx(void); | ||
277 | 276 | ||
278 | #define pgprot_writecombine pgprot_writecombine | 277 | #define pgprot_writecombine pgprot_writecombine |
279 | extern pgprot_t pgprot_writecombine(pgprot_t prot); | 278 | extern pgprot_t pgprot_writecombine(pgprot_t prot); |
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h index c2cceae709c8..c7768269b1cf 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h | |||
@@ -135,7 +135,8 @@ extern struct cpuinfo_x86 boot_cpu_data; | |||
135 | extern struct cpuinfo_x86 new_cpu_data; | 135 | extern struct cpuinfo_x86 new_cpu_data; |
136 | 136 | ||
137 | extern struct tss_struct doublefault_tss; | 137 | extern struct tss_struct doublefault_tss; |
138 | extern __u32 cleared_cpu_caps[NCAPINTS]; | 138 | extern __u32 cpu_caps_cleared[NCAPINTS]; |
139 | extern __u32 cpu_caps_set[NCAPINTS]; | ||
139 | 140 | ||
140 | #ifdef CONFIG_SMP | 141 | #ifdef CONFIG_SMP |
141 | DECLARE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info); | 142 | DECLARE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info); |
@@ -409,9 +410,6 @@ DECLARE_PER_CPU(unsigned long, stack_canary); | |||
409 | extern unsigned int xstate_size; | 410 | extern unsigned int xstate_size; |
410 | extern void free_thread_xstate(struct task_struct *); | 411 | extern void free_thread_xstate(struct task_struct *); |
411 | extern struct kmem_cache *task_xstate_cachep; | 412 | extern struct kmem_cache *task_xstate_cachep; |
412 | extern void init_scattered_cpuid_features(struct cpuinfo_x86 *c); | ||
413 | extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c); | ||
414 | extern unsigned short num_cache_leaves; | ||
415 | 413 | ||
416 | struct thread_struct { | 414 | struct thread_struct { |
417 | /* Cached TLS descriptors: */ | 415 | /* Cached TLS descriptors: */ |
@@ -427,8 +425,12 @@ struct thread_struct { | |||
427 | unsigned short fsindex; | 425 | unsigned short fsindex; |
428 | unsigned short gsindex; | 426 | unsigned short gsindex; |
429 | #endif | 427 | #endif |
428 | #ifdef CONFIG_X86_32 | ||
430 | unsigned long ip; | 429 | unsigned long ip; |
430 | #endif | ||
431 | #ifdef CONFIG_X86_64 | ||
431 | unsigned long fs; | 432 | unsigned long fs; |
433 | #endif | ||
432 | unsigned long gs; | 434 | unsigned long gs; |
433 | /* Hardware debugging registers: */ | 435 | /* Hardware debugging registers: */ |
434 | unsigned long debugreg0; | 436 | unsigned long debugreg0; |
@@ -460,14 +462,8 @@ struct thread_struct { | |||
460 | unsigned io_bitmap_max; | 462 | unsigned io_bitmap_max; |
461 | /* MSR_IA32_DEBUGCTLMSR value to switch in if TIF_DEBUGCTLMSR is set. */ | 463 | /* MSR_IA32_DEBUGCTLMSR value to switch in if TIF_DEBUGCTLMSR is set. */ |
462 | unsigned long debugctlmsr; | 464 | unsigned long debugctlmsr; |
463 | #ifdef CONFIG_X86_DS | 465 | /* Debug Store context; see asm/ds.h */ |
464 | /* Debug Store context; see include/asm-x86/ds.h; goes into MSR_IA32_DS_AREA */ | ||
465 | struct ds_context *ds_ctx; | 466 | struct ds_context *ds_ctx; |
466 | #endif /* CONFIG_X86_DS */ | ||
467 | #ifdef CONFIG_X86_PTRACE_BTS | ||
468 | /* the signal to send on a bts buffer overflow */ | ||
469 | unsigned int bts_ovfl_signal; | ||
470 | #endif /* CONFIG_X86_PTRACE_BTS */ | ||
471 | }; | 467 | }; |
472 | 468 | ||
473 | static inline unsigned long native_get_debugreg(int regno) | 469 | static inline unsigned long native_get_debugreg(int regno) |
@@ -795,6 +791,21 @@ static inline unsigned long get_debugctlmsr(void) | |||
795 | return debugctlmsr; | 791 | return debugctlmsr; |
796 | } | 792 | } |
797 | 793 | ||
794 | static inline unsigned long get_debugctlmsr_on_cpu(int cpu) | ||
795 | { | ||
796 | u64 debugctlmsr = 0; | ||
797 | u32 val1, val2; | ||
798 | |||
799 | #ifndef CONFIG_X86_DEBUGCTLMSR | ||
800 | if (boot_cpu_data.x86 < 6) | ||
801 | return 0; | ||
802 | #endif | ||
803 | rdmsr_on_cpu(cpu, MSR_IA32_DEBUGCTLMSR, &val1, &val2); | ||
804 | debugctlmsr = val1 | ((u64)val2 << 32); | ||
805 | |||
806 | return debugctlmsr; | ||
807 | } | ||
808 | |||
798 | static inline void update_debugctlmsr(unsigned long debugctlmsr) | 809 | static inline void update_debugctlmsr(unsigned long debugctlmsr) |
799 | { | 810 | { |
800 | #ifndef CONFIG_X86_DEBUGCTLMSR | 811 | #ifndef CONFIG_X86_DEBUGCTLMSR |
@@ -804,6 +815,18 @@ static inline void update_debugctlmsr(unsigned long debugctlmsr) | |||
804 | wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctlmsr); | 815 | wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctlmsr); |
805 | } | 816 | } |
806 | 817 | ||
818 | static inline void update_debugctlmsr_on_cpu(int cpu, | ||
819 | unsigned long debugctlmsr) | ||
820 | { | ||
821 | #ifndef CONFIG_X86_DEBUGCTLMSR | ||
822 | if (boot_cpu_data.x86 < 6) | ||
823 | return; | ||
824 | #endif | ||
825 | wrmsr_on_cpu(cpu, MSR_IA32_DEBUGCTLMSR, | ||
826 | (u32)((u64)debugctlmsr), | ||
827 | (u32)((u64)debugctlmsr >> 32)); | ||
828 | } | ||
829 | |||
807 | /* | 830 | /* |
808 | * from system description table in BIOS. Mostly for MCA use, but | 831 | * from system description table in BIOS. Mostly for MCA use, but |
809 | * others may find it useful: | 832 | * others may find it useful: |
@@ -814,6 +837,7 @@ extern unsigned int BIOS_revision; | |||
814 | 837 | ||
815 | /* Boot loader type from the setup header: */ | 838 | /* Boot loader type from the setup header: */ |
816 | extern int bootloader_type; | 839 | extern int bootloader_type; |
840 | extern int bootloader_version; | ||
817 | 841 | ||
818 | extern char ignore_fpu_irq; | 842 | extern char ignore_fpu_irq; |
819 | 843 | ||
@@ -874,7 +898,6 @@ static inline void spin_lock_prefetch(const void *x) | |||
874 | .vm86_info = NULL, \ | 898 | .vm86_info = NULL, \ |
875 | .sysenter_cs = __KERNEL_CS, \ | 899 | .sysenter_cs = __KERNEL_CS, \ |
876 | .io_bitmap_ptr = NULL, \ | 900 | .io_bitmap_ptr = NULL, \ |
877 | .fs = __KERNEL_PERCPU, \ | ||
878 | } | 901 | } |
879 | 902 | ||
880 | /* | 903 | /* |
diff --git a/arch/x86/include/asm/ptrace.h b/arch/x86/include/asm/ptrace.h index 624f133943ed..0f0d908349aa 100644 --- a/arch/x86/include/asm/ptrace.h +++ b/arch/x86/include/asm/ptrace.h | |||
@@ -236,12 +236,11 @@ extern int do_get_thread_area(struct task_struct *p, int idx, | |||
236 | extern int do_set_thread_area(struct task_struct *p, int idx, | 236 | extern int do_set_thread_area(struct task_struct *p, int idx, |
237 | struct user_desc __user *info, int can_allocate); | 237 | struct user_desc __user *info, int can_allocate); |
238 | 238 | ||
239 | extern void x86_ptrace_untrace(struct task_struct *); | 239 | #ifdef CONFIG_X86_PTRACE_BTS |
240 | extern void x86_ptrace_fork(struct task_struct *child, | 240 | extern void ptrace_bts_untrace(struct task_struct *tsk); |
241 | unsigned long clone_flags); | ||
242 | 241 | ||
243 | #define arch_ptrace_untrace(tsk) x86_ptrace_untrace(tsk) | 242 | #define arch_ptrace_untrace(tsk) ptrace_bts_untrace(tsk) |
244 | #define arch_ptrace_fork(child, flags) x86_ptrace_fork(child, flags) | 243 | #endif /* CONFIG_X86_PTRACE_BTS */ |
245 | 244 | ||
246 | #endif /* __KERNEL__ */ | 245 | #endif /* __KERNEL__ */ |
247 | 246 | ||
diff --git a/arch/x86/include/asm/required-features.h b/arch/x86/include/asm/required-features.h index a4737dddfd58..64cf2d24fad1 100644 --- a/arch/x86/include/asm/required-features.h +++ b/arch/x86/include/asm/required-features.h | |||
@@ -48,9 +48,15 @@ | |||
48 | #endif | 48 | #endif |
49 | 49 | ||
50 | #ifdef CONFIG_X86_64 | 50 | #ifdef CONFIG_X86_64 |
51 | #ifdef CONFIG_PARAVIRT | ||
52 | /* Paravirtualized systems may not have PSE or PGE available */ | ||
51 | #define NEED_PSE 0 | 53 | #define NEED_PSE 0 |
52 | #define NEED_MSR (1<<(X86_FEATURE_MSR & 31)) | ||
53 | #define NEED_PGE 0 | 54 | #define NEED_PGE 0 |
55 | #else | ||
56 | #define NEED_PSE (1<<(X86_FEATURE_PSE) & 31) | ||
57 | #define NEED_PGE (1<<(X86_FEATURE_PGE) & 31) | ||
58 | #endif | ||
59 | #define NEED_MSR (1<<(X86_FEATURE_MSR & 31)) | ||
54 | #define NEED_FXSR (1<<(X86_FEATURE_FXSR & 31)) | 60 | #define NEED_FXSR (1<<(X86_FEATURE_FXSR & 31)) |
55 | #define NEED_XMM (1<<(X86_FEATURE_XMM & 31)) | 61 | #define NEED_XMM (1<<(X86_FEATURE_XMM & 31)) |
56 | #define NEED_XMM2 (1<<(X86_FEATURE_XMM2 & 31)) | 62 | #define NEED_XMM2 (1<<(X86_FEATURE_XMM2 & 31)) |
diff --git a/arch/x86/include/asm/setup.h b/arch/x86/include/asm/setup.h index bdc2ada05ae0..4093d1ed6db2 100644 --- a/arch/x86/include/asm/setup.h +++ b/arch/x86/include/asm/setup.h | |||
@@ -33,7 +33,6 @@ struct x86_quirks { | |||
33 | int (*setup_ioapic_ids)(void); | 33 | int (*setup_ioapic_ids)(void); |
34 | }; | 34 | }; |
35 | 35 | ||
36 | extern void x86_quirk_pre_intr_init(void); | ||
37 | extern void x86_quirk_intr_init(void); | 36 | extern void x86_quirk_intr_init(void); |
38 | 37 | ||
39 | extern void x86_quirk_trap_init(void); | 38 | extern void x86_quirk_trap_init(void); |
diff --git a/arch/x86/include/asm/smp.h b/arch/x86/include/asm/smp.h index 19e0d88b966d..6a84ed166aec 100644 --- a/arch/x86/include/asm/smp.h +++ b/arch/x86/include/asm/smp.h | |||
@@ -180,7 +180,7 @@ extern int safe_smp_processor_id(void); | |||
180 | static inline int logical_smp_processor_id(void) | 180 | static inline int logical_smp_processor_id(void) |
181 | { | 181 | { |
182 | /* we don't want to mark this access volatile - bad code generation */ | 182 | /* we don't want to mark this access volatile - bad code generation */ |
183 | return GET_APIC_LOGICAL_ID(*(u32 *)(APIC_BASE + APIC_LDR)); | 183 | return GET_APIC_LOGICAL_ID(apic_read(APIC_LDR)); |
184 | } | 184 | } |
185 | 185 | ||
186 | #endif | 186 | #endif |
diff --git a/arch/x86/include/asm/sparsemem.h b/arch/x86/include/asm/sparsemem.h index e3cc3c063ec5..4517d6b93188 100644 --- a/arch/x86/include/asm/sparsemem.h +++ b/arch/x86/include/asm/sparsemem.h | |||
@@ -27,7 +27,7 @@ | |||
27 | #else /* CONFIG_X86_32 */ | 27 | #else /* CONFIG_X86_32 */ |
28 | # define SECTION_SIZE_BITS 27 /* matt - 128 is convenient right now */ | 28 | # define SECTION_SIZE_BITS 27 /* matt - 128 is convenient right now */ |
29 | # define MAX_PHYSADDR_BITS 44 | 29 | # define MAX_PHYSADDR_BITS 44 |
30 | # define MAX_PHYSMEM_BITS 44 /* Can be max 45 bits */ | 30 | # define MAX_PHYSMEM_BITS 46 |
31 | #endif | 31 | #endif |
32 | 32 | ||
33 | #endif /* CONFIG_SPARSEMEM */ | 33 | #endif /* CONFIG_SPARSEMEM */ |
diff --git a/arch/x86/include/asm/syscalls.h b/arch/x86/include/asm/syscalls.h index 7043408f6904..372b76edd63f 100644 --- a/arch/x86/include/asm/syscalls.h +++ b/arch/x86/include/asm/syscalls.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * syscalls.h - Linux syscall interfaces (arch-specific) | 2 | * syscalls.h - Linux syscall interfaces (arch-specific) |
3 | * | 3 | * |
4 | * Copyright (c) 2008 Jaswinder Singh | 4 | * Copyright (c) 2008 Jaswinder Singh Rajput |
5 | * | 5 | * |
6 | * This file is released under the GPLv2. | 6 | * This file is released under the GPLv2. |
7 | * See the file COPYING for more details. | 7 | * See the file COPYING for more details. |
@@ -12,50 +12,55 @@ | |||
12 | 12 | ||
13 | #include <linux/compiler.h> | 13 | #include <linux/compiler.h> |
14 | #include <linux/linkage.h> | 14 | #include <linux/linkage.h> |
15 | #include <linux/types.h> | ||
16 | #include <linux/signal.h> | 15 | #include <linux/signal.h> |
16 | #include <linux/types.h> | ||
17 | 17 | ||
18 | /* Common in X86_32 and X86_64 */ | 18 | /* Common in X86_32 and X86_64 */ |
19 | /* kernel/ioport.c */ | 19 | /* kernel/ioport.c */ |
20 | asmlinkage long sys_ioperm(unsigned long, unsigned long, int); | 20 | asmlinkage long sys_ioperm(unsigned long, unsigned long, int); |
21 | 21 | ||
22 | /* kernel/process.c */ | ||
23 | int sys_fork(struct pt_regs *); | ||
24 | int sys_vfork(struct pt_regs *); | ||
25 | |||
22 | /* kernel/ldt.c */ | 26 | /* kernel/ldt.c */ |
23 | asmlinkage int sys_modify_ldt(int, void __user *, unsigned long); | 27 | asmlinkage int sys_modify_ldt(int, void __user *, unsigned long); |
24 | 28 | ||
29 | /* kernel/signal.c */ | ||
30 | long sys_rt_sigreturn(struct pt_regs *); | ||
31 | |||
25 | /* kernel/tls.c */ | 32 | /* kernel/tls.c */ |
26 | asmlinkage int sys_set_thread_area(struct user_desc __user *); | 33 | asmlinkage int sys_set_thread_area(struct user_desc __user *); |
27 | asmlinkage int sys_get_thread_area(struct user_desc __user *); | 34 | asmlinkage int sys_get_thread_area(struct user_desc __user *); |
28 | 35 | ||
29 | /* X86_32 only */ | 36 | /* X86_32 only */ |
30 | #ifdef CONFIG_X86_32 | 37 | #ifdef CONFIG_X86_32 |
38 | /* kernel/ioport.c */ | ||
39 | long sys_iopl(struct pt_regs *); | ||
40 | |||
31 | /* kernel/process_32.c */ | 41 | /* kernel/process_32.c */ |
32 | int sys_fork(struct pt_regs *); | ||
33 | int sys_clone(struct pt_regs *); | 42 | int sys_clone(struct pt_regs *); |
34 | int sys_vfork(struct pt_regs *); | ||
35 | int sys_execve(struct pt_regs *); | 43 | int sys_execve(struct pt_regs *); |
36 | 44 | ||
37 | /* kernel/signal_32.c */ | 45 | /* kernel/signal.c */ |
38 | asmlinkage int sys_sigsuspend(int, int, old_sigset_t); | 46 | asmlinkage int sys_sigsuspend(int, int, old_sigset_t); |
39 | asmlinkage int sys_sigaction(int, const struct old_sigaction __user *, | 47 | asmlinkage int sys_sigaction(int, const struct old_sigaction __user *, |
40 | struct old_sigaction __user *); | 48 | struct old_sigaction __user *); |
41 | int sys_sigaltstack(struct pt_regs *); | 49 | int sys_sigaltstack(struct pt_regs *); |
42 | unsigned long sys_sigreturn(struct pt_regs *); | 50 | unsigned long sys_sigreturn(struct pt_regs *); |
43 | long sys_rt_sigreturn(struct pt_regs *); | ||
44 | |||
45 | /* kernel/ioport.c */ | ||
46 | long sys_iopl(struct pt_regs *); | ||
47 | 51 | ||
48 | /* kernel/sys_i386_32.c */ | 52 | /* kernel/sys_i386_32.c */ |
53 | struct mmap_arg_struct; | ||
54 | struct sel_arg_struct; | ||
55 | struct oldold_utsname; | ||
56 | struct old_utsname; | ||
57 | |||
49 | asmlinkage long sys_mmap2(unsigned long, unsigned long, unsigned long, | 58 | asmlinkage long sys_mmap2(unsigned long, unsigned long, unsigned long, |
50 | unsigned long, unsigned long, unsigned long); | 59 | unsigned long, unsigned long, unsigned long); |
51 | struct mmap_arg_struct; | ||
52 | asmlinkage int old_mmap(struct mmap_arg_struct __user *); | 60 | asmlinkage int old_mmap(struct mmap_arg_struct __user *); |
53 | struct sel_arg_struct; | ||
54 | asmlinkage int old_select(struct sel_arg_struct __user *); | 61 | asmlinkage int old_select(struct sel_arg_struct __user *); |
55 | asmlinkage int sys_ipc(uint, int, int, int, void __user *, long); | 62 | asmlinkage int sys_ipc(uint, int, int, int, void __user *, long); |
56 | struct old_utsname; | ||
57 | asmlinkage int sys_uname(struct old_utsname __user *); | 63 | asmlinkage int sys_uname(struct old_utsname __user *); |
58 | struct oldold_utsname; | ||
59 | asmlinkage int sys_olduname(struct oldold_utsname __user *); | 64 | asmlinkage int sys_olduname(struct oldold_utsname __user *); |
60 | 65 | ||
61 | /* kernel/vm86_32.c */ | 66 | /* kernel/vm86_32.c */ |
@@ -65,29 +70,27 @@ int sys_vm86(struct pt_regs *); | |||
65 | #else /* CONFIG_X86_32 */ | 70 | #else /* CONFIG_X86_32 */ |
66 | 71 | ||
67 | /* X86_64 only */ | 72 | /* X86_64 only */ |
73 | /* kernel/ioport.c */ | ||
74 | asmlinkage long sys_iopl(unsigned int, struct pt_regs *); | ||
75 | |||
68 | /* kernel/process_64.c */ | 76 | /* kernel/process_64.c */ |
69 | asmlinkage long sys_fork(struct pt_regs *); | ||
70 | asmlinkage long sys_clone(unsigned long, unsigned long, | 77 | asmlinkage long sys_clone(unsigned long, unsigned long, |
71 | void __user *, void __user *, | 78 | void __user *, void __user *, |
72 | struct pt_regs *); | 79 | struct pt_regs *); |
73 | asmlinkage long sys_vfork(struct pt_regs *); | ||
74 | asmlinkage long sys_execve(char __user *, char __user * __user *, | 80 | asmlinkage long sys_execve(char __user *, char __user * __user *, |
75 | char __user * __user *, | 81 | char __user * __user *, |
76 | struct pt_regs *); | 82 | struct pt_regs *); |
77 | long sys_arch_prctl(int, unsigned long); | 83 | long sys_arch_prctl(int, unsigned long); |
78 | 84 | ||
79 | /* kernel/ioport.c */ | 85 | /* kernel/signal.c */ |
80 | asmlinkage long sys_iopl(unsigned int, struct pt_regs *); | ||
81 | |||
82 | /* kernel/signal_64.c */ | ||
83 | asmlinkage long sys_sigaltstack(const stack_t __user *, stack_t __user *, | 86 | asmlinkage long sys_sigaltstack(const stack_t __user *, stack_t __user *, |
84 | struct pt_regs *); | 87 | struct pt_regs *); |
85 | long sys_rt_sigreturn(struct pt_regs *); | ||
86 | 88 | ||
87 | /* kernel/sys_x86_64.c */ | 89 | /* kernel/sys_x86_64.c */ |
90 | struct new_utsname; | ||
91 | |||
88 | asmlinkage long sys_mmap(unsigned long, unsigned long, unsigned long, | 92 | asmlinkage long sys_mmap(unsigned long, unsigned long, unsigned long, |
89 | unsigned long, unsigned long, unsigned long); | 93 | unsigned long, unsigned long, unsigned long); |
90 | struct new_utsname; | ||
91 | asmlinkage long sys_uname(struct new_utsname __user *); | 94 | asmlinkage long sys_uname(struct new_utsname __user *); |
92 | 95 | ||
93 | #endif /* CONFIG_X86_32 */ | 96 | #endif /* CONFIG_X86_32 */ |
diff --git a/arch/x86/include/asm/thread_info.h b/arch/x86/include/asm/thread_info.h index 8820a73ae090..602c769fc98c 100644 --- a/arch/x86/include/asm/thread_info.h +++ b/arch/x86/include/asm/thread_info.h | |||
@@ -94,7 +94,8 @@ struct thread_info { | |||
94 | #define TIF_FORCED_TF 24 /* true if TF in eflags artificially */ | 94 | #define TIF_FORCED_TF 24 /* true if TF in eflags artificially */ |
95 | #define TIF_DEBUGCTLMSR 25 /* uses thread_struct.debugctlmsr */ | 95 | #define TIF_DEBUGCTLMSR 25 /* uses thread_struct.debugctlmsr */ |
96 | #define TIF_DS_AREA_MSR 26 /* uses thread_struct.ds_area_msr */ | 96 | #define TIF_DS_AREA_MSR 26 /* uses thread_struct.ds_area_msr */ |
97 | #define TIF_SYSCALL_FTRACE 27 /* for ftrace syscall instrumentation */ | 97 | #define TIF_LAZY_MMU_UPDATES 27 /* task is updating the mmu lazily */ |
98 | #define TIF_SYSCALL_FTRACE 28 /* for ftrace syscall instrumentation */ | ||
98 | 99 | ||
99 | #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) | 100 | #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) |
100 | #define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) | 101 | #define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) |
@@ -116,6 +117,7 @@ struct thread_info { | |||
116 | #define _TIF_FORCED_TF (1 << TIF_FORCED_TF) | 117 | #define _TIF_FORCED_TF (1 << TIF_FORCED_TF) |
117 | #define _TIF_DEBUGCTLMSR (1 << TIF_DEBUGCTLMSR) | 118 | #define _TIF_DEBUGCTLMSR (1 << TIF_DEBUGCTLMSR) |
118 | #define _TIF_DS_AREA_MSR (1 << TIF_DS_AREA_MSR) | 119 | #define _TIF_DS_AREA_MSR (1 << TIF_DS_AREA_MSR) |
120 | #define _TIF_LAZY_MMU_UPDATES (1 << TIF_LAZY_MMU_UPDATES) | ||
119 | #define _TIF_SYSCALL_FTRACE (1 << TIF_SYSCALL_FTRACE) | 121 | #define _TIF_SYSCALL_FTRACE (1 << TIF_SYSCALL_FTRACE) |
120 | 122 | ||
121 | /* work to do in syscall_trace_enter() */ | 123 | /* work to do in syscall_trace_enter() */ |
diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h index 16a5c84b0329..a5ecc9c33e92 100644 --- a/arch/x86/include/asm/tlbflush.h +++ b/arch/x86/include/asm/tlbflush.h | |||
@@ -17,7 +17,7 @@ | |||
17 | 17 | ||
18 | static inline void __native_flush_tlb(void) | 18 | static inline void __native_flush_tlb(void) |
19 | { | 19 | { |
20 | write_cr3(read_cr3()); | 20 | native_write_cr3(native_read_cr3()); |
21 | } | 21 | } |
22 | 22 | ||
23 | static inline void __native_flush_tlb_global(void) | 23 | static inline void __native_flush_tlb_global(void) |
@@ -32,11 +32,11 @@ static inline void __native_flush_tlb_global(void) | |||
32 | */ | 32 | */ |
33 | raw_local_irq_save(flags); | 33 | raw_local_irq_save(flags); |
34 | 34 | ||
35 | cr4 = read_cr4(); | 35 | cr4 = native_read_cr4(); |
36 | /* clear PGE */ | 36 | /* clear PGE */ |
37 | write_cr4(cr4 & ~X86_CR4_PGE); | 37 | native_write_cr4(cr4 & ~X86_CR4_PGE); |
38 | /* write old PGE again and flush TLBs */ | 38 | /* write old PGE again and flush TLBs */ |
39 | write_cr4(cr4); | 39 | native_write_cr4(cr4); |
40 | 40 | ||
41 | raw_local_irq_restore(flags); | 41 | raw_local_irq_restore(flags); |
42 | } | 42 | } |
diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h index f44b49abca49..066ef590d7e0 100644 --- a/arch/x86/include/asm/topology.h +++ b/arch/x86/include/asm/topology.h | |||
@@ -203,7 +203,8 @@ struct pci_bus; | |||
203 | void x86_pci_root_bus_res_quirks(struct pci_bus *b); | 203 | void x86_pci_root_bus_res_quirks(struct pci_bus *b); |
204 | 204 | ||
205 | #ifdef CONFIG_SMP | 205 | #ifdef CONFIG_SMP |
206 | #define mc_capable() (cpumask_weight(cpu_core_mask(0)) != nr_cpu_ids) | 206 | #define mc_capable() ((boot_cpu_data.x86_max_cores > 1) && \ |
207 | (cpumask_weight(cpu_core_mask(0)) != nr_cpu_ids)) | ||
207 | #define smt_capable() (smp_num_siblings > 1) | 208 | #define smt_capable() (smp_num_siblings > 1) |
208 | #endif | 209 | #endif |
209 | 210 | ||
diff --git a/arch/x86/include/asm/traps.h b/arch/x86/include/asm/traps.h index 0d5342515b86..bfd74c032fca 100644 --- a/arch/x86/include/asm/traps.h +++ b/arch/x86/include/asm/traps.h | |||
@@ -2,6 +2,7 @@ | |||
2 | #define _ASM_X86_TRAPS_H | 2 | #define _ASM_X86_TRAPS_H |
3 | 3 | ||
4 | #include <asm/debugreg.h> | 4 | #include <asm/debugreg.h> |
5 | #include <asm/siginfo.h> /* TRAP_TRACE, ... */ | ||
5 | 6 | ||
6 | #ifdef CONFIG_X86_32 | 7 | #ifdef CONFIG_X86_32 |
7 | #define dotraplinkage | 8 | #define dotraplinkage |
@@ -13,6 +14,9 @@ asmlinkage void divide_error(void); | |||
13 | asmlinkage void debug(void); | 14 | asmlinkage void debug(void); |
14 | asmlinkage void nmi(void); | 15 | asmlinkage void nmi(void); |
15 | asmlinkage void int3(void); | 16 | asmlinkage void int3(void); |
17 | asmlinkage void xen_debug(void); | ||
18 | asmlinkage void xen_int3(void); | ||
19 | asmlinkage void xen_stack_segment(void); | ||
16 | asmlinkage void overflow(void); | 20 | asmlinkage void overflow(void); |
17 | asmlinkage void bounds(void); | 21 | asmlinkage void bounds(void); |
18 | asmlinkage void invalid_op(void); | 22 | asmlinkage void invalid_op(void); |
@@ -74,7 +78,6 @@ static inline int get_si_code(unsigned long condition) | |||
74 | } | 78 | } |
75 | 79 | ||
76 | extern int panic_on_unrecovered_nmi; | 80 | extern int panic_on_unrecovered_nmi; |
77 | extern int kstack_depth_to_print; | ||
78 | 81 | ||
79 | void math_error(void __user *); | 82 | void math_error(void __user *); |
80 | void math_emulate(struct math_emu_info *); | 83 | void math_emulate(struct math_emu_info *); |
diff --git a/arch/x86/include/asm/uv/uv_bau.h b/arch/x86/include/asm/uv/uv_bau.h index 9b0e61bf7a88..bddd44f2f0ab 100644 --- a/arch/x86/include/asm/uv/uv_bau.h +++ b/arch/x86/include/asm/uv/uv_bau.h | |||
@@ -37,7 +37,7 @@ | |||
37 | #define UV_CPUS_PER_ACT_STATUS 32 | 37 | #define UV_CPUS_PER_ACT_STATUS 32 |
38 | #define UV_ACT_STATUS_MASK 0x3 | 38 | #define UV_ACT_STATUS_MASK 0x3 |
39 | #define UV_ACT_STATUS_SIZE 2 | 39 | #define UV_ACT_STATUS_SIZE 2 |
40 | #define UV_ACTIVATION_DESCRIPTOR_SIZE 32 | 40 | #define UV_ADP_SIZE 32 |
41 | #define UV_DISTRIBUTION_SIZE 256 | 41 | #define UV_DISTRIBUTION_SIZE 256 |
42 | #define UV_SW_ACK_NPENDING 8 | 42 | #define UV_SW_ACK_NPENDING 8 |
43 | #define UV_NET_ENDPOINT_INTD 0x38 | 43 | #define UV_NET_ENDPOINT_INTD 0x38 |
diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h index d3a98ea1062e..341070f7ad5c 100644 --- a/arch/x86/include/asm/uv/uv_hub.h +++ b/arch/x86/include/asm/uv/uv_hub.h | |||
@@ -133,6 +133,7 @@ struct uv_scir_s { | |||
133 | struct uv_hub_info_s { | 133 | struct uv_hub_info_s { |
134 | unsigned long global_mmr_base; | 134 | unsigned long global_mmr_base; |
135 | unsigned long gpa_mask; | 135 | unsigned long gpa_mask; |
136 | unsigned int gnode_extra; | ||
136 | unsigned long gnode_upper; | 137 | unsigned long gnode_upper; |
137 | unsigned long lowmem_remap_top; | 138 | unsigned long lowmem_remap_top; |
138 | unsigned long lowmem_remap_base; | 139 | unsigned long lowmem_remap_base; |
@@ -159,7 +160,8 @@ DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info); | |||
159 | * p - PNODE (local part of nsids, right shifted 1) | 160 | * p - PNODE (local part of nsids, right shifted 1) |
160 | */ | 161 | */ |
161 | #define UV_NASID_TO_PNODE(n) (((n) >> 1) & uv_hub_info->pnode_mask) | 162 | #define UV_NASID_TO_PNODE(n) (((n) >> 1) & uv_hub_info->pnode_mask) |
162 | #define UV_PNODE_TO_NASID(p) (((p) << 1) | uv_hub_info->gnode_upper) | 163 | #define UV_PNODE_TO_GNODE(p) ((p) |uv_hub_info->gnode_extra) |
164 | #define UV_PNODE_TO_NASID(p) (UV_PNODE_TO_GNODE(p) << 1) | ||
163 | 165 | ||
164 | #define UV_LOCAL_MMR_BASE 0xf4000000UL | 166 | #define UV_LOCAL_MMR_BASE 0xf4000000UL |
165 | #define UV_GLOBAL_MMR32_BASE 0xf8000000UL | 167 | #define UV_GLOBAL_MMR32_BASE 0xf8000000UL |
@@ -173,7 +175,7 @@ DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info); | |||
173 | #define UV_GLOBAL_MMR32_PNODE_BITS(p) ((p) << (UV_GLOBAL_MMR32_PNODE_SHIFT)) | 175 | #define UV_GLOBAL_MMR32_PNODE_BITS(p) ((p) << (UV_GLOBAL_MMR32_PNODE_SHIFT)) |
174 | 176 | ||
175 | #define UV_GLOBAL_MMR64_PNODE_BITS(p) \ | 177 | #define UV_GLOBAL_MMR64_PNODE_BITS(p) \ |
176 | ((unsigned long)(p) << UV_GLOBAL_MMR64_PNODE_SHIFT) | 178 | ((unsigned long)(UV_PNODE_TO_GNODE(p)) << UV_GLOBAL_MMR64_PNODE_SHIFT) |
177 | 179 | ||
178 | #define UV_APIC_PNODE_SHIFT 6 | 180 | #define UV_APIC_PNODE_SHIFT 6 |
179 | 181 | ||
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile index 88d1bfc847d3..4f78bd682125 100644 --- a/arch/x86/kernel/Makefile +++ b/arch/x86/kernel/Makefile | |||
@@ -28,7 +28,7 @@ CFLAGS_paravirt.o := $(nostackp) | |||
28 | obj-y := process_$(BITS).o signal.o entry_$(BITS).o | 28 | obj-y := process_$(BITS).o signal.o entry_$(BITS).o |
29 | obj-y += traps.o irq.o irq_$(BITS).o dumpstack_$(BITS).o | 29 | obj-y += traps.o irq.o irq_$(BITS).o dumpstack_$(BITS).o |
30 | obj-y += time_$(BITS).o ioport.o ldt.o dumpstack.o | 30 | obj-y += time_$(BITS).o ioport.o ldt.o dumpstack.o |
31 | obj-y += setup.o i8259.o irqinit_$(BITS).o | 31 | obj-y += setup.o i8259.o irqinit.o |
32 | obj-$(CONFIG_X86_VISWS) += visws_quirks.o | 32 | obj-$(CONFIG_X86_VISWS) += visws_quirks.o |
33 | obj-$(CONFIG_X86_32) += probe_roms_32.o | 33 | obj-$(CONFIG_X86_32) += probe_roms_32.o |
34 | obj-$(CONFIG_X86_32) += sys_i386_32.o i386_ksyms_32.o | 34 | obj-$(CONFIG_X86_32) += sys_i386_32.o i386_ksyms_32.o |
@@ -44,6 +44,7 @@ obj-y += process.o | |||
44 | obj-y += i387.o xsave.o | 44 | obj-y += i387.o xsave.o |
45 | obj-y += ptrace.o | 45 | obj-y += ptrace.o |
46 | obj-$(CONFIG_X86_DS) += ds.o | 46 | obj-$(CONFIG_X86_DS) += ds.o |
47 | obj-$(CONFIG_X86_DS_SELFTEST) += ds_selftest.o | ||
47 | obj-$(CONFIG_X86_32) += tls.o | 48 | obj-$(CONFIG_X86_32) += tls.o |
48 | obj-$(CONFIG_IA32_EMULATION) += tls.o | 49 | obj-$(CONFIG_IA32_EMULATION) += tls.o |
49 | obj-y += step.o | 50 | obj-y += step.o |
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c index 723989d7f802..631086159c53 100644 --- a/arch/x86/kernel/acpi/boot.c +++ b/arch/x86/kernel/acpi/boot.c | |||
@@ -33,6 +33,7 @@ | |||
33 | #include <linux/irq.h> | 33 | #include <linux/irq.h> |
34 | #include <linux/bootmem.h> | 34 | #include <linux/bootmem.h> |
35 | #include <linux/ioport.h> | 35 | #include <linux/ioport.h> |
36 | #include <linux/pci.h> | ||
36 | 37 | ||
37 | #include <asm/pgtable.h> | 38 | #include <asm/pgtable.h> |
38 | #include <asm/io_apic.h> | 39 | #include <asm/io_apic.h> |
@@ -522,7 +523,7 @@ int acpi_gsi_to_irq(u32 gsi, unsigned int *irq) | |||
522 | * success: return IRQ number (>=0) | 523 | * success: return IRQ number (>=0) |
523 | * failure: return < 0 | 524 | * failure: return < 0 |
524 | */ | 525 | */ |
525 | int acpi_register_gsi(u32 gsi, int triggering, int polarity) | 526 | int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity) |
526 | { | 527 | { |
527 | unsigned int irq; | 528 | unsigned int irq; |
528 | unsigned int plat_gsi = gsi; | 529 | unsigned int plat_gsi = gsi; |
@@ -532,14 +533,14 @@ int acpi_register_gsi(u32 gsi, int triggering, int polarity) | |||
532 | * Make sure all (legacy) PCI IRQs are set as level-triggered. | 533 | * Make sure all (legacy) PCI IRQs are set as level-triggered. |
533 | */ | 534 | */ |
534 | if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) { | 535 | if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) { |
535 | if (triggering == ACPI_LEVEL_SENSITIVE) | 536 | if (trigger == ACPI_LEVEL_SENSITIVE) |
536 | eisa_set_level_irq(gsi); | 537 | eisa_set_level_irq(gsi); |
537 | } | 538 | } |
538 | #endif | 539 | #endif |
539 | 540 | ||
540 | #ifdef CONFIG_X86_IO_APIC | 541 | #ifdef CONFIG_X86_IO_APIC |
541 | if (acpi_irq_model == ACPI_IRQ_MODEL_IOAPIC) { | 542 | if (acpi_irq_model == ACPI_IRQ_MODEL_IOAPIC) { |
542 | plat_gsi = mp_register_gsi(gsi, triggering, polarity); | 543 | plat_gsi = mp_register_gsi(dev, gsi, trigger, polarity); |
543 | } | 544 | } |
544 | #endif | 545 | #endif |
545 | acpi_gsi_to_irq(plat_gsi, &irq); | 546 | acpi_gsi_to_irq(plat_gsi, &irq); |
@@ -903,10 +904,8 @@ extern int es7000_plat; | |||
903 | #endif | 904 | #endif |
904 | 905 | ||
905 | static struct { | 906 | static struct { |
906 | int apic_id; | ||
907 | int gsi_base; | 907 | int gsi_base; |
908 | int gsi_end; | 908 | int gsi_end; |
909 | DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1); | ||
910 | } mp_ioapic_routing[MAX_IO_APICS]; | 909 | } mp_ioapic_routing[MAX_IO_APICS]; |
911 | 910 | ||
912 | int mp_find_ioapic(int gsi) | 911 | int mp_find_ioapic(int gsi) |
@@ -986,16 +985,12 @@ void __init mp_register_ioapic(int id, u32 address, u32 gsi_base) | |||
986 | 985 | ||
987 | set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address); | 986 | set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address); |
988 | mp_ioapics[idx].apicid = uniq_ioapic_id(id); | 987 | mp_ioapics[idx].apicid = uniq_ioapic_id(id); |
989 | #ifdef CONFIG_X86_32 | ||
990 | mp_ioapics[idx].apicver = io_apic_get_version(idx); | 988 | mp_ioapics[idx].apicver = io_apic_get_version(idx); |
991 | #else | 989 | |
992 | mp_ioapics[idx].apicver = 0; | ||
993 | #endif | ||
994 | /* | 990 | /* |
995 | * Build basic GSI lookup table to facilitate gsi->io_apic lookups | 991 | * Build basic GSI lookup table to facilitate gsi->io_apic lookups |
996 | * and to prevent reprogramming of IOAPIC pins (PCI GSIs). | 992 | * and to prevent reprogramming of IOAPIC pins (PCI GSIs). |
997 | */ | 993 | */ |
998 | mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].apicid; | ||
999 | mp_ioapic_routing[idx].gsi_base = gsi_base; | 994 | mp_ioapic_routing[idx].gsi_base = gsi_base; |
1000 | mp_ioapic_routing[idx].gsi_end = gsi_base + | 995 | mp_ioapic_routing[idx].gsi_end = gsi_base + |
1001 | io_apic_get_redir_entries(idx); | 996 | io_apic_get_redir_entries(idx); |
@@ -1158,26 +1153,52 @@ void __init mp_config_acpi_legacy_irqs(void) | |||
1158 | } | 1153 | } |
1159 | } | 1154 | } |
1160 | 1155 | ||
1161 | int mp_register_gsi(u32 gsi, int triggering, int polarity) | 1156 | static int mp_config_acpi_gsi(struct device *dev, u32 gsi, int trigger, |
1157 | int polarity) | ||
1162 | { | 1158 | { |
1159 | #ifdef CONFIG_X86_MPPARSE | ||
1160 | struct mpc_intsrc mp_irq; | ||
1161 | struct pci_dev *pdev; | ||
1162 | unsigned char number; | ||
1163 | unsigned int devfn; | ||
1163 | int ioapic; | 1164 | int ioapic; |
1164 | int ioapic_pin; | 1165 | u8 pin; |
1165 | #ifdef CONFIG_X86_32 | ||
1166 | #define MAX_GSI_NUM 4096 | ||
1167 | #define IRQ_COMPRESSION_START 64 | ||
1168 | 1166 | ||
1169 | static int pci_irq = IRQ_COMPRESSION_START; | 1167 | if (!acpi_ioapic) |
1170 | /* | 1168 | return 0; |
1171 | * Mapping between Global System Interrupts, which | 1169 | if (!dev) |
1172 | * represent all possible interrupts, and IRQs | 1170 | return 0; |
1173 | * assigned to actual devices. | 1171 | if (dev->bus != &pci_bus_type) |
1174 | */ | 1172 | return 0; |
1175 | static int gsi_to_irq[MAX_GSI_NUM]; | 1173 | |
1176 | #else | 1174 | pdev = to_pci_dev(dev); |
1175 | number = pdev->bus->number; | ||
1176 | devfn = pdev->devfn; | ||
1177 | pin = pdev->pin; | ||
1178 | /* print the entry should happen on mptable identically */ | ||
1179 | mp_irq.type = MP_INTSRC; | ||
1180 | mp_irq.irqtype = mp_INT; | ||
1181 | mp_irq.irqflag = (trigger == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) | | ||
1182 | (polarity == ACPI_ACTIVE_HIGH ? 1 : 3); | ||
1183 | mp_irq.srcbus = number; | ||
1184 | mp_irq.srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3); | ||
1185 | ioapic = mp_find_ioapic(gsi); | ||
1186 | mp_irq.dstapic = mp_ioapics[ioapic].apicid; | ||
1187 | mp_irq.dstirq = mp_find_ioapic_pin(ioapic, gsi); | ||
1188 | |||
1189 | save_mp_irq(&mp_irq); | ||
1190 | #endif | ||
1191 | return 0; | ||
1192 | } | ||
1193 | |||
1194 | int mp_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity) | ||
1195 | { | ||
1196 | int ioapic; | ||
1197 | int ioapic_pin; | ||
1198 | struct io_apic_irq_attr irq_attr; | ||
1177 | 1199 | ||
1178 | if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC) | 1200 | if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC) |
1179 | return gsi; | 1201 | return gsi; |
1180 | #endif | ||
1181 | 1202 | ||
1182 | /* Don't set up the ACPI SCI because it's already set up */ | 1203 | /* Don't set up the ACPI SCI because it's already set up */ |
1183 | if (acpi_gbl_FADT.sci_interrupt == gsi) | 1204 | if (acpi_gbl_FADT.sci_interrupt == gsi) |
@@ -1196,93 +1217,22 @@ int mp_register_gsi(u32 gsi, int triggering, int polarity) | |||
1196 | gsi = ioapic_renumber_irq(ioapic, gsi); | 1217 | gsi = ioapic_renumber_irq(ioapic, gsi); |
1197 | #endif | 1218 | #endif |
1198 | 1219 | ||
1199 | /* | ||
1200 | * Avoid pin reprogramming. PRTs typically include entries | ||
1201 | * with redundant pin->gsi mappings (but unique PCI devices); | ||
1202 | * we only program the IOAPIC on the first. | ||
1203 | */ | ||
1204 | if (ioapic_pin > MP_MAX_IOAPIC_PIN) { | 1220 | if (ioapic_pin > MP_MAX_IOAPIC_PIN) { |
1205 | printk(KERN_ERR "Invalid reference to IOAPIC pin " | 1221 | printk(KERN_ERR "Invalid reference to IOAPIC pin " |
1206 | "%d-%d\n", mp_ioapic_routing[ioapic].apic_id, | 1222 | "%d-%d\n", mp_ioapics[ioapic].apicid, |
1207 | ioapic_pin); | 1223 | ioapic_pin); |
1208 | return gsi; | 1224 | return gsi; |
1209 | } | 1225 | } |
1210 | if (test_bit(ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed)) { | ||
1211 | pr_debug("Pin %d-%d already programmed\n", | ||
1212 | mp_ioapic_routing[ioapic].apic_id, ioapic_pin); | ||
1213 | #ifdef CONFIG_X86_32 | ||
1214 | return (gsi < IRQ_COMPRESSION_START ? gsi : gsi_to_irq[gsi]); | ||
1215 | #else | ||
1216 | return gsi; | ||
1217 | #endif | ||
1218 | } | ||
1219 | |||
1220 | set_bit(ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed); | ||
1221 | #ifdef CONFIG_X86_32 | ||
1222 | /* | ||
1223 | * For GSI >= 64, use IRQ compression | ||
1224 | */ | ||
1225 | if ((gsi >= IRQ_COMPRESSION_START) | ||
1226 | && (triggering == ACPI_LEVEL_SENSITIVE)) { | ||
1227 | /* | ||
1228 | * For PCI devices assign IRQs in order, avoiding gaps | ||
1229 | * due to unused I/O APIC pins. | ||
1230 | */ | ||
1231 | int irq = gsi; | ||
1232 | if (gsi < MAX_GSI_NUM) { | ||
1233 | /* | ||
1234 | * Retain the VIA chipset work-around (gsi > 15), but | ||
1235 | * avoid a problem where the 8254 timer (IRQ0) is setup | ||
1236 | * via an override (so it's not on pin 0 of the ioapic), | ||
1237 | * and at the same time, the pin 0 interrupt is a PCI | ||
1238 | * type. The gsi > 15 test could cause these two pins | ||
1239 | * to be shared as IRQ0, and they are not shareable. | ||
1240 | * So test for this condition, and if necessary, avoid | ||
1241 | * the pin collision. | ||
1242 | */ | ||
1243 | gsi = pci_irq++; | ||
1244 | /* | ||
1245 | * Don't assign IRQ used by ACPI SCI | ||
1246 | */ | ||
1247 | if (gsi == acpi_gbl_FADT.sci_interrupt) | ||
1248 | gsi = pci_irq++; | ||
1249 | gsi_to_irq[irq] = gsi; | ||
1250 | } else { | ||
1251 | printk(KERN_ERR "GSI %u is too high\n", gsi); | ||
1252 | return gsi; | ||
1253 | } | ||
1254 | } | ||
1255 | #endif | ||
1256 | io_apic_set_pci_routing(ioapic, ioapic_pin, gsi, | ||
1257 | triggering == ACPI_EDGE_SENSITIVE ? 0 : 1, | ||
1258 | polarity == ACPI_ACTIVE_HIGH ? 0 : 1); | ||
1259 | return gsi; | ||
1260 | } | ||
1261 | 1226 | ||
1262 | int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin, | 1227 | if (enable_update_mptable) |
1263 | u32 gsi, int triggering, int polarity) | 1228 | mp_config_acpi_gsi(dev, gsi, trigger, polarity); |
1264 | { | ||
1265 | #ifdef CONFIG_X86_MPPARSE | ||
1266 | struct mpc_intsrc mp_irq; | ||
1267 | int ioapic; | ||
1268 | 1229 | ||
1269 | if (!acpi_ioapic) | 1230 | set_io_apic_irq_attr(&irq_attr, ioapic, ioapic_pin, |
1270 | return 0; | 1231 | trigger == ACPI_EDGE_SENSITIVE ? 0 : 1, |
1232 | polarity == ACPI_ACTIVE_HIGH ? 0 : 1); | ||
1233 | io_apic_set_pci_routing(dev, gsi, &irq_attr); | ||
1271 | 1234 | ||
1272 | /* print the entry should happen on mptable identically */ | 1235 | return gsi; |
1273 | mp_irq.type = MP_INTSRC; | ||
1274 | mp_irq.irqtype = mp_INT; | ||
1275 | mp_irq.irqflag = (triggering == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) | | ||
1276 | (polarity == ACPI_ACTIVE_HIGH ? 1 : 3); | ||
1277 | mp_irq.srcbus = number; | ||
1278 | mp_irq.srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3); | ||
1279 | ioapic = mp_find_ioapic(gsi); | ||
1280 | mp_irq.dstapic = mp_ioapic_routing[ioapic].apic_id; | ||
1281 | mp_irq.dstirq = mp_find_ioapic_pin(ioapic, gsi); | ||
1282 | |||
1283 | save_mp_irq(&mp_irq); | ||
1284 | #endif | ||
1285 | return 0; | ||
1286 | } | 1236 | } |
1287 | 1237 | ||
1288 | /* | 1238 | /* |
diff --git a/arch/x86/kernel/acpi/realmode/Makefile b/arch/x86/kernel/acpi/realmode/Makefile index 1c31cc0e9def..167bc16ce0e5 100644 --- a/arch/x86/kernel/acpi/realmode/Makefile +++ b/arch/x86/kernel/acpi/realmode/Makefile | |||
@@ -9,7 +9,7 @@ | |||
9 | always := wakeup.bin | 9 | always := wakeup.bin |
10 | targets := wakeup.elf wakeup.lds | 10 | targets := wakeup.elf wakeup.lds |
11 | 11 | ||
12 | wakeup-y += wakeup.o wakemain.o video-mode.o copy.o | 12 | wakeup-y += wakeup.o wakemain.o video-mode.o copy.o bioscall.o regs.o |
13 | 13 | ||
14 | # The link order of the video-*.o modules can matter. In particular, | 14 | # The link order of the video-*.o modules can matter. In particular, |
15 | # video-vga.o *must* be listed first, followed by video-vesa.o. | 15 | # video-vga.o *must* be listed first, followed by video-vesa.o. |
diff --git a/arch/x86/kernel/acpi/realmode/bioscall.S b/arch/x86/kernel/acpi/realmode/bioscall.S new file mode 100644 index 000000000000..f51eb0bb56ce --- /dev/null +++ b/arch/x86/kernel/acpi/realmode/bioscall.S | |||
@@ -0,0 +1 @@ | |||
#include "../../../boot/bioscall.S" | |||
diff --git a/arch/x86/kernel/acpi/realmode/regs.c b/arch/x86/kernel/acpi/realmode/regs.c new file mode 100644 index 000000000000..6206033ba202 --- /dev/null +++ b/arch/x86/kernel/acpi/realmode/regs.c | |||
@@ -0,0 +1 @@ | |||
#include "../../../boot/regs.c" | |||
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c index a97db99dad52..1c60554537c3 100644 --- a/arch/x86/kernel/amd_iommu.c +++ b/arch/x86/kernel/amd_iommu.c | |||
@@ -55,7 +55,16 @@ struct iommu_cmd { | |||
55 | static int dma_ops_unity_map(struct dma_ops_domain *dma_dom, | 55 | static int dma_ops_unity_map(struct dma_ops_domain *dma_dom, |
56 | struct unity_map_entry *e); | 56 | struct unity_map_entry *e); |
57 | static struct dma_ops_domain *find_protection_domain(u16 devid); | 57 | static struct dma_ops_domain *find_protection_domain(u16 devid); |
58 | static u64* alloc_pte(struct protection_domain *dom, | ||
59 | unsigned long address, u64 | ||
60 | **pte_page, gfp_t gfp); | ||
61 | static void dma_ops_reserve_addresses(struct dma_ops_domain *dom, | ||
62 | unsigned long start_page, | ||
63 | unsigned int pages); | ||
58 | 64 | ||
65 | #ifndef BUS_NOTIFY_UNBOUND_DRIVER | ||
66 | #define BUS_NOTIFY_UNBOUND_DRIVER 0x0005 | ||
67 | #endif | ||
59 | 68 | ||
60 | #ifdef CONFIG_AMD_IOMMU_STATS | 69 | #ifdef CONFIG_AMD_IOMMU_STATS |
61 | 70 | ||
@@ -213,7 +222,7 @@ irqreturn_t amd_iommu_int_handler(int irq, void *data) | |||
213 | { | 222 | { |
214 | struct amd_iommu *iommu; | 223 | struct amd_iommu *iommu; |
215 | 224 | ||
216 | list_for_each_entry(iommu, &amd_iommu_list, list) | 225 | for_each_iommu(iommu) |
217 | iommu_poll_events(iommu); | 226 | iommu_poll_events(iommu); |
218 | 227 | ||
219 | return IRQ_HANDLED; | 228 | return IRQ_HANDLED; |
@@ -440,7 +449,7 @@ static void iommu_flush_domain(u16 domid) | |||
440 | __iommu_build_inv_iommu_pages(&cmd, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, | 449 | __iommu_build_inv_iommu_pages(&cmd, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, |
441 | domid, 1, 1); | 450 | domid, 1, 1); |
442 | 451 | ||
443 | list_for_each_entry(iommu, &amd_iommu_list, list) { | 452 | for_each_iommu(iommu) { |
444 | spin_lock_irqsave(&iommu->lock, flags); | 453 | spin_lock_irqsave(&iommu->lock, flags); |
445 | __iommu_queue_command(iommu, &cmd); | 454 | __iommu_queue_command(iommu, &cmd); |
446 | __iommu_completion_wait(iommu); | 455 | __iommu_completion_wait(iommu); |
@@ -449,6 +458,35 @@ static void iommu_flush_domain(u16 domid) | |||
449 | } | 458 | } |
450 | } | 459 | } |
451 | 460 | ||
461 | void amd_iommu_flush_all_domains(void) | ||
462 | { | ||
463 | int i; | ||
464 | |||
465 | for (i = 1; i < MAX_DOMAIN_ID; ++i) { | ||
466 | if (!test_bit(i, amd_iommu_pd_alloc_bitmap)) | ||
467 | continue; | ||
468 | iommu_flush_domain(i); | ||
469 | } | ||
470 | } | ||
471 | |||
472 | void amd_iommu_flush_all_devices(void) | ||
473 | { | ||
474 | struct amd_iommu *iommu; | ||
475 | int i; | ||
476 | |||
477 | for (i = 0; i <= amd_iommu_last_bdf; ++i) { | ||
478 | if (amd_iommu_pd_table[i] == NULL) | ||
479 | continue; | ||
480 | |||
481 | iommu = amd_iommu_rlookup_table[i]; | ||
482 | if (!iommu) | ||
483 | continue; | ||
484 | |||
485 | iommu_queue_inv_dev_entry(iommu, i); | ||
486 | iommu_completion_wait(iommu); | ||
487 | } | ||
488 | } | ||
489 | |||
452 | /**************************************************************************** | 490 | /**************************************************************************** |
453 | * | 491 | * |
454 | * The functions below are used the create the page table mappings for | 492 | * The functions below are used the create the page table mappings for |
@@ -468,7 +506,7 @@ static int iommu_map_page(struct protection_domain *dom, | |||
468 | unsigned long phys_addr, | 506 | unsigned long phys_addr, |
469 | int prot) | 507 | int prot) |
470 | { | 508 | { |
471 | u64 __pte, *pte, *page; | 509 | u64 __pte, *pte; |
472 | 510 | ||
473 | bus_addr = PAGE_ALIGN(bus_addr); | 511 | bus_addr = PAGE_ALIGN(bus_addr); |
474 | phys_addr = PAGE_ALIGN(phys_addr); | 512 | phys_addr = PAGE_ALIGN(phys_addr); |
@@ -477,27 +515,7 @@ static int iommu_map_page(struct protection_domain *dom, | |||
477 | if (bus_addr > IOMMU_MAP_SIZE_L3 || !(prot & IOMMU_PROT_MASK)) | 515 | if (bus_addr > IOMMU_MAP_SIZE_L3 || !(prot & IOMMU_PROT_MASK)) |
478 | return -EINVAL; | 516 | return -EINVAL; |
479 | 517 | ||
480 | pte = &dom->pt_root[IOMMU_PTE_L2_INDEX(bus_addr)]; | 518 | pte = alloc_pte(dom, bus_addr, NULL, GFP_KERNEL); |
481 | |||
482 | if (!IOMMU_PTE_PRESENT(*pte)) { | ||
483 | page = (u64 *)get_zeroed_page(GFP_KERNEL); | ||
484 | if (!page) | ||
485 | return -ENOMEM; | ||
486 | *pte = IOMMU_L2_PDE(virt_to_phys(page)); | ||
487 | } | ||
488 | |||
489 | pte = IOMMU_PTE_PAGE(*pte); | ||
490 | pte = &pte[IOMMU_PTE_L1_INDEX(bus_addr)]; | ||
491 | |||
492 | if (!IOMMU_PTE_PRESENT(*pte)) { | ||
493 | page = (u64 *)get_zeroed_page(GFP_KERNEL); | ||
494 | if (!page) | ||
495 | return -ENOMEM; | ||
496 | *pte = IOMMU_L1_PDE(virt_to_phys(page)); | ||
497 | } | ||
498 | |||
499 | pte = IOMMU_PTE_PAGE(*pte); | ||
500 | pte = &pte[IOMMU_PTE_L0_INDEX(bus_addr)]; | ||
501 | 519 | ||
502 | if (IOMMU_PTE_PRESENT(*pte)) | 520 | if (IOMMU_PTE_PRESENT(*pte)) |
503 | return -EBUSY; | 521 | return -EBUSY; |
@@ -595,7 +613,8 @@ static int dma_ops_unity_map(struct dma_ops_domain *dma_dom, | |||
595 | * as allocated in the aperture | 613 | * as allocated in the aperture |
596 | */ | 614 | */ |
597 | if (addr < dma_dom->aperture_size) | 615 | if (addr < dma_dom->aperture_size) |
598 | __set_bit(addr >> PAGE_SHIFT, dma_dom->bitmap); | 616 | __set_bit(addr >> PAGE_SHIFT, |
617 | dma_dom->aperture[0]->bitmap); | ||
599 | } | 618 | } |
600 | 619 | ||
601 | return 0; | 620 | return 0; |
@@ -632,42 +651,191 @@ static int init_unity_mappings_for_device(struct dma_ops_domain *dma_dom, | |||
632 | ****************************************************************************/ | 651 | ****************************************************************************/ |
633 | 652 | ||
634 | /* | 653 | /* |
635 | * The address allocator core function. | 654 | * The address allocator core functions. |
636 | * | 655 | * |
637 | * called with domain->lock held | 656 | * called with domain->lock held |
638 | */ | 657 | */ |
658 | |||
659 | /* | ||
660 | * This function checks if there is a PTE for a given dma address. If | ||
661 | * there is one, it returns the pointer to it. | ||
662 | */ | ||
663 | static u64* fetch_pte(struct protection_domain *domain, | ||
664 | unsigned long address) | ||
665 | { | ||
666 | u64 *pte; | ||
667 | |||
668 | pte = &domain->pt_root[IOMMU_PTE_L2_INDEX(address)]; | ||
669 | |||
670 | if (!IOMMU_PTE_PRESENT(*pte)) | ||
671 | return NULL; | ||
672 | |||
673 | pte = IOMMU_PTE_PAGE(*pte); | ||
674 | pte = &pte[IOMMU_PTE_L1_INDEX(address)]; | ||
675 | |||
676 | if (!IOMMU_PTE_PRESENT(*pte)) | ||
677 | return NULL; | ||
678 | |||
679 | pte = IOMMU_PTE_PAGE(*pte); | ||
680 | pte = &pte[IOMMU_PTE_L0_INDEX(address)]; | ||
681 | |||
682 | return pte; | ||
683 | } | ||
684 | |||
685 | /* | ||
686 | * This function is used to add a new aperture range to an existing | ||
687 | * aperture in case of dma_ops domain allocation or address allocation | ||
688 | * failure. | ||
689 | */ | ||
690 | static int alloc_new_range(struct amd_iommu *iommu, | ||
691 | struct dma_ops_domain *dma_dom, | ||
692 | bool populate, gfp_t gfp) | ||
693 | { | ||
694 | int index = dma_dom->aperture_size >> APERTURE_RANGE_SHIFT; | ||
695 | int i; | ||
696 | |||
697 | #ifdef CONFIG_IOMMU_STRESS | ||
698 | populate = false; | ||
699 | #endif | ||
700 | |||
701 | if (index >= APERTURE_MAX_RANGES) | ||
702 | return -ENOMEM; | ||
703 | |||
704 | dma_dom->aperture[index] = kzalloc(sizeof(struct aperture_range), gfp); | ||
705 | if (!dma_dom->aperture[index]) | ||
706 | return -ENOMEM; | ||
707 | |||
708 | dma_dom->aperture[index]->bitmap = (void *)get_zeroed_page(gfp); | ||
709 | if (!dma_dom->aperture[index]->bitmap) | ||
710 | goto out_free; | ||
711 | |||
712 | dma_dom->aperture[index]->offset = dma_dom->aperture_size; | ||
713 | |||
714 | if (populate) { | ||
715 | unsigned long address = dma_dom->aperture_size; | ||
716 | int i, num_ptes = APERTURE_RANGE_PAGES / 512; | ||
717 | u64 *pte, *pte_page; | ||
718 | |||
719 | for (i = 0; i < num_ptes; ++i) { | ||
720 | pte = alloc_pte(&dma_dom->domain, address, | ||
721 | &pte_page, gfp); | ||
722 | if (!pte) | ||
723 | goto out_free; | ||
724 | |||
725 | dma_dom->aperture[index]->pte_pages[i] = pte_page; | ||
726 | |||
727 | address += APERTURE_RANGE_SIZE / 64; | ||
728 | } | ||
729 | } | ||
730 | |||
731 | dma_dom->aperture_size += APERTURE_RANGE_SIZE; | ||
732 | |||
733 | /* Intialize the exclusion range if necessary */ | ||
734 | if (iommu->exclusion_start && | ||
735 | iommu->exclusion_start >= dma_dom->aperture[index]->offset && | ||
736 | iommu->exclusion_start < dma_dom->aperture_size) { | ||
737 | unsigned long startpage = iommu->exclusion_start >> PAGE_SHIFT; | ||
738 | int pages = iommu_num_pages(iommu->exclusion_start, | ||
739 | iommu->exclusion_length, | ||
740 | PAGE_SIZE); | ||
741 | dma_ops_reserve_addresses(dma_dom, startpage, pages); | ||
742 | } | ||
743 | |||
744 | /* | ||
745 | * Check for areas already mapped as present in the new aperture | ||
746 | * range and mark those pages as reserved in the allocator. Such | ||
747 | * mappings may already exist as a result of requested unity | ||
748 | * mappings for devices. | ||
749 | */ | ||
750 | for (i = dma_dom->aperture[index]->offset; | ||
751 | i < dma_dom->aperture_size; | ||
752 | i += PAGE_SIZE) { | ||
753 | u64 *pte = fetch_pte(&dma_dom->domain, i); | ||
754 | if (!pte || !IOMMU_PTE_PRESENT(*pte)) | ||
755 | continue; | ||
756 | |||
757 | dma_ops_reserve_addresses(dma_dom, i << PAGE_SHIFT, 1); | ||
758 | } | ||
759 | |||
760 | return 0; | ||
761 | |||
762 | out_free: | ||
763 | free_page((unsigned long)dma_dom->aperture[index]->bitmap); | ||
764 | |||
765 | kfree(dma_dom->aperture[index]); | ||
766 | dma_dom->aperture[index] = NULL; | ||
767 | |||
768 | return -ENOMEM; | ||
769 | } | ||
770 | |||
771 | static unsigned long dma_ops_area_alloc(struct device *dev, | ||
772 | struct dma_ops_domain *dom, | ||
773 | unsigned int pages, | ||
774 | unsigned long align_mask, | ||
775 | u64 dma_mask, | ||
776 | unsigned long start) | ||
777 | { | ||
778 | unsigned long next_bit = dom->next_address % APERTURE_RANGE_SIZE; | ||
779 | int max_index = dom->aperture_size >> APERTURE_RANGE_SHIFT; | ||
780 | int i = start >> APERTURE_RANGE_SHIFT; | ||
781 | unsigned long boundary_size; | ||
782 | unsigned long address = -1; | ||
783 | unsigned long limit; | ||
784 | |||
785 | next_bit >>= PAGE_SHIFT; | ||
786 | |||
787 | boundary_size = ALIGN(dma_get_seg_boundary(dev) + 1, | ||
788 | PAGE_SIZE) >> PAGE_SHIFT; | ||
789 | |||
790 | for (;i < max_index; ++i) { | ||
791 | unsigned long offset = dom->aperture[i]->offset >> PAGE_SHIFT; | ||
792 | |||
793 | if (dom->aperture[i]->offset >= dma_mask) | ||
794 | break; | ||
795 | |||
796 | limit = iommu_device_max_index(APERTURE_RANGE_PAGES, offset, | ||
797 | dma_mask >> PAGE_SHIFT); | ||
798 | |||
799 | address = iommu_area_alloc(dom->aperture[i]->bitmap, | ||
800 | limit, next_bit, pages, 0, | ||
801 | boundary_size, align_mask); | ||
802 | if (address != -1) { | ||
803 | address = dom->aperture[i]->offset + | ||
804 | (address << PAGE_SHIFT); | ||
805 | dom->next_address = address + (pages << PAGE_SHIFT); | ||
806 | break; | ||
807 | } | ||
808 | |||
809 | next_bit = 0; | ||
810 | } | ||
811 | |||
812 | return address; | ||
813 | } | ||
814 | |||
639 | static unsigned long dma_ops_alloc_addresses(struct device *dev, | 815 | static unsigned long dma_ops_alloc_addresses(struct device *dev, |
640 | struct dma_ops_domain *dom, | 816 | struct dma_ops_domain *dom, |
641 | unsigned int pages, | 817 | unsigned int pages, |
642 | unsigned long align_mask, | 818 | unsigned long align_mask, |
643 | u64 dma_mask) | 819 | u64 dma_mask) |
644 | { | 820 | { |
645 | unsigned long limit; | ||
646 | unsigned long address; | 821 | unsigned long address; |
647 | unsigned long boundary_size; | ||
648 | 822 | ||
649 | boundary_size = ALIGN(dma_get_seg_boundary(dev) + 1, | 823 | #ifdef CONFIG_IOMMU_STRESS |
650 | PAGE_SIZE) >> PAGE_SHIFT; | 824 | dom->next_address = 0; |
651 | limit = iommu_device_max_index(dom->aperture_size >> PAGE_SHIFT, 0, | 825 | dom->need_flush = true; |
652 | dma_mask >> PAGE_SHIFT); | 826 | #endif |
653 | 827 | ||
654 | if (dom->next_bit >= limit) { | 828 | address = dma_ops_area_alloc(dev, dom, pages, align_mask, |
655 | dom->next_bit = 0; | 829 | dma_mask, dom->next_address); |
656 | dom->need_flush = true; | ||
657 | } | ||
658 | 830 | ||
659 | address = iommu_area_alloc(dom->bitmap, limit, dom->next_bit, pages, | ||
660 | 0 , boundary_size, align_mask); | ||
661 | if (address == -1) { | 831 | if (address == -1) { |
662 | address = iommu_area_alloc(dom->bitmap, limit, 0, pages, | 832 | dom->next_address = 0; |
663 | 0, boundary_size, align_mask); | 833 | address = dma_ops_area_alloc(dev, dom, pages, align_mask, |
834 | dma_mask, 0); | ||
664 | dom->need_flush = true; | 835 | dom->need_flush = true; |
665 | } | 836 | } |
666 | 837 | ||
667 | if (likely(address != -1)) { | 838 | if (unlikely(address == -1)) |
668 | dom->next_bit = address + pages; | ||
669 | address <<= PAGE_SHIFT; | ||
670 | } else | ||
671 | address = bad_dma_address; | 839 | address = bad_dma_address; |
672 | 840 | ||
673 | WARN_ON((address + (PAGE_SIZE*pages)) > dom->aperture_size); | 841 | WARN_ON((address + (PAGE_SIZE*pages)) > dom->aperture_size); |
@@ -684,11 +852,23 @@ static void dma_ops_free_addresses(struct dma_ops_domain *dom, | |||
684 | unsigned long address, | 852 | unsigned long address, |
685 | unsigned int pages) | 853 | unsigned int pages) |
686 | { | 854 | { |
687 | address >>= PAGE_SHIFT; | 855 | unsigned i = address >> APERTURE_RANGE_SHIFT; |
688 | iommu_area_free(dom->bitmap, address, pages); | 856 | struct aperture_range *range = dom->aperture[i]; |
689 | 857 | ||
690 | if (address >= dom->next_bit) | 858 | BUG_ON(i >= APERTURE_MAX_RANGES || range == NULL); |
859 | |||
860 | #ifdef CONFIG_IOMMU_STRESS | ||
861 | if (i < 4) | ||
862 | return; | ||
863 | #endif | ||
864 | |||
865 | if (address >= dom->next_address) | ||
691 | dom->need_flush = true; | 866 | dom->need_flush = true; |
867 | |||
868 | address = (address % APERTURE_RANGE_SIZE) >> PAGE_SHIFT; | ||
869 | |||
870 | iommu_area_free(range->bitmap, address, pages); | ||
871 | |||
692 | } | 872 | } |
693 | 873 | ||
694 | /**************************************************************************** | 874 | /**************************************************************************** |
@@ -736,12 +916,16 @@ static void dma_ops_reserve_addresses(struct dma_ops_domain *dom, | |||
736 | unsigned long start_page, | 916 | unsigned long start_page, |
737 | unsigned int pages) | 917 | unsigned int pages) |
738 | { | 918 | { |
739 | unsigned int last_page = dom->aperture_size >> PAGE_SHIFT; | 919 | unsigned int i, last_page = dom->aperture_size >> PAGE_SHIFT; |
740 | 920 | ||
741 | if (start_page + pages > last_page) | 921 | if (start_page + pages > last_page) |
742 | pages = last_page - start_page; | 922 | pages = last_page - start_page; |
743 | 923 | ||
744 | iommu_area_reserve(dom->bitmap, start_page, pages); | 924 | for (i = start_page; i < start_page + pages; ++i) { |
925 | int index = i / APERTURE_RANGE_PAGES; | ||
926 | int page = i % APERTURE_RANGE_PAGES; | ||
927 | __set_bit(page, dom->aperture[index]->bitmap); | ||
928 | } | ||
745 | } | 929 | } |
746 | 930 | ||
747 | static void free_pagetable(struct protection_domain *domain) | 931 | static void free_pagetable(struct protection_domain *domain) |
@@ -780,14 +964,19 @@ static void free_pagetable(struct protection_domain *domain) | |||
780 | */ | 964 | */ |
781 | static void dma_ops_domain_free(struct dma_ops_domain *dom) | 965 | static void dma_ops_domain_free(struct dma_ops_domain *dom) |
782 | { | 966 | { |
967 | int i; | ||
968 | |||
783 | if (!dom) | 969 | if (!dom) |
784 | return; | 970 | return; |
785 | 971 | ||
786 | free_pagetable(&dom->domain); | 972 | free_pagetable(&dom->domain); |
787 | 973 | ||
788 | kfree(dom->pte_pages); | 974 | for (i = 0; i < APERTURE_MAX_RANGES; ++i) { |
789 | 975 | if (!dom->aperture[i]) | |
790 | kfree(dom->bitmap); | 976 | continue; |
977 | free_page((unsigned long)dom->aperture[i]->bitmap); | ||
978 | kfree(dom->aperture[i]); | ||
979 | } | ||
791 | 980 | ||
792 | kfree(dom); | 981 | kfree(dom); |
793 | } | 982 | } |
@@ -797,19 +986,9 @@ static void dma_ops_domain_free(struct dma_ops_domain *dom) | |||
797 | * It also intializes the page table and the address allocator data | 986 | * It also intializes the page table and the address allocator data |
798 | * structures required for the dma_ops interface | 987 | * structures required for the dma_ops interface |
799 | */ | 988 | */ |
800 | static struct dma_ops_domain *dma_ops_domain_alloc(struct amd_iommu *iommu, | 989 | static struct dma_ops_domain *dma_ops_domain_alloc(struct amd_iommu *iommu) |
801 | unsigned order) | ||
802 | { | 990 | { |
803 | struct dma_ops_domain *dma_dom; | 991 | struct dma_ops_domain *dma_dom; |
804 | unsigned i, num_pte_pages; | ||
805 | u64 *l2_pde; | ||
806 | u64 address; | ||
807 | |||
808 | /* | ||
809 | * Currently the DMA aperture must be between 32 MB and 1GB in size | ||
810 | */ | ||
811 | if ((order < 25) || (order > 30)) | ||
812 | return NULL; | ||
813 | 992 | ||
814 | dma_dom = kzalloc(sizeof(struct dma_ops_domain), GFP_KERNEL); | 993 | dma_dom = kzalloc(sizeof(struct dma_ops_domain), GFP_KERNEL); |
815 | if (!dma_dom) | 994 | if (!dma_dom) |
@@ -826,55 +1005,20 @@ static struct dma_ops_domain *dma_ops_domain_alloc(struct amd_iommu *iommu, | |||
826 | dma_dom->domain.priv = dma_dom; | 1005 | dma_dom->domain.priv = dma_dom; |
827 | if (!dma_dom->domain.pt_root) | 1006 | if (!dma_dom->domain.pt_root) |
828 | goto free_dma_dom; | 1007 | goto free_dma_dom; |
829 | dma_dom->aperture_size = (1ULL << order); | ||
830 | dma_dom->bitmap = kzalloc(dma_dom->aperture_size / (PAGE_SIZE * 8), | ||
831 | GFP_KERNEL); | ||
832 | if (!dma_dom->bitmap) | ||
833 | goto free_dma_dom; | ||
834 | /* | ||
835 | * mark the first page as allocated so we never return 0 as | ||
836 | * a valid dma-address. So we can use 0 as error value | ||
837 | */ | ||
838 | dma_dom->bitmap[0] = 1; | ||
839 | dma_dom->next_bit = 0; | ||
840 | 1008 | ||
841 | dma_dom->need_flush = false; | 1009 | dma_dom->need_flush = false; |
842 | dma_dom->target_dev = 0xffff; | 1010 | dma_dom->target_dev = 0xffff; |
843 | 1011 | ||
844 | /* Intialize the exclusion range if necessary */ | 1012 | if (alloc_new_range(iommu, dma_dom, true, GFP_KERNEL)) |
845 | if (iommu->exclusion_start && | 1013 | goto free_dma_dom; |
846 | iommu->exclusion_start < dma_dom->aperture_size) { | ||
847 | unsigned long startpage = iommu->exclusion_start >> PAGE_SHIFT; | ||
848 | int pages = iommu_num_pages(iommu->exclusion_start, | ||
849 | iommu->exclusion_length, | ||
850 | PAGE_SIZE); | ||
851 | dma_ops_reserve_addresses(dma_dom, startpage, pages); | ||
852 | } | ||
853 | 1014 | ||
854 | /* | 1015 | /* |
855 | * At the last step, build the page tables so we don't need to | 1016 | * mark the first page as allocated so we never return 0 as |
856 | * allocate page table pages in the dma_ops mapping/unmapping | 1017 | * a valid dma-address. So we can use 0 as error value |
857 | * path. | ||
858 | */ | 1018 | */ |
859 | num_pte_pages = dma_dom->aperture_size / (PAGE_SIZE * 512); | 1019 | dma_dom->aperture[0]->bitmap[0] = 1; |
860 | dma_dom->pte_pages = kzalloc(num_pte_pages * sizeof(void *), | 1020 | dma_dom->next_address = 0; |
861 | GFP_KERNEL); | ||
862 | if (!dma_dom->pte_pages) | ||
863 | goto free_dma_dom; | ||
864 | |||
865 | l2_pde = (u64 *)get_zeroed_page(GFP_KERNEL); | ||
866 | if (l2_pde == NULL) | ||
867 | goto free_dma_dom; | ||
868 | 1021 | ||
869 | dma_dom->domain.pt_root[0] = IOMMU_L2_PDE(virt_to_phys(l2_pde)); | ||
870 | |||
871 | for (i = 0; i < num_pte_pages; ++i) { | ||
872 | dma_dom->pte_pages[i] = (u64 *)get_zeroed_page(GFP_KERNEL); | ||
873 | if (!dma_dom->pte_pages[i]) | ||
874 | goto free_dma_dom; | ||
875 | address = virt_to_phys(dma_dom->pte_pages[i]); | ||
876 | l2_pde[i] = IOMMU_L1_PDE(address); | ||
877 | } | ||
878 | 1022 | ||
879 | return dma_dom; | 1023 | return dma_dom; |
880 | 1024 | ||
@@ -983,7 +1127,6 @@ static int device_change_notifier(struct notifier_block *nb, | |||
983 | struct protection_domain *domain; | 1127 | struct protection_domain *domain; |
984 | struct dma_ops_domain *dma_domain; | 1128 | struct dma_ops_domain *dma_domain; |
985 | struct amd_iommu *iommu; | 1129 | struct amd_iommu *iommu; |
986 | int order = amd_iommu_aperture_order; | ||
987 | unsigned long flags; | 1130 | unsigned long flags; |
988 | 1131 | ||
989 | if (devid > amd_iommu_last_bdf) | 1132 | if (devid > amd_iommu_last_bdf) |
@@ -1002,17 +1145,7 @@ static int device_change_notifier(struct notifier_block *nb, | |||
1002 | "to a non-dma-ops domain\n", dev_name(dev)); | 1145 | "to a non-dma-ops domain\n", dev_name(dev)); |
1003 | 1146 | ||
1004 | switch (action) { | 1147 | switch (action) { |
1005 | case BUS_NOTIFY_BOUND_DRIVER: | 1148 | case BUS_NOTIFY_UNBOUND_DRIVER: |
1006 | if (domain) | ||
1007 | goto out; | ||
1008 | dma_domain = find_protection_domain(devid); | ||
1009 | if (!dma_domain) | ||
1010 | dma_domain = iommu->default_dom; | ||
1011 | attach_device(iommu, &dma_domain->domain, devid); | ||
1012 | printk(KERN_INFO "AMD IOMMU: Using protection domain %d for " | ||
1013 | "device %s\n", dma_domain->domain.id, dev_name(dev)); | ||
1014 | break; | ||
1015 | case BUS_NOTIFY_UNBIND_DRIVER: | ||
1016 | if (!domain) | 1149 | if (!domain) |
1017 | goto out; | 1150 | goto out; |
1018 | detach_device(domain, devid); | 1151 | detach_device(domain, devid); |
@@ -1022,7 +1155,7 @@ static int device_change_notifier(struct notifier_block *nb, | |||
1022 | dma_domain = find_protection_domain(devid); | 1155 | dma_domain = find_protection_domain(devid); |
1023 | if (dma_domain) | 1156 | if (dma_domain) |
1024 | goto out; | 1157 | goto out; |
1025 | dma_domain = dma_ops_domain_alloc(iommu, order); | 1158 | dma_domain = dma_ops_domain_alloc(iommu); |
1026 | if (!dma_domain) | 1159 | if (!dma_domain) |
1027 | goto out; | 1160 | goto out; |
1028 | dma_domain->target_dev = devid; | 1161 | dma_domain->target_dev = devid; |
@@ -1133,8 +1266,8 @@ static int get_device_resources(struct device *dev, | |||
1133 | dma_dom = (*iommu)->default_dom; | 1266 | dma_dom = (*iommu)->default_dom; |
1134 | *domain = &dma_dom->domain; | 1267 | *domain = &dma_dom->domain; |
1135 | attach_device(*iommu, *domain, *bdf); | 1268 | attach_device(*iommu, *domain, *bdf); |
1136 | printk(KERN_INFO "AMD IOMMU: Using protection domain %d for " | 1269 | DUMP_printk("Using protection domain %d for device %s\n", |
1137 | "device %s\n", (*domain)->id, dev_name(dev)); | 1270 | (*domain)->id, dev_name(dev)); |
1138 | } | 1271 | } |
1139 | 1272 | ||
1140 | if (domain_for_device(_bdf) == NULL) | 1273 | if (domain_for_device(_bdf) == NULL) |
@@ -1144,6 +1277,66 @@ static int get_device_resources(struct device *dev, | |||
1144 | } | 1277 | } |
1145 | 1278 | ||
1146 | /* | 1279 | /* |
1280 | * If the pte_page is not yet allocated this function is called | ||
1281 | */ | ||
1282 | static u64* alloc_pte(struct protection_domain *dom, | ||
1283 | unsigned long address, u64 **pte_page, gfp_t gfp) | ||
1284 | { | ||
1285 | u64 *pte, *page; | ||
1286 | |||
1287 | pte = &dom->pt_root[IOMMU_PTE_L2_INDEX(address)]; | ||
1288 | |||
1289 | if (!IOMMU_PTE_PRESENT(*pte)) { | ||
1290 | page = (u64 *)get_zeroed_page(gfp); | ||
1291 | if (!page) | ||
1292 | return NULL; | ||
1293 | *pte = IOMMU_L2_PDE(virt_to_phys(page)); | ||
1294 | } | ||
1295 | |||
1296 | pte = IOMMU_PTE_PAGE(*pte); | ||
1297 | pte = &pte[IOMMU_PTE_L1_INDEX(address)]; | ||
1298 | |||
1299 | if (!IOMMU_PTE_PRESENT(*pte)) { | ||
1300 | page = (u64 *)get_zeroed_page(gfp); | ||
1301 | if (!page) | ||
1302 | return NULL; | ||
1303 | *pte = IOMMU_L1_PDE(virt_to_phys(page)); | ||
1304 | } | ||
1305 | |||
1306 | pte = IOMMU_PTE_PAGE(*pte); | ||
1307 | |||
1308 | if (pte_page) | ||
1309 | *pte_page = pte; | ||
1310 | |||
1311 | pte = &pte[IOMMU_PTE_L0_INDEX(address)]; | ||
1312 | |||
1313 | return pte; | ||
1314 | } | ||
1315 | |||
1316 | /* | ||
1317 | * This function fetches the PTE for a given address in the aperture | ||
1318 | */ | ||
1319 | static u64* dma_ops_get_pte(struct dma_ops_domain *dom, | ||
1320 | unsigned long address) | ||
1321 | { | ||
1322 | struct aperture_range *aperture; | ||
1323 | u64 *pte, *pte_page; | ||
1324 | |||
1325 | aperture = dom->aperture[APERTURE_RANGE_INDEX(address)]; | ||
1326 | if (!aperture) | ||
1327 | return NULL; | ||
1328 | |||
1329 | pte = aperture->pte_pages[APERTURE_PAGE_INDEX(address)]; | ||
1330 | if (!pte) { | ||
1331 | pte = alloc_pte(&dom->domain, address, &pte_page, GFP_ATOMIC); | ||
1332 | aperture->pte_pages[APERTURE_PAGE_INDEX(address)] = pte_page; | ||
1333 | } else | ||
1334 | pte += IOMMU_PTE_L0_INDEX(address); | ||
1335 | |||
1336 | return pte; | ||
1337 | } | ||
1338 | |||
1339 | /* | ||
1147 | * This is the generic map function. It maps one 4kb page at paddr to | 1340 | * This is the generic map function. It maps one 4kb page at paddr to |
1148 | * the given address in the DMA address space for the domain. | 1341 | * the given address in the DMA address space for the domain. |
1149 | */ | 1342 | */ |
@@ -1159,8 +1352,9 @@ static dma_addr_t dma_ops_domain_map(struct amd_iommu *iommu, | |||
1159 | 1352 | ||
1160 | paddr &= PAGE_MASK; | 1353 | paddr &= PAGE_MASK; |
1161 | 1354 | ||
1162 | pte = dom->pte_pages[IOMMU_PTE_L1_INDEX(address)]; | 1355 | pte = dma_ops_get_pte(dom, address); |
1163 | pte += IOMMU_PTE_L0_INDEX(address); | 1356 | if (!pte) |
1357 | return bad_dma_address; | ||
1164 | 1358 | ||
1165 | __pte = paddr | IOMMU_PTE_P | IOMMU_PTE_FC; | 1359 | __pte = paddr | IOMMU_PTE_P | IOMMU_PTE_FC; |
1166 | 1360 | ||
@@ -1185,14 +1379,20 @@ static void dma_ops_domain_unmap(struct amd_iommu *iommu, | |||
1185 | struct dma_ops_domain *dom, | 1379 | struct dma_ops_domain *dom, |
1186 | unsigned long address) | 1380 | unsigned long address) |
1187 | { | 1381 | { |
1382 | struct aperture_range *aperture; | ||
1188 | u64 *pte; | 1383 | u64 *pte; |
1189 | 1384 | ||
1190 | if (address >= dom->aperture_size) | 1385 | if (address >= dom->aperture_size) |
1191 | return; | 1386 | return; |
1192 | 1387 | ||
1193 | WARN_ON(address & ~PAGE_MASK || address >= dom->aperture_size); | 1388 | aperture = dom->aperture[APERTURE_RANGE_INDEX(address)]; |
1389 | if (!aperture) | ||
1390 | return; | ||
1391 | |||
1392 | pte = aperture->pte_pages[APERTURE_PAGE_INDEX(address)]; | ||
1393 | if (!pte) | ||
1394 | return; | ||
1194 | 1395 | ||
1195 | pte = dom->pte_pages[IOMMU_PTE_L1_INDEX(address)]; | ||
1196 | pte += IOMMU_PTE_L0_INDEX(address); | 1396 | pte += IOMMU_PTE_L0_INDEX(address); |
1197 | 1397 | ||
1198 | WARN_ON(!*pte); | 1398 | WARN_ON(!*pte); |
@@ -1216,7 +1416,7 @@ static dma_addr_t __map_single(struct device *dev, | |||
1216 | u64 dma_mask) | 1416 | u64 dma_mask) |
1217 | { | 1417 | { |
1218 | dma_addr_t offset = paddr & ~PAGE_MASK; | 1418 | dma_addr_t offset = paddr & ~PAGE_MASK; |
1219 | dma_addr_t address, start; | 1419 | dma_addr_t address, start, ret; |
1220 | unsigned int pages; | 1420 | unsigned int pages; |
1221 | unsigned long align_mask = 0; | 1421 | unsigned long align_mask = 0; |
1222 | int i; | 1422 | int i; |
@@ -1232,14 +1432,33 @@ static dma_addr_t __map_single(struct device *dev, | |||
1232 | if (align) | 1432 | if (align) |
1233 | align_mask = (1UL << get_order(size)) - 1; | 1433 | align_mask = (1UL << get_order(size)) - 1; |
1234 | 1434 | ||
1435 | retry: | ||
1235 | address = dma_ops_alloc_addresses(dev, dma_dom, pages, align_mask, | 1436 | address = dma_ops_alloc_addresses(dev, dma_dom, pages, align_mask, |
1236 | dma_mask); | 1437 | dma_mask); |
1237 | if (unlikely(address == bad_dma_address)) | 1438 | if (unlikely(address == bad_dma_address)) { |
1238 | goto out; | 1439 | /* |
1440 | * setting next_address here will let the address | ||
1441 | * allocator only scan the new allocated range in the | ||
1442 | * first run. This is a small optimization. | ||
1443 | */ | ||
1444 | dma_dom->next_address = dma_dom->aperture_size; | ||
1445 | |||
1446 | if (alloc_new_range(iommu, dma_dom, false, GFP_ATOMIC)) | ||
1447 | goto out; | ||
1448 | |||
1449 | /* | ||
1450 | * aperture was sucessfully enlarged by 128 MB, try | ||
1451 | * allocation again | ||
1452 | */ | ||
1453 | goto retry; | ||
1454 | } | ||
1239 | 1455 | ||
1240 | start = address; | 1456 | start = address; |
1241 | for (i = 0; i < pages; ++i) { | 1457 | for (i = 0; i < pages; ++i) { |
1242 | dma_ops_domain_map(iommu, dma_dom, start, paddr, dir); | 1458 | ret = dma_ops_domain_map(iommu, dma_dom, start, paddr, dir); |
1459 | if (ret == bad_dma_address) | ||
1460 | goto out_unmap; | ||
1461 | |||
1243 | paddr += PAGE_SIZE; | 1462 | paddr += PAGE_SIZE; |
1244 | start += PAGE_SIZE; | 1463 | start += PAGE_SIZE; |
1245 | } | 1464 | } |
@@ -1255,6 +1474,17 @@ static dma_addr_t __map_single(struct device *dev, | |||
1255 | 1474 | ||
1256 | out: | 1475 | out: |
1257 | return address; | 1476 | return address; |
1477 | |||
1478 | out_unmap: | ||
1479 | |||
1480 | for (--i; i >= 0; --i) { | ||
1481 | start -= PAGE_SIZE; | ||
1482 | dma_ops_domain_unmap(iommu, dma_dom, start); | ||
1483 | } | ||
1484 | |||
1485 | dma_ops_free_addresses(dma_dom, address, pages); | ||
1486 | |||
1487 | return bad_dma_address; | ||
1258 | } | 1488 | } |
1259 | 1489 | ||
1260 | /* | 1490 | /* |
@@ -1537,8 +1767,10 @@ static void *alloc_coherent(struct device *dev, size_t size, | |||
1537 | *dma_addr = __map_single(dev, iommu, domain->priv, paddr, | 1767 | *dma_addr = __map_single(dev, iommu, domain->priv, paddr, |
1538 | size, DMA_BIDIRECTIONAL, true, dma_mask); | 1768 | size, DMA_BIDIRECTIONAL, true, dma_mask); |
1539 | 1769 | ||
1540 | if (*dma_addr == bad_dma_address) | 1770 | if (*dma_addr == bad_dma_address) { |
1771 | spin_unlock_irqrestore(&domain->lock, flags); | ||
1541 | goto out_free; | 1772 | goto out_free; |
1773 | } | ||
1542 | 1774 | ||
1543 | iommu_completion_wait(iommu); | 1775 | iommu_completion_wait(iommu); |
1544 | 1776 | ||
@@ -1625,7 +1857,6 @@ static void prealloc_protection_domains(void) | |||
1625 | struct pci_dev *dev = NULL; | 1857 | struct pci_dev *dev = NULL; |
1626 | struct dma_ops_domain *dma_dom; | 1858 | struct dma_ops_domain *dma_dom; |
1627 | struct amd_iommu *iommu; | 1859 | struct amd_iommu *iommu; |
1628 | int order = amd_iommu_aperture_order; | ||
1629 | u16 devid; | 1860 | u16 devid; |
1630 | 1861 | ||
1631 | while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) { | 1862 | while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) { |
@@ -1638,7 +1869,7 @@ static void prealloc_protection_domains(void) | |||
1638 | iommu = amd_iommu_rlookup_table[devid]; | 1869 | iommu = amd_iommu_rlookup_table[devid]; |
1639 | if (!iommu) | 1870 | if (!iommu) |
1640 | continue; | 1871 | continue; |
1641 | dma_dom = dma_ops_domain_alloc(iommu, order); | 1872 | dma_dom = dma_ops_domain_alloc(iommu); |
1642 | if (!dma_dom) | 1873 | if (!dma_dom) |
1643 | continue; | 1874 | continue; |
1644 | init_unity_mappings_for_device(dma_dom, devid); | 1875 | init_unity_mappings_for_device(dma_dom, devid); |
@@ -1664,7 +1895,6 @@ static struct dma_map_ops amd_iommu_dma_ops = { | |||
1664 | int __init amd_iommu_init_dma_ops(void) | 1895 | int __init amd_iommu_init_dma_ops(void) |
1665 | { | 1896 | { |
1666 | struct amd_iommu *iommu; | 1897 | struct amd_iommu *iommu; |
1667 | int order = amd_iommu_aperture_order; | ||
1668 | int ret; | 1898 | int ret; |
1669 | 1899 | ||
1670 | /* | 1900 | /* |
@@ -1672,8 +1902,8 @@ int __init amd_iommu_init_dma_ops(void) | |||
1672 | * found in the system. Devices not assigned to any other | 1902 | * found in the system. Devices not assigned to any other |
1673 | * protection domain will be assigned to the default one. | 1903 | * protection domain will be assigned to the default one. |
1674 | */ | 1904 | */ |
1675 | list_for_each_entry(iommu, &amd_iommu_list, list) { | 1905 | for_each_iommu(iommu) { |
1676 | iommu->default_dom = dma_ops_domain_alloc(iommu, order); | 1906 | iommu->default_dom = dma_ops_domain_alloc(iommu); |
1677 | if (iommu->default_dom == NULL) | 1907 | if (iommu->default_dom == NULL) |
1678 | return -ENOMEM; | 1908 | return -ENOMEM; |
1679 | iommu->default_dom->domain.flags |= PD_DEFAULT_MASK; | 1909 | iommu->default_dom->domain.flags |= PD_DEFAULT_MASK; |
@@ -1710,7 +1940,7 @@ int __init amd_iommu_init_dma_ops(void) | |||
1710 | 1940 | ||
1711 | free_domains: | 1941 | free_domains: |
1712 | 1942 | ||
1713 | list_for_each_entry(iommu, &amd_iommu_list, list) { | 1943 | for_each_iommu(iommu) { |
1714 | if (iommu->default_dom) | 1944 | if (iommu->default_dom) |
1715 | dma_ops_domain_free(iommu->default_dom); | 1945 | dma_ops_domain_free(iommu->default_dom); |
1716 | } | 1946 | } |
@@ -1842,7 +2072,7 @@ static int amd_iommu_attach_device(struct iommu_domain *dom, | |||
1842 | 2072 | ||
1843 | old_domain = domain_for_device(devid); | 2073 | old_domain = domain_for_device(devid); |
1844 | if (old_domain) | 2074 | if (old_domain) |
1845 | return -EBUSY; | 2075 | detach_device(old_domain, devid); |
1846 | 2076 | ||
1847 | attach_device(iommu, domain, devid); | 2077 | attach_device(iommu, domain, devid); |
1848 | 2078 | ||
diff --git a/arch/x86/kernel/amd_iommu_init.c b/arch/x86/kernel/amd_iommu_init.c index 8c0be0902dac..238989ec077d 100644 --- a/arch/x86/kernel/amd_iommu_init.c +++ b/arch/x86/kernel/amd_iommu_init.c | |||
@@ -115,15 +115,21 @@ struct ivmd_header { | |||
115 | u64 range_length; | 115 | u64 range_length; |
116 | } __attribute__((packed)); | 116 | } __attribute__((packed)); |
117 | 117 | ||
118 | bool amd_iommu_dump; | ||
119 | |||
118 | static int __initdata amd_iommu_detected; | 120 | static int __initdata amd_iommu_detected; |
119 | 121 | ||
120 | u16 amd_iommu_last_bdf; /* largest PCI device id we have | 122 | u16 amd_iommu_last_bdf; /* largest PCI device id we have |
121 | to handle */ | 123 | to handle */ |
122 | LIST_HEAD(amd_iommu_unity_map); /* a list of required unity mappings | 124 | LIST_HEAD(amd_iommu_unity_map); /* a list of required unity mappings |
123 | we find in ACPI */ | 125 | we find in ACPI */ |
124 | unsigned amd_iommu_aperture_order = 26; /* size of aperture in power of 2 */ | 126 | #ifdef CONFIG_IOMMU_STRESS |
127 | bool amd_iommu_isolate = false; | ||
128 | #else | ||
125 | bool amd_iommu_isolate = true; /* if true, device isolation is | 129 | bool amd_iommu_isolate = true; /* if true, device isolation is |
126 | enabled */ | 130 | enabled */ |
131 | #endif | ||
132 | |||
127 | bool amd_iommu_unmap_flush; /* if true, flush on every unmap */ | 133 | bool amd_iommu_unmap_flush; /* if true, flush on every unmap */ |
128 | 134 | ||
129 | LIST_HEAD(amd_iommu_list); /* list of all AMD IOMMUs in the | 135 | LIST_HEAD(amd_iommu_list); /* list of all AMD IOMMUs in the |
@@ -175,7 +181,7 @@ static inline void update_last_devid(u16 devid) | |||
175 | static inline unsigned long tbl_size(int entry_size) | 181 | static inline unsigned long tbl_size(int entry_size) |
176 | { | 182 | { |
177 | unsigned shift = PAGE_SHIFT + | 183 | unsigned shift = PAGE_SHIFT + |
178 | get_order(amd_iommu_last_bdf * entry_size); | 184 | get_order(((int)amd_iommu_last_bdf + 1) * entry_size); |
179 | 185 | ||
180 | return 1UL << shift; | 186 | return 1UL << shift; |
181 | } | 187 | } |
@@ -193,7 +199,7 @@ static inline unsigned long tbl_size(int entry_size) | |||
193 | * This function set the exclusion range in the IOMMU. DMA accesses to the | 199 | * This function set the exclusion range in the IOMMU. DMA accesses to the |
194 | * exclusion range are passed through untranslated | 200 | * exclusion range are passed through untranslated |
195 | */ | 201 | */ |
196 | static void __init iommu_set_exclusion_range(struct amd_iommu *iommu) | 202 | static void iommu_set_exclusion_range(struct amd_iommu *iommu) |
197 | { | 203 | { |
198 | u64 start = iommu->exclusion_start & PAGE_MASK; | 204 | u64 start = iommu->exclusion_start & PAGE_MASK; |
199 | u64 limit = (start + iommu->exclusion_length) & PAGE_MASK; | 205 | u64 limit = (start + iommu->exclusion_length) & PAGE_MASK; |
@@ -225,7 +231,7 @@ static void __init iommu_set_device_table(struct amd_iommu *iommu) | |||
225 | } | 231 | } |
226 | 232 | ||
227 | /* Generic functions to enable/disable certain features of the IOMMU. */ | 233 | /* Generic functions to enable/disable certain features of the IOMMU. */ |
228 | static void __init iommu_feature_enable(struct amd_iommu *iommu, u8 bit) | 234 | static void iommu_feature_enable(struct amd_iommu *iommu, u8 bit) |
229 | { | 235 | { |
230 | u32 ctrl; | 236 | u32 ctrl; |
231 | 237 | ||
@@ -244,7 +250,7 @@ static void __init iommu_feature_disable(struct amd_iommu *iommu, u8 bit) | |||
244 | } | 250 | } |
245 | 251 | ||
246 | /* Function to enable the hardware */ | 252 | /* Function to enable the hardware */ |
247 | static void __init iommu_enable(struct amd_iommu *iommu) | 253 | static void iommu_enable(struct amd_iommu *iommu) |
248 | { | 254 | { |
249 | printk(KERN_INFO "AMD IOMMU: Enabling IOMMU at %s cap 0x%hx\n", | 255 | printk(KERN_INFO "AMD IOMMU: Enabling IOMMU at %s cap 0x%hx\n", |
250 | dev_name(&iommu->dev->dev), iommu->cap_ptr); | 256 | dev_name(&iommu->dev->dev), iommu->cap_ptr); |
@@ -252,11 +258,9 @@ static void __init iommu_enable(struct amd_iommu *iommu) | |||
252 | iommu_feature_enable(iommu, CONTROL_IOMMU_EN); | 258 | iommu_feature_enable(iommu, CONTROL_IOMMU_EN); |
253 | } | 259 | } |
254 | 260 | ||
255 | /* Function to enable IOMMU event logging and event interrupts */ | 261 | static void iommu_disable(struct amd_iommu *iommu) |
256 | static void __init iommu_enable_event_logging(struct amd_iommu *iommu) | ||
257 | { | 262 | { |
258 | iommu_feature_enable(iommu, CONTROL_EVT_LOG_EN); | 263 | iommu_feature_disable(iommu, CONTROL_IOMMU_EN); |
259 | iommu_feature_enable(iommu, CONTROL_EVT_INT_EN); | ||
260 | } | 264 | } |
261 | 265 | ||
262 | /* | 266 | /* |
@@ -413,25 +417,36 @@ static u8 * __init alloc_command_buffer(struct amd_iommu *iommu) | |||
413 | { | 417 | { |
414 | u8 *cmd_buf = (u8 *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, | 418 | u8 *cmd_buf = (u8 *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, |
415 | get_order(CMD_BUFFER_SIZE)); | 419 | get_order(CMD_BUFFER_SIZE)); |
416 | u64 entry; | ||
417 | 420 | ||
418 | if (cmd_buf == NULL) | 421 | if (cmd_buf == NULL) |
419 | return NULL; | 422 | return NULL; |
420 | 423 | ||
421 | iommu->cmd_buf_size = CMD_BUFFER_SIZE; | 424 | iommu->cmd_buf_size = CMD_BUFFER_SIZE; |
422 | 425 | ||
423 | entry = (u64)virt_to_phys(cmd_buf); | 426 | return cmd_buf; |
427 | } | ||
428 | |||
429 | /* | ||
430 | * This function writes the command buffer address to the hardware and | ||
431 | * enables it. | ||
432 | */ | ||
433 | static void iommu_enable_command_buffer(struct amd_iommu *iommu) | ||
434 | { | ||
435 | u64 entry; | ||
436 | |||
437 | BUG_ON(iommu->cmd_buf == NULL); | ||
438 | |||
439 | entry = (u64)virt_to_phys(iommu->cmd_buf); | ||
424 | entry |= MMIO_CMD_SIZE_512; | 440 | entry |= MMIO_CMD_SIZE_512; |
441 | |||
425 | memcpy_toio(iommu->mmio_base + MMIO_CMD_BUF_OFFSET, | 442 | memcpy_toio(iommu->mmio_base + MMIO_CMD_BUF_OFFSET, |
426 | &entry, sizeof(entry)); | 443 | &entry, sizeof(entry)); |
427 | 444 | ||
428 | /* set head and tail to zero manually */ | 445 | /* set head and tail to zero manually */ |
429 | writel(0x00, iommu->mmio_base + MMIO_CMD_HEAD_OFFSET); | 446 | writel(0x00, iommu->mmio_base + MMIO_CMD_HEAD_OFFSET); |
430 | writel(0x00, iommu->mmio_base + MMIO_CMD_TAIL_OFFSET); | 447 | writel(0x00, iommu->mmio_base + MMIO_CMD_TAIL_OFFSET); |
431 | 448 | ||
432 | iommu_feature_enable(iommu, CONTROL_CMDBUF_EN); | 449 | iommu_feature_enable(iommu, CONTROL_CMDBUF_EN); |
433 | |||
434 | return cmd_buf; | ||
435 | } | 450 | } |
436 | 451 | ||
437 | static void __init free_command_buffer(struct amd_iommu *iommu) | 452 | static void __init free_command_buffer(struct amd_iommu *iommu) |
@@ -443,20 +458,27 @@ static void __init free_command_buffer(struct amd_iommu *iommu) | |||
443 | /* allocates the memory where the IOMMU will log its events to */ | 458 | /* allocates the memory where the IOMMU will log its events to */ |
444 | static u8 * __init alloc_event_buffer(struct amd_iommu *iommu) | 459 | static u8 * __init alloc_event_buffer(struct amd_iommu *iommu) |
445 | { | 460 | { |
446 | u64 entry; | ||
447 | iommu->evt_buf = (u8 *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, | 461 | iommu->evt_buf = (u8 *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, |
448 | get_order(EVT_BUFFER_SIZE)); | 462 | get_order(EVT_BUFFER_SIZE)); |
449 | 463 | ||
450 | if (iommu->evt_buf == NULL) | 464 | if (iommu->evt_buf == NULL) |
451 | return NULL; | 465 | return NULL; |
452 | 466 | ||
467 | return iommu->evt_buf; | ||
468 | } | ||
469 | |||
470 | static void iommu_enable_event_buffer(struct amd_iommu *iommu) | ||
471 | { | ||
472 | u64 entry; | ||
473 | |||
474 | BUG_ON(iommu->evt_buf == NULL); | ||
475 | |||
453 | entry = (u64)virt_to_phys(iommu->evt_buf) | EVT_LEN_MASK; | 476 | entry = (u64)virt_to_phys(iommu->evt_buf) | EVT_LEN_MASK; |
477 | |||
454 | memcpy_toio(iommu->mmio_base + MMIO_EVT_BUF_OFFSET, | 478 | memcpy_toio(iommu->mmio_base + MMIO_EVT_BUF_OFFSET, |
455 | &entry, sizeof(entry)); | 479 | &entry, sizeof(entry)); |
456 | 480 | ||
457 | iommu->evt_buf_size = EVT_BUFFER_SIZE; | 481 | iommu_feature_enable(iommu, CONTROL_EVT_LOG_EN); |
458 | |||
459 | return iommu->evt_buf; | ||
460 | } | 482 | } |
461 | 483 | ||
462 | static void __init free_event_buffer(struct amd_iommu *iommu) | 484 | static void __init free_event_buffer(struct amd_iommu *iommu) |
@@ -596,32 +618,83 @@ static void __init init_iommu_from_acpi(struct amd_iommu *iommu, | |||
596 | p += sizeof(struct ivhd_header); | 618 | p += sizeof(struct ivhd_header); |
597 | end += h->length; | 619 | end += h->length; |
598 | 620 | ||
621 | |||
599 | while (p < end) { | 622 | while (p < end) { |
600 | e = (struct ivhd_entry *)p; | 623 | e = (struct ivhd_entry *)p; |
601 | switch (e->type) { | 624 | switch (e->type) { |
602 | case IVHD_DEV_ALL: | 625 | case IVHD_DEV_ALL: |
626 | |||
627 | DUMP_printk(" DEV_ALL\t\t\t first devid: %02x:%02x.%x" | ||
628 | " last device %02x:%02x.%x flags: %02x\n", | ||
629 | PCI_BUS(iommu->first_device), | ||
630 | PCI_SLOT(iommu->first_device), | ||
631 | PCI_FUNC(iommu->first_device), | ||
632 | PCI_BUS(iommu->last_device), | ||
633 | PCI_SLOT(iommu->last_device), | ||
634 | PCI_FUNC(iommu->last_device), | ||
635 | e->flags); | ||
636 | |||
603 | for (dev_i = iommu->first_device; | 637 | for (dev_i = iommu->first_device; |
604 | dev_i <= iommu->last_device; ++dev_i) | 638 | dev_i <= iommu->last_device; ++dev_i) |
605 | set_dev_entry_from_acpi(iommu, dev_i, | 639 | set_dev_entry_from_acpi(iommu, dev_i, |
606 | e->flags, 0); | 640 | e->flags, 0); |
607 | break; | 641 | break; |
608 | case IVHD_DEV_SELECT: | 642 | case IVHD_DEV_SELECT: |
643 | |||
644 | DUMP_printk(" DEV_SELECT\t\t\t devid: %02x:%02x.%x " | ||
645 | "flags: %02x\n", | ||
646 | PCI_BUS(e->devid), | ||
647 | PCI_SLOT(e->devid), | ||
648 | PCI_FUNC(e->devid), | ||
649 | e->flags); | ||
650 | |||
609 | devid = e->devid; | 651 | devid = e->devid; |
610 | set_dev_entry_from_acpi(iommu, devid, e->flags, 0); | 652 | set_dev_entry_from_acpi(iommu, devid, e->flags, 0); |
611 | break; | 653 | break; |
612 | case IVHD_DEV_SELECT_RANGE_START: | 654 | case IVHD_DEV_SELECT_RANGE_START: |
655 | |||
656 | DUMP_printk(" DEV_SELECT_RANGE_START\t " | ||
657 | "devid: %02x:%02x.%x flags: %02x\n", | ||
658 | PCI_BUS(e->devid), | ||
659 | PCI_SLOT(e->devid), | ||
660 | PCI_FUNC(e->devid), | ||
661 | e->flags); | ||
662 | |||
613 | devid_start = e->devid; | 663 | devid_start = e->devid; |
614 | flags = e->flags; | 664 | flags = e->flags; |
615 | ext_flags = 0; | 665 | ext_flags = 0; |
616 | alias = false; | 666 | alias = false; |
617 | break; | 667 | break; |
618 | case IVHD_DEV_ALIAS: | 668 | case IVHD_DEV_ALIAS: |
669 | |||
670 | DUMP_printk(" DEV_ALIAS\t\t\t devid: %02x:%02x.%x " | ||
671 | "flags: %02x devid_to: %02x:%02x.%x\n", | ||
672 | PCI_BUS(e->devid), | ||
673 | PCI_SLOT(e->devid), | ||
674 | PCI_FUNC(e->devid), | ||
675 | e->flags, | ||
676 | PCI_BUS(e->ext >> 8), | ||
677 | PCI_SLOT(e->ext >> 8), | ||
678 | PCI_FUNC(e->ext >> 8)); | ||
679 | |||
619 | devid = e->devid; | 680 | devid = e->devid; |
620 | devid_to = e->ext >> 8; | 681 | devid_to = e->ext >> 8; |
621 | set_dev_entry_from_acpi(iommu, devid, e->flags, 0); | 682 | set_dev_entry_from_acpi(iommu, devid_to, e->flags, 0); |
622 | amd_iommu_alias_table[devid] = devid_to; | 683 | amd_iommu_alias_table[devid] = devid_to; |
623 | break; | 684 | break; |
624 | case IVHD_DEV_ALIAS_RANGE: | 685 | case IVHD_DEV_ALIAS_RANGE: |
686 | |||
687 | DUMP_printk(" DEV_ALIAS_RANGE\t\t " | ||
688 | "devid: %02x:%02x.%x flags: %02x " | ||
689 | "devid_to: %02x:%02x.%x\n", | ||
690 | PCI_BUS(e->devid), | ||
691 | PCI_SLOT(e->devid), | ||
692 | PCI_FUNC(e->devid), | ||
693 | e->flags, | ||
694 | PCI_BUS(e->ext >> 8), | ||
695 | PCI_SLOT(e->ext >> 8), | ||
696 | PCI_FUNC(e->ext >> 8)); | ||
697 | |||
625 | devid_start = e->devid; | 698 | devid_start = e->devid; |
626 | flags = e->flags; | 699 | flags = e->flags; |
627 | devid_to = e->ext >> 8; | 700 | devid_to = e->ext >> 8; |
@@ -629,17 +702,39 @@ static void __init init_iommu_from_acpi(struct amd_iommu *iommu, | |||
629 | alias = true; | 702 | alias = true; |
630 | break; | 703 | break; |
631 | case IVHD_DEV_EXT_SELECT: | 704 | case IVHD_DEV_EXT_SELECT: |
705 | |||
706 | DUMP_printk(" DEV_EXT_SELECT\t\t devid: %02x:%02x.%x " | ||
707 | "flags: %02x ext: %08x\n", | ||
708 | PCI_BUS(e->devid), | ||
709 | PCI_SLOT(e->devid), | ||
710 | PCI_FUNC(e->devid), | ||
711 | e->flags, e->ext); | ||
712 | |||
632 | devid = e->devid; | 713 | devid = e->devid; |
633 | set_dev_entry_from_acpi(iommu, devid, e->flags, | 714 | set_dev_entry_from_acpi(iommu, devid, e->flags, |
634 | e->ext); | 715 | e->ext); |
635 | break; | 716 | break; |
636 | case IVHD_DEV_EXT_SELECT_RANGE: | 717 | case IVHD_DEV_EXT_SELECT_RANGE: |
718 | |||
719 | DUMP_printk(" DEV_EXT_SELECT_RANGE\t devid: " | ||
720 | "%02x:%02x.%x flags: %02x ext: %08x\n", | ||
721 | PCI_BUS(e->devid), | ||
722 | PCI_SLOT(e->devid), | ||
723 | PCI_FUNC(e->devid), | ||
724 | e->flags, e->ext); | ||
725 | |||
637 | devid_start = e->devid; | 726 | devid_start = e->devid; |
638 | flags = e->flags; | 727 | flags = e->flags; |
639 | ext_flags = e->ext; | 728 | ext_flags = e->ext; |
640 | alias = false; | 729 | alias = false; |
641 | break; | 730 | break; |
642 | case IVHD_DEV_RANGE_END: | 731 | case IVHD_DEV_RANGE_END: |
732 | |||
733 | DUMP_printk(" DEV_RANGE_END\t\t devid: %02x:%02x.%x\n", | ||
734 | PCI_BUS(e->devid), | ||
735 | PCI_SLOT(e->devid), | ||
736 | PCI_FUNC(e->devid)); | ||
737 | |||
643 | devid = e->devid; | 738 | devid = e->devid; |
644 | for (dev_i = devid_start; dev_i <= devid; ++dev_i) { | 739 | for (dev_i = devid_start; dev_i <= devid; ++dev_i) { |
645 | if (alias) | 740 | if (alias) |
@@ -679,7 +774,7 @@ static void __init free_iommu_all(void) | |||
679 | { | 774 | { |
680 | struct amd_iommu *iommu, *next; | 775 | struct amd_iommu *iommu, *next; |
681 | 776 | ||
682 | list_for_each_entry_safe(iommu, next, &amd_iommu_list, list) { | 777 | for_each_iommu_safe(iommu, next) { |
683 | list_del(&iommu->list); | 778 | list_del(&iommu->list); |
684 | free_iommu_one(iommu); | 779 | free_iommu_one(iommu); |
685 | kfree(iommu); | 780 | kfree(iommu); |
@@ -710,7 +805,6 @@ static int __init init_iommu_one(struct amd_iommu *iommu, struct ivhd_header *h) | |||
710 | if (!iommu->mmio_base) | 805 | if (!iommu->mmio_base) |
711 | return -ENOMEM; | 806 | return -ENOMEM; |
712 | 807 | ||
713 | iommu_set_device_table(iommu); | ||
714 | iommu->cmd_buf = alloc_command_buffer(iommu); | 808 | iommu->cmd_buf = alloc_command_buffer(iommu); |
715 | if (!iommu->cmd_buf) | 809 | if (!iommu->cmd_buf) |
716 | return -ENOMEM; | 810 | return -ENOMEM; |
@@ -746,6 +840,15 @@ static int __init init_iommu_all(struct acpi_table_header *table) | |||
746 | h = (struct ivhd_header *)p; | 840 | h = (struct ivhd_header *)p; |
747 | switch (*p) { | 841 | switch (*p) { |
748 | case ACPI_IVHD_TYPE: | 842 | case ACPI_IVHD_TYPE: |
843 | |||
844 | DUMP_printk("IOMMU: device: %02x:%02x.%01x cap: %04x " | ||
845 | "seg: %d flags: %01x info %04x\n", | ||
846 | PCI_BUS(h->devid), PCI_SLOT(h->devid), | ||
847 | PCI_FUNC(h->devid), h->cap_ptr, | ||
848 | h->pci_seg, h->flags, h->info); | ||
849 | DUMP_printk(" mmio-addr: %016llx\n", | ||
850 | h->mmio_phys); | ||
851 | |||
749 | iommu = kzalloc(sizeof(struct amd_iommu), GFP_KERNEL); | 852 | iommu = kzalloc(sizeof(struct amd_iommu), GFP_KERNEL); |
750 | if (iommu == NULL) | 853 | if (iommu == NULL) |
751 | return -ENOMEM; | 854 | return -ENOMEM; |
@@ -773,56 +876,9 @@ static int __init init_iommu_all(struct acpi_table_header *table) | |||
773 | * | 876 | * |
774 | ****************************************************************************/ | 877 | ****************************************************************************/ |
775 | 878 | ||
776 | static int __init iommu_setup_msix(struct amd_iommu *iommu) | ||
777 | { | ||
778 | struct amd_iommu *curr; | ||
779 | struct msix_entry entries[32]; /* only 32 supported by AMD IOMMU */ | ||
780 | int nvec = 0, i; | ||
781 | |||
782 | list_for_each_entry(curr, &amd_iommu_list, list) { | ||
783 | if (curr->dev == iommu->dev) { | ||
784 | entries[nvec].entry = curr->evt_msi_num; | ||
785 | entries[nvec].vector = 0; | ||
786 | curr->int_enabled = true; | ||
787 | nvec++; | ||
788 | } | ||
789 | } | ||
790 | |||
791 | if (pci_enable_msix(iommu->dev, entries, nvec)) { | ||
792 | pci_disable_msix(iommu->dev); | ||
793 | return 1; | ||
794 | } | ||
795 | |||
796 | for (i = 0; i < nvec; ++i) { | ||
797 | int r = request_irq(entries->vector, amd_iommu_int_handler, | ||
798 | IRQF_SAMPLE_RANDOM, | ||
799 | "AMD IOMMU", | ||
800 | NULL); | ||
801 | if (r) | ||
802 | goto out_free; | ||
803 | } | ||
804 | |||
805 | return 0; | ||
806 | |||
807 | out_free: | ||
808 | for (i -= 1; i >= 0; --i) | ||
809 | free_irq(entries->vector, NULL); | ||
810 | |||
811 | pci_disable_msix(iommu->dev); | ||
812 | |||
813 | return 1; | ||
814 | } | ||
815 | |||
816 | static int __init iommu_setup_msi(struct amd_iommu *iommu) | 879 | static int __init iommu_setup_msi(struct amd_iommu *iommu) |
817 | { | 880 | { |
818 | int r; | 881 | int r; |
819 | struct amd_iommu *curr; | ||
820 | |||
821 | list_for_each_entry(curr, &amd_iommu_list, list) { | ||
822 | if (curr->dev == iommu->dev) | ||
823 | curr->int_enabled = true; | ||
824 | } | ||
825 | |||
826 | 882 | ||
827 | if (pci_enable_msi(iommu->dev)) | 883 | if (pci_enable_msi(iommu->dev)) |
828 | return 1; | 884 | return 1; |
@@ -837,17 +893,18 @@ static int __init iommu_setup_msi(struct amd_iommu *iommu) | |||
837 | return 1; | 893 | return 1; |
838 | } | 894 | } |
839 | 895 | ||
896 | iommu->int_enabled = true; | ||
897 | iommu_feature_enable(iommu, CONTROL_EVT_INT_EN); | ||
898 | |||
840 | return 0; | 899 | return 0; |
841 | } | 900 | } |
842 | 901 | ||
843 | static int __init iommu_init_msi(struct amd_iommu *iommu) | 902 | static int iommu_init_msi(struct amd_iommu *iommu) |
844 | { | 903 | { |
845 | if (iommu->int_enabled) | 904 | if (iommu->int_enabled) |
846 | return 0; | 905 | return 0; |
847 | 906 | ||
848 | if (pci_find_capability(iommu->dev, PCI_CAP_ID_MSIX)) | 907 | if (pci_find_capability(iommu->dev, PCI_CAP_ID_MSI)) |
849 | return iommu_setup_msix(iommu); | ||
850 | else if (pci_find_capability(iommu->dev, PCI_CAP_ID_MSI)) | ||
851 | return iommu_setup_msi(iommu); | 908 | return iommu_setup_msi(iommu); |
852 | 909 | ||
853 | return 1; | 910 | return 1; |
@@ -899,6 +956,7 @@ static int __init init_exclusion_range(struct ivmd_header *m) | |||
899 | static int __init init_unity_map_range(struct ivmd_header *m) | 956 | static int __init init_unity_map_range(struct ivmd_header *m) |
900 | { | 957 | { |
901 | struct unity_map_entry *e = 0; | 958 | struct unity_map_entry *e = 0; |
959 | char *s; | ||
902 | 960 | ||
903 | e = kzalloc(sizeof(*e), GFP_KERNEL); | 961 | e = kzalloc(sizeof(*e), GFP_KERNEL); |
904 | if (e == NULL) | 962 | if (e == NULL) |
@@ -906,14 +964,19 @@ static int __init init_unity_map_range(struct ivmd_header *m) | |||
906 | 964 | ||
907 | switch (m->type) { | 965 | switch (m->type) { |
908 | default: | 966 | default: |
967 | kfree(e); | ||
968 | return 0; | ||
909 | case ACPI_IVMD_TYPE: | 969 | case ACPI_IVMD_TYPE: |
970 | s = "IVMD_TYPEi\t\t\t"; | ||
910 | e->devid_start = e->devid_end = m->devid; | 971 | e->devid_start = e->devid_end = m->devid; |
911 | break; | 972 | break; |
912 | case ACPI_IVMD_TYPE_ALL: | 973 | case ACPI_IVMD_TYPE_ALL: |
974 | s = "IVMD_TYPE_ALL\t\t"; | ||
913 | e->devid_start = 0; | 975 | e->devid_start = 0; |
914 | e->devid_end = amd_iommu_last_bdf; | 976 | e->devid_end = amd_iommu_last_bdf; |
915 | break; | 977 | break; |
916 | case ACPI_IVMD_TYPE_RANGE: | 978 | case ACPI_IVMD_TYPE_RANGE: |
979 | s = "IVMD_TYPE_RANGE\t\t"; | ||
917 | e->devid_start = m->devid; | 980 | e->devid_start = m->devid; |
918 | e->devid_end = m->aux; | 981 | e->devid_end = m->aux; |
919 | break; | 982 | break; |
@@ -922,6 +985,13 @@ static int __init init_unity_map_range(struct ivmd_header *m) | |||
922 | e->address_end = e->address_start + PAGE_ALIGN(m->range_length); | 985 | e->address_end = e->address_start + PAGE_ALIGN(m->range_length); |
923 | e->prot = m->flags >> 1; | 986 | e->prot = m->flags >> 1; |
924 | 987 | ||
988 | DUMP_printk("%s devid_start: %02x:%02x.%x devid_end: %02x:%02x.%x" | ||
989 | " range_start: %016llx range_end: %016llx flags: %x\n", s, | ||
990 | PCI_BUS(e->devid_start), PCI_SLOT(e->devid_start), | ||
991 | PCI_FUNC(e->devid_start), PCI_BUS(e->devid_end), | ||
992 | PCI_SLOT(e->devid_end), PCI_FUNC(e->devid_end), | ||
993 | e->address_start, e->address_end, m->flags); | ||
994 | |||
925 | list_add_tail(&e->list, &amd_iommu_unity_map); | 995 | list_add_tail(&e->list, &amd_iommu_unity_map); |
926 | 996 | ||
927 | return 0; | 997 | return 0; |
@@ -967,18 +1037,28 @@ static void init_device_table(void) | |||
967 | * This function finally enables all IOMMUs found in the system after | 1037 | * This function finally enables all IOMMUs found in the system after |
968 | * they have been initialized | 1038 | * they have been initialized |
969 | */ | 1039 | */ |
970 | static void __init enable_iommus(void) | 1040 | static void enable_iommus(void) |
971 | { | 1041 | { |
972 | struct amd_iommu *iommu; | 1042 | struct amd_iommu *iommu; |
973 | 1043 | ||
974 | list_for_each_entry(iommu, &amd_iommu_list, list) { | 1044 | for_each_iommu(iommu) { |
1045 | iommu_set_device_table(iommu); | ||
1046 | iommu_enable_command_buffer(iommu); | ||
1047 | iommu_enable_event_buffer(iommu); | ||
975 | iommu_set_exclusion_range(iommu); | 1048 | iommu_set_exclusion_range(iommu); |
976 | iommu_init_msi(iommu); | 1049 | iommu_init_msi(iommu); |
977 | iommu_enable_event_logging(iommu); | ||
978 | iommu_enable(iommu); | 1050 | iommu_enable(iommu); |
979 | } | 1051 | } |
980 | } | 1052 | } |
981 | 1053 | ||
1054 | static void disable_iommus(void) | ||
1055 | { | ||
1056 | struct amd_iommu *iommu; | ||
1057 | |||
1058 | for_each_iommu(iommu) | ||
1059 | iommu_disable(iommu); | ||
1060 | } | ||
1061 | |||
982 | /* | 1062 | /* |
983 | * Suspend/Resume support | 1063 | * Suspend/Resume support |
984 | * disable suspend until real resume implemented | 1064 | * disable suspend until real resume implemented |
@@ -986,12 +1066,31 @@ static void __init enable_iommus(void) | |||
986 | 1066 | ||
987 | static int amd_iommu_resume(struct sys_device *dev) | 1067 | static int amd_iommu_resume(struct sys_device *dev) |
988 | { | 1068 | { |
1069 | /* | ||
1070 | * Disable IOMMUs before reprogramming the hardware registers. | ||
1071 | * IOMMU is still enabled from the resume kernel. | ||
1072 | */ | ||
1073 | disable_iommus(); | ||
1074 | |||
1075 | /* re-load the hardware */ | ||
1076 | enable_iommus(); | ||
1077 | |||
1078 | /* | ||
1079 | * we have to flush after the IOMMUs are enabled because a | ||
1080 | * disabled IOMMU will never execute the commands we send | ||
1081 | */ | ||
1082 | amd_iommu_flush_all_domains(); | ||
1083 | amd_iommu_flush_all_devices(); | ||
1084 | |||
989 | return 0; | 1085 | return 0; |
990 | } | 1086 | } |
991 | 1087 | ||
992 | static int amd_iommu_suspend(struct sys_device *dev, pm_message_t state) | 1088 | static int amd_iommu_suspend(struct sys_device *dev, pm_message_t state) |
993 | { | 1089 | { |
994 | return -EINVAL; | 1090 | /* disable IOMMUs to go out of the way for BIOS */ |
1091 | disable_iommus(); | ||
1092 | |||
1093 | return 0; | ||
995 | } | 1094 | } |
996 | 1095 | ||
997 | static struct sysdev_class amd_iommu_sysdev_class = { | 1096 | static struct sysdev_class amd_iommu_sysdev_class = { |
@@ -1137,9 +1236,6 @@ int __init amd_iommu_init(void) | |||
1137 | 1236 | ||
1138 | enable_iommus(); | 1237 | enable_iommus(); |
1139 | 1238 | ||
1140 | printk(KERN_INFO "AMD IOMMU: aperture size is %d MB\n", | ||
1141 | (1 << (amd_iommu_aperture_order-20))); | ||
1142 | |||
1143 | printk(KERN_INFO "AMD IOMMU: device isolation "); | 1239 | printk(KERN_INFO "AMD IOMMU: device isolation "); |
1144 | if (amd_iommu_isolate) | 1240 | if (amd_iommu_isolate) |
1145 | printk("enabled\n"); | 1241 | printk("enabled\n"); |
@@ -1211,6 +1307,13 @@ void __init amd_iommu_detect(void) | |||
1211 | * | 1307 | * |
1212 | ****************************************************************************/ | 1308 | ****************************************************************************/ |
1213 | 1309 | ||
1310 | static int __init parse_amd_iommu_dump(char *str) | ||
1311 | { | ||
1312 | amd_iommu_dump = true; | ||
1313 | |||
1314 | return 1; | ||
1315 | } | ||
1316 | |||
1214 | static int __init parse_amd_iommu_options(char *str) | 1317 | static int __init parse_amd_iommu_options(char *str) |
1215 | { | 1318 | { |
1216 | for (; *str; ++str) { | 1319 | for (; *str; ++str) { |
@@ -1225,15 +1328,5 @@ static int __init parse_amd_iommu_options(char *str) | |||
1225 | return 1; | 1328 | return 1; |
1226 | } | 1329 | } |
1227 | 1330 | ||
1228 | static int __init parse_amd_iommu_size_options(char *str) | 1331 | __setup("amd_iommu_dump", parse_amd_iommu_dump); |
1229 | { | ||
1230 | unsigned order = PAGE_SHIFT + get_order(memparse(str, &str)); | ||
1231 | |||
1232 | if ((order > 24) && (order < 31)) | ||
1233 | amd_iommu_aperture_order = order; | ||
1234 | |||
1235 | return 1; | ||
1236 | } | ||
1237 | |||
1238 | __setup("amd_iommu=", parse_amd_iommu_options); | 1332 | __setup("amd_iommu=", parse_amd_iommu_options); |
1239 | __setup("amd_iommu_size=", parse_amd_iommu_size_options); | ||
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c index 60df2efd7c80..076d3881f3da 100644 --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c | |||
@@ -100,6 +100,29 @@ early_param("lapic", parse_lapic); | |||
100 | /* Local APIC was disabled by the BIOS and enabled by the kernel */ | 100 | /* Local APIC was disabled by the BIOS and enabled by the kernel */ |
101 | static int enabled_via_apicbase; | 101 | static int enabled_via_apicbase; |
102 | 102 | ||
103 | /* | ||
104 | * Handle interrupt mode configuration register (IMCR). | ||
105 | * This register controls whether the interrupt signals | ||
106 | * that reach the BSP come from the master PIC or from the | ||
107 | * local APIC. Before entering Symmetric I/O Mode, either | ||
108 | * the BIOS or the operating system must switch out of | ||
109 | * PIC Mode by changing the IMCR. | ||
110 | */ | ||
111 | static inline void imcr_pic_to_apic(void) | ||
112 | { | ||
113 | /* select IMCR register */ | ||
114 | outb(0x70, 0x22); | ||
115 | /* NMI and 8259 INTR go through APIC */ | ||
116 | outb(0x01, 0x23); | ||
117 | } | ||
118 | |||
119 | static inline void imcr_apic_to_pic(void) | ||
120 | { | ||
121 | /* select IMCR register */ | ||
122 | outb(0x70, 0x22); | ||
123 | /* NMI and 8259 INTR go directly to BSP */ | ||
124 | outb(0x00, 0x23); | ||
125 | } | ||
103 | #endif | 126 | #endif |
104 | 127 | ||
105 | #ifdef CONFIG_X86_64 | 128 | #ifdef CONFIG_X86_64 |
@@ -113,13 +136,19 @@ static __init int setup_apicpmtimer(char *s) | |||
113 | __setup("apicpmtimer", setup_apicpmtimer); | 136 | __setup("apicpmtimer", setup_apicpmtimer); |
114 | #endif | 137 | #endif |
115 | 138 | ||
139 | int x2apic_mode; | ||
116 | #ifdef CONFIG_X86_X2APIC | 140 | #ifdef CONFIG_X86_X2APIC |
117 | int x2apic; | ||
118 | /* x2apic enabled before OS handover */ | 141 | /* x2apic enabled before OS handover */ |
119 | static int x2apic_preenabled; | 142 | static int x2apic_preenabled; |
120 | static int disable_x2apic; | 143 | static int disable_x2apic; |
121 | static __init int setup_nox2apic(char *str) | 144 | static __init int setup_nox2apic(char *str) |
122 | { | 145 | { |
146 | if (x2apic_enabled()) { | ||
147 | pr_warning("Bios already enabled x2apic, " | ||
148 | "can't enforce nox2apic"); | ||
149 | return 0; | ||
150 | } | ||
151 | |||
123 | disable_x2apic = 1; | 152 | disable_x2apic = 1; |
124 | setup_clear_cpu_cap(X86_FEATURE_X2APIC); | 153 | setup_clear_cpu_cap(X86_FEATURE_X2APIC); |
125 | return 0; | 154 | return 0; |
@@ -211,6 +240,31 @@ static int modern_apic(void) | |||
211 | return lapic_get_version() >= 0x14; | 240 | return lapic_get_version() >= 0x14; |
212 | } | 241 | } |
213 | 242 | ||
243 | /* | ||
244 | * bare function to substitute write operation | ||
245 | * and it's _that_ fast :) | ||
246 | */ | ||
247 | static void native_apic_write_dummy(u32 reg, u32 v) | ||
248 | { | ||
249 | WARN_ON_ONCE((cpu_has_apic || !disable_apic)); | ||
250 | } | ||
251 | |||
252 | static u32 native_apic_read_dummy(u32 reg) | ||
253 | { | ||
254 | WARN_ON_ONCE((cpu_has_apic && !disable_apic)); | ||
255 | return 0; | ||
256 | } | ||
257 | |||
258 | /* | ||
259 | * right after this call apic->write/read doesn't do anything | ||
260 | * note that there is no restore operation it works one way | ||
261 | */ | ||
262 | void apic_disable(void) | ||
263 | { | ||
264 | apic->read = native_apic_read_dummy; | ||
265 | apic->write = native_apic_write_dummy; | ||
266 | } | ||
267 | |||
214 | void native_apic_wait_icr_idle(void) | 268 | void native_apic_wait_icr_idle(void) |
215 | { | 269 | { |
216 | while (apic_read(APIC_ICR) & APIC_ICR_BUSY) | 270 | while (apic_read(APIC_ICR) & APIC_ICR_BUSY) |
@@ -350,7 +404,7 @@ static void __setup_APIC_LVTT(unsigned int clocks, int oneshot, int irqen) | |||
350 | 404 | ||
351 | static void setup_APIC_eilvt(u8 lvt_off, u8 vector, u8 msg_type, u8 mask) | 405 | static void setup_APIC_eilvt(u8 lvt_off, u8 vector, u8 msg_type, u8 mask) |
352 | { | 406 | { |
353 | unsigned long reg = (lvt_off << 4) + APIC_EILVT0; | 407 | unsigned long reg = (lvt_off << 4) + APIC_EILVTn(0); |
354 | unsigned int v = (mask << 16) | (msg_type << 8) | vector; | 408 | unsigned int v = (mask << 16) | (msg_type << 8) | vector; |
355 | 409 | ||
356 | apic_write(reg, v); | 410 | apic_write(reg, v); |
@@ -817,7 +871,7 @@ void clear_local_APIC(void) | |||
817 | u32 v; | 871 | u32 v; |
818 | 872 | ||
819 | /* APIC hasn't been mapped yet */ | 873 | /* APIC hasn't been mapped yet */ |
820 | if (!x2apic && !apic_phys) | 874 | if (!x2apic_mode && !apic_phys) |
821 | return; | 875 | return; |
822 | 876 | ||
823 | maxlvt = lapic_get_maxlvt(); | 877 | maxlvt = lapic_get_maxlvt(); |
@@ -1290,7 +1344,7 @@ void check_x2apic(void) | |||
1290 | { | 1344 | { |
1291 | if (x2apic_enabled()) { | 1345 | if (x2apic_enabled()) { |
1292 | pr_info("x2apic enabled by BIOS, switching to x2apic ops\n"); | 1346 | pr_info("x2apic enabled by BIOS, switching to x2apic ops\n"); |
1293 | x2apic_preenabled = x2apic = 1; | 1347 | x2apic_preenabled = x2apic_mode = 1; |
1294 | } | 1348 | } |
1295 | } | 1349 | } |
1296 | 1350 | ||
@@ -1298,7 +1352,7 @@ void enable_x2apic(void) | |||
1298 | { | 1352 | { |
1299 | int msr, msr2; | 1353 | int msr, msr2; |
1300 | 1354 | ||
1301 | if (!x2apic) | 1355 | if (!x2apic_mode) |
1302 | return; | 1356 | return; |
1303 | 1357 | ||
1304 | rdmsr(MSR_IA32_APICBASE, msr, msr2); | 1358 | rdmsr(MSR_IA32_APICBASE, msr, msr2); |
@@ -1307,6 +1361,7 @@ void enable_x2apic(void) | |||
1307 | wrmsr(MSR_IA32_APICBASE, msr | X2APIC_ENABLE, 0); | 1361 | wrmsr(MSR_IA32_APICBASE, msr | X2APIC_ENABLE, 0); |
1308 | } | 1362 | } |
1309 | } | 1363 | } |
1364 | #endif /* CONFIG_X86_X2APIC */ | ||
1310 | 1365 | ||
1311 | void __init enable_IR_x2apic(void) | 1366 | void __init enable_IR_x2apic(void) |
1312 | { | 1367 | { |
@@ -1315,32 +1370,21 @@ void __init enable_IR_x2apic(void) | |||
1315 | unsigned long flags; | 1370 | unsigned long flags; |
1316 | struct IO_APIC_route_entry **ioapic_entries = NULL; | 1371 | struct IO_APIC_route_entry **ioapic_entries = NULL; |
1317 | 1372 | ||
1318 | if (!cpu_has_x2apic) | 1373 | ret = dmar_table_init(); |
1319 | return; | 1374 | if (ret) { |
1320 | 1375 | pr_debug("dmar_table_init() failed with %d:\n", ret); | |
1321 | if (!x2apic_preenabled && disable_x2apic) { | 1376 | goto ir_failed; |
1322 | pr_info("Skipped enabling x2apic and Interrupt-remapping " | ||
1323 | "because of nox2apic\n"); | ||
1324 | return; | ||
1325 | } | 1377 | } |
1326 | 1378 | ||
1327 | if (x2apic_preenabled && disable_x2apic) | 1379 | if (!intr_remapping_supported()) { |
1328 | panic("Bios already enabled x2apic, can't enforce nox2apic"); | 1380 | pr_debug("intr-remapping not supported\n"); |
1329 | 1381 | goto ir_failed; | |
1330 | if (!x2apic_preenabled && skip_ioapic_setup) { | ||
1331 | pr_info("Skipped enabling x2apic and Interrupt-remapping " | ||
1332 | "because of skipping io-apic setup\n"); | ||
1333 | return; | ||
1334 | } | 1382 | } |
1335 | 1383 | ||
1336 | ret = dmar_table_init(); | ||
1337 | if (ret) { | ||
1338 | pr_info("dmar_table_init() failed with %d:\n", ret); | ||
1339 | 1384 | ||
1340 | if (x2apic_preenabled) | 1385 | if (!x2apic_preenabled && skip_ioapic_setup) { |
1341 | panic("x2apic enabled by bios. But IR enabling failed"); | 1386 | pr_info("Skipped enabling intr-remap because of skipping " |
1342 | else | 1387 | "io-apic setup\n"); |
1343 | pr_info("Not enabling x2apic,Intr-remapping\n"); | ||
1344 | return; | 1388 | return; |
1345 | } | 1389 | } |
1346 | 1390 | ||
@@ -1360,19 +1404,16 @@ void __init enable_IR_x2apic(void) | |||
1360 | mask_IO_APIC_setup(ioapic_entries); | 1404 | mask_IO_APIC_setup(ioapic_entries); |
1361 | mask_8259A(); | 1405 | mask_8259A(); |
1362 | 1406 | ||
1363 | ret = enable_intr_remapping(EIM_32BIT_APIC_ID); | 1407 | ret = enable_intr_remapping(x2apic_supported()); |
1364 | |||
1365 | if (ret && x2apic_preenabled) { | ||
1366 | local_irq_restore(flags); | ||
1367 | panic("x2apic enabled by bios. But IR enabling failed"); | ||
1368 | } | ||
1369 | |||
1370 | if (ret) | 1408 | if (ret) |
1371 | goto end_restore; | 1409 | goto end_restore; |
1372 | 1410 | ||
1373 | if (!x2apic) { | 1411 | pr_info("Enabled Interrupt-remapping\n"); |
1374 | x2apic = 1; | 1412 | |
1413 | if (x2apic_supported() && !x2apic_mode) { | ||
1414 | x2apic_mode = 1; | ||
1375 | enable_x2apic(); | 1415 | enable_x2apic(); |
1416 | pr_info("Enabled x2apic\n"); | ||
1376 | } | 1417 | } |
1377 | 1418 | ||
1378 | end_restore: | 1419 | end_restore: |
@@ -1381,37 +1422,34 @@ end_restore: | |||
1381 | * IR enabling failed | 1422 | * IR enabling failed |
1382 | */ | 1423 | */ |
1383 | restore_IO_APIC_setup(ioapic_entries); | 1424 | restore_IO_APIC_setup(ioapic_entries); |
1384 | else | ||
1385 | reinit_intr_remapped_IO_APIC(x2apic_preenabled, ioapic_entries); | ||
1386 | 1425 | ||
1387 | unmask_8259A(); | 1426 | unmask_8259A(); |
1388 | local_irq_restore(flags); | 1427 | local_irq_restore(flags); |
1389 | 1428 | ||
1390 | end: | 1429 | end: |
1391 | if (!ret) { | ||
1392 | if (!x2apic_preenabled) | ||
1393 | pr_info("Enabled x2apic and interrupt-remapping\n"); | ||
1394 | else | ||
1395 | pr_info("Enabled Interrupt-remapping\n"); | ||
1396 | } else | ||
1397 | pr_err("Failed to enable Interrupt-remapping and x2apic\n"); | ||
1398 | if (ioapic_entries) | 1430 | if (ioapic_entries) |
1399 | free_ioapic_entries(ioapic_entries); | 1431 | free_ioapic_entries(ioapic_entries); |
1432 | |||
1433 | if (!ret) | ||
1434 | return; | ||
1435 | |||
1436 | ir_failed: | ||
1437 | if (x2apic_preenabled) | ||
1438 | panic("x2apic enabled by bios. But IR enabling failed"); | ||
1439 | else if (cpu_has_x2apic) | ||
1440 | pr_info("Not enabling x2apic,Intr-remapping\n"); | ||
1400 | #else | 1441 | #else |
1401 | if (!cpu_has_x2apic) | 1442 | if (!cpu_has_x2apic) |
1402 | return; | 1443 | return; |
1403 | 1444 | ||
1404 | if (x2apic_preenabled) | 1445 | if (x2apic_preenabled) |
1405 | panic("x2apic enabled prior OS handover," | 1446 | panic("x2apic enabled prior OS handover," |
1406 | " enable CONFIG_INTR_REMAP"); | 1447 | " enable CONFIG_X86_X2APIC, CONFIG_INTR_REMAP"); |
1407 | |||
1408 | pr_info("Enable CONFIG_INTR_REMAP for enabling intr-remapping " | ||
1409 | " and x2apic\n"); | ||
1410 | #endif | 1448 | #endif |
1411 | 1449 | ||
1412 | return; | 1450 | return; |
1413 | } | 1451 | } |
1414 | #endif /* CONFIG_X86_X2APIC */ | 1452 | |
1415 | 1453 | ||
1416 | #ifdef CONFIG_X86_64 | 1454 | #ifdef CONFIG_X86_64 |
1417 | /* | 1455 | /* |
@@ -1428,7 +1466,6 @@ static int __init detect_init_APIC(void) | |||
1428 | } | 1466 | } |
1429 | 1467 | ||
1430 | mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; | 1468 | mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; |
1431 | boot_cpu_physical_apicid = 0; | ||
1432 | return 0; | 1469 | return 0; |
1433 | } | 1470 | } |
1434 | #else | 1471 | #else |
@@ -1542,32 +1579,49 @@ void __init early_init_lapic_mapping(void) | |||
1542 | */ | 1579 | */ |
1543 | void __init init_apic_mappings(void) | 1580 | void __init init_apic_mappings(void) |
1544 | { | 1581 | { |
1545 | if (x2apic) { | 1582 | unsigned int new_apicid; |
1583 | |||
1584 | if (x2apic_mode) { | ||
1546 | boot_cpu_physical_apicid = read_apic_id(); | 1585 | boot_cpu_physical_apicid = read_apic_id(); |
1547 | return; | 1586 | return; |
1548 | } | 1587 | } |
1549 | 1588 | ||
1550 | /* | 1589 | /* If no local APIC can be found return early */ |
1551 | * If no local APIC can be found then set up a fake all | ||
1552 | * zeroes page to simulate the local APIC and another | ||
1553 | * one for the IO-APIC. | ||
1554 | */ | ||
1555 | if (!smp_found_config && detect_init_APIC()) { | 1590 | if (!smp_found_config && detect_init_APIC()) { |
1556 | apic_phys = (unsigned long) alloc_bootmem_pages(PAGE_SIZE); | 1591 | /* lets NOP'ify apic operations */ |
1557 | apic_phys = __pa(apic_phys); | 1592 | pr_info("APIC: disable apic facility\n"); |
1558 | } else | 1593 | apic_disable(); |
1594 | } else { | ||
1559 | apic_phys = mp_lapic_addr; | 1595 | apic_phys = mp_lapic_addr; |
1560 | 1596 | ||
1561 | set_fixmap_nocache(FIX_APIC_BASE, apic_phys); | 1597 | /* |
1562 | apic_printk(APIC_VERBOSE, "mapped APIC to %08lx (%08lx)\n", | 1598 | * acpi lapic path already maps that address in |
1563 | APIC_BASE, apic_phys); | 1599 | * acpi_register_lapic_address() |
1600 | */ | ||
1601 | if (!acpi_lapic) | ||
1602 | set_fixmap_nocache(FIX_APIC_BASE, apic_phys); | ||
1603 | |||
1604 | apic_printk(APIC_VERBOSE, "mapped APIC to %08lx (%08lx)\n", | ||
1605 | APIC_BASE, apic_phys); | ||
1606 | } | ||
1564 | 1607 | ||
1565 | /* | 1608 | /* |
1566 | * Fetch the APIC ID of the BSP in case we have a | 1609 | * Fetch the APIC ID of the BSP in case we have a |
1567 | * default configuration (or the MP table is broken). | 1610 | * default configuration (or the MP table is broken). |
1568 | */ | 1611 | */ |
1569 | if (boot_cpu_physical_apicid == -1U) | 1612 | new_apicid = read_apic_id(); |
1570 | boot_cpu_physical_apicid = read_apic_id(); | 1613 | if (boot_cpu_physical_apicid != new_apicid) { |
1614 | boot_cpu_physical_apicid = new_apicid; | ||
1615 | /* | ||
1616 | * yeah -- we lie about apic_version | ||
1617 | * in case if apic was disabled via boot option | ||
1618 | * but it's not a problem for SMP compiled kernel | ||
1619 | * since smp_sanity_check is prepared for such a case | ||
1620 | * and disable smp mode | ||
1621 | */ | ||
1622 | apic_version[new_apicid] = | ||
1623 | GET_APIC_VERSION(apic_read(APIC_LVR)); | ||
1624 | } | ||
1571 | } | 1625 | } |
1572 | 1626 | ||
1573 | /* | 1627 | /* |
@@ -1736,8 +1790,7 @@ void __init connect_bsp_APIC(void) | |||
1736 | */ | 1790 | */ |
1737 | apic_printk(APIC_VERBOSE, "leaving PIC mode, " | 1791 | apic_printk(APIC_VERBOSE, "leaving PIC mode, " |
1738 | "enabling APIC mode.\n"); | 1792 | "enabling APIC mode.\n"); |
1739 | outb(0x70, 0x22); | 1793 | imcr_pic_to_apic(); |
1740 | outb(0x01, 0x23); | ||
1741 | } | 1794 | } |
1742 | #endif | 1795 | #endif |
1743 | if (apic->enable_apic_mode) | 1796 | if (apic->enable_apic_mode) |
@@ -1765,8 +1818,7 @@ void disconnect_bsp_APIC(int virt_wire_setup) | |||
1765 | */ | 1818 | */ |
1766 | apic_printk(APIC_VERBOSE, "disabling APIC mode, " | 1819 | apic_printk(APIC_VERBOSE, "disabling APIC mode, " |
1767 | "entering PIC mode.\n"); | 1820 | "entering PIC mode.\n"); |
1768 | outb(0x70, 0x22); | 1821 | imcr_apic_to_pic(); |
1769 | outb(0x00, 0x23); | ||
1770 | return; | 1822 | return; |
1771 | } | 1823 | } |
1772 | #endif | 1824 | #endif |
@@ -1972,10 +2024,10 @@ static int lapic_suspend(struct sys_device *dev, pm_message_t state) | |||
1972 | 2024 | ||
1973 | local_irq_save(flags); | 2025 | local_irq_save(flags); |
1974 | disable_local_APIC(); | 2026 | disable_local_APIC(); |
1975 | #ifdef CONFIG_INTR_REMAP | 2027 | |
1976 | if (intr_remapping_enabled) | 2028 | if (intr_remapping_enabled) |
1977 | disable_intr_remapping(); | 2029 | disable_intr_remapping(); |
1978 | #endif | 2030 | |
1979 | local_irq_restore(flags); | 2031 | local_irq_restore(flags); |
1980 | return 0; | 2032 | return 0; |
1981 | } | 2033 | } |
@@ -1985,42 +2037,34 @@ static int lapic_resume(struct sys_device *dev) | |||
1985 | unsigned int l, h; | 2037 | unsigned int l, h; |
1986 | unsigned long flags; | 2038 | unsigned long flags; |
1987 | int maxlvt; | 2039 | int maxlvt; |
1988 | 2040 | int ret = 0; | |
1989 | #ifdef CONFIG_INTR_REMAP | ||
1990 | int ret; | ||
1991 | struct IO_APIC_route_entry **ioapic_entries = NULL; | 2041 | struct IO_APIC_route_entry **ioapic_entries = NULL; |
1992 | 2042 | ||
1993 | if (!apic_pm_state.active) | 2043 | if (!apic_pm_state.active) |
1994 | return 0; | 2044 | return 0; |
1995 | 2045 | ||
1996 | local_irq_save(flags); | 2046 | local_irq_save(flags); |
1997 | if (x2apic) { | 2047 | if (intr_remapping_enabled) { |
1998 | ioapic_entries = alloc_ioapic_entries(); | 2048 | ioapic_entries = alloc_ioapic_entries(); |
1999 | if (!ioapic_entries) { | 2049 | if (!ioapic_entries) { |
2000 | WARN(1, "Alloc ioapic_entries in lapic resume failed."); | 2050 | WARN(1, "Alloc ioapic_entries in lapic resume failed."); |
2001 | return -ENOMEM; | 2051 | ret = -ENOMEM; |
2052 | goto restore; | ||
2002 | } | 2053 | } |
2003 | 2054 | ||
2004 | ret = save_IO_APIC_setup(ioapic_entries); | 2055 | ret = save_IO_APIC_setup(ioapic_entries); |
2005 | if (ret) { | 2056 | if (ret) { |
2006 | WARN(1, "Saving IO-APIC state failed: %d\n", ret); | 2057 | WARN(1, "Saving IO-APIC state failed: %d\n", ret); |
2007 | free_ioapic_entries(ioapic_entries); | 2058 | free_ioapic_entries(ioapic_entries); |
2008 | return ret; | 2059 | goto restore; |
2009 | } | 2060 | } |
2010 | 2061 | ||
2011 | mask_IO_APIC_setup(ioapic_entries); | 2062 | mask_IO_APIC_setup(ioapic_entries); |
2012 | mask_8259A(); | 2063 | mask_8259A(); |
2013 | enable_x2apic(); | ||
2014 | } | 2064 | } |
2015 | #else | ||
2016 | if (!apic_pm_state.active) | ||
2017 | return 0; | ||
2018 | 2065 | ||
2019 | local_irq_save(flags); | 2066 | if (x2apic_mode) |
2020 | if (x2apic) | ||
2021 | enable_x2apic(); | 2067 | enable_x2apic(); |
2022 | #endif | ||
2023 | |||
2024 | else { | 2068 | else { |
2025 | /* | 2069 | /* |
2026 | * Make sure the APICBASE points to the right address | 2070 | * Make sure the APICBASE points to the right address |
@@ -2058,21 +2102,16 @@ static int lapic_resume(struct sys_device *dev) | |||
2058 | apic_write(APIC_ESR, 0); | 2102 | apic_write(APIC_ESR, 0); |
2059 | apic_read(APIC_ESR); | 2103 | apic_read(APIC_ESR); |
2060 | 2104 | ||
2061 | #ifdef CONFIG_INTR_REMAP | 2105 | if (intr_remapping_enabled) { |
2062 | if (intr_remapping_enabled) | 2106 | reenable_intr_remapping(x2apic_mode); |
2063 | reenable_intr_remapping(EIM_32BIT_APIC_ID); | ||
2064 | |||
2065 | if (x2apic) { | ||
2066 | unmask_8259A(); | 2107 | unmask_8259A(); |
2067 | restore_IO_APIC_setup(ioapic_entries); | 2108 | restore_IO_APIC_setup(ioapic_entries); |
2068 | free_ioapic_entries(ioapic_entries); | 2109 | free_ioapic_entries(ioapic_entries); |
2069 | } | 2110 | } |
2070 | #endif | 2111 | restore: |
2071 | |||
2072 | local_irq_restore(flags); | 2112 | local_irq_restore(flags); |
2073 | 2113 | ||
2074 | 2114 | return ret; | |
2075 | return 0; | ||
2076 | } | 2115 | } |
2077 | 2116 | ||
2078 | /* | 2117 | /* |
@@ -2120,31 +2159,14 @@ static void apic_pm_activate(void) { } | |||
2120 | #endif /* CONFIG_PM */ | 2159 | #endif /* CONFIG_PM */ |
2121 | 2160 | ||
2122 | #ifdef CONFIG_X86_64 | 2161 | #ifdef CONFIG_X86_64 |
2123 | /* | 2162 | |
2124 | * apic_is_clustered_box() -- Check if we can expect good TSC | 2163 | static int __cpuinit apic_cluster_num(void) |
2125 | * | ||
2126 | * Thus far, the major user of this is IBM's Summit2 series: | ||
2127 | * | ||
2128 | * Clustered boxes may have unsynced TSC problems if they are | ||
2129 | * multi-chassis. Use available data to take a good guess. | ||
2130 | * If in doubt, go HPET. | ||
2131 | */ | ||
2132 | __cpuinit int apic_is_clustered_box(void) | ||
2133 | { | 2164 | { |
2134 | int i, clusters, zeros; | 2165 | int i, clusters, zeros; |
2135 | unsigned id; | 2166 | unsigned id; |
2136 | u16 *bios_cpu_apicid; | 2167 | u16 *bios_cpu_apicid; |
2137 | DECLARE_BITMAP(clustermap, NUM_APIC_CLUSTERS); | 2168 | DECLARE_BITMAP(clustermap, NUM_APIC_CLUSTERS); |
2138 | 2169 | ||
2139 | /* | ||
2140 | * there is not this kind of box with AMD CPU yet. | ||
2141 | * Some AMD box with quadcore cpu and 8 sockets apicid | ||
2142 | * will be [4, 0x23] or [8, 0x27] could be thought to | ||
2143 | * vsmp box still need checking... | ||
2144 | */ | ||
2145 | if ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) && !is_vsmp_box()) | ||
2146 | return 0; | ||
2147 | |||
2148 | bios_cpu_apicid = early_per_cpu_ptr(x86_bios_cpu_apicid); | 2170 | bios_cpu_apicid = early_per_cpu_ptr(x86_bios_cpu_apicid); |
2149 | bitmap_zero(clustermap, NUM_APIC_CLUSTERS); | 2171 | bitmap_zero(clustermap, NUM_APIC_CLUSTERS); |
2150 | 2172 | ||
@@ -2180,18 +2202,67 @@ __cpuinit int apic_is_clustered_box(void) | |||
2180 | ++zeros; | 2202 | ++zeros; |
2181 | } | 2203 | } |
2182 | 2204 | ||
2183 | /* ScaleMP vSMPowered boxes have one cluster per board and TSCs are | 2205 | return clusters; |
2184 | * not guaranteed to be synced between boards | 2206 | } |
2185 | */ | 2207 | |
2186 | if (is_vsmp_box() && clusters > 1) | 2208 | static int __cpuinitdata multi_checked; |
2209 | static int __cpuinitdata multi; | ||
2210 | |||
2211 | static int __cpuinit set_multi(const struct dmi_system_id *d) | ||
2212 | { | ||
2213 | if (multi) | ||
2214 | return 0; | ||
2215 | pr_info("APIC: %s detected, Multi Chassis\n", d->ident); | ||
2216 | multi = 1; | ||
2217 | return 0; | ||
2218 | } | ||
2219 | |||
2220 | static const __cpuinitconst struct dmi_system_id multi_dmi_table[] = { | ||
2221 | { | ||
2222 | .callback = set_multi, | ||
2223 | .ident = "IBM System Summit2", | ||
2224 | .matches = { | ||
2225 | DMI_MATCH(DMI_SYS_VENDOR, "IBM"), | ||
2226 | DMI_MATCH(DMI_PRODUCT_NAME, "Summit2"), | ||
2227 | }, | ||
2228 | }, | ||
2229 | {} | ||
2230 | }; | ||
2231 | |||
2232 | static void __cpuinit dmi_check_multi(void) | ||
2233 | { | ||
2234 | if (multi_checked) | ||
2235 | return; | ||
2236 | |||
2237 | dmi_check_system(multi_dmi_table); | ||
2238 | multi_checked = 1; | ||
2239 | } | ||
2240 | |||
2241 | /* | ||
2242 | * apic_is_clustered_box() -- Check if we can expect good TSC | ||
2243 | * | ||
2244 | * Thus far, the major user of this is IBM's Summit2 series: | ||
2245 | * Clustered boxes may have unsynced TSC problems if they are | ||
2246 | * multi-chassis. | ||
2247 | * Use DMI to check them | ||
2248 | */ | ||
2249 | __cpuinit int apic_is_clustered_box(void) | ||
2250 | { | ||
2251 | dmi_check_multi(); | ||
2252 | if (multi) | ||
2187 | return 1; | 2253 | return 1; |
2188 | 2254 | ||
2255 | if (!is_vsmp_box()) | ||
2256 | return 0; | ||
2257 | |||
2189 | /* | 2258 | /* |
2190 | * If clusters > 2, then should be multi-chassis. | 2259 | * ScaleMP vSMPowered boxes have one cluster per board and TSCs are |
2191 | * May have to revisit this when multi-core + hyperthreaded CPUs come | 2260 | * not guaranteed to be synced between boards |
2192 | * out, but AFAIK this will work even for them. | ||
2193 | */ | 2261 | */ |
2194 | return (clusters > 2); | 2262 | if (apic_cluster_num() > 1) |
2263 | return 1; | ||
2264 | |||
2265 | return 0; | ||
2195 | } | 2266 | } |
2196 | #endif | 2267 | #endif |
2197 | 2268 | ||
diff --git a/arch/x86/kernel/apic/apic_flat_64.c b/arch/x86/kernel/apic/apic_flat_64.c index 306e5e88fb6f..d0c99abc26c3 100644 --- a/arch/x86/kernel/apic/apic_flat_64.c +++ b/arch/x86/kernel/apic/apic_flat_64.c | |||
@@ -161,7 +161,7 @@ static int flat_apic_id_registered(void) | |||
161 | 161 | ||
162 | static int flat_phys_pkg_id(int initial_apic_id, int index_msb) | 162 | static int flat_phys_pkg_id(int initial_apic_id, int index_msb) |
163 | { | 163 | { |
164 | return hard_smp_processor_id() >> index_msb; | 164 | return initial_apic_id >> index_msb; |
165 | } | 165 | } |
166 | 166 | ||
167 | struct apic apic_flat = { | 167 | struct apic apic_flat = { |
@@ -235,7 +235,7 @@ static int physflat_acpi_madt_oem_check(char *oem_id, char *oem_table_id) | |||
235 | * regardless of how many processors are present (x86_64 ES7000 | 235 | * regardless of how many processors are present (x86_64 ES7000 |
236 | * is an example). | 236 | * is an example). |
237 | */ | 237 | */ |
238 | if (acpi_gbl_FADT.header.revision > FADT2_REVISION_ID && | 238 | if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID && |
239 | (acpi_gbl_FADT.flags & ACPI_FADT_APIC_PHYSICAL)) { | 239 | (acpi_gbl_FADT.flags & ACPI_FADT_APIC_PHYSICAL)) { |
240 | printk(KERN_DEBUG "system APIC only can use physical flat"); | 240 | printk(KERN_DEBUG "system APIC only can use physical flat"); |
241 | return 1; | 241 | return 1; |
diff --git a/arch/x86/kernel/apic/es7000_32.c b/arch/x86/kernel/apic/es7000_32.c index 302947775575..69328ac8de9c 100644 --- a/arch/x86/kernel/apic/es7000_32.c +++ b/arch/x86/kernel/apic/es7000_32.c | |||
@@ -145,7 +145,7 @@ es7000_rename_gsi(int ioapic, int gsi) | |||
145 | return gsi; | 145 | return gsi; |
146 | } | 146 | } |
147 | 147 | ||
148 | static int wakeup_secondary_cpu_via_mip(int cpu, unsigned long eip) | 148 | static int __cpuinit wakeup_secondary_cpu_via_mip(int cpu, unsigned long eip) |
149 | { | 149 | { |
150 | unsigned long vect = 0, psaival = 0; | 150 | unsigned long vect = 0, psaival = 0; |
151 | 151 | ||
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c index 30da617d18e4..1946fac42ab3 100644 --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c | |||
@@ -59,6 +59,7 @@ | |||
59 | #include <asm/setup.h> | 59 | #include <asm/setup.h> |
60 | #include <asm/irq_remapping.h> | 60 | #include <asm/irq_remapping.h> |
61 | #include <asm/hpet.h> | 61 | #include <asm/hpet.h> |
62 | #include <asm/hw_irq.h> | ||
62 | #include <asm/uv/uv_hub.h> | 63 | #include <asm/uv/uv_hub.h> |
63 | #include <asm/uv/uv_irq.h> | 64 | #include <asm/uv/uv_irq.h> |
64 | 65 | ||
@@ -129,12 +130,9 @@ struct irq_pin_list { | |||
129 | struct irq_pin_list *next; | 130 | struct irq_pin_list *next; |
130 | }; | 131 | }; |
131 | 132 | ||
132 | static struct irq_pin_list *get_one_free_irq_2_pin(int cpu) | 133 | static struct irq_pin_list *get_one_free_irq_2_pin(int node) |
133 | { | 134 | { |
134 | struct irq_pin_list *pin; | 135 | struct irq_pin_list *pin; |
135 | int node; | ||
136 | |||
137 | node = cpu_to_node(cpu); | ||
138 | 136 | ||
139 | pin = kzalloc_node(sizeof(*pin), GFP_ATOMIC, node); | 137 | pin = kzalloc_node(sizeof(*pin), GFP_ATOMIC, node); |
140 | 138 | ||
@@ -148,9 +146,6 @@ struct irq_cfg { | |||
148 | unsigned move_cleanup_count; | 146 | unsigned move_cleanup_count; |
149 | u8 vector; | 147 | u8 vector; |
150 | u8 move_in_progress : 1; | 148 | u8 move_in_progress : 1; |
151 | #ifdef CONFIG_NUMA_MIGRATE_IRQ_DESC | ||
152 | u8 move_desc_pending : 1; | ||
153 | #endif | ||
154 | }; | 149 | }; |
155 | 150 | ||
156 | /* irq_cfg is indexed by the sum of all RTEs in all I/O APICs. */ | 151 | /* irq_cfg is indexed by the sum of all RTEs in all I/O APICs. */ |
@@ -212,12 +207,9 @@ static struct irq_cfg *irq_cfg(unsigned int irq) | |||
212 | return cfg; | 207 | return cfg; |
213 | } | 208 | } |
214 | 209 | ||
215 | static struct irq_cfg *get_one_free_irq_cfg(int cpu) | 210 | static struct irq_cfg *get_one_free_irq_cfg(int node) |
216 | { | 211 | { |
217 | struct irq_cfg *cfg; | 212 | struct irq_cfg *cfg; |
218 | int node; | ||
219 | |||
220 | node = cpu_to_node(cpu); | ||
221 | 213 | ||
222 | cfg = kzalloc_node(sizeof(*cfg), GFP_ATOMIC, node); | 214 | cfg = kzalloc_node(sizeof(*cfg), GFP_ATOMIC, node); |
223 | if (cfg) { | 215 | if (cfg) { |
@@ -238,13 +230,13 @@ static struct irq_cfg *get_one_free_irq_cfg(int cpu) | |||
238 | return cfg; | 230 | return cfg; |
239 | } | 231 | } |
240 | 232 | ||
241 | int arch_init_chip_data(struct irq_desc *desc, int cpu) | 233 | int arch_init_chip_data(struct irq_desc *desc, int node) |
242 | { | 234 | { |
243 | struct irq_cfg *cfg; | 235 | struct irq_cfg *cfg; |
244 | 236 | ||
245 | cfg = desc->chip_data; | 237 | cfg = desc->chip_data; |
246 | if (!cfg) { | 238 | if (!cfg) { |
247 | desc->chip_data = get_one_free_irq_cfg(cpu); | 239 | desc->chip_data = get_one_free_irq_cfg(node); |
248 | if (!desc->chip_data) { | 240 | if (!desc->chip_data) { |
249 | printk(KERN_ERR "can not alloc irq_cfg\n"); | 241 | printk(KERN_ERR "can not alloc irq_cfg\n"); |
250 | BUG_ON(1); | 242 | BUG_ON(1); |
@@ -254,10 +246,9 @@ int arch_init_chip_data(struct irq_desc *desc, int cpu) | |||
254 | return 0; | 246 | return 0; |
255 | } | 247 | } |
256 | 248 | ||
257 | #ifdef CONFIG_NUMA_MIGRATE_IRQ_DESC | 249 | /* for move_irq_desc */ |
258 | |||
259 | static void | 250 | static void |
260 | init_copy_irq_2_pin(struct irq_cfg *old_cfg, struct irq_cfg *cfg, int cpu) | 251 | init_copy_irq_2_pin(struct irq_cfg *old_cfg, struct irq_cfg *cfg, int node) |
261 | { | 252 | { |
262 | struct irq_pin_list *old_entry, *head, *tail, *entry; | 253 | struct irq_pin_list *old_entry, *head, *tail, *entry; |
263 | 254 | ||
@@ -266,7 +257,7 @@ init_copy_irq_2_pin(struct irq_cfg *old_cfg, struct irq_cfg *cfg, int cpu) | |||
266 | if (!old_entry) | 257 | if (!old_entry) |
267 | return; | 258 | return; |
268 | 259 | ||
269 | entry = get_one_free_irq_2_pin(cpu); | 260 | entry = get_one_free_irq_2_pin(node); |
270 | if (!entry) | 261 | if (!entry) |
271 | return; | 262 | return; |
272 | 263 | ||
@@ -276,7 +267,7 @@ init_copy_irq_2_pin(struct irq_cfg *old_cfg, struct irq_cfg *cfg, int cpu) | |||
276 | tail = entry; | 267 | tail = entry; |
277 | old_entry = old_entry->next; | 268 | old_entry = old_entry->next; |
278 | while (old_entry) { | 269 | while (old_entry) { |
279 | entry = get_one_free_irq_2_pin(cpu); | 270 | entry = get_one_free_irq_2_pin(node); |
280 | if (!entry) { | 271 | if (!entry) { |
281 | entry = head; | 272 | entry = head; |
282 | while (entry) { | 273 | while (entry) { |
@@ -316,12 +307,12 @@ static void free_irq_2_pin(struct irq_cfg *old_cfg, struct irq_cfg *cfg) | |||
316 | } | 307 | } |
317 | 308 | ||
318 | void arch_init_copy_chip_data(struct irq_desc *old_desc, | 309 | void arch_init_copy_chip_data(struct irq_desc *old_desc, |
319 | struct irq_desc *desc, int cpu) | 310 | struct irq_desc *desc, int node) |
320 | { | 311 | { |
321 | struct irq_cfg *cfg; | 312 | struct irq_cfg *cfg; |
322 | struct irq_cfg *old_cfg; | 313 | struct irq_cfg *old_cfg; |
323 | 314 | ||
324 | cfg = get_one_free_irq_cfg(cpu); | 315 | cfg = get_one_free_irq_cfg(node); |
325 | 316 | ||
326 | if (!cfg) | 317 | if (!cfg) |
327 | return; | 318 | return; |
@@ -332,7 +323,7 @@ void arch_init_copy_chip_data(struct irq_desc *old_desc, | |||
332 | 323 | ||
333 | memcpy(cfg, old_cfg, sizeof(struct irq_cfg)); | 324 | memcpy(cfg, old_cfg, sizeof(struct irq_cfg)); |
334 | 325 | ||
335 | init_copy_irq_2_pin(old_cfg, cfg, cpu); | 326 | init_copy_irq_2_pin(old_cfg, cfg, node); |
336 | } | 327 | } |
337 | 328 | ||
338 | static void free_irq_cfg(struct irq_cfg *old_cfg) | 329 | static void free_irq_cfg(struct irq_cfg *old_cfg) |
@@ -356,19 +347,7 @@ void arch_free_chip_data(struct irq_desc *old_desc, struct irq_desc *desc) | |||
356 | old_desc->chip_data = NULL; | 347 | old_desc->chip_data = NULL; |
357 | } | 348 | } |
358 | } | 349 | } |
359 | 350 | /* end for move_irq_desc */ | |
360 | static void | ||
361 | set_extra_move_desc(struct irq_desc *desc, const struct cpumask *mask) | ||
362 | { | ||
363 | struct irq_cfg *cfg = desc->chip_data; | ||
364 | |||
365 | if (!cfg->move_in_progress) { | ||
366 | /* it means that domain is not changed */ | ||
367 | if (!cpumask_intersects(desc->affinity, mask)) | ||
368 | cfg->move_desc_pending = 1; | ||
369 | } | ||
370 | } | ||
371 | #endif | ||
372 | 351 | ||
373 | #else | 352 | #else |
374 | static struct irq_cfg *irq_cfg(unsigned int irq) | 353 | static struct irq_cfg *irq_cfg(unsigned int irq) |
@@ -378,13 +357,6 @@ static struct irq_cfg *irq_cfg(unsigned int irq) | |||
378 | 357 | ||
379 | #endif | 358 | #endif |
380 | 359 | ||
381 | #ifndef CONFIG_NUMA_MIGRATE_IRQ_DESC | ||
382 | static inline void | ||
383 | set_extra_move_desc(struct irq_desc *desc, const struct cpumask *mask) | ||
384 | { | ||
385 | } | ||
386 | #endif | ||
387 | |||
388 | struct io_apic { | 360 | struct io_apic { |
389 | unsigned int index; | 361 | unsigned int index; |
390 | unsigned int unused[3]; | 362 | unsigned int unused[3]; |
@@ -518,132 +490,18 @@ static void ioapic_mask_entry(int apic, int pin) | |||
518 | spin_unlock_irqrestore(&ioapic_lock, flags); | 490 | spin_unlock_irqrestore(&ioapic_lock, flags); |
519 | } | 491 | } |
520 | 492 | ||
521 | #ifdef CONFIG_SMP | ||
522 | static void send_cleanup_vector(struct irq_cfg *cfg) | ||
523 | { | ||
524 | cpumask_var_t cleanup_mask; | ||
525 | |||
526 | if (unlikely(!alloc_cpumask_var(&cleanup_mask, GFP_ATOMIC))) { | ||
527 | unsigned int i; | ||
528 | cfg->move_cleanup_count = 0; | ||
529 | for_each_cpu_and(i, cfg->old_domain, cpu_online_mask) | ||
530 | cfg->move_cleanup_count++; | ||
531 | for_each_cpu_and(i, cfg->old_domain, cpu_online_mask) | ||
532 | apic->send_IPI_mask(cpumask_of(i), IRQ_MOVE_CLEANUP_VECTOR); | ||
533 | } else { | ||
534 | cpumask_and(cleanup_mask, cfg->old_domain, cpu_online_mask); | ||
535 | cfg->move_cleanup_count = cpumask_weight(cleanup_mask); | ||
536 | apic->send_IPI_mask(cleanup_mask, IRQ_MOVE_CLEANUP_VECTOR); | ||
537 | free_cpumask_var(cleanup_mask); | ||
538 | } | ||
539 | cfg->move_in_progress = 0; | ||
540 | } | ||
541 | |||
542 | static void __target_IO_APIC_irq(unsigned int irq, unsigned int dest, struct irq_cfg *cfg) | ||
543 | { | ||
544 | int apic, pin; | ||
545 | struct irq_pin_list *entry; | ||
546 | u8 vector = cfg->vector; | ||
547 | |||
548 | entry = cfg->irq_2_pin; | ||
549 | for (;;) { | ||
550 | unsigned int reg; | ||
551 | |||
552 | if (!entry) | ||
553 | break; | ||
554 | |||
555 | apic = entry->apic; | ||
556 | pin = entry->pin; | ||
557 | /* | ||
558 | * With interrupt-remapping, destination information comes | ||
559 | * from interrupt-remapping table entry. | ||
560 | */ | ||
561 | if (!irq_remapped(irq)) | ||
562 | io_apic_write(apic, 0x11 + pin*2, dest); | ||
563 | reg = io_apic_read(apic, 0x10 + pin*2); | ||
564 | reg &= ~IO_APIC_REDIR_VECTOR_MASK; | ||
565 | reg |= vector; | ||
566 | io_apic_modify(apic, 0x10 + pin*2, reg); | ||
567 | if (!entry->next) | ||
568 | break; | ||
569 | entry = entry->next; | ||
570 | } | ||
571 | } | ||
572 | |||
573 | static int | ||
574 | assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask); | ||
575 | |||
576 | /* | ||
577 | * Either sets desc->affinity to a valid value, and returns | ||
578 | * ->cpu_mask_to_apicid of that, or returns BAD_APICID and | ||
579 | * leaves desc->affinity untouched. | ||
580 | */ | ||
581 | static unsigned int | ||
582 | set_desc_affinity(struct irq_desc *desc, const struct cpumask *mask) | ||
583 | { | ||
584 | struct irq_cfg *cfg; | ||
585 | unsigned int irq; | ||
586 | |||
587 | if (!cpumask_intersects(mask, cpu_online_mask)) | ||
588 | return BAD_APICID; | ||
589 | |||
590 | irq = desc->irq; | ||
591 | cfg = desc->chip_data; | ||
592 | if (assign_irq_vector(irq, cfg, mask)) | ||
593 | return BAD_APICID; | ||
594 | |||
595 | /* check that before desc->addinity get updated */ | ||
596 | set_extra_move_desc(desc, mask); | ||
597 | |||
598 | cpumask_copy(desc->affinity, mask); | ||
599 | |||
600 | return apic->cpu_mask_to_apicid_and(desc->affinity, cfg->domain); | ||
601 | } | ||
602 | |||
603 | static void | ||
604 | set_ioapic_affinity_irq_desc(struct irq_desc *desc, const struct cpumask *mask) | ||
605 | { | ||
606 | struct irq_cfg *cfg; | ||
607 | unsigned long flags; | ||
608 | unsigned int dest; | ||
609 | unsigned int irq; | ||
610 | |||
611 | irq = desc->irq; | ||
612 | cfg = desc->chip_data; | ||
613 | |||
614 | spin_lock_irqsave(&ioapic_lock, flags); | ||
615 | dest = set_desc_affinity(desc, mask); | ||
616 | if (dest != BAD_APICID) { | ||
617 | /* Only the high 8 bits are valid. */ | ||
618 | dest = SET_APIC_LOGICAL_ID(dest); | ||
619 | __target_IO_APIC_irq(irq, dest, cfg); | ||
620 | } | ||
621 | spin_unlock_irqrestore(&ioapic_lock, flags); | ||
622 | } | ||
623 | |||
624 | static void | ||
625 | set_ioapic_affinity_irq(unsigned int irq, const struct cpumask *mask) | ||
626 | { | ||
627 | struct irq_desc *desc; | ||
628 | |||
629 | desc = irq_to_desc(irq); | ||
630 | |||
631 | set_ioapic_affinity_irq_desc(desc, mask); | ||
632 | } | ||
633 | #endif /* CONFIG_SMP */ | ||
634 | |||
635 | /* | 493 | /* |
636 | * The common case is 1:1 IRQ<->pin mappings. Sometimes there are | 494 | * The common case is 1:1 IRQ<->pin mappings. Sometimes there are |
637 | * shared ISA-space IRQs, so we have to support them. We are super | 495 | * shared ISA-space IRQs, so we have to support them. We are super |
638 | * fast in the common case, and fast for shared ISA-space IRQs. | 496 | * fast in the common case, and fast for shared ISA-space IRQs. |
639 | */ | 497 | */ |
640 | static void add_pin_to_irq_cpu(struct irq_cfg *cfg, int cpu, int apic, int pin) | 498 | static void add_pin_to_irq_node(struct irq_cfg *cfg, int node, int apic, int pin) |
641 | { | 499 | { |
642 | struct irq_pin_list *entry; | 500 | struct irq_pin_list *entry; |
643 | 501 | ||
644 | entry = cfg->irq_2_pin; | 502 | entry = cfg->irq_2_pin; |
645 | if (!entry) { | 503 | if (!entry) { |
646 | entry = get_one_free_irq_2_pin(cpu); | 504 | entry = get_one_free_irq_2_pin(node); |
647 | if (!entry) { | 505 | if (!entry) { |
648 | printk(KERN_ERR "can not alloc irq_2_pin to add %d - %d\n", | 506 | printk(KERN_ERR "can not alloc irq_2_pin to add %d - %d\n", |
649 | apic, pin); | 507 | apic, pin); |
@@ -663,7 +521,7 @@ static void add_pin_to_irq_cpu(struct irq_cfg *cfg, int cpu, int apic, int pin) | |||
663 | entry = entry->next; | 521 | entry = entry->next; |
664 | } | 522 | } |
665 | 523 | ||
666 | entry->next = get_one_free_irq_2_pin(cpu); | 524 | entry->next = get_one_free_irq_2_pin(node); |
667 | entry = entry->next; | 525 | entry = entry->next; |
668 | entry->apic = apic; | 526 | entry->apic = apic; |
669 | entry->pin = pin; | 527 | entry->pin = pin; |
@@ -672,7 +530,7 @@ static void add_pin_to_irq_cpu(struct irq_cfg *cfg, int cpu, int apic, int pin) | |||
672 | /* | 530 | /* |
673 | * Reroute an IRQ to a different pin. | 531 | * Reroute an IRQ to a different pin. |
674 | */ | 532 | */ |
675 | static void __init replace_pin_at_irq_cpu(struct irq_cfg *cfg, int cpu, | 533 | static void __init replace_pin_at_irq_node(struct irq_cfg *cfg, int node, |
676 | int oldapic, int oldpin, | 534 | int oldapic, int oldpin, |
677 | int newapic, int newpin) | 535 | int newapic, int newpin) |
678 | { | 536 | { |
@@ -692,7 +550,7 @@ static void __init replace_pin_at_irq_cpu(struct irq_cfg *cfg, int cpu, | |||
692 | 550 | ||
693 | /* why? call replace before add? */ | 551 | /* why? call replace before add? */ |
694 | if (!replaced) | 552 | if (!replaced) |
695 | add_pin_to_irq_cpu(cfg, cpu, newapic, newpin); | 553 | add_pin_to_irq_node(cfg, node, newapic, newpin); |
696 | } | 554 | } |
697 | 555 | ||
698 | static inline void io_apic_modify_irq(struct irq_cfg *cfg, | 556 | static inline void io_apic_modify_irq(struct irq_cfg *cfg, |
@@ -850,7 +708,6 @@ static int __init ioapic_pirq_setup(char *str) | |||
850 | __setup("pirq=", ioapic_pirq_setup); | 708 | __setup("pirq=", ioapic_pirq_setup); |
851 | #endif /* CONFIG_X86_32 */ | 709 | #endif /* CONFIG_X86_32 */ |
852 | 710 | ||
853 | #ifdef CONFIG_INTR_REMAP | ||
854 | struct IO_APIC_route_entry **alloc_ioapic_entries(void) | 711 | struct IO_APIC_route_entry **alloc_ioapic_entries(void) |
855 | { | 712 | { |
856 | int apic; | 713 | int apic; |
@@ -948,20 +805,6 @@ int restore_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries) | |||
948 | return 0; | 805 | return 0; |
949 | } | 806 | } |
950 | 807 | ||
951 | void reinit_intr_remapped_IO_APIC(int intr_remapping, | ||
952 | struct IO_APIC_route_entry **ioapic_entries) | ||
953 | |||
954 | { | ||
955 | /* | ||
956 | * for now plain restore of previous settings. | ||
957 | * TBD: In the case of OS enabling interrupt-remapping, | ||
958 | * IO-APIC RTE's need to be setup to point to interrupt-remapping | ||
959 | * table entries. for now, do a plain restore, and wait for | ||
960 | * the setup_IO_APIC_irqs() to do proper initialization. | ||
961 | */ | ||
962 | restore_IO_APIC_setup(ioapic_entries); | ||
963 | } | ||
964 | |||
965 | void free_ioapic_entries(struct IO_APIC_route_entry **ioapic_entries) | 808 | void free_ioapic_entries(struct IO_APIC_route_entry **ioapic_entries) |
966 | { | 809 | { |
967 | int apic; | 810 | int apic; |
@@ -971,7 +814,6 @@ void free_ioapic_entries(struct IO_APIC_route_entry **ioapic_entries) | |||
971 | 814 | ||
972 | kfree(ioapic_entries); | 815 | kfree(ioapic_entries); |
973 | } | 816 | } |
974 | #endif | ||
975 | 817 | ||
976 | /* | 818 | /* |
977 | * Find the IRQ entry number of a certain pin. | 819 | * Find the IRQ entry number of a certain pin. |
@@ -1032,54 +874,6 @@ static int __init find_isa_irq_apic(int irq, int type) | |||
1032 | return -1; | 874 | return -1; |
1033 | } | 875 | } |
1034 | 876 | ||
1035 | /* | ||
1036 | * Find a specific PCI IRQ entry. | ||
1037 | * Not an __init, possibly needed by modules | ||
1038 | */ | ||
1039 | static int pin_2_irq(int idx, int apic, int pin); | ||
1040 | |||
1041 | int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin) | ||
1042 | { | ||
1043 | int apic, i, best_guess = -1; | ||
1044 | |||
1045 | apic_printk(APIC_DEBUG, "querying PCI -> IRQ mapping bus:%d, slot:%d, pin:%d.\n", | ||
1046 | bus, slot, pin); | ||
1047 | if (test_bit(bus, mp_bus_not_pci)) { | ||
1048 | apic_printk(APIC_VERBOSE, "PCI BIOS passed nonexistent PCI bus %d!\n", bus); | ||
1049 | return -1; | ||
1050 | } | ||
1051 | for (i = 0; i < mp_irq_entries; i++) { | ||
1052 | int lbus = mp_irqs[i].srcbus; | ||
1053 | |||
1054 | for (apic = 0; apic < nr_ioapics; apic++) | ||
1055 | if (mp_ioapics[apic].apicid == mp_irqs[i].dstapic || | ||
1056 | mp_irqs[i].dstapic == MP_APIC_ALL) | ||
1057 | break; | ||
1058 | |||
1059 | if (!test_bit(lbus, mp_bus_not_pci) && | ||
1060 | !mp_irqs[i].irqtype && | ||
1061 | (bus == lbus) && | ||
1062 | (slot == ((mp_irqs[i].srcbusirq >> 2) & 0x1f))) { | ||
1063 | int irq = pin_2_irq(i, apic, mp_irqs[i].dstirq); | ||
1064 | |||
1065 | if (!(apic || IO_APIC_IRQ(irq))) | ||
1066 | continue; | ||
1067 | |||
1068 | if (pin == (mp_irqs[i].srcbusirq & 3)) | ||
1069 | return irq; | ||
1070 | /* | ||
1071 | * Use the first all-but-pin matching entry as a | ||
1072 | * best-guess fuzzy result for broken mptables. | ||
1073 | */ | ||
1074 | if (best_guess < 0) | ||
1075 | best_guess = irq; | ||
1076 | } | ||
1077 | } | ||
1078 | return best_guess; | ||
1079 | } | ||
1080 | |||
1081 | EXPORT_SYMBOL(IO_APIC_get_PCI_irq_vector); | ||
1082 | |||
1083 | #if defined(CONFIG_EISA) || defined(CONFIG_MCA) | 877 | #if defined(CONFIG_EISA) || defined(CONFIG_MCA) |
1084 | /* | 878 | /* |
1085 | * EISA Edge/Level control register, ELCR | 879 | * EISA Edge/Level control register, ELCR |
@@ -1298,6 +1092,64 @@ static int pin_2_irq(int idx, int apic, int pin) | |||
1298 | return irq; | 1092 | return irq; |
1299 | } | 1093 | } |
1300 | 1094 | ||
1095 | /* | ||
1096 | * Find a specific PCI IRQ entry. | ||
1097 | * Not an __init, possibly needed by modules | ||
1098 | */ | ||
1099 | int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin, | ||
1100 | struct io_apic_irq_attr *irq_attr) | ||
1101 | { | ||
1102 | int apic, i, best_guess = -1; | ||
1103 | |||
1104 | apic_printk(APIC_DEBUG, | ||
1105 | "querying PCI -> IRQ mapping bus:%d, slot:%d, pin:%d.\n", | ||
1106 | bus, slot, pin); | ||
1107 | if (test_bit(bus, mp_bus_not_pci)) { | ||
1108 | apic_printk(APIC_VERBOSE, | ||
1109 | "PCI BIOS passed nonexistent PCI bus %d!\n", bus); | ||
1110 | return -1; | ||
1111 | } | ||
1112 | for (i = 0; i < mp_irq_entries; i++) { | ||
1113 | int lbus = mp_irqs[i].srcbus; | ||
1114 | |||
1115 | for (apic = 0; apic < nr_ioapics; apic++) | ||
1116 | if (mp_ioapics[apic].apicid == mp_irqs[i].dstapic || | ||
1117 | mp_irqs[i].dstapic == MP_APIC_ALL) | ||
1118 | break; | ||
1119 | |||
1120 | if (!test_bit(lbus, mp_bus_not_pci) && | ||
1121 | !mp_irqs[i].irqtype && | ||
1122 | (bus == lbus) && | ||
1123 | (slot == ((mp_irqs[i].srcbusirq >> 2) & 0x1f))) { | ||
1124 | int irq = pin_2_irq(i, apic, mp_irqs[i].dstirq); | ||
1125 | |||
1126 | if (!(apic || IO_APIC_IRQ(irq))) | ||
1127 | continue; | ||
1128 | |||
1129 | if (pin == (mp_irqs[i].srcbusirq & 3)) { | ||
1130 | set_io_apic_irq_attr(irq_attr, apic, | ||
1131 | mp_irqs[i].dstirq, | ||
1132 | irq_trigger(i), | ||
1133 | irq_polarity(i)); | ||
1134 | return irq; | ||
1135 | } | ||
1136 | /* | ||
1137 | * Use the first all-but-pin matching entry as a | ||
1138 | * best-guess fuzzy result for broken mptables. | ||
1139 | */ | ||
1140 | if (best_guess < 0) { | ||
1141 | set_io_apic_irq_attr(irq_attr, apic, | ||
1142 | mp_irqs[i].dstirq, | ||
1143 | irq_trigger(i), | ||
1144 | irq_polarity(i)); | ||
1145 | best_guess = irq; | ||
1146 | } | ||
1147 | } | ||
1148 | } | ||
1149 | return best_guess; | ||
1150 | } | ||
1151 | EXPORT_SYMBOL(IO_APIC_get_PCI_irq_vector); | ||
1152 | |||
1301 | void lock_vector_lock(void) | 1153 | void lock_vector_lock(void) |
1302 | { | 1154 | { |
1303 | /* Used to the online set of cpus does not change | 1155 | /* Used to the online set of cpus does not change |
@@ -1628,58 +1480,70 @@ static void setup_IO_APIC_irq(int apic_id, int pin, unsigned int irq, struct irq | |||
1628 | ioapic_write_entry(apic_id, pin, entry); | 1480 | ioapic_write_entry(apic_id, pin, entry); |
1629 | } | 1481 | } |
1630 | 1482 | ||
1483 | static struct { | ||
1484 | DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1); | ||
1485 | } mp_ioapic_routing[MAX_IO_APICS]; | ||
1486 | |||
1631 | static void __init setup_IO_APIC_irqs(void) | 1487 | static void __init setup_IO_APIC_irqs(void) |
1632 | { | 1488 | { |
1633 | int apic_id, pin, idx, irq; | 1489 | int apic_id = 0, pin, idx, irq; |
1634 | int notcon = 0; | 1490 | int notcon = 0; |
1635 | struct irq_desc *desc; | 1491 | struct irq_desc *desc; |
1636 | struct irq_cfg *cfg; | 1492 | struct irq_cfg *cfg; |
1637 | int cpu = boot_cpu_id; | 1493 | int node = cpu_to_node(boot_cpu_id); |
1638 | 1494 | ||
1639 | apic_printk(APIC_VERBOSE, KERN_DEBUG "init IO_APIC IRQs\n"); | 1495 | apic_printk(APIC_VERBOSE, KERN_DEBUG "init IO_APIC IRQs\n"); |
1640 | 1496 | ||
1641 | for (apic_id = 0; apic_id < nr_ioapics; apic_id++) { | 1497 | #ifdef CONFIG_ACPI |
1642 | for (pin = 0; pin < nr_ioapic_registers[apic_id]; pin++) { | 1498 | if (!acpi_disabled && acpi_ioapic) { |
1643 | 1499 | apic_id = mp_find_ioapic(0); | |
1644 | idx = find_irq_entry(apic_id, pin, mp_INT); | 1500 | if (apic_id < 0) |
1645 | if (idx == -1) { | 1501 | apic_id = 0; |
1646 | if (!notcon) { | 1502 | } |
1647 | notcon = 1; | 1503 | #endif |
1648 | apic_printk(APIC_VERBOSE, | ||
1649 | KERN_DEBUG " %d-%d", | ||
1650 | mp_ioapics[apic_id].apicid, pin); | ||
1651 | } else | ||
1652 | apic_printk(APIC_VERBOSE, " %d-%d", | ||
1653 | mp_ioapics[apic_id].apicid, pin); | ||
1654 | continue; | ||
1655 | } | ||
1656 | if (notcon) { | ||
1657 | apic_printk(APIC_VERBOSE, | ||
1658 | " (apicid-pin) not connected\n"); | ||
1659 | notcon = 0; | ||
1660 | } | ||
1661 | 1504 | ||
1662 | irq = pin_2_irq(idx, apic_id, pin); | 1505 | for (pin = 0; pin < nr_ioapic_registers[apic_id]; pin++) { |
1506 | idx = find_irq_entry(apic_id, pin, mp_INT); | ||
1507 | if (idx == -1) { | ||
1508 | if (!notcon) { | ||
1509 | notcon = 1; | ||
1510 | apic_printk(APIC_VERBOSE, | ||
1511 | KERN_DEBUG " %d-%d", | ||
1512 | mp_ioapics[apic_id].apicid, pin); | ||
1513 | } else | ||
1514 | apic_printk(APIC_VERBOSE, " %d-%d", | ||
1515 | mp_ioapics[apic_id].apicid, pin); | ||
1516 | continue; | ||
1517 | } | ||
1518 | if (notcon) { | ||
1519 | apic_printk(APIC_VERBOSE, | ||
1520 | " (apicid-pin) not connected\n"); | ||
1521 | notcon = 0; | ||
1522 | } | ||
1663 | 1523 | ||
1664 | /* | 1524 | irq = pin_2_irq(idx, apic_id, pin); |
1665 | * Skip the timer IRQ if there's a quirk handler | ||
1666 | * installed and if it returns 1: | ||
1667 | */ | ||
1668 | if (apic->multi_timer_check && | ||
1669 | apic->multi_timer_check(apic_id, irq)) | ||
1670 | continue; | ||
1671 | 1525 | ||
1672 | desc = irq_to_desc_alloc_cpu(irq, cpu); | 1526 | /* |
1673 | if (!desc) { | 1527 | * Skip the timer IRQ if there's a quirk handler |
1674 | printk(KERN_INFO "can not get irq_desc for %d\n", irq); | 1528 | * installed and if it returns 1: |
1675 | continue; | 1529 | */ |
1676 | } | 1530 | if (apic->multi_timer_check && |
1677 | cfg = desc->chip_data; | 1531 | apic->multi_timer_check(apic_id, irq)) |
1678 | add_pin_to_irq_cpu(cfg, cpu, apic_id, pin); | 1532 | continue; |
1679 | 1533 | ||
1680 | setup_IO_APIC_irq(apic_id, pin, irq, desc, | 1534 | desc = irq_to_desc_alloc_node(irq, node); |
1681 | irq_trigger(idx), irq_polarity(idx)); | 1535 | if (!desc) { |
1536 | printk(KERN_INFO "can not get irq_desc for %d\n", irq); | ||
1537 | continue; | ||
1682 | } | 1538 | } |
1539 | cfg = desc->chip_data; | ||
1540 | add_pin_to_irq_node(cfg, node, apic_id, pin); | ||
1541 | /* | ||
1542 | * don't mark it in pin_programmed, so later acpi could | ||
1543 | * set it correctly when irq < 16 | ||
1544 | */ | ||
1545 | setup_IO_APIC_irq(apic_id, pin, irq, desc, | ||
1546 | irq_trigger(idx), irq_polarity(idx)); | ||
1683 | } | 1547 | } |
1684 | 1548 | ||
1685 | if (notcon) | 1549 | if (notcon) |
@@ -1869,7 +1733,7 @@ __apicdebuginit(void) print_APIC_bitfield(int base) | |||
1869 | 1733 | ||
1870 | __apicdebuginit(void) print_local_APIC(void *dummy) | 1734 | __apicdebuginit(void) print_local_APIC(void *dummy) |
1871 | { | 1735 | { |
1872 | unsigned int v, ver, maxlvt; | 1736 | unsigned int i, v, ver, maxlvt; |
1873 | u64 icr; | 1737 | u64 icr; |
1874 | 1738 | ||
1875 | if (apic_verbosity == APIC_QUIET) | 1739 | if (apic_verbosity == APIC_QUIET) |
@@ -1957,6 +1821,18 @@ __apicdebuginit(void) print_local_APIC(void *dummy) | |||
1957 | printk(KERN_DEBUG "... APIC TMCCT: %08x\n", v); | 1821 | printk(KERN_DEBUG "... APIC TMCCT: %08x\n", v); |
1958 | v = apic_read(APIC_TDCR); | 1822 | v = apic_read(APIC_TDCR); |
1959 | printk(KERN_DEBUG "... APIC TDCR: %08x\n", v); | 1823 | printk(KERN_DEBUG "... APIC TDCR: %08x\n", v); |
1824 | |||
1825 | if (boot_cpu_has(X86_FEATURE_EXTAPIC)) { | ||
1826 | v = apic_read(APIC_EFEAT); | ||
1827 | maxlvt = (v >> 16) & 0xff; | ||
1828 | printk(KERN_DEBUG "... APIC EFEAT: %08x\n", v); | ||
1829 | v = apic_read(APIC_ECTRL); | ||
1830 | printk(KERN_DEBUG "... APIC ECTRL: %08x\n", v); | ||
1831 | for (i = 0; i < maxlvt; i++) { | ||
1832 | v = apic_read(APIC_EILVTn(i)); | ||
1833 | printk(KERN_DEBUG "... APIC EILVT%d: %08x\n", i, v); | ||
1834 | } | ||
1835 | } | ||
1960 | printk("\n"); | 1836 | printk("\n"); |
1961 | } | 1837 | } |
1962 | 1838 | ||
@@ -2005,6 +1881,11 @@ __apicdebuginit(void) print_PIC(void) | |||
2005 | __apicdebuginit(int) print_all_ICs(void) | 1881 | __apicdebuginit(int) print_all_ICs(void) |
2006 | { | 1882 | { |
2007 | print_PIC(); | 1883 | print_PIC(); |
1884 | |||
1885 | /* don't print out if apic is not there */ | ||
1886 | if (!cpu_has_apic || disable_apic) | ||
1887 | return 0; | ||
1888 | |||
2008 | print_all_local_APICs(); | 1889 | print_all_local_APICs(); |
2009 | print_IO_APIC(); | 1890 | print_IO_APIC(); |
2010 | 1891 | ||
@@ -2360,6 +2241,118 @@ static int ioapic_retrigger_irq(unsigned int irq) | |||
2360 | */ | 2241 | */ |
2361 | 2242 | ||
2362 | #ifdef CONFIG_SMP | 2243 | #ifdef CONFIG_SMP |
2244 | static void send_cleanup_vector(struct irq_cfg *cfg) | ||
2245 | { | ||
2246 | cpumask_var_t cleanup_mask; | ||
2247 | |||
2248 | if (unlikely(!alloc_cpumask_var(&cleanup_mask, GFP_ATOMIC))) { | ||
2249 | unsigned int i; | ||
2250 | cfg->move_cleanup_count = 0; | ||
2251 | for_each_cpu_and(i, cfg->old_domain, cpu_online_mask) | ||
2252 | cfg->move_cleanup_count++; | ||
2253 | for_each_cpu_and(i, cfg->old_domain, cpu_online_mask) | ||
2254 | apic->send_IPI_mask(cpumask_of(i), IRQ_MOVE_CLEANUP_VECTOR); | ||
2255 | } else { | ||
2256 | cpumask_and(cleanup_mask, cfg->old_domain, cpu_online_mask); | ||
2257 | cfg->move_cleanup_count = cpumask_weight(cleanup_mask); | ||
2258 | apic->send_IPI_mask(cleanup_mask, IRQ_MOVE_CLEANUP_VECTOR); | ||
2259 | free_cpumask_var(cleanup_mask); | ||
2260 | } | ||
2261 | cfg->move_in_progress = 0; | ||
2262 | } | ||
2263 | |||
2264 | static void __target_IO_APIC_irq(unsigned int irq, unsigned int dest, struct irq_cfg *cfg) | ||
2265 | { | ||
2266 | int apic, pin; | ||
2267 | struct irq_pin_list *entry; | ||
2268 | u8 vector = cfg->vector; | ||
2269 | |||
2270 | entry = cfg->irq_2_pin; | ||
2271 | for (;;) { | ||
2272 | unsigned int reg; | ||
2273 | |||
2274 | if (!entry) | ||
2275 | break; | ||
2276 | |||
2277 | apic = entry->apic; | ||
2278 | pin = entry->pin; | ||
2279 | /* | ||
2280 | * With interrupt-remapping, destination information comes | ||
2281 | * from interrupt-remapping table entry. | ||
2282 | */ | ||
2283 | if (!irq_remapped(irq)) | ||
2284 | io_apic_write(apic, 0x11 + pin*2, dest); | ||
2285 | reg = io_apic_read(apic, 0x10 + pin*2); | ||
2286 | reg &= ~IO_APIC_REDIR_VECTOR_MASK; | ||
2287 | reg |= vector; | ||
2288 | io_apic_modify(apic, 0x10 + pin*2, reg); | ||
2289 | if (!entry->next) | ||
2290 | break; | ||
2291 | entry = entry->next; | ||
2292 | } | ||
2293 | } | ||
2294 | |||
2295 | static int | ||
2296 | assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask); | ||
2297 | |||
2298 | /* | ||
2299 | * Either sets desc->affinity to a valid value, and returns | ||
2300 | * ->cpu_mask_to_apicid of that, or returns BAD_APICID and | ||
2301 | * leaves desc->affinity untouched. | ||
2302 | */ | ||
2303 | static unsigned int | ||
2304 | set_desc_affinity(struct irq_desc *desc, const struct cpumask *mask) | ||
2305 | { | ||
2306 | struct irq_cfg *cfg; | ||
2307 | unsigned int irq; | ||
2308 | |||
2309 | if (!cpumask_intersects(mask, cpu_online_mask)) | ||
2310 | return BAD_APICID; | ||
2311 | |||
2312 | irq = desc->irq; | ||
2313 | cfg = desc->chip_data; | ||
2314 | if (assign_irq_vector(irq, cfg, mask)) | ||
2315 | return BAD_APICID; | ||
2316 | |||
2317 | cpumask_copy(desc->affinity, mask); | ||
2318 | |||
2319 | return apic->cpu_mask_to_apicid_and(desc->affinity, cfg->domain); | ||
2320 | } | ||
2321 | |||
2322 | static int | ||
2323 | set_ioapic_affinity_irq_desc(struct irq_desc *desc, const struct cpumask *mask) | ||
2324 | { | ||
2325 | struct irq_cfg *cfg; | ||
2326 | unsigned long flags; | ||
2327 | unsigned int dest; | ||
2328 | unsigned int irq; | ||
2329 | int ret = -1; | ||
2330 | |||
2331 | irq = desc->irq; | ||
2332 | cfg = desc->chip_data; | ||
2333 | |||
2334 | spin_lock_irqsave(&ioapic_lock, flags); | ||
2335 | dest = set_desc_affinity(desc, mask); | ||
2336 | if (dest != BAD_APICID) { | ||
2337 | /* Only the high 8 bits are valid. */ | ||
2338 | dest = SET_APIC_LOGICAL_ID(dest); | ||
2339 | __target_IO_APIC_irq(irq, dest, cfg); | ||
2340 | ret = 0; | ||
2341 | } | ||
2342 | spin_unlock_irqrestore(&ioapic_lock, flags); | ||
2343 | |||
2344 | return ret; | ||
2345 | } | ||
2346 | |||
2347 | static int | ||
2348 | set_ioapic_affinity_irq(unsigned int irq, const struct cpumask *mask) | ||
2349 | { | ||
2350 | struct irq_desc *desc; | ||
2351 | |||
2352 | desc = irq_to_desc(irq); | ||
2353 | |||
2354 | return set_ioapic_affinity_irq_desc(desc, mask); | ||
2355 | } | ||
2363 | 2356 | ||
2364 | #ifdef CONFIG_INTR_REMAP | 2357 | #ifdef CONFIG_INTR_REMAP |
2365 | 2358 | ||
@@ -2374,26 +2367,25 @@ static int ioapic_retrigger_irq(unsigned int irq) | |||
2374 | * Real vector that is used for interrupting cpu will be coming from | 2367 | * Real vector that is used for interrupting cpu will be coming from |
2375 | * the interrupt-remapping table entry. | 2368 | * the interrupt-remapping table entry. |
2376 | */ | 2369 | */ |
2377 | static void | 2370 | static int |
2378 | migrate_ioapic_irq_desc(struct irq_desc *desc, const struct cpumask *mask) | 2371 | migrate_ioapic_irq_desc(struct irq_desc *desc, const struct cpumask *mask) |
2379 | { | 2372 | { |
2380 | struct irq_cfg *cfg; | 2373 | struct irq_cfg *cfg; |
2381 | struct irte irte; | 2374 | struct irte irte; |
2382 | unsigned int dest; | 2375 | unsigned int dest; |
2383 | unsigned int irq; | 2376 | unsigned int irq; |
2377 | int ret = -1; | ||
2384 | 2378 | ||
2385 | if (!cpumask_intersects(mask, cpu_online_mask)) | 2379 | if (!cpumask_intersects(mask, cpu_online_mask)) |
2386 | return; | 2380 | return ret; |
2387 | 2381 | ||
2388 | irq = desc->irq; | 2382 | irq = desc->irq; |
2389 | if (get_irte(irq, &irte)) | 2383 | if (get_irte(irq, &irte)) |
2390 | return; | 2384 | return ret; |
2391 | 2385 | ||
2392 | cfg = desc->chip_data; | 2386 | cfg = desc->chip_data; |
2393 | if (assign_irq_vector(irq, cfg, mask)) | 2387 | if (assign_irq_vector(irq, cfg, mask)) |
2394 | return; | 2388 | return ret; |
2395 | |||
2396 | set_extra_move_desc(desc, mask); | ||
2397 | 2389 | ||
2398 | dest = apic->cpu_mask_to_apicid_and(cfg->domain, mask); | 2390 | dest = apic->cpu_mask_to_apicid_and(cfg->domain, mask); |
2399 | 2391 | ||
@@ -2409,27 +2401,30 @@ migrate_ioapic_irq_desc(struct irq_desc *desc, const struct cpumask *mask) | |||
2409 | send_cleanup_vector(cfg); | 2401 | send_cleanup_vector(cfg); |
2410 | 2402 | ||
2411 | cpumask_copy(desc->affinity, mask); | 2403 | cpumask_copy(desc->affinity, mask); |
2404 | |||
2405 | return 0; | ||
2412 | } | 2406 | } |
2413 | 2407 | ||
2414 | /* | 2408 | /* |
2415 | * Migrates the IRQ destination in the process context. | 2409 | * Migrates the IRQ destination in the process context. |
2416 | */ | 2410 | */ |
2417 | static void set_ir_ioapic_affinity_irq_desc(struct irq_desc *desc, | 2411 | static int set_ir_ioapic_affinity_irq_desc(struct irq_desc *desc, |
2418 | const struct cpumask *mask) | 2412 | const struct cpumask *mask) |
2419 | { | 2413 | { |
2420 | migrate_ioapic_irq_desc(desc, mask); | 2414 | return migrate_ioapic_irq_desc(desc, mask); |
2421 | } | 2415 | } |
2422 | static void set_ir_ioapic_affinity_irq(unsigned int irq, | 2416 | static int set_ir_ioapic_affinity_irq(unsigned int irq, |
2423 | const struct cpumask *mask) | 2417 | const struct cpumask *mask) |
2424 | { | 2418 | { |
2425 | struct irq_desc *desc = irq_to_desc(irq); | 2419 | struct irq_desc *desc = irq_to_desc(irq); |
2426 | 2420 | ||
2427 | set_ir_ioapic_affinity_irq_desc(desc, mask); | 2421 | return set_ir_ioapic_affinity_irq_desc(desc, mask); |
2428 | } | 2422 | } |
2429 | #else | 2423 | #else |
2430 | static inline void set_ir_ioapic_affinity_irq_desc(struct irq_desc *desc, | 2424 | static inline int set_ir_ioapic_affinity_irq_desc(struct irq_desc *desc, |
2431 | const struct cpumask *mask) | 2425 | const struct cpumask *mask) |
2432 | { | 2426 | { |
2427 | return 0; | ||
2433 | } | 2428 | } |
2434 | #endif | 2429 | #endif |
2435 | 2430 | ||
@@ -2491,86 +2486,19 @@ static void irq_complete_move(struct irq_desc **descp) | |||
2491 | struct irq_cfg *cfg = desc->chip_data; | 2486 | struct irq_cfg *cfg = desc->chip_data; |
2492 | unsigned vector, me; | 2487 | unsigned vector, me; |
2493 | 2488 | ||
2494 | if (likely(!cfg->move_in_progress)) { | 2489 | if (likely(!cfg->move_in_progress)) |
2495 | #ifdef CONFIG_NUMA_MIGRATE_IRQ_DESC | ||
2496 | if (likely(!cfg->move_desc_pending)) | ||
2497 | return; | ||
2498 | |||
2499 | /* domain has not changed, but affinity did */ | ||
2500 | me = smp_processor_id(); | ||
2501 | if (cpumask_test_cpu(me, desc->affinity)) { | ||
2502 | *descp = desc = move_irq_desc(desc, me); | ||
2503 | /* get the new one */ | ||
2504 | cfg = desc->chip_data; | ||
2505 | cfg->move_desc_pending = 0; | ||
2506 | } | ||
2507 | #endif | ||
2508 | return; | 2490 | return; |
2509 | } | ||
2510 | 2491 | ||
2511 | vector = ~get_irq_regs()->orig_ax; | 2492 | vector = ~get_irq_regs()->orig_ax; |
2512 | me = smp_processor_id(); | 2493 | me = smp_processor_id(); |
2513 | 2494 | ||
2514 | if (vector == cfg->vector && cpumask_test_cpu(me, cfg->domain)) { | 2495 | if (vector == cfg->vector && cpumask_test_cpu(me, cfg->domain)) |
2515 | #ifdef CONFIG_NUMA_MIGRATE_IRQ_DESC | ||
2516 | *descp = desc = move_irq_desc(desc, me); | ||
2517 | /* get the new one */ | ||
2518 | cfg = desc->chip_data; | ||
2519 | #endif | ||
2520 | send_cleanup_vector(cfg); | 2496 | send_cleanup_vector(cfg); |
2521 | } | ||
2522 | } | 2497 | } |
2523 | #else | 2498 | #else |
2524 | static inline void irq_complete_move(struct irq_desc **descp) {} | 2499 | static inline void irq_complete_move(struct irq_desc **descp) {} |
2525 | #endif | 2500 | #endif |
2526 | 2501 | ||
2527 | static void __eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg) | ||
2528 | { | ||
2529 | int apic, pin; | ||
2530 | struct irq_pin_list *entry; | ||
2531 | |||
2532 | entry = cfg->irq_2_pin; | ||
2533 | for (;;) { | ||
2534 | |||
2535 | if (!entry) | ||
2536 | break; | ||
2537 | |||
2538 | apic = entry->apic; | ||
2539 | pin = entry->pin; | ||
2540 | io_apic_eoi(apic, pin); | ||
2541 | entry = entry->next; | ||
2542 | } | ||
2543 | } | ||
2544 | |||
2545 | static void | ||
2546 | eoi_ioapic_irq(struct irq_desc *desc) | ||
2547 | { | ||
2548 | struct irq_cfg *cfg; | ||
2549 | unsigned long flags; | ||
2550 | unsigned int irq; | ||
2551 | |||
2552 | irq = desc->irq; | ||
2553 | cfg = desc->chip_data; | ||
2554 | |||
2555 | spin_lock_irqsave(&ioapic_lock, flags); | ||
2556 | __eoi_ioapic_irq(irq, cfg); | ||
2557 | spin_unlock_irqrestore(&ioapic_lock, flags); | ||
2558 | } | ||
2559 | |||
2560 | #ifdef CONFIG_X86_X2APIC | ||
2561 | static void ack_x2apic_level(unsigned int irq) | ||
2562 | { | ||
2563 | struct irq_desc *desc = irq_to_desc(irq); | ||
2564 | ack_x2APIC_irq(); | ||
2565 | eoi_ioapic_irq(desc); | ||
2566 | } | ||
2567 | |||
2568 | static void ack_x2apic_edge(unsigned int irq) | ||
2569 | { | ||
2570 | ack_x2APIC_irq(); | ||
2571 | } | ||
2572 | #endif | ||
2573 | |||
2574 | static void ack_apic_edge(unsigned int irq) | 2502 | static void ack_apic_edge(unsigned int irq) |
2575 | { | 2503 | { |
2576 | struct irq_desc *desc = irq_to_desc(irq); | 2504 | struct irq_desc *desc = irq_to_desc(irq); |
@@ -2634,9 +2562,6 @@ static void ack_apic_level(unsigned int irq) | |||
2634 | */ | 2562 | */ |
2635 | ack_APIC_irq(); | 2563 | ack_APIC_irq(); |
2636 | 2564 | ||
2637 | if (irq_remapped(irq)) | ||
2638 | eoi_ioapic_irq(desc); | ||
2639 | |||
2640 | /* Now we can move and renable the irq */ | 2565 | /* Now we can move and renable the irq */ |
2641 | if (unlikely(do_unmask_irq)) { | 2566 | if (unlikely(do_unmask_irq)) { |
2642 | /* Only migrate the irq if the ack has been received. | 2567 | /* Only migrate the irq if the ack has been received. |
@@ -2683,22 +2608,50 @@ static void ack_apic_level(unsigned int irq) | |||
2683 | } | 2608 | } |
2684 | 2609 | ||
2685 | #ifdef CONFIG_INTR_REMAP | 2610 | #ifdef CONFIG_INTR_REMAP |
2611 | static void __eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg) | ||
2612 | { | ||
2613 | int apic, pin; | ||
2614 | struct irq_pin_list *entry; | ||
2615 | |||
2616 | entry = cfg->irq_2_pin; | ||
2617 | for (;;) { | ||
2618 | |||
2619 | if (!entry) | ||
2620 | break; | ||
2621 | |||
2622 | apic = entry->apic; | ||
2623 | pin = entry->pin; | ||
2624 | io_apic_eoi(apic, pin); | ||
2625 | entry = entry->next; | ||
2626 | } | ||
2627 | } | ||
2628 | |||
2629 | static void | ||
2630 | eoi_ioapic_irq(struct irq_desc *desc) | ||
2631 | { | ||
2632 | struct irq_cfg *cfg; | ||
2633 | unsigned long flags; | ||
2634 | unsigned int irq; | ||
2635 | |||
2636 | irq = desc->irq; | ||
2637 | cfg = desc->chip_data; | ||
2638 | |||
2639 | spin_lock_irqsave(&ioapic_lock, flags); | ||
2640 | __eoi_ioapic_irq(irq, cfg); | ||
2641 | spin_unlock_irqrestore(&ioapic_lock, flags); | ||
2642 | } | ||
2643 | |||
2686 | static void ir_ack_apic_edge(unsigned int irq) | 2644 | static void ir_ack_apic_edge(unsigned int irq) |
2687 | { | 2645 | { |
2688 | #ifdef CONFIG_X86_X2APIC | 2646 | ack_APIC_irq(); |
2689 | if (x2apic_enabled()) | ||
2690 | return ack_x2apic_edge(irq); | ||
2691 | #endif | ||
2692 | return ack_apic_edge(irq); | ||
2693 | } | 2647 | } |
2694 | 2648 | ||
2695 | static void ir_ack_apic_level(unsigned int irq) | 2649 | static void ir_ack_apic_level(unsigned int irq) |
2696 | { | 2650 | { |
2697 | #ifdef CONFIG_X86_X2APIC | 2651 | struct irq_desc *desc = irq_to_desc(irq); |
2698 | if (x2apic_enabled()) | 2652 | |
2699 | return ack_x2apic_level(irq); | 2653 | ack_APIC_irq(); |
2700 | #endif | 2654 | eoi_ioapic_irq(desc); |
2701 | return ack_apic_level(irq); | ||
2702 | } | 2655 | } |
2703 | #endif /* CONFIG_INTR_REMAP */ | 2656 | #endif /* CONFIG_INTR_REMAP */ |
2704 | 2657 | ||
@@ -2903,7 +2856,7 @@ static inline void __init check_timer(void) | |||
2903 | { | 2856 | { |
2904 | struct irq_desc *desc = irq_to_desc(0); | 2857 | struct irq_desc *desc = irq_to_desc(0); |
2905 | struct irq_cfg *cfg = desc->chip_data; | 2858 | struct irq_cfg *cfg = desc->chip_data; |
2906 | int cpu = boot_cpu_id; | 2859 | int node = cpu_to_node(boot_cpu_id); |
2907 | int apic1, pin1, apic2, pin2; | 2860 | int apic1, pin1, apic2, pin2; |
2908 | unsigned long flags; | 2861 | unsigned long flags; |
2909 | int no_pin1 = 0; | 2862 | int no_pin1 = 0; |
@@ -2969,7 +2922,7 @@ static inline void __init check_timer(void) | |||
2969 | * Ok, does IRQ0 through the IOAPIC work? | 2922 | * Ok, does IRQ0 through the IOAPIC work? |
2970 | */ | 2923 | */ |
2971 | if (no_pin1) { | 2924 | if (no_pin1) { |
2972 | add_pin_to_irq_cpu(cfg, cpu, apic1, pin1); | 2925 | add_pin_to_irq_node(cfg, node, apic1, pin1); |
2973 | setup_timer_IRQ0_pin(apic1, pin1, cfg->vector); | 2926 | setup_timer_IRQ0_pin(apic1, pin1, cfg->vector); |
2974 | } else { | 2927 | } else { |
2975 | /* for edge trigger, setup_IO_APIC_irq already | 2928 | /* for edge trigger, setup_IO_APIC_irq already |
@@ -3006,7 +2959,7 @@ static inline void __init check_timer(void) | |||
3006 | /* | 2959 | /* |
3007 | * legacy devices should be connected to IO APIC #0 | 2960 | * legacy devices should be connected to IO APIC #0 |
3008 | */ | 2961 | */ |
3009 | replace_pin_at_irq_cpu(cfg, cpu, apic1, pin1, apic2, pin2); | 2962 | replace_pin_at_irq_node(cfg, node, apic1, pin1, apic2, pin2); |
3010 | setup_timer_IRQ0_pin(apic2, pin2, cfg->vector); | 2963 | setup_timer_IRQ0_pin(apic2, pin2, cfg->vector); |
3011 | enable_8259A_irq(0); | 2964 | enable_8259A_irq(0); |
3012 | if (timer_irq_works()) { | 2965 | if (timer_irq_works()) { |
@@ -3218,14 +3171,13 @@ static int nr_irqs_gsi = NR_IRQS_LEGACY; | |||
3218 | /* | 3171 | /* |
3219 | * Dynamic irq allocate and deallocation | 3172 | * Dynamic irq allocate and deallocation |
3220 | */ | 3173 | */ |
3221 | unsigned int create_irq_nr(unsigned int irq_want) | 3174 | unsigned int create_irq_nr(unsigned int irq_want, int node) |
3222 | { | 3175 | { |
3223 | /* Allocate an unused irq */ | 3176 | /* Allocate an unused irq */ |
3224 | unsigned int irq; | 3177 | unsigned int irq; |
3225 | unsigned int new; | 3178 | unsigned int new; |
3226 | unsigned long flags; | 3179 | unsigned long flags; |
3227 | struct irq_cfg *cfg_new = NULL; | 3180 | struct irq_cfg *cfg_new = NULL; |
3228 | int cpu = boot_cpu_id; | ||
3229 | struct irq_desc *desc_new = NULL; | 3181 | struct irq_desc *desc_new = NULL; |
3230 | 3182 | ||
3231 | irq = 0; | 3183 | irq = 0; |
@@ -3234,7 +3186,7 @@ unsigned int create_irq_nr(unsigned int irq_want) | |||
3234 | 3186 | ||
3235 | spin_lock_irqsave(&vector_lock, flags); | 3187 | spin_lock_irqsave(&vector_lock, flags); |
3236 | for (new = irq_want; new < nr_irqs; new++) { | 3188 | for (new = irq_want; new < nr_irqs; new++) { |
3237 | desc_new = irq_to_desc_alloc_cpu(new, cpu); | 3189 | desc_new = irq_to_desc_alloc_node(new, node); |
3238 | if (!desc_new) { | 3190 | if (!desc_new) { |
3239 | printk(KERN_INFO "can not get irq_desc for %d\n", new); | 3191 | printk(KERN_INFO "can not get irq_desc for %d\n", new); |
3240 | continue; | 3192 | continue; |
@@ -3243,6 +3195,9 @@ unsigned int create_irq_nr(unsigned int irq_want) | |||
3243 | 3195 | ||
3244 | if (cfg_new->vector != 0) | 3196 | if (cfg_new->vector != 0) |
3245 | continue; | 3197 | continue; |
3198 | |||
3199 | desc_new = move_irq_desc(desc_new, node); | ||
3200 | |||
3246 | if (__assign_irq_vector(new, cfg_new, apic->target_cpus()) == 0) | 3201 | if (__assign_irq_vector(new, cfg_new, apic->target_cpus()) == 0) |
3247 | irq = new; | 3202 | irq = new; |
3248 | break; | 3203 | break; |
@@ -3260,11 +3215,12 @@ unsigned int create_irq_nr(unsigned int irq_want) | |||
3260 | 3215 | ||
3261 | int create_irq(void) | 3216 | int create_irq(void) |
3262 | { | 3217 | { |
3218 | int node = cpu_to_node(boot_cpu_id); | ||
3263 | unsigned int irq_want; | 3219 | unsigned int irq_want; |
3264 | int irq; | 3220 | int irq; |
3265 | 3221 | ||
3266 | irq_want = nr_irqs_gsi; | 3222 | irq_want = nr_irqs_gsi; |
3267 | irq = create_irq_nr(irq_want); | 3223 | irq = create_irq_nr(irq_want, node); |
3268 | 3224 | ||
3269 | if (irq == 0) | 3225 | if (irq == 0) |
3270 | irq = -1; | 3226 | irq = -1; |
@@ -3366,7 +3322,7 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms | |||
3366 | } | 3322 | } |
3367 | 3323 | ||
3368 | #ifdef CONFIG_SMP | 3324 | #ifdef CONFIG_SMP |
3369 | static void set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask) | 3325 | static int set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask) |
3370 | { | 3326 | { |
3371 | struct irq_desc *desc = irq_to_desc(irq); | 3327 | struct irq_desc *desc = irq_to_desc(irq); |
3372 | struct irq_cfg *cfg; | 3328 | struct irq_cfg *cfg; |
@@ -3375,7 +3331,7 @@ static void set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask) | |||
3375 | 3331 | ||
3376 | dest = set_desc_affinity(desc, mask); | 3332 | dest = set_desc_affinity(desc, mask); |
3377 | if (dest == BAD_APICID) | 3333 | if (dest == BAD_APICID) |
3378 | return; | 3334 | return -1; |
3379 | 3335 | ||
3380 | cfg = desc->chip_data; | 3336 | cfg = desc->chip_data; |
3381 | 3337 | ||
@@ -3387,13 +3343,15 @@ static void set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask) | |||
3387 | msg.address_lo |= MSI_ADDR_DEST_ID(dest); | 3343 | msg.address_lo |= MSI_ADDR_DEST_ID(dest); |
3388 | 3344 | ||
3389 | write_msi_msg_desc(desc, &msg); | 3345 | write_msi_msg_desc(desc, &msg); |
3346 | |||
3347 | return 0; | ||
3390 | } | 3348 | } |
3391 | #ifdef CONFIG_INTR_REMAP | 3349 | #ifdef CONFIG_INTR_REMAP |
3392 | /* | 3350 | /* |
3393 | * Migrate the MSI irq to another cpumask. This migration is | 3351 | * Migrate the MSI irq to another cpumask. This migration is |
3394 | * done in the process context using interrupt-remapping hardware. | 3352 | * done in the process context using interrupt-remapping hardware. |
3395 | */ | 3353 | */ |
3396 | static void | 3354 | static int |
3397 | ir_set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask) | 3355 | ir_set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask) |
3398 | { | 3356 | { |
3399 | struct irq_desc *desc = irq_to_desc(irq); | 3357 | struct irq_desc *desc = irq_to_desc(irq); |
@@ -3402,11 +3360,11 @@ ir_set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask) | |||
3402 | struct irte irte; | 3360 | struct irte irte; |
3403 | 3361 | ||
3404 | if (get_irte(irq, &irte)) | 3362 | if (get_irte(irq, &irte)) |
3405 | return; | 3363 | return -1; |
3406 | 3364 | ||
3407 | dest = set_desc_affinity(desc, mask); | 3365 | dest = set_desc_affinity(desc, mask); |
3408 | if (dest == BAD_APICID) | 3366 | if (dest == BAD_APICID) |
3409 | return; | 3367 | return -1; |
3410 | 3368 | ||
3411 | irte.vector = cfg->vector; | 3369 | irte.vector = cfg->vector; |
3412 | irte.dest_id = IRTE_DEST(dest); | 3370 | irte.dest_id = IRTE_DEST(dest); |
@@ -3423,6 +3381,8 @@ ir_set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask) | |||
3423 | */ | 3381 | */ |
3424 | if (cfg->move_in_progress) | 3382 | if (cfg->move_in_progress) |
3425 | send_cleanup_vector(cfg); | 3383 | send_cleanup_vector(cfg); |
3384 | |||
3385 | return 0; | ||
3426 | } | 3386 | } |
3427 | 3387 | ||
3428 | #endif | 3388 | #endif |
@@ -3518,15 +3478,17 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) | |||
3518 | unsigned int irq_want; | 3478 | unsigned int irq_want; |
3519 | struct intel_iommu *iommu = NULL; | 3479 | struct intel_iommu *iommu = NULL; |
3520 | int index = 0; | 3480 | int index = 0; |
3481 | int node; | ||
3521 | 3482 | ||
3522 | /* x86 doesn't support multiple MSI yet */ | 3483 | /* x86 doesn't support multiple MSI yet */ |
3523 | if (type == PCI_CAP_ID_MSI && nvec > 1) | 3484 | if (type == PCI_CAP_ID_MSI && nvec > 1) |
3524 | return 1; | 3485 | return 1; |
3525 | 3486 | ||
3487 | node = dev_to_node(&dev->dev); | ||
3526 | irq_want = nr_irqs_gsi; | 3488 | irq_want = nr_irqs_gsi; |
3527 | sub_handle = 0; | 3489 | sub_handle = 0; |
3528 | list_for_each_entry(msidesc, &dev->msi_list, list) { | 3490 | list_for_each_entry(msidesc, &dev->msi_list, list) { |
3529 | irq = create_irq_nr(irq_want); | 3491 | irq = create_irq_nr(irq_want, node); |
3530 | if (irq == 0) | 3492 | if (irq == 0) |
3531 | return -1; | 3493 | return -1; |
3532 | irq_want = irq + 1; | 3494 | irq_want = irq + 1; |
@@ -3576,7 +3538,7 @@ void arch_teardown_msi_irq(unsigned int irq) | |||
3576 | 3538 | ||
3577 | #if defined (CONFIG_DMAR) || defined (CONFIG_INTR_REMAP) | 3539 | #if defined (CONFIG_DMAR) || defined (CONFIG_INTR_REMAP) |
3578 | #ifdef CONFIG_SMP | 3540 | #ifdef CONFIG_SMP |
3579 | static void dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask) | 3541 | static int dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask) |
3580 | { | 3542 | { |
3581 | struct irq_desc *desc = irq_to_desc(irq); | 3543 | struct irq_desc *desc = irq_to_desc(irq); |
3582 | struct irq_cfg *cfg; | 3544 | struct irq_cfg *cfg; |
@@ -3585,7 +3547,7 @@ static void dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask) | |||
3585 | 3547 | ||
3586 | dest = set_desc_affinity(desc, mask); | 3548 | dest = set_desc_affinity(desc, mask); |
3587 | if (dest == BAD_APICID) | 3549 | if (dest == BAD_APICID) |
3588 | return; | 3550 | return -1; |
3589 | 3551 | ||
3590 | cfg = desc->chip_data; | 3552 | cfg = desc->chip_data; |
3591 | 3553 | ||
@@ -3597,6 +3559,8 @@ static void dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask) | |||
3597 | msg.address_lo |= MSI_ADDR_DEST_ID(dest); | 3559 | msg.address_lo |= MSI_ADDR_DEST_ID(dest); |
3598 | 3560 | ||
3599 | dmar_msi_write(irq, &msg); | 3561 | dmar_msi_write(irq, &msg); |
3562 | |||
3563 | return 0; | ||
3600 | } | 3564 | } |
3601 | 3565 | ||
3602 | #endif /* CONFIG_SMP */ | 3566 | #endif /* CONFIG_SMP */ |
@@ -3630,7 +3594,7 @@ int arch_setup_dmar_msi(unsigned int irq) | |||
3630 | #ifdef CONFIG_HPET_TIMER | 3594 | #ifdef CONFIG_HPET_TIMER |
3631 | 3595 | ||
3632 | #ifdef CONFIG_SMP | 3596 | #ifdef CONFIG_SMP |
3633 | static void hpet_msi_set_affinity(unsigned int irq, const struct cpumask *mask) | 3597 | static int hpet_msi_set_affinity(unsigned int irq, const struct cpumask *mask) |
3634 | { | 3598 | { |
3635 | struct irq_desc *desc = irq_to_desc(irq); | 3599 | struct irq_desc *desc = irq_to_desc(irq); |
3636 | struct irq_cfg *cfg; | 3600 | struct irq_cfg *cfg; |
@@ -3639,7 +3603,7 @@ static void hpet_msi_set_affinity(unsigned int irq, const struct cpumask *mask) | |||
3639 | 3603 | ||
3640 | dest = set_desc_affinity(desc, mask); | 3604 | dest = set_desc_affinity(desc, mask); |
3641 | if (dest == BAD_APICID) | 3605 | if (dest == BAD_APICID) |
3642 | return; | 3606 | return -1; |
3643 | 3607 | ||
3644 | cfg = desc->chip_data; | 3608 | cfg = desc->chip_data; |
3645 | 3609 | ||
@@ -3651,6 +3615,8 @@ static void hpet_msi_set_affinity(unsigned int irq, const struct cpumask *mask) | |||
3651 | msg.address_lo |= MSI_ADDR_DEST_ID(dest); | 3615 | msg.address_lo |= MSI_ADDR_DEST_ID(dest); |
3652 | 3616 | ||
3653 | hpet_msi_write(irq, &msg); | 3617 | hpet_msi_write(irq, &msg); |
3618 | |||
3619 | return 0; | ||
3654 | } | 3620 | } |
3655 | 3621 | ||
3656 | #endif /* CONFIG_SMP */ | 3622 | #endif /* CONFIG_SMP */ |
@@ -3707,7 +3673,7 @@ static void target_ht_irq(unsigned int irq, unsigned int dest, u8 vector) | |||
3707 | write_ht_irq_msg(irq, &msg); | 3673 | write_ht_irq_msg(irq, &msg); |
3708 | } | 3674 | } |
3709 | 3675 | ||
3710 | static void set_ht_irq_affinity(unsigned int irq, const struct cpumask *mask) | 3676 | static int set_ht_irq_affinity(unsigned int irq, const struct cpumask *mask) |
3711 | { | 3677 | { |
3712 | struct irq_desc *desc = irq_to_desc(irq); | 3678 | struct irq_desc *desc = irq_to_desc(irq); |
3713 | struct irq_cfg *cfg; | 3679 | struct irq_cfg *cfg; |
@@ -3715,11 +3681,13 @@ static void set_ht_irq_affinity(unsigned int irq, const struct cpumask *mask) | |||
3715 | 3681 | ||
3716 | dest = set_desc_affinity(desc, mask); | 3682 | dest = set_desc_affinity(desc, mask); |
3717 | if (dest == BAD_APICID) | 3683 | if (dest == BAD_APICID) |
3718 | return; | 3684 | return -1; |
3719 | 3685 | ||
3720 | cfg = desc->chip_data; | 3686 | cfg = desc->chip_data; |
3721 | 3687 | ||
3722 | target_ht_irq(irq, dest, cfg->vector); | 3688 | target_ht_irq(irq, dest, cfg->vector); |
3689 | |||
3690 | return 0; | ||
3723 | } | 3691 | } |
3724 | 3692 | ||
3725 | #endif | 3693 | #endif |
@@ -3794,6 +3762,8 @@ int arch_enable_uv_irq(char *irq_name, unsigned int irq, int cpu, int mmr_blade, | |||
3794 | unsigned long flags; | 3762 | unsigned long flags; |
3795 | int err; | 3763 | int err; |
3796 | 3764 | ||
3765 | BUILD_BUG_ON(sizeof(struct uv_IO_APIC_route_entry) != sizeof(unsigned long)); | ||
3766 | |||
3797 | cfg = irq_cfg(irq); | 3767 | cfg = irq_cfg(irq); |
3798 | 3768 | ||
3799 | err = assign_irq_vector(irq, cfg, eligible_cpu); | 3769 | err = assign_irq_vector(irq, cfg, eligible_cpu); |
@@ -3807,15 +3777,13 @@ int arch_enable_uv_irq(char *irq_name, unsigned int irq, int cpu, int mmr_blade, | |||
3807 | 3777 | ||
3808 | mmr_value = 0; | 3778 | mmr_value = 0; |
3809 | entry = (struct uv_IO_APIC_route_entry *)&mmr_value; | 3779 | entry = (struct uv_IO_APIC_route_entry *)&mmr_value; |
3810 | BUG_ON(sizeof(struct uv_IO_APIC_route_entry) != sizeof(unsigned long)); | 3780 | entry->vector = cfg->vector; |
3811 | 3781 | entry->delivery_mode = apic->irq_delivery_mode; | |
3812 | entry->vector = cfg->vector; | 3782 | entry->dest_mode = apic->irq_dest_mode; |
3813 | entry->delivery_mode = apic->irq_delivery_mode; | 3783 | entry->polarity = 0; |
3814 | entry->dest_mode = apic->irq_dest_mode; | 3784 | entry->trigger = 0; |
3815 | entry->polarity = 0; | 3785 | entry->mask = 0; |
3816 | entry->trigger = 0; | 3786 | entry->dest = apic->cpu_mask_to_apicid(eligible_cpu); |
3817 | entry->mask = 0; | ||
3818 | entry->dest = apic->cpu_mask_to_apicid(eligible_cpu); | ||
3819 | 3787 | ||
3820 | mmr_pnode = uv_blade_to_pnode(mmr_blade); | 3788 | mmr_pnode = uv_blade_to_pnode(mmr_blade); |
3821 | uv_write_global_mmr64(mmr_pnode, mmr_offset, mmr_value); | 3789 | uv_write_global_mmr64(mmr_pnode, mmr_offset, mmr_value); |
@@ -3833,10 +3801,10 @@ void arch_disable_uv_irq(int mmr_blade, unsigned long mmr_offset) | |||
3833 | struct uv_IO_APIC_route_entry *entry; | 3801 | struct uv_IO_APIC_route_entry *entry; |
3834 | int mmr_pnode; | 3802 | int mmr_pnode; |
3835 | 3803 | ||
3804 | BUILD_BUG_ON(sizeof(struct uv_IO_APIC_route_entry) != sizeof(unsigned long)); | ||
3805 | |||
3836 | mmr_value = 0; | 3806 | mmr_value = 0; |
3837 | entry = (struct uv_IO_APIC_route_entry *)&mmr_value; | 3807 | entry = (struct uv_IO_APIC_route_entry *)&mmr_value; |
3838 | BUG_ON(sizeof(struct uv_IO_APIC_route_entry) != sizeof(unsigned long)); | ||
3839 | |||
3840 | entry->mask = 1; | 3808 | entry->mask = 1; |
3841 | 3809 | ||
3842 | mmr_pnode = uv_blade_to_pnode(mmr_blade); | 3810 | mmr_pnode = uv_blade_to_pnode(mmr_blade); |
@@ -3900,6 +3868,71 @@ int __init arch_probe_nr_irqs(void) | |||
3900 | } | 3868 | } |
3901 | #endif | 3869 | #endif |
3902 | 3870 | ||
3871 | static int __io_apic_set_pci_routing(struct device *dev, int irq, | ||
3872 | struct io_apic_irq_attr *irq_attr) | ||
3873 | { | ||
3874 | struct irq_desc *desc; | ||
3875 | struct irq_cfg *cfg; | ||
3876 | int node; | ||
3877 | int ioapic, pin; | ||
3878 | int trigger, polarity; | ||
3879 | |||
3880 | ioapic = irq_attr->ioapic; | ||
3881 | if (!IO_APIC_IRQ(irq)) { | ||
3882 | apic_printk(APIC_QUIET,KERN_ERR "IOAPIC[%d]: Invalid reference to IRQ 0\n", | ||
3883 | ioapic); | ||
3884 | return -EINVAL; | ||
3885 | } | ||
3886 | |||
3887 | if (dev) | ||
3888 | node = dev_to_node(dev); | ||
3889 | else | ||
3890 | node = cpu_to_node(boot_cpu_id); | ||
3891 | |||
3892 | desc = irq_to_desc_alloc_node(irq, node); | ||
3893 | if (!desc) { | ||
3894 | printk(KERN_INFO "can not get irq_desc %d\n", irq); | ||
3895 | return 0; | ||
3896 | } | ||
3897 | |||
3898 | pin = irq_attr->ioapic_pin; | ||
3899 | trigger = irq_attr->trigger; | ||
3900 | polarity = irq_attr->polarity; | ||
3901 | |||
3902 | /* | ||
3903 | * IRQs < 16 are already in the irq_2_pin[] map | ||
3904 | */ | ||
3905 | if (irq >= NR_IRQS_LEGACY) { | ||
3906 | cfg = desc->chip_data; | ||
3907 | add_pin_to_irq_node(cfg, node, ioapic, pin); | ||
3908 | } | ||
3909 | |||
3910 | setup_IO_APIC_irq(ioapic, pin, irq, desc, trigger, polarity); | ||
3911 | |||
3912 | return 0; | ||
3913 | } | ||
3914 | |||
3915 | int io_apic_set_pci_routing(struct device *dev, int irq, | ||
3916 | struct io_apic_irq_attr *irq_attr) | ||
3917 | { | ||
3918 | int ioapic, pin; | ||
3919 | /* | ||
3920 | * Avoid pin reprogramming. PRTs typically include entries | ||
3921 | * with redundant pin->gsi mappings (but unique PCI devices); | ||
3922 | * we only program the IOAPIC on the first. | ||
3923 | */ | ||
3924 | ioapic = irq_attr->ioapic; | ||
3925 | pin = irq_attr->ioapic_pin; | ||
3926 | if (test_bit(pin, mp_ioapic_routing[ioapic].pin_programmed)) { | ||
3927 | pr_debug("Pin %d-%d already programmed\n", | ||
3928 | mp_ioapics[ioapic].apicid, pin); | ||
3929 | return 0; | ||
3930 | } | ||
3931 | set_bit(pin, mp_ioapic_routing[ioapic].pin_programmed); | ||
3932 | |||
3933 | return __io_apic_set_pci_routing(dev, irq, irq_attr); | ||
3934 | } | ||
3935 | |||
3903 | /* -------------------------------------------------------------------------- | 3936 | /* -------------------------------------------------------------------------- |
3904 | ACPI-based IOAPIC Configuration | 3937 | ACPI-based IOAPIC Configuration |
3905 | -------------------------------------------------------------------------- */ | 3938 | -------------------------------------------------------------------------- */ |
@@ -3980,6 +4013,7 @@ int __init io_apic_get_unique_id(int ioapic, int apic_id) | |||
3980 | 4013 | ||
3981 | return apic_id; | 4014 | return apic_id; |
3982 | } | 4015 | } |
4016 | #endif | ||
3983 | 4017 | ||
3984 | int __init io_apic_get_version(int ioapic) | 4018 | int __init io_apic_get_version(int ioapic) |
3985 | { | 4019 | { |
@@ -3992,39 +4026,6 @@ int __init io_apic_get_version(int ioapic) | |||
3992 | 4026 | ||
3993 | return reg_01.bits.version; | 4027 | return reg_01.bits.version; |
3994 | } | 4028 | } |
3995 | #endif | ||
3996 | |||
3997 | int io_apic_set_pci_routing (int ioapic, int pin, int irq, int triggering, int polarity) | ||
3998 | { | ||
3999 | struct irq_desc *desc; | ||
4000 | struct irq_cfg *cfg; | ||
4001 | int cpu = boot_cpu_id; | ||
4002 | |||
4003 | if (!IO_APIC_IRQ(irq)) { | ||
4004 | apic_printk(APIC_QUIET,KERN_ERR "IOAPIC[%d]: Invalid reference to IRQ 0\n", | ||
4005 | ioapic); | ||
4006 | return -EINVAL; | ||
4007 | } | ||
4008 | |||
4009 | desc = irq_to_desc_alloc_cpu(irq, cpu); | ||
4010 | if (!desc) { | ||
4011 | printk(KERN_INFO "can not get irq_desc %d\n", irq); | ||
4012 | return 0; | ||
4013 | } | ||
4014 | |||
4015 | /* | ||
4016 | * IRQs < 16 are already in the irq_2_pin[] map | ||
4017 | */ | ||
4018 | if (irq >= NR_IRQS_LEGACY) { | ||
4019 | cfg = desc->chip_data; | ||
4020 | add_pin_to_irq_cpu(cfg, cpu, ioapic, pin); | ||
4021 | } | ||
4022 | |||
4023 | setup_IO_APIC_irq(ioapic, pin, irq, desc, triggering, polarity); | ||
4024 | |||
4025 | return 0; | ||
4026 | } | ||
4027 | |||
4028 | 4029 | ||
4029 | int acpi_get_override_irq(int bus_irq, int *trigger, int *polarity) | 4030 | int acpi_get_override_irq(int bus_irq, int *trigger, int *polarity) |
4030 | { | 4031 | { |
@@ -4055,51 +4056,44 @@ int acpi_get_override_irq(int bus_irq, int *trigger, int *polarity) | |||
4055 | #ifdef CONFIG_SMP | 4056 | #ifdef CONFIG_SMP |
4056 | void __init setup_ioapic_dest(void) | 4057 | void __init setup_ioapic_dest(void) |
4057 | { | 4058 | { |
4058 | int pin, ioapic, irq, irq_entry; | 4059 | int pin, ioapic = 0, irq, irq_entry; |
4059 | struct irq_desc *desc; | 4060 | struct irq_desc *desc; |
4060 | struct irq_cfg *cfg; | ||
4061 | const struct cpumask *mask; | 4061 | const struct cpumask *mask; |
4062 | 4062 | ||
4063 | if (skip_ioapic_setup == 1) | 4063 | if (skip_ioapic_setup == 1) |
4064 | return; | 4064 | return; |
4065 | 4065 | ||
4066 | for (ioapic = 0; ioapic < nr_ioapics; ioapic++) { | 4066 | #ifdef CONFIG_ACPI |
4067 | for (pin = 0; pin < nr_ioapic_registers[ioapic]; pin++) { | 4067 | if (!acpi_disabled && acpi_ioapic) { |
4068 | irq_entry = find_irq_entry(ioapic, pin, mp_INT); | 4068 | ioapic = mp_find_ioapic(0); |
4069 | if (irq_entry == -1) | 4069 | if (ioapic < 0) |
4070 | continue; | 4070 | ioapic = 0; |
4071 | irq = pin_2_irq(irq_entry, ioapic, pin); | 4071 | } |
4072 | 4072 | #endif | |
4073 | /* setup_IO_APIC_irqs could fail to get vector for some device | ||
4074 | * when you have too many devices, because at that time only boot | ||
4075 | * cpu is online. | ||
4076 | */ | ||
4077 | desc = irq_to_desc(irq); | ||
4078 | cfg = desc->chip_data; | ||
4079 | if (!cfg->vector) { | ||
4080 | setup_IO_APIC_irq(ioapic, pin, irq, desc, | ||
4081 | irq_trigger(irq_entry), | ||
4082 | irq_polarity(irq_entry)); | ||
4083 | continue; | ||
4084 | 4073 | ||
4085 | } | 4074 | for (pin = 0; pin < nr_ioapic_registers[ioapic]; pin++) { |
4075 | irq_entry = find_irq_entry(ioapic, pin, mp_INT); | ||
4076 | if (irq_entry == -1) | ||
4077 | continue; | ||
4078 | irq = pin_2_irq(irq_entry, ioapic, pin); | ||
4086 | 4079 | ||
4087 | /* | 4080 | desc = irq_to_desc(irq); |
4088 | * Honour affinities which have been set in early boot | ||
4089 | */ | ||
4090 | if (desc->status & | ||
4091 | (IRQ_NO_BALANCING | IRQ_AFFINITY_SET)) | ||
4092 | mask = desc->affinity; | ||
4093 | else | ||
4094 | mask = apic->target_cpus(); | ||
4095 | 4081 | ||
4096 | if (intr_remapping_enabled) | 4082 | /* |
4097 | set_ir_ioapic_affinity_irq_desc(desc, mask); | 4083 | * Honour affinities which have been set in early boot |
4098 | else | 4084 | */ |
4099 | set_ioapic_affinity_irq_desc(desc, mask); | 4085 | if (desc->status & |
4100 | } | 4086 | (IRQ_NO_BALANCING | IRQ_AFFINITY_SET)) |
4087 | mask = desc->affinity; | ||
4088 | else | ||
4089 | mask = apic->target_cpus(); | ||
4101 | 4090 | ||
4091 | if (intr_remapping_enabled) | ||
4092 | set_ir_ioapic_affinity_irq_desc(desc, mask); | ||
4093 | else | ||
4094 | set_ioapic_affinity_irq_desc(desc, mask); | ||
4102 | } | 4095 | } |
4096 | |||
4103 | } | 4097 | } |
4104 | #endif | 4098 | #endif |
4105 | 4099 | ||
diff --git a/arch/x86/kernel/apic/nmi.c b/arch/x86/kernel/apic/nmi.c index ce4fbfa315a1..a691302dc3ff 100644 --- a/arch/x86/kernel/apic/nmi.c +++ b/arch/x86/kernel/apic/nmi.c | |||
@@ -104,7 +104,7 @@ static __init void nmi_cpu_busy(void *data) | |||
104 | } | 104 | } |
105 | #endif | 105 | #endif |
106 | 106 | ||
107 | static void report_broken_nmi(int cpu, int *prev_nmi_count) | 107 | static void report_broken_nmi(int cpu, unsigned int *prev_nmi_count) |
108 | { | 108 | { |
109 | printk(KERN_CONT "\n"); | 109 | printk(KERN_CONT "\n"); |
110 | 110 | ||
diff --git a/arch/x86/kernel/apic/probe_32.c b/arch/x86/kernel/apic/probe_32.c index 01eda2ac65e4..440a8bccd91a 100644 --- a/arch/x86/kernel/apic/probe_32.c +++ b/arch/x86/kernel/apic/probe_32.c | |||
@@ -160,7 +160,6 @@ extern struct apic apic_summit; | |||
160 | extern struct apic apic_bigsmp; | 160 | extern struct apic apic_bigsmp; |
161 | extern struct apic apic_es7000; | 161 | extern struct apic apic_es7000; |
162 | extern struct apic apic_es7000_cluster; | 162 | extern struct apic apic_es7000_cluster; |
163 | extern struct apic apic_default; | ||
164 | 163 | ||
165 | struct apic *apic = &apic_default; | 164 | struct apic *apic = &apic_default; |
166 | EXPORT_SYMBOL_GPL(apic); | 165 | EXPORT_SYMBOL_GPL(apic); |
diff --git a/arch/x86/kernel/apic/probe_64.c b/arch/x86/kernel/apic/probe_64.c index 1783652bb0e5..bc3e880f9b82 100644 --- a/arch/x86/kernel/apic/probe_64.c +++ b/arch/x86/kernel/apic/probe_64.c | |||
@@ -50,7 +50,7 @@ static struct apic *apic_probe[] __initdata = { | |||
50 | void __init default_setup_apic_routing(void) | 50 | void __init default_setup_apic_routing(void) |
51 | { | 51 | { |
52 | #ifdef CONFIG_X86_X2APIC | 52 | #ifdef CONFIG_X86_X2APIC |
53 | if (x2apic && (apic != &apic_x2apic_phys && | 53 | if (x2apic_mode && (apic != &apic_x2apic_phys && |
54 | #ifdef CONFIG_X86_UV | 54 | #ifdef CONFIG_X86_UV |
55 | apic != &apic_x2apic_uv_x && | 55 | apic != &apic_x2apic_uv_x && |
56 | #endif | 56 | #endif |
diff --git a/arch/x86/kernel/apic/summit_32.c b/arch/x86/kernel/apic/summit_32.c index 9cfe1f415d81..344eee4ac0a4 100644 --- a/arch/x86/kernel/apic/summit_32.c +++ b/arch/x86/kernel/apic/summit_32.c | |||
@@ -173,13 +173,6 @@ static inline int is_WPEG(struct rio_detail *rio){ | |||
173 | rio->type == LookOutAWPEG || rio->type == LookOutBWPEG); | 173 | rio->type == LookOutAWPEG || rio->type == LookOutBWPEG); |
174 | } | 174 | } |
175 | 175 | ||
176 | |||
177 | /* In clustered mode, the high nibble of APIC ID is a cluster number. | ||
178 | * The low nibble is a 4-bit bitmap. */ | ||
179 | #define XAPIC_DEST_CPUS_SHIFT 4 | ||
180 | #define XAPIC_DEST_CPUS_MASK ((1u << XAPIC_DEST_CPUS_SHIFT) - 1) | ||
181 | #define XAPIC_DEST_CLUSTER_MASK (XAPIC_DEST_CPUS_MASK << XAPIC_DEST_CPUS_SHIFT) | ||
182 | |||
183 | #define SUMMIT_APIC_DFR_VALUE (APIC_DFR_CLUSTER) | 176 | #define SUMMIT_APIC_DFR_VALUE (APIC_DFR_CLUSTER) |
184 | 177 | ||
185 | static const struct cpumask *summit_target_cpus(void) | 178 | static const struct cpumask *summit_target_cpus(void) |
diff --git a/arch/x86/kernel/apic/x2apic_cluster.c b/arch/x86/kernel/apic/x2apic_cluster.c index 4a903e2f0d17..8e4cbb255c38 100644 --- a/arch/x86/kernel/apic/x2apic_cluster.c +++ b/arch/x86/kernel/apic/x2apic_cluster.c | |||
@@ -10,7 +10,7 @@ | |||
10 | #include <asm/apic.h> | 10 | #include <asm/apic.h> |
11 | #include <asm/ipi.h> | 11 | #include <asm/ipi.h> |
12 | 12 | ||
13 | DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid); | 13 | static DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid); |
14 | 14 | ||
15 | static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id) | 15 | static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id) |
16 | { | 16 | { |
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c index 2bda69352976..ef0ae207a7c8 100644 --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c | |||
@@ -105,7 +105,7 @@ static void uv_vector_allocation_domain(int cpu, struct cpumask *retmask) | |||
105 | cpumask_set_cpu(cpu, retmask); | 105 | cpumask_set_cpu(cpu, retmask); |
106 | } | 106 | } |
107 | 107 | ||
108 | static int uv_wakeup_secondary(int phys_apicid, unsigned long start_rip) | 108 | static int __cpuinit uv_wakeup_secondary(int phys_apicid, unsigned long start_rip) |
109 | { | 109 | { |
110 | #ifdef CONFIG_SMP | 110 | #ifdef CONFIG_SMP |
111 | unsigned long val; | 111 | unsigned long val; |
@@ -562,7 +562,7 @@ void __init uv_system_init(void) | |||
562 | union uvh_node_id_u node_id; | 562 | union uvh_node_id_u node_id; |
563 | unsigned long gnode_upper, lowmem_redir_base, lowmem_redir_size; | 563 | unsigned long gnode_upper, lowmem_redir_base, lowmem_redir_size; |
564 | int bytes, nid, cpu, lcpu, pnode, blade, i, j, m_val, n_val; | 564 | int bytes, nid, cpu, lcpu, pnode, blade, i, j, m_val, n_val; |
565 | int max_pnode = 0; | 565 | int gnode_extra, max_pnode = 0; |
566 | unsigned long mmr_base, present, paddr; | 566 | unsigned long mmr_base, present, paddr; |
567 | unsigned short pnode_mask; | 567 | unsigned short pnode_mask; |
568 | 568 | ||
@@ -574,6 +574,13 @@ void __init uv_system_init(void) | |||
574 | mmr_base = | 574 | mmr_base = |
575 | uv_read_local_mmr(UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR) & | 575 | uv_read_local_mmr(UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR) & |
576 | ~UV_MMR_ENABLE; | 576 | ~UV_MMR_ENABLE; |
577 | pnode_mask = (1 << n_val) - 1; | ||
578 | node_id.v = uv_read_local_mmr(UVH_NODE_ID); | ||
579 | gnode_extra = (node_id.s.node_id & ~((1 << n_val) - 1)) >> 1; | ||
580 | gnode_upper = ((unsigned long)gnode_extra << m_val); | ||
581 | printk(KERN_DEBUG "UV: N %d, M %d, gnode_upper 0x%lx, gnode_extra 0x%x\n", | ||
582 | n_val, m_val, gnode_upper, gnode_extra); | ||
583 | |||
577 | printk(KERN_DEBUG "UV: global MMR base 0x%lx\n", mmr_base); | 584 | printk(KERN_DEBUG "UV: global MMR base 0x%lx\n", mmr_base); |
578 | 585 | ||
579 | for(i = 0; i < UVH_NODE_PRESENT_TABLE_DEPTH; i++) | 586 | for(i = 0; i < UVH_NODE_PRESENT_TABLE_DEPTH; i++) |
@@ -583,15 +590,18 @@ void __init uv_system_init(void) | |||
583 | 590 | ||
584 | bytes = sizeof(struct uv_blade_info) * uv_num_possible_blades(); | 591 | bytes = sizeof(struct uv_blade_info) * uv_num_possible_blades(); |
585 | uv_blade_info = kmalloc(bytes, GFP_KERNEL); | 592 | uv_blade_info = kmalloc(bytes, GFP_KERNEL); |
593 | BUG_ON(!uv_blade_info); | ||
586 | 594 | ||
587 | get_lowmem_redirect(&lowmem_redir_base, &lowmem_redir_size); | 595 | get_lowmem_redirect(&lowmem_redir_base, &lowmem_redir_size); |
588 | 596 | ||
589 | bytes = sizeof(uv_node_to_blade[0]) * num_possible_nodes(); | 597 | bytes = sizeof(uv_node_to_blade[0]) * num_possible_nodes(); |
590 | uv_node_to_blade = kmalloc(bytes, GFP_KERNEL); | 598 | uv_node_to_blade = kmalloc(bytes, GFP_KERNEL); |
599 | BUG_ON(!uv_node_to_blade); | ||
591 | memset(uv_node_to_blade, 255, bytes); | 600 | memset(uv_node_to_blade, 255, bytes); |
592 | 601 | ||
593 | bytes = sizeof(uv_cpu_to_blade[0]) * num_possible_cpus(); | 602 | bytes = sizeof(uv_cpu_to_blade[0]) * num_possible_cpus(); |
594 | uv_cpu_to_blade = kmalloc(bytes, GFP_KERNEL); | 603 | uv_cpu_to_blade = kmalloc(bytes, GFP_KERNEL); |
604 | BUG_ON(!uv_cpu_to_blade); | ||
595 | memset(uv_cpu_to_blade, 255, bytes); | 605 | memset(uv_cpu_to_blade, 255, bytes); |
596 | 606 | ||
597 | blade = 0; | 607 | blade = 0; |
@@ -607,11 +617,6 @@ void __init uv_system_init(void) | |||
607 | } | 617 | } |
608 | } | 618 | } |
609 | 619 | ||
610 | pnode_mask = (1 << n_val) - 1; | ||
611 | node_id.v = uv_read_local_mmr(UVH_NODE_ID); | ||
612 | gnode_upper = (((unsigned long)node_id.s.node_id) & | ||
613 | ~((1 << n_val) - 1)) << m_val; | ||
614 | |||
615 | uv_bios_init(); | 620 | uv_bios_init(); |
616 | uv_bios_get_sn_info(0, &uv_type, &sn_partition_id, | 621 | uv_bios_get_sn_info(0, &uv_type, &sn_partition_id, |
617 | &sn_coherency_id, &sn_region_size); | 622 | &sn_coherency_id, &sn_region_size); |
@@ -634,6 +639,7 @@ void __init uv_system_init(void) | |||
634 | uv_cpu_hub_info(cpu)->pnode_mask = pnode_mask; | 639 | uv_cpu_hub_info(cpu)->pnode_mask = pnode_mask; |
635 | uv_cpu_hub_info(cpu)->gpa_mask = (1 << (m_val + n_val)) - 1; | 640 | uv_cpu_hub_info(cpu)->gpa_mask = (1 << (m_val + n_val)) - 1; |
636 | uv_cpu_hub_info(cpu)->gnode_upper = gnode_upper; | 641 | uv_cpu_hub_info(cpu)->gnode_upper = gnode_upper; |
642 | uv_cpu_hub_info(cpu)->gnode_extra = gnode_extra; | ||
637 | uv_cpu_hub_info(cpu)->global_mmr_base = mmr_base; | 643 | uv_cpu_hub_info(cpu)->global_mmr_base = mmr_base; |
638 | uv_cpu_hub_info(cpu)->coherency_domain_number = sn_coherency_id; | 644 | uv_cpu_hub_info(cpu)->coherency_domain_number = sn_coherency_id; |
639 | uv_cpu_hub_info(cpu)->scir.offset = SCIR_LOCAL_MMR_BASE + lcpu; | 645 | uv_cpu_hub_info(cpu)->scir.offset = SCIR_LOCAL_MMR_BASE + lcpu; |
diff --git a/arch/x86/kernel/asm-offsets_32.c b/arch/x86/kernel/asm-offsets_32.c index 5a6aa1c1162f..1a830cbd7015 100644 --- a/arch/x86/kernel/asm-offsets_32.c +++ b/arch/x86/kernel/asm-offsets_32.c | |||
@@ -146,4 +146,5 @@ void foo(void) | |||
146 | OFFSET(BP_loadflags, boot_params, hdr.loadflags); | 146 | OFFSET(BP_loadflags, boot_params, hdr.loadflags); |
147 | OFFSET(BP_hardware_subarch, boot_params, hdr.hardware_subarch); | 147 | OFFSET(BP_hardware_subarch, boot_params, hdr.hardware_subarch); |
148 | OFFSET(BP_version, boot_params, hdr.version); | 148 | OFFSET(BP_version, boot_params, hdr.version); |
149 | OFFSET(BP_kernel_alignment, boot_params, hdr.kernel_alignment); | ||
149 | } | 150 | } |
diff --git a/arch/x86/kernel/asm-offsets_64.c b/arch/x86/kernel/asm-offsets_64.c index e72f062fb4b5..898ecc47e129 100644 --- a/arch/x86/kernel/asm-offsets_64.c +++ b/arch/x86/kernel/asm-offsets_64.c | |||
@@ -125,6 +125,7 @@ int main(void) | |||
125 | OFFSET(BP_loadflags, boot_params, hdr.loadflags); | 125 | OFFSET(BP_loadflags, boot_params, hdr.loadflags); |
126 | OFFSET(BP_hardware_subarch, boot_params, hdr.hardware_subarch); | 126 | OFFSET(BP_hardware_subarch, boot_params, hdr.hardware_subarch); |
127 | OFFSET(BP_version, boot_params, hdr.version); | 127 | OFFSET(BP_version, boot_params, hdr.version); |
128 | OFFSET(BP_kernel_alignment, boot_params, hdr.kernel_alignment); | ||
128 | 129 | ||
129 | BLANK(); | 130 | BLANK(); |
130 | DEFINE(PAGE_SIZE_asm, PAGE_SIZE); | 131 | DEFINE(PAGE_SIZE_asm, PAGE_SIZE); |
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index 7e4a459daa64..e5b27d8f1b47 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c | |||
@@ -6,6 +6,7 @@ | |||
6 | #include <asm/processor.h> | 6 | #include <asm/processor.h> |
7 | #include <asm/apic.h> | 7 | #include <asm/apic.h> |
8 | #include <asm/cpu.h> | 8 | #include <asm/cpu.h> |
9 | #include <asm/pci-direct.h> | ||
9 | 10 | ||
10 | #ifdef CONFIG_X86_64 | 11 | #ifdef CONFIG_X86_64 |
11 | # include <asm/numa_64.h> | 12 | # include <asm/numa_64.h> |
@@ -272,7 +273,7 @@ static void __cpuinit srat_detect_node(struct cpuinfo_x86 *c) | |||
272 | #if defined(CONFIG_NUMA) && defined(CONFIG_X86_64) | 273 | #if defined(CONFIG_NUMA) && defined(CONFIG_X86_64) |
273 | int cpu = smp_processor_id(); | 274 | int cpu = smp_processor_id(); |
274 | int node; | 275 | int node; |
275 | unsigned apicid = hard_smp_processor_id(); | 276 | unsigned apicid = cpu_has_apic ? hard_smp_processor_id() : c->apicid; |
276 | 277 | ||
277 | node = c->phys_proc_id; | 278 | node = c->phys_proc_id; |
278 | if (apicid_to_node[apicid] != NUMA_NO_NODE) | 279 | if (apicid_to_node[apicid] != NUMA_NO_NODE) |
@@ -351,6 +352,15 @@ static void __cpuinit early_init_amd(struct cpuinfo_x86 *c) | |||
351 | (c->x86_model == 8 && c->x86_mask >= 8)) | 352 | (c->x86_model == 8 && c->x86_mask >= 8)) |
352 | set_cpu_cap(c, X86_FEATURE_K6_MTRR); | 353 | set_cpu_cap(c, X86_FEATURE_K6_MTRR); |
353 | #endif | 354 | #endif |
355 | #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_PCI) | ||
356 | /* check CPU config space for extended APIC ID */ | ||
357 | if (c->x86 >= 0xf) { | ||
358 | unsigned int val; | ||
359 | val = read_pci_config(0, 24, 0, 0x68); | ||
360 | if ((val & ((1 << 17) | (1 << 18))) == ((1 << 17) | (1 << 18))) | ||
361 | set_cpu_cap(c, X86_FEATURE_EXTD_APICID); | ||
362 | } | ||
363 | #endif | ||
354 | } | 364 | } |
355 | 365 | ||
356 | static void __cpuinit init_amd(struct cpuinfo_x86 *c) | 366 | static void __cpuinit init_amd(struct cpuinfo_x86 *c) |
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index f60409081cb0..3ffdcfa9abdf 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c | |||
@@ -300,7 +300,8 @@ static const char *__cpuinit table_lookup_model(struct cpuinfo_x86 *c) | |||
300 | return NULL; /* Not found */ | 300 | return NULL; /* Not found */ |
301 | } | 301 | } |
302 | 302 | ||
303 | __u32 cleared_cpu_caps[NCAPINTS] __cpuinitdata; | 303 | __u32 cpu_caps_cleared[NCAPINTS] __cpuinitdata; |
304 | __u32 cpu_caps_set[NCAPINTS] __cpuinitdata; | ||
304 | 305 | ||
305 | void load_percpu_segment(int cpu) | 306 | void load_percpu_segment(int cpu) |
306 | { | 307 | { |
@@ -769,6 +770,12 @@ static void __cpuinit identify_cpu(struct cpuinfo_x86 *c) | |||
769 | if (this_cpu->c_identify) | 770 | if (this_cpu->c_identify) |
770 | this_cpu->c_identify(c); | 771 | this_cpu->c_identify(c); |
771 | 772 | ||
773 | /* Clear/Set all flags overriden by options, after probe */ | ||
774 | for (i = 0; i < NCAPINTS; i++) { | ||
775 | c->x86_capability[i] &= ~cpu_caps_cleared[i]; | ||
776 | c->x86_capability[i] |= cpu_caps_set[i]; | ||
777 | } | ||
778 | |||
772 | #ifdef CONFIG_X86_64 | 779 | #ifdef CONFIG_X86_64 |
773 | c->apicid = apic->phys_pkg_id(c->initial_apicid, 0); | 780 | c->apicid = apic->phys_pkg_id(c->initial_apicid, 0); |
774 | #endif | 781 | #endif |
@@ -814,6 +821,16 @@ static void __cpuinit identify_cpu(struct cpuinfo_x86 *c) | |||
814 | #endif | 821 | #endif |
815 | 822 | ||
816 | init_hypervisor(c); | 823 | init_hypervisor(c); |
824 | |||
825 | /* | ||
826 | * Clear/Set all flags overriden by options, need do it | ||
827 | * before following smp all cpus cap AND. | ||
828 | */ | ||
829 | for (i = 0; i < NCAPINTS; i++) { | ||
830 | c->x86_capability[i] &= ~cpu_caps_cleared[i]; | ||
831 | c->x86_capability[i] |= cpu_caps_set[i]; | ||
832 | } | ||
833 | |||
817 | /* | 834 | /* |
818 | * On SMP, boot_cpu_data holds the common feature set between | 835 | * On SMP, boot_cpu_data holds the common feature set between |
819 | * all CPUs; so make sure that we indicate which features are | 836 | * all CPUs; so make sure that we indicate which features are |
@@ -826,10 +843,6 @@ static void __cpuinit identify_cpu(struct cpuinfo_x86 *c) | |||
826 | boot_cpu_data.x86_capability[i] &= c->x86_capability[i]; | 843 | boot_cpu_data.x86_capability[i] &= c->x86_capability[i]; |
827 | } | 844 | } |
828 | 845 | ||
829 | /* Clear all flags overriden by options */ | ||
830 | for (i = 0; i < NCAPINTS; i++) | ||
831 | c->x86_capability[i] &= ~cleared_cpu_caps[i]; | ||
832 | |||
833 | #ifdef CONFIG_X86_MCE | 846 | #ifdef CONFIG_X86_MCE |
834 | /* Init Machine Check Exception if available. */ | 847 | /* Init Machine Check Exception if available. */ |
835 | mcheck_init(c); | 848 | mcheck_init(c); |
diff --git a/arch/x86/kernel/cpu/cpu_debug.c b/arch/x86/kernel/cpu/cpu_debug.c index 46e29ab96c6a..6b2a52dd0403 100644 --- a/arch/x86/kernel/cpu/cpu_debug.c +++ b/arch/x86/kernel/cpu/cpu_debug.c | |||
@@ -32,9 +32,7 @@ | |||
32 | 32 | ||
33 | static DEFINE_PER_CPU(struct cpu_cpuX_base, cpu_arr[CPU_REG_ALL_BIT]); | 33 | static DEFINE_PER_CPU(struct cpu_cpuX_base, cpu_arr[CPU_REG_ALL_BIT]); |
34 | static DEFINE_PER_CPU(struct cpu_private *, priv_arr[MAX_CPU_FILES]); | 34 | static DEFINE_PER_CPU(struct cpu_private *, priv_arr[MAX_CPU_FILES]); |
35 | static DEFINE_PER_CPU(unsigned, cpu_modelflag); | ||
36 | static DEFINE_PER_CPU(int, cpu_priv_count); | 35 | static DEFINE_PER_CPU(int, cpu_priv_count); |
37 | static DEFINE_PER_CPU(unsigned, cpu_model); | ||
38 | 36 | ||
39 | static DEFINE_MUTEX(cpu_debug_lock); | 37 | static DEFINE_MUTEX(cpu_debug_lock); |
40 | 38 | ||
@@ -80,302 +78,102 @@ static struct cpu_file_base cpu_file[] = { | |||
80 | { "value", CPU_REG_ALL, 1 }, | 78 | { "value", CPU_REG_ALL, 1 }, |
81 | }; | 79 | }; |
82 | 80 | ||
83 | /* Intel Registers Range */ | 81 | /* CPU Registers Range */ |
84 | static struct cpu_debug_range cpu_intel_range[] = { | 82 | static struct cpu_debug_range cpu_reg_range[] = { |
85 | { 0x00000000, 0x00000001, CPU_MC, CPU_INTEL_ALL }, | 83 | { 0x00000000, 0x00000001, CPU_MC, }, |
86 | { 0x00000006, 0x00000007, CPU_MONITOR, CPU_CX_AT_XE }, | 84 | { 0x00000006, 0x00000007, CPU_MONITOR, }, |
87 | { 0x00000010, 0x00000010, CPU_TIME, CPU_INTEL_ALL }, | 85 | { 0x00000010, 0x00000010, CPU_TIME, }, |
88 | { 0x00000011, 0x00000013, CPU_PMC, CPU_INTEL_PENTIUM }, | 86 | { 0x00000011, 0x00000013, CPU_PMC, }, |
89 | { 0x00000017, 0x00000017, CPU_PLATFORM, CPU_PX_CX_AT_XE }, | 87 | { 0x00000017, 0x00000017, CPU_PLATFORM, }, |
90 | { 0x0000001B, 0x0000001B, CPU_APIC, CPU_P6_CX_AT_XE }, | 88 | { 0x0000001B, 0x0000001B, CPU_APIC, }, |
91 | 89 | { 0x0000002A, 0x0000002B, CPU_POWERON, }, | |
92 | { 0x0000002A, 0x0000002A, CPU_POWERON, CPU_PX_CX_AT_XE }, | 90 | { 0x0000002C, 0x0000002C, CPU_FREQ, }, |
93 | { 0x0000002B, 0x0000002B, CPU_POWERON, CPU_INTEL_XEON }, | 91 | { 0x0000003A, 0x0000003A, CPU_CONTROL, }, |
94 | { 0x0000002C, 0x0000002C, CPU_FREQ, CPU_INTEL_XEON }, | 92 | { 0x00000040, 0x00000047, CPU_LBRANCH, }, |
95 | { 0x0000003A, 0x0000003A, CPU_CONTROL, CPU_CX_AT_XE }, | 93 | { 0x00000060, 0x00000067, CPU_LBRANCH, }, |
96 | 94 | { 0x00000079, 0x00000079, CPU_BIOS, }, | |
97 | { 0x00000040, 0x00000043, CPU_LBRANCH, CPU_PM_CX_AT_XE }, | 95 | { 0x00000088, 0x0000008A, CPU_CACHE, }, |
98 | { 0x00000044, 0x00000047, CPU_LBRANCH, CPU_PM_CO_AT }, | 96 | { 0x0000008B, 0x0000008B, CPU_BIOS, }, |
99 | { 0x00000060, 0x00000063, CPU_LBRANCH, CPU_C2_AT }, | 97 | { 0x0000009B, 0x0000009B, CPU_MONITOR, }, |
100 | { 0x00000064, 0x00000067, CPU_LBRANCH, CPU_INTEL_ATOM }, | 98 | { 0x000000C1, 0x000000C4, CPU_PMC, }, |
101 | 99 | { 0x000000CD, 0x000000CD, CPU_FREQ, }, | |
102 | { 0x00000079, 0x00000079, CPU_BIOS, CPU_P6_CX_AT_XE }, | 100 | { 0x000000E7, 0x000000E8, CPU_PERF, }, |
103 | { 0x00000088, 0x0000008A, CPU_CACHE, CPU_INTEL_P6 }, | 101 | { 0x000000FE, 0x000000FE, CPU_MTRR, }, |
104 | { 0x0000008B, 0x0000008B, CPU_BIOS, CPU_P6_CX_AT_XE }, | 102 | |
105 | { 0x0000009B, 0x0000009B, CPU_MONITOR, CPU_INTEL_XEON }, | 103 | { 0x00000116, 0x0000011E, CPU_CACHE, }, |
106 | 104 | { 0x00000174, 0x00000176, CPU_SYSENTER, }, | |
107 | { 0x000000C1, 0x000000C2, CPU_PMC, CPU_P6_CX_AT }, | 105 | { 0x00000179, 0x0000017B, CPU_MC, }, |
108 | { 0x000000CD, 0x000000CD, CPU_FREQ, CPU_CX_AT }, | 106 | { 0x00000186, 0x00000189, CPU_PMC, }, |
109 | { 0x000000E7, 0x000000E8, CPU_PERF, CPU_CX_AT }, | 107 | { 0x00000198, 0x00000199, CPU_PERF, }, |
110 | { 0x000000FE, 0x000000FE, CPU_MTRR, CPU_P6_CX_XE }, | 108 | { 0x0000019A, 0x0000019A, CPU_TIME, }, |
111 | 109 | { 0x0000019B, 0x0000019D, CPU_THERM, }, | |
112 | { 0x00000116, 0x00000116, CPU_CACHE, CPU_INTEL_P6 }, | 110 | { 0x000001A0, 0x000001A0, CPU_MISC, }, |
113 | { 0x00000118, 0x00000118, CPU_CACHE, CPU_INTEL_P6 }, | 111 | { 0x000001C9, 0x000001C9, CPU_LBRANCH, }, |
114 | { 0x00000119, 0x00000119, CPU_CACHE, CPU_INTEL_PX }, | 112 | { 0x000001D7, 0x000001D8, CPU_LBRANCH, }, |
115 | { 0x0000011A, 0x0000011B, CPU_CACHE, CPU_INTEL_P6 }, | 113 | { 0x000001D9, 0x000001D9, CPU_DEBUG, }, |
116 | { 0x0000011E, 0x0000011E, CPU_CACHE, CPU_PX_CX_AT }, | 114 | { 0x000001DA, 0x000001E0, CPU_LBRANCH, }, |
117 | 115 | ||
118 | { 0x00000174, 0x00000176, CPU_SYSENTER, CPU_P6_CX_AT_XE }, | 116 | { 0x00000200, 0x0000020F, CPU_MTRR, }, |
119 | { 0x00000179, 0x0000017A, CPU_MC, CPU_PX_CX_AT_XE }, | 117 | { 0x00000250, 0x00000250, CPU_MTRR, }, |
120 | { 0x0000017B, 0x0000017B, CPU_MC, CPU_P6_XE }, | 118 | { 0x00000258, 0x00000259, CPU_MTRR, }, |
121 | { 0x00000186, 0x00000187, CPU_PMC, CPU_P6_CX_AT }, | 119 | { 0x00000268, 0x0000026F, CPU_MTRR, }, |
122 | { 0x00000198, 0x00000199, CPU_PERF, CPU_PM_CX_AT_XE }, | 120 | { 0x00000277, 0x00000277, CPU_PAT, }, |
123 | { 0x0000019A, 0x0000019A, CPU_TIME, CPU_PM_CX_AT_XE }, | 121 | { 0x000002FF, 0x000002FF, CPU_MTRR, }, |
124 | { 0x0000019B, 0x0000019D, CPU_THERM, CPU_PM_CX_AT_XE }, | 122 | |
125 | { 0x000001A0, 0x000001A0, CPU_MISC, CPU_PM_CX_AT_XE }, | 123 | { 0x00000300, 0x00000311, CPU_PMC, }, |
126 | 124 | { 0x00000345, 0x00000345, CPU_PMC, }, | |
127 | { 0x000001C9, 0x000001C9, CPU_LBRANCH, CPU_PM_CX_AT }, | 125 | { 0x00000360, 0x00000371, CPU_PMC, }, |
128 | { 0x000001D7, 0x000001D8, CPU_LBRANCH, CPU_INTEL_XEON }, | 126 | { 0x0000038D, 0x00000390, CPU_PMC, }, |
129 | { 0x000001D9, 0x000001D9, CPU_DEBUG, CPU_CX_AT_XE }, | 127 | { 0x000003A0, 0x000003BE, CPU_PMC, }, |
130 | { 0x000001DA, 0x000001DA, CPU_LBRANCH, CPU_INTEL_XEON }, | 128 | { 0x000003C0, 0x000003CD, CPU_PMC, }, |
131 | { 0x000001DB, 0x000001DB, CPU_LBRANCH, CPU_P6_XE }, | 129 | { 0x000003E0, 0x000003E1, CPU_PMC, }, |
132 | { 0x000001DC, 0x000001DC, CPU_LBRANCH, CPU_INTEL_P6 }, | 130 | { 0x000003F0, 0x000003F2, CPU_PMC, }, |
133 | { 0x000001DD, 0x000001DE, CPU_LBRANCH, CPU_PX_CX_AT_XE }, | 131 | |
134 | { 0x000001E0, 0x000001E0, CPU_LBRANCH, CPU_INTEL_P6 }, | 132 | { 0x00000400, 0x00000417, CPU_MC, }, |
135 | 133 | { 0x00000480, 0x0000048B, CPU_VMX, }, | |
136 | { 0x00000200, 0x0000020F, CPU_MTRR, CPU_P6_CX_XE }, | 134 | |
137 | { 0x00000250, 0x00000250, CPU_MTRR, CPU_P6_CX_XE }, | 135 | { 0x00000600, 0x00000600, CPU_DEBUG, }, |
138 | { 0x00000258, 0x00000259, CPU_MTRR, CPU_P6_CX_XE }, | 136 | { 0x00000680, 0x0000068F, CPU_LBRANCH, }, |
139 | { 0x00000268, 0x0000026F, CPU_MTRR, CPU_P6_CX_XE }, | 137 | { 0x000006C0, 0x000006CF, CPU_LBRANCH, }, |
140 | { 0x00000277, 0x00000277, CPU_PAT, CPU_C2_AT_XE }, | 138 | |
141 | { 0x000002FF, 0x000002FF, CPU_MTRR, CPU_P6_CX_XE }, | 139 | { 0x000107CC, 0x000107D3, CPU_PMC, }, |
142 | 140 | ||
143 | { 0x00000300, 0x00000308, CPU_PMC, CPU_INTEL_XEON }, | 141 | { 0xC0000080, 0xC0000080, CPU_FEATURES, }, |
144 | { 0x00000309, 0x0000030B, CPU_PMC, CPU_C2_AT_XE }, | 142 | { 0xC0000081, 0xC0000084, CPU_CALL, }, |
145 | { 0x0000030C, 0x00000311, CPU_PMC, CPU_INTEL_XEON }, | 143 | { 0xC0000100, 0xC0000102, CPU_BASE, }, |
146 | { 0x00000345, 0x00000345, CPU_PMC, CPU_C2_AT }, | 144 | { 0xC0000103, 0xC0000103, CPU_TIME, }, |
147 | { 0x00000360, 0x00000371, CPU_PMC, CPU_INTEL_XEON }, | 145 | |
148 | { 0x0000038D, 0x00000390, CPU_PMC, CPU_C2_AT }, | 146 | { 0xC0010000, 0xC0010007, CPU_PMC, }, |
149 | { 0x000003A0, 0x000003BE, CPU_PMC, CPU_INTEL_XEON }, | 147 | { 0xC0010010, 0xC0010010, CPU_CONF, }, |
150 | { 0x000003C0, 0x000003CD, CPU_PMC, CPU_INTEL_XEON }, | 148 | { 0xC0010015, 0xC0010015, CPU_CONF, }, |
151 | { 0x000003E0, 0x000003E1, CPU_PMC, CPU_INTEL_XEON }, | 149 | { 0xC0010016, 0xC001001A, CPU_MTRR, }, |
152 | { 0x000003F0, 0x000003F0, CPU_PMC, CPU_INTEL_XEON }, | 150 | { 0xC001001D, 0xC001001D, CPU_MTRR, }, |
153 | { 0x000003F1, 0x000003F1, CPU_PMC, CPU_C2_AT_XE }, | 151 | { 0xC001001F, 0xC001001F, CPU_CONF, }, |
154 | { 0x000003F2, 0x000003F2, CPU_PMC, CPU_INTEL_XEON }, | 152 | { 0xC0010030, 0xC0010035, CPU_BIOS, }, |
155 | 153 | { 0xC0010044, 0xC0010048, CPU_MC, }, | |
156 | { 0x00000400, 0x00000402, CPU_MC, CPU_PM_CX_AT_XE }, | 154 | { 0xC0010050, 0xC0010056, CPU_SMM, }, |
157 | { 0x00000403, 0x00000403, CPU_MC, CPU_INTEL_XEON }, | 155 | { 0xC0010058, 0xC0010058, CPU_CONF, }, |
158 | { 0x00000404, 0x00000406, CPU_MC, CPU_PM_CX_AT_XE }, | 156 | { 0xC0010060, 0xC0010060, CPU_CACHE, }, |
159 | { 0x00000407, 0x00000407, CPU_MC, CPU_INTEL_XEON }, | 157 | { 0xC0010061, 0xC0010068, CPU_SMM, }, |
160 | { 0x00000408, 0x0000040A, CPU_MC, CPU_PM_CX_AT_XE }, | 158 | { 0xC0010069, 0xC001006B, CPU_SMM, }, |
161 | { 0x0000040B, 0x0000040B, CPU_MC, CPU_INTEL_XEON }, | 159 | { 0xC0010070, 0xC0010071, CPU_SMM, }, |
162 | { 0x0000040C, 0x0000040E, CPU_MC, CPU_PM_CX_XE }, | 160 | { 0xC0010111, 0xC0010113, CPU_SMM, }, |
163 | { 0x0000040F, 0x0000040F, CPU_MC, CPU_INTEL_XEON }, | 161 | { 0xC0010114, 0xC0010118, CPU_SVM, }, |
164 | { 0x00000410, 0x00000412, CPU_MC, CPU_PM_CX_AT_XE }, | 162 | { 0xC0010140, 0xC0010141, CPU_OSVM, }, |
165 | { 0x00000413, 0x00000417, CPU_MC, CPU_CX_AT_XE }, | 163 | { 0xC0011022, 0xC0011023, CPU_CONF, }, |
166 | { 0x00000480, 0x0000048B, CPU_VMX, CPU_CX_AT_XE }, | ||
167 | |||
168 | { 0x00000600, 0x00000600, CPU_DEBUG, CPU_PM_CX_AT_XE }, | ||
169 | { 0x00000680, 0x0000068F, CPU_LBRANCH, CPU_INTEL_XEON }, | ||
170 | { 0x000006C0, 0x000006CF, CPU_LBRANCH, CPU_INTEL_XEON }, | ||
171 | |||
172 | { 0x000107CC, 0x000107D3, CPU_PMC, CPU_INTEL_XEON_MP }, | ||
173 | |||
174 | { 0xC0000080, 0xC0000080, CPU_FEATURES, CPU_INTEL_XEON }, | ||
175 | { 0xC0000081, 0xC0000082, CPU_CALL, CPU_INTEL_XEON }, | ||
176 | { 0xC0000084, 0xC0000084, CPU_CALL, CPU_INTEL_XEON }, | ||
177 | { 0xC0000100, 0xC0000102, CPU_BASE, CPU_INTEL_XEON }, | ||
178 | }; | 164 | }; |
179 | 165 | ||
180 | /* AMD Registers Range */ | ||
181 | static struct cpu_debug_range cpu_amd_range[] = { | ||
182 | { 0x00000000, 0x00000001, CPU_MC, CPU_K10_PLUS, }, | ||
183 | { 0x00000010, 0x00000010, CPU_TIME, CPU_K8_PLUS, }, | ||
184 | { 0x0000001B, 0x0000001B, CPU_APIC, CPU_K8_PLUS, }, | ||
185 | { 0x0000002A, 0x0000002A, CPU_POWERON, CPU_K7_PLUS }, | ||
186 | { 0x0000008B, 0x0000008B, CPU_VER, CPU_K8_PLUS }, | ||
187 | { 0x000000FE, 0x000000FE, CPU_MTRR, CPU_K8_PLUS, }, | ||
188 | |||
189 | { 0x00000174, 0x00000176, CPU_SYSENTER, CPU_K8_PLUS, }, | ||
190 | { 0x00000179, 0x0000017B, CPU_MC, CPU_K8_PLUS, }, | ||
191 | { 0x000001D9, 0x000001D9, CPU_DEBUG, CPU_K8_PLUS, }, | ||
192 | { 0x000001DB, 0x000001DE, CPU_LBRANCH, CPU_K8_PLUS, }, | ||
193 | |||
194 | { 0x00000200, 0x0000020F, CPU_MTRR, CPU_K8_PLUS, }, | ||
195 | { 0x00000250, 0x00000250, CPU_MTRR, CPU_K8_PLUS, }, | ||
196 | { 0x00000258, 0x00000259, CPU_MTRR, CPU_K8_PLUS, }, | ||
197 | { 0x00000268, 0x0000026F, CPU_MTRR, CPU_K8_PLUS, }, | ||
198 | { 0x00000277, 0x00000277, CPU_PAT, CPU_K8_PLUS, }, | ||
199 | { 0x000002FF, 0x000002FF, CPU_MTRR, CPU_K8_PLUS, }, | ||
200 | |||
201 | { 0x00000400, 0x00000413, CPU_MC, CPU_K8_PLUS, }, | ||
202 | |||
203 | { 0xC0000080, 0xC0000080, CPU_FEATURES, CPU_AMD_ALL, }, | ||
204 | { 0xC0000081, 0xC0000084, CPU_CALL, CPU_K8_PLUS, }, | ||
205 | { 0xC0000100, 0xC0000102, CPU_BASE, CPU_K8_PLUS, }, | ||
206 | { 0xC0000103, 0xC0000103, CPU_TIME, CPU_K10_PLUS, }, | ||
207 | |||
208 | { 0xC0010000, 0xC0010007, CPU_PMC, CPU_K8_PLUS, }, | ||
209 | { 0xC0010010, 0xC0010010, CPU_CONF, CPU_K7_PLUS, }, | ||
210 | { 0xC0010015, 0xC0010015, CPU_CONF, CPU_K7_PLUS, }, | ||
211 | { 0xC0010016, 0xC001001A, CPU_MTRR, CPU_K8_PLUS, }, | ||
212 | { 0xC001001D, 0xC001001D, CPU_MTRR, CPU_K8_PLUS, }, | ||
213 | { 0xC001001F, 0xC001001F, CPU_CONF, CPU_K8_PLUS, }, | ||
214 | { 0xC0010030, 0xC0010035, CPU_BIOS, CPU_K8_PLUS, }, | ||
215 | { 0xC0010044, 0xC0010048, CPU_MC, CPU_K8_PLUS, }, | ||
216 | { 0xC0010050, 0xC0010056, CPU_SMM, CPU_K0F_PLUS, }, | ||
217 | { 0xC0010058, 0xC0010058, CPU_CONF, CPU_K10_PLUS, }, | ||
218 | { 0xC0010060, 0xC0010060, CPU_CACHE, CPU_AMD_11, }, | ||
219 | { 0xC0010061, 0xC0010068, CPU_SMM, CPU_K10_PLUS, }, | ||
220 | { 0xC0010069, 0xC001006B, CPU_SMM, CPU_AMD_11, }, | ||
221 | { 0xC0010070, 0xC0010071, CPU_SMM, CPU_K10_PLUS, }, | ||
222 | { 0xC0010111, 0xC0010113, CPU_SMM, CPU_K8_PLUS, }, | ||
223 | { 0xC0010114, 0xC0010118, CPU_SVM, CPU_K10_PLUS, }, | ||
224 | { 0xC0010140, 0xC0010141, CPU_OSVM, CPU_K10_PLUS, }, | ||
225 | { 0xC0011022, 0xC0011023, CPU_CONF, CPU_K10_PLUS, }, | ||
226 | }; | ||
227 | |||
228 | |||
229 | /* Intel */ | ||
230 | static int get_intel_modelflag(unsigned model) | ||
231 | { | ||
232 | int flag; | ||
233 | |||
234 | switch (model) { | ||
235 | case 0x0501: | ||
236 | case 0x0502: | ||
237 | case 0x0504: | ||
238 | flag = CPU_INTEL_PENTIUM; | ||
239 | break; | ||
240 | case 0x0601: | ||
241 | case 0x0603: | ||
242 | case 0x0605: | ||
243 | case 0x0607: | ||
244 | case 0x0608: | ||
245 | case 0x060A: | ||
246 | case 0x060B: | ||
247 | flag = CPU_INTEL_P6; | ||
248 | break; | ||
249 | case 0x0609: | ||
250 | case 0x060D: | ||
251 | flag = CPU_INTEL_PENTIUM_M; | ||
252 | break; | ||
253 | case 0x060E: | ||
254 | flag = CPU_INTEL_CORE; | ||
255 | break; | ||
256 | case 0x060F: | ||
257 | case 0x0617: | ||
258 | flag = CPU_INTEL_CORE2; | ||
259 | break; | ||
260 | case 0x061C: | ||
261 | flag = CPU_INTEL_ATOM; | ||
262 | break; | ||
263 | case 0x0F00: | ||
264 | case 0x0F01: | ||
265 | case 0x0F02: | ||
266 | case 0x0F03: | ||
267 | case 0x0F04: | ||
268 | flag = CPU_INTEL_XEON_P4; | ||
269 | break; | ||
270 | case 0x0F06: | ||
271 | flag = CPU_INTEL_XEON_MP; | ||
272 | break; | ||
273 | default: | ||
274 | flag = CPU_NONE; | ||
275 | break; | ||
276 | } | ||
277 | |||
278 | return flag; | ||
279 | } | ||
280 | |||
281 | /* AMD */ | ||
282 | static int get_amd_modelflag(unsigned model) | ||
283 | { | ||
284 | int flag; | ||
285 | |||
286 | switch (model >> 8) { | ||
287 | case 0x6: | ||
288 | flag = CPU_AMD_K6; | ||
289 | break; | ||
290 | case 0x7: | ||
291 | flag = CPU_AMD_K7; | ||
292 | break; | ||
293 | case 0x8: | ||
294 | flag = CPU_AMD_K8; | ||
295 | break; | ||
296 | case 0xf: | ||
297 | flag = CPU_AMD_0F; | ||
298 | break; | ||
299 | case 0x10: | ||
300 | flag = CPU_AMD_10; | ||
301 | break; | ||
302 | case 0x11: | ||
303 | flag = CPU_AMD_11; | ||
304 | break; | ||
305 | default: | ||
306 | flag = CPU_NONE; | ||
307 | break; | ||
308 | } | ||
309 | |||
310 | return flag; | ||
311 | } | ||
312 | |||
313 | static int get_cpu_modelflag(unsigned cpu) | ||
314 | { | ||
315 | int flag; | ||
316 | |||
317 | flag = per_cpu(cpu_model, cpu); | ||
318 | |||
319 | switch (flag >> 16) { | ||
320 | case X86_VENDOR_INTEL: | ||
321 | flag = get_intel_modelflag(flag); | ||
322 | break; | ||
323 | case X86_VENDOR_AMD: | ||
324 | flag = get_amd_modelflag(flag & 0xffff); | ||
325 | break; | ||
326 | default: | ||
327 | flag = CPU_NONE; | ||
328 | break; | ||
329 | } | ||
330 | |||
331 | return flag; | ||
332 | } | ||
333 | |||
334 | static int get_cpu_range_count(unsigned cpu) | ||
335 | { | ||
336 | int index; | ||
337 | |||
338 | switch (per_cpu(cpu_model, cpu) >> 16) { | ||
339 | case X86_VENDOR_INTEL: | ||
340 | index = ARRAY_SIZE(cpu_intel_range); | ||
341 | break; | ||
342 | case X86_VENDOR_AMD: | ||
343 | index = ARRAY_SIZE(cpu_amd_range); | ||
344 | break; | ||
345 | default: | ||
346 | index = 0; | ||
347 | break; | ||
348 | } | ||
349 | |||
350 | return index; | ||
351 | } | ||
352 | |||
353 | static int is_typeflag_valid(unsigned cpu, unsigned flag) | 166 | static int is_typeflag_valid(unsigned cpu, unsigned flag) |
354 | { | 167 | { |
355 | unsigned vendor, modelflag; | 168 | int i; |
356 | int i, index; | ||
357 | 169 | ||
358 | /* Standard Registers should be always valid */ | 170 | /* Standard Registers should be always valid */ |
359 | if (flag >= CPU_TSS) | 171 | if (flag >= CPU_TSS) |
360 | return 1; | 172 | return 1; |
361 | 173 | ||
362 | modelflag = per_cpu(cpu_modelflag, cpu); | 174 | for (i = 0; i < ARRAY_SIZE(cpu_reg_range); i++) { |
363 | vendor = per_cpu(cpu_model, cpu) >> 16; | 175 | if (cpu_reg_range[i].flag == flag) |
364 | index = get_cpu_range_count(cpu); | 176 | return 1; |
365 | |||
366 | for (i = 0; i < index; i++) { | ||
367 | switch (vendor) { | ||
368 | case X86_VENDOR_INTEL: | ||
369 | if ((cpu_intel_range[i].model & modelflag) && | ||
370 | (cpu_intel_range[i].flag & flag)) | ||
371 | return 1; | ||
372 | break; | ||
373 | case X86_VENDOR_AMD: | ||
374 | if ((cpu_amd_range[i].model & modelflag) && | ||
375 | (cpu_amd_range[i].flag & flag)) | ||
376 | return 1; | ||
377 | break; | ||
378 | } | ||
379 | } | 177 | } |
380 | 178 | ||
381 | /* Invalid */ | 179 | /* Invalid */ |
@@ -385,26 +183,11 @@ static int is_typeflag_valid(unsigned cpu, unsigned flag) | |||
385 | static unsigned get_cpu_range(unsigned cpu, unsigned *min, unsigned *max, | 183 | static unsigned get_cpu_range(unsigned cpu, unsigned *min, unsigned *max, |
386 | int index, unsigned flag) | 184 | int index, unsigned flag) |
387 | { | 185 | { |
388 | unsigned modelflag; | 186 | if (cpu_reg_range[index].flag == flag) { |
389 | 187 | *min = cpu_reg_range[index].min; | |
390 | modelflag = per_cpu(cpu_modelflag, cpu); | 188 | *max = cpu_reg_range[index].max; |
391 | *max = 0; | 189 | } else |
392 | switch (per_cpu(cpu_model, cpu) >> 16) { | 190 | *max = 0; |
393 | case X86_VENDOR_INTEL: | ||
394 | if ((cpu_intel_range[index].model & modelflag) && | ||
395 | (cpu_intel_range[index].flag & flag)) { | ||
396 | *min = cpu_intel_range[index].min; | ||
397 | *max = cpu_intel_range[index].max; | ||
398 | } | ||
399 | break; | ||
400 | case X86_VENDOR_AMD: | ||
401 | if ((cpu_amd_range[index].model & modelflag) && | ||
402 | (cpu_amd_range[index].flag & flag)) { | ||
403 | *min = cpu_amd_range[index].min; | ||
404 | *max = cpu_amd_range[index].max; | ||
405 | } | ||
406 | break; | ||
407 | } | ||
408 | 191 | ||
409 | return *max; | 192 | return *max; |
410 | } | 193 | } |
@@ -434,7 +217,7 @@ static void print_msr(struct seq_file *seq, unsigned cpu, unsigned flag) | |||
434 | unsigned msr, msr_min, msr_max; | 217 | unsigned msr, msr_min, msr_max; |
435 | struct cpu_private *priv; | 218 | struct cpu_private *priv; |
436 | u32 low, high; | 219 | u32 low, high; |
437 | int i, range; | 220 | int i; |
438 | 221 | ||
439 | if (seq) { | 222 | if (seq) { |
440 | priv = seq->private; | 223 | priv = seq->private; |
@@ -446,9 +229,7 @@ static void print_msr(struct seq_file *seq, unsigned cpu, unsigned flag) | |||
446 | } | 229 | } |
447 | } | 230 | } |
448 | 231 | ||
449 | range = get_cpu_range_count(cpu); | 232 | for (i = 0; i < ARRAY_SIZE(cpu_reg_range); i++) { |
450 | |||
451 | for (i = 0; i < range; i++) { | ||
452 | if (!get_cpu_range(cpu, &msr_min, &msr_max, i, flag)) | 233 | if (!get_cpu_range(cpu, &msr_min, &msr_max, i, flag)) |
453 | continue; | 234 | continue; |
454 | 235 | ||
@@ -588,8 +369,20 @@ static void print_apic(void *arg) | |||
588 | seq_printf(seq, " TMICT\t\t: %08x\n", apic_read(APIC_TMICT)); | 369 | seq_printf(seq, " TMICT\t\t: %08x\n", apic_read(APIC_TMICT)); |
589 | seq_printf(seq, " TMCCT\t\t: %08x\n", apic_read(APIC_TMCCT)); | 370 | seq_printf(seq, " TMCCT\t\t: %08x\n", apic_read(APIC_TMCCT)); |
590 | seq_printf(seq, " TDCR\t\t: %08x\n", apic_read(APIC_TDCR)); | 371 | seq_printf(seq, " TDCR\t\t: %08x\n", apic_read(APIC_TDCR)); |
591 | #endif /* CONFIG_X86_LOCAL_APIC */ | 372 | if (boot_cpu_has(X86_FEATURE_EXTAPIC)) { |
373 | unsigned int i, v, maxeilvt; | ||
374 | |||
375 | v = apic_read(APIC_EFEAT); | ||
376 | maxeilvt = (v >> 16) & 0xff; | ||
377 | seq_printf(seq, " EFEAT\t\t: %08x\n", v); | ||
378 | seq_printf(seq, " ECTRL\t\t: %08x\n", apic_read(APIC_ECTRL)); | ||
592 | 379 | ||
380 | for (i = 0; i < maxeilvt; i++) { | ||
381 | v = apic_read(APIC_EILVTn(i)); | ||
382 | seq_printf(seq, " EILVT%d\t\t: %08x\n", i, v); | ||
383 | } | ||
384 | } | ||
385 | #endif /* CONFIG_X86_LOCAL_APIC */ | ||
593 | seq_printf(seq, "\n MSR\t:\n"); | 386 | seq_printf(seq, "\n MSR\t:\n"); |
594 | } | 387 | } |
595 | 388 | ||
@@ -788,13 +581,11 @@ static int cpu_init_msr(unsigned cpu, unsigned type, struct dentry *dentry) | |||
788 | { | 581 | { |
789 | struct dentry *cpu_dentry = NULL; | 582 | struct dentry *cpu_dentry = NULL; |
790 | unsigned reg, reg_min, reg_max; | 583 | unsigned reg, reg_min, reg_max; |
791 | int i, range, err = 0; | 584 | int i, err = 0; |
792 | char reg_dir[12]; | 585 | char reg_dir[12]; |
793 | u32 low, high; | 586 | u32 low, high; |
794 | 587 | ||
795 | range = get_cpu_range_count(cpu); | 588 | for (i = 0; i < ARRAY_SIZE(cpu_reg_range); i++) { |
796 | |||
797 | for (i = 0; i < range; i++) { | ||
798 | if (!get_cpu_range(cpu, ®_min, ®_max, i, | 589 | if (!get_cpu_range(cpu, ®_min, ®_max, i, |
799 | cpu_base[type].flag)) | 590 | cpu_base[type].flag)) |
800 | continue; | 591 | continue; |
@@ -850,10 +641,6 @@ static int cpu_init_cpu(void) | |||
850 | cpui = &cpu_data(cpu); | 641 | cpui = &cpu_data(cpu); |
851 | if (!cpu_has(cpui, X86_FEATURE_MSR)) | 642 | if (!cpu_has(cpui, X86_FEATURE_MSR)) |
852 | continue; | 643 | continue; |
853 | per_cpu(cpu_model, cpu) = ((cpui->x86_vendor << 16) | | ||
854 | (cpui->x86 << 8) | | ||
855 | (cpui->x86_model)); | ||
856 | per_cpu(cpu_modelflag, cpu) = get_cpu_modelflag(cpu); | ||
857 | 644 | ||
858 | sprintf(cpu_dir, "cpu%d", cpu); | 645 | sprintf(cpu_dir, "cpu%d", cpu); |
859 | cpu_dentry = debugfs_create_dir(cpu_dir, cpu_debugfs_dir); | 646 | cpu_dentry = debugfs_create_dir(cpu_dir, cpu_debugfs_dir); |
diff --git a/arch/x86/kernel/cpu/cpufreq/Kconfig b/arch/x86/kernel/cpu/cpufreq/Kconfig index 52c839875478..f138c6c389b9 100644 --- a/arch/x86/kernel/cpu/cpufreq/Kconfig +++ b/arch/x86/kernel/cpu/cpufreq/Kconfig | |||
@@ -220,11 +220,14 @@ config X86_LONGHAUL | |||
220 | If in doubt, say N. | 220 | If in doubt, say N. |
221 | 221 | ||
222 | config X86_E_POWERSAVER | 222 | config X86_E_POWERSAVER |
223 | tristate "VIA C7 Enhanced PowerSaver" | 223 | tristate "VIA C7 Enhanced PowerSaver (DANGEROUS)" |
224 | select CPU_FREQ_TABLE | 224 | select CPU_FREQ_TABLE |
225 | depends on X86_32 | 225 | depends on X86_32 && EXPERIMENTAL |
226 | help | 226 | help |
227 | This adds the CPUFreq driver for VIA C7 processors. | 227 | This adds the CPUFreq driver for VIA C7 processors. However, this driver |
228 | does not have any safeguards to prevent operating the CPU out of spec | ||
229 | and is thus considered dangerous. Please use the regular ACPI cpufreq | ||
230 | driver, enabled by CONFIG_X86_ACPI_CPUFREQ. | ||
228 | 231 | ||
229 | If in doubt, say N. | 232 | If in doubt, say N. |
230 | 233 | ||
diff --git a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c index 54b6de2cd947..ae9b503220ca 100644 --- a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c +++ b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c | |||
@@ -90,11 +90,7 @@ static int check_est_cpu(unsigned int cpuid) | |||
90 | { | 90 | { |
91 | struct cpuinfo_x86 *cpu = &cpu_data(cpuid); | 91 | struct cpuinfo_x86 *cpu = &cpu_data(cpuid); |
92 | 92 | ||
93 | if (cpu->x86_vendor != X86_VENDOR_INTEL || | 93 | return cpu_has(cpu, X86_FEATURE_EST); |
94 | !cpu_has(cpu, X86_FEATURE_EST)) | ||
95 | return 0; | ||
96 | |||
97 | return 1; | ||
98 | } | 94 | } |
99 | 95 | ||
100 | static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data) | 96 | static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data) |
@@ -550,7 +546,7 @@ static int __init acpi_cpufreq_early_init(void) | |||
550 | return -ENOMEM; | 546 | return -ENOMEM; |
551 | } | 547 | } |
552 | for_each_possible_cpu(i) { | 548 | for_each_possible_cpu(i) { |
553 | if (!alloc_cpumask_var_node( | 549 | if (!zalloc_cpumask_var_node( |
554 | &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map, | 550 | &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map, |
555 | GFP_KERNEL, cpu_to_node(i))) { | 551 | GFP_KERNEL, cpu_to_node(i))) { |
556 | 552 | ||
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k7.c b/arch/x86/kernel/cpu/cpufreq/powernow-k7.c index a8363e5be4ef..d47c775eb0ab 100644 --- a/arch/x86/kernel/cpu/cpufreq/powernow-k7.c +++ b/arch/x86/kernel/cpu/cpufreq/powernow-k7.c | |||
@@ -322,7 +322,7 @@ static int powernow_acpi_init(void) | |||
322 | goto err0; | 322 | goto err0; |
323 | } | 323 | } |
324 | 324 | ||
325 | if (!alloc_cpumask_var(&acpi_processor_perf->shared_cpu_map, | 325 | if (!zalloc_cpumask_var(&acpi_processor_perf->shared_cpu_map, |
326 | GFP_KERNEL)) { | 326 | GFP_KERNEL)) { |
327 | retval = -ENOMEM; | 327 | retval = -ENOMEM; |
328 | goto err05; | 328 | goto err05; |
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c index f6b32d112357..cf52215d9eb1 100644 --- a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c +++ b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c | |||
@@ -835,7 +835,7 @@ static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data) | |||
835 | { | 835 | { |
836 | struct cpufreq_frequency_table *powernow_table; | 836 | struct cpufreq_frequency_table *powernow_table; |
837 | int ret_val = -ENODEV; | 837 | int ret_val = -ENODEV; |
838 | acpi_integer space_id; | 838 | acpi_integer control, status; |
839 | 839 | ||
840 | if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) { | 840 | if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) { |
841 | dprintk("register performance failed: bad ACPI data\n"); | 841 | dprintk("register performance failed: bad ACPI data\n"); |
@@ -848,12 +848,13 @@ static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data) | |||
848 | goto err_out; | 848 | goto err_out; |
849 | } | 849 | } |
850 | 850 | ||
851 | space_id = data->acpi_data.control_register.space_id; | 851 | control = data->acpi_data.control_register.space_id; |
852 | if ((space_id != ACPI_ADR_SPACE_FIXED_HARDWARE) || | 852 | status = data->acpi_data.status_register.space_id; |
853 | (space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) { | 853 | |
854 | if ((control != ACPI_ADR_SPACE_FIXED_HARDWARE) || | ||
855 | (status != ACPI_ADR_SPACE_FIXED_HARDWARE)) { | ||
854 | dprintk("Invalid control/status registers (%x - %x)\n", | 856 | dprintk("Invalid control/status registers (%x - %x)\n", |
855 | data->acpi_data.control_register.space_id, | 857 | control, status); |
856 | space_id); | ||
857 | goto err_out; | 858 | goto err_out; |
858 | } | 859 | } |
859 | 860 | ||
@@ -886,7 +887,7 @@ static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data) | |||
886 | /* notify BIOS that we exist */ | 887 | /* notify BIOS that we exist */ |
887 | acpi_processor_notify_smm(THIS_MODULE); | 888 | acpi_processor_notify_smm(THIS_MODULE); |
888 | 889 | ||
889 | if (!alloc_cpumask_var(&data->acpi_data.shared_cpu_map, GFP_KERNEL)) { | 890 | if (!zalloc_cpumask_var(&data->acpi_data.shared_cpu_map, GFP_KERNEL)) { |
890 | printk(KERN_ERR PFX | 891 | printk(KERN_ERR PFX |
891 | "unable to alloc powernow_k8_data cpumask\n"); | 892 | "unable to alloc powernow_k8_data cpumask\n"); |
892 | ret_val = -ENOMEM; | 893 | ret_val = -ENOMEM; |
diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c b/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c index c9f1fdc02830..55c831ed71ce 100644 --- a/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c +++ b/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c | |||
@@ -471,7 +471,7 @@ static int centrino_target (struct cpufreq_policy *policy, | |||
471 | 471 | ||
472 | if (unlikely(!alloc_cpumask_var(&saved_mask, GFP_KERNEL))) | 472 | if (unlikely(!alloc_cpumask_var(&saved_mask, GFP_KERNEL))) |
473 | return -ENOMEM; | 473 | return -ENOMEM; |
474 | if (unlikely(!alloc_cpumask_var(&covered_cpus, GFP_KERNEL))) { | 474 | if (unlikely(!zalloc_cpumask_var(&covered_cpus, GFP_KERNEL))) { |
475 | free_cpumask_var(saved_mask); | 475 | free_cpumask_var(saved_mask); |
476 | return -ENOMEM; | 476 | return -ENOMEM; |
477 | } | 477 | } |
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index 7437fa133c02..daed39ba2614 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c | |||
@@ -229,12 +229,12 @@ static void __cpuinit intel_workarounds(struct cpuinfo_x86 *c) | |||
229 | } | 229 | } |
230 | #endif | 230 | #endif |
231 | 231 | ||
232 | static void __cpuinit srat_detect_node(void) | 232 | static void __cpuinit srat_detect_node(struct cpuinfo_x86 *c) |
233 | { | 233 | { |
234 | #if defined(CONFIG_NUMA) && defined(CONFIG_X86_64) | 234 | #if defined(CONFIG_NUMA) && defined(CONFIG_X86_64) |
235 | unsigned node; | 235 | unsigned node; |
236 | int cpu = smp_processor_id(); | 236 | int cpu = smp_processor_id(); |
237 | int apicid = hard_smp_processor_id(); | 237 | int apicid = cpu_has_apic ? hard_smp_processor_id() : c->apicid; |
238 | 238 | ||
239 | /* Don't do the funky fallback heuristics the AMD version employs | 239 | /* Don't do the funky fallback heuristics the AMD version employs |
240 | for now. */ | 240 | for now. */ |
@@ -400,7 +400,7 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c) | |||
400 | } | 400 | } |
401 | 401 | ||
402 | /* Work around errata */ | 402 | /* Work around errata */ |
403 | srat_detect_node(); | 403 | srat_detect_node(c); |
404 | 404 | ||
405 | if (cpu_has(c, X86_FEATURE_VMX)) | 405 | if (cpu_has(c, X86_FEATURE_VMX)) |
406 | detect_vmx_virtcap(c); | 406 | detect_vmx_virtcap(c); |
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c index 483eda96e102..789efe217e1a 100644 --- a/arch/x86/kernel/cpu/intel_cacheinfo.c +++ b/arch/x86/kernel/cpu/intel_cacheinfo.c | |||
@@ -17,6 +17,7 @@ | |||
17 | 17 | ||
18 | #include <asm/processor.h> | 18 | #include <asm/processor.h> |
19 | #include <asm/smp.h> | 19 | #include <asm/smp.h> |
20 | #include <asm/k8.h> | ||
20 | 21 | ||
21 | #define LVL_1_INST 1 | 22 | #define LVL_1_INST 1 |
22 | #define LVL_1_DATA 2 | 23 | #define LVL_1_DATA 2 |
@@ -159,14 +160,6 @@ struct _cpuid4_info_regs { | |||
159 | unsigned long can_disable; | 160 | unsigned long can_disable; |
160 | }; | 161 | }; |
161 | 162 | ||
162 | #if defined(CONFIG_PCI) && defined(CONFIG_SYSFS) | ||
163 | static struct pci_device_id k8_nb_id[] = { | ||
164 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x1103) }, | ||
165 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x1203) }, | ||
166 | {} | ||
167 | }; | ||
168 | #endif | ||
169 | |||
170 | unsigned short num_cache_leaves; | 163 | unsigned short num_cache_leaves; |
171 | 164 | ||
172 | /* AMD doesn't have CPUID4. Emulate it here to report the same | 165 | /* AMD doesn't have CPUID4. Emulate it here to report the same |
@@ -207,10 +200,17 @@ union l3_cache { | |||
207 | }; | 200 | }; |
208 | 201 | ||
209 | static const unsigned short __cpuinitconst assocs[] = { | 202 | static const unsigned short __cpuinitconst assocs[] = { |
210 | [1] = 1, [2] = 2, [4] = 4, [6] = 8, | 203 | [1] = 1, |
211 | [8] = 16, [0xa] = 32, [0xb] = 48, | 204 | [2] = 2, |
205 | [4] = 4, | ||
206 | [6] = 8, | ||
207 | [8] = 16, | ||
208 | [0xa] = 32, | ||
209 | [0xb] = 48, | ||
212 | [0xc] = 64, | 210 | [0xc] = 64, |
213 | [0xf] = 0xffff // ?? | 211 | [0xd] = 96, |
212 | [0xe] = 128, | ||
213 | [0xf] = 0xffff /* fully associative - no way to show this currently */ | ||
214 | }; | 214 | }; |
215 | 215 | ||
216 | static const unsigned char __cpuinitconst levels[] = { 1, 1, 2, 3 }; | 216 | static const unsigned char __cpuinitconst levels[] = { 1, 1, 2, 3 }; |
@@ -271,7 +271,8 @@ amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax, | |||
271 | eax->split.type = types[leaf]; | 271 | eax->split.type = types[leaf]; |
272 | eax->split.level = levels[leaf]; | 272 | eax->split.level = levels[leaf]; |
273 | if (leaf == 3) | 273 | if (leaf == 3) |
274 | eax->split.num_threads_sharing = current_cpu_data.x86_max_cores - 1; | 274 | eax->split.num_threads_sharing = |
275 | current_cpu_data.x86_max_cores - 1; | ||
275 | else | 276 | else |
276 | eax->split.num_threads_sharing = 0; | 277 | eax->split.num_threads_sharing = 0; |
277 | eax->split.num_cores_on_die = current_cpu_data.x86_max_cores - 1; | 278 | eax->split.num_cores_on_die = current_cpu_data.x86_max_cores - 1; |
@@ -291,6 +292,14 @@ amd_check_l3_disable(int index, struct _cpuid4_info_regs *this_leaf) | |||
291 | { | 292 | { |
292 | if (index < 3) | 293 | if (index < 3) |
293 | return; | 294 | return; |
295 | |||
296 | if (boot_cpu_data.x86 == 0x11) | ||
297 | return; | ||
298 | |||
299 | /* see erratum #382 */ | ||
300 | if ((boot_cpu_data.x86 == 0x10) && (boot_cpu_data.x86_model < 0x8)) | ||
301 | return; | ||
302 | |||
294 | this_leaf->can_disable = 1; | 303 | this_leaf->can_disable = 1; |
295 | } | 304 | } |
296 | 305 | ||
@@ -696,97 +705,75 @@ static ssize_t show_type(struct _cpuid4_info *this_leaf, char *buf) | |||
696 | #define to_object(k) container_of(k, struct _index_kobject, kobj) | 705 | #define to_object(k) container_of(k, struct _index_kobject, kobj) |
697 | #define to_attr(a) container_of(a, struct _cache_attr, attr) | 706 | #define to_attr(a) container_of(a, struct _cache_attr, attr) |
698 | 707 | ||
699 | #ifdef CONFIG_PCI | 708 | static ssize_t show_cache_disable(struct _cpuid4_info *this_leaf, char *buf, |
700 | static struct pci_dev *get_k8_northbridge(int node) | 709 | unsigned int index) |
701 | { | ||
702 | struct pci_dev *dev = NULL; | ||
703 | int i; | ||
704 | |||
705 | for (i = 0; i <= node; i++) { | ||
706 | do { | ||
707 | dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev); | ||
708 | if (!dev) | ||
709 | break; | ||
710 | } while (!pci_match_id(&k8_nb_id[0], dev)); | ||
711 | if (!dev) | ||
712 | break; | ||
713 | } | ||
714 | return dev; | ||
715 | } | ||
716 | #else | ||
717 | static struct pci_dev *get_k8_northbridge(int node) | ||
718 | { | ||
719 | return NULL; | ||
720 | } | ||
721 | #endif | ||
722 | |||
723 | static ssize_t show_cache_disable(struct _cpuid4_info *this_leaf, char *buf) | ||
724 | { | 710 | { |
725 | const struct cpumask *mask = to_cpumask(this_leaf->shared_cpu_map); | 711 | int cpu = cpumask_first(to_cpumask(this_leaf->shared_cpu_map)); |
726 | int node = cpu_to_node(cpumask_first(mask)); | 712 | int node = cpu_to_node(cpu); |
727 | struct pci_dev *dev = NULL; | 713 | struct pci_dev *dev = node_to_k8_nb_misc(node); |
728 | ssize_t ret = 0; | 714 | unsigned int reg = 0; |
729 | int i; | ||
730 | 715 | ||
731 | if (!this_leaf->can_disable) | 716 | if (!this_leaf->can_disable) |
732 | return sprintf(buf, "Feature not enabled\n"); | ||
733 | |||
734 | dev = get_k8_northbridge(node); | ||
735 | if (!dev) { | ||
736 | printk(KERN_ERR "Attempting AMD northbridge operation on a system with no northbridge\n"); | ||
737 | return -EINVAL; | 717 | return -EINVAL; |
738 | } | ||
739 | 718 | ||
740 | for (i = 0; i < 2; i++) { | 719 | if (!dev) |
741 | unsigned int reg; | 720 | return -EINVAL; |
742 | 721 | ||
743 | pci_read_config_dword(dev, 0x1BC + i * 4, ®); | 722 | pci_read_config_dword(dev, 0x1BC + index * 4, ®); |
723 | return sprintf(buf, "%x\n", reg); | ||
724 | } | ||
744 | 725 | ||
745 | ret += sprintf(buf, "%sEntry: %d\n", buf, i); | 726 | #define SHOW_CACHE_DISABLE(index) \ |
746 | ret += sprintf(buf, "%sReads: %s\tNew Entries: %s\n", | 727 | static ssize_t \ |
747 | buf, | 728 | show_cache_disable_##index(struct _cpuid4_info *this_leaf, char *buf) \ |
748 | reg & 0x80000000 ? "Disabled" : "Allowed", | 729 | { \ |
749 | reg & 0x40000000 ? "Disabled" : "Allowed"); | 730 | return show_cache_disable(this_leaf, buf, index); \ |
750 | ret += sprintf(buf, "%sSubCache: %x\tIndex: %x\n", | ||
751 | buf, (reg & 0x30000) >> 16, reg & 0xfff); | ||
752 | } | ||
753 | return ret; | ||
754 | } | 731 | } |
732 | SHOW_CACHE_DISABLE(0) | ||
733 | SHOW_CACHE_DISABLE(1) | ||
755 | 734 | ||
756 | static ssize_t | 735 | static ssize_t store_cache_disable(struct _cpuid4_info *this_leaf, |
757 | store_cache_disable(struct _cpuid4_info *this_leaf, const char *buf, | 736 | const char *buf, size_t count, unsigned int index) |
758 | size_t count) | ||
759 | { | 737 | { |
760 | const struct cpumask *mask = to_cpumask(this_leaf->shared_cpu_map); | 738 | int cpu = cpumask_first(to_cpumask(this_leaf->shared_cpu_map)); |
761 | int node = cpu_to_node(cpumask_first(mask)); | 739 | int node = cpu_to_node(cpu); |
762 | struct pci_dev *dev = NULL; | 740 | struct pci_dev *dev = node_to_k8_nb_misc(node); |
763 | unsigned int ret, index, val; | 741 | unsigned long val = 0; |
742 | unsigned int scrubber = 0; | ||
764 | 743 | ||
765 | if (!this_leaf->can_disable) | 744 | if (!this_leaf->can_disable) |
766 | return 0; | ||
767 | |||
768 | if (strlen(buf) > 15) | ||
769 | return -EINVAL; | 745 | return -EINVAL; |
770 | 746 | ||
771 | ret = sscanf(buf, "%x %x", &index, &val); | 747 | if (!capable(CAP_SYS_ADMIN)) |
772 | if (ret != 2) | 748 | return -EPERM; |
749 | |||
750 | if (!dev) | ||
773 | return -EINVAL; | 751 | return -EINVAL; |
774 | if (index > 1) | 752 | |
753 | if (strict_strtoul(buf, 10, &val) < 0) | ||
775 | return -EINVAL; | 754 | return -EINVAL; |
776 | 755 | ||
777 | val |= 0xc0000000; | 756 | val |= 0xc0000000; |
778 | dev = get_k8_northbridge(node); | 757 | |
779 | if (!dev) { | 758 | pci_read_config_dword(dev, 0x58, &scrubber); |
780 | printk(KERN_ERR "Attempting AMD northbridge operation on a system with no northbridge\n"); | 759 | scrubber &= ~0x1f000000; |
781 | return -EINVAL; | 760 | pci_write_config_dword(dev, 0x58, scrubber); |
782 | } | ||
783 | 761 | ||
784 | pci_write_config_dword(dev, 0x1BC + index * 4, val & ~0x40000000); | 762 | pci_write_config_dword(dev, 0x1BC + index * 4, val & ~0x40000000); |
785 | wbinvd(); | 763 | wbinvd(); |
786 | pci_write_config_dword(dev, 0x1BC + index * 4, val); | 764 | pci_write_config_dword(dev, 0x1BC + index * 4, val); |
765 | return count; | ||
766 | } | ||
787 | 767 | ||
788 | return 1; | 768 | #define STORE_CACHE_DISABLE(index) \ |
769 | static ssize_t \ | ||
770 | store_cache_disable_##index(struct _cpuid4_info *this_leaf, \ | ||
771 | const char *buf, size_t count) \ | ||
772 | { \ | ||
773 | return store_cache_disable(this_leaf, buf, count, index); \ | ||
789 | } | 774 | } |
775 | STORE_CACHE_DISABLE(0) | ||
776 | STORE_CACHE_DISABLE(1) | ||
790 | 777 | ||
791 | struct _cache_attr { | 778 | struct _cache_attr { |
792 | struct attribute attr; | 779 | struct attribute attr; |
@@ -808,7 +795,10 @@ define_one_ro(size); | |||
808 | define_one_ro(shared_cpu_map); | 795 | define_one_ro(shared_cpu_map); |
809 | define_one_ro(shared_cpu_list); | 796 | define_one_ro(shared_cpu_list); |
810 | 797 | ||
811 | static struct _cache_attr cache_disable = __ATTR(cache_disable, 0644, show_cache_disable, store_cache_disable); | 798 | static struct _cache_attr cache_disable_0 = __ATTR(cache_disable_0, 0644, |
799 | show_cache_disable_0, store_cache_disable_0); | ||
800 | static struct _cache_attr cache_disable_1 = __ATTR(cache_disable_1, 0644, | ||
801 | show_cache_disable_1, store_cache_disable_1); | ||
812 | 802 | ||
813 | static struct attribute * default_attrs[] = { | 803 | static struct attribute * default_attrs[] = { |
814 | &type.attr, | 804 | &type.attr, |
@@ -820,7 +810,8 @@ static struct attribute * default_attrs[] = { | |||
820 | &size.attr, | 810 | &size.attr, |
821 | &shared_cpu_map.attr, | 811 | &shared_cpu_map.attr, |
822 | &shared_cpu_list.attr, | 812 | &shared_cpu_list.attr, |
823 | &cache_disable.attr, | 813 | &cache_disable_0.attr, |
814 | &cache_disable_1.attr, | ||
824 | NULL | 815 | NULL |
825 | }; | 816 | }; |
826 | 817 | ||
diff --git a/arch/x86/kernel/cpu/mcheck/mce_64.c b/arch/x86/kernel/cpu/mcheck/mce_64.c index 6fb0b359d2a5..09dd1d414fc3 100644 --- a/arch/x86/kernel/cpu/mcheck/mce_64.c +++ b/arch/x86/kernel/cpu/mcheck/mce_64.c | |||
@@ -1163,7 +1163,7 @@ static __init int mce_init_device(void) | |||
1163 | if (!mce_available(&boot_cpu_data)) | 1163 | if (!mce_available(&boot_cpu_data)) |
1164 | return -EIO; | 1164 | return -EIO; |
1165 | 1165 | ||
1166 | alloc_cpumask_var(&mce_device_initialized, GFP_KERNEL); | 1166 | zalloc_cpumask_var(&mce_device_initialized, GFP_KERNEL); |
1167 | 1167 | ||
1168 | err = mce_init_banks(); | 1168 | err = mce_init_banks(); |
1169 | if (err) | 1169 | if (err) |
diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel_64.c b/arch/x86/kernel/cpu/mcheck/mce_intel_64.c index cef3ee30744b..65a0fceedcd7 100644 --- a/arch/x86/kernel/cpu/mcheck/mce_intel_64.c +++ b/arch/x86/kernel/cpu/mcheck/mce_intel_64.c | |||
@@ -15,7 +15,6 @@ | |||
15 | #include <asm/hw_irq.h> | 15 | #include <asm/hw_irq.h> |
16 | #include <asm/idle.h> | 16 | #include <asm/idle.h> |
17 | #include <asm/therm_throt.h> | 17 | #include <asm/therm_throt.h> |
18 | #include <asm/apic.h> | ||
19 | 18 | ||
20 | asmlinkage void smp_thermal_interrupt(void) | 19 | asmlinkage void smp_thermal_interrupt(void) |
21 | { | 20 | { |
diff --git a/arch/x86/kernel/cpu/mtrr/cleanup.c b/arch/x86/kernel/cpu/mtrr/cleanup.c index ce0fe4b5c04f..1d584a18a50d 100644 --- a/arch/x86/kernel/cpu/mtrr/cleanup.c +++ b/arch/x86/kernel/cpu/mtrr/cleanup.c | |||
@@ -808,7 +808,7 @@ int __init mtrr_cleanup(unsigned address_bits) | |||
808 | 808 | ||
809 | if (!is_cpu(INTEL) || enable_mtrr_cleanup < 1) | 809 | if (!is_cpu(INTEL) || enable_mtrr_cleanup < 1) |
810 | return 0; | 810 | return 0; |
811 | rdmsr(MTRRdefType_MSR, def, dummy); | 811 | rdmsr(MSR_MTRRdefType, def, dummy); |
812 | def &= 0xff; | 812 | def &= 0xff; |
813 | if (def != MTRR_TYPE_UNCACHABLE) | 813 | if (def != MTRR_TYPE_UNCACHABLE) |
814 | return 0; | 814 | return 0; |
@@ -1003,7 +1003,7 @@ int __init mtrr_trim_uncached_memory(unsigned long end_pfn) | |||
1003 | */ | 1003 | */ |
1004 | if (!is_cpu(INTEL) || disable_mtrr_trim) | 1004 | if (!is_cpu(INTEL) || disable_mtrr_trim) |
1005 | return 0; | 1005 | return 0; |
1006 | rdmsr(MTRRdefType_MSR, def, dummy); | 1006 | rdmsr(MSR_MTRRdefType, def, dummy); |
1007 | def &= 0xff; | 1007 | def &= 0xff; |
1008 | if (def != MTRR_TYPE_UNCACHABLE) | 1008 | if (def != MTRR_TYPE_UNCACHABLE) |
1009 | return 0; | 1009 | return 0; |
diff --git a/arch/x86/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c index d21d4fb161f7..0543f69f0b27 100644 --- a/arch/x86/kernel/cpu/mtrr/generic.c +++ b/arch/x86/kernel/cpu/mtrr/generic.c | |||
@@ -20,9 +20,9 @@ struct fixed_range_block { | |||
20 | }; | 20 | }; |
21 | 21 | ||
22 | static struct fixed_range_block fixed_range_blocks[] = { | 22 | static struct fixed_range_block fixed_range_blocks[] = { |
23 | { MTRRfix64K_00000_MSR, 1 }, /* one 64k MTRR */ | 23 | { MSR_MTRRfix64K_00000, 1 }, /* one 64k MTRR */ |
24 | { MTRRfix16K_80000_MSR, 2 }, /* two 16k MTRRs */ | 24 | { MSR_MTRRfix16K_80000, 2 }, /* two 16k MTRRs */ |
25 | { MTRRfix4K_C0000_MSR, 8 }, /* eight 4k MTRRs */ | 25 | { MSR_MTRRfix4K_C0000, 8 }, /* eight 4k MTRRs */ |
26 | {} | 26 | {} |
27 | }; | 27 | }; |
28 | 28 | ||
@@ -194,12 +194,12 @@ get_fixed_ranges(mtrr_type * frs) | |||
194 | 194 | ||
195 | k8_check_syscfg_dram_mod_en(); | 195 | k8_check_syscfg_dram_mod_en(); |
196 | 196 | ||
197 | rdmsr(MTRRfix64K_00000_MSR, p[0], p[1]); | 197 | rdmsr(MSR_MTRRfix64K_00000, p[0], p[1]); |
198 | 198 | ||
199 | for (i = 0; i < 2; i++) | 199 | for (i = 0; i < 2; i++) |
200 | rdmsr(MTRRfix16K_80000_MSR + i, p[2 + i * 2], p[3 + i * 2]); | 200 | rdmsr(MSR_MTRRfix16K_80000 + i, p[2 + i * 2], p[3 + i * 2]); |
201 | for (i = 0; i < 8; i++) | 201 | for (i = 0; i < 8; i++) |
202 | rdmsr(MTRRfix4K_C0000_MSR + i, p[6 + i * 2], p[7 + i * 2]); | 202 | rdmsr(MSR_MTRRfix4K_C0000 + i, p[6 + i * 2], p[7 + i * 2]); |
203 | } | 203 | } |
204 | 204 | ||
205 | void mtrr_save_fixed_ranges(void *info) | 205 | void mtrr_save_fixed_ranges(void *info) |
@@ -310,7 +310,7 @@ void __init get_mtrr_state(void) | |||
310 | 310 | ||
311 | vrs = mtrr_state.var_ranges; | 311 | vrs = mtrr_state.var_ranges; |
312 | 312 | ||
313 | rdmsr(MTRRcap_MSR, lo, dummy); | 313 | rdmsr(MSR_MTRRcap, lo, dummy); |
314 | mtrr_state.have_fixed = (lo >> 8) & 1; | 314 | mtrr_state.have_fixed = (lo >> 8) & 1; |
315 | 315 | ||
316 | for (i = 0; i < num_var_ranges; i++) | 316 | for (i = 0; i < num_var_ranges; i++) |
@@ -318,7 +318,7 @@ void __init get_mtrr_state(void) | |||
318 | if (mtrr_state.have_fixed) | 318 | if (mtrr_state.have_fixed) |
319 | get_fixed_ranges(mtrr_state.fixed_ranges); | 319 | get_fixed_ranges(mtrr_state.fixed_ranges); |
320 | 320 | ||
321 | rdmsr(MTRRdefType_MSR, lo, dummy); | 321 | rdmsr(MSR_MTRRdefType, lo, dummy); |
322 | mtrr_state.def_type = (lo & 0xff); | 322 | mtrr_state.def_type = (lo & 0xff); |
323 | mtrr_state.enabled = (lo & 0xc00) >> 10; | 323 | mtrr_state.enabled = (lo & 0xc00) >> 10; |
324 | 324 | ||
@@ -583,10 +583,10 @@ static void prepare_set(void) __acquires(set_atomicity_lock) | |||
583 | __flush_tlb(); | 583 | __flush_tlb(); |
584 | 584 | ||
585 | /* Save MTRR state */ | 585 | /* Save MTRR state */ |
586 | rdmsr(MTRRdefType_MSR, deftype_lo, deftype_hi); | 586 | rdmsr(MSR_MTRRdefType, deftype_lo, deftype_hi); |
587 | 587 | ||
588 | /* Disable MTRRs, and set the default type to uncached */ | 588 | /* Disable MTRRs, and set the default type to uncached */ |
589 | mtrr_wrmsr(MTRRdefType_MSR, deftype_lo & ~0xcff, deftype_hi); | 589 | mtrr_wrmsr(MSR_MTRRdefType, deftype_lo & ~0xcff, deftype_hi); |
590 | } | 590 | } |
591 | 591 | ||
592 | static void post_set(void) __releases(set_atomicity_lock) | 592 | static void post_set(void) __releases(set_atomicity_lock) |
@@ -595,7 +595,7 @@ static void post_set(void) __releases(set_atomicity_lock) | |||
595 | __flush_tlb(); | 595 | __flush_tlb(); |
596 | 596 | ||
597 | /* Intel (P6) standard MTRRs */ | 597 | /* Intel (P6) standard MTRRs */ |
598 | mtrr_wrmsr(MTRRdefType_MSR, deftype_lo, deftype_hi); | 598 | mtrr_wrmsr(MSR_MTRRdefType, deftype_lo, deftype_hi); |
599 | 599 | ||
600 | /* Enable caches */ | 600 | /* Enable caches */ |
601 | write_cr0(read_cr0() & 0xbfffffff); | 601 | write_cr0(read_cr0() & 0xbfffffff); |
@@ -707,7 +707,7 @@ int generic_validate_add_page(unsigned long base, unsigned long size, unsigned i | |||
707 | static int generic_have_wrcomb(void) | 707 | static int generic_have_wrcomb(void) |
708 | { | 708 | { |
709 | unsigned long config, dummy; | 709 | unsigned long config, dummy; |
710 | rdmsr(MTRRcap_MSR, config, dummy); | 710 | rdmsr(MSR_MTRRcap, config, dummy); |
711 | return (config & (1 << 10)); | 711 | return (config & (1 << 10)); |
712 | } | 712 | } |
713 | 713 | ||
diff --git a/arch/x86/kernel/cpu/mtrr/main.c b/arch/x86/kernel/cpu/mtrr/main.c index 03cda01f57c7..8fc248b5aeaf 100644 --- a/arch/x86/kernel/cpu/mtrr/main.c +++ b/arch/x86/kernel/cpu/mtrr/main.c | |||
@@ -104,7 +104,7 @@ static void __init set_num_var_ranges(void) | |||
104 | unsigned long config = 0, dummy; | 104 | unsigned long config = 0, dummy; |
105 | 105 | ||
106 | if (use_intel()) { | 106 | if (use_intel()) { |
107 | rdmsr(MTRRcap_MSR, config, dummy); | 107 | rdmsr(MSR_MTRRcap, config, dummy); |
108 | } else if (is_cpu(AMD)) | 108 | } else if (is_cpu(AMD)) |
109 | config = 2; | 109 | config = 2; |
110 | else if (is_cpu(CYRIX) || is_cpu(CENTAUR)) | 110 | else if (is_cpu(CYRIX) || is_cpu(CENTAUR)) |
diff --git a/arch/x86/kernel/cpu/mtrr/mtrr.h b/arch/x86/kernel/cpu/mtrr/mtrr.h index 77f67f7b347a..7538b767f206 100644 --- a/arch/x86/kernel/cpu/mtrr/mtrr.h +++ b/arch/x86/kernel/cpu/mtrr/mtrr.h | |||
@@ -5,21 +5,6 @@ | |||
5 | #include <linux/types.h> | 5 | #include <linux/types.h> |
6 | #include <linux/stddef.h> | 6 | #include <linux/stddef.h> |
7 | 7 | ||
8 | #define MTRRcap_MSR 0x0fe | ||
9 | #define MTRRdefType_MSR 0x2ff | ||
10 | |||
11 | #define MTRRfix64K_00000_MSR 0x250 | ||
12 | #define MTRRfix16K_80000_MSR 0x258 | ||
13 | #define MTRRfix16K_A0000_MSR 0x259 | ||
14 | #define MTRRfix4K_C0000_MSR 0x268 | ||
15 | #define MTRRfix4K_C8000_MSR 0x269 | ||
16 | #define MTRRfix4K_D0000_MSR 0x26a | ||
17 | #define MTRRfix4K_D8000_MSR 0x26b | ||
18 | #define MTRRfix4K_E0000_MSR 0x26c | ||
19 | #define MTRRfix4K_E8000_MSR 0x26d | ||
20 | #define MTRRfix4K_F0000_MSR 0x26e | ||
21 | #define MTRRfix4K_F8000_MSR 0x26f | ||
22 | |||
23 | #define MTRR_CHANGE_MASK_FIXED 0x01 | 8 | #define MTRR_CHANGE_MASK_FIXED 0x01 |
24 | #define MTRR_CHANGE_MASK_VARIABLE 0x02 | 9 | #define MTRR_CHANGE_MASK_VARIABLE 0x02 |
25 | #define MTRR_CHANGE_MASK_DEFTYPE 0x04 | 10 | #define MTRR_CHANGE_MASK_DEFTYPE 0x04 |
diff --git a/arch/x86/kernel/cpu/mtrr/state.c b/arch/x86/kernel/cpu/mtrr/state.c index 7f7e2753685b..1f5fb1588d1f 100644 --- a/arch/x86/kernel/cpu/mtrr/state.c +++ b/arch/x86/kernel/cpu/mtrr/state.c | |||
@@ -35,7 +35,7 @@ void set_mtrr_prepare_save(struct set_mtrr_context *ctxt) | |||
35 | 35 | ||
36 | if (use_intel()) | 36 | if (use_intel()) |
37 | /* Save MTRR state */ | 37 | /* Save MTRR state */ |
38 | rdmsr(MTRRdefType_MSR, ctxt->deftype_lo, ctxt->deftype_hi); | 38 | rdmsr(MSR_MTRRdefType, ctxt->deftype_lo, ctxt->deftype_hi); |
39 | else | 39 | else |
40 | /* Cyrix ARRs - everything else were excluded at the top */ | 40 | /* Cyrix ARRs - everything else were excluded at the top */ |
41 | ctxt->ccr3 = getCx86(CX86_CCR3); | 41 | ctxt->ccr3 = getCx86(CX86_CCR3); |
@@ -46,7 +46,7 @@ void set_mtrr_cache_disable(struct set_mtrr_context *ctxt) | |||
46 | { | 46 | { |
47 | if (use_intel()) | 47 | if (use_intel()) |
48 | /* Disable MTRRs, and set the default type to uncached */ | 48 | /* Disable MTRRs, and set the default type to uncached */ |
49 | mtrr_wrmsr(MTRRdefType_MSR, ctxt->deftype_lo & 0xf300UL, | 49 | mtrr_wrmsr(MSR_MTRRdefType, ctxt->deftype_lo & 0xf300UL, |
50 | ctxt->deftype_hi); | 50 | ctxt->deftype_hi); |
51 | else if (is_cpu(CYRIX)) | 51 | else if (is_cpu(CYRIX)) |
52 | /* Cyrix ARRs - everything else were excluded at the top */ | 52 | /* Cyrix ARRs - everything else were excluded at the top */ |
@@ -64,7 +64,7 @@ void set_mtrr_done(struct set_mtrr_context *ctxt) | |||
64 | /* Restore MTRRdefType */ | 64 | /* Restore MTRRdefType */ |
65 | if (use_intel()) | 65 | if (use_intel()) |
66 | /* Intel (P6) standard MTRRs */ | 66 | /* Intel (P6) standard MTRRs */ |
67 | mtrr_wrmsr(MTRRdefType_MSR, ctxt->deftype_lo, ctxt->deftype_hi); | 67 | mtrr_wrmsr(MSR_MTRRdefType, ctxt->deftype_lo, ctxt->deftype_hi); |
68 | else | 68 | else |
69 | /* Cyrix ARRs - everything else was excluded at the top */ | 69 | /* Cyrix ARRs - everything else was excluded at the top */ |
70 | setCx86(CX86_CCR3, ctxt->ccr3); | 70 | setCx86(CX86_CCR3, ctxt->ccr3); |
diff --git a/arch/x86/kernel/ds.c b/arch/x86/kernel/ds.c index 87b67e3a765a..48bfe1386038 100644 --- a/arch/x86/kernel/ds.c +++ b/arch/x86/kernel/ds.c | |||
@@ -19,45 +19,61 @@ | |||
19 | * Markus Metzger <markus.t.metzger@intel.com>, 2007-2009 | 19 | * Markus Metzger <markus.t.metzger@intel.com>, 2007-2009 |
20 | */ | 20 | */ |
21 | 21 | ||
22 | 22 | #include <linux/kernel.h> | |
23 | #include <asm/ds.h> | ||
24 | |||
25 | #include <linux/errno.h> | ||
26 | #include <linux/string.h> | 23 | #include <linux/string.h> |
27 | #include <linux/slab.h> | 24 | #include <linux/errno.h> |
28 | #include <linux/sched.h> | 25 | #include <linux/sched.h> |
26 | #include <linux/slab.h> | ||
29 | #include <linux/mm.h> | 27 | #include <linux/mm.h> |
30 | #include <linux/kernel.h> | 28 | #include <linux/trace_clock.h> |
29 | |||
30 | #include <asm/ds.h> | ||
31 | 31 | ||
32 | #include "ds_selftest.h" | ||
32 | 33 | ||
33 | /* | 34 | /* |
34 | * The configuration for a particular DS hardware implementation. | 35 | * The configuration for a particular DS hardware implementation: |
35 | */ | 36 | */ |
36 | struct ds_configuration { | 37 | struct ds_configuration { |
37 | /* the name of the configuration */ | 38 | /* The name of the configuration: */ |
38 | const char *name; | 39 | const char *name; |
39 | /* the size of one pointer-typed field in the DS structure and | 40 | |
40 | in the BTS and PEBS buffers in bytes; | 41 | /* The size of pointer-typed fields in DS, BTS, and PEBS: */ |
41 | this covers the first 8 DS fields related to buffer management. */ | 42 | unsigned char sizeof_ptr_field; |
42 | unsigned char sizeof_field; | 43 | |
43 | /* the size of a BTS/PEBS record in bytes */ | 44 | /* The size of a BTS/PEBS record in bytes: */ |
44 | unsigned char sizeof_rec[2]; | 45 | unsigned char sizeof_rec[2]; |
45 | /* a series of bit-masks to control various features indexed | 46 | |
46 | * by enum ds_feature */ | 47 | /* The number of pebs counter reset values in the DS structure. */ |
47 | unsigned long ctl[dsf_ctl_max]; | 48 | unsigned char nr_counter_reset; |
49 | |||
50 | /* Control bit-masks indexed by enum ds_feature: */ | ||
51 | unsigned long ctl[dsf_ctl_max]; | ||
48 | }; | 52 | }; |
49 | static DEFINE_PER_CPU(struct ds_configuration, ds_cfg_array); | 53 | static struct ds_configuration ds_cfg __read_mostly; |
54 | |||
55 | |||
56 | /* Maximal size of a DS configuration: */ | ||
57 | #define MAX_SIZEOF_DS 0x80 | ||
50 | 58 | ||
51 | #define ds_cfg per_cpu(ds_cfg_array, smp_processor_id()) | 59 | /* Maximal size of a BTS record: */ |
60 | #define MAX_SIZEOF_BTS (3 * 8) | ||
52 | 61 | ||
53 | #define MAX_SIZEOF_DS (12 * 8) /* maximal size of a DS configuration */ | 62 | /* BTS and PEBS buffer alignment: */ |
54 | #define MAX_SIZEOF_BTS (3 * 8) /* maximal size of a BTS record */ | 63 | #define DS_ALIGNMENT (1 << 3) |
55 | #define DS_ALIGNMENT (1 << 3) /* BTS and PEBS buffer alignment */ | ||
56 | 64 | ||
57 | #define BTS_CONTROL \ | 65 | /* Number of buffer pointers in DS: */ |
58 | (ds_cfg.ctl[dsf_bts] | ds_cfg.ctl[dsf_bts_kernel] | ds_cfg.ctl[dsf_bts_user] |\ | 66 | #define NUM_DS_PTR_FIELDS 8 |
59 | ds_cfg.ctl[dsf_bts_overflow]) | ||
60 | 67 | ||
68 | /* Size of a pebs reset value in DS: */ | ||
69 | #define PEBS_RESET_FIELD_SIZE 8 | ||
70 | |||
71 | /* Mask of control bits in the DS MSR register: */ | ||
72 | #define BTS_CONTROL \ | ||
73 | ( ds_cfg.ctl[dsf_bts] | \ | ||
74 | ds_cfg.ctl[dsf_bts_kernel] | \ | ||
75 | ds_cfg.ctl[dsf_bts_user] | \ | ||
76 | ds_cfg.ctl[dsf_bts_overflow] ) | ||
61 | 77 | ||
62 | /* | 78 | /* |
63 | * A BTS or PEBS tracer. | 79 | * A BTS or PEBS tracer. |
@@ -66,29 +82,36 @@ static DEFINE_PER_CPU(struct ds_configuration, ds_cfg_array); | |||
66 | * to identify tracers. | 82 | * to identify tracers. |
67 | */ | 83 | */ |
68 | struct ds_tracer { | 84 | struct ds_tracer { |
69 | /* the DS context (partially) owned by this tracer */ | 85 | /* The DS context (partially) owned by this tracer. */ |
70 | struct ds_context *context; | 86 | struct ds_context *context; |
71 | /* the buffer provided on ds_request() and its size in bytes */ | 87 | /* The buffer provided on ds_request() and its size in bytes. */ |
72 | void *buffer; | 88 | void *buffer; |
73 | size_t size; | 89 | size_t size; |
74 | }; | 90 | }; |
75 | 91 | ||
76 | struct bts_tracer { | 92 | struct bts_tracer { |
77 | /* the common DS part */ | 93 | /* The common DS part: */ |
78 | struct ds_tracer ds; | 94 | struct ds_tracer ds; |
79 | /* the trace including the DS configuration */ | 95 | |
80 | struct bts_trace trace; | 96 | /* The trace including the DS configuration: */ |
81 | /* buffer overflow notification function */ | 97 | struct bts_trace trace; |
82 | bts_ovfl_callback_t ovfl; | 98 | |
99 | /* Buffer overflow notification function: */ | ||
100 | bts_ovfl_callback_t ovfl; | ||
101 | |||
102 | /* Active flags affecting trace collection. */ | ||
103 | unsigned int flags; | ||
83 | }; | 104 | }; |
84 | 105 | ||
85 | struct pebs_tracer { | 106 | struct pebs_tracer { |
86 | /* the common DS part */ | 107 | /* The common DS part: */ |
87 | struct ds_tracer ds; | 108 | struct ds_tracer ds; |
88 | /* the trace including the DS configuration */ | 109 | |
89 | struct pebs_trace trace; | 110 | /* The trace including the DS configuration: */ |
90 | /* buffer overflow notification function */ | 111 | struct pebs_trace trace; |
91 | pebs_ovfl_callback_t ovfl; | 112 | |
113 | /* Buffer overflow notification function: */ | ||
114 | pebs_ovfl_callback_t ovfl; | ||
92 | }; | 115 | }; |
93 | 116 | ||
94 | /* | 117 | /* |
@@ -97,6 +120,7 @@ struct pebs_tracer { | |||
97 | * | 120 | * |
98 | * The DS configuration consists of the following fields; different | 121 | * The DS configuration consists of the following fields; different |
99 | * architetures vary in the size of those fields. | 122 | * architetures vary in the size of those fields. |
123 | * | ||
100 | * - double-word aligned base linear address of the BTS buffer | 124 | * - double-word aligned base linear address of the BTS buffer |
101 | * - write pointer into the BTS buffer | 125 | * - write pointer into the BTS buffer |
102 | * - end linear address of the BTS buffer (one byte beyond the end of | 126 | * - end linear address of the BTS buffer (one byte beyond the end of |
@@ -135,21 +159,22 @@ enum ds_field { | |||
135 | }; | 159 | }; |
136 | 160 | ||
137 | enum ds_qualifier { | 161 | enum ds_qualifier { |
138 | ds_bts = 0, | 162 | ds_bts = 0, |
139 | ds_pebs | 163 | ds_pebs |
140 | }; | 164 | }; |
141 | 165 | ||
142 | static inline unsigned long ds_get(const unsigned char *base, | 166 | static inline unsigned long |
143 | enum ds_qualifier qual, enum ds_field field) | 167 | ds_get(const unsigned char *base, enum ds_qualifier qual, enum ds_field field) |
144 | { | 168 | { |
145 | base += (ds_cfg.sizeof_field * (field + (4 * qual))); | 169 | base += (ds_cfg.sizeof_ptr_field * (field + (4 * qual))); |
146 | return *(unsigned long *)base; | 170 | return *(unsigned long *)base; |
147 | } | 171 | } |
148 | 172 | ||
149 | static inline void ds_set(unsigned char *base, enum ds_qualifier qual, | 173 | static inline void |
150 | enum ds_field field, unsigned long value) | 174 | ds_set(unsigned char *base, enum ds_qualifier qual, enum ds_field field, |
175 | unsigned long value) | ||
151 | { | 176 | { |
152 | base += (ds_cfg.sizeof_field * (field + (4 * qual))); | 177 | base += (ds_cfg.sizeof_ptr_field * (field + (4 * qual))); |
153 | (*(unsigned long *)base) = value; | 178 | (*(unsigned long *)base) = value; |
154 | } | 179 | } |
155 | 180 | ||
@@ -159,7 +184,6 @@ static inline void ds_set(unsigned char *base, enum ds_qualifier qual, | |||
159 | */ | 184 | */ |
160 | static DEFINE_SPINLOCK(ds_lock); | 185 | static DEFINE_SPINLOCK(ds_lock); |
161 | 186 | ||
162 | |||
163 | /* | 187 | /* |
164 | * We either support (system-wide) per-cpu or per-thread allocation. | 188 | * We either support (system-wide) per-cpu or per-thread allocation. |
165 | * We distinguish the two based on the task_struct pointer, where a | 189 | * We distinguish the two based on the task_struct pointer, where a |
@@ -178,12 +202,28 @@ static DEFINE_SPINLOCK(ds_lock); | |||
178 | */ | 202 | */ |
179 | static atomic_t tracers = ATOMIC_INIT(0); | 203 | static atomic_t tracers = ATOMIC_INIT(0); |
180 | 204 | ||
181 | static inline void get_tracer(struct task_struct *task) | 205 | static inline int get_tracer(struct task_struct *task) |
182 | { | 206 | { |
183 | if (task) | 207 | int error; |
208 | |||
209 | spin_lock_irq(&ds_lock); | ||
210 | |||
211 | if (task) { | ||
212 | error = -EPERM; | ||
213 | if (atomic_read(&tracers) < 0) | ||
214 | goto out; | ||
184 | atomic_inc(&tracers); | 215 | atomic_inc(&tracers); |
185 | else | 216 | } else { |
217 | error = -EPERM; | ||
218 | if (atomic_read(&tracers) > 0) | ||
219 | goto out; | ||
186 | atomic_dec(&tracers); | 220 | atomic_dec(&tracers); |
221 | } | ||
222 | |||
223 | error = 0; | ||
224 | out: | ||
225 | spin_unlock_irq(&ds_lock); | ||
226 | return error; | ||
187 | } | 227 | } |
188 | 228 | ||
189 | static inline void put_tracer(struct task_struct *task) | 229 | static inline void put_tracer(struct task_struct *task) |
@@ -194,14 +234,6 @@ static inline void put_tracer(struct task_struct *task) | |||
194 | atomic_inc(&tracers); | 234 | atomic_inc(&tracers); |
195 | } | 235 | } |
196 | 236 | ||
197 | static inline int check_tracer(struct task_struct *task) | ||
198 | { | ||
199 | return task ? | ||
200 | (atomic_read(&tracers) >= 0) : | ||
201 | (atomic_read(&tracers) <= 0); | ||
202 | } | ||
203 | |||
204 | |||
205 | /* | 237 | /* |
206 | * The DS context is either attached to a thread or to a cpu: | 238 | * The DS context is either attached to a thread or to a cpu: |
207 | * - in the former case, the thread_struct contains a pointer to the | 239 | * - in the former case, the thread_struct contains a pointer to the |
@@ -213,61 +245,58 @@ static inline int check_tracer(struct task_struct *task) | |||
213 | * deallocated when the last user puts the context. | 245 | * deallocated when the last user puts the context. |
214 | */ | 246 | */ |
215 | struct ds_context { | 247 | struct ds_context { |
216 | /* pointer to the DS configuration; goes into MSR_IA32_DS_AREA */ | 248 | /* The DS configuration; goes into MSR_IA32_DS_AREA: */ |
217 | unsigned char ds[MAX_SIZEOF_DS]; | 249 | unsigned char ds[MAX_SIZEOF_DS]; |
218 | /* the owner of the BTS and PEBS configuration, respectively */ | 250 | |
219 | struct bts_tracer *bts_master; | 251 | /* The owner of the BTS and PEBS configuration, respectively: */ |
220 | struct pebs_tracer *pebs_master; | 252 | struct bts_tracer *bts_master; |
221 | /* use count */ | 253 | struct pebs_tracer *pebs_master; |
222 | unsigned long count; | ||
223 | /* a pointer to the context location inside the thread_struct | ||
224 | * or the per_cpu context array */ | ||
225 | struct ds_context **this; | ||
226 | /* a pointer to the task owning this context, or NULL, if the | ||
227 | * context is owned by a cpu */ | ||
228 | struct task_struct *task; | ||
229 | }; | ||
230 | 254 | ||
231 | static DEFINE_PER_CPU(struct ds_context *, system_context_array); | 255 | /* Use count: */ |
256 | unsigned long count; | ||
232 | 257 | ||
233 | #define system_context per_cpu(system_context_array, smp_processor_id()) | 258 | /* Pointer to the context pointer field: */ |
259 | struct ds_context **this; | ||
260 | |||
261 | /* The traced task; NULL for cpu tracing: */ | ||
262 | struct task_struct *task; | ||
263 | |||
264 | /* The traced cpu; only valid if task is NULL: */ | ||
265 | int cpu; | ||
266 | }; | ||
234 | 267 | ||
268 | static DEFINE_PER_CPU(struct ds_context *, cpu_context); | ||
235 | 269 | ||
236 | static inline struct ds_context *ds_get_context(struct task_struct *task) | 270 | |
271 | static struct ds_context *ds_get_context(struct task_struct *task, int cpu) | ||
237 | { | 272 | { |
238 | struct ds_context **p_context = | 273 | struct ds_context **p_context = |
239 | (task ? &task->thread.ds_ctx : &system_context); | 274 | (task ? &task->thread.ds_ctx : &per_cpu(cpu_context, cpu)); |
240 | struct ds_context *context = NULL; | 275 | struct ds_context *context = NULL; |
241 | struct ds_context *new_context = NULL; | 276 | struct ds_context *new_context = NULL; |
242 | unsigned long irq; | ||
243 | 277 | ||
244 | /* Chances are small that we already have a context. */ | 278 | /* Chances are small that we already have a context. */ |
245 | new_context = kzalloc(sizeof(*new_context), GFP_KERNEL); | 279 | new_context = kzalloc(sizeof(*new_context), GFP_KERNEL); |
246 | if (!new_context) | 280 | if (!new_context) |
247 | return NULL; | 281 | return NULL; |
248 | 282 | ||
249 | spin_lock_irqsave(&ds_lock, irq); | 283 | spin_lock_irq(&ds_lock); |
250 | 284 | ||
251 | context = *p_context; | 285 | context = *p_context; |
252 | if (!context) { | 286 | if (likely(!context)) { |
253 | context = new_context; | 287 | context = new_context; |
254 | 288 | ||
255 | context->this = p_context; | 289 | context->this = p_context; |
256 | context->task = task; | 290 | context->task = task; |
291 | context->cpu = cpu; | ||
257 | context->count = 0; | 292 | context->count = 0; |
258 | 293 | ||
259 | if (task) | ||
260 | set_tsk_thread_flag(task, TIF_DS_AREA_MSR); | ||
261 | |||
262 | if (!task || (task == current)) | ||
263 | wrmsrl(MSR_IA32_DS_AREA, (unsigned long)context->ds); | ||
264 | |||
265 | *p_context = context; | 294 | *p_context = context; |
266 | } | 295 | } |
267 | 296 | ||
268 | context->count++; | 297 | context->count++; |
269 | 298 | ||
270 | spin_unlock_irqrestore(&ds_lock, irq); | 299 | spin_unlock_irq(&ds_lock); |
271 | 300 | ||
272 | if (context != new_context) | 301 | if (context != new_context) |
273 | kfree(new_context); | 302 | kfree(new_context); |
@@ -275,8 +304,9 @@ static inline struct ds_context *ds_get_context(struct task_struct *task) | |||
275 | return context; | 304 | return context; |
276 | } | 305 | } |
277 | 306 | ||
278 | static inline void ds_put_context(struct ds_context *context) | 307 | static void ds_put_context(struct ds_context *context) |
279 | { | 308 | { |
309 | struct task_struct *task; | ||
280 | unsigned long irq; | 310 | unsigned long irq; |
281 | 311 | ||
282 | if (!context) | 312 | if (!context) |
@@ -291,17 +321,55 @@ static inline void ds_put_context(struct ds_context *context) | |||
291 | 321 | ||
292 | *(context->this) = NULL; | 322 | *(context->this) = NULL; |
293 | 323 | ||
294 | if (context->task) | 324 | task = context->task; |
295 | clear_tsk_thread_flag(context->task, TIF_DS_AREA_MSR); | 325 | |
326 | if (task) | ||
327 | clear_tsk_thread_flag(task, TIF_DS_AREA_MSR); | ||
296 | 328 | ||
297 | if (!context->task || (context->task == current)) | 329 | /* |
298 | wrmsrl(MSR_IA32_DS_AREA, 0); | 330 | * We leave the (now dangling) pointer to the DS configuration in |
331 | * the DS_AREA msr. This is as good or as bad as replacing it with | ||
332 | * NULL - the hardware would crash if we enabled tracing. | ||
333 | * | ||
334 | * This saves us some problems with having to write an msr on a | ||
335 | * different cpu while preventing others from doing the same for the | ||
336 | * next context for that same cpu. | ||
337 | */ | ||
299 | 338 | ||
300 | spin_unlock_irqrestore(&ds_lock, irq); | 339 | spin_unlock_irqrestore(&ds_lock, irq); |
301 | 340 | ||
341 | /* The context might still be in use for context switching. */ | ||
342 | if (task && (task != current)) | ||
343 | wait_task_context_switch(task); | ||
344 | |||
302 | kfree(context); | 345 | kfree(context); |
303 | } | 346 | } |
304 | 347 | ||
348 | static void ds_install_ds_area(struct ds_context *context) | ||
349 | { | ||
350 | unsigned long ds; | ||
351 | |||
352 | ds = (unsigned long)context->ds; | ||
353 | |||
354 | /* | ||
355 | * There is a race between the bts master and the pebs master. | ||
356 | * | ||
357 | * The thread/cpu access is synchronized via get/put_cpu() for | ||
358 | * task tracing and via wrmsr_on_cpu for cpu tracing. | ||
359 | * | ||
360 | * If bts and pebs are collected for the same task or same cpu, | ||
361 | * the same confiuration is written twice. | ||
362 | */ | ||
363 | if (context->task) { | ||
364 | get_cpu(); | ||
365 | if (context->task == current) | ||
366 | wrmsrl(MSR_IA32_DS_AREA, ds); | ||
367 | set_tsk_thread_flag(context->task, TIF_DS_AREA_MSR); | ||
368 | put_cpu(); | ||
369 | } else | ||
370 | wrmsr_on_cpu(context->cpu, MSR_IA32_DS_AREA, | ||
371 | (u32)((u64)ds), (u32)((u64)ds >> 32)); | ||
372 | } | ||
305 | 373 | ||
306 | /* | 374 | /* |
307 | * Call the tracer's callback on a buffer overflow. | 375 | * Call the tracer's callback on a buffer overflow. |
@@ -332,9 +400,9 @@ static void ds_overflow(struct ds_context *context, enum ds_qualifier qual) | |||
332 | * The remainder of any partially written record is zeroed out. | 400 | * The remainder of any partially written record is zeroed out. |
333 | * | 401 | * |
334 | * context: the DS context | 402 | * context: the DS context |
335 | * qual: the buffer type | 403 | * qual: the buffer type |
336 | * record: the data to write | 404 | * record: the data to write |
337 | * size: the size of the data | 405 | * size: the size of the data |
338 | */ | 406 | */ |
339 | static int ds_write(struct ds_context *context, enum ds_qualifier qual, | 407 | static int ds_write(struct ds_context *context, enum ds_qualifier qual, |
340 | const void *record, size_t size) | 408 | const void *record, size_t size) |
@@ -349,14 +417,14 @@ static int ds_write(struct ds_context *context, enum ds_qualifier qual, | |||
349 | unsigned long write_size, adj_write_size; | 417 | unsigned long write_size, adj_write_size; |
350 | 418 | ||
351 | /* | 419 | /* |
352 | * write as much as possible without producing an | 420 | * Write as much as possible without producing an |
353 | * overflow interrupt. | 421 | * overflow interrupt. |
354 | * | 422 | * |
355 | * interrupt_threshold must either be | 423 | * Interrupt_threshold must either be |
356 | * - bigger than absolute_maximum or | 424 | * - bigger than absolute_maximum or |
357 | * - point to a record between buffer_base and absolute_maximum | 425 | * - point to a record between buffer_base and absolute_maximum |
358 | * | 426 | * |
359 | * index points to a valid record. | 427 | * Index points to a valid record. |
360 | */ | 428 | */ |
361 | base = ds_get(context->ds, qual, ds_buffer_base); | 429 | base = ds_get(context->ds, qual, ds_buffer_base); |
362 | index = ds_get(context->ds, qual, ds_index); | 430 | index = ds_get(context->ds, qual, ds_index); |
@@ -365,8 +433,10 @@ static int ds_write(struct ds_context *context, enum ds_qualifier qual, | |||
365 | 433 | ||
366 | write_end = min(end, int_th); | 434 | write_end = min(end, int_th); |
367 | 435 | ||
368 | /* if we are already beyond the interrupt threshold, | 436 | /* |
369 | * we fill the entire buffer */ | 437 | * If we are already beyond the interrupt threshold, |
438 | * we fill the entire buffer. | ||
439 | */ | ||
370 | if (write_end <= index) | 440 | if (write_end <= index) |
371 | write_end = end; | 441 | write_end = end; |
372 | 442 | ||
@@ -383,7 +453,7 @@ static int ds_write(struct ds_context *context, enum ds_qualifier qual, | |||
383 | adj_write_size = write_size / ds_cfg.sizeof_rec[qual]; | 453 | adj_write_size = write_size / ds_cfg.sizeof_rec[qual]; |
384 | adj_write_size *= ds_cfg.sizeof_rec[qual]; | 454 | adj_write_size *= ds_cfg.sizeof_rec[qual]; |
385 | 455 | ||
386 | /* zero out trailing bytes */ | 456 | /* Zero out trailing bytes. */ |
387 | memset((char *)index + write_size, 0, | 457 | memset((char *)index + write_size, 0, |
388 | adj_write_size - write_size); | 458 | adj_write_size - write_size); |
389 | index += adj_write_size; | 459 | index += adj_write_size; |
@@ -410,7 +480,7 @@ static int ds_write(struct ds_context *context, enum ds_qualifier qual, | |||
410 | * Later architectures use 64bit pointers throughout, whereas earlier | 480 | * Later architectures use 64bit pointers throughout, whereas earlier |
411 | * architectures use 32bit pointers in 32bit mode. | 481 | * architectures use 32bit pointers in 32bit mode. |
412 | * | 482 | * |
413 | * We compute the base address for the first 8 fields based on: | 483 | * We compute the base address for the fields based on: |
414 | * - the field size stored in the DS configuration | 484 | * - the field size stored in the DS configuration |
415 | * - the relative field position | 485 | * - the relative field position |
416 | * | 486 | * |
@@ -431,23 +501,23 @@ enum bts_field { | |||
431 | bts_to, | 501 | bts_to, |
432 | bts_flags, | 502 | bts_flags, |
433 | 503 | ||
434 | bts_qual = bts_from, | 504 | bts_qual = bts_from, |
435 | bts_jiffies = bts_to, | 505 | bts_clock = bts_to, |
436 | bts_pid = bts_flags, | 506 | bts_pid = bts_flags, |
437 | 507 | ||
438 | bts_qual_mask = (bts_qual_max - 1), | 508 | bts_qual_mask = (bts_qual_max - 1), |
439 | bts_escape = ((unsigned long)-1 & ~bts_qual_mask) | 509 | bts_escape = ((unsigned long)-1 & ~bts_qual_mask) |
440 | }; | 510 | }; |
441 | 511 | ||
442 | static inline unsigned long bts_get(const char *base, enum bts_field field) | 512 | static inline unsigned long bts_get(const char *base, enum bts_field field) |
443 | { | 513 | { |
444 | base += (ds_cfg.sizeof_field * field); | 514 | base += (ds_cfg.sizeof_ptr_field * field); |
445 | return *(unsigned long *)base; | 515 | return *(unsigned long *)base; |
446 | } | 516 | } |
447 | 517 | ||
448 | static inline void bts_set(char *base, enum bts_field field, unsigned long val) | 518 | static inline void bts_set(char *base, enum bts_field field, unsigned long val) |
449 | { | 519 | { |
450 | base += (ds_cfg.sizeof_field * field);; | 520 | base += (ds_cfg.sizeof_ptr_field * field);; |
451 | (*(unsigned long *)base) = val; | 521 | (*(unsigned long *)base) = val; |
452 | } | 522 | } |
453 | 523 | ||
@@ -463,8 +533,8 @@ static inline void bts_set(char *base, enum bts_field field, unsigned long val) | |||
463 | * | 533 | * |
464 | * return: bytes read/written on success; -Eerrno, otherwise | 534 | * return: bytes read/written on success; -Eerrno, otherwise |
465 | */ | 535 | */ |
466 | static int bts_read(struct bts_tracer *tracer, const void *at, | 536 | static int |
467 | struct bts_struct *out) | 537 | bts_read(struct bts_tracer *tracer, const void *at, struct bts_struct *out) |
468 | { | 538 | { |
469 | if (!tracer) | 539 | if (!tracer) |
470 | return -EINVAL; | 540 | return -EINVAL; |
@@ -478,8 +548,8 @@ static int bts_read(struct bts_tracer *tracer, const void *at, | |||
478 | memset(out, 0, sizeof(*out)); | 548 | memset(out, 0, sizeof(*out)); |
479 | if ((bts_get(at, bts_qual) & ~bts_qual_mask) == bts_escape) { | 549 | if ((bts_get(at, bts_qual) & ~bts_qual_mask) == bts_escape) { |
480 | out->qualifier = (bts_get(at, bts_qual) & bts_qual_mask); | 550 | out->qualifier = (bts_get(at, bts_qual) & bts_qual_mask); |
481 | out->variant.timestamp.jiffies = bts_get(at, bts_jiffies); | 551 | out->variant.event.clock = bts_get(at, bts_clock); |
482 | out->variant.timestamp.pid = bts_get(at, bts_pid); | 552 | out->variant.event.pid = bts_get(at, bts_pid); |
483 | } else { | 553 | } else { |
484 | out->qualifier = bts_branch; | 554 | out->qualifier = bts_branch; |
485 | out->variant.lbr.from = bts_get(at, bts_from); | 555 | out->variant.lbr.from = bts_get(at, bts_from); |
@@ -516,8 +586,8 @@ static int bts_write(struct bts_tracer *tracer, const struct bts_struct *in) | |||
516 | case bts_task_arrives: | 586 | case bts_task_arrives: |
517 | case bts_task_departs: | 587 | case bts_task_departs: |
518 | bts_set(raw, bts_qual, (bts_escape | in->qualifier)); | 588 | bts_set(raw, bts_qual, (bts_escape | in->qualifier)); |
519 | bts_set(raw, bts_jiffies, in->variant.timestamp.jiffies); | 589 | bts_set(raw, bts_clock, in->variant.event.clock); |
520 | bts_set(raw, bts_pid, in->variant.timestamp.pid); | 590 | bts_set(raw, bts_pid, in->variant.event.pid); |
521 | break; | 591 | break; |
522 | default: | 592 | default: |
523 | return -EINVAL; | 593 | return -EINVAL; |
@@ -555,7 +625,8 @@ static void ds_init_ds_trace(struct ds_trace *trace, enum ds_qualifier qual, | |||
555 | unsigned int flags) { | 625 | unsigned int flags) { |
556 | unsigned long buffer, adj; | 626 | unsigned long buffer, adj; |
557 | 627 | ||
558 | /* adjust the buffer address and size to meet alignment | 628 | /* |
629 | * Adjust the buffer address and size to meet alignment | ||
559 | * constraints: | 630 | * constraints: |
560 | * - buffer is double-word aligned | 631 | * - buffer is double-word aligned |
561 | * - size is multiple of record size | 632 | * - size is multiple of record size |
@@ -577,9 +648,11 @@ static void ds_init_ds_trace(struct ds_trace *trace, enum ds_qualifier qual, | |||
577 | trace->begin = (void *)buffer; | 648 | trace->begin = (void *)buffer; |
578 | trace->top = trace->begin; | 649 | trace->top = trace->begin; |
579 | trace->end = (void *)(buffer + size); | 650 | trace->end = (void *)(buffer + size); |
580 | /* The value for 'no threshold' is -1, which will set the | 651 | /* |
652 | * The value for 'no threshold' is -1, which will set the | ||
581 | * threshold outside of the buffer, just like we want it. | 653 | * threshold outside of the buffer, just like we want it. |
582 | */ | 654 | */ |
655 | ith *= ds_cfg.sizeof_rec[qual]; | ||
583 | trace->ith = (void *)(buffer + size - ith); | 656 | trace->ith = (void *)(buffer + size - ith); |
584 | 657 | ||
585 | trace->flags = flags; | 658 | trace->flags = flags; |
@@ -588,18 +661,27 @@ static void ds_init_ds_trace(struct ds_trace *trace, enum ds_qualifier qual, | |||
588 | 661 | ||
589 | static int ds_request(struct ds_tracer *tracer, struct ds_trace *trace, | 662 | static int ds_request(struct ds_tracer *tracer, struct ds_trace *trace, |
590 | enum ds_qualifier qual, struct task_struct *task, | 663 | enum ds_qualifier qual, struct task_struct *task, |
591 | void *base, size_t size, size_t th, unsigned int flags) | 664 | int cpu, void *base, size_t size, size_t th) |
592 | { | 665 | { |
593 | struct ds_context *context; | 666 | struct ds_context *context; |
594 | int error; | 667 | int error; |
668 | size_t req_size; | ||
669 | |||
670 | error = -EOPNOTSUPP; | ||
671 | if (!ds_cfg.sizeof_rec[qual]) | ||
672 | goto out; | ||
595 | 673 | ||
596 | error = -EINVAL; | 674 | error = -EINVAL; |
597 | if (!base) | 675 | if (!base) |
598 | goto out; | 676 | goto out; |
599 | 677 | ||
600 | /* we require some space to do alignment adjustments below */ | 678 | req_size = ds_cfg.sizeof_rec[qual]; |
679 | /* We might need space for alignment adjustments. */ | ||
680 | if (!IS_ALIGNED((unsigned long)base, DS_ALIGNMENT)) | ||
681 | req_size += DS_ALIGNMENT; | ||
682 | |||
601 | error = -EINVAL; | 683 | error = -EINVAL; |
602 | if (size < (DS_ALIGNMENT + ds_cfg.sizeof_rec[qual])) | 684 | if (size < req_size) |
603 | goto out; | 685 | goto out; |
604 | 686 | ||
605 | if (th != (size_t)-1) { | 687 | if (th != (size_t)-1) { |
@@ -614,182 +696,318 @@ static int ds_request(struct ds_tracer *tracer, struct ds_trace *trace, | |||
614 | tracer->size = size; | 696 | tracer->size = size; |
615 | 697 | ||
616 | error = -ENOMEM; | 698 | error = -ENOMEM; |
617 | context = ds_get_context(task); | 699 | context = ds_get_context(task, cpu); |
618 | if (!context) | 700 | if (!context) |
619 | goto out; | 701 | goto out; |
620 | tracer->context = context; | 702 | tracer->context = context; |
621 | 703 | ||
622 | ds_init_ds_trace(trace, qual, base, size, th, flags); | 704 | /* |
705 | * Defer any tracer-specific initialization work for the context until | ||
706 | * context ownership has been clarified. | ||
707 | */ | ||
623 | 708 | ||
624 | error = 0; | 709 | error = 0; |
625 | out: | 710 | out: |
626 | return error; | 711 | return error; |
627 | } | 712 | } |
628 | 713 | ||
629 | struct bts_tracer *ds_request_bts(struct task_struct *task, | 714 | static struct bts_tracer *ds_request_bts(struct task_struct *task, int cpu, |
630 | void *base, size_t size, | 715 | void *base, size_t size, |
631 | bts_ovfl_callback_t ovfl, size_t th, | 716 | bts_ovfl_callback_t ovfl, size_t th, |
632 | unsigned int flags) | 717 | unsigned int flags) |
633 | { | 718 | { |
634 | struct bts_tracer *tracer; | 719 | struct bts_tracer *tracer; |
635 | unsigned long irq; | ||
636 | int error; | 720 | int error; |
637 | 721 | ||
722 | /* Buffer overflow notification is not yet implemented. */ | ||
638 | error = -EOPNOTSUPP; | 723 | error = -EOPNOTSUPP; |
639 | if (!ds_cfg.ctl[dsf_bts]) | 724 | if (ovfl) |
640 | goto out; | 725 | goto out; |
641 | 726 | ||
642 | /* buffer overflow notification is not yet implemented */ | 727 | error = get_tracer(task); |
643 | error = -EOPNOTSUPP; | 728 | if (error < 0) |
644 | if (ovfl) | ||
645 | goto out; | 729 | goto out; |
646 | 730 | ||
647 | error = -ENOMEM; | 731 | error = -ENOMEM; |
648 | tracer = kzalloc(sizeof(*tracer), GFP_KERNEL); | 732 | tracer = kzalloc(sizeof(*tracer), GFP_KERNEL); |
649 | if (!tracer) | 733 | if (!tracer) |
650 | goto out; | 734 | goto out_put_tracer; |
651 | tracer->ovfl = ovfl; | 735 | tracer->ovfl = ovfl; |
652 | 736 | ||
737 | /* Do some more error checking and acquire a tracing context. */ | ||
653 | error = ds_request(&tracer->ds, &tracer->trace.ds, | 738 | error = ds_request(&tracer->ds, &tracer->trace.ds, |
654 | ds_bts, task, base, size, th, flags); | 739 | ds_bts, task, cpu, base, size, th); |
655 | if (error < 0) | 740 | if (error < 0) |
656 | goto out_tracer; | 741 | goto out_tracer; |
657 | 742 | ||
658 | 743 | /* Claim the bts part of the tracing context we acquired above. */ | |
659 | spin_lock_irqsave(&ds_lock, irq); | 744 | spin_lock_irq(&ds_lock); |
660 | |||
661 | error = -EPERM; | ||
662 | if (!check_tracer(task)) | ||
663 | goto out_unlock; | ||
664 | get_tracer(task); | ||
665 | 745 | ||
666 | error = -EPERM; | 746 | error = -EPERM; |
667 | if (tracer->ds.context->bts_master) | 747 | if (tracer->ds.context->bts_master) |
668 | goto out_put_tracer; | 748 | goto out_unlock; |
669 | tracer->ds.context->bts_master = tracer; | 749 | tracer->ds.context->bts_master = tracer; |
670 | 750 | ||
671 | spin_unlock_irqrestore(&ds_lock, irq); | 751 | spin_unlock_irq(&ds_lock); |
672 | 752 | ||
753 | /* | ||
754 | * Now that we own the bts part of the context, let's complete the | ||
755 | * initialization for that part. | ||
756 | */ | ||
757 | ds_init_ds_trace(&tracer->trace.ds, ds_bts, base, size, th, flags); | ||
758 | ds_write_config(tracer->ds.context, &tracer->trace.ds, ds_bts); | ||
759 | ds_install_ds_area(tracer->ds.context); | ||
673 | 760 | ||
674 | tracer->trace.read = bts_read; | 761 | tracer->trace.read = bts_read; |
675 | tracer->trace.write = bts_write; | 762 | tracer->trace.write = bts_write; |
676 | 763 | ||
677 | ds_write_config(tracer->ds.context, &tracer->trace.ds, ds_bts); | 764 | /* Start tracing. */ |
678 | ds_resume_bts(tracer); | 765 | ds_resume_bts(tracer); |
679 | 766 | ||
680 | return tracer; | 767 | return tracer; |
681 | 768 | ||
682 | out_put_tracer: | ||
683 | put_tracer(task); | ||
684 | out_unlock: | 769 | out_unlock: |
685 | spin_unlock_irqrestore(&ds_lock, irq); | 770 | spin_unlock_irq(&ds_lock); |
686 | ds_put_context(tracer->ds.context); | 771 | ds_put_context(tracer->ds.context); |
687 | out_tracer: | 772 | out_tracer: |
688 | kfree(tracer); | 773 | kfree(tracer); |
774 | out_put_tracer: | ||
775 | put_tracer(task); | ||
689 | out: | 776 | out: |
690 | return ERR_PTR(error); | 777 | return ERR_PTR(error); |
691 | } | 778 | } |
692 | 779 | ||
693 | struct pebs_tracer *ds_request_pebs(struct task_struct *task, | 780 | struct bts_tracer *ds_request_bts_task(struct task_struct *task, |
694 | void *base, size_t size, | 781 | void *base, size_t size, |
695 | pebs_ovfl_callback_t ovfl, size_t th, | 782 | bts_ovfl_callback_t ovfl, |
696 | unsigned int flags) | 783 | size_t th, unsigned int flags) |
784 | { | ||
785 | return ds_request_bts(task, 0, base, size, ovfl, th, flags); | ||
786 | } | ||
787 | |||
788 | struct bts_tracer *ds_request_bts_cpu(int cpu, void *base, size_t size, | ||
789 | bts_ovfl_callback_t ovfl, | ||
790 | size_t th, unsigned int flags) | ||
791 | { | ||
792 | return ds_request_bts(NULL, cpu, base, size, ovfl, th, flags); | ||
793 | } | ||
794 | |||
795 | static struct pebs_tracer *ds_request_pebs(struct task_struct *task, int cpu, | ||
796 | void *base, size_t size, | ||
797 | pebs_ovfl_callback_t ovfl, size_t th, | ||
798 | unsigned int flags) | ||
697 | { | 799 | { |
698 | struct pebs_tracer *tracer; | 800 | struct pebs_tracer *tracer; |
699 | unsigned long irq; | ||
700 | int error; | 801 | int error; |
701 | 802 | ||
702 | /* buffer overflow notification is not yet implemented */ | 803 | /* Buffer overflow notification is not yet implemented. */ |
703 | error = -EOPNOTSUPP; | 804 | error = -EOPNOTSUPP; |
704 | if (ovfl) | 805 | if (ovfl) |
705 | goto out; | 806 | goto out; |
706 | 807 | ||
808 | error = get_tracer(task); | ||
809 | if (error < 0) | ||
810 | goto out; | ||
811 | |||
707 | error = -ENOMEM; | 812 | error = -ENOMEM; |
708 | tracer = kzalloc(sizeof(*tracer), GFP_KERNEL); | 813 | tracer = kzalloc(sizeof(*tracer), GFP_KERNEL); |
709 | if (!tracer) | 814 | if (!tracer) |
710 | goto out; | 815 | goto out_put_tracer; |
711 | tracer->ovfl = ovfl; | 816 | tracer->ovfl = ovfl; |
712 | 817 | ||
818 | /* Do some more error checking and acquire a tracing context. */ | ||
713 | error = ds_request(&tracer->ds, &tracer->trace.ds, | 819 | error = ds_request(&tracer->ds, &tracer->trace.ds, |
714 | ds_pebs, task, base, size, th, flags); | 820 | ds_pebs, task, cpu, base, size, th); |
715 | if (error < 0) | 821 | if (error < 0) |
716 | goto out_tracer; | 822 | goto out_tracer; |
717 | 823 | ||
718 | spin_lock_irqsave(&ds_lock, irq); | 824 | /* Claim the pebs part of the tracing context we acquired above. */ |
719 | 825 | spin_lock_irq(&ds_lock); | |
720 | error = -EPERM; | ||
721 | if (!check_tracer(task)) | ||
722 | goto out_unlock; | ||
723 | get_tracer(task); | ||
724 | 826 | ||
725 | error = -EPERM; | 827 | error = -EPERM; |
726 | if (tracer->ds.context->pebs_master) | 828 | if (tracer->ds.context->pebs_master) |
727 | goto out_put_tracer; | 829 | goto out_unlock; |
728 | tracer->ds.context->pebs_master = tracer; | 830 | tracer->ds.context->pebs_master = tracer; |
729 | 831 | ||
730 | spin_unlock_irqrestore(&ds_lock, irq); | 832 | spin_unlock_irq(&ds_lock); |
731 | 833 | ||
834 | /* | ||
835 | * Now that we own the pebs part of the context, let's complete the | ||
836 | * initialization for that part. | ||
837 | */ | ||
838 | ds_init_ds_trace(&tracer->trace.ds, ds_pebs, base, size, th, flags); | ||
732 | ds_write_config(tracer->ds.context, &tracer->trace.ds, ds_pebs); | 839 | ds_write_config(tracer->ds.context, &tracer->trace.ds, ds_pebs); |
840 | ds_install_ds_area(tracer->ds.context); | ||
841 | |||
842 | /* Start tracing. */ | ||
733 | ds_resume_pebs(tracer); | 843 | ds_resume_pebs(tracer); |
734 | 844 | ||
735 | return tracer; | 845 | return tracer; |
736 | 846 | ||
737 | out_put_tracer: | ||
738 | put_tracer(task); | ||
739 | out_unlock: | 847 | out_unlock: |
740 | spin_unlock_irqrestore(&ds_lock, irq); | 848 | spin_unlock_irq(&ds_lock); |
741 | ds_put_context(tracer->ds.context); | 849 | ds_put_context(tracer->ds.context); |
742 | out_tracer: | 850 | out_tracer: |
743 | kfree(tracer); | 851 | kfree(tracer); |
852 | out_put_tracer: | ||
853 | put_tracer(task); | ||
744 | out: | 854 | out: |
745 | return ERR_PTR(error); | 855 | return ERR_PTR(error); |
746 | } | 856 | } |
747 | 857 | ||
748 | void ds_release_bts(struct bts_tracer *tracer) | 858 | struct pebs_tracer *ds_request_pebs_task(struct task_struct *task, |
859 | void *base, size_t size, | ||
860 | pebs_ovfl_callback_t ovfl, | ||
861 | size_t th, unsigned int flags) | ||
749 | { | 862 | { |
750 | if (!tracer) | 863 | return ds_request_pebs(task, 0, base, size, ovfl, th, flags); |
751 | return; | 864 | } |
752 | 865 | ||
753 | ds_suspend_bts(tracer); | 866 | struct pebs_tracer *ds_request_pebs_cpu(int cpu, void *base, size_t size, |
867 | pebs_ovfl_callback_t ovfl, | ||
868 | size_t th, unsigned int flags) | ||
869 | { | ||
870 | return ds_request_pebs(NULL, cpu, base, size, ovfl, th, flags); | ||
871 | } | ||
872 | |||
873 | static void ds_free_bts(struct bts_tracer *tracer) | ||
874 | { | ||
875 | struct task_struct *task; | ||
876 | |||
877 | task = tracer->ds.context->task; | ||
754 | 878 | ||
755 | WARN_ON_ONCE(tracer->ds.context->bts_master != tracer); | 879 | WARN_ON_ONCE(tracer->ds.context->bts_master != tracer); |
756 | tracer->ds.context->bts_master = NULL; | 880 | tracer->ds.context->bts_master = NULL; |
757 | 881 | ||
758 | put_tracer(tracer->ds.context->task); | 882 | /* Make sure tracing stopped and the tracer is not in use. */ |
883 | if (task && (task != current)) | ||
884 | wait_task_context_switch(task); | ||
885 | |||
759 | ds_put_context(tracer->ds.context); | 886 | ds_put_context(tracer->ds.context); |
887 | put_tracer(task); | ||
760 | 888 | ||
761 | kfree(tracer); | 889 | kfree(tracer); |
762 | } | 890 | } |
763 | 891 | ||
892 | void ds_release_bts(struct bts_tracer *tracer) | ||
893 | { | ||
894 | might_sleep(); | ||
895 | |||
896 | if (!tracer) | ||
897 | return; | ||
898 | |||
899 | ds_suspend_bts(tracer); | ||
900 | ds_free_bts(tracer); | ||
901 | } | ||
902 | |||
903 | int ds_release_bts_noirq(struct bts_tracer *tracer) | ||
904 | { | ||
905 | struct task_struct *task; | ||
906 | unsigned long irq; | ||
907 | int error; | ||
908 | |||
909 | if (!tracer) | ||
910 | return 0; | ||
911 | |||
912 | task = tracer->ds.context->task; | ||
913 | |||
914 | local_irq_save(irq); | ||
915 | |||
916 | error = -EPERM; | ||
917 | if (!task && | ||
918 | (tracer->ds.context->cpu != smp_processor_id())) | ||
919 | goto out; | ||
920 | |||
921 | error = -EPERM; | ||
922 | if (task && (task != current)) | ||
923 | goto out; | ||
924 | |||
925 | ds_suspend_bts_noirq(tracer); | ||
926 | ds_free_bts(tracer); | ||
927 | |||
928 | error = 0; | ||
929 | out: | ||
930 | local_irq_restore(irq); | ||
931 | return error; | ||
932 | } | ||
933 | |||
934 | static void update_task_debugctlmsr(struct task_struct *task, | ||
935 | unsigned long debugctlmsr) | ||
936 | { | ||
937 | task->thread.debugctlmsr = debugctlmsr; | ||
938 | |||
939 | get_cpu(); | ||
940 | if (task == current) | ||
941 | update_debugctlmsr(debugctlmsr); | ||
942 | put_cpu(); | ||
943 | } | ||
944 | |||
764 | void ds_suspend_bts(struct bts_tracer *tracer) | 945 | void ds_suspend_bts(struct bts_tracer *tracer) |
765 | { | 946 | { |
766 | struct task_struct *task; | 947 | struct task_struct *task; |
948 | unsigned long debugctlmsr; | ||
949 | int cpu; | ||
767 | 950 | ||
768 | if (!tracer) | 951 | if (!tracer) |
769 | return; | 952 | return; |
770 | 953 | ||
954 | tracer->flags = 0; | ||
955 | |||
771 | task = tracer->ds.context->task; | 956 | task = tracer->ds.context->task; |
957 | cpu = tracer->ds.context->cpu; | ||
772 | 958 | ||
773 | if (!task || (task == current)) | 959 | WARN_ON(!task && irqs_disabled()); |
774 | update_debugctlmsr(get_debugctlmsr() & ~BTS_CONTROL); | ||
775 | 960 | ||
776 | if (task) { | 961 | debugctlmsr = (task ? |
777 | task->thread.debugctlmsr &= ~BTS_CONTROL; | 962 | task->thread.debugctlmsr : |
963 | get_debugctlmsr_on_cpu(cpu)); | ||
964 | debugctlmsr &= ~BTS_CONTROL; | ||
778 | 965 | ||
779 | if (!task->thread.debugctlmsr) | 966 | if (task) |
780 | clear_tsk_thread_flag(task, TIF_DEBUGCTLMSR); | 967 | update_task_debugctlmsr(task, debugctlmsr); |
781 | } | 968 | else |
969 | update_debugctlmsr_on_cpu(cpu, debugctlmsr); | ||
782 | } | 970 | } |
783 | 971 | ||
784 | void ds_resume_bts(struct bts_tracer *tracer) | 972 | int ds_suspend_bts_noirq(struct bts_tracer *tracer) |
785 | { | 973 | { |
786 | struct task_struct *task; | 974 | struct task_struct *task; |
787 | unsigned long control; | 975 | unsigned long debugctlmsr, irq; |
976 | int cpu, error = 0; | ||
788 | 977 | ||
789 | if (!tracer) | 978 | if (!tracer) |
790 | return; | 979 | return 0; |
980 | |||
981 | tracer->flags = 0; | ||
791 | 982 | ||
792 | task = tracer->ds.context->task; | 983 | task = tracer->ds.context->task; |
984 | cpu = tracer->ds.context->cpu; | ||
985 | |||
986 | local_irq_save(irq); | ||
987 | |||
988 | error = -EPERM; | ||
989 | if (!task && (cpu != smp_processor_id())) | ||
990 | goto out; | ||
991 | |||
992 | debugctlmsr = (task ? | ||
993 | task->thread.debugctlmsr : | ||
994 | get_debugctlmsr()); | ||
995 | debugctlmsr &= ~BTS_CONTROL; | ||
996 | |||
997 | if (task) | ||
998 | update_task_debugctlmsr(task, debugctlmsr); | ||
999 | else | ||
1000 | update_debugctlmsr(debugctlmsr); | ||
1001 | |||
1002 | error = 0; | ||
1003 | out: | ||
1004 | local_irq_restore(irq); | ||
1005 | return error; | ||
1006 | } | ||
1007 | |||
1008 | static unsigned long ds_bts_control(struct bts_tracer *tracer) | ||
1009 | { | ||
1010 | unsigned long control; | ||
793 | 1011 | ||
794 | control = ds_cfg.ctl[dsf_bts]; | 1012 | control = ds_cfg.ctl[dsf_bts]; |
795 | if (!(tracer->trace.ds.flags & BTS_KERNEL)) | 1013 | if (!(tracer->trace.ds.flags & BTS_KERNEL)) |
@@ -797,41 +1015,149 @@ void ds_resume_bts(struct bts_tracer *tracer) | |||
797 | if (!(tracer->trace.ds.flags & BTS_USER)) | 1015 | if (!(tracer->trace.ds.flags & BTS_USER)) |
798 | control |= ds_cfg.ctl[dsf_bts_user]; | 1016 | control |= ds_cfg.ctl[dsf_bts_user]; |
799 | 1017 | ||
800 | if (task) { | 1018 | return control; |
801 | task->thread.debugctlmsr |= control; | ||
802 | set_tsk_thread_flag(task, TIF_DEBUGCTLMSR); | ||
803 | } | ||
804 | |||
805 | if (!task || (task == current)) | ||
806 | update_debugctlmsr(get_debugctlmsr() | control); | ||
807 | } | 1019 | } |
808 | 1020 | ||
809 | void ds_release_pebs(struct pebs_tracer *tracer) | 1021 | void ds_resume_bts(struct bts_tracer *tracer) |
810 | { | 1022 | { |
1023 | struct task_struct *task; | ||
1024 | unsigned long debugctlmsr; | ||
1025 | int cpu; | ||
1026 | |||
811 | if (!tracer) | 1027 | if (!tracer) |
812 | return; | 1028 | return; |
813 | 1029 | ||
814 | ds_suspend_pebs(tracer); | 1030 | tracer->flags = tracer->trace.ds.flags; |
1031 | |||
1032 | task = tracer->ds.context->task; | ||
1033 | cpu = tracer->ds.context->cpu; | ||
1034 | |||
1035 | WARN_ON(!task && irqs_disabled()); | ||
1036 | |||
1037 | debugctlmsr = (task ? | ||
1038 | task->thread.debugctlmsr : | ||
1039 | get_debugctlmsr_on_cpu(cpu)); | ||
1040 | debugctlmsr |= ds_bts_control(tracer); | ||
1041 | |||
1042 | if (task) | ||
1043 | update_task_debugctlmsr(task, debugctlmsr); | ||
1044 | else | ||
1045 | update_debugctlmsr_on_cpu(cpu, debugctlmsr); | ||
1046 | } | ||
1047 | |||
1048 | int ds_resume_bts_noirq(struct bts_tracer *tracer) | ||
1049 | { | ||
1050 | struct task_struct *task; | ||
1051 | unsigned long debugctlmsr, irq; | ||
1052 | int cpu, error = 0; | ||
1053 | |||
1054 | if (!tracer) | ||
1055 | return 0; | ||
1056 | |||
1057 | tracer->flags = tracer->trace.ds.flags; | ||
1058 | |||
1059 | task = tracer->ds.context->task; | ||
1060 | cpu = tracer->ds.context->cpu; | ||
1061 | |||
1062 | local_irq_save(irq); | ||
1063 | |||
1064 | error = -EPERM; | ||
1065 | if (!task && (cpu != smp_processor_id())) | ||
1066 | goto out; | ||
1067 | |||
1068 | debugctlmsr = (task ? | ||
1069 | task->thread.debugctlmsr : | ||
1070 | get_debugctlmsr()); | ||
1071 | debugctlmsr |= ds_bts_control(tracer); | ||
1072 | |||
1073 | if (task) | ||
1074 | update_task_debugctlmsr(task, debugctlmsr); | ||
1075 | else | ||
1076 | update_debugctlmsr(debugctlmsr); | ||
1077 | |||
1078 | error = 0; | ||
1079 | out: | ||
1080 | local_irq_restore(irq); | ||
1081 | return error; | ||
1082 | } | ||
1083 | |||
1084 | static void ds_free_pebs(struct pebs_tracer *tracer) | ||
1085 | { | ||
1086 | struct task_struct *task; | ||
1087 | |||
1088 | task = tracer->ds.context->task; | ||
815 | 1089 | ||
816 | WARN_ON_ONCE(tracer->ds.context->pebs_master != tracer); | 1090 | WARN_ON_ONCE(tracer->ds.context->pebs_master != tracer); |
817 | tracer->ds.context->pebs_master = NULL; | 1091 | tracer->ds.context->pebs_master = NULL; |
818 | 1092 | ||
819 | put_tracer(tracer->ds.context->task); | ||
820 | ds_put_context(tracer->ds.context); | 1093 | ds_put_context(tracer->ds.context); |
1094 | put_tracer(task); | ||
821 | 1095 | ||
822 | kfree(tracer); | 1096 | kfree(tracer); |
823 | } | 1097 | } |
824 | 1098 | ||
1099 | void ds_release_pebs(struct pebs_tracer *tracer) | ||
1100 | { | ||
1101 | might_sleep(); | ||
1102 | |||
1103 | if (!tracer) | ||
1104 | return; | ||
1105 | |||
1106 | ds_suspend_pebs(tracer); | ||
1107 | ds_free_pebs(tracer); | ||
1108 | } | ||
1109 | |||
1110 | int ds_release_pebs_noirq(struct pebs_tracer *tracer) | ||
1111 | { | ||
1112 | struct task_struct *task; | ||
1113 | unsigned long irq; | ||
1114 | int error; | ||
1115 | |||
1116 | if (!tracer) | ||
1117 | return 0; | ||
1118 | |||
1119 | task = tracer->ds.context->task; | ||
1120 | |||
1121 | local_irq_save(irq); | ||
1122 | |||
1123 | error = -EPERM; | ||
1124 | if (!task && | ||
1125 | (tracer->ds.context->cpu != smp_processor_id())) | ||
1126 | goto out; | ||
1127 | |||
1128 | error = -EPERM; | ||
1129 | if (task && (task != current)) | ||
1130 | goto out; | ||
1131 | |||
1132 | ds_suspend_pebs_noirq(tracer); | ||
1133 | ds_free_pebs(tracer); | ||
1134 | |||
1135 | error = 0; | ||
1136 | out: | ||
1137 | local_irq_restore(irq); | ||
1138 | return error; | ||
1139 | } | ||
1140 | |||
825 | void ds_suspend_pebs(struct pebs_tracer *tracer) | 1141 | void ds_suspend_pebs(struct pebs_tracer *tracer) |
826 | { | 1142 | { |
827 | 1143 | ||
828 | } | 1144 | } |
829 | 1145 | ||
1146 | int ds_suspend_pebs_noirq(struct pebs_tracer *tracer) | ||
1147 | { | ||
1148 | return 0; | ||
1149 | } | ||
1150 | |||
830 | void ds_resume_pebs(struct pebs_tracer *tracer) | 1151 | void ds_resume_pebs(struct pebs_tracer *tracer) |
831 | { | 1152 | { |
832 | 1153 | ||
833 | } | 1154 | } |
834 | 1155 | ||
1156 | int ds_resume_pebs_noirq(struct pebs_tracer *tracer) | ||
1157 | { | ||
1158 | return 0; | ||
1159 | } | ||
1160 | |||
835 | const struct bts_trace *ds_read_bts(struct bts_tracer *tracer) | 1161 | const struct bts_trace *ds_read_bts(struct bts_tracer *tracer) |
836 | { | 1162 | { |
837 | if (!tracer) | 1163 | if (!tracer) |
@@ -847,8 +1173,12 @@ const struct pebs_trace *ds_read_pebs(struct pebs_tracer *tracer) | |||
847 | return NULL; | 1173 | return NULL; |
848 | 1174 | ||
849 | ds_read_config(tracer->ds.context, &tracer->trace.ds, ds_pebs); | 1175 | ds_read_config(tracer->ds.context, &tracer->trace.ds, ds_pebs); |
850 | tracer->trace.reset_value = | 1176 | |
851 | *(u64 *)(tracer->ds.context->ds + (ds_cfg.sizeof_field * 8)); | 1177 | tracer->trace.counters = ds_cfg.nr_counter_reset; |
1178 | memcpy(tracer->trace.counter_reset, | ||
1179 | tracer->ds.context->ds + | ||
1180 | (NUM_DS_PTR_FIELDS * ds_cfg.sizeof_ptr_field), | ||
1181 | ds_cfg.nr_counter_reset * PEBS_RESET_FIELD_SIZE); | ||
852 | 1182 | ||
853 | return &tracer->trace; | 1183 | return &tracer->trace; |
854 | } | 1184 | } |
@@ -873,18 +1203,24 @@ int ds_reset_pebs(struct pebs_tracer *tracer) | |||
873 | 1203 | ||
874 | tracer->trace.ds.top = tracer->trace.ds.begin; | 1204 | tracer->trace.ds.top = tracer->trace.ds.begin; |
875 | 1205 | ||
876 | ds_set(tracer->ds.context->ds, ds_bts, ds_index, | 1206 | ds_set(tracer->ds.context->ds, ds_pebs, ds_index, |
877 | (unsigned long)tracer->trace.ds.top); | 1207 | (unsigned long)tracer->trace.ds.top); |
878 | 1208 | ||
879 | return 0; | 1209 | return 0; |
880 | } | 1210 | } |
881 | 1211 | ||
882 | int ds_set_pebs_reset(struct pebs_tracer *tracer, u64 value) | 1212 | int ds_set_pebs_reset(struct pebs_tracer *tracer, |
1213 | unsigned int counter, u64 value) | ||
883 | { | 1214 | { |
884 | if (!tracer) | 1215 | if (!tracer) |
885 | return -EINVAL; | 1216 | return -EINVAL; |
886 | 1217 | ||
887 | *(u64 *)(tracer->ds.context->ds + (ds_cfg.sizeof_field * 8)) = value; | 1218 | if (ds_cfg.nr_counter_reset < counter) |
1219 | return -EINVAL; | ||
1220 | |||
1221 | *(u64 *)(tracer->ds.context->ds + | ||
1222 | (NUM_DS_PTR_FIELDS * ds_cfg.sizeof_ptr_field) + | ||
1223 | (counter * PEBS_RESET_FIELD_SIZE)) = value; | ||
888 | 1224 | ||
889 | return 0; | 1225 | return 0; |
890 | } | 1226 | } |
@@ -894,73 +1230,117 @@ static const struct ds_configuration ds_cfg_netburst = { | |||
894 | .ctl[dsf_bts] = (1 << 2) | (1 << 3), | 1230 | .ctl[dsf_bts] = (1 << 2) | (1 << 3), |
895 | .ctl[dsf_bts_kernel] = (1 << 5), | 1231 | .ctl[dsf_bts_kernel] = (1 << 5), |
896 | .ctl[dsf_bts_user] = (1 << 6), | 1232 | .ctl[dsf_bts_user] = (1 << 6), |
897 | 1233 | .nr_counter_reset = 1, | |
898 | .sizeof_field = sizeof(long), | ||
899 | .sizeof_rec[ds_bts] = sizeof(long) * 3, | ||
900 | #ifdef __i386__ | ||
901 | .sizeof_rec[ds_pebs] = sizeof(long) * 10, | ||
902 | #else | ||
903 | .sizeof_rec[ds_pebs] = sizeof(long) * 18, | ||
904 | #endif | ||
905 | }; | 1234 | }; |
906 | static const struct ds_configuration ds_cfg_pentium_m = { | 1235 | static const struct ds_configuration ds_cfg_pentium_m = { |
907 | .name = "Pentium M", | 1236 | .name = "Pentium M", |
908 | .ctl[dsf_bts] = (1 << 6) | (1 << 7), | 1237 | .ctl[dsf_bts] = (1 << 6) | (1 << 7), |
909 | 1238 | .nr_counter_reset = 1, | |
910 | .sizeof_field = sizeof(long), | ||
911 | .sizeof_rec[ds_bts] = sizeof(long) * 3, | ||
912 | #ifdef __i386__ | ||
913 | .sizeof_rec[ds_pebs] = sizeof(long) * 10, | ||
914 | #else | ||
915 | .sizeof_rec[ds_pebs] = sizeof(long) * 18, | ||
916 | #endif | ||
917 | }; | 1239 | }; |
918 | static const struct ds_configuration ds_cfg_core2_atom = { | 1240 | static const struct ds_configuration ds_cfg_core2_atom = { |
919 | .name = "Core 2/Atom", | 1241 | .name = "Core 2/Atom", |
920 | .ctl[dsf_bts] = (1 << 6) | (1 << 7), | 1242 | .ctl[dsf_bts] = (1 << 6) | (1 << 7), |
921 | .ctl[dsf_bts_kernel] = (1 << 9), | 1243 | .ctl[dsf_bts_kernel] = (1 << 9), |
922 | .ctl[dsf_bts_user] = (1 << 10), | 1244 | .ctl[dsf_bts_user] = (1 << 10), |
923 | 1245 | .nr_counter_reset = 1, | |
924 | .sizeof_field = 8, | 1246 | }; |
925 | .sizeof_rec[ds_bts] = 8 * 3, | 1247 | static const struct ds_configuration ds_cfg_core_i7 = { |
926 | .sizeof_rec[ds_pebs] = 8 * 18, | 1248 | .name = "Core i7", |
1249 | .ctl[dsf_bts] = (1 << 6) | (1 << 7), | ||
1250 | .ctl[dsf_bts_kernel] = (1 << 9), | ||
1251 | .ctl[dsf_bts_user] = (1 << 10), | ||
1252 | .nr_counter_reset = 4, | ||
927 | }; | 1253 | }; |
928 | 1254 | ||
929 | static void | 1255 | static void |
930 | ds_configure(const struct ds_configuration *cfg) | 1256 | ds_configure(const struct ds_configuration *cfg, |
1257 | struct cpuinfo_x86 *cpu) | ||
931 | { | 1258 | { |
1259 | unsigned long nr_pebs_fields = 0; | ||
1260 | |||
1261 | printk(KERN_INFO "[ds] using %s configuration\n", cfg->name); | ||
1262 | |||
1263 | #ifdef __i386__ | ||
1264 | nr_pebs_fields = 10; | ||
1265 | #else | ||
1266 | nr_pebs_fields = 18; | ||
1267 | #endif | ||
1268 | |||
1269 | /* | ||
1270 | * Starting with version 2, architectural performance | ||
1271 | * monitoring supports a format specifier. | ||
1272 | */ | ||
1273 | if ((cpuid_eax(0xa) & 0xff) > 1) { | ||
1274 | unsigned long perf_capabilities, format; | ||
1275 | |||
1276 | rdmsrl(MSR_IA32_PERF_CAPABILITIES, perf_capabilities); | ||
1277 | |||
1278 | format = (perf_capabilities >> 8) & 0xf; | ||
1279 | |||
1280 | switch (format) { | ||
1281 | case 0: | ||
1282 | nr_pebs_fields = 18; | ||
1283 | break; | ||
1284 | case 1: | ||
1285 | nr_pebs_fields = 22; | ||
1286 | break; | ||
1287 | default: | ||
1288 | printk(KERN_INFO | ||
1289 | "[ds] unknown PEBS format: %lu\n", format); | ||
1290 | nr_pebs_fields = 0; | ||
1291 | break; | ||
1292 | } | ||
1293 | } | ||
1294 | |||
932 | memset(&ds_cfg, 0, sizeof(ds_cfg)); | 1295 | memset(&ds_cfg, 0, sizeof(ds_cfg)); |
933 | ds_cfg = *cfg; | 1296 | ds_cfg = *cfg; |
934 | 1297 | ||
935 | printk(KERN_INFO "[ds] using %s configuration\n", ds_cfg.name); | 1298 | ds_cfg.sizeof_ptr_field = |
1299 | (cpu_has(cpu, X86_FEATURE_DTES64) ? 8 : 4); | ||
1300 | |||
1301 | ds_cfg.sizeof_rec[ds_bts] = ds_cfg.sizeof_ptr_field * 3; | ||
1302 | ds_cfg.sizeof_rec[ds_pebs] = ds_cfg.sizeof_ptr_field * nr_pebs_fields; | ||
936 | 1303 | ||
937 | if (!cpu_has_bts) { | 1304 | if (!cpu_has(cpu, X86_FEATURE_BTS)) { |
938 | ds_cfg.ctl[dsf_bts] = 0; | 1305 | ds_cfg.sizeof_rec[ds_bts] = 0; |
939 | printk(KERN_INFO "[ds] bts not available\n"); | 1306 | printk(KERN_INFO "[ds] bts not available\n"); |
940 | } | 1307 | } |
941 | if (!cpu_has_pebs) | 1308 | if (!cpu_has(cpu, X86_FEATURE_PEBS)) { |
1309 | ds_cfg.sizeof_rec[ds_pebs] = 0; | ||
942 | printk(KERN_INFO "[ds] pebs not available\n"); | 1310 | printk(KERN_INFO "[ds] pebs not available\n"); |
1311 | } | ||
1312 | |||
1313 | printk(KERN_INFO "[ds] sizes: address: %u bit, ", | ||
1314 | 8 * ds_cfg.sizeof_ptr_field); | ||
1315 | printk("bts/pebs record: %u/%u bytes\n", | ||
1316 | ds_cfg.sizeof_rec[ds_bts], ds_cfg.sizeof_rec[ds_pebs]); | ||
943 | 1317 | ||
944 | WARN_ON_ONCE(MAX_SIZEOF_DS < (12 * ds_cfg.sizeof_field)); | 1318 | WARN_ON_ONCE(MAX_PEBS_COUNTERS < ds_cfg.nr_counter_reset); |
945 | } | 1319 | } |
946 | 1320 | ||
947 | void __cpuinit ds_init_intel(struct cpuinfo_x86 *c) | 1321 | void __cpuinit ds_init_intel(struct cpuinfo_x86 *c) |
948 | { | 1322 | { |
1323 | /* Only configure the first cpu. Others are identical. */ | ||
1324 | if (ds_cfg.name) | ||
1325 | return; | ||
1326 | |||
949 | switch (c->x86) { | 1327 | switch (c->x86) { |
950 | case 0x6: | 1328 | case 0x6: |
951 | switch (c->x86_model) { | 1329 | switch (c->x86_model) { |
952 | case 0x9: | 1330 | case 0x9: |
953 | case 0xd: /* Pentium M */ | 1331 | case 0xd: /* Pentium M */ |
954 | ds_configure(&ds_cfg_pentium_m); | 1332 | ds_configure(&ds_cfg_pentium_m, c); |
955 | break; | 1333 | break; |
956 | case 0xf: | 1334 | case 0xf: |
957 | case 0x17: /* Core2 */ | 1335 | case 0x17: /* Core2 */ |
958 | case 0x1c: /* Atom */ | 1336 | case 0x1c: /* Atom */ |
959 | ds_configure(&ds_cfg_core2_atom); | 1337 | ds_configure(&ds_cfg_core2_atom, c); |
1338 | break; | ||
1339 | case 0x1a: /* Core i7 */ | ||
1340 | ds_configure(&ds_cfg_core_i7, c); | ||
960 | break; | 1341 | break; |
961 | case 0x1a: /* i7 */ | ||
962 | default: | 1342 | default: |
963 | /* sorry, don't know about them */ | 1343 | /* Sorry, don't know about them. */ |
964 | break; | 1344 | break; |
965 | } | 1345 | } |
966 | break; | 1346 | break; |
@@ -969,64 +1349,89 @@ void __cpuinit ds_init_intel(struct cpuinfo_x86 *c) | |||
969 | case 0x0: | 1349 | case 0x0: |
970 | case 0x1: | 1350 | case 0x1: |
971 | case 0x2: /* Netburst */ | 1351 | case 0x2: /* Netburst */ |
972 | ds_configure(&ds_cfg_netburst); | 1352 | ds_configure(&ds_cfg_netburst, c); |
973 | break; | 1353 | break; |
974 | default: | 1354 | default: |
975 | /* sorry, don't know about them */ | 1355 | /* Sorry, don't know about them. */ |
976 | break; | 1356 | break; |
977 | } | 1357 | } |
978 | break; | 1358 | break; |
979 | default: | 1359 | default: |
980 | /* sorry, don't know about them */ | 1360 | /* Sorry, don't know about them. */ |
981 | break; | 1361 | break; |
982 | } | 1362 | } |
983 | } | 1363 | } |
984 | 1364 | ||
1365 | static inline void ds_take_timestamp(struct ds_context *context, | ||
1366 | enum bts_qualifier qualifier, | ||
1367 | struct task_struct *task) | ||
1368 | { | ||
1369 | struct bts_tracer *tracer = context->bts_master; | ||
1370 | struct bts_struct ts; | ||
1371 | |||
1372 | /* Prevent compilers from reading the tracer pointer twice. */ | ||
1373 | barrier(); | ||
1374 | |||
1375 | if (!tracer || !(tracer->flags & BTS_TIMESTAMPS)) | ||
1376 | return; | ||
1377 | |||
1378 | memset(&ts, 0, sizeof(ts)); | ||
1379 | ts.qualifier = qualifier; | ||
1380 | ts.variant.event.clock = trace_clock_global(); | ||
1381 | ts.variant.event.pid = task->pid; | ||
1382 | |||
1383 | bts_write(tracer, &ts); | ||
1384 | } | ||
1385 | |||
985 | /* | 1386 | /* |
986 | * Change the DS configuration from tracing prev to tracing next. | 1387 | * Change the DS configuration from tracing prev to tracing next. |
987 | */ | 1388 | */ |
988 | void ds_switch_to(struct task_struct *prev, struct task_struct *next) | 1389 | void ds_switch_to(struct task_struct *prev, struct task_struct *next) |
989 | { | 1390 | { |
990 | struct ds_context *prev_ctx = prev->thread.ds_ctx; | 1391 | struct ds_context *prev_ctx = prev->thread.ds_ctx; |
991 | struct ds_context *next_ctx = next->thread.ds_ctx; | 1392 | struct ds_context *next_ctx = next->thread.ds_ctx; |
1393 | unsigned long debugctlmsr = next->thread.debugctlmsr; | ||
1394 | |||
1395 | /* Make sure all data is read before we start. */ | ||
1396 | barrier(); | ||
992 | 1397 | ||
993 | if (prev_ctx) { | 1398 | if (prev_ctx) { |
994 | update_debugctlmsr(0); | 1399 | update_debugctlmsr(0); |
995 | 1400 | ||
996 | if (prev_ctx->bts_master && | 1401 | ds_take_timestamp(prev_ctx, bts_task_departs, prev); |
997 | (prev_ctx->bts_master->trace.ds.flags & BTS_TIMESTAMPS)) { | ||
998 | struct bts_struct ts = { | ||
999 | .qualifier = bts_task_departs, | ||
1000 | .variant.timestamp.jiffies = jiffies_64, | ||
1001 | .variant.timestamp.pid = prev->pid | ||
1002 | }; | ||
1003 | bts_write(prev_ctx->bts_master, &ts); | ||
1004 | } | ||
1005 | } | 1402 | } |
1006 | 1403 | ||
1007 | if (next_ctx) { | 1404 | if (next_ctx) { |
1008 | if (next_ctx->bts_master && | 1405 | ds_take_timestamp(next_ctx, bts_task_arrives, next); |
1009 | (next_ctx->bts_master->trace.ds.flags & BTS_TIMESTAMPS)) { | ||
1010 | struct bts_struct ts = { | ||
1011 | .qualifier = bts_task_arrives, | ||
1012 | .variant.timestamp.jiffies = jiffies_64, | ||
1013 | .variant.timestamp.pid = next->pid | ||
1014 | }; | ||
1015 | bts_write(next_ctx->bts_master, &ts); | ||
1016 | } | ||
1017 | 1406 | ||
1018 | wrmsrl(MSR_IA32_DS_AREA, (unsigned long)next_ctx->ds); | 1407 | wrmsrl(MSR_IA32_DS_AREA, (unsigned long)next_ctx->ds); |
1019 | } | 1408 | } |
1020 | 1409 | ||
1021 | update_debugctlmsr(next->thread.debugctlmsr); | 1410 | update_debugctlmsr(debugctlmsr); |
1022 | } | 1411 | } |
1023 | 1412 | ||
1024 | void ds_copy_thread(struct task_struct *tsk, struct task_struct *father) | 1413 | static __init int ds_selftest(void) |
1025 | { | 1414 | { |
1026 | clear_tsk_thread_flag(tsk, TIF_DS_AREA_MSR); | 1415 | if (ds_cfg.sizeof_rec[ds_bts]) { |
1027 | tsk->thread.ds_ctx = NULL; | 1416 | int error; |
1028 | } | ||
1029 | 1417 | ||
1030 | void ds_exit_thread(struct task_struct *tsk) | 1418 | error = ds_selftest_bts(); |
1031 | { | 1419 | if (error) { |
1420 | WARN(1, "[ds] selftest failed. disabling bts.\n"); | ||
1421 | ds_cfg.sizeof_rec[ds_bts] = 0; | ||
1422 | } | ||
1423 | } | ||
1424 | |||
1425 | if (ds_cfg.sizeof_rec[ds_pebs]) { | ||
1426 | int error; | ||
1427 | |||
1428 | error = ds_selftest_pebs(); | ||
1429 | if (error) { | ||
1430 | WARN(1, "[ds] selftest failed. disabling pebs.\n"); | ||
1431 | ds_cfg.sizeof_rec[ds_pebs] = 0; | ||
1432 | } | ||
1433 | } | ||
1434 | |||
1435 | return 0; | ||
1032 | } | 1436 | } |
1437 | device_initcall(ds_selftest); | ||
diff --git a/arch/x86/kernel/ds_selftest.c b/arch/x86/kernel/ds_selftest.c new file mode 100644 index 000000000000..6bc7c199ab99 --- /dev/null +++ b/arch/x86/kernel/ds_selftest.c | |||
@@ -0,0 +1,408 @@ | |||
1 | /* | ||
2 | * Debug Store support - selftest | ||
3 | * | ||
4 | * | ||
5 | * Copyright (C) 2009 Intel Corporation. | ||
6 | * Markus Metzger <markus.t.metzger@intel.com>, 2009 | ||
7 | */ | ||
8 | |||
9 | #include "ds_selftest.h" | ||
10 | |||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/string.h> | ||
13 | #include <linux/smp.h> | ||
14 | #include <linux/cpu.h> | ||
15 | |||
16 | #include <asm/ds.h> | ||
17 | |||
18 | |||
19 | #define BUFFER_SIZE 521 /* Intentionally chose an odd size. */ | ||
20 | #define SMALL_BUFFER_SIZE 24 /* A single bts entry. */ | ||
21 | |||
22 | struct ds_selftest_bts_conf { | ||
23 | struct bts_tracer *tracer; | ||
24 | int error; | ||
25 | int (*suspend)(struct bts_tracer *); | ||
26 | int (*resume)(struct bts_tracer *); | ||
27 | }; | ||
28 | |||
29 | static int ds_selftest_bts_consistency(const struct bts_trace *trace) | ||
30 | { | ||
31 | int error = 0; | ||
32 | |||
33 | if (!trace) { | ||
34 | printk(KERN_CONT "failed to access trace..."); | ||
35 | /* Bail out. Other tests are pointless. */ | ||
36 | return -1; | ||
37 | } | ||
38 | |||
39 | if (!trace->read) { | ||
40 | printk(KERN_CONT "bts read not available..."); | ||
41 | error = -1; | ||
42 | } | ||
43 | |||
44 | /* Do some sanity checks on the trace configuration. */ | ||
45 | if (!trace->ds.n) { | ||
46 | printk(KERN_CONT "empty bts buffer..."); | ||
47 | error = -1; | ||
48 | } | ||
49 | if (!trace->ds.size) { | ||
50 | printk(KERN_CONT "bad bts trace setup..."); | ||
51 | error = -1; | ||
52 | } | ||
53 | if (trace->ds.end != | ||
54 | (char *)trace->ds.begin + (trace->ds.n * trace->ds.size)) { | ||
55 | printk(KERN_CONT "bad bts buffer setup..."); | ||
56 | error = -1; | ||
57 | } | ||
58 | /* | ||
59 | * We allow top in [begin; end], since its not clear when the | ||
60 | * overflow adjustment happens: after the increment or before the | ||
61 | * write. | ||
62 | */ | ||
63 | if ((trace->ds.top < trace->ds.begin) || | ||
64 | (trace->ds.end < trace->ds.top)) { | ||
65 | printk(KERN_CONT "bts top out of bounds..."); | ||
66 | error = -1; | ||
67 | } | ||
68 | |||
69 | return error; | ||
70 | } | ||
71 | |||
72 | static int ds_selftest_bts_read(struct bts_tracer *tracer, | ||
73 | const struct bts_trace *trace, | ||
74 | const void *from, const void *to) | ||
75 | { | ||
76 | const unsigned char *at; | ||
77 | |||
78 | /* | ||
79 | * Check a few things which do not belong to this test. | ||
80 | * They should be covered by other tests. | ||
81 | */ | ||
82 | if (!trace) | ||
83 | return -1; | ||
84 | |||
85 | if (!trace->read) | ||
86 | return -1; | ||
87 | |||
88 | if (to < from) | ||
89 | return -1; | ||
90 | |||
91 | if (from < trace->ds.begin) | ||
92 | return -1; | ||
93 | |||
94 | if (trace->ds.end < to) | ||
95 | return -1; | ||
96 | |||
97 | if (!trace->ds.size) | ||
98 | return -1; | ||
99 | |||
100 | /* Now to the test itself. */ | ||
101 | for (at = from; (void *)at < to; at += trace->ds.size) { | ||
102 | struct bts_struct bts; | ||
103 | unsigned long index; | ||
104 | int error; | ||
105 | |||
106 | if (((void *)at - trace->ds.begin) % trace->ds.size) { | ||
107 | printk(KERN_CONT | ||
108 | "read from non-integer index..."); | ||
109 | return -1; | ||
110 | } | ||
111 | index = ((void *)at - trace->ds.begin) / trace->ds.size; | ||
112 | |||
113 | memset(&bts, 0, sizeof(bts)); | ||
114 | error = trace->read(tracer, at, &bts); | ||
115 | if (error < 0) { | ||
116 | printk(KERN_CONT | ||
117 | "error reading bts trace at [%lu] (0x%p)...", | ||
118 | index, at); | ||
119 | return error; | ||
120 | } | ||
121 | |||
122 | switch (bts.qualifier) { | ||
123 | case BTS_BRANCH: | ||
124 | break; | ||
125 | default: | ||
126 | printk(KERN_CONT | ||
127 | "unexpected bts entry %llu at [%lu] (0x%p)...", | ||
128 | bts.qualifier, index, at); | ||
129 | return -1; | ||
130 | } | ||
131 | } | ||
132 | |||
133 | return 0; | ||
134 | } | ||
135 | |||
136 | static void ds_selftest_bts_cpu(void *arg) | ||
137 | { | ||
138 | struct ds_selftest_bts_conf *conf = arg; | ||
139 | const struct bts_trace *trace; | ||
140 | void *top; | ||
141 | |||
142 | if (IS_ERR(conf->tracer)) { | ||
143 | conf->error = PTR_ERR(conf->tracer); | ||
144 | conf->tracer = NULL; | ||
145 | |||
146 | printk(KERN_CONT | ||
147 | "initialization failed (err: %d)...", conf->error); | ||
148 | return; | ||
149 | } | ||
150 | |||
151 | /* We should meanwhile have enough trace. */ | ||
152 | conf->error = conf->suspend(conf->tracer); | ||
153 | if (conf->error < 0) | ||
154 | return; | ||
155 | |||
156 | /* Let's see if we can access the trace. */ | ||
157 | trace = ds_read_bts(conf->tracer); | ||
158 | |||
159 | conf->error = ds_selftest_bts_consistency(trace); | ||
160 | if (conf->error < 0) | ||
161 | return; | ||
162 | |||
163 | /* If everything went well, we should have a few trace entries. */ | ||
164 | if (trace->ds.top == trace->ds.begin) { | ||
165 | /* | ||
166 | * It is possible but highly unlikely that we got a | ||
167 | * buffer overflow and end up at exactly the same | ||
168 | * position we started from. | ||
169 | * Let's issue a warning, but continue. | ||
170 | */ | ||
171 | printk(KERN_CONT "no trace/overflow..."); | ||
172 | } | ||
173 | |||
174 | /* Let's try to read the trace we collected. */ | ||
175 | conf->error = | ||
176 | ds_selftest_bts_read(conf->tracer, trace, | ||
177 | trace->ds.begin, trace->ds.top); | ||
178 | if (conf->error < 0) | ||
179 | return; | ||
180 | |||
181 | /* | ||
182 | * Let's read the trace again. | ||
183 | * Since we suspended tracing, we should get the same result. | ||
184 | */ | ||
185 | top = trace->ds.top; | ||
186 | |||
187 | trace = ds_read_bts(conf->tracer); | ||
188 | conf->error = ds_selftest_bts_consistency(trace); | ||
189 | if (conf->error < 0) | ||
190 | return; | ||
191 | |||
192 | if (top != trace->ds.top) { | ||
193 | printk(KERN_CONT "suspend not working..."); | ||
194 | conf->error = -1; | ||
195 | return; | ||
196 | } | ||
197 | |||
198 | /* Let's collect some more trace - see if resume is working. */ | ||
199 | conf->error = conf->resume(conf->tracer); | ||
200 | if (conf->error < 0) | ||
201 | return; | ||
202 | |||
203 | conf->error = conf->suspend(conf->tracer); | ||
204 | if (conf->error < 0) | ||
205 | return; | ||
206 | |||
207 | trace = ds_read_bts(conf->tracer); | ||
208 | |||
209 | conf->error = ds_selftest_bts_consistency(trace); | ||
210 | if (conf->error < 0) | ||
211 | return; | ||
212 | |||
213 | if (trace->ds.top == top) { | ||
214 | /* | ||
215 | * It is possible but highly unlikely that we got a | ||
216 | * buffer overflow and end up at exactly the same | ||
217 | * position we started from. | ||
218 | * Let's issue a warning and check the full trace. | ||
219 | */ | ||
220 | printk(KERN_CONT | ||
221 | "no resume progress/overflow..."); | ||
222 | |||
223 | conf->error = | ||
224 | ds_selftest_bts_read(conf->tracer, trace, | ||
225 | trace->ds.begin, trace->ds.end); | ||
226 | } else if (trace->ds.top < top) { | ||
227 | /* | ||
228 | * We had a buffer overflow - the entire buffer should | ||
229 | * contain trace records. | ||
230 | */ | ||
231 | conf->error = | ||
232 | ds_selftest_bts_read(conf->tracer, trace, | ||
233 | trace->ds.begin, trace->ds.end); | ||
234 | } else { | ||
235 | /* | ||
236 | * It is quite likely that the buffer did not overflow. | ||
237 | * Let's just check the delta trace. | ||
238 | */ | ||
239 | conf->error = | ||
240 | ds_selftest_bts_read(conf->tracer, trace, top, | ||
241 | trace->ds.top); | ||
242 | } | ||
243 | if (conf->error < 0) | ||
244 | return; | ||
245 | |||
246 | conf->error = 0; | ||
247 | } | ||
248 | |||
249 | static int ds_suspend_bts_wrap(struct bts_tracer *tracer) | ||
250 | { | ||
251 | ds_suspend_bts(tracer); | ||
252 | return 0; | ||
253 | } | ||
254 | |||
255 | static int ds_resume_bts_wrap(struct bts_tracer *tracer) | ||
256 | { | ||
257 | ds_resume_bts(tracer); | ||
258 | return 0; | ||
259 | } | ||
260 | |||
261 | static void ds_release_bts_noirq_wrap(void *tracer) | ||
262 | { | ||
263 | (void)ds_release_bts_noirq(tracer); | ||
264 | } | ||
265 | |||
266 | static int ds_selftest_bts_bad_release_noirq(int cpu, | ||
267 | struct bts_tracer *tracer) | ||
268 | { | ||
269 | int error = -EPERM; | ||
270 | |||
271 | /* Try to release the tracer on the wrong cpu. */ | ||
272 | get_cpu(); | ||
273 | if (cpu != smp_processor_id()) { | ||
274 | error = ds_release_bts_noirq(tracer); | ||
275 | if (error != -EPERM) | ||
276 | printk(KERN_CONT "release on wrong cpu..."); | ||
277 | } | ||
278 | put_cpu(); | ||
279 | |||
280 | return error ? 0 : -1; | ||
281 | } | ||
282 | |||
283 | static int ds_selftest_bts_bad_request_cpu(int cpu, void *buffer) | ||
284 | { | ||
285 | struct bts_tracer *tracer; | ||
286 | int error; | ||
287 | |||
288 | /* Try to request cpu tracing while task tracing is active. */ | ||
289 | tracer = ds_request_bts_cpu(cpu, buffer, BUFFER_SIZE, NULL, | ||
290 | (size_t)-1, BTS_KERNEL); | ||
291 | error = PTR_ERR(tracer); | ||
292 | if (!IS_ERR(tracer)) { | ||
293 | ds_release_bts(tracer); | ||
294 | error = 0; | ||
295 | } | ||
296 | |||
297 | if (error != -EPERM) | ||
298 | printk(KERN_CONT "cpu/task tracing overlap..."); | ||
299 | |||
300 | return error ? 0 : -1; | ||
301 | } | ||
302 | |||
303 | static int ds_selftest_bts_bad_request_task(void *buffer) | ||
304 | { | ||
305 | struct bts_tracer *tracer; | ||
306 | int error; | ||
307 | |||
308 | /* Try to request cpu tracing while task tracing is active. */ | ||
309 | tracer = ds_request_bts_task(current, buffer, BUFFER_SIZE, NULL, | ||
310 | (size_t)-1, BTS_KERNEL); | ||
311 | error = PTR_ERR(tracer); | ||
312 | if (!IS_ERR(tracer)) { | ||
313 | error = 0; | ||
314 | ds_release_bts(tracer); | ||
315 | } | ||
316 | |||
317 | if (error != -EPERM) | ||
318 | printk(KERN_CONT "task/cpu tracing overlap..."); | ||
319 | |||
320 | return error ? 0 : -1; | ||
321 | } | ||
322 | |||
323 | int ds_selftest_bts(void) | ||
324 | { | ||
325 | struct ds_selftest_bts_conf conf; | ||
326 | unsigned char buffer[BUFFER_SIZE], *small_buffer; | ||
327 | unsigned long irq; | ||
328 | int cpu; | ||
329 | |||
330 | printk(KERN_INFO "[ds] bts selftest..."); | ||
331 | conf.error = 0; | ||
332 | |||
333 | small_buffer = (unsigned char *)ALIGN((unsigned long)buffer, 8) + 8; | ||
334 | |||
335 | get_online_cpus(); | ||
336 | for_each_online_cpu(cpu) { | ||
337 | conf.suspend = ds_suspend_bts_wrap; | ||
338 | conf.resume = ds_resume_bts_wrap; | ||
339 | conf.tracer = | ||
340 | ds_request_bts_cpu(cpu, buffer, BUFFER_SIZE, | ||
341 | NULL, (size_t)-1, BTS_KERNEL); | ||
342 | ds_selftest_bts_cpu(&conf); | ||
343 | if (conf.error >= 0) | ||
344 | conf.error = ds_selftest_bts_bad_request_task(buffer); | ||
345 | ds_release_bts(conf.tracer); | ||
346 | if (conf.error < 0) | ||
347 | goto out; | ||
348 | |||
349 | conf.suspend = ds_suspend_bts_noirq; | ||
350 | conf.resume = ds_resume_bts_noirq; | ||
351 | conf.tracer = | ||
352 | ds_request_bts_cpu(cpu, buffer, BUFFER_SIZE, | ||
353 | NULL, (size_t)-1, BTS_KERNEL); | ||
354 | smp_call_function_single(cpu, ds_selftest_bts_cpu, &conf, 1); | ||
355 | if (conf.error >= 0) { | ||
356 | conf.error = | ||
357 | ds_selftest_bts_bad_release_noirq(cpu, | ||
358 | conf.tracer); | ||
359 | /* We must not release the tracer twice. */ | ||
360 | if (conf.error < 0) | ||
361 | conf.tracer = NULL; | ||
362 | } | ||
363 | if (conf.error >= 0) | ||
364 | conf.error = ds_selftest_bts_bad_request_task(buffer); | ||
365 | smp_call_function_single(cpu, ds_release_bts_noirq_wrap, | ||
366 | conf.tracer, 1); | ||
367 | if (conf.error < 0) | ||
368 | goto out; | ||
369 | } | ||
370 | |||
371 | conf.suspend = ds_suspend_bts_wrap; | ||
372 | conf.resume = ds_resume_bts_wrap; | ||
373 | conf.tracer = | ||
374 | ds_request_bts_task(current, buffer, BUFFER_SIZE, | ||
375 | NULL, (size_t)-1, BTS_KERNEL); | ||
376 | ds_selftest_bts_cpu(&conf); | ||
377 | if (conf.error >= 0) | ||
378 | conf.error = ds_selftest_bts_bad_request_cpu(0, buffer); | ||
379 | ds_release_bts(conf.tracer); | ||
380 | if (conf.error < 0) | ||
381 | goto out; | ||
382 | |||
383 | conf.suspend = ds_suspend_bts_noirq; | ||
384 | conf.resume = ds_resume_bts_noirq; | ||
385 | conf.tracer = | ||
386 | ds_request_bts_task(current, small_buffer, SMALL_BUFFER_SIZE, | ||
387 | NULL, (size_t)-1, BTS_KERNEL); | ||
388 | local_irq_save(irq); | ||
389 | ds_selftest_bts_cpu(&conf); | ||
390 | if (conf.error >= 0) | ||
391 | conf.error = ds_selftest_bts_bad_request_cpu(0, buffer); | ||
392 | ds_release_bts_noirq(conf.tracer); | ||
393 | local_irq_restore(irq); | ||
394 | if (conf.error < 0) | ||
395 | goto out; | ||
396 | |||
397 | conf.error = 0; | ||
398 | out: | ||
399 | put_online_cpus(); | ||
400 | printk(KERN_CONT "%s.\n", (conf.error ? "failed" : "passed")); | ||
401 | |||
402 | return conf.error; | ||
403 | } | ||
404 | |||
405 | int ds_selftest_pebs(void) | ||
406 | { | ||
407 | return 0; | ||
408 | } | ||
diff --git a/arch/x86/kernel/ds_selftest.h b/arch/x86/kernel/ds_selftest.h new file mode 100644 index 000000000000..2ba8745c6663 --- /dev/null +++ b/arch/x86/kernel/ds_selftest.h | |||
@@ -0,0 +1,15 @@ | |||
1 | /* | ||
2 | * Debug Store support - selftest | ||
3 | * | ||
4 | * | ||
5 | * Copyright (C) 2009 Intel Corporation. | ||
6 | * Markus Metzger <markus.t.metzger@intel.com>, 2009 | ||
7 | */ | ||
8 | |||
9 | #ifdef CONFIG_X86_DS_SELFTEST | ||
10 | extern int ds_selftest_bts(void); | ||
11 | extern int ds_selftest_pebs(void); | ||
12 | #else | ||
13 | static inline int ds_selftest_bts(void) { return 0; } | ||
14 | static inline int ds_selftest_pebs(void) { return 0; } | ||
15 | #endif | ||
diff --git a/arch/x86/kernel/dumpstack.h b/arch/x86/kernel/dumpstack.h index da87590b8698..81086c227ab7 100644 --- a/arch/x86/kernel/dumpstack.h +++ b/arch/x86/kernel/dumpstack.h | |||
@@ -29,7 +29,6 @@ show_stack_log_lvl(struct task_struct *task, struct pt_regs *regs, | |||
29 | unsigned long *sp, unsigned long bp, char *log_lvl); | 29 | unsigned long *sp, unsigned long bp, char *log_lvl); |
30 | 30 | ||
31 | extern unsigned int code_bytes; | 31 | extern unsigned int code_bytes; |
32 | extern int kstack_depth_to_print; | ||
33 | 32 | ||
34 | /* The form of the top of the frame on the stack */ | 33 | /* The form of the top of the frame on the stack */ |
35 | struct stack_frame { | 34 | struct stack_frame { |
diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c index 006281302925..7271fa33d791 100644 --- a/arch/x86/kernel/e820.c +++ b/arch/x86/kernel/e820.c | |||
@@ -617,7 +617,7 @@ __init int e820_search_gap(unsigned long *gapstart, unsigned long *gapsize, | |||
617 | */ | 617 | */ |
618 | __init void e820_setup_gap(void) | 618 | __init void e820_setup_gap(void) |
619 | { | 619 | { |
620 | unsigned long gapstart, gapsize, round; | 620 | unsigned long gapstart, gapsize; |
621 | int found; | 621 | int found; |
622 | 622 | ||
623 | gapstart = 0x10000000; | 623 | gapstart = 0x10000000; |
@@ -635,14 +635,9 @@ __init void e820_setup_gap(void) | |||
635 | #endif | 635 | #endif |
636 | 636 | ||
637 | /* | 637 | /* |
638 | * See how much we want to round up: start off with | 638 | * e820_reserve_resources_late protect stolen RAM already |
639 | * rounding to the next 1MB area. | ||
640 | */ | 639 | */ |
641 | round = 0x100000; | 640 | pci_mem_start = gapstart; |
642 | while ((gapsize >> 4) > round) | ||
643 | round += round; | ||
644 | /* Fun with two's complement */ | ||
645 | pci_mem_start = (gapstart + round) & -round; | ||
646 | 641 | ||
647 | printk(KERN_INFO | 642 | printk(KERN_INFO |
648 | "Allocating PCI resources starting at %lx (gap: %lx:%lx)\n", | 643 | "Allocating PCI resources starting at %lx (gap: %lx:%lx)\n", |
@@ -1371,6 +1366,23 @@ void __init e820_reserve_resources(void) | |||
1371 | } | 1366 | } |
1372 | } | 1367 | } |
1373 | 1368 | ||
1369 | /* How much should we pad RAM ending depending on where it is? */ | ||
1370 | static unsigned long ram_alignment(resource_size_t pos) | ||
1371 | { | ||
1372 | unsigned long mb = pos >> 20; | ||
1373 | |||
1374 | /* To 64kB in the first megabyte */ | ||
1375 | if (!mb) | ||
1376 | return 64*1024; | ||
1377 | |||
1378 | /* To 1MB in the first 16MB */ | ||
1379 | if (mb < 16) | ||
1380 | return 1024*1024; | ||
1381 | |||
1382 | /* To 32MB for anything above that */ | ||
1383 | return 32*1024*1024; | ||
1384 | } | ||
1385 | |||
1374 | void __init e820_reserve_resources_late(void) | 1386 | void __init e820_reserve_resources_late(void) |
1375 | { | 1387 | { |
1376 | int i; | 1388 | int i; |
@@ -1382,6 +1394,24 @@ void __init e820_reserve_resources_late(void) | |||
1382 | insert_resource_expand_to_fit(&iomem_resource, res); | 1394 | insert_resource_expand_to_fit(&iomem_resource, res); |
1383 | res++; | 1395 | res++; |
1384 | } | 1396 | } |
1397 | |||
1398 | /* | ||
1399 | * Try to bump up RAM regions to reasonable boundaries to | ||
1400 | * avoid stolen RAM: | ||
1401 | */ | ||
1402 | for (i = 0; i < e820.nr_map; i++) { | ||
1403 | struct e820entry *entry = &e820_saved.map[i]; | ||
1404 | resource_size_t start, end; | ||
1405 | |||
1406 | if (entry->type != E820_RAM) | ||
1407 | continue; | ||
1408 | start = entry->addr + entry->size; | ||
1409 | end = round_up(start, ram_alignment(start)); | ||
1410 | if (start == end) | ||
1411 | continue; | ||
1412 | reserve_region_with_split(&iomem_resource, start, | ||
1413 | end - 1, "RAM buffer"); | ||
1414 | } | ||
1385 | } | 1415 | } |
1386 | 1416 | ||
1387 | char *__init default_machine_specific_memory_setup(void) | 1417 | char *__init default_machine_specific_memory_setup(void) |
diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c index 76b8cd953dee..ebdb85cf2686 100644 --- a/arch/x86/kernel/early-quirks.c +++ b/arch/x86/kernel/early-quirks.c | |||
@@ -97,6 +97,7 @@ static void __init nvidia_bugs(int num, int slot, int func) | |||
97 | } | 97 | } |
98 | 98 | ||
99 | #if defined(CONFIG_ACPI) && defined(CONFIG_X86_IO_APIC) | 99 | #if defined(CONFIG_ACPI) && defined(CONFIG_X86_IO_APIC) |
100 | #if defined(CONFIG_ACPI) && defined(CONFIG_X86_IO_APIC) | ||
100 | static u32 __init ati_ixp4x0_rev(int num, int slot, int func) | 101 | static u32 __init ati_ixp4x0_rev(int num, int slot, int func) |
101 | { | 102 | { |
102 | u32 d; | 103 | u32 d; |
@@ -114,6 +115,7 @@ static u32 __init ati_ixp4x0_rev(int num, int slot, int func) | |||
114 | d &= 0xff; | 115 | d &= 0xff; |
115 | return d; | 116 | return d; |
116 | } | 117 | } |
118 | #endif | ||
117 | 119 | ||
118 | static void __init ati_bugs(int num, int slot, int func) | 120 | static void __init ati_bugs(int num, int slot, int func) |
119 | { | 121 | { |
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S index 7985c010f8ac..a4742a340d8d 100644 --- a/arch/x86/kernel/entry_64.S +++ b/arch/x86/kernel/entry_64.S | |||
@@ -147,27 +147,14 @@ END(ftrace_graph_caller) | |||
147 | GLOBAL(return_to_handler) | 147 | GLOBAL(return_to_handler) |
148 | subq $80, %rsp | 148 | subq $80, %rsp |
149 | 149 | ||
150 | /* Save the return values */ | ||
150 | movq %rax, (%rsp) | 151 | movq %rax, (%rsp) |
151 | movq %rcx, 8(%rsp) | 152 | movq %rdx, 8(%rsp) |
152 | movq %rdx, 16(%rsp) | ||
153 | movq %rsi, 24(%rsp) | ||
154 | movq %rdi, 32(%rsp) | ||
155 | movq %r8, 40(%rsp) | ||
156 | movq %r9, 48(%rsp) | ||
157 | movq %r10, 56(%rsp) | ||
158 | movq %r11, 64(%rsp) | ||
159 | 153 | ||
160 | call ftrace_return_to_handler | 154 | call ftrace_return_to_handler |
161 | 155 | ||
162 | movq %rax, 72(%rsp) | 156 | movq %rax, 72(%rsp) |
163 | movq 64(%rsp), %r11 | 157 | movq 8(%rsp), %rdx |
164 | movq 56(%rsp), %r10 | ||
165 | movq 48(%rsp), %r9 | ||
166 | movq 40(%rsp), %r8 | ||
167 | movq 32(%rsp), %rdi | ||
168 | movq 24(%rsp), %rsi | ||
169 | movq 16(%rsp), %rdx | ||
170 | movq 8(%rsp), %rcx | ||
171 | movq (%rsp), %rax | 158 | movq (%rsp), %rax |
172 | addq $72, %rsp | 159 | addq $72, %rsp |
173 | retq | 160 | retq |
@@ -1384,6 +1371,11 @@ END(xen_failsafe_callback) | |||
1384 | paranoidzeroentry_ist debug do_debug DEBUG_STACK | 1371 | paranoidzeroentry_ist debug do_debug DEBUG_STACK |
1385 | paranoidzeroentry_ist int3 do_int3 DEBUG_STACK | 1372 | paranoidzeroentry_ist int3 do_int3 DEBUG_STACK |
1386 | paranoiderrorentry stack_segment do_stack_segment | 1373 | paranoiderrorentry stack_segment do_stack_segment |
1374 | #ifdef CONFIG_XEN | ||
1375 | zeroentry xen_debug do_debug | ||
1376 | zeroentry xen_int3 do_int3 | ||
1377 | errorentry xen_stack_segment do_stack_segment | ||
1378 | #endif | ||
1387 | errorentry general_protection do_general_protection | 1379 | errorentry general_protection do_general_protection |
1388 | errorentry page_fault do_page_fault | 1380 | errorentry page_fault do_page_fault |
1389 | #ifdef CONFIG_X86_MCE | 1381 | #ifdef CONFIG_X86_MCE |
diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S index 30683883e0cd..dc5ed4bdd88d 100644 --- a/arch/x86/kernel/head_32.S +++ b/arch/x86/kernel/head_32.S | |||
@@ -608,13 +608,6 @@ ignore_int: | |||
608 | ENTRY(initial_code) | 608 | ENTRY(initial_code) |
609 | .long i386_start_kernel | 609 | .long i386_start_kernel |
610 | 610 | ||
611 | .section .text | ||
612 | /* | ||
613 | * Real beginning of normal "text" segment | ||
614 | */ | ||
615 | ENTRY(stext) | ||
616 | ENTRY(_stext) | ||
617 | |||
618 | /* | 611 | /* |
619 | * BSS section | 612 | * BSS section |
620 | */ | 613 | */ |
diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c index 8279fb8df17f..38287b5f116e 100644 --- a/arch/x86/kernel/irq.c +++ b/arch/x86/kernel/irq.c | |||
@@ -12,6 +12,7 @@ | |||
12 | #include <asm/io_apic.h> | 12 | #include <asm/io_apic.h> |
13 | #include <asm/irq.h> | 13 | #include <asm/irq.h> |
14 | #include <asm/idle.h> | 14 | #include <asm/idle.h> |
15 | #include <asm/hw_irq.h> | ||
15 | 16 | ||
16 | atomic_t irq_err_count; | 17 | atomic_t irq_err_count; |
17 | 18 | ||
@@ -24,9 +25,9 @@ void (*generic_interrupt_extension)(void) = NULL; | |||
24 | */ | 25 | */ |
25 | void ack_bad_irq(unsigned int irq) | 26 | void ack_bad_irq(unsigned int irq) |
26 | { | 27 | { |
27 | printk(KERN_ERR "unexpected IRQ trap at vector %02x\n", irq); | 28 | if (printk_ratelimit()) |
29 | pr_err("unexpected IRQ trap at vector %02x\n", irq); | ||
28 | 30 | ||
29 | #ifdef CONFIG_X86_LOCAL_APIC | ||
30 | /* | 31 | /* |
31 | * Currently unexpected vectors happen only on SMP and APIC. | 32 | * Currently unexpected vectors happen only on SMP and APIC. |
32 | * We _must_ ack these because every local APIC has only N | 33 | * We _must_ ack these because every local APIC has only N |
@@ -36,9 +37,7 @@ void ack_bad_irq(unsigned int irq) | |||
36 | * completely. | 37 | * completely. |
37 | * But only ack when the APIC is enabled -AK | 38 | * But only ack when the APIC is enabled -AK |
38 | */ | 39 | */ |
39 | if (cpu_has_apic) | 40 | ack_APIC_irq(); |
40 | ack_APIC_irq(); | ||
41 | #endif | ||
42 | } | 41 | } |
43 | 42 | ||
44 | #define irq_stats(x) (&per_cpu(irq_stat, x)) | 43 | #define irq_stats(x) (&per_cpu(irq_stat, x)) |
@@ -188,7 +187,7 @@ u64 arch_irq_stat_cpu(unsigned int cpu) | |||
188 | sum += irq_stats(cpu)->irq_thermal_count; | 187 | sum += irq_stats(cpu)->irq_thermal_count; |
189 | # ifdef CONFIG_X86_64 | 188 | # ifdef CONFIG_X86_64 |
190 | sum += irq_stats(cpu)->irq_threshold_count; | 189 | sum += irq_stats(cpu)->irq_threshold_count; |
191 | #endif | 190 | # endif |
192 | #endif | 191 | #endif |
193 | return sum; | 192 | return sum; |
194 | } | 193 | } |
@@ -223,14 +222,11 @@ unsigned int __irq_entry do_IRQ(struct pt_regs *regs) | |||
223 | irq = __get_cpu_var(vector_irq)[vector]; | 222 | irq = __get_cpu_var(vector_irq)[vector]; |
224 | 223 | ||
225 | if (!handle_irq(irq, regs)) { | 224 | if (!handle_irq(irq, regs)) { |
226 | #ifdef CONFIG_X86_64 | 225 | ack_APIC_irq(); |
227 | if (!disable_apic) | ||
228 | ack_APIC_irq(); | ||
229 | #endif | ||
230 | 226 | ||
231 | if (printk_ratelimit()) | 227 | if (printk_ratelimit()) |
232 | printk(KERN_EMERG "%s: %d.%d No irq handler for vector (irq %d)\n", | 228 | pr_emerg("%s: %d.%d No irq handler for vector (irq %d)\n", |
233 | __func__, smp_processor_id(), vector, irq); | 229 | __func__, smp_processor_id(), vector, irq); |
234 | } | 230 | } |
235 | 231 | ||
236 | irq_exit(); | 232 | irq_exit(); |
diff --git a/arch/x86/kernel/irqinit_32.c b/arch/x86/kernel/irqinit.c index 205bdd880d31..267c6624c77f 100644 --- a/arch/x86/kernel/irqinit_32.c +++ b/arch/x86/kernel/irqinit.c | |||
@@ -1,20 +1,25 @@ | |||
1 | #include <linux/linkage.h> | ||
1 | #include <linux/errno.h> | 2 | #include <linux/errno.h> |
2 | #include <linux/signal.h> | 3 | #include <linux/signal.h> |
3 | #include <linux/sched.h> | 4 | #include <linux/sched.h> |
4 | #include <linux/ioport.h> | 5 | #include <linux/ioport.h> |
5 | #include <linux/interrupt.h> | 6 | #include <linux/interrupt.h> |
7 | #include <linux/timex.h> | ||
6 | #include <linux/slab.h> | 8 | #include <linux/slab.h> |
7 | #include <linux/random.h> | 9 | #include <linux/random.h> |
10 | #include <linux/kprobes.h> | ||
8 | #include <linux/init.h> | 11 | #include <linux/init.h> |
9 | #include <linux/kernel_stat.h> | 12 | #include <linux/kernel_stat.h> |
10 | #include <linux/sysdev.h> | 13 | #include <linux/sysdev.h> |
11 | #include <linux/bitops.h> | 14 | #include <linux/bitops.h> |
15 | #include <linux/acpi.h> | ||
12 | #include <linux/io.h> | 16 | #include <linux/io.h> |
13 | #include <linux/delay.h> | 17 | #include <linux/delay.h> |
14 | 18 | ||
15 | #include <asm/atomic.h> | 19 | #include <asm/atomic.h> |
16 | #include <asm/system.h> | 20 | #include <asm/system.h> |
17 | #include <asm/timer.h> | 21 | #include <asm/timer.h> |
22 | #include <asm/hw_irq.h> | ||
18 | #include <asm/pgtable.h> | 23 | #include <asm/pgtable.h> |
19 | #include <asm/desc.h> | 24 | #include <asm/desc.h> |
20 | #include <asm/apic.h> | 25 | #include <asm/apic.h> |
@@ -22,8 +27,24 @@ | |||
22 | #include <asm/i8259.h> | 27 | #include <asm/i8259.h> |
23 | #include <asm/traps.h> | 28 | #include <asm/traps.h> |
24 | 29 | ||
30 | /* | ||
31 | * ISA PIC or low IO-APIC triggered (INTA-cycle or APIC) interrupts: | ||
32 | * (these are usually mapped to vectors 0x30-0x3f) | ||
33 | */ | ||
25 | 34 | ||
26 | /* | 35 | /* |
36 | * The IO-APIC gives us many more interrupt sources. Most of these | ||
37 | * are unused but an SMP system is supposed to have enough memory ... | ||
38 | * sometimes (mostly wrt. hw bugs) we get corrupted vectors all | ||
39 | * across the spectrum, so we really want to be prepared to get all | ||
40 | * of these. Plus, more powerful systems might have more than 64 | ||
41 | * IO-APIC registers. | ||
42 | * | ||
43 | * (these are usually mapped into the 0x30-0xff vector range) | ||
44 | */ | ||
45 | |||
46 | #ifdef CONFIG_X86_32 | ||
47 | /* | ||
27 | * Note that on a 486, we don't want to do a SIGFPE on an irq13 | 48 | * Note that on a 486, we don't want to do a SIGFPE on an irq13 |
28 | * as the irq is unreliable, and exception 16 works correctly | 49 | * as the irq is unreliable, and exception 16 works correctly |
29 | * (ie as explained in the intel literature). On a 386, you | 50 | * (ie as explained in the intel literature). On a 386, you |
@@ -52,30 +73,7 @@ static struct irqaction fpu_irq = { | |||
52 | .handler = math_error_irq, | 73 | .handler = math_error_irq, |
53 | .name = "fpu", | 74 | .name = "fpu", |
54 | }; | 75 | }; |
55 | |||
56 | void __init init_ISA_irqs(void) | ||
57 | { | ||
58 | int i; | ||
59 | |||
60 | #ifdef CONFIG_X86_LOCAL_APIC | ||
61 | init_bsp_APIC(); | ||
62 | #endif | 76 | #endif |
63 | init_8259A(0); | ||
64 | |||
65 | /* | ||
66 | * 16 old-style INTA-cycle interrupts: | ||
67 | */ | ||
68 | for (i = 0; i < NR_IRQS_LEGACY; i++) { | ||
69 | struct irq_desc *desc = irq_to_desc(i); | ||
70 | |||
71 | desc->status = IRQ_DISABLED; | ||
72 | desc->action = NULL; | ||
73 | desc->depth = 1; | ||
74 | |||
75 | set_irq_chip_and_handler_name(i, &i8259A_chip, | ||
76 | handle_level_irq, "XT"); | ||
77 | } | ||
78 | } | ||
79 | 77 | ||
80 | /* | 78 | /* |
81 | * IRQ2 is cascade interrupt to second interrupt controller | 79 | * IRQ2 is cascade interrupt to second interrupt controller |
@@ -118,9 +116,37 @@ int vector_used_by_percpu_irq(unsigned int vector) | |||
118 | return 0; | 116 | return 0; |
119 | } | 117 | } |
120 | 118 | ||
119 | static void __init init_ISA_irqs(void) | ||
120 | { | ||
121 | int i; | ||
122 | |||
123 | #if defined(CONFIG_X86_64) || defined(CONFIG_X86_LOCAL_APIC) | ||
124 | init_bsp_APIC(); | ||
125 | #endif | ||
126 | init_8259A(0); | ||
127 | |||
128 | /* | ||
129 | * 16 old-style INTA-cycle interrupts: | ||
130 | */ | ||
131 | for (i = 0; i < NR_IRQS_LEGACY; i++) { | ||
132 | struct irq_desc *desc = irq_to_desc(i); | ||
133 | |||
134 | desc->status = IRQ_DISABLED; | ||
135 | desc->action = NULL; | ||
136 | desc->depth = 1; | ||
137 | |||
138 | set_irq_chip_and_handler_name(i, &i8259A_chip, | ||
139 | handle_level_irq, "XT"); | ||
140 | } | ||
141 | } | ||
142 | |||
143 | /* Overridden in paravirt.c */ | ||
144 | void init_IRQ(void) __attribute__((weak, alias("native_init_IRQ"))); | ||
145 | |||
121 | static void __init smp_intr_init(void) | 146 | static void __init smp_intr_init(void) |
122 | { | 147 | { |
123 | #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_SMP) | 148 | #ifdef CONFIG_SMP |
149 | #if defined(CONFIG_X86_64) || defined(CONFIG_X86_LOCAL_APIC) | ||
124 | /* | 150 | /* |
125 | * The reschedule interrupt is a CPU-to-CPU reschedule-helper | 151 | * The reschedule interrupt is a CPU-to-CPU reschedule-helper |
126 | * IPI, driven by wakeup. | 152 | * IPI, driven by wakeup. |
@@ -140,21 +166,32 @@ static void __init smp_intr_init(void) | |||
140 | /* IPI for generic function call */ | 166 | /* IPI for generic function call */ |
141 | alloc_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt); | 167 | alloc_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt); |
142 | 168 | ||
143 | /* IPI for single call function */ | 169 | /* IPI for generic single function call */ |
144 | alloc_intr_gate(CALL_FUNCTION_SINGLE_VECTOR, | 170 | alloc_intr_gate(CALL_FUNCTION_SINGLE_VECTOR, |
145 | call_function_single_interrupt); | 171 | call_function_single_interrupt); |
146 | 172 | ||
147 | /* Low priority IPI to cleanup after moving an irq */ | 173 | /* Low priority IPI to cleanup after moving an irq */ |
148 | set_intr_gate(IRQ_MOVE_CLEANUP_VECTOR, irq_move_cleanup_interrupt); | 174 | set_intr_gate(IRQ_MOVE_CLEANUP_VECTOR, irq_move_cleanup_interrupt); |
149 | set_bit(IRQ_MOVE_CLEANUP_VECTOR, used_vectors); | 175 | set_bit(IRQ_MOVE_CLEANUP_VECTOR, used_vectors); |
150 | #endif | 176 | #endif |
177 | #endif /* CONFIG_SMP */ | ||
151 | } | 178 | } |
152 | 179 | ||
153 | static void __init apic_intr_init(void) | 180 | static void __init apic_intr_init(void) |
154 | { | 181 | { |
155 | smp_intr_init(); | 182 | smp_intr_init(); |
156 | 183 | ||
157 | #ifdef CONFIG_X86_LOCAL_APIC | 184 | #ifdef CONFIG_X86_THERMAL_VECTOR |
185 | alloc_intr_gate(THERMAL_APIC_VECTOR, thermal_interrupt); | ||
186 | #endif | ||
187 | #ifdef CONFIG_X86_THRESHOLD | ||
188 | alloc_intr_gate(THRESHOLD_APIC_VECTOR, threshold_interrupt); | ||
189 | #endif | ||
190 | #if defined(CONFIG_X86_NEW_MCE) && defined(CONFIG_X86_LOCAL_APIC) | ||
191 | alloc_intr_gate(MCE_SELF_VECTOR, mce_self_interrupt); | ||
192 | #endif | ||
193 | |||
194 | #if defined(CONFIG_X86_64) || defined(CONFIG_X86_LOCAL_APIC) | ||
158 | /* self generated IPI for local APIC timer */ | 195 | /* self generated IPI for local APIC timer */ |
159 | alloc_intr_gate(LOCAL_TIMER_VECTOR, apic_timer_interrupt); | 196 | alloc_intr_gate(LOCAL_TIMER_VECTOR, apic_timer_interrupt); |
160 | 197 | ||
@@ -164,19 +201,34 @@ static void __init apic_intr_init(void) | |||
164 | /* IPI vectors for APIC spurious and error interrupts */ | 201 | /* IPI vectors for APIC spurious and error interrupts */ |
165 | alloc_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt); | 202 | alloc_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt); |
166 | alloc_intr_gate(ERROR_APIC_VECTOR, error_interrupt); | 203 | alloc_intr_gate(ERROR_APIC_VECTOR, error_interrupt); |
204 | |||
205 | /* Performance monitoring interrupts: */ | ||
167 | # ifdef CONFIG_PERF_COUNTERS | 206 | # ifdef CONFIG_PERF_COUNTERS |
168 | alloc_intr_gate(LOCAL_PENDING_VECTOR, perf_pending_interrupt); | 207 | alloc_intr_gate(LOCAL_PENDING_VECTOR, perf_pending_interrupt); |
169 | # endif | 208 | # endif |
170 | 209 | ||
171 | # ifdef CONFIG_X86_MCE_P4THERMAL | ||
172 | /* thermal monitor LVT interrupt */ | ||
173 | alloc_intr_gate(THERMAL_APIC_VECTOR, thermal_interrupt); | ||
174 | # endif | ||
175 | #endif | 210 | #endif |
176 | } | 211 | } |
177 | 212 | ||
178 | /* Overridden in paravirt.c */ | 213 | /** |
179 | void init_IRQ(void) __attribute__((weak, alias("native_init_IRQ"))); | 214 | * x86_quirk_pre_intr_init - initialisation prior to setting up interrupt vectors |
215 | * | ||
216 | * Description: | ||
217 | * Perform any necessary interrupt initialisation prior to setting up | ||
218 | * the "ordinary" interrupt call gates. For legacy reasons, the ISA | ||
219 | * interrupts should be initialised here if the machine emulates a PC | ||
220 | * in any way. | ||
221 | **/ | ||
222 | static void __init x86_quirk_pre_intr_init(void) | ||
223 | { | ||
224 | #ifdef CONFIG_X86_32 | ||
225 | if (x86_quirks->arch_pre_intr_init) { | ||
226 | if (x86_quirks->arch_pre_intr_init()) | ||
227 | return; | ||
228 | } | ||
229 | #endif | ||
230 | init_ISA_irqs(); | ||
231 | } | ||
180 | 232 | ||
181 | void __init native_init_IRQ(void) | 233 | void __init native_init_IRQ(void) |
182 | { | 234 | { |
@@ -192,16 +244,16 @@ void __init native_init_IRQ(void) | |||
192 | * us. (some of these will be overridden and become | 244 | * us. (some of these will be overridden and become |
193 | * 'special' SMP interrupts) | 245 | * 'special' SMP interrupts) |
194 | */ | 246 | */ |
195 | for (i = 0; i < (NR_VECTORS - FIRST_EXTERNAL_VECTOR); i++) { | 247 | for (i = FIRST_EXTERNAL_VECTOR; i < NR_VECTORS; i++) { |
196 | int vector = FIRST_EXTERNAL_VECTOR + i; | 248 | /* IA32_SYSCALL_VECTOR could be used in trap_init already. */ |
197 | /* SYSCALL_VECTOR was reserved in trap_init. */ | 249 | if (!test_bit(i, used_vectors)) |
198 | if (!test_bit(vector, used_vectors)) | 250 | set_intr_gate(i, interrupt[i-FIRST_EXTERNAL_VECTOR]); |
199 | set_intr_gate(vector, interrupt[i]); | ||
200 | } | 251 | } |
201 | 252 | ||
202 | if (!acpi_ioapic) | 253 | if (!acpi_ioapic) |
203 | setup_irq(2, &irq2); | 254 | setup_irq(2, &irq2); |
204 | 255 | ||
256 | #ifdef CONFIG_X86_32 | ||
205 | /* | 257 | /* |
206 | * Call quirks after call gates are initialised (usually add in | 258 | * Call quirks after call gates are initialised (usually add in |
207 | * the architecture specific gates): | 259 | * the architecture specific gates): |
@@ -216,4 +268,5 @@ void __init native_init_IRQ(void) | |||
216 | setup_irq(FPU_IRQ, &fpu_irq); | 268 | setup_irq(FPU_IRQ, &fpu_irq); |
217 | 269 | ||
218 | irq_ctx_init(smp_processor_id()); | 270 | irq_ctx_init(smp_processor_id()); |
271 | #endif | ||
219 | } | 272 | } |
diff --git a/arch/x86/kernel/irqinit_64.c b/arch/x86/kernel/irqinit_64.c deleted file mode 100644 index fa6ef692000f..000000000000 --- a/arch/x86/kernel/irqinit_64.c +++ /dev/null | |||
@@ -1,183 +0,0 @@ | |||
1 | #include <linux/linkage.h> | ||
2 | #include <linux/errno.h> | ||
3 | #include <linux/signal.h> | ||
4 | #include <linux/sched.h> | ||
5 | #include <linux/ioport.h> | ||
6 | #include <linux/interrupt.h> | ||
7 | #include <linux/timex.h> | ||
8 | #include <linux/slab.h> | ||
9 | #include <linux/random.h> | ||
10 | #include <linux/init.h> | ||
11 | #include <linux/kernel_stat.h> | ||
12 | #include <linux/sysdev.h> | ||
13 | #include <linux/bitops.h> | ||
14 | #include <linux/acpi.h> | ||
15 | #include <linux/io.h> | ||
16 | #include <linux/delay.h> | ||
17 | |||
18 | #include <asm/atomic.h> | ||
19 | #include <asm/system.h> | ||
20 | #include <asm/hw_irq.h> | ||
21 | #include <asm/pgtable.h> | ||
22 | #include <asm/desc.h> | ||
23 | #include <asm/apic.h> | ||
24 | #include <asm/i8259.h> | ||
25 | |||
26 | /* | ||
27 | * ISA PIC or low IO-APIC triggered (INTA-cycle or APIC) interrupts: | ||
28 | * (these are usually mapped to vectors 0x30-0x3f) | ||
29 | */ | ||
30 | |||
31 | /* | ||
32 | * The IO-APIC gives us many more interrupt sources. Most of these | ||
33 | * are unused but an SMP system is supposed to have enough memory ... | ||
34 | * sometimes (mostly wrt. hw bugs) we get corrupted vectors all | ||
35 | * across the spectrum, so we really want to be prepared to get all | ||
36 | * of these. Plus, more powerful systems might have more than 64 | ||
37 | * IO-APIC registers. | ||
38 | * | ||
39 | * (these are usually mapped into the 0x30-0xff vector range) | ||
40 | */ | ||
41 | |||
42 | /* | ||
43 | * IRQ2 is cascade interrupt to second interrupt controller | ||
44 | */ | ||
45 | |||
46 | static struct irqaction irq2 = { | ||
47 | .handler = no_action, | ||
48 | .name = "cascade", | ||
49 | }; | ||
50 | DEFINE_PER_CPU(vector_irq_t, vector_irq) = { | ||
51 | [0 ... IRQ0_VECTOR - 1] = -1, | ||
52 | [IRQ0_VECTOR] = 0, | ||
53 | [IRQ1_VECTOR] = 1, | ||
54 | [IRQ2_VECTOR] = 2, | ||
55 | [IRQ3_VECTOR] = 3, | ||
56 | [IRQ4_VECTOR] = 4, | ||
57 | [IRQ5_VECTOR] = 5, | ||
58 | [IRQ6_VECTOR] = 6, | ||
59 | [IRQ7_VECTOR] = 7, | ||
60 | [IRQ8_VECTOR] = 8, | ||
61 | [IRQ9_VECTOR] = 9, | ||
62 | [IRQ10_VECTOR] = 10, | ||
63 | [IRQ11_VECTOR] = 11, | ||
64 | [IRQ12_VECTOR] = 12, | ||
65 | [IRQ13_VECTOR] = 13, | ||
66 | [IRQ14_VECTOR] = 14, | ||
67 | [IRQ15_VECTOR] = 15, | ||
68 | [IRQ15_VECTOR + 1 ... NR_VECTORS - 1] = -1 | ||
69 | }; | ||
70 | |||
71 | int vector_used_by_percpu_irq(unsigned int vector) | ||
72 | { | ||
73 | int cpu; | ||
74 | |||
75 | for_each_online_cpu(cpu) { | ||
76 | if (per_cpu(vector_irq, cpu)[vector] != -1) | ||
77 | return 1; | ||
78 | } | ||
79 | |||
80 | return 0; | ||
81 | } | ||
82 | |||
83 | static void __init init_ISA_irqs(void) | ||
84 | { | ||
85 | int i; | ||
86 | |||
87 | init_bsp_APIC(); | ||
88 | init_8259A(0); | ||
89 | |||
90 | for (i = 0; i < NR_IRQS_LEGACY; i++) { | ||
91 | struct irq_desc *desc = irq_to_desc(i); | ||
92 | |||
93 | desc->status = IRQ_DISABLED; | ||
94 | desc->action = NULL; | ||
95 | desc->depth = 1; | ||
96 | |||
97 | /* | ||
98 | * 16 old-style INTA-cycle interrupts: | ||
99 | */ | ||
100 | set_irq_chip_and_handler_name(i, &i8259A_chip, | ||
101 | handle_level_irq, "XT"); | ||
102 | } | ||
103 | } | ||
104 | |||
105 | void init_IRQ(void) __attribute__((weak, alias("native_init_IRQ"))); | ||
106 | |||
107 | static void __init smp_intr_init(void) | ||
108 | { | ||
109 | #ifdef CONFIG_SMP | ||
110 | /* | ||
111 | * The reschedule interrupt is a CPU-to-CPU reschedule-helper | ||
112 | * IPI, driven by wakeup. | ||
113 | */ | ||
114 | alloc_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt); | ||
115 | |||
116 | /* IPIs for invalidation */ | ||
117 | alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+0, invalidate_interrupt0); | ||
118 | alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+1, invalidate_interrupt1); | ||
119 | alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+2, invalidate_interrupt2); | ||
120 | alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+3, invalidate_interrupt3); | ||
121 | alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+4, invalidate_interrupt4); | ||
122 | alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+5, invalidate_interrupt5); | ||
123 | alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+6, invalidate_interrupt6); | ||
124 | alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+7, invalidate_interrupt7); | ||
125 | |||
126 | /* IPI for generic function call */ | ||
127 | alloc_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt); | ||
128 | |||
129 | /* IPI for generic single function call */ | ||
130 | alloc_intr_gate(CALL_FUNCTION_SINGLE_VECTOR, | ||
131 | call_function_single_interrupt); | ||
132 | |||
133 | /* Low priority IPI to cleanup after moving an irq */ | ||
134 | set_intr_gate(IRQ_MOVE_CLEANUP_VECTOR, irq_move_cleanup_interrupt); | ||
135 | set_bit(IRQ_MOVE_CLEANUP_VECTOR, used_vectors); | ||
136 | #endif | ||
137 | } | ||
138 | |||
139 | static void __init apic_intr_init(void) | ||
140 | { | ||
141 | smp_intr_init(); | ||
142 | |||
143 | alloc_intr_gate(THERMAL_APIC_VECTOR, thermal_interrupt); | ||
144 | alloc_intr_gate(THRESHOLD_APIC_VECTOR, threshold_interrupt); | ||
145 | |||
146 | /* self generated IPI for local APIC timer */ | ||
147 | alloc_intr_gate(LOCAL_TIMER_VECTOR, apic_timer_interrupt); | ||
148 | |||
149 | /* generic IPI for platform specific use */ | ||
150 | alloc_intr_gate(GENERIC_INTERRUPT_VECTOR, generic_interrupt); | ||
151 | |||
152 | /* IPI vectors for APIC spurious and error interrupts */ | ||
153 | alloc_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt); | ||
154 | alloc_intr_gate(ERROR_APIC_VECTOR, error_interrupt); | ||
155 | |||
156 | /* Performance monitoring interrupt: */ | ||
157 | #ifdef CONFIG_PERF_COUNTERS | ||
158 | alloc_intr_gate(LOCAL_PENDING_VECTOR, perf_pending_interrupt); | ||
159 | #endif | ||
160 | } | ||
161 | |||
162 | void __init native_init_IRQ(void) | ||
163 | { | ||
164 | int i; | ||
165 | |||
166 | init_ISA_irqs(); | ||
167 | |||
168 | apic_intr_init(); | ||
169 | |||
170 | /* | ||
171 | * Cover the whole vector space, no vector can escape | ||
172 | * us. (some of these will be overridden and become | ||
173 | * 'special' SMP interrupts) | ||
174 | */ | ||
175 | for (i = 0; i < (NR_VECTORS - FIRST_EXTERNAL_VECTOR); i++) { | ||
176 | int vector = FIRST_EXTERNAL_VECTOR + i; | ||
177 | if (!test_bit(vector, used_vectors)) | ||
178 | set_intr_gate(vector, interrupt[i]); | ||
179 | } | ||
180 | |||
181 | if (!acpi_ioapic) | ||
182 | setup_irq(2, &irq2); | ||
183 | } | ||
diff --git a/arch/x86/kernel/kgdb.c b/arch/x86/kernel/kgdb.c index b1f4dffb919e..8d82a77a3f3b 100644 --- a/arch/x86/kernel/kgdb.c +++ b/arch/x86/kernel/kgdb.c | |||
@@ -142,7 +142,7 @@ void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p) | |||
142 | gdb_regs32[GDB_PS] = *(unsigned long *)(p->thread.sp + 8); | 142 | gdb_regs32[GDB_PS] = *(unsigned long *)(p->thread.sp + 8); |
143 | gdb_regs32[GDB_CS] = __KERNEL_CS; | 143 | gdb_regs32[GDB_CS] = __KERNEL_CS; |
144 | gdb_regs32[GDB_SS] = __KERNEL_DS; | 144 | gdb_regs32[GDB_SS] = __KERNEL_DS; |
145 | gdb_regs[GDB_PC] = p->thread.ip; | 145 | gdb_regs[GDB_PC] = 0; |
146 | gdb_regs[GDB_R8] = 0; | 146 | gdb_regs[GDB_R8] = 0; |
147 | gdb_regs[GDB_R9] = 0; | 147 | gdb_regs[GDB_R9] = 0; |
148 | gdb_regs[GDB_R10] = 0; | 148 | gdb_regs[GDB_R10] = 0; |
diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c index 33019ddb56b4..6551dedee20c 100644 --- a/arch/x86/kernel/kvm.c +++ b/arch/x86/kernel/kvm.c | |||
@@ -195,7 +195,7 @@ static void kvm_leave_lazy_mmu(void) | |||
195 | struct kvm_para_state *state = kvm_para_state(); | 195 | struct kvm_para_state *state = kvm_para_state(); |
196 | 196 | ||
197 | mmu_queue_flush(state); | 197 | mmu_queue_flush(state); |
198 | paravirt_leave_lazy(paravirt_get_lazy_mode()); | 198 | paravirt_leave_lazy_mmu(); |
199 | state->mode = paravirt_get_lazy_mode(); | 199 | state->mode = paravirt_get_lazy_mode(); |
200 | } | 200 | } |
201 | 201 | ||
diff --git a/arch/x86/kernel/microcode_amd.c b/arch/x86/kernel/microcode_amd.c index 453b5795a5c6..366baa179913 100644 --- a/arch/x86/kernel/microcode_amd.c +++ b/arch/x86/kernel/microcode_amd.c | |||
@@ -13,25 +13,13 @@ | |||
13 | * Licensed under the terms of the GNU General Public | 13 | * Licensed under the terms of the GNU General Public |
14 | * License version 2. See file COPYING for details. | 14 | * License version 2. See file COPYING for details. |
15 | */ | 15 | */ |
16 | #include <linux/platform_device.h> | ||
17 | #include <linux/capability.h> | ||
18 | #include <linux/miscdevice.h> | ||
19 | #include <linux/firmware.h> | 16 | #include <linux/firmware.h> |
20 | #include <linux/spinlock.h> | ||
21 | #include <linux/cpumask.h> | ||
22 | #include <linux/pci_ids.h> | 17 | #include <linux/pci_ids.h> |
23 | #include <linux/uaccess.h> | 18 | #include <linux/uaccess.h> |
24 | #include <linux/vmalloc.h> | 19 | #include <linux/vmalloc.h> |
25 | #include <linux/kernel.h> | 20 | #include <linux/kernel.h> |
26 | #include <linux/module.h> | 21 | #include <linux/module.h> |
27 | #include <linux/mutex.h> | ||
28 | #include <linux/sched.h> | ||
29 | #include <linux/init.h> | ||
30 | #include <linux/slab.h> | ||
31 | #include <linux/cpu.h> | ||
32 | #include <linux/pci.h> | 22 | #include <linux/pci.h> |
33 | #include <linux/fs.h> | ||
34 | #include <linux/mm.h> | ||
35 | 23 | ||
36 | #include <asm/microcode.h> | 24 | #include <asm/microcode.h> |
37 | #include <asm/processor.h> | 25 | #include <asm/processor.h> |
@@ -79,9 +67,6 @@ struct microcode_amd { | |||
79 | #define UCODE_CONTAINER_SECTION_HDR 8 | 67 | #define UCODE_CONTAINER_SECTION_HDR 8 |
80 | #define UCODE_CONTAINER_HEADER_SIZE 12 | 68 | #define UCODE_CONTAINER_HEADER_SIZE 12 |
81 | 69 | ||
82 | /* serialize access to the physical write */ | ||
83 | static DEFINE_SPINLOCK(microcode_update_lock); | ||
84 | |||
85 | static struct equiv_cpu_entry *equiv_cpu_table; | 70 | static struct equiv_cpu_entry *equiv_cpu_table; |
86 | 71 | ||
87 | static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig) | 72 | static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig) |
@@ -144,9 +129,8 @@ static int get_matching_microcode(int cpu, void *mc, int rev) | |||
144 | return 1; | 129 | return 1; |
145 | } | 130 | } |
146 | 131 | ||
147 | static void apply_microcode_amd(int cpu) | 132 | static int apply_microcode_amd(int cpu) |
148 | { | 133 | { |
149 | unsigned long flags; | ||
150 | u32 rev, dummy; | 134 | u32 rev, dummy; |
151 | int cpu_num = raw_smp_processor_id(); | 135 | int cpu_num = raw_smp_processor_id(); |
152 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num; | 136 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num; |
@@ -156,25 +140,25 @@ static void apply_microcode_amd(int cpu) | |||
156 | BUG_ON(cpu_num != cpu); | 140 | BUG_ON(cpu_num != cpu); |
157 | 141 | ||
158 | if (mc_amd == NULL) | 142 | if (mc_amd == NULL) |
159 | return; | 143 | return 0; |
160 | 144 | ||
161 | spin_lock_irqsave(µcode_update_lock, flags); | ||
162 | wrmsrl(MSR_AMD64_PATCH_LOADER, (u64)(long)&mc_amd->hdr.data_code); | 145 | wrmsrl(MSR_AMD64_PATCH_LOADER, (u64)(long)&mc_amd->hdr.data_code); |
163 | /* get patch id after patching */ | 146 | /* get patch id after patching */ |
164 | rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); | 147 | rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); |
165 | spin_unlock_irqrestore(µcode_update_lock, flags); | ||
166 | 148 | ||
167 | /* check current patch id and patch's id for match */ | 149 | /* check current patch id and patch's id for match */ |
168 | if (rev != mc_amd->hdr.patch_id) { | 150 | if (rev != mc_amd->hdr.patch_id) { |
169 | printk(KERN_ERR "microcode: CPU%d: update failed " | 151 | printk(KERN_ERR "microcode: CPU%d: update failed " |
170 | "(for patch_level=0x%x)\n", cpu, mc_amd->hdr.patch_id); | 152 | "(for patch_level=0x%x)\n", cpu, mc_amd->hdr.patch_id); |
171 | return; | 153 | return -1; |
172 | } | 154 | } |
173 | 155 | ||
174 | printk(KERN_INFO "microcode: CPU%d: updated (new patch_level=0x%x)\n", | 156 | printk(KERN_INFO "microcode: CPU%d: updated (new patch_level=0x%x)\n", |
175 | cpu, rev); | 157 | cpu, rev); |
176 | 158 | ||
177 | uci->cpu_sig.rev = rev; | 159 | uci->cpu_sig.rev = rev; |
160 | |||
161 | return 0; | ||
178 | } | 162 | } |
179 | 163 | ||
180 | static int get_ucode_data(void *to, const u8 *from, size_t n) | 164 | static int get_ucode_data(void *to, const u8 *from, size_t n) |
@@ -257,13 +241,12 @@ static int install_equiv_cpu_table(const u8 *buf) | |||
257 | 241 | ||
258 | static void free_equiv_cpu_table(void) | 242 | static void free_equiv_cpu_table(void) |
259 | { | 243 | { |
260 | if (equiv_cpu_table) { | 244 | vfree(equiv_cpu_table); |
261 | vfree(equiv_cpu_table); | 245 | equiv_cpu_table = NULL; |
262 | equiv_cpu_table = NULL; | ||
263 | } | ||
264 | } | 246 | } |
265 | 247 | ||
266 | static int generic_load_microcode(int cpu, const u8 *data, size_t size) | 248 | static enum ucode_state |
249 | generic_load_microcode(int cpu, const u8 *data, size_t size) | ||
267 | { | 250 | { |
268 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | 251 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; |
269 | const u8 *ucode_ptr = data; | 252 | const u8 *ucode_ptr = data; |
@@ -272,12 +255,13 @@ static int generic_load_microcode(int cpu, const u8 *data, size_t size) | |||
272 | int new_rev = uci->cpu_sig.rev; | 255 | int new_rev = uci->cpu_sig.rev; |
273 | unsigned int leftover; | 256 | unsigned int leftover; |
274 | unsigned long offset; | 257 | unsigned long offset; |
258 | enum ucode_state state = UCODE_OK; | ||
275 | 259 | ||
276 | offset = install_equiv_cpu_table(ucode_ptr); | 260 | offset = install_equiv_cpu_table(ucode_ptr); |
277 | if (!offset) { | 261 | if (!offset) { |
278 | printk(KERN_ERR "microcode: failed to create " | 262 | printk(KERN_ERR "microcode: failed to create " |
279 | "equivalent cpu table\n"); | 263 | "equivalent cpu table\n"); |
280 | return -EINVAL; | 264 | return UCODE_ERROR; |
281 | } | 265 | } |
282 | 266 | ||
283 | ucode_ptr += offset; | 267 | ucode_ptr += offset; |
@@ -293,8 +277,7 @@ static int generic_load_microcode(int cpu, const u8 *data, size_t size) | |||
293 | 277 | ||
294 | mc_header = (struct microcode_header_amd *)mc; | 278 | mc_header = (struct microcode_header_amd *)mc; |
295 | if (get_matching_microcode(cpu, mc, new_rev)) { | 279 | if (get_matching_microcode(cpu, mc, new_rev)) { |
296 | if (new_mc) | 280 | vfree(new_mc); |
297 | vfree(new_mc); | ||
298 | new_rev = mc_header->patch_id; | 281 | new_rev = mc_header->patch_id; |
299 | new_mc = mc; | 282 | new_mc = mc; |
300 | } else | 283 | } else |
@@ -306,34 +289,32 @@ static int generic_load_microcode(int cpu, const u8 *data, size_t size) | |||
306 | 289 | ||
307 | if (new_mc) { | 290 | if (new_mc) { |
308 | if (!leftover) { | 291 | if (!leftover) { |
309 | if (uci->mc) | 292 | vfree(uci->mc); |
310 | vfree(uci->mc); | ||
311 | uci->mc = new_mc; | 293 | uci->mc = new_mc; |
312 | pr_debug("microcode: CPU%d found a matching microcode " | 294 | pr_debug("microcode: CPU%d found a matching microcode " |
313 | "update with version 0x%x (current=0x%x)\n", | 295 | "update with version 0x%x (current=0x%x)\n", |
314 | cpu, new_rev, uci->cpu_sig.rev); | 296 | cpu, new_rev, uci->cpu_sig.rev); |
315 | } else | 297 | } else { |
316 | vfree(new_mc); | 298 | vfree(new_mc); |
317 | } | 299 | state = UCODE_ERROR; |
300 | } | ||
301 | } else | ||
302 | state = UCODE_NFOUND; | ||
318 | 303 | ||
319 | free_equiv_cpu_table(); | 304 | free_equiv_cpu_table(); |
320 | 305 | ||
321 | return (int)leftover; | 306 | return state; |
322 | } | 307 | } |
323 | 308 | ||
324 | static int request_microcode_fw(int cpu, struct device *device) | 309 | static enum ucode_state request_microcode_fw(int cpu, struct device *device) |
325 | { | 310 | { |
326 | const char *fw_name = "amd-ucode/microcode_amd.bin"; | 311 | const char *fw_name = "amd-ucode/microcode_amd.bin"; |
327 | const struct firmware *firmware; | 312 | const struct firmware *firmware; |
328 | int ret; | 313 | enum ucode_state ret; |
329 | |||
330 | /* We should bind the task to the CPU */ | ||
331 | BUG_ON(cpu != raw_smp_processor_id()); | ||
332 | 314 | ||
333 | ret = request_firmware(&firmware, fw_name, device); | 315 | if (request_firmware(&firmware, fw_name, device)) { |
334 | if (ret) { | ||
335 | printk(KERN_ERR "microcode: failed to load file %s\n", fw_name); | 316 | printk(KERN_ERR "microcode: failed to load file %s\n", fw_name); |
336 | return ret; | 317 | return UCODE_NFOUND; |
337 | } | 318 | } |
338 | 319 | ||
339 | ret = generic_load_microcode(cpu, firmware->data, firmware->size); | 320 | ret = generic_load_microcode(cpu, firmware->data, firmware->size); |
@@ -343,11 +324,12 @@ static int request_microcode_fw(int cpu, struct device *device) | |||
343 | return ret; | 324 | return ret; |
344 | } | 325 | } |
345 | 326 | ||
346 | static int request_microcode_user(int cpu, const void __user *buf, size_t size) | 327 | static enum ucode_state |
328 | request_microcode_user(int cpu, const void __user *buf, size_t size) | ||
347 | { | 329 | { |
348 | printk(KERN_INFO "microcode: AMD microcode update via " | 330 | printk(KERN_INFO "microcode: AMD microcode update via " |
349 | "/dev/cpu/microcode not supported\n"); | 331 | "/dev/cpu/microcode not supported\n"); |
350 | return -1; | 332 | return UCODE_ERROR; |
351 | } | 333 | } |
352 | 334 | ||
353 | static void microcode_fini_cpu_amd(int cpu) | 335 | static void microcode_fini_cpu_amd(int cpu) |
diff --git a/arch/x86/kernel/microcode_core.c b/arch/x86/kernel/microcode_core.c index 98c470c069d1..9c4461501fcb 100644 --- a/arch/x86/kernel/microcode_core.c +++ b/arch/x86/kernel/microcode_core.c | |||
@@ -71,27 +71,18 @@ | |||
71 | * Thanks to Stuart Swales for pointing out this bug. | 71 | * Thanks to Stuart Swales for pointing out this bug. |
72 | */ | 72 | */ |
73 | #include <linux/platform_device.h> | 73 | #include <linux/platform_device.h> |
74 | #include <linux/capability.h> | ||
75 | #include <linux/miscdevice.h> | 74 | #include <linux/miscdevice.h> |
76 | #include <linux/firmware.h> | 75 | #include <linux/capability.h> |
77 | #include <linux/smp_lock.h> | 76 | #include <linux/smp_lock.h> |
78 | #include <linux/spinlock.h> | ||
79 | #include <linux/cpumask.h> | ||
80 | #include <linux/uaccess.h> | ||
81 | #include <linux/vmalloc.h> | ||
82 | #include <linux/kernel.h> | 77 | #include <linux/kernel.h> |
83 | #include <linux/module.h> | 78 | #include <linux/module.h> |
84 | #include <linux/mutex.h> | 79 | #include <linux/mutex.h> |
85 | #include <linux/sched.h> | ||
86 | #include <linux/init.h> | ||
87 | #include <linux/slab.h> | ||
88 | #include <linux/cpu.h> | 80 | #include <linux/cpu.h> |
89 | #include <linux/fs.h> | 81 | #include <linux/fs.h> |
90 | #include <linux/mm.h> | 82 | #include <linux/mm.h> |
91 | 83 | ||
92 | #include <asm/microcode.h> | 84 | #include <asm/microcode.h> |
93 | #include <asm/processor.h> | 85 | #include <asm/processor.h> |
94 | #include <asm/msr.h> | ||
95 | 86 | ||
96 | MODULE_DESCRIPTION("Microcode Update Driver"); | 87 | MODULE_DESCRIPTION("Microcode Update Driver"); |
97 | MODULE_AUTHOR("Tigran Aivazian <tigran@aivazian.fsnet.co.uk>"); | 88 | MODULE_AUTHOR("Tigran Aivazian <tigran@aivazian.fsnet.co.uk>"); |
@@ -101,36 +92,110 @@ MODULE_LICENSE("GPL"); | |||
101 | 92 | ||
102 | static struct microcode_ops *microcode_ops; | 93 | static struct microcode_ops *microcode_ops; |
103 | 94 | ||
104 | /* no concurrent ->write()s are allowed on /dev/cpu/microcode */ | 95 | /* |
96 | * Synchronization. | ||
97 | * | ||
98 | * All non cpu-hotplug-callback call sites use: | ||
99 | * | ||
100 | * - microcode_mutex to synchronize with each other; | ||
101 | * - get/put_online_cpus() to synchronize with | ||
102 | * the cpu-hotplug-callback call sites. | ||
103 | * | ||
104 | * We guarantee that only a single cpu is being | ||
105 | * updated at any particular moment of time. | ||
106 | */ | ||
105 | static DEFINE_MUTEX(microcode_mutex); | 107 | static DEFINE_MUTEX(microcode_mutex); |
106 | 108 | ||
107 | struct ucode_cpu_info ucode_cpu_info[NR_CPUS]; | 109 | struct ucode_cpu_info ucode_cpu_info[NR_CPUS]; |
108 | EXPORT_SYMBOL_GPL(ucode_cpu_info); | 110 | EXPORT_SYMBOL_GPL(ucode_cpu_info); |
109 | 111 | ||
112 | /* | ||
113 | * Operations that are run on a target cpu: | ||
114 | */ | ||
115 | |||
116 | struct cpu_info_ctx { | ||
117 | struct cpu_signature *cpu_sig; | ||
118 | int err; | ||
119 | }; | ||
120 | |||
121 | static void collect_cpu_info_local(void *arg) | ||
122 | { | ||
123 | struct cpu_info_ctx *ctx = arg; | ||
124 | |||
125 | ctx->err = microcode_ops->collect_cpu_info(smp_processor_id(), | ||
126 | ctx->cpu_sig); | ||
127 | } | ||
128 | |||
129 | static int collect_cpu_info_on_target(int cpu, struct cpu_signature *cpu_sig) | ||
130 | { | ||
131 | struct cpu_info_ctx ctx = { .cpu_sig = cpu_sig, .err = 0 }; | ||
132 | int ret; | ||
133 | |||
134 | ret = smp_call_function_single(cpu, collect_cpu_info_local, &ctx, 1); | ||
135 | if (!ret) | ||
136 | ret = ctx.err; | ||
137 | |||
138 | return ret; | ||
139 | } | ||
140 | |||
141 | static int collect_cpu_info(int cpu) | ||
142 | { | ||
143 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | ||
144 | int ret; | ||
145 | |||
146 | memset(uci, 0, sizeof(*uci)); | ||
147 | |||
148 | ret = collect_cpu_info_on_target(cpu, &uci->cpu_sig); | ||
149 | if (!ret) | ||
150 | uci->valid = 1; | ||
151 | |||
152 | return ret; | ||
153 | } | ||
154 | |||
155 | struct apply_microcode_ctx { | ||
156 | int err; | ||
157 | }; | ||
158 | |||
159 | static void apply_microcode_local(void *arg) | ||
160 | { | ||
161 | struct apply_microcode_ctx *ctx = arg; | ||
162 | |||
163 | ctx->err = microcode_ops->apply_microcode(smp_processor_id()); | ||
164 | } | ||
165 | |||
166 | static int apply_microcode_on_target(int cpu) | ||
167 | { | ||
168 | struct apply_microcode_ctx ctx = { .err = 0 }; | ||
169 | int ret; | ||
170 | |||
171 | ret = smp_call_function_single(cpu, apply_microcode_local, &ctx, 1); | ||
172 | if (!ret) | ||
173 | ret = ctx.err; | ||
174 | |||
175 | return ret; | ||
176 | } | ||
177 | |||
110 | #ifdef CONFIG_MICROCODE_OLD_INTERFACE | 178 | #ifdef CONFIG_MICROCODE_OLD_INTERFACE |
111 | static int do_microcode_update(const void __user *buf, size_t size) | 179 | static int do_microcode_update(const void __user *buf, size_t size) |
112 | { | 180 | { |
113 | cpumask_t old; | ||
114 | int error = 0; | 181 | int error = 0; |
115 | int cpu; | 182 | int cpu; |
116 | 183 | ||
117 | old = current->cpus_allowed; | ||
118 | |||
119 | for_each_online_cpu(cpu) { | 184 | for_each_online_cpu(cpu) { |
120 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | 185 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; |
186 | enum ucode_state ustate; | ||
121 | 187 | ||
122 | if (!uci->valid) | 188 | if (!uci->valid) |
123 | continue; | 189 | continue; |
124 | 190 | ||
125 | set_cpus_allowed_ptr(current, &cpumask_of_cpu(cpu)); | 191 | ustate = microcode_ops->request_microcode_user(cpu, buf, size); |
126 | error = microcode_ops->request_microcode_user(cpu, buf, size); | 192 | if (ustate == UCODE_ERROR) { |
127 | if (error < 0) | 193 | error = -1; |
128 | goto out; | 194 | break; |
129 | if (!error) | 195 | } else if (ustate == UCODE_OK) |
130 | microcode_ops->apply_microcode(cpu); | 196 | apply_microcode_on_target(cpu); |
131 | } | 197 | } |
132 | out: | 198 | |
133 | set_cpus_allowed_ptr(current, &old); | ||
134 | return error; | 199 | return error; |
135 | } | 200 | } |
136 | 201 | ||
@@ -143,19 +208,17 @@ static int microcode_open(struct inode *unused1, struct file *unused2) | |||
143 | static ssize_t microcode_write(struct file *file, const char __user *buf, | 208 | static ssize_t microcode_write(struct file *file, const char __user *buf, |
144 | size_t len, loff_t *ppos) | 209 | size_t len, loff_t *ppos) |
145 | { | 210 | { |
146 | ssize_t ret; | 211 | ssize_t ret = -EINVAL; |
147 | 212 | ||
148 | if ((len >> PAGE_SHIFT) > num_physpages) { | 213 | if ((len >> PAGE_SHIFT) > num_physpages) { |
149 | printk(KERN_ERR "microcode: too much data (max %ld pages)\n", | 214 | pr_err("microcode: too much data (max %ld pages)\n", num_physpages); |
150 | num_physpages); | 215 | return ret; |
151 | return -EINVAL; | ||
152 | } | 216 | } |
153 | 217 | ||
154 | get_online_cpus(); | 218 | get_online_cpus(); |
155 | mutex_lock(µcode_mutex); | 219 | mutex_lock(µcode_mutex); |
156 | 220 | ||
157 | ret = do_microcode_update(buf, len); | 221 | if (do_microcode_update(buf, len) == 0) |
158 | if (!ret) | ||
159 | ret = (ssize_t)len; | 222 | ret = (ssize_t)len; |
160 | 223 | ||
161 | mutex_unlock(µcode_mutex); | 224 | mutex_unlock(µcode_mutex); |
@@ -165,15 +228,15 @@ static ssize_t microcode_write(struct file *file, const char __user *buf, | |||
165 | } | 228 | } |
166 | 229 | ||
167 | static const struct file_operations microcode_fops = { | 230 | static const struct file_operations microcode_fops = { |
168 | .owner = THIS_MODULE, | 231 | .owner = THIS_MODULE, |
169 | .write = microcode_write, | 232 | .write = microcode_write, |
170 | .open = microcode_open, | 233 | .open = microcode_open, |
171 | }; | 234 | }; |
172 | 235 | ||
173 | static struct miscdevice microcode_dev = { | 236 | static struct miscdevice microcode_dev = { |
174 | .minor = MICROCODE_MINOR, | 237 | .minor = MICROCODE_MINOR, |
175 | .name = "microcode", | 238 | .name = "microcode", |
176 | .fops = µcode_fops, | 239 | .fops = µcode_fops, |
177 | }; | 240 | }; |
178 | 241 | ||
179 | static int __init microcode_dev_init(void) | 242 | static int __init microcode_dev_init(void) |
@@ -182,9 +245,7 @@ static int __init microcode_dev_init(void) | |||
182 | 245 | ||
183 | error = misc_register(µcode_dev); | 246 | error = misc_register(µcode_dev); |
184 | if (error) { | 247 | if (error) { |
185 | printk(KERN_ERR | 248 | pr_err("microcode: can't misc_register on minor=%d\n", MICROCODE_MINOR); |
186 | "microcode: can't misc_register on minor=%d\n", | ||
187 | MICROCODE_MINOR); | ||
188 | return error; | 249 | return error; |
189 | } | 250 | } |
190 | 251 | ||
@@ -205,42 +266,51 @@ MODULE_ALIAS_MISCDEV(MICROCODE_MINOR); | |||
205 | /* fake device for request_firmware */ | 266 | /* fake device for request_firmware */ |
206 | static struct platform_device *microcode_pdev; | 267 | static struct platform_device *microcode_pdev; |
207 | 268 | ||
208 | static long reload_for_cpu(void *unused) | 269 | static int reload_for_cpu(int cpu) |
209 | { | 270 | { |
210 | struct ucode_cpu_info *uci = ucode_cpu_info + smp_processor_id(); | 271 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; |
211 | int err = 0; | 272 | int err = 0; |
212 | 273 | ||
213 | mutex_lock(µcode_mutex); | 274 | mutex_lock(µcode_mutex); |
214 | if (uci->valid) { | 275 | if (uci->valid) { |
215 | err = microcode_ops->request_microcode_fw(smp_processor_id(), | 276 | enum ucode_state ustate; |
216 | µcode_pdev->dev); | 277 | |
217 | if (!err) | 278 | ustate = microcode_ops->request_microcode_fw(cpu, µcode_pdev->dev); |
218 | microcode_ops->apply_microcode(smp_processor_id()); | 279 | if (ustate == UCODE_OK) |
280 | apply_microcode_on_target(cpu); | ||
281 | else | ||
282 | if (ustate == UCODE_ERROR) | ||
283 | err = -EINVAL; | ||
219 | } | 284 | } |
220 | mutex_unlock(µcode_mutex); | 285 | mutex_unlock(µcode_mutex); |
286 | |||
221 | return err; | 287 | return err; |
222 | } | 288 | } |
223 | 289 | ||
224 | static ssize_t reload_store(struct sys_device *dev, | 290 | static ssize_t reload_store(struct sys_device *dev, |
225 | struct sysdev_attribute *attr, | 291 | struct sysdev_attribute *attr, |
226 | const char *buf, size_t sz) | 292 | const char *buf, size_t size) |
227 | { | 293 | { |
228 | char *end; | 294 | unsigned long val; |
229 | unsigned long val = simple_strtoul(buf, &end, 0); | ||
230 | int err = 0; | ||
231 | int cpu = dev->id; | 295 | int cpu = dev->id; |
296 | int ret = 0; | ||
297 | char *end; | ||
232 | 298 | ||
299 | val = simple_strtoul(buf, &end, 0); | ||
233 | if (end == buf) | 300 | if (end == buf) |
234 | return -EINVAL; | 301 | return -EINVAL; |
302 | |||
235 | if (val == 1) { | 303 | if (val == 1) { |
236 | get_online_cpus(); | 304 | get_online_cpus(); |
237 | if (cpu_online(cpu)) | 305 | if (cpu_online(cpu)) |
238 | err = work_on_cpu(cpu, reload_for_cpu, NULL); | 306 | ret = reload_for_cpu(cpu); |
239 | put_online_cpus(); | 307 | put_online_cpus(); |
240 | } | 308 | } |
241 | if (err) | 309 | |
242 | return err; | 310 | if (!ret) |
243 | return sz; | 311 | ret = size; |
312 | |||
313 | return ret; | ||
244 | } | 314 | } |
245 | 315 | ||
246 | static ssize_t version_show(struct sys_device *dev, | 316 | static ssize_t version_show(struct sys_device *dev, |
@@ -271,11 +341,11 @@ static struct attribute *mc_default_attrs[] = { | |||
271 | }; | 341 | }; |
272 | 342 | ||
273 | static struct attribute_group mc_attr_group = { | 343 | static struct attribute_group mc_attr_group = { |
274 | .attrs = mc_default_attrs, | 344 | .attrs = mc_default_attrs, |
275 | .name = "microcode", | 345 | .name = "microcode", |
276 | }; | 346 | }; |
277 | 347 | ||
278 | static void __microcode_fini_cpu(int cpu) | 348 | static void microcode_fini_cpu(int cpu) |
279 | { | 349 | { |
280 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | 350 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; |
281 | 351 | ||
@@ -283,103 +353,68 @@ static void __microcode_fini_cpu(int cpu) | |||
283 | uci->valid = 0; | 353 | uci->valid = 0; |
284 | } | 354 | } |
285 | 355 | ||
286 | static void microcode_fini_cpu(int cpu) | 356 | static enum ucode_state microcode_resume_cpu(int cpu) |
287 | { | ||
288 | mutex_lock(µcode_mutex); | ||
289 | __microcode_fini_cpu(cpu); | ||
290 | mutex_unlock(µcode_mutex); | ||
291 | } | ||
292 | |||
293 | static void collect_cpu_info(int cpu) | ||
294 | { | 357 | { |
295 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | 358 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; |
296 | 359 | ||
297 | memset(uci, 0, sizeof(*uci)); | 360 | if (!uci->mc) |
298 | if (!microcode_ops->collect_cpu_info(cpu, &uci->cpu_sig)) | 361 | return UCODE_NFOUND; |
299 | uci->valid = 1; | 362 | |
363 | pr_debug("microcode: CPU%d updated upon resume\n", cpu); | ||
364 | apply_microcode_on_target(cpu); | ||
365 | |||
366 | return UCODE_OK; | ||
300 | } | 367 | } |
301 | 368 | ||
302 | static int microcode_resume_cpu(int cpu) | 369 | static enum ucode_state microcode_init_cpu(int cpu) |
303 | { | 370 | { |
304 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | 371 | enum ucode_state ustate; |
305 | struct cpu_signature nsig; | ||
306 | 372 | ||
307 | pr_debug("microcode: CPU%d resumed\n", cpu); | 373 | if (collect_cpu_info(cpu)) |
374 | return UCODE_ERROR; | ||
308 | 375 | ||
309 | if (!uci->mc) | 376 | /* --dimm. Trigger a delayed update? */ |
310 | return 1; | 377 | if (system_state != SYSTEM_RUNNING) |
378 | return UCODE_NFOUND; | ||
311 | 379 | ||
312 | /* | 380 | ustate = microcode_ops->request_microcode_fw(cpu, µcode_pdev->dev); |
313 | * Let's verify that the 'cached' ucode does belong | ||
314 | * to this cpu (a bit of paranoia): | ||
315 | */ | ||
316 | if (microcode_ops->collect_cpu_info(cpu, &nsig)) { | ||
317 | __microcode_fini_cpu(cpu); | ||
318 | printk(KERN_ERR "failed to collect_cpu_info for resuming cpu #%d\n", | ||
319 | cpu); | ||
320 | return -1; | ||
321 | } | ||
322 | 381 | ||
323 | if ((nsig.sig != uci->cpu_sig.sig) || (nsig.pf != uci->cpu_sig.pf)) { | 382 | if (ustate == UCODE_OK) { |
324 | __microcode_fini_cpu(cpu); | 383 | pr_debug("microcode: CPU%d updated upon init\n", cpu); |
325 | printk(KERN_ERR "cached ucode doesn't match the resuming cpu #%d\n", | 384 | apply_microcode_on_target(cpu); |
326 | cpu); | ||
327 | /* Should we look for a new ucode here? */ | ||
328 | return 1; | ||
329 | } | 385 | } |
330 | 386 | ||
331 | return 0; | 387 | return ustate; |
332 | } | 388 | } |
333 | 389 | ||
334 | static long microcode_update_cpu(void *unused) | 390 | static enum ucode_state microcode_update_cpu(int cpu) |
335 | { | 391 | { |
336 | struct ucode_cpu_info *uci = ucode_cpu_info + smp_processor_id(); | 392 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; |
337 | int err = 0; | 393 | enum ucode_state ustate; |
338 | 394 | ||
339 | /* | 395 | if (uci->valid) |
340 | * Check if the system resume is in progress (uci->valid != NULL), | 396 | ustate = microcode_resume_cpu(cpu); |
341 | * otherwise just request a firmware: | 397 | else |
342 | */ | 398 | ustate = microcode_init_cpu(cpu); |
343 | if (uci->valid) { | ||
344 | err = microcode_resume_cpu(smp_processor_id()); | ||
345 | } else { | ||
346 | collect_cpu_info(smp_processor_id()); | ||
347 | if (uci->valid && system_state == SYSTEM_RUNNING) | ||
348 | err = microcode_ops->request_microcode_fw( | ||
349 | smp_processor_id(), | ||
350 | µcode_pdev->dev); | ||
351 | } | ||
352 | if (!err) | ||
353 | microcode_ops->apply_microcode(smp_processor_id()); | ||
354 | return err; | ||
355 | } | ||
356 | 399 | ||
357 | static int microcode_init_cpu(int cpu) | 400 | return ustate; |
358 | { | ||
359 | int err; | ||
360 | mutex_lock(µcode_mutex); | ||
361 | err = work_on_cpu(cpu, microcode_update_cpu, NULL); | ||
362 | mutex_unlock(µcode_mutex); | ||
363 | |||
364 | return err; | ||
365 | } | 401 | } |
366 | 402 | ||
367 | static int mc_sysdev_add(struct sys_device *sys_dev) | 403 | static int mc_sysdev_add(struct sys_device *sys_dev) |
368 | { | 404 | { |
369 | int err, cpu = sys_dev->id; | 405 | int err, cpu = sys_dev->id; |
370 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | ||
371 | 406 | ||
372 | if (!cpu_online(cpu)) | 407 | if (!cpu_online(cpu)) |
373 | return 0; | 408 | return 0; |
374 | 409 | ||
375 | pr_debug("microcode: CPU%d added\n", cpu); | 410 | pr_debug("microcode: CPU%d added\n", cpu); |
376 | memset(uci, 0, sizeof(*uci)); | ||
377 | 411 | ||
378 | err = sysfs_create_group(&sys_dev->kobj, &mc_attr_group); | 412 | err = sysfs_create_group(&sys_dev->kobj, &mc_attr_group); |
379 | if (err) | 413 | if (err) |
380 | return err; | 414 | return err; |
381 | 415 | ||
382 | err = microcode_init_cpu(cpu); | 416 | if (microcode_init_cpu(cpu) == UCODE_ERROR) |
417 | err = -EINVAL; | ||
383 | 418 | ||
384 | return err; | 419 | return err; |
385 | } | 420 | } |
@@ -400,19 +435,30 @@ static int mc_sysdev_remove(struct sys_device *sys_dev) | |||
400 | static int mc_sysdev_resume(struct sys_device *dev) | 435 | static int mc_sysdev_resume(struct sys_device *dev) |
401 | { | 436 | { |
402 | int cpu = dev->id; | 437 | int cpu = dev->id; |
438 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | ||
403 | 439 | ||
404 | if (!cpu_online(cpu)) | 440 | if (!cpu_online(cpu)) |
405 | return 0; | 441 | return 0; |
406 | 442 | ||
407 | /* only CPU 0 will apply ucode here */ | 443 | /* |
408 | microcode_update_cpu(NULL); | 444 | * All non-bootup cpus are still disabled, |
445 | * so only CPU 0 will apply ucode here. | ||
446 | * | ||
447 | * Moreover, there can be no concurrent | ||
448 | * updates from any other places at this point. | ||
449 | */ | ||
450 | WARN_ON(cpu != 0); | ||
451 | |||
452 | if (uci->valid && uci->mc) | ||
453 | microcode_ops->apply_microcode(cpu); | ||
454 | |||
409 | return 0; | 455 | return 0; |
410 | } | 456 | } |
411 | 457 | ||
412 | static struct sysdev_driver mc_sysdev_driver = { | 458 | static struct sysdev_driver mc_sysdev_driver = { |
413 | .add = mc_sysdev_add, | 459 | .add = mc_sysdev_add, |
414 | .remove = mc_sysdev_remove, | 460 | .remove = mc_sysdev_remove, |
415 | .resume = mc_sysdev_resume, | 461 | .resume = mc_sysdev_resume, |
416 | }; | 462 | }; |
417 | 463 | ||
418 | static __cpuinit int | 464 | static __cpuinit int |
@@ -425,15 +471,12 @@ mc_cpu_callback(struct notifier_block *nb, unsigned long action, void *hcpu) | |||
425 | switch (action) { | 471 | switch (action) { |
426 | case CPU_ONLINE: | 472 | case CPU_ONLINE: |
427 | case CPU_ONLINE_FROZEN: | 473 | case CPU_ONLINE_FROZEN: |
428 | if (microcode_init_cpu(cpu)) | 474 | microcode_update_cpu(cpu); |
429 | printk(KERN_ERR "microcode: failed to init CPU%d\n", | ||
430 | cpu); | ||
431 | case CPU_DOWN_FAILED: | 475 | case CPU_DOWN_FAILED: |
432 | case CPU_DOWN_FAILED_FROZEN: | 476 | case CPU_DOWN_FAILED_FROZEN: |
433 | pr_debug("microcode: CPU%d added\n", cpu); | 477 | pr_debug("microcode: CPU%d added\n", cpu); |
434 | if (sysfs_create_group(&sys_dev->kobj, &mc_attr_group)) | 478 | if (sysfs_create_group(&sys_dev->kobj, &mc_attr_group)) |
435 | printk(KERN_ERR "microcode: Failed to create the sysfs " | 479 | pr_err("microcode: Failed to create group for CPU%d\n", cpu); |
436 | "group for CPU%d\n", cpu); | ||
437 | break; | 480 | break; |
438 | case CPU_DOWN_PREPARE: | 481 | case CPU_DOWN_PREPARE: |
439 | case CPU_DOWN_PREPARE_FROZEN: | 482 | case CPU_DOWN_PREPARE_FROZEN: |
@@ -465,13 +508,10 @@ static int __init microcode_init(void) | |||
465 | microcode_ops = init_amd_microcode(); | 508 | microcode_ops = init_amd_microcode(); |
466 | 509 | ||
467 | if (!microcode_ops) { | 510 | if (!microcode_ops) { |
468 | printk(KERN_ERR "microcode: no support for this CPU vendor\n"); | 511 | pr_err("microcode: no support for this CPU vendor\n"); |
469 | return -ENODEV; | 512 | return -ENODEV; |
470 | } | 513 | } |
471 | 514 | ||
472 | error = microcode_dev_init(); | ||
473 | if (error) | ||
474 | return error; | ||
475 | microcode_pdev = platform_device_register_simple("microcode", -1, | 515 | microcode_pdev = platform_device_register_simple("microcode", -1, |
476 | NULL, 0); | 516 | NULL, 0); |
477 | if (IS_ERR(microcode_pdev)) { | 517 | if (IS_ERR(microcode_pdev)) { |
@@ -480,23 +520,31 @@ static int __init microcode_init(void) | |||
480 | } | 520 | } |
481 | 521 | ||
482 | get_online_cpus(); | 522 | get_online_cpus(); |
523 | mutex_lock(µcode_mutex); | ||
524 | |||
483 | error = sysdev_driver_register(&cpu_sysdev_class, &mc_sysdev_driver); | 525 | error = sysdev_driver_register(&cpu_sysdev_class, &mc_sysdev_driver); |
526 | |||
527 | mutex_unlock(µcode_mutex); | ||
484 | put_online_cpus(); | 528 | put_online_cpus(); |
529 | |||
485 | if (error) { | 530 | if (error) { |
486 | microcode_dev_exit(); | ||
487 | platform_device_unregister(microcode_pdev); | 531 | platform_device_unregister(microcode_pdev); |
488 | return error; | 532 | return error; |
489 | } | 533 | } |
490 | 534 | ||
535 | error = microcode_dev_init(); | ||
536 | if (error) | ||
537 | return error; | ||
538 | |||
491 | register_hotcpu_notifier(&mc_cpu_notifier); | 539 | register_hotcpu_notifier(&mc_cpu_notifier); |
492 | 540 | ||
493 | printk(KERN_INFO | 541 | pr_info("Microcode Update Driver: v" MICROCODE_VERSION |
494 | "Microcode Update Driver: v" MICROCODE_VERSION | ||
495 | " <tigran@aivazian.fsnet.co.uk>," | 542 | " <tigran@aivazian.fsnet.co.uk>," |
496 | " Peter Oruba\n"); | 543 | " Peter Oruba\n"); |
497 | 544 | ||
498 | return 0; | 545 | return 0; |
499 | } | 546 | } |
547 | module_init(microcode_init); | ||
500 | 548 | ||
501 | static void __exit microcode_exit(void) | 549 | static void __exit microcode_exit(void) |
502 | { | 550 | { |
@@ -505,16 +553,17 @@ static void __exit microcode_exit(void) | |||
505 | unregister_hotcpu_notifier(&mc_cpu_notifier); | 553 | unregister_hotcpu_notifier(&mc_cpu_notifier); |
506 | 554 | ||
507 | get_online_cpus(); | 555 | get_online_cpus(); |
556 | mutex_lock(µcode_mutex); | ||
557 | |||
508 | sysdev_driver_unregister(&cpu_sysdev_class, &mc_sysdev_driver); | 558 | sysdev_driver_unregister(&cpu_sysdev_class, &mc_sysdev_driver); |
559 | |||
560 | mutex_unlock(µcode_mutex); | ||
509 | put_online_cpus(); | 561 | put_online_cpus(); |
510 | 562 | ||
511 | platform_device_unregister(microcode_pdev); | 563 | platform_device_unregister(microcode_pdev); |
512 | 564 | ||
513 | microcode_ops = NULL; | 565 | microcode_ops = NULL; |
514 | 566 | ||
515 | printk(KERN_INFO | 567 | pr_info("Microcode Update Driver: v" MICROCODE_VERSION " removed.\n"); |
516 | "Microcode Update Driver: v" MICROCODE_VERSION " removed.\n"); | ||
517 | } | 568 | } |
518 | |||
519 | module_init(microcode_init); | ||
520 | module_exit(microcode_exit); | 569 | module_exit(microcode_exit); |
diff --git a/arch/x86/kernel/microcode_intel.c b/arch/x86/kernel/microcode_intel.c index 149b9ec7c1ab..0d334ddd0a96 100644 --- a/arch/x86/kernel/microcode_intel.c +++ b/arch/x86/kernel/microcode_intel.c | |||
@@ -70,24 +70,11 @@ | |||
70 | * Fix sigmatch() macro to handle old CPUs with pf == 0. | 70 | * Fix sigmatch() macro to handle old CPUs with pf == 0. |
71 | * Thanks to Stuart Swales for pointing out this bug. | 71 | * Thanks to Stuart Swales for pointing out this bug. |
72 | */ | 72 | */ |
73 | #include <linux/platform_device.h> | ||
74 | #include <linux/capability.h> | ||
75 | #include <linux/miscdevice.h> | ||
76 | #include <linux/firmware.h> | 73 | #include <linux/firmware.h> |
77 | #include <linux/smp_lock.h> | ||
78 | #include <linux/spinlock.h> | ||
79 | #include <linux/cpumask.h> | ||
80 | #include <linux/uaccess.h> | 74 | #include <linux/uaccess.h> |
81 | #include <linux/vmalloc.h> | ||
82 | #include <linux/kernel.h> | 75 | #include <linux/kernel.h> |
83 | #include <linux/module.h> | 76 | #include <linux/module.h> |
84 | #include <linux/mutex.h> | 77 | #include <linux/vmalloc.h> |
85 | #include <linux/sched.h> | ||
86 | #include <linux/init.h> | ||
87 | #include <linux/slab.h> | ||
88 | #include <linux/cpu.h> | ||
89 | #include <linux/fs.h> | ||
90 | #include <linux/mm.h> | ||
91 | 78 | ||
92 | #include <asm/microcode.h> | 79 | #include <asm/microcode.h> |
93 | #include <asm/processor.h> | 80 | #include <asm/processor.h> |
@@ -150,13 +137,9 @@ struct extended_sigtable { | |||
150 | 137 | ||
151 | #define exttable_size(et) ((et)->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE) | 138 | #define exttable_size(et) ((et)->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE) |
152 | 139 | ||
153 | /* serialize access to the physical write to MSR 0x79 */ | ||
154 | static DEFINE_SPINLOCK(microcode_update_lock); | ||
155 | |||
156 | static int collect_cpu_info(int cpu_num, struct cpu_signature *csig) | 140 | static int collect_cpu_info(int cpu_num, struct cpu_signature *csig) |
157 | { | 141 | { |
158 | struct cpuinfo_x86 *c = &cpu_data(cpu_num); | 142 | struct cpuinfo_x86 *c = &cpu_data(cpu_num); |
159 | unsigned long flags; | ||
160 | unsigned int val[2]; | 143 | unsigned int val[2]; |
161 | 144 | ||
162 | memset(csig, 0, sizeof(*csig)); | 145 | memset(csig, 0, sizeof(*csig)); |
@@ -176,18 +159,14 @@ static int collect_cpu_info(int cpu_num, struct cpu_signature *csig) | |||
176 | csig->pf = 1 << ((val[1] >> 18) & 7); | 159 | csig->pf = 1 << ((val[1] >> 18) & 7); |
177 | } | 160 | } |
178 | 161 | ||
179 | /* serialize access to the physical write to MSR 0x79 */ | ||
180 | spin_lock_irqsave(µcode_update_lock, flags); | ||
181 | |||
182 | wrmsr(MSR_IA32_UCODE_REV, 0, 0); | 162 | wrmsr(MSR_IA32_UCODE_REV, 0, 0); |
183 | /* see notes above for revision 1.07. Apparent chip bug */ | 163 | /* see notes above for revision 1.07. Apparent chip bug */ |
184 | sync_core(); | 164 | sync_core(); |
185 | /* get the current revision from MSR 0x8B */ | 165 | /* get the current revision from MSR 0x8B */ |
186 | rdmsr(MSR_IA32_UCODE_REV, val[0], csig->rev); | 166 | rdmsr(MSR_IA32_UCODE_REV, val[0], csig->rev); |
187 | spin_unlock_irqrestore(µcode_update_lock, flags); | ||
188 | 167 | ||
189 | pr_debug("microcode: collect_cpu_info : sig=0x%x, pf=0x%x, rev=0x%x\n", | 168 | printk(KERN_INFO "microcode: CPU%d sig=0x%x, pf=0x%x, revision=0x%x\n", |
190 | csig->sig, csig->pf, csig->rev); | 169 | cpu_num, csig->sig, csig->pf, csig->rev); |
191 | 170 | ||
192 | return 0; | 171 | return 0; |
193 | } | 172 | } |
@@ -318,11 +297,10 @@ get_matching_microcode(struct cpu_signature *cpu_sig, void *mc, int rev) | |||
318 | return 0; | 297 | return 0; |
319 | } | 298 | } |
320 | 299 | ||
321 | static void apply_microcode(int cpu) | 300 | static int apply_microcode(int cpu) |
322 | { | 301 | { |
323 | struct microcode_intel *mc_intel; | 302 | struct microcode_intel *mc_intel; |
324 | struct ucode_cpu_info *uci; | 303 | struct ucode_cpu_info *uci; |
325 | unsigned long flags; | ||
326 | unsigned int val[2]; | 304 | unsigned int val[2]; |
327 | int cpu_num; | 305 | int cpu_num; |
328 | 306 | ||
@@ -334,10 +312,7 @@ static void apply_microcode(int cpu) | |||
334 | BUG_ON(cpu_num != cpu); | 312 | BUG_ON(cpu_num != cpu); |
335 | 313 | ||
336 | if (mc_intel == NULL) | 314 | if (mc_intel == NULL) |
337 | return; | 315 | return 0; |
338 | |||
339 | /* serialize access to the physical write to MSR 0x79 */ | ||
340 | spin_lock_irqsave(µcode_update_lock, flags); | ||
341 | 316 | ||
342 | /* write microcode via MSR 0x79 */ | 317 | /* write microcode via MSR 0x79 */ |
343 | wrmsr(MSR_IA32_UCODE_WRITE, | 318 | wrmsr(MSR_IA32_UCODE_WRITE, |
@@ -351,30 +326,32 @@ static void apply_microcode(int cpu) | |||
351 | /* get the current revision from MSR 0x8B */ | 326 | /* get the current revision from MSR 0x8B */ |
352 | rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]); | 327 | rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]); |
353 | 328 | ||
354 | spin_unlock_irqrestore(µcode_update_lock, flags); | ||
355 | if (val[1] != mc_intel->hdr.rev) { | 329 | if (val[1] != mc_intel->hdr.rev) { |
356 | printk(KERN_ERR "microcode: CPU%d update from revision " | 330 | printk(KERN_ERR "microcode: CPU%d update " |
357 | "0x%x to 0x%x failed\n", | 331 | "to revision 0x%x failed\n", |
358 | cpu_num, uci->cpu_sig.rev, val[1]); | 332 | cpu_num, mc_intel->hdr.rev); |
359 | return; | 333 | return -1; |
360 | } | 334 | } |
361 | printk(KERN_INFO "microcode: CPU%d updated from revision " | 335 | printk(KERN_INFO "microcode: CPU%d updated to revision " |
362 | "0x%x to 0x%x, date = %04x-%02x-%02x \n", | 336 | "0x%x, date = %04x-%02x-%02x \n", |
363 | cpu_num, uci->cpu_sig.rev, val[1], | 337 | cpu_num, val[1], |
364 | mc_intel->hdr.date & 0xffff, | 338 | mc_intel->hdr.date & 0xffff, |
365 | mc_intel->hdr.date >> 24, | 339 | mc_intel->hdr.date >> 24, |
366 | (mc_intel->hdr.date >> 16) & 0xff); | 340 | (mc_intel->hdr.date >> 16) & 0xff); |
367 | 341 | ||
368 | uci->cpu_sig.rev = val[1]; | 342 | uci->cpu_sig.rev = val[1]; |
343 | |||
344 | return 0; | ||
369 | } | 345 | } |
370 | 346 | ||
371 | static int generic_load_microcode(int cpu, void *data, size_t size, | 347 | static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size, |
372 | int (*get_ucode_data)(void *, const void *, size_t)) | 348 | int (*get_ucode_data)(void *, const void *, size_t)) |
373 | { | 349 | { |
374 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | 350 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; |
375 | u8 *ucode_ptr = data, *new_mc = NULL, *mc; | 351 | u8 *ucode_ptr = data, *new_mc = NULL, *mc; |
376 | int new_rev = uci->cpu_sig.rev; | 352 | int new_rev = uci->cpu_sig.rev; |
377 | unsigned int leftover = size; | 353 | unsigned int leftover = size; |
354 | enum ucode_state state = UCODE_OK; | ||
378 | 355 | ||
379 | while (leftover) { | 356 | while (leftover) { |
380 | struct microcode_header_intel mc_header; | 357 | struct microcode_header_intel mc_header; |
@@ -412,11 +389,15 @@ static int generic_load_microcode(int cpu, void *data, size_t size, | |||
412 | leftover -= mc_size; | 389 | leftover -= mc_size; |
413 | } | 390 | } |
414 | 391 | ||
415 | if (!new_mc) | 392 | if (leftover) { |
393 | if (new_mc) | ||
394 | vfree(new_mc); | ||
395 | state = UCODE_ERROR; | ||
416 | goto out; | 396 | goto out; |
397 | } | ||
417 | 398 | ||
418 | if (leftover) { | 399 | if (!new_mc) { |
419 | vfree(new_mc); | 400 | state = UCODE_NFOUND; |
420 | goto out; | 401 | goto out; |
421 | } | 402 | } |
422 | 403 | ||
@@ -427,9 +408,8 @@ static int generic_load_microcode(int cpu, void *data, size_t size, | |||
427 | pr_debug("microcode: CPU%d found a matching microcode update with" | 408 | pr_debug("microcode: CPU%d found a matching microcode update with" |
428 | " version 0x%x (current=0x%x)\n", | 409 | " version 0x%x (current=0x%x)\n", |
429 | cpu, new_rev, uci->cpu_sig.rev); | 410 | cpu, new_rev, uci->cpu_sig.rev); |
430 | 411 | out: | |
431 | out: | 412 | return state; |
432 | return (int)leftover; | ||
433 | } | 413 | } |
434 | 414 | ||
435 | static int get_ucode_fw(void *to, const void *from, size_t n) | 415 | static int get_ucode_fw(void *to, const void *from, size_t n) |
@@ -438,21 +418,19 @@ static int get_ucode_fw(void *to, const void *from, size_t n) | |||
438 | return 0; | 418 | return 0; |
439 | } | 419 | } |
440 | 420 | ||
441 | static int request_microcode_fw(int cpu, struct device *device) | 421 | static enum ucode_state request_microcode_fw(int cpu, struct device *device) |
442 | { | 422 | { |
443 | char name[30]; | 423 | char name[30]; |
444 | struct cpuinfo_x86 *c = &cpu_data(cpu); | 424 | struct cpuinfo_x86 *c = &cpu_data(cpu); |
445 | const struct firmware *firmware; | 425 | const struct firmware *firmware; |
446 | int ret; | 426 | enum ucode_state ret; |
447 | 427 | ||
448 | /* We should bind the task to the CPU */ | ||
449 | BUG_ON(cpu != raw_smp_processor_id()); | ||
450 | sprintf(name, "intel-ucode/%02x-%02x-%02x", | 428 | sprintf(name, "intel-ucode/%02x-%02x-%02x", |
451 | c->x86, c->x86_model, c->x86_mask); | 429 | c->x86, c->x86_model, c->x86_mask); |
452 | ret = request_firmware(&firmware, name, device); | 430 | |
453 | if (ret) { | 431 | if (request_firmware(&firmware, name, device)) { |
454 | pr_debug("microcode: data file %s load failed\n", name); | 432 | pr_debug("microcode: data file %s load failed\n", name); |
455 | return ret; | 433 | return UCODE_NFOUND; |
456 | } | 434 | } |
457 | 435 | ||
458 | ret = generic_load_microcode(cpu, (void *)firmware->data, | 436 | ret = generic_load_microcode(cpu, (void *)firmware->data, |
@@ -468,11 +446,9 @@ static int get_ucode_user(void *to, const void *from, size_t n) | |||
468 | return copy_from_user(to, from, n); | 446 | return copy_from_user(to, from, n); |
469 | } | 447 | } |
470 | 448 | ||
471 | static int request_microcode_user(int cpu, const void __user *buf, size_t size) | 449 | static enum ucode_state |
450 | request_microcode_user(int cpu, const void __user *buf, size_t size) | ||
472 | { | 451 | { |
473 | /* We should bind the task to the CPU */ | ||
474 | BUG_ON(cpu != raw_smp_processor_id()); | ||
475 | |||
476 | return generic_load_microcode(cpu, (void *)buf, size, &get_ucode_user); | 452 | return generic_load_microcode(cpu, (void *)buf, size, &get_ucode_user); |
477 | } | 453 | } |
478 | 454 | ||
diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c index 70fd7e414c15..651c93b28862 100644 --- a/arch/x86/kernel/mpparse.c +++ b/arch/x86/kernel/mpparse.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <linux/acpi.h> | 17 | #include <linux/acpi.h> |
18 | #include <linux/module.h> | 18 | #include <linux/module.h> |
19 | #include <linux/smp.h> | 19 | #include <linux/smp.h> |
20 | #include <linux/pci.h> | ||
20 | 21 | ||
21 | #include <asm/mtrr.h> | 22 | #include <asm/mtrr.h> |
22 | #include <asm/mpspec.h> | 23 | #include <asm/mpspec.h> |
@@ -870,24 +871,17 @@ static | |||
870 | inline void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) {} | 871 | inline void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) {} |
871 | #endif /* CONFIG_X86_IO_APIC */ | 872 | #endif /* CONFIG_X86_IO_APIC */ |
872 | 873 | ||
873 | static int check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length, | 874 | static int |
874 | int count) | 875 | check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length, int count) |
875 | { | 876 | { |
876 | if (!mpc_new_phys) { | 877 | int ret = 0; |
877 | pr_info("No spare slots, try to append...take your risk, " | 878 | |
878 | "new mpc_length %x\n", count); | 879 | if (!mpc_new_phys || count <= mpc_new_length) { |
879 | } else { | 880 | WARN(1, "update_mptable: No spare slots (length: %x)\n", count); |
880 | if (count <= mpc_new_length) | 881 | return -1; |
881 | pr_info("No spare slots, try to append..., " | ||
882 | "new mpc_length %x\n", count); | ||
883 | else { | ||
884 | pr_err("mpc_new_length %lx is too small\n", | ||
885 | mpc_new_length); | ||
886 | return -1; | ||
887 | } | ||
888 | } | 882 | } |
889 | 883 | ||
890 | return 0; | 884 | return ret; |
891 | } | 885 | } |
892 | 886 | ||
893 | static int __init replace_intsrc_all(struct mpc_table *mpc, | 887 | static int __init replace_intsrc_all(struct mpc_table *mpc, |
@@ -946,7 +940,7 @@ static int __init replace_intsrc_all(struct mpc_table *mpc, | |||
946 | } else { | 940 | } else { |
947 | struct mpc_intsrc *m = (struct mpc_intsrc *)mpt; | 941 | struct mpc_intsrc *m = (struct mpc_intsrc *)mpt; |
948 | count += sizeof(struct mpc_intsrc); | 942 | count += sizeof(struct mpc_intsrc); |
949 | if (!check_slot(mpc_new_phys, mpc_new_length, count)) | 943 | if (check_slot(mpc_new_phys, mpc_new_length, count) < 0) |
950 | goto out; | 944 | goto out; |
951 | assign_to_mpc_intsrc(&mp_irqs[i], m); | 945 | assign_to_mpc_intsrc(&mp_irqs[i], m); |
952 | mpc->length = count; | 946 | mpc->length = count; |
@@ -963,11 +957,14 @@ out: | |||
963 | return 0; | 957 | return 0; |
964 | } | 958 | } |
965 | 959 | ||
966 | static int __initdata enable_update_mptable; | 960 | int enable_update_mptable; |
967 | 961 | ||
968 | static int __init update_mptable_setup(char *str) | 962 | static int __init update_mptable_setup(char *str) |
969 | { | 963 | { |
970 | enable_update_mptable = 1; | 964 | enable_update_mptable = 1; |
965 | #ifdef CONFIG_PCI | ||
966 | pci_routeirq = 1; | ||
967 | #endif | ||
971 | return 0; | 968 | return 0; |
972 | } | 969 | } |
973 | early_param("update_mptable", update_mptable_setup); | 970 | early_param("update_mptable", update_mptable_setup); |
@@ -980,6 +977,9 @@ static int __initdata alloc_mptable; | |||
980 | static int __init parse_alloc_mptable_opt(char *p) | 977 | static int __init parse_alloc_mptable_opt(char *p) |
981 | { | 978 | { |
982 | enable_update_mptable = 1; | 979 | enable_update_mptable = 1; |
980 | #ifdef CONFIG_PCI | ||
981 | pci_routeirq = 1; | ||
982 | #endif | ||
983 | alloc_mptable = 1; | 983 | alloc_mptable = 1; |
984 | if (!p) | 984 | if (!p) |
985 | return 0; | 985 | return 0; |
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c index 9faf43bea336..70ec9b951d76 100644 --- a/arch/x86/kernel/paravirt.c +++ b/arch/x86/kernel/paravirt.c | |||
@@ -248,18 +248,16 @@ static DEFINE_PER_CPU(enum paravirt_lazy_mode, paravirt_lazy_mode) = PARAVIRT_LA | |||
248 | 248 | ||
249 | static inline void enter_lazy(enum paravirt_lazy_mode mode) | 249 | static inline void enter_lazy(enum paravirt_lazy_mode mode) |
250 | { | 250 | { |
251 | BUG_ON(__get_cpu_var(paravirt_lazy_mode) != PARAVIRT_LAZY_NONE); | 251 | BUG_ON(percpu_read(paravirt_lazy_mode) != PARAVIRT_LAZY_NONE); |
252 | BUG_ON(preemptible()); | ||
253 | 252 | ||
254 | __get_cpu_var(paravirt_lazy_mode) = mode; | 253 | percpu_write(paravirt_lazy_mode, mode); |
255 | } | 254 | } |
256 | 255 | ||
257 | void paravirt_leave_lazy(enum paravirt_lazy_mode mode) | 256 | static void leave_lazy(enum paravirt_lazy_mode mode) |
258 | { | 257 | { |
259 | BUG_ON(__get_cpu_var(paravirt_lazy_mode) != mode); | 258 | BUG_ON(percpu_read(paravirt_lazy_mode) != mode); |
260 | BUG_ON(preemptible()); | ||
261 | 259 | ||
262 | __get_cpu_var(paravirt_lazy_mode) = PARAVIRT_LAZY_NONE; | 260 | percpu_write(paravirt_lazy_mode, PARAVIRT_LAZY_NONE); |
263 | } | 261 | } |
264 | 262 | ||
265 | void paravirt_enter_lazy_mmu(void) | 263 | void paravirt_enter_lazy_mmu(void) |
@@ -269,22 +267,36 @@ void paravirt_enter_lazy_mmu(void) | |||
269 | 267 | ||
270 | void paravirt_leave_lazy_mmu(void) | 268 | void paravirt_leave_lazy_mmu(void) |
271 | { | 269 | { |
272 | paravirt_leave_lazy(PARAVIRT_LAZY_MMU); | 270 | leave_lazy(PARAVIRT_LAZY_MMU); |
273 | } | 271 | } |
274 | 272 | ||
275 | void paravirt_enter_lazy_cpu(void) | 273 | void paravirt_start_context_switch(struct task_struct *prev) |
276 | { | 274 | { |
275 | BUG_ON(preemptible()); | ||
276 | |||
277 | if (percpu_read(paravirt_lazy_mode) == PARAVIRT_LAZY_MMU) { | ||
278 | arch_leave_lazy_mmu_mode(); | ||
279 | set_ti_thread_flag(task_thread_info(prev), TIF_LAZY_MMU_UPDATES); | ||
280 | } | ||
277 | enter_lazy(PARAVIRT_LAZY_CPU); | 281 | enter_lazy(PARAVIRT_LAZY_CPU); |
278 | } | 282 | } |
279 | 283 | ||
280 | void paravirt_leave_lazy_cpu(void) | 284 | void paravirt_end_context_switch(struct task_struct *next) |
281 | { | 285 | { |
282 | paravirt_leave_lazy(PARAVIRT_LAZY_CPU); | 286 | BUG_ON(preemptible()); |
287 | |||
288 | leave_lazy(PARAVIRT_LAZY_CPU); | ||
289 | |||
290 | if (test_and_clear_ti_thread_flag(task_thread_info(next), TIF_LAZY_MMU_UPDATES)) | ||
291 | arch_enter_lazy_mmu_mode(); | ||
283 | } | 292 | } |
284 | 293 | ||
285 | enum paravirt_lazy_mode paravirt_get_lazy_mode(void) | 294 | enum paravirt_lazy_mode paravirt_get_lazy_mode(void) |
286 | { | 295 | { |
287 | return __get_cpu_var(paravirt_lazy_mode); | 296 | if (in_interrupt()) |
297 | return PARAVIRT_LAZY_NONE; | ||
298 | |||
299 | return percpu_read(paravirt_lazy_mode); | ||
288 | } | 300 | } |
289 | 301 | ||
290 | void arch_flush_lazy_mmu_mode(void) | 302 | void arch_flush_lazy_mmu_mode(void) |
@@ -292,7 +304,6 @@ void arch_flush_lazy_mmu_mode(void) | |||
292 | preempt_disable(); | 304 | preempt_disable(); |
293 | 305 | ||
294 | if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) { | 306 | if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) { |
295 | WARN_ON(preempt_count() == 1); | ||
296 | arch_leave_lazy_mmu_mode(); | 307 | arch_leave_lazy_mmu_mode(); |
297 | arch_enter_lazy_mmu_mode(); | 308 | arch_enter_lazy_mmu_mode(); |
298 | } | 309 | } |
@@ -300,19 +311,6 @@ void arch_flush_lazy_mmu_mode(void) | |||
300 | preempt_enable(); | 311 | preempt_enable(); |
301 | } | 312 | } |
302 | 313 | ||
303 | void arch_flush_lazy_cpu_mode(void) | ||
304 | { | ||
305 | preempt_disable(); | ||
306 | |||
307 | if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) { | ||
308 | WARN_ON(preempt_count() == 1); | ||
309 | arch_leave_lazy_cpu_mode(); | ||
310 | arch_enter_lazy_cpu_mode(); | ||
311 | } | ||
312 | |||
313 | preempt_enable(); | ||
314 | } | ||
315 | |||
316 | struct pv_info pv_info = { | 314 | struct pv_info pv_info = { |
317 | .name = "bare hardware", | 315 | .name = "bare hardware", |
318 | .paravirt_enabled = 0, | 316 | .paravirt_enabled = 0, |
@@ -404,10 +402,8 @@ struct pv_cpu_ops pv_cpu_ops = { | |||
404 | .set_iopl_mask = native_set_iopl_mask, | 402 | .set_iopl_mask = native_set_iopl_mask, |
405 | .io_delay = native_io_delay, | 403 | .io_delay = native_io_delay, |
406 | 404 | ||
407 | .lazy_mode = { | 405 | .start_context_switch = paravirt_nop, |
408 | .enter = paravirt_nop, | 406 | .end_context_switch = paravirt_nop, |
409 | .leave = paravirt_nop, | ||
410 | }, | ||
411 | }; | 407 | }; |
412 | 408 | ||
413 | struct pv_apic_ops pv_apic_ops = { | 409 | struct pv_apic_ops pv_apic_ops = { |
diff --git a/arch/x86/kernel/pci-calgary_64.c b/arch/x86/kernel/pci-calgary_64.c index 755c21e906f3..971a3bec47a8 100644 --- a/arch/x86/kernel/pci-calgary_64.c +++ b/arch/x86/kernel/pci-calgary_64.c | |||
@@ -186,37 +186,6 @@ static struct cal_chipset_ops calioc2_chip_ops = { | |||
186 | 186 | ||
187 | static struct calgary_bus_info bus_info[MAX_PHB_BUS_NUM] = { { NULL, 0, 0 }, }; | 187 | static struct calgary_bus_info bus_info[MAX_PHB_BUS_NUM] = { { NULL, 0, 0 }, }; |
188 | 188 | ||
189 | /* enable this to stress test the chip's TCE cache */ | ||
190 | #ifdef CONFIG_IOMMU_DEBUG | ||
191 | static int debugging = 1; | ||
192 | |||
193 | static inline unsigned long verify_bit_range(unsigned long* bitmap, | ||
194 | int expected, unsigned long start, unsigned long end) | ||
195 | { | ||
196 | unsigned long idx = start; | ||
197 | |||
198 | BUG_ON(start >= end); | ||
199 | |||
200 | while (idx < end) { | ||
201 | if (!!test_bit(idx, bitmap) != expected) | ||
202 | return idx; | ||
203 | ++idx; | ||
204 | } | ||
205 | |||
206 | /* all bits have the expected value */ | ||
207 | return ~0UL; | ||
208 | } | ||
209 | #else /* debugging is disabled */ | ||
210 | static int debugging; | ||
211 | |||
212 | static inline unsigned long verify_bit_range(unsigned long* bitmap, | ||
213 | int expected, unsigned long start, unsigned long end) | ||
214 | { | ||
215 | return ~0UL; | ||
216 | } | ||
217 | |||
218 | #endif /* CONFIG_IOMMU_DEBUG */ | ||
219 | |||
220 | static inline int translation_enabled(struct iommu_table *tbl) | 189 | static inline int translation_enabled(struct iommu_table *tbl) |
221 | { | 190 | { |
222 | /* only PHBs with translation enabled have an IOMMU table */ | 191 | /* only PHBs with translation enabled have an IOMMU table */ |
@@ -228,7 +197,6 @@ static void iommu_range_reserve(struct iommu_table *tbl, | |||
228 | { | 197 | { |
229 | unsigned long index; | 198 | unsigned long index; |
230 | unsigned long end; | 199 | unsigned long end; |
231 | unsigned long badbit; | ||
232 | unsigned long flags; | 200 | unsigned long flags; |
233 | 201 | ||
234 | index = start_addr >> PAGE_SHIFT; | 202 | index = start_addr >> PAGE_SHIFT; |
@@ -243,14 +211,6 @@ static void iommu_range_reserve(struct iommu_table *tbl, | |||
243 | 211 | ||
244 | spin_lock_irqsave(&tbl->it_lock, flags); | 212 | spin_lock_irqsave(&tbl->it_lock, flags); |
245 | 213 | ||
246 | badbit = verify_bit_range(tbl->it_map, 0, index, end); | ||
247 | if (badbit != ~0UL) { | ||
248 | if (printk_ratelimit()) | ||
249 | printk(KERN_ERR "Calgary: entry already allocated at " | ||
250 | "0x%lx tbl %p dma 0x%lx npages %u\n", | ||
251 | badbit, tbl, start_addr, npages); | ||
252 | } | ||
253 | |||
254 | iommu_area_reserve(tbl->it_map, index, npages); | 214 | iommu_area_reserve(tbl->it_map, index, npages); |
255 | 215 | ||
256 | spin_unlock_irqrestore(&tbl->it_lock, flags); | 216 | spin_unlock_irqrestore(&tbl->it_lock, flags); |
@@ -326,7 +286,6 @@ static void iommu_free(struct iommu_table *tbl, dma_addr_t dma_addr, | |||
326 | unsigned int npages) | 286 | unsigned int npages) |
327 | { | 287 | { |
328 | unsigned long entry; | 288 | unsigned long entry; |
329 | unsigned long badbit; | ||
330 | unsigned long badend; | 289 | unsigned long badend; |
331 | unsigned long flags; | 290 | unsigned long flags; |
332 | 291 | ||
@@ -346,14 +305,6 @@ static void iommu_free(struct iommu_table *tbl, dma_addr_t dma_addr, | |||
346 | 305 | ||
347 | spin_lock_irqsave(&tbl->it_lock, flags); | 306 | spin_lock_irqsave(&tbl->it_lock, flags); |
348 | 307 | ||
349 | badbit = verify_bit_range(tbl->it_map, 1, entry, entry + npages); | ||
350 | if (badbit != ~0UL) { | ||
351 | if (printk_ratelimit()) | ||
352 | printk(KERN_ERR "Calgary: bit is off at 0x%lx " | ||
353 | "tbl %p dma 0x%Lx entry 0x%lx npages %u\n", | ||
354 | badbit, tbl, dma_addr, entry, npages); | ||
355 | } | ||
356 | |||
357 | iommu_area_free(tbl->it_map, entry, npages); | 308 | iommu_area_free(tbl->it_map, entry, npages); |
358 | 309 | ||
359 | spin_unlock_irqrestore(&tbl->it_lock, flags); | 310 | spin_unlock_irqrestore(&tbl->it_lock, flags); |
@@ -1488,9 +1439,8 @@ void __init detect_calgary(void) | |||
1488 | iommu_detected = 1; | 1439 | iommu_detected = 1; |
1489 | calgary_detected = 1; | 1440 | calgary_detected = 1; |
1490 | printk(KERN_INFO "PCI-DMA: Calgary IOMMU detected.\n"); | 1441 | printk(KERN_INFO "PCI-DMA: Calgary IOMMU detected.\n"); |
1491 | printk(KERN_INFO "PCI-DMA: Calgary TCE table spec is %d, " | 1442 | printk(KERN_INFO "PCI-DMA: Calgary TCE table spec is %d\n", |
1492 | "CONFIG_IOMMU_DEBUG is %s.\n", specified_table_size, | 1443 | specified_table_size); |
1493 | debugging ? "enabled" : "disabled"); | ||
1494 | 1444 | ||
1495 | /* swiotlb for devices that aren't behind the Calgary. */ | 1445 | /* swiotlb for devices that aren't behind the Calgary. */ |
1496 | if (max_pfn > MAX_DMA32_PFN) | 1446 | if (max_pfn > MAX_DMA32_PFN) |
diff --git a/arch/x86/kernel/pci-gart_64.c b/arch/x86/kernel/pci-gart_64.c index b284b58c035c..cfd9f9063896 100644 --- a/arch/x86/kernel/pci-gart_64.c +++ b/arch/x86/kernel/pci-gart_64.c | |||
@@ -144,48 +144,21 @@ static void flush_gart(void) | |||
144 | } | 144 | } |
145 | 145 | ||
146 | #ifdef CONFIG_IOMMU_LEAK | 146 | #ifdef CONFIG_IOMMU_LEAK |
147 | |||
148 | #define SET_LEAK(x) \ | ||
149 | do { \ | ||
150 | if (iommu_leak_tab) \ | ||
151 | iommu_leak_tab[x] = __builtin_return_address(0);\ | ||
152 | } while (0) | ||
153 | |||
154 | #define CLEAR_LEAK(x) \ | ||
155 | do { \ | ||
156 | if (iommu_leak_tab) \ | ||
157 | iommu_leak_tab[x] = NULL; \ | ||
158 | } while (0) | ||
159 | |||
160 | /* Debugging aid for drivers that don't free their IOMMU tables */ | 147 | /* Debugging aid for drivers that don't free their IOMMU tables */ |
161 | static void **iommu_leak_tab; | ||
162 | static int leak_trace; | 148 | static int leak_trace; |
163 | static int iommu_leak_pages = 20; | 149 | static int iommu_leak_pages = 20; |
164 | 150 | ||
165 | static void dump_leak(void) | 151 | static void dump_leak(void) |
166 | { | 152 | { |
167 | int i; | ||
168 | static int dump; | 153 | static int dump; |
169 | 154 | ||
170 | if (dump || !iommu_leak_tab) | 155 | if (dump) |
171 | return; | 156 | return; |
172 | dump = 1; | 157 | dump = 1; |
173 | show_stack(NULL, NULL); | ||
174 | 158 | ||
175 | /* Very crude. dump some from the end of the table too */ | 159 | show_stack(NULL, NULL); |
176 | printk(KERN_DEBUG "Dumping %d pages from end of IOMMU:\n", | 160 | debug_dma_dump_mappings(NULL); |
177 | iommu_leak_pages); | ||
178 | for (i = 0; i < iommu_leak_pages; i += 2) { | ||
179 | printk(KERN_DEBUG "%lu: ", iommu_pages-i); | ||
180 | printk_address((unsigned long) iommu_leak_tab[iommu_pages-i], | ||
181 | 0); | ||
182 | printk(KERN_CONT "%c", (i+1)%2 == 0 ? '\n' : ' '); | ||
183 | } | ||
184 | printk(KERN_DEBUG "\n"); | ||
185 | } | 161 | } |
186 | #else | ||
187 | # define SET_LEAK(x) | ||
188 | # define CLEAR_LEAK(x) | ||
189 | #endif | 162 | #endif |
190 | 163 | ||
191 | static void iommu_full(struct device *dev, size_t size, int dir) | 164 | static void iommu_full(struct device *dev, size_t size, int dir) |
@@ -248,7 +221,6 @@ static dma_addr_t dma_map_area(struct device *dev, dma_addr_t phys_mem, | |||
248 | 221 | ||
249 | for (i = 0; i < npages; i++) { | 222 | for (i = 0; i < npages; i++) { |
250 | iommu_gatt_base[iommu_page + i] = GPTE_ENCODE(phys_mem); | 223 | iommu_gatt_base[iommu_page + i] = GPTE_ENCODE(phys_mem); |
251 | SET_LEAK(iommu_page + i); | ||
252 | phys_mem += PAGE_SIZE; | 224 | phys_mem += PAGE_SIZE; |
253 | } | 225 | } |
254 | return iommu_bus_base + iommu_page*PAGE_SIZE + (phys_mem & ~PAGE_MASK); | 226 | return iommu_bus_base + iommu_page*PAGE_SIZE + (phys_mem & ~PAGE_MASK); |
@@ -294,7 +266,6 @@ static void gart_unmap_page(struct device *dev, dma_addr_t dma_addr, | |||
294 | npages = iommu_num_pages(dma_addr, size, PAGE_SIZE); | 266 | npages = iommu_num_pages(dma_addr, size, PAGE_SIZE); |
295 | for (i = 0; i < npages; i++) { | 267 | for (i = 0; i < npages; i++) { |
296 | iommu_gatt_base[iommu_page + i] = gart_unmapped_entry; | 268 | iommu_gatt_base[iommu_page + i] = gart_unmapped_entry; |
297 | CLEAR_LEAK(iommu_page + i); | ||
298 | } | 269 | } |
299 | free_iommu(iommu_page, npages); | 270 | free_iommu(iommu_page, npages); |
300 | } | 271 | } |
@@ -377,7 +348,6 @@ static int __dma_map_cont(struct device *dev, struct scatterlist *start, | |||
377 | pages = iommu_num_pages(s->offset, s->length, PAGE_SIZE); | 348 | pages = iommu_num_pages(s->offset, s->length, PAGE_SIZE); |
378 | while (pages--) { | 349 | while (pages--) { |
379 | iommu_gatt_base[iommu_page] = GPTE_ENCODE(addr); | 350 | iommu_gatt_base[iommu_page] = GPTE_ENCODE(addr); |
380 | SET_LEAK(iommu_page); | ||
381 | addr += PAGE_SIZE; | 351 | addr += PAGE_SIZE; |
382 | iommu_page++; | 352 | iommu_page++; |
383 | } | 353 | } |
@@ -688,8 +658,6 @@ static __init int init_k8_gatt(struct agp_kern_info *info) | |||
688 | 658 | ||
689 | agp_gatt_table = gatt; | 659 | agp_gatt_table = gatt; |
690 | 660 | ||
691 | enable_gart_translations(); | ||
692 | |||
693 | error = sysdev_class_register(&gart_sysdev_class); | 661 | error = sysdev_class_register(&gart_sysdev_class); |
694 | if (!error) | 662 | if (!error) |
695 | error = sysdev_register(&device_gart); | 663 | error = sysdev_register(&device_gart); |
@@ -801,11 +769,12 @@ void __init gart_iommu_init(void) | |||
801 | 769 | ||
802 | #ifdef CONFIG_IOMMU_LEAK | 770 | #ifdef CONFIG_IOMMU_LEAK |
803 | if (leak_trace) { | 771 | if (leak_trace) { |
804 | iommu_leak_tab = (void *)__get_free_pages(GFP_KERNEL|__GFP_ZERO, | 772 | int ret; |
805 | get_order(iommu_pages*sizeof(void *))); | 773 | |
806 | if (!iommu_leak_tab) | 774 | ret = dma_debug_resize_entries(iommu_pages); |
775 | if (ret) | ||
807 | printk(KERN_DEBUG | 776 | printk(KERN_DEBUG |
808 | "PCI-DMA: Cannot allocate leak trace area\n"); | 777 | "PCI-DMA: Cannot trace all the entries\n"); |
809 | } | 778 | } |
810 | #endif | 779 | #endif |
811 | 780 | ||
@@ -845,6 +814,14 @@ void __init gart_iommu_init(void) | |||
845 | * the pages as Not-Present: | 814 | * the pages as Not-Present: |
846 | */ | 815 | */ |
847 | wbinvd(); | 816 | wbinvd(); |
817 | |||
818 | /* | ||
819 | * Now all caches are flushed and we can safely enable | ||
820 | * GART hardware. Doing it early leaves the possibility | ||
821 | * of stale cache entries that can lead to GART PTE | ||
822 | * errors. | ||
823 | */ | ||
824 | enable_gart_translations(); | ||
848 | 825 | ||
849 | /* | 826 | /* |
850 | * Try to workaround a bug (thanks to BenH): | 827 | * Try to workaround a bug (thanks to BenH): |
diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c index 221a3853e268..a1712f2b50f1 100644 --- a/arch/x86/kernel/pci-swiotlb.c +++ b/arch/x86/kernel/pci-swiotlb.c | |||
@@ -28,7 +28,7 @@ dma_addr_t swiotlb_phys_to_bus(struct device *hwdev, phys_addr_t paddr) | |||
28 | return paddr; | 28 | return paddr; |
29 | } | 29 | } |
30 | 30 | ||
31 | phys_addr_t swiotlb_bus_to_phys(dma_addr_t baddr) | 31 | phys_addr_t swiotlb_bus_to_phys(struct device *hwdev, dma_addr_t baddr) |
32 | { | 32 | { |
33 | return baddr; | 33 | return baddr; |
34 | } | 34 | } |
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c index ca989158e847..3bb2be1649bd 100644 --- a/arch/x86/kernel/process.c +++ b/arch/x86/kernel/process.c | |||
@@ -8,12 +8,15 @@ | |||
8 | #include <linux/module.h> | 8 | #include <linux/module.h> |
9 | #include <linux/pm.h> | 9 | #include <linux/pm.h> |
10 | #include <linux/clockchips.h> | 10 | #include <linux/clockchips.h> |
11 | #include <linux/random.h> | ||
11 | #include <trace/power.h> | 12 | #include <trace/power.h> |
12 | #include <asm/system.h> | 13 | #include <asm/system.h> |
13 | #include <asm/apic.h> | 14 | #include <asm/apic.h> |
15 | #include <asm/syscalls.h> | ||
14 | #include <asm/idle.h> | 16 | #include <asm/idle.h> |
15 | #include <asm/uaccess.h> | 17 | #include <asm/uaccess.h> |
16 | #include <asm/i387.h> | 18 | #include <asm/i387.h> |
19 | #include <asm/ds.h> | ||
17 | 20 | ||
18 | unsigned long idle_halt; | 21 | unsigned long idle_halt; |
19 | EXPORT_SYMBOL(idle_halt); | 22 | EXPORT_SYMBOL(idle_halt); |
@@ -45,6 +48,8 @@ void free_thread_xstate(struct task_struct *tsk) | |||
45 | kmem_cache_free(task_xstate_cachep, tsk->thread.xstate); | 48 | kmem_cache_free(task_xstate_cachep, tsk->thread.xstate); |
46 | tsk->thread.xstate = NULL; | 49 | tsk->thread.xstate = NULL; |
47 | } | 50 | } |
51 | |||
52 | WARN(tsk->thread.ds_ctx, "leaking DS context\n"); | ||
48 | } | 53 | } |
49 | 54 | ||
50 | void free_thread_info(struct thread_info *ti) | 55 | void free_thread_info(struct thread_info *ti) |
@@ -83,8 +88,6 @@ void exit_thread(void) | |||
83 | put_cpu(); | 88 | put_cpu(); |
84 | kfree(bp); | 89 | kfree(bp); |
85 | } | 90 | } |
86 | |||
87 | ds_exit_thread(current); | ||
88 | } | 91 | } |
89 | 92 | ||
90 | void flush_thread(void) | 93 | void flush_thread(void) |
@@ -613,3 +616,16 @@ static int __init idle_setup(char *str) | |||
613 | } | 616 | } |
614 | early_param("idle", idle_setup); | 617 | early_param("idle", idle_setup); |
615 | 618 | ||
619 | unsigned long arch_align_stack(unsigned long sp) | ||
620 | { | ||
621 | if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space) | ||
622 | sp -= get_random_int() % 8192; | ||
623 | return sp & ~0xf; | ||
624 | } | ||
625 | |||
626 | unsigned long arch_randomize_brk(struct mm_struct *mm) | ||
627 | { | ||
628 | unsigned long range_end = mm->brk + 0x02000000; | ||
629 | return randomize_range(mm->brk, range_end, 0) ? : mm->brk; | ||
630 | } | ||
631 | |||
diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c index 76f8f84043a2..59f4524984af 100644 --- a/arch/x86/kernel/process_32.c +++ b/arch/x86/kernel/process_32.c | |||
@@ -9,8 +9,6 @@ | |||
9 | * This file handles the architecture-dependent parts of process handling.. | 9 | * This file handles the architecture-dependent parts of process handling.. |
10 | */ | 10 | */ |
11 | 11 | ||
12 | #include <stdarg.h> | ||
13 | |||
14 | #include <linux/stackprotector.h> | 12 | #include <linux/stackprotector.h> |
15 | #include <linux/cpu.h> | 13 | #include <linux/cpu.h> |
16 | #include <linux/errno.h> | 14 | #include <linux/errno.h> |
@@ -33,7 +31,6 @@ | |||
33 | #include <linux/module.h> | 31 | #include <linux/module.h> |
34 | #include <linux/kallsyms.h> | 32 | #include <linux/kallsyms.h> |
35 | #include <linux/ptrace.h> | 33 | #include <linux/ptrace.h> |
36 | #include <linux/random.h> | ||
37 | #include <linux/personality.h> | 34 | #include <linux/personality.h> |
38 | #include <linux/tick.h> | 35 | #include <linux/tick.h> |
39 | #include <linux/percpu.h> | 36 | #include <linux/percpu.h> |
@@ -290,7 +287,8 @@ int copy_thread(unsigned long clone_flags, unsigned long sp, | |||
290 | p->thread.io_bitmap_max = 0; | 287 | p->thread.io_bitmap_max = 0; |
291 | } | 288 | } |
292 | 289 | ||
293 | ds_copy_thread(p, current); | 290 | clear_tsk_thread_flag(p, TIF_DS_AREA_MSR); |
291 | p->thread.ds_ctx = NULL; | ||
294 | 292 | ||
295 | clear_tsk_thread_flag(p, TIF_DEBUGCTLMSR); | 293 | clear_tsk_thread_flag(p, TIF_DEBUGCTLMSR); |
296 | p->thread.debugctlmsr = 0; | 294 | p->thread.debugctlmsr = 0; |
@@ -407,7 +405,7 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p) | |||
407 | * done before math_state_restore, so the TS bit is up | 405 | * done before math_state_restore, so the TS bit is up |
408 | * to date. | 406 | * to date. |
409 | */ | 407 | */ |
410 | arch_leave_lazy_cpu_mode(); | 408 | arch_end_context_switch(next_p); |
411 | 409 | ||
412 | /* If the task has used fpu the last 5 timeslices, just do a full | 410 | /* If the task has used fpu the last 5 timeslices, just do a full |
413 | * restore of the math state immediately to avoid the trap; the | 411 | * restore of the math state immediately to avoid the trap; the |
@@ -497,15 +495,3 @@ unsigned long get_wchan(struct task_struct *p) | |||
497 | return 0; | 495 | return 0; |
498 | } | 496 | } |
499 | 497 | ||
500 | unsigned long arch_align_stack(unsigned long sp) | ||
501 | { | ||
502 | if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space) | ||
503 | sp -= get_random_int() % 8192; | ||
504 | return sp & ~0xf; | ||
505 | } | ||
506 | |||
507 | unsigned long arch_randomize_brk(struct mm_struct *mm) | ||
508 | { | ||
509 | unsigned long range_end = mm->brk + 0x02000000; | ||
510 | return randomize_range(mm->brk, range_end, 0) ? : mm->brk; | ||
511 | } | ||
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c index b751a41392b1..ebefb5407b9d 100644 --- a/arch/x86/kernel/process_64.c +++ b/arch/x86/kernel/process_64.c | |||
@@ -14,8 +14,6 @@ | |||
14 | * This file handles the architecture-dependent parts of process handling.. | 14 | * This file handles the architecture-dependent parts of process handling.. |
15 | */ | 15 | */ |
16 | 16 | ||
17 | #include <stdarg.h> | ||
18 | |||
19 | #include <linux/stackprotector.h> | 17 | #include <linux/stackprotector.h> |
20 | #include <linux/cpu.h> | 18 | #include <linux/cpu.h> |
21 | #include <linux/errno.h> | 19 | #include <linux/errno.h> |
@@ -32,7 +30,6 @@ | |||
32 | #include <linux/delay.h> | 30 | #include <linux/delay.h> |
33 | #include <linux/module.h> | 31 | #include <linux/module.h> |
34 | #include <linux/ptrace.h> | 32 | #include <linux/ptrace.h> |
35 | #include <linux/random.h> | ||
36 | #include <linux/notifier.h> | 33 | #include <linux/notifier.h> |
37 | #include <linux/kprobes.h> | 34 | #include <linux/kprobes.h> |
38 | #include <linux/kdebug.h> | 35 | #include <linux/kdebug.h> |
@@ -335,7 +332,8 @@ int copy_thread(unsigned long clone_flags, unsigned long sp, | |||
335 | goto out; | 332 | goto out; |
336 | } | 333 | } |
337 | 334 | ||
338 | ds_copy_thread(p, me); | 335 | clear_tsk_thread_flag(p, TIF_DS_AREA_MSR); |
336 | p->thread.ds_ctx = NULL; | ||
339 | 337 | ||
340 | clear_tsk_thread_flag(p, TIF_DEBUGCTLMSR); | 338 | clear_tsk_thread_flag(p, TIF_DEBUGCTLMSR); |
341 | p->thread.debugctlmsr = 0; | 339 | p->thread.debugctlmsr = 0; |
@@ -428,7 +426,7 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p) | |||
428 | * done before math_state_restore, so the TS bit is up | 426 | * done before math_state_restore, so the TS bit is up |
429 | * to date. | 427 | * to date. |
430 | */ | 428 | */ |
431 | arch_leave_lazy_cpu_mode(); | 429 | arch_end_context_switch(next_p); |
432 | 430 | ||
433 | /* | 431 | /* |
434 | * Switch FS and GS. | 432 | * Switch FS and GS. |
@@ -660,15 +658,3 @@ long sys_arch_prctl(int code, unsigned long addr) | |||
660 | return do_arch_prctl(current, code, addr); | 658 | return do_arch_prctl(current, code, addr); |
661 | } | 659 | } |
662 | 660 | ||
663 | unsigned long arch_align_stack(unsigned long sp) | ||
664 | { | ||
665 | if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space) | ||
666 | sp -= get_random_int() % 8192; | ||
667 | return sp & ~0xf; | ||
668 | } | ||
669 | |||
670 | unsigned long arch_randomize_brk(struct mm_struct *mm) | ||
671 | { | ||
672 | unsigned long range_end = mm->brk + 0x02000000; | ||
673 | return randomize_range(mm->brk, range_end, 0) ? : mm->brk; | ||
674 | } | ||
diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c index 23b7c8f017e2..09ecbde91c13 100644 --- a/arch/x86/kernel/ptrace.c +++ b/arch/x86/kernel/ptrace.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/audit.h> | 21 | #include <linux/audit.h> |
22 | #include <linux/seccomp.h> | 22 | #include <linux/seccomp.h> |
23 | #include <linux/signal.h> | 23 | #include <linux/signal.h> |
24 | #include <linux/workqueue.h> | ||
24 | 25 | ||
25 | #include <asm/uaccess.h> | 26 | #include <asm/uaccess.h> |
26 | #include <asm/pgtable.h> | 27 | #include <asm/pgtable.h> |
@@ -578,17 +579,130 @@ static int ioperm_get(struct task_struct *target, | |||
578 | } | 579 | } |
579 | 580 | ||
580 | #ifdef CONFIG_X86_PTRACE_BTS | 581 | #ifdef CONFIG_X86_PTRACE_BTS |
582 | /* | ||
583 | * A branch trace store context. | ||
584 | * | ||
585 | * Contexts may only be installed by ptrace_bts_config() and only for | ||
586 | * ptraced tasks. | ||
587 | * | ||
588 | * Contexts are destroyed when the tracee is detached from the tracer. | ||
589 | * The actual destruction work requires interrupts enabled, so the | ||
590 | * work is deferred and will be scheduled during __ptrace_unlink(). | ||
591 | * | ||
592 | * Contexts hold an additional task_struct reference on the traced | ||
593 | * task, as well as a reference on the tracer's mm. | ||
594 | * | ||
595 | * Ptrace already holds a task_struct for the duration of ptrace operations, | ||
596 | * but since destruction is deferred, it may be executed after both | ||
597 | * tracer and tracee exited. | ||
598 | */ | ||
599 | struct bts_context { | ||
600 | /* The branch trace handle. */ | ||
601 | struct bts_tracer *tracer; | ||
602 | |||
603 | /* The buffer used to store the branch trace and its size. */ | ||
604 | void *buffer; | ||
605 | unsigned int size; | ||
606 | |||
607 | /* The mm that paid for the above buffer. */ | ||
608 | struct mm_struct *mm; | ||
609 | |||
610 | /* The task this context belongs to. */ | ||
611 | struct task_struct *task; | ||
612 | |||
613 | /* The signal to send on a bts buffer overflow. */ | ||
614 | unsigned int bts_ovfl_signal; | ||
615 | |||
616 | /* The work struct to destroy a context. */ | ||
617 | struct work_struct work; | ||
618 | }; | ||
619 | |||
620 | static int alloc_bts_buffer(struct bts_context *context, unsigned int size) | ||
621 | { | ||
622 | void *buffer = NULL; | ||
623 | int err = -ENOMEM; | ||
624 | |||
625 | err = account_locked_memory(current->mm, current->signal->rlim, size); | ||
626 | if (err < 0) | ||
627 | return err; | ||
628 | |||
629 | buffer = kzalloc(size, GFP_KERNEL); | ||
630 | if (!buffer) | ||
631 | goto out_refund; | ||
632 | |||
633 | context->buffer = buffer; | ||
634 | context->size = size; | ||
635 | context->mm = get_task_mm(current); | ||
636 | |||
637 | return 0; | ||
638 | |||
639 | out_refund: | ||
640 | refund_locked_memory(current->mm, size); | ||
641 | return err; | ||
642 | } | ||
643 | |||
644 | static inline void free_bts_buffer(struct bts_context *context) | ||
645 | { | ||
646 | if (!context->buffer) | ||
647 | return; | ||
648 | |||
649 | kfree(context->buffer); | ||
650 | context->buffer = NULL; | ||
651 | |||
652 | refund_locked_memory(context->mm, context->size); | ||
653 | context->size = 0; | ||
654 | |||
655 | mmput(context->mm); | ||
656 | context->mm = NULL; | ||
657 | } | ||
658 | |||
659 | static void free_bts_context_work(struct work_struct *w) | ||
660 | { | ||
661 | struct bts_context *context; | ||
662 | |||
663 | context = container_of(w, struct bts_context, work); | ||
664 | |||
665 | ds_release_bts(context->tracer); | ||
666 | put_task_struct(context->task); | ||
667 | free_bts_buffer(context); | ||
668 | kfree(context); | ||
669 | } | ||
670 | |||
671 | static inline void free_bts_context(struct bts_context *context) | ||
672 | { | ||
673 | INIT_WORK(&context->work, free_bts_context_work); | ||
674 | schedule_work(&context->work); | ||
675 | } | ||
676 | |||
677 | static inline struct bts_context *alloc_bts_context(struct task_struct *task) | ||
678 | { | ||
679 | struct bts_context *context = kzalloc(sizeof(*context), GFP_KERNEL); | ||
680 | if (context) { | ||
681 | context->task = task; | ||
682 | task->bts = context; | ||
683 | |||
684 | get_task_struct(task); | ||
685 | } | ||
686 | |||
687 | return context; | ||
688 | } | ||
689 | |||
581 | static int ptrace_bts_read_record(struct task_struct *child, size_t index, | 690 | static int ptrace_bts_read_record(struct task_struct *child, size_t index, |
582 | struct bts_struct __user *out) | 691 | struct bts_struct __user *out) |
583 | { | 692 | { |
693 | struct bts_context *context; | ||
584 | const struct bts_trace *trace; | 694 | const struct bts_trace *trace; |
585 | struct bts_struct bts; | 695 | struct bts_struct bts; |
586 | const unsigned char *at; | 696 | const unsigned char *at; |
587 | int error; | 697 | int error; |
588 | 698 | ||
589 | trace = ds_read_bts(child->bts); | 699 | context = child->bts; |
700 | if (!context) | ||
701 | return -ESRCH; | ||
702 | |||
703 | trace = ds_read_bts(context->tracer); | ||
590 | if (!trace) | 704 | if (!trace) |
591 | return -EPERM; | 705 | return -ESRCH; |
592 | 706 | ||
593 | at = trace->ds.top - ((index + 1) * trace->ds.size); | 707 | at = trace->ds.top - ((index + 1) * trace->ds.size); |
594 | if ((void *)at < trace->ds.begin) | 708 | if ((void *)at < trace->ds.begin) |
@@ -597,7 +711,7 @@ static int ptrace_bts_read_record(struct task_struct *child, size_t index, | |||
597 | if (!trace->read) | 711 | if (!trace->read) |
598 | return -EOPNOTSUPP; | 712 | return -EOPNOTSUPP; |
599 | 713 | ||
600 | error = trace->read(child->bts, at, &bts); | 714 | error = trace->read(context->tracer, at, &bts); |
601 | if (error < 0) | 715 | if (error < 0) |
602 | return error; | 716 | return error; |
603 | 717 | ||
@@ -611,13 +725,18 @@ static int ptrace_bts_drain(struct task_struct *child, | |||
611 | long size, | 725 | long size, |
612 | struct bts_struct __user *out) | 726 | struct bts_struct __user *out) |
613 | { | 727 | { |
728 | struct bts_context *context; | ||
614 | const struct bts_trace *trace; | 729 | const struct bts_trace *trace; |
615 | const unsigned char *at; | 730 | const unsigned char *at; |
616 | int error, drained = 0; | 731 | int error, drained = 0; |
617 | 732 | ||
618 | trace = ds_read_bts(child->bts); | 733 | context = child->bts; |
734 | if (!context) | ||
735 | return -ESRCH; | ||
736 | |||
737 | trace = ds_read_bts(context->tracer); | ||
619 | if (!trace) | 738 | if (!trace) |
620 | return -EPERM; | 739 | return -ESRCH; |
621 | 740 | ||
622 | if (!trace->read) | 741 | if (!trace->read) |
623 | return -EOPNOTSUPP; | 742 | return -EOPNOTSUPP; |
@@ -628,9 +747,8 @@ static int ptrace_bts_drain(struct task_struct *child, | |||
628 | for (at = trace->ds.begin; (void *)at < trace->ds.top; | 747 | for (at = trace->ds.begin; (void *)at < trace->ds.top; |
629 | out++, drained++, at += trace->ds.size) { | 748 | out++, drained++, at += trace->ds.size) { |
630 | struct bts_struct bts; | 749 | struct bts_struct bts; |
631 | int error; | ||
632 | 750 | ||
633 | error = trace->read(child->bts, at, &bts); | 751 | error = trace->read(context->tracer, at, &bts); |
634 | if (error < 0) | 752 | if (error < 0) |
635 | return error; | 753 | return error; |
636 | 754 | ||
@@ -640,35 +758,18 @@ static int ptrace_bts_drain(struct task_struct *child, | |||
640 | 758 | ||
641 | memset(trace->ds.begin, 0, trace->ds.n * trace->ds.size); | 759 | memset(trace->ds.begin, 0, trace->ds.n * trace->ds.size); |
642 | 760 | ||
643 | error = ds_reset_bts(child->bts); | 761 | error = ds_reset_bts(context->tracer); |
644 | if (error < 0) | 762 | if (error < 0) |
645 | return error; | 763 | return error; |
646 | 764 | ||
647 | return drained; | 765 | return drained; |
648 | } | 766 | } |
649 | 767 | ||
650 | static int ptrace_bts_allocate_buffer(struct task_struct *child, size_t size) | ||
651 | { | ||
652 | child->bts_buffer = alloc_locked_buffer(size); | ||
653 | if (!child->bts_buffer) | ||
654 | return -ENOMEM; | ||
655 | |||
656 | child->bts_size = size; | ||
657 | |||
658 | return 0; | ||
659 | } | ||
660 | |||
661 | static void ptrace_bts_free_buffer(struct task_struct *child) | ||
662 | { | ||
663 | free_locked_buffer(child->bts_buffer, child->bts_size); | ||
664 | child->bts_buffer = NULL; | ||
665 | child->bts_size = 0; | ||
666 | } | ||
667 | |||
668 | static int ptrace_bts_config(struct task_struct *child, | 768 | static int ptrace_bts_config(struct task_struct *child, |
669 | long cfg_size, | 769 | long cfg_size, |
670 | const struct ptrace_bts_config __user *ucfg) | 770 | const struct ptrace_bts_config __user *ucfg) |
671 | { | 771 | { |
772 | struct bts_context *context; | ||
672 | struct ptrace_bts_config cfg; | 773 | struct ptrace_bts_config cfg; |
673 | unsigned int flags = 0; | 774 | unsigned int flags = 0; |
674 | 775 | ||
@@ -678,28 +779,33 @@ static int ptrace_bts_config(struct task_struct *child, | |||
678 | if (copy_from_user(&cfg, ucfg, sizeof(cfg))) | 779 | if (copy_from_user(&cfg, ucfg, sizeof(cfg))) |
679 | return -EFAULT; | 780 | return -EFAULT; |
680 | 781 | ||
681 | if (child->bts) { | 782 | context = child->bts; |
682 | ds_release_bts(child->bts); | 783 | if (!context) |
683 | child->bts = NULL; | 784 | context = alloc_bts_context(child); |
684 | } | 785 | if (!context) |
786 | return -ENOMEM; | ||
685 | 787 | ||
686 | if (cfg.flags & PTRACE_BTS_O_SIGNAL) { | 788 | if (cfg.flags & PTRACE_BTS_O_SIGNAL) { |
687 | if (!cfg.signal) | 789 | if (!cfg.signal) |
688 | return -EINVAL; | 790 | return -EINVAL; |
689 | 791 | ||
690 | child->thread.bts_ovfl_signal = cfg.signal; | ||
691 | return -EOPNOTSUPP; | 792 | return -EOPNOTSUPP; |
793 | context->bts_ovfl_signal = cfg.signal; | ||
692 | } | 794 | } |
693 | 795 | ||
694 | if ((cfg.flags & PTRACE_BTS_O_ALLOC) && | 796 | ds_release_bts(context->tracer); |
695 | (cfg.size != child->bts_size)) { | 797 | context->tracer = NULL; |
696 | int error; | ||
697 | 798 | ||
698 | ptrace_bts_free_buffer(child); | 799 | if ((cfg.flags & PTRACE_BTS_O_ALLOC) && (cfg.size != context->size)) { |
800 | int err; | ||
699 | 801 | ||
700 | error = ptrace_bts_allocate_buffer(child, cfg.size); | 802 | free_bts_buffer(context); |
701 | if (error < 0) | 803 | if (!cfg.size) |
702 | return error; | 804 | return 0; |
805 | |||
806 | err = alloc_bts_buffer(context, cfg.size); | ||
807 | if (err < 0) | ||
808 | return err; | ||
703 | } | 809 | } |
704 | 810 | ||
705 | if (cfg.flags & PTRACE_BTS_O_TRACE) | 811 | if (cfg.flags & PTRACE_BTS_O_TRACE) |
@@ -708,15 +814,14 @@ static int ptrace_bts_config(struct task_struct *child, | |||
708 | if (cfg.flags & PTRACE_BTS_O_SCHED) | 814 | if (cfg.flags & PTRACE_BTS_O_SCHED) |
709 | flags |= BTS_TIMESTAMPS; | 815 | flags |= BTS_TIMESTAMPS; |
710 | 816 | ||
711 | child->bts = ds_request_bts(child, child->bts_buffer, child->bts_size, | 817 | context->tracer = |
712 | /* ovfl = */ NULL, /* th = */ (size_t)-1, | 818 | ds_request_bts_task(child, context->buffer, context->size, |
713 | flags); | 819 | NULL, (size_t)-1, flags); |
714 | if (IS_ERR(child->bts)) { | 820 | if (unlikely(IS_ERR(context->tracer))) { |
715 | int error = PTR_ERR(child->bts); | 821 | int error = PTR_ERR(context->tracer); |
716 | |||
717 | ptrace_bts_free_buffer(child); | ||
718 | child->bts = NULL; | ||
719 | 822 | ||
823 | free_bts_buffer(context); | ||
824 | context->tracer = NULL; | ||
720 | return error; | 825 | return error; |
721 | } | 826 | } |
722 | 827 | ||
@@ -727,20 +832,25 @@ static int ptrace_bts_status(struct task_struct *child, | |||
727 | long cfg_size, | 832 | long cfg_size, |
728 | struct ptrace_bts_config __user *ucfg) | 833 | struct ptrace_bts_config __user *ucfg) |
729 | { | 834 | { |
835 | struct bts_context *context; | ||
730 | const struct bts_trace *trace; | 836 | const struct bts_trace *trace; |
731 | struct ptrace_bts_config cfg; | 837 | struct ptrace_bts_config cfg; |
732 | 838 | ||
839 | context = child->bts; | ||
840 | if (!context) | ||
841 | return -ESRCH; | ||
842 | |||
733 | if (cfg_size < sizeof(cfg)) | 843 | if (cfg_size < sizeof(cfg)) |
734 | return -EIO; | 844 | return -EIO; |
735 | 845 | ||
736 | trace = ds_read_bts(child->bts); | 846 | trace = ds_read_bts(context->tracer); |
737 | if (!trace) | 847 | if (!trace) |
738 | return -EPERM; | 848 | return -ESRCH; |
739 | 849 | ||
740 | memset(&cfg, 0, sizeof(cfg)); | 850 | memset(&cfg, 0, sizeof(cfg)); |
741 | cfg.size = trace->ds.end - trace->ds.begin; | 851 | cfg.size = trace->ds.end - trace->ds.begin; |
742 | cfg.signal = child->thread.bts_ovfl_signal; | 852 | cfg.signal = context->bts_ovfl_signal; |
743 | cfg.bts_size = sizeof(struct bts_struct); | 853 | cfg.bts_size = sizeof(struct bts_struct); |
744 | 854 | ||
745 | if (cfg.signal) | 855 | if (cfg.signal) |
746 | cfg.flags |= PTRACE_BTS_O_SIGNAL; | 856 | cfg.flags |= PTRACE_BTS_O_SIGNAL; |
@@ -759,80 +869,51 @@ static int ptrace_bts_status(struct task_struct *child, | |||
759 | 869 | ||
760 | static int ptrace_bts_clear(struct task_struct *child) | 870 | static int ptrace_bts_clear(struct task_struct *child) |
761 | { | 871 | { |
872 | struct bts_context *context; | ||
762 | const struct bts_trace *trace; | 873 | const struct bts_trace *trace; |
763 | 874 | ||
764 | trace = ds_read_bts(child->bts); | 875 | context = child->bts; |
876 | if (!context) | ||
877 | return -ESRCH; | ||
878 | |||
879 | trace = ds_read_bts(context->tracer); | ||
765 | if (!trace) | 880 | if (!trace) |
766 | return -EPERM; | 881 | return -ESRCH; |
767 | 882 | ||
768 | memset(trace->ds.begin, 0, trace->ds.n * trace->ds.size); | 883 | memset(trace->ds.begin, 0, trace->ds.n * trace->ds.size); |
769 | 884 | ||
770 | return ds_reset_bts(child->bts); | 885 | return ds_reset_bts(context->tracer); |
771 | } | 886 | } |
772 | 887 | ||
773 | static int ptrace_bts_size(struct task_struct *child) | 888 | static int ptrace_bts_size(struct task_struct *child) |
774 | { | 889 | { |
890 | struct bts_context *context; | ||
775 | const struct bts_trace *trace; | 891 | const struct bts_trace *trace; |
776 | 892 | ||
777 | trace = ds_read_bts(child->bts); | 893 | context = child->bts; |
894 | if (!context) | ||
895 | return -ESRCH; | ||
896 | |||
897 | trace = ds_read_bts(context->tracer); | ||
778 | if (!trace) | 898 | if (!trace) |
779 | return -EPERM; | 899 | return -ESRCH; |
780 | 900 | ||
781 | return (trace->ds.top - trace->ds.begin) / trace->ds.size; | 901 | return (trace->ds.top - trace->ds.begin) / trace->ds.size; |
782 | } | 902 | } |
783 | 903 | ||
784 | static void ptrace_bts_fork(struct task_struct *tsk) | 904 | /* |
785 | { | 905 | * Called from __ptrace_unlink() after the child has been moved back |
786 | tsk->bts = NULL; | 906 | * to its original parent. |
787 | tsk->bts_buffer = NULL; | 907 | */ |
788 | tsk->bts_size = 0; | 908 | void ptrace_bts_untrace(struct task_struct *child) |
789 | tsk->thread.bts_ovfl_signal = 0; | ||
790 | } | ||
791 | |||
792 | static void ptrace_bts_untrace(struct task_struct *child) | ||
793 | { | 909 | { |
794 | if (unlikely(child->bts)) { | 910 | if (unlikely(child->bts)) { |
795 | ds_release_bts(child->bts); | 911 | free_bts_context(child->bts); |
796 | child->bts = NULL; | 912 | child->bts = NULL; |
797 | |||
798 | /* We cannot update total_vm and locked_vm since | ||
799 | child's mm is already gone. But we can reclaim the | ||
800 | memory. */ | ||
801 | kfree(child->bts_buffer); | ||
802 | child->bts_buffer = NULL; | ||
803 | child->bts_size = 0; | ||
804 | } | 913 | } |
805 | } | 914 | } |
806 | |||
807 | static void ptrace_bts_detach(struct task_struct *child) | ||
808 | { | ||
809 | /* | ||
810 | * Ptrace_detach() races with ptrace_untrace() in case | ||
811 | * the child dies and is reaped by another thread. | ||
812 | * | ||
813 | * We only do the memory accounting at this point and | ||
814 | * leave the buffer deallocation and the bts tracer | ||
815 | * release to ptrace_bts_untrace() which will be called | ||
816 | * later on with tasklist_lock held. | ||
817 | */ | ||
818 | release_locked_buffer(child->bts_buffer, child->bts_size); | ||
819 | } | ||
820 | #else | ||
821 | static inline void ptrace_bts_fork(struct task_struct *tsk) {} | ||
822 | static inline void ptrace_bts_detach(struct task_struct *child) {} | ||
823 | static inline void ptrace_bts_untrace(struct task_struct *child) {} | ||
824 | #endif /* CONFIG_X86_PTRACE_BTS */ | 915 | #endif /* CONFIG_X86_PTRACE_BTS */ |
825 | 916 | ||
826 | void x86_ptrace_fork(struct task_struct *child, unsigned long clone_flags) | ||
827 | { | ||
828 | ptrace_bts_fork(child); | ||
829 | } | ||
830 | |||
831 | void x86_ptrace_untrace(struct task_struct *child) | ||
832 | { | ||
833 | ptrace_bts_untrace(child); | ||
834 | } | ||
835 | |||
836 | /* | 917 | /* |
837 | * Called by kernel/ptrace.c when detaching.. | 918 | * Called by kernel/ptrace.c when detaching.. |
838 | * | 919 | * |
@@ -844,7 +925,6 @@ void ptrace_disable(struct task_struct *child) | |||
844 | #ifdef TIF_SYSCALL_EMU | 925 | #ifdef TIF_SYSCALL_EMU |
845 | clear_tsk_thread_flag(child, TIF_SYSCALL_EMU); | 926 | clear_tsk_thread_flag(child, TIF_SYSCALL_EMU); |
846 | #endif | 927 | #endif |
847 | ptrace_bts_detach(child); | ||
848 | } | 928 | } |
849 | 929 | ||
850 | #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION | 930 | #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION |
diff --git a/arch/x86/kernel/quirks.c b/arch/x86/kernel/quirks.c index 7563b31b4f03..af71d06624bf 100644 --- a/arch/x86/kernel/quirks.c +++ b/arch/x86/kernel/quirks.c | |||
@@ -491,5 +491,42 @@ void force_hpet_resume(void) | |||
491 | break; | 491 | break; |
492 | } | 492 | } |
493 | } | 493 | } |
494 | #endif | ||
495 | |||
496 | #if defined(CONFIG_PCI) && defined(CONFIG_NUMA) | ||
497 | /* Set correct numa_node information for AMD NB functions */ | ||
498 | static void __init quirk_amd_nb_node(struct pci_dev *dev) | ||
499 | { | ||
500 | struct pci_dev *nb_ht; | ||
501 | unsigned int devfn; | ||
502 | u32 val; | ||
503 | |||
504 | devfn = PCI_DEVFN(PCI_SLOT(dev->devfn), 0); | ||
505 | nb_ht = pci_get_slot(dev->bus, devfn); | ||
506 | if (!nb_ht) | ||
507 | return; | ||
508 | |||
509 | pci_read_config_dword(nb_ht, 0x60, &val); | ||
510 | set_dev_node(&dev->dev, val & 7); | ||
511 | pci_dev_put(dev); | ||
512 | } | ||
494 | 513 | ||
514 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB, | ||
515 | quirk_amd_nb_node); | ||
516 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_ADDRMAP, | ||
517 | quirk_amd_nb_node); | ||
518 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_MEMCTL, | ||
519 | quirk_amd_nb_node); | ||
520 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_MISC, | ||
521 | quirk_amd_nb_node); | ||
522 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_HT, | ||
523 | quirk_amd_nb_node); | ||
524 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_MAP, | ||
525 | quirk_amd_nb_node); | ||
526 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_DRAM, | ||
527 | quirk_amd_nb_node); | ||
528 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC, | ||
529 | quirk_amd_nb_node); | ||
530 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_LINK, | ||
531 | quirk_amd_nb_node); | ||
495 | #endif | 532 | #endif |
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c index 667188e0b5a0..d2d1ce8170f0 100644 --- a/arch/x86/kernel/reboot.c +++ b/arch/x86/kernel/reboot.c | |||
@@ -192,6 +192,15 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = { | |||
192 | DMI_MATCH(DMI_BOARD_NAME, "0KP561"), | 192 | DMI_MATCH(DMI_BOARD_NAME, "0KP561"), |
193 | }, | 193 | }, |
194 | }, | 194 | }, |
195 | { /* Handle problems with rebooting on Dell Optiplex 360 with 0T656F */ | ||
196 | .callback = set_bios_reboot, | ||
197 | .ident = "Dell OptiPlex 360", | ||
198 | .matches = { | ||
199 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | ||
200 | DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 360"), | ||
201 | DMI_MATCH(DMI_BOARD_NAME, "0T656F"), | ||
202 | }, | ||
203 | }, | ||
195 | { /* Handle problems with rebooting on Dell 2400's */ | 204 | { /* Handle problems with rebooting on Dell 2400's */ |
196 | .callback = set_bios_reboot, | 205 | .callback = set_bios_reboot, |
197 | .ident = "Dell PowerEdge 2400", | 206 | .ident = "Dell PowerEdge 2400", |
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c index b4158439bf63..d1c636bf31a7 100644 --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c | |||
@@ -112,6 +112,14 @@ | |||
112 | #define ARCH_SETUP | 112 | #define ARCH_SETUP |
113 | #endif | 113 | #endif |
114 | 114 | ||
115 | /* | ||
116 | * end_pfn only includes RAM, while max_pfn_mapped includes all e820 entries. | ||
117 | * The direct mapping extends to max_pfn_mapped, so that we can directly access | ||
118 | * apertures, ACPI and other tables without having to play with fixmaps. | ||
119 | */ | ||
120 | unsigned long max_low_pfn_mapped; | ||
121 | unsigned long max_pfn_mapped; | ||
122 | |||
115 | RESERVE_BRK(dmi_alloc, 65536); | 123 | RESERVE_BRK(dmi_alloc, 65536); |
116 | 124 | ||
117 | unsigned int boot_cpu_id __read_mostly; | 125 | unsigned int boot_cpu_id __read_mostly; |
@@ -214,8 +222,8 @@ unsigned long mmu_cr4_features; | |||
214 | unsigned long mmu_cr4_features = X86_CR4_PAE; | 222 | unsigned long mmu_cr4_features = X86_CR4_PAE; |
215 | #endif | 223 | #endif |
216 | 224 | ||
217 | /* Boot loader ID as an integer, for the benefit of proc_dointvec */ | 225 | /* Boot loader ID and version as integers, for the benefit of proc_dointvec */ |
218 | int bootloader_type; | 226 | int bootloader_type, bootloader_version; |
219 | 227 | ||
220 | /* | 228 | /* |
221 | * Setup options | 229 | * Setup options |
@@ -706,6 +714,12 @@ void __init setup_arch(char **cmdline_p) | |||
706 | #endif | 714 | #endif |
707 | saved_video_mode = boot_params.hdr.vid_mode; | 715 | saved_video_mode = boot_params.hdr.vid_mode; |
708 | bootloader_type = boot_params.hdr.type_of_loader; | 716 | bootloader_type = boot_params.hdr.type_of_loader; |
717 | if ((bootloader_type >> 4) == 0xe) { | ||
718 | bootloader_type &= 0xf; | ||
719 | bootloader_type |= (boot_params.hdr.ext_loader_type+0x10) << 4; | ||
720 | } | ||
721 | bootloader_version = bootloader_type & 0xf; | ||
722 | bootloader_version |= boot_params.hdr.ext_loader_ver << 4; | ||
709 | 723 | ||
710 | #ifdef CONFIG_BLK_DEV_RAM | 724 | #ifdef CONFIG_BLK_DEV_RAM |
711 | rd_image_start = boot_params.hdr.ram_size & RAMDISK_IMAGE_START_MASK; | 725 | rd_image_start = boot_params.hdr.ram_size & RAMDISK_IMAGE_START_MASK; |
@@ -854,12 +868,16 @@ void __init setup_arch(char **cmdline_p) | |||
854 | max_low_pfn = max_pfn; | 868 | max_low_pfn = max_pfn; |
855 | 869 | ||
856 | high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1; | 870 | high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1; |
871 | max_pfn_mapped = KERNEL_IMAGE_SIZE >> PAGE_SHIFT; | ||
857 | #endif | 872 | #endif |
858 | 873 | ||
859 | #ifdef CONFIG_X86_CHECK_BIOS_CORRUPTION | 874 | #ifdef CONFIG_X86_CHECK_BIOS_CORRUPTION |
860 | setup_bios_corruption_check(); | 875 | setup_bios_corruption_check(); |
861 | #endif | 876 | #endif |
862 | 877 | ||
878 | printk(KERN_DEBUG "initial memory mapped : 0 - %08lx\n", | ||
879 | max_pfn_mapped<<PAGE_SHIFT); | ||
880 | |||
863 | reserve_brk(); | 881 | reserve_brk(); |
864 | 882 | ||
865 | /* max_pfn_mapped is updated here */ | 883 | /* max_pfn_mapped is updated here */ |
@@ -997,24 +1015,6 @@ void __init setup_arch(char **cmdline_p) | |||
997 | #ifdef CONFIG_X86_32 | 1015 | #ifdef CONFIG_X86_32 |
998 | 1016 | ||
999 | /** | 1017 | /** |
1000 | * x86_quirk_pre_intr_init - initialisation prior to setting up interrupt vectors | ||
1001 | * | ||
1002 | * Description: | ||
1003 | * Perform any necessary interrupt initialisation prior to setting up | ||
1004 | * the "ordinary" interrupt call gates. For legacy reasons, the ISA | ||
1005 | * interrupts should be initialised here if the machine emulates a PC | ||
1006 | * in any way. | ||
1007 | **/ | ||
1008 | void __init x86_quirk_pre_intr_init(void) | ||
1009 | { | ||
1010 | if (x86_quirks->arch_pre_intr_init) { | ||
1011 | if (x86_quirks->arch_pre_intr_init()) | ||
1012 | return; | ||
1013 | } | ||
1014 | init_ISA_irqs(); | ||
1015 | } | ||
1016 | |||
1017 | /** | ||
1018 | * x86_quirk_intr_init - post gate setup interrupt initialisation | 1018 | * x86_quirk_intr_init - post gate setup interrupt initialisation |
1019 | * | 1019 | * |
1020 | * Description: | 1020 | * Description: |
diff --git a/arch/x86/kernel/setup_percpu.c b/arch/x86/kernel/setup_percpu.c index 8f0e13be36b3..9c3f0823e6aa 100644 --- a/arch/x86/kernel/setup_percpu.c +++ b/arch/x86/kernel/setup_percpu.c | |||
@@ -425,6 +425,14 @@ void __init setup_per_cpu_areas(void) | |||
425 | early_per_cpu_ptr(x86_cpu_to_node_map) = NULL; | 425 | early_per_cpu_ptr(x86_cpu_to_node_map) = NULL; |
426 | #endif | 426 | #endif |
427 | 427 | ||
428 | #if defined(CONFIG_X86_64) && defined(CONFIG_NUMA) | ||
429 | /* | ||
430 | * make sure boot cpu node_number is right, when boot cpu is on the | ||
431 | * node that doesn't have mem installed | ||
432 | */ | ||
433 | per_cpu(node_number, boot_cpu_id) = cpu_to_node(boot_cpu_id); | ||
434 | #endif | ||
435 | |||
428 | /* Setup node to cpumask map */ | 436 | /* Setup node to cpumask map */ |
429 | setup_node_to_cpumask_map(); | 437 | setup_node_to_cpumask_map(); |
430 | 438 | ||
diff --git a/arch/x86/kernel/smp.c b/arch/x86/kernel/smp.c index 13f33ea8ccaa..f6db48c405b8 100644 --- a/arch/x86/kernel/smp.c +++ b/arch/x86/kernel/smp.c | |||
@@ -193,19 +193,19 @@ void smp_call_function_single_interrupt(struct pt_regs *regs) | |||
193 | } | 193 | } |
194 | 194 | ||
195 | struct smp_ops smp_ops = { | 195 | struct smp_ops smp_ops = { |
196 | .smp_prepare_boot_cpu = native_smp_prepare_boot_cpu, | 196 | .smp_prepare_boot_cpu = native_smp_prepare_boot_cpu, |
197 | .smp_prepare_cpus = native_smp_prepare_cpus, | 197 | .smp_prepare_cpus = native_smp_prepare_cpus, |
198 | .smp_cpus_done = native_smp_cpus_done, | 198 | .smp_cpus_done = native_smp_cpus_done, |
199 | 199 | ||
200 | .smp_send_stop = native_smp_send_stop, | 200 | .smp_send_stop = native_smp_send_stop, |
201 | .smp_send_reschedule = native_smp_send_reschedule, | 201 | .smp_send_reschedule = native_smp_send_reschedule, |
202 | 202 | ||
203 | .cpu_up = native_cpu_up, | 203 | .cpu_up = native_cpu_up, |
204 | .cpu_die = native_cpu_die, | 204 | .cpu_die = native_cpu_die, |
205 | .cpu_disable = native_cpu_disable, | 205 | .cpu_disable = native_cpu_disable, |
206 | .play_dead = native_play_dead, | 206 | .play_dead = native_play_dead, |
207 | 207 | ||
208 | .send_call_func_ipi = native_send_call_func_ipi, | 208 | .send_call_func_ipi = native_send_call_func_ipi, |
209 | .send_call_func_single_ipi = native_send_call_func_single_ipi, | 209 | .send_call_func_single_ipi = native_send_call_func_single_ipi, |
210 | }; | 210 | }; |
211 | EXPORT_SYMBOL_GPL(smp_ops); | 211 | EXPORT_SYMBOL_GPL(smp_ops); |
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c index 58d24ef917d8..7c80007ea5f7 100644 --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c | |||
@@ -504,7 +504,7 @@ void __inquire_remote_apic(int apicid) | |||
504 | * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this | 504 | * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this |
505 | * won't ... remember to clear down the APIC, etc later. | 505 | * won't ... remember to clear down the APIC, etc later. |
506 | */ | 506 | */ |
507 | int __devinit | 507 | int __cpuinit |
508 | wakeup_secondary_cpu_via_nmi(int logical_apicid, unsigned long start_eip) | 508 | wakeup_secondary_cpu_via_nmi(int logical_apicid, unsigned long start_eip) |
509 | { | 509 | { |
510 | unsigned long send_status, accept_status = 0; | 510 | unsigned long send_status, accept_status = 0; |
@@ -538,7 +538,7 @@ wakeup_secondary_cpu_via_nmi(int logical_apicid, unsigned long start_eip) | |||
538 | return (send_status | accept_status); | 538 | return (send_status | accept_status); |
539 | } | 539 | } |
540 | 540 | ||
541 | int __devinit | 541 | static int __cpuinit |
542 | wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip) | 542 | wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip) |
543 | { | 543 | { |
544 | unsigned long send_status, accept_status = 0; | 544 | unsigned long send_status, accept_status = 0; |
@@ -822,10 +822,12 @@ do_rest: | |||
822 | /* mark "stuck" area as not stuck */ | 822 | /* mark "stuck" area as not stuck */ |
823 | *((volatile unsigned long *)trampoline_base) = 0; | 823 | *((volatile unsigned long *)trampoline_base) = 0; |
824 | 824 | ||
825 | /* | 825 | if (get_uv_system_type() != UV_NON_UNIQUE_APIC) { |
826 | * Cleanup possible dangling ends... | 826 | /* |
827 | */ | 827 | * Cleanup possible dangling ends... |
828 | smpboot_restore_warm_reset_vector(); | 828 | */ |
829 | smpboot_restore_warm_reset_vector(); | ||
830 | } | ||
829 | 831 | ||
830 | return boot_error; | 832 | return boot_error; |
831 | } | 833 | } |
@@ -990,10 +992,12 @@ static int __init smp_sanity_check(unsigned max_cpus) | |||
990 | */ | 992 | */ |
991 | if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid]) && | 993 | if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid]) && |
992 | !cpu_has_apic) { | 994 | !cpu_has_apic) { |
993 | printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n", | 995 | if (!disable_apic) { |
994 | boot_cpu_physical_apicid); | 996 | pr_err("BIOS bug, local APIC #%d not detected!...\n", |
995 | printk(KERN_ERR "... forcing use of dummy APIC emulation." | 997 | boot_cpu_physical_apicid); |
998 | pr_err("... forcing use of dummy APIC emulation." | ||
996 | "(tell your hw vendor)\n"); | 999 | "(tell your hw vendor)\n"); |
1000 | } | ||
997 | smpboot_clear_io_apic(); | 1001 | smpboot_clear_io_apic(); |
998 | arch_disable_smp_support(); | 1002 | arch_disable_smp_support(); |
999 | return -1; | 1003 | return -1; |
diff --git a/arch/x86/kernel/stacktrace.c b/arch/x86/kernel/stacktrace.c index f7bddc2e37d1..4aaf7e48394f 100644 --- a/arch/x86/kernel/stacktrace.c +++ b/arch/x86/kernel/stacktrace.c | |||
@@ -20,7 +20,7 @@ save_stack_warning_symbol(void *data, char *msg, unsigned long symbol) | |||
20 | 20 | ||
21 | static int save_stack_stack(void *data, char *name) | 21 | static int save_stack_stack(void *data, char *name) |
22 | { | 22 | { |
23 | return -1; | 23 | return 0; |
24 | } | 24 | } |
25 | 25 | ||
26 | static void save_stack_address(void *data, unsigned long addr, int reliable) | 26 | static void save_stack_address(void *data, unsigned long addr, int reliable) |
diff --git a/arch/x86/kernel/tlb_uv.c b/arch/x86/kernel/tlb_uv.c index ed0c33761e6d..124d40c575df 100644 --- a/arch/x86/kernel/tlb_uv.c +++ b/arch/x86/kernel/tlb_uv.c | |||
@@ -715,7 +715,12 @@ uv_activation_descriptor_init(int node, int pnode) | |||
715 | struct bau_desc *adp; | 715 | struct bau_desc *adp; |
716 | struct bau_desc *ad2; | 716 | struct bau_desc *ad2; |
717 | 717 | ||
718 | adp = (struct bau_desc *)kmalloc_node(16384, GFP_KERNEL, node); | 718 | /* |
719 | * each bau_desc is 64 bytes; there are 8 (UV_ITEMS_PER_DESCRIPTOR) | ||
720 | * per cpu; and up to 32 (UV_ADP_SIZE) cpu's per blade | ||
721 | */ | ||
722 | adp = (struct bau_desc *)kmalloc_node(sizeof(struct bau_desc)* | ||
723 | UV_ADP_SIZE*UV_ITEMS_PER_DESCRIPTOR, GFP_KERNEL, node); | ||
719 | BUG_ON(!adp); | 724 | BUG_ON(!adp); |
720 | 725 | ||
721 | pa = uv_gpa(adp); /* need the real nasid*/ | 726 | pa = uv_gpa(adp); /* need the real nasid*/ |
@@ -729,7 +734,13 @@ uv_activation_descriptor_init(int node, int pnode) | |||
729 | (n << UV_DESC_BASE_PNODE_SHIFT | m)); | 734 | (n << UV_DESC_BASE_PNODE_SHIFT | m)); |
730 | } | 735 | } |
731 | 736 | ||
732 | for (i = 0, ad2 = adp; i < UV_ACTIVATION_DESCRIPTOR_SIZE; i++, ad2++) { | 737 | /* |
738 | * initializing all 8 (UV_ITEMS_PER_DESCRIPTOR) descriptors for each | ||
739 | * cpu even though we only use the first one; one descriptor can | ||
740 | * describe a broadcast to 256 nodes. | ||
741 | */ | ||
742 | for (i = 0, ad2 = adp; i < (UV_ADP_SIZE*UV_ITEMS_PER_DESCRIPTOR); | ||
743 | i++, ad2++) { | ||
733 | memset(ad2, 0, sizeof(struct bau_desc)); | 744 | memset(ad2, 0, sizeof(struct bau_desc)); |
734 | ad2->header.sw_ack_flag = 1; | 745 | ad2->header.sw_ack_flag = 1; |
735 | /* | 746 | /* |
@@ -832,7 +843,7 @@ static int __init uv_bau_init(void) | |||
832 | return 0; | 843 | return 0; |
833 | 844 | ||
834 | for_each_possible_cpu(cur_cpu) | 845 | for_each_possible_cpu(cur_cpu) |
835 | alloc_cpumask_var_node(&per_cpu(uv_flush_tlb_mask, cur_cpu), | 846 | zalloc_cpumask_var_node(&per_cpu(uv_flush_tlb_mask, cur_cpu), |
836 | GFP_KERNEL, cpu_to_node(cur_cpu)); | 847 | GFP_KERNEL, cpu_to_node(cur_cpu)); |
837 | 848 | ||
838 | uv_bau_retry_limit = 1; | 849 | uv_bau_retry_limit = 1; |
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c index 2cc162e09c4b..07d60c870ce2 100644 --- a/arch/x86/kernel/traps.c +++ b/arch/x86/kernel/traps.c | |||
@@ -839,9 +839,6 @@ asmlinkage void math_state_restore(void) | |||
839 | } | 839 | } |
840 | 840 | ||
841 | clts(); /* Allow maths ops (or we recurse) */ | 841 | clts(); /* Allow maths ops (or we recurse) */ |
842 | #ifdef CONFIG_X86_32 | ||
843 | restore_fpu(tsk); | ||
844 | #else | ||
845 | /* | 842 | /* |
846 | * Paranoid restore. send a SIGSEGV if we fail to restore the state. | 843 | * Paranoid restore. send a SIGSEGV if we fail to restore the state. |
847 | */ | 844 | */ |
@@ -850,7 +847,7 @@ asmlinkage void math_state_restore(void) | |||
850 | force_sig(SIGSEGV, tsk); | 847 | force_sig(SIGSEGV, tsk); |
851 | return; | 848 | return; |
852 | } | 849 | } |
853 | #endif | 850 | |
854 | thread->status |= TS_USEDFPU; /* So we fnsave on switch_to() */ | 851 | thread->status |= TS_USEDFPU; /* So we fnsave on switch_to() */ |
855 | tsk->fpu_counter++; | 852 | tsk->fpu_counter++; |
856 | } | 853 | } |
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index d57de05dc430..3e1c057e98fe 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c | |||
@@ -384,13 +384,13 @@ unsigned long native_calibrate_tsc(void) | |||
384 | { | 384 | { |
385 | u64 tsc1, tsc2, delta, ref1, ref2; | 385 | u64 tsc1, tsc2, delta, ref1, ref2; |
386 | unsigned long tsc_pit_min = ULONG_MAX, tsc_ref_min = ULONG_MAX; | 386 | unsigned long tsc_pit_min = ULONG_MAX, tsc_ref_min = ULONG_MAX; |
387 | unsigned long flags, latch, ms, fast_calibrate, tsc_khz; | 387 | unsigned long flags, latch, ms, fast_calibrate, hv_tsc_khz; |
388 | int hpet = is_hpet_enabled(), i, loopmin; | 388 | int hpet = is_hpet_enabled(), i, loopmin; |
389 | 389 | ||
390 | tsc_khz = get_hypervisor_tsc_freq(); | 390 | hv_tsc_khz = get_hypervisor_tsc_freq(); |
391 | if (tsc_khz) { | 391 | if (hv_tsc_khz) { |
392 | printk(KERN_INFO "TSC: Frequency read from the hypervisor\n"); | 392 | printk(KERN_INFO "TSC: Frequency read from the hypervisor\n"); |
393 | return tsc_khz; | 393 | return hv_tsc_khz; |
394 | } | 394 | } |
395 | 395 | ||
396 | local_irq_save(flags); | 396 | local_irq_save(flags); |
@@ -710,7 +710,16 @@ static cycle_t read_tsc(struct clocksource *cs) | |||
710 | #ifdef CONFIG_X86_64 | 710 | #ifdef CONFIG_X86_64 |
711 | static cycle_t __vsyscall_fn vread_tsc(void) | 711 | static cycle_t __vsyscall_fn vread_tsc(void) |
712 | { | 712 | { |
713 | cycle_t ret = (cycle_t)vget_cycles(); | 713 | cycle_t ret; |
714 | |||
715 | /* | ||
716 | * Surround the RDTSC by barriers, to make sure it's not | ||
717 | * speculated to outside the seqlock critical section and | ||
718 | * does not cause time warps: | ||
719 | */ | ||
720 | rdtsc_barrier(); | ||
721 | ret = (cycle_t)vget_cycles(); | ||
722 | rdtsc_barrier(); | ||
714 | 723 | ||
715 | return ret >= __vsyscall_gtod_data.clock.cycle_last ? | 724 | return ret >= __vsyscall_gtod_data.clock.cycle_last ? |
716 | ret : __vsyscall_gtod_data.clock.cycle_last; | 725 | ret : __vsyscall_gtod_data.clock.cycle_last; |
diff --git a/arch/x86/kernel/tsc_sync.c b/arch/x86/kernel/tsc_sync.c index bf36328f6ef9..027b5b498993 100644 --- a/arch/x86/kernel/tsc_sync.c +++ b/arch/x86/kernel/tsc_sync.c | |||
@@ -34,6 +34,7 @@ static __cpuinitdata atomic_t stop_count; | |||
34 | * of a critical section, to be able to prove TSC time-warps: | 34 | * of a critical section, to be able to prove TSC time-warps: |
35 | */ | 35 | */ |
36 | static __cpuinitdata raw_spinlock_t sync_lock = __RAW_SPIN_LOCK_UNLOCKED; | 36 | static __cpuinitdata raw_spinlock_t sync_lock = __RAW_SPIN_LOCK_UNLOCKED; |
37 | |||
37 | static __cpuinitdata cycles_t last_tsc; | 38 | static __cpuinitdata cycles_t last_tsc; |
38 | static __cpuinitdata cycles_t max_warp; | 39 | static __cpuinitdata cycles_t max_warp; |
39 | static __cpuinitdata int nr_warps; | 40 | static __cpuinitdata int nr_warps; |
@@ -113,13 +114,12 @@ void __cpuinit check_tsc_sync_source(int cpu) | |||
113 | return; | 114 | return; |
114 | 115 | ||
115 | if (boot_cpu_has(X86_FEATURE_TSC_RELIABLE)) { | 116 | if (boot_cpu_has(X86_FEATURE_TSC_RELIABLE)) { |
116 | printk(KERN_INFO | 117 | pr_info("Skipping synchronization checks as TSC is reliable.\n"); |
117 | "Skipping synchronization checks as TSC is reliable.\n"); | ||
118 | return; | 118 | return; |
119 | } | 119 | } |
120 | 120 | ||
121 | printk(KERN_INFO "checking TSC synchronization [CPU#%d -> CPU#%d]:", | 121 | pr_info("checking TSC synchronization [CPU#%d -> CPU#%d]:", |
122 | smp_processor_id(), cpu); | 122 | smp_processor_id(), cpu); |
123 | 123 | ||
124 | /* | 124 | /* |
125 | * Reset it - in case this is a second bootup: | 125 | * Reset it - in case this is a second bootup: |
@@ -143,8 +143,8 @@ void __cpuinit check_tsc_sync_source(int cpu) | |||
143 | 143 | ||
144 | if (nr_warps) { | 144 | if (nr_warps) { |
145 | printk("\n"); | 145 | printk("\n"); |
146 | printk(KERN_WARNING "Measured %Ld cycles TSC warp between CPUs," | 146 | pr_warning("Measured %Ld cycles TSC warp between CPUs, " |
147 | " turning off TSC clock.\n", max_warp); | 147 | "turning off TSC clock.\n", max_warp); |
148 | mark_tsc_unstable("check_tsc_sync_source failed"); | 148 | mark_tsc_unstable("check_tsc_sync_source failed"); |
149 | } else { | 149 | } else { |
150 | printk(" passed.\n"); | 150 | printk(" passed.\n"); |
@@ -195,5 +195,3 @@ void __cpuinit check_tsc_sync_target(void) | |||
195 | while (atomic_read(&stop_count) != cpus) | 195 | while (atomic_read(&stop_count) != cpus) |
196 | cpu_relax(); | 196 | cpu_relax(); |
197 | } | 197 | } |
198 | #undef NR_LOOPS | ||
199 | |||
diff --git a/arch/x86/kernel/vm86_32.c b/arch/x86/kernel/vm86_32.c index d7ac84e7fc1c..9c4e62539058 100644 --- a/arch/x86/kernel/vm86_32.c +++ b/arch/x86/kernel/vm86_32.c | |||
@@ -287,10 +287,9 @@ static void do_sys_vm86(struct kernel_vm86_struct *info, struct task_struct *tsk | |||
287 | info->regs.pt.ds = 0; | 287 | info->regs.pt.ds = 0; |
288 | info->regs.pt.es = 0; | 288 | info->regs.pt.es = 0; |
289 | info->regs.pt.fs = 0; | 289 | info->regs.pt.fs = 0; |
290 | 290 | #ifndef CONFIG_X86_32_LAZY_GS | |
291 | /* we are clearing gs later just before "jmp resume_userspace", | 291 | info->regs.pt.gs = 0; |
292 | * because it is not saved/restored. | 292 | #endif |
293 | */ | ||
294 | 293 | ||
295 | /* | 294 | /* |
296 | * The flags register is also special: we cannot trust that the user | 295 | * The flags register is also special: we cannot trust that the user |
@@ -318,9 +317,9 @@ static void do_sys_vm86(struct kernel_vm86_struct *info, struct task_struct *tsk | |||
318 | } | 317 | } |
319 | 318 | ||
320 | /* | 319 | /* |
321 | * Save old state, set default return value (%ax) to 0 | 320 | * Save old state, set default return value (%ax) to 0 (VM86_SIGNAL) |
322 | */ | 321 | */ |
323 | info->regs32->ax = 0; | 322 | info->regs32->ax = VM86_SIGNAL; |
324 | tsk->thread.saved_sp0 = tsk->thread.sp0; | 323 | tsk->thread.saved_sp0 = tsk->thread.sp0; |
325 | tsk->thread.saved_fs = info->regs32->fs; | 324 | tsk->thread.saved_fs = info->regs32->fs; |
326 | tsk->thread.saved_gs = get_user_gs(info->regs32); | 325 | tsk->thread.saved_gs = get_user_gs(info->regs32); |
@@ -343,7 +342,9 @@ static void do_sys_vm86(struct kernel_vm86_struct *info, struct task_struct *tsk | |||
343 | __asm__ __volatile__( | 342 | __asm__ __volatile__( |
344 | "movl %0,%%esp\n\t" | 343 | "movl %0,%%esp\n\t" |
345 | "movl %1,%%ebp\n\t" | 344 | "movl %1,%%ebp\n\t" |
345 | #ifdef CONFIG_X86_32_LAZY_GS | ||
346 | "mov %2, %%gs\n\t" | 346 | "mov %2, %%gs\n\t" |
347 | #endif | ||
347 | "jmp resume_userspace" | 348 | "jmp resume_userspace" |
348 | : /* no outputs */ | 349 | : /* no outputs */ |
349 | :"r" (&info->regs), "r" (task_thread_info(tsk)), "r" (0)); | 350 | :"r" (&info->regs), "r" (task_thread_info(tsk)), "r" (0)); |
diff --git a/arch/x86/kernel/vmi_32.c b/arch/x86/kernel/vmi_32.c index 95deb9f2211e..b263423fbe2a 100644 --- a/arch/x86/kernel/vmi_32.c +++ b/arch/x86/kernel/vmi_32.c | |||
@@ -462,22 +462,28 @@ vmi_startup_ipi_hook(int phys_apicid, unsigned long start_eip, | |||
462 | } | 462 | } |
463 | #endif | 463 | #endif |
464 | 464 | ||
465 | static void vmi_enter_lazy_cpu(void) | 465 | static void vmi_start_context_switch(struct task_struct *prev) |
466 | { | 466 | { |
467 | paravirt_enter_lazy_cpu(); | 467 | paravirt_start_context_switch(prev); |
468 | vmi_ops.set_lazy_mode(2); | 468 | vmi_ops.set_lazy_mode(2); |
469 | } | 469 | } |
470 | 470 | ||
471 | static void vmi_end_context_switch(struct task_struct *next) | ||
472 | { | ||
473 | vmi_ops.set_lazy_mode(0); | ||
474 | paravirt_end_context_switch(next); | ||
475 | } | ||
476 | |||
471 | static void vmi_enter_lazy_mmu(void) | 477 | static void vmi_enter_lazy_mmu(void) |
472 | { | 478 | { |
473 | paravirt_enter_lazy_mmu(); | 479 | paravirt_enter_lazy_mmu(); |
474 | vmi_ops.set_lazy_mode(1); | 480 | vmi_ops.set_lazy_mode(1); |
475 | } | 481 | } |
476 | 482 | ||
477 | static void vmi_leave_lazy(void) | 483 | static void vmi_leave_lazy_mmu(void) |
478 | { | 484 | { |
479 | paravirt_leave_lazy(paravirt_get_lazy_mode()); | ||
480 | vmi_ops.set_lazy_mode(0); | 485 | vmi_ops.set_lazy_mode(0); |
486 | paravirt_leave_lazy_mmu(); | ||
481 | } | 487 | } |
482 | 488 | ||
483 | static inline int __init check_vmi_rom(struct vrom_header *rom) | 489 | static inline int __init check_vmi_rom(struct vrom_header *rom) |
@@ -711,14 +717,14 @@ static inline int __init activate_vmi(void) | |||
711 | para_fill(pv_cpu_ops.set_iopl_mask, SetIOPLMask); | 717 | para_fill(pv_cpu_ops.set_iopl_mask, SetIOPLMask); |
712 | para_fill(pv_cpu_ops.io_delay, IODelay); | 718 | para_fill(pv_cpu_ops.io_delay, IODelay); |
713 | 719 | ||
714 | para_wrap(pv_cpu_ops.lazy_mode.enter, vmi_enter_lazy_cpu, | 720 | para_wrap(pv_cpu_ops.start_context_switch, vmi_start_context_switch, |
715 | set_lazy_mode, SetLazyMode); | 721 | set_lazy_mode, SetLazyMode); |
716 | para_wrap(pv_cpu_ops.lazy_mode.leave, vmi_leave_lazy, | 722 | para_wrap(pv_cpu_ops.end_context_switch, vmi_end_context_switch, |
717 | set_lazy_mode, SetLazyMode); | 723 | set_lazy_mode, SetLazyMode); |
718 | 724 | ||
719 | para_wrap(pv_mmu_ops.lazy_mode.enter, vmi_enter_lazy_mmu, | 725 | para_wrap(pv_mmu_ops.lazy_mode.enter, vmi_enter_lazy_mmu, |
720 | set_lazy_mode, SetLazyMode); | 726 | set_lazy_mode, SetLazyMode); |
721 | para_wrap(pv_mmu_ops.lazy_mode.leave, vmi_leave_lazy, | 727 | para_wrap(pv_mmu_ops.lazy_mode.leave, vmi_leave_lazy_mmu, |
722 | set_lazy_mode, SetLazyMode); | 728 | set_lazy_mode, SetLazyMode); |
723 | 729 | ||
724 | /* user and kernel flush are just handled with different flags to FlushTLB */ | 730 | /* user and kernel flush are just handled with different flags to FlushTLB */ |
diff --git a/arch/x86/kernel/vmlinux.lds.S b/arch/x86/kernel/vmlinux.lds.S index 849ee611f013..4c85b2e2bb65 100644 --- a/arch/x86/kernel/vmlinux.lds.S +++ b/arch/x86/kernel/vmlinux.lds.S | |||
@@ -1,5 +1,431 @@ | |||
1 | /* | ||
2 | * ld script for the x86 kernel | ||
3 | * | ||
4 | * Historic 32-bit version written by Martin Mares <mj@atrey.karlin.mff.cuni.cz> | ||
5 | * | ||
6 | * Modernisation, unification and other changes and fixes: | ||
7 | * Copyright (C) 2007-2009 Sam Ravnborg <sam@ravnborg.org> | ||
8 | * | ||
9 | * | ||
10 | * Don't define absolute symbols until and unless you know that symbol | ||
11 | * value is should remain constant even if kernel image is relocated | ||
12 | * at run time. Absolute symbols are not relocated. If symbol value should | ||
13 | * change if kernel is relocated, make the symbol section relative and | ||
14 | * put it inside the section definition. | ||
15 | */ | ||
16 | |||
1 | #ifdef CONFIG_X86_32 | 17 | #ifdef CONFIG_X86_32 |
2 | # include "vmlinux_32.lds.S" | 18 | #define LOAD_OFFSET __PAGE_OFFSET |
3 | #else | 19 | #else |
4 | # include "vmlinux_64.lds.S" | 20 | #define LOAD_OFFSET __START_KERNEL_map |
5 | #endif | 21 | #endif |
22 | |||
23 | #include <asm-generic/vmlinux.lds.h> | ||
24 | #include <asm/asm-offsets.h> | ||
25 | #include <asm/thread_info.h> | ||
26 | #include <asm/page_types.h> | ||
27 | #include <asm/cache.h> | ||
28 | #include <asm/boot.h> | ||
29 | |||
30 | #undef i386 /* in case the preprocessor is a 32bit one */ | ||
31 | |||
32 | OUTPUT_FORMAT(CONFIG_OUTPUT_FORMAT, CONFIG_OUTPUT_FORMAT, CONFIG_OUTPUT_FORMAT) | ||
33 | |||
34 | #ifdef CONFIG_X86_32 | ||
35 | OUTPUT_ARCH(i386) | ||
36 | ENTRY(phys_startup_32) | ||
37 | jiffies = jiffies_64; | ||
38 | #else | ||
39 | OUTPUT_ARCH(i386:x86-64) | ||
40 | ENTRY(phys_startup_64) | ||
41 | jiffies_64 = jiffies; | ||
42 | #endif | ||
43 | |||
44 | PHDRS { | ||
45 | text PT_LOAD FLAGS(5); /* R_E */ | ||
46 | data PT_LOAD FLAGS(7); /* RWE */ | ||
47 | #ifdef CONFIG_X86_64 | ||
48 | user PT_LOAD FLAGS(7); /* RWE */ | ||
49 | data.init PT_LOAD FLAGS(7); /* RWE */ | ||
50 | #ifdef CONFIG_SMP | ||
51 | percpu PT_LOAD FLAGS(7); /* RWE */ | ||
52 | #endif | ||
53 | data.init2 PT_LOAD FLAGS(7); /* RWE */ | ||
54 | #endif | ||
55 | note PT_NOTE FLAGS(0); /* ___ */ | ||
56 | } | ||
57 | |||
58 | SECTIONS | ||
59 | { | ||
60 | #ifdef CONFIG_X86_32 | ||
61 | . = LOAD_OFFSET + LOAD_PHYSICAL_ADDR; | ||
62 | phys_startup_32 = startup_32 - LOAD_OFFSET; | ||
63 | #else | ||
64 | . = __START_KERNEL; | ||
65 | phys_startup_64 = startup_64 - LOAD_OFFSET; | ||
66 | #endif | ||
67 | |||
68 | /* Text and read-only data */ | ||
69 | |||
70 | /* bootstrapping code */ | ||
71 | .text.head : AT(ADDR(.text.head) - LOAD_OFFSET) { | ||
72 | _text = .; | ||
73 | *(.text.head) | ||
74 | } :text = 0x9090 | ||
75 | |||
76 | /* The rest of the text */ | ||
77 | .text : AT(ADDR(.text) - LOAD_OFFSET) { | ||
78 | #ifdef CONFIG_X86_32 | ||
79 | /* not really needed, already page aligned */ | ||
80 | . = ALIGN(PAGE_SIZE); | ||
81 | *(.text.page_aligned) | ||
82 | #endif | ||
83 | . = ALIGN(8); | ||
84 | _stext = .; | ||
85 | TEXT_TEXT | ||
86 | SCHED_TEXT | ||
87 | LOCK_TEXT | ||
88 | KPROBES_TEXT | ||
89 | IRQENTRY_TEXT | ||
90 | *(.fixup) | ||
91 | *(.gnu.warning) | ||
92 | /* End of text section */ | ||
93 | _etext = .; | ||
94 | } :text = 0x9090 | ||
95 | |||
96 | NOTES :text :note | ||
97 | |||
98 | /* Exception table */ | ||
99 | . = ALIGN(16); | ||
100 | __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) { | ||
101 | __start___ex_table = .; | ||
102 | *(__ex_table) | ||
103 | __stop___ex_table = .; | ||
104 | } :text = 0x9090 | ||
105 | |||
106 | RODATA | ||
107 | |||
108 | /* Data */ | ||
109 | . = ALIGN(PAGE_SIZE); | ||
110 | .data : AT(ADDR(.data) - LOAD_OFFSET) { | ||
111 | DATA_DATA | ||
112 | CONSTRUCTORS | ||
113 | |||
114 | #ifdef CONFIG_X86_64 | ||
115 | /* End of data section */ | ||
116 | _edata = .; | ||
117 | #endif | ||
118 | } :data | ||
119 | |||
120 | #ifdef CONFIG_X86_32 | ||
121 | /* 32 bit has nosave before _edata */ | ||
122 | . = ALIGN(PAGE_SIZE); | ||
123 | .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) { | ||
124 | __nosave_begin = .; | ||
125 | *(.data.nosave) | ||
126 | . = ALIGN(PAGE_SIZE); | ||
127 | __nosave_end = .; | ||
128 | } | ||
129 | #endif | ||
130 | |||
131 | . = ALIGN(PAGE_SIZE); | ||
132 | .data.page_aligned : AT(ADDR(.data.page_aligned) - LOAD_OFFSET) { | ||
133 | *(.data.page_aligned) | ||
134 | *(.data.idt) | ||
135 | } | ||
136 | |||
137 | #ifdef CONFIG_X86_32 | ||
138 | . = ALIGN(32); | ||
139 | #else | ||
140 | . = ALIGN(PAGE_SIZE); | ||
141 | . = ALIGN(CONFIG_X86_L1_CACHE_BYTES); | ||
142 | #endif | ||
143 | .data.cacheline_aligned : | ||
144 | AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET) { | ||
145 | *(.data.cacheline_aligned) | ||
146 | } | ||
147 | |||
148 | /* rarely changed data like cpu maps */ | ||
149 | #ifdef CONFIG_X86_32 | ||
150 | . = ALIGN(32); | ||
151 | #else | ||
152 | . = ALIGN(CONFIG_X86_INTERNODE_CACHE_BYTES); | ||
153 | #endif | ||
154 | .data.read_mostly : AT(ADDR(.data.read_mostly) - LOAD_OFFSET) { | ||
155 | *(.data.read_mostly) | ||
156 | |||
157 | #ifdef CONFIG_X86_32 | ||
158 | /* End of data section */ | ||
159 | _edata = .; | ||
160 | #endif | ||
161 | } | ||
162 | |||
163 | #ifdef CONFIG_X86_64 | ||
164 | |||
165 | #define VSYSCALL_ADDR (-10*1024*1024) | ||
166 | #define VSYSCALL_PHYS_ADDR ((LOADADDR(.data.read_mostly) + \ | ||
167 | SIZEOF(.data.read_mostly) + 4095) & ~(4095)) | ||
168 | #define VSYSCALL_VIRT_ADDR ((ADDR(.data.read_mostly) + \ | ||
169 | SIZEOF(.data.read_mostly) + 4095) & ~(4095)) | ||
170 | |||
171 | #define VLOAD_OFFSET (VSYSCALL_ADDR - VSYSCALL_PHYS_ADDR) | ||
172 | #define VLOAD(x) (ADDR(x) - VLOAD_OFFSET) | ||
173 | |||
174 | #define VVIRT_OFFSET (VSYSCALL_ADDR - VSYSCALL_VIRT_ADDR) | ||
175 | #define VVIRT(x) (ADDR(x) - VVIRT_OFFSET) | ||
176 | |||
177 | . = VSYSCALL_ADDR; | ||
178 | .vsyscall_0 : AT(VSYSCALL_PHYS_ADDR) { | ||
179 | *(.vsyscall_0) | ||
180 | } :user | ||
181 | |||
182 | __vsyscall_0 = VSYSCALL_VIRT_ADDR; | ||
183 | |||
184 | . = ALIGN(CONFIG_X86_L1_CACHE_BYTES); | ||
185 | .vsyscall_fn : AT(VLOAD(.vsyscall_fn)) { | ||
186 | *(.vsyscall_fn) | ||
187 | } | ||
188 | |||
189 | . = ALIGN(CONFIG_X86_L1_CACHE_BYTES); | ||
190 | .vsyscall_gtod_data : AT(VLOAD(.vsyscall_gtod_data)) { | ||
191 | *(.vsyscall_gtod_data) | ||
192 | } | ||
193 | |||
194 | vsyscall_gtod_data = VVIRT(.vsyscall_gtod_data); | ||
195 | .vsyscall_clock : AT(VLOAD(.vsyscall_clock)) { | ||
196 | *(.vsyscall_clock) | ||
197 | } | ||
198 | vsyscall_clock = VVIRT(.vsyscall_clock); | ||
199 | |||
200 | |||
201 | .vsyscall_1 ADDR(.vsyscall_0) + 1024: AT(VLOAD(.vsyscall_1)) { | ||
202 | *(.vsyscall_1) | ||
203 | } | ||
204 | .vsyscall_2 ADDR(.vsyscall_0) + 2048: AT(VLOAD(.vsyscall_2)) { | ||
205 | *(.vsyscall_2) | ||
206 | } | ||
207 | |||
208 | .vgetcpu_mode : AT(VLOAD(.vgetcpu_mode)) { | ||
209 | *(.vgetcpu_mode) | ||
210 | } | ||
211 | vgetcpu_mode = VVIRT(.vgetcpu_mode); | ||
212 | |||
213 | . = ALIGN(CONFIG_X86_L1_CACHE_BYTES); | ||
214 | .jiffies : AT(VLOAD(.jiffies)) { | ||
215 | *(.jiffies) | ||
216 | } | ||
217 | jiffies = VVIRT(.jiffies); | ||
218 | |||
219 | .vsyscall_3 ADDR(.vsyscall_0) + 3072: AT(VLOAD(.vsyscall_3)) { | ||
220 | *(.vsyscall_3) | ||
221 | } | ||
222 | |||
223 | . = VSYSCALL_VIRT_ADDR + PAGE_SIZE; | ||
224 | |||
225 | #undef VSYSCALL_ADDR | ||
226 | #undef VSYSCALL_PHYS_ADDR | ||
227 | #undef VSYSCALL_VIRT_ADDR | ||
228 | #undef VLOAD_OFFSET | ||
229 | #undef VLOAD | ||
230 | #undef VVIRT_OFFSET | ||
231 | #undef VVIRT | ||
232 | |||
233 | #endif /* CONFIG_X86_64 */ | ||
234 | |||
235 | /* init_task */ | ||
236 | . = ALIGN(THREAD_SIZE); | ||
237 | .data.init_task : AT(ADDR(.data.init_task) - LOAD_OFFSET) { | ||
238 | *(.data.init_task) | ||
239 | } | ||
240 | #ifdef CONFIG_X86_64 | ||
241 | :data.init | ||
242 | #endif | ||
243 | |||
244 | /* | ||
245 | * smp_locks might be freed after init | ||
246 | * start/end must be page aligned | ||
247 | */ | ||
248 | . = ALIGN(PAGE_SIZE); | ||
249 | .smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) { | ||
250 | __smp_locks = .; | ||
251 | *(.smp_locks) | ||
252 | __smp_locks_end = .; | ||
253 | . = ALIGN(PAGE_SIZE); | ||
254 | } | ||
255 | |||
256 | /* Init code and data - will be freed after init */ | ||
257 | . = ALIGN(PAGE_SIZE); | ||
258 | .init.text : AT(ADDR(.init.text) - LOAD_OFFSET) { | ||
259 | __init_begin = .; /* paired with __init_end */ | ||
260 | _sinittext = .; | ||
261 | INIT_TEXT | ||
262 | _einittext = .; | ||
263 | } | ||
264 | |||
265 | .init.data : AT(ADDR(.init.data) - LOAD_OFFSET) { | ||
266 | INIT_DATA | ||
267 | } | ||
268 | |||
269 | . = ALIGN(16); | ||
270 | .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) { | ||
271 | __setup_start = .; | ||
272 | *(.init.setup) | ||
273 | __setup_end = .; | ||
274 | } | ||
275 | .initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET) { | ||
276 | __initcall_start = .; | ||
277 | INITCALLS | ||
278 | __initcall_end = .; | ||
279 | } | ||
280 | |||
281 | .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET) { | ||
282 | __con_initcall_start = .; | ||
283 | *(.con_initcall.init) | ||
284 | __con_initcall_end = .; | ||
285 | } | ||
286 | |||
287 | .x86_cpu_dev.init : AT(ADDR(.x86_cpu_dev.init) - LOAD_OFFSET) { | ||
288 | __x86_cpu_dev_start = .; | ||
289 | *(.x86_cpu_dev.init) | ||
290 | __x86_cpu_dev_end = .; | ||
291 | } | ||
292 | |||
293 | SECURITY_INIT | ||
294 | |||
295 | . = ALIGN(8); | ||
296 | .parainstructions : AT(ADDR(.parainstructions) - LOAD_OFFSET) { | ||
297 | __parainstructions = .; | ||
298 | *(.parainstructions) | ||
299 | __parainstructions_end = .; | ||
300 | } | ||
301 | |||
302 | . = ALIGN(8); | ||
303 | .altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) { | ||
304 | __alt_instructions = .; | ||
305 | *(.altinstructions) | ||
306 | __alt_instructions_end = .; | ||
307 | } | ||
308 | |||
309 | .altinstr_replacement : AT(ADDR(.altinstr_replacement) - LOAD_OFFSET) { | ||
310 | *(.altinstr_replacement) | ||
311 | } | ||
312 | |||
313 | /* | ||
314 | * .exit.text is discard at runtime, not link time, to deal with | ||
315 | * references from .altinstructions and .eh_frame | ||
316 | */ | ||
317 | .exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) { | ||
318 | EXIT_TEXT | ||
319 | } | ||
320 | |||
321 | .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) { | ||
322 | EXIT_DATA | ||
323 | } | ||
324 | |||
325 | #ifdef CONFIG_BLK_DEV_INITRD | ||
326 | . = ALIGN(PAGE_SIZE); | ||
327 | .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) { | ||
328 | __initramfs_start = .; | ||
329 | *(.init.ramfs) | ||
330 | __initramfs_end = .; | ||
331 | } | ||
332 | #endif | ||
333 | |||
334 | #if defined(CONFIG_X86_64) && defined(CONFIG_SMP) | ||
335 | /* | ||
336 | * percpu offsets are zero-based on SMP. PERCPU_VADDR() changes the | ||
337 | * output PHDR, so the next output section - __data_nosave - should | ||
338 | * start another section data.init2. Also, pda should be at the head of | ||
339 | * percpu area. Preallocate it and define the percpu offset symbol | ||
340 | * so that it can be accessed as a percpu variable. | ||
341 | */ | ||
342 | . = ALIGN(PAGE_SIZE); | ||
343 | PERCPU_VADDR(0, :percpu) | ||
344 | #else | ||
345 | PERCPU(PAGE_SIZE) | ||
346 | #endif | ||
347 | |||
348 | . = ALIGN(PAGE_SIZE); | ||
349 | |||
350 | /* freed after init ends here */ | ||
351 | .init.end : AT(ADDR(.init.end) - LOAD_OFFSET) { | ||
352 | __init_end = .; | ||
353 | } | ||
354 | |||
355 | #ifdef CONFIG_X86_64 | ||
356 | .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) { | ||
357 | . = ALIGN(PAGE_SIZE); | ||
358 | __nosave_begin = .; | ||
359 | *(.data.nosave) | ||
360 | . = ALIGN(PAGE_SIZE); | ||
361 | __nosave_end = .; | ||
362 | } :data.init2 | ||
363 | /* use another section data.init2, see PERCPU_VADDR() above */ | ||
364 | #endif | ||
365 | |||
366 | /* BSS */ | ||
367 | . = ALIGN(PAGE_SIZE); | ||
368 | .bss : AT(ADDR(.bss) - LOAD_OFFSET) { | ||
369 | __bss_start = .; | ||
370 | *(.bss.page_aligned) | ||
371 | *(.bss) | ||
372 | . = ALIGN(4); | ||
373 | __bss_stop = .; | ||
374 | } | ||
375 | |||
376 | . = ALIGN(PAGE_SIZE); | ||
377 | .brk : AT(ADDR(.brk) - LOAD_OFFSET) { | ||
378 | __brk_base = .; | ||
379 | . += 64 * 1024; /* 64k alignment slop space */ | ||
380 | *(.brk_reservation) /* areas brk users have reserved */ | ||
381 | __brk_limit = .; | ||
382 | } | ||
383 | |||
384 | .end : AT(ADDR(.end) - LOAD_OFFSET) { | ||
385 | _end = .; | ||
386 | } | ||
387 | |||
388 | /* Sections to be discarded */ | ||
389 | /DISCARD/ : { | ||
390 | *(.exitcall.exit) | ||
391 | *(.eh_frame) | ||
392 | *(.discard) | ||
393 | } | ||
394 | |||
395 | STABS_DEBUG | ||
396 | DWARF_DEBUG | ||
397 | } | ||
398 | |||
399 | |||
400 | #ifdef CONFIG_X86_32 | ||
401 | ASSERT((_end - LOAD_OFFSET <= KERNEL_IMAGE_SIZE), | ||
402 | "kernel image bigger than KERNEL_IMAGE_SIZE") | ||
403 | #else | ||
404 | /* | ||
405 | * Per-cpu symbols which need to be offset from __per_cpu_load | ||
406 | * for the boot processor. | ||
407 | */ | ||
408 | #define INIT_PER_CPU(x) init_per_cpu__##x = per_cpu__##x + __per_cpu_load | ||
409 | INIT_PER_CPU(gdt_page); | ||
410 | INIT_PER_CPU(irq_stack_union); | ||
411 | |||
412 | /* | ||
413 | * Build-time check on the image size: | ||
414 | */ | ||
415 | ASSERT((_end - _text <= KERNEL_IMAGE_SIZE), | ||
416 | "kernel image bigger than KERNEL_IMAGE_SIZE") | ||
417 | |||
418 | #ifdef CONFIG_SMP | ||
419 | ASSERT((per_cpu__irq_stack_union == 0), | ||
420 | "irq_stack_union is not at start of per-cpu area"); | ||
421 | #endif | ||
422 | |||
423 | #endif /* CONFIG_X86_32 */ | ||
424 | |||
425 | #ifdef CONFIG_KEXEC | ||
426 | #include <asm/kexec.h> | ||
427 | |||
428 | ASSERT(kexec_control_code_size <= KEXEC_CONTROL_CODE_MAX_SIZE, | ||
429 | "kexec control code size is too big") | ||
430 | #endif | ||
431 | |||
diff --git a/arch/x86/kernel/vmlinux_32.lds.S b/arch/x86/kernel/vmlinux_32.lds.S deleted file mode 100644 index 62ad500d55f3..000000000000 --- a/arch/x86/kernel/vmlinux_32.lds.S +++ /dev/null | |||
@@ -1,229 +0,0 @@ | |||
1 | /* ld script to make i386 Linux kernel | ||
2 | * Written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>; | ||
3 | * | ||
4 | * Don't define absolute symbols until and unless you know that symbol | ||
5 | * value is should remain constant even if kernel image is relocated | ||
6 | * at run time. Absolute symbols are not relocated. If symbol value should | ||
7 | * change if kernel is relocated, make the symbol section relative and | ||
8 | * put it inside the section definition. | ||
9 | */ | ||
10 | |||
11 | #define LOAD_OFFSET __PAGE_OFFSET | ||
12 | |||
13 | #include <asm-generic/vmlinux.lds.h> | ||
14 | #include <asm/thread_info.h> | ||
15 | #include <asm/page_types.h> | ||
16 | #include <asm/cache.h> | ||
17 | #include <asm/boot.h> | ||
18 | |||
19 | OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386") | ||
20 | OUTPUT_ARCH(i386) | ||
21 | ENTRY(phys_startup_32) | ||
22 | jiffies = jiffies_64; | ||
23 | |||
24 | PHDRS { | ||
25 | text PT_LOAD FLAGS(5); /* R_E */ | ||
26 | data PT_LOAD FLAGS(7); /* RWE */ | ||
27 | note PT_NOTE FLAGS(0); /* ___ */ | ||
28 | } | ||
29 | SECTIONS | ||
30 | { | ||
31 | . = LOAD_OFFSET + LOAD_PHYSICAL_ADDR; | ||
32 | phys_startup_32 = startup_32 - LOAD_OFFSET; | ||
33 | |||
34 | .text.head : AT(ADDR(.text.head) - LOAD_OFFSET) { | ||
35 | _text = .; /* Text and read-only data */ | ||
36 | *(.text.head) | ||
37 | } :text = 0x9090 | ||
38 | |||
39 | /* read-only */ | ||
40 | .text : AT(ADDR(.text) - LOAD_OFFSET) { | ||
41 | . = ALIGN(PAGE_SIZE); /* not really needed, already page aligned */ | ||
42 | *(.text.page_aligned) | ||
43 | TEXT_TEXT | ||
44 | SCHED_TEXT | ||
45 | LOCK_TEXT | ||
46 | KPROBES_TEXT | ||
47 | IRQENTRY_TEXT | ||
48 | *(.fixup) | ||
49 | *(.gnu.warning) | ||
50 | _etext = .; /* End of text section */ | ||
51 | } :text = 0x9090 | ||
52 | |||
53 | NOTES :text :note | ||
54 | |||
55 | . = ALIGN(16); /* Exception table */ | ||
56 | __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) { | ||
57 | __start___ex_table = .; | ||
58 | *(__ex_table) | ||
59 | __stop___ex_table = .; | ||
60 | } :text = 0x9090 | ||
61 | |||
62 | RODATA | ||
63 | |||
64 | /* writeable */ | ||
65 | . = ALIGN(PAGE_SIZE); | ||
66 | .data : AT(ADDR(.data) - LOAD_OFFSET) { /* Data */ | ||
67 | DATA_DATA | ||
68 | CONSTRUCTORS | ||
69 | } :data | ||
70 | |||
71 | . = ALIGN(PAGE_SIZE); | ||
72 | .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) { | ||
73 | __nosave_begin = .; | ||
74 | *(.data.nosave) | ||
75 | . = ALIGN(PAGE_SIZE); | ||
76 | __nosave_end = .; | ||
77 | } | ||
78 | |||
79 | . = ALIGN(PAGE_SIZE); | ||
80 | .data.page_aligned : AT(ADDR(.data.page_aligned) - LOAD_OFFSET) { | ||
81 | *(.data.page_aligned) | ||
82 | *(.data.idt) | ||
83 | } | ||
84 | |||
85 | . = ALIGN(32); | ||
86 | .data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET) { | ||
87 | *(.data.cacheline_aligned) | ||
88 | } | ||
89 | |||
90 | /* rarely changed data like cpu maps */ | ||
91 | . = ALIGN(32); | ||
92 | .data.read_mostly : AT(ADDR(.data.read_mostly) - LOAD_OFFSET) { | ||
93 | *(.data.read_mostly) | ||
94 | _edata = .; /* End of data section */ | ||
95 | } | ||
96 | |||
97 | . = ALIGN(THREAD_SIZE); /* init_task */ | ||
98 | .data.init_task : AT(ADDR(.data.init_task) - LOAD_OFFSET) { | ||
99 | *(.data.init_task) | ||
100 | } | ||
101 | |||
102 | /* might get freed after init */ | ||
103 | . = ALIGN(PAGE_SIZE); | ||
104 | .smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) { | ||
105 | __smp_locks = .; | ||
106 | *(.smp_locks) | ||
107 | __smp_locks_end = .; | ||
108 | } | ||
109 | /* will be freed after init | ||
110 | * Following ALIGN() is required to make sure no other data falls on the | ||
111 | * same page where __smp_alt_end is pointing as that page might be freed | ||
112 | * after boot. Always make sure that ALIGN() directive is present after | ||
113 | * the section which contains __smp_alt_end. | ||
114 | */ | ||
115 | . = ALIGN(PAGE_SIZE); | ||
116 | |||
117 | /* will be freed after init */ | ||
118 | . = ALIGN(PAGE_SIZE); /* Init code and data */ | ||
119 | .init.text : AT(ADDR(.init.text) - LOAD_OFFSET) { | ||
120 | __init_begin = .; | ||
121 | _sinittext = .; | ||
122 | INIT_TEXT | ||
123 | _einittext = .; | ||
124 | } | ||
125 | .init.data : AT(ADDR(.init.data) - LOAD_OFFSET) { | ||
126 | INIT_DATA | ||
127 | } | ||
128 | . = ALIGN(16); | ||
129 | .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) { | ||
130 | __setup_start = .; | ||
131 | *(.init.setup) | ||
132 | __setup_end = .; | ||
133 | } | ||
134 | .initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET) { | ||
135 | __initcall_start = .; | ||
136 | INITCALLS | ||
137 | __initcall_end = .; | ||
138 | } | ||
139 | .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET) { | ||
140 | __con_initcall_start = .; | ||
141 | *(.con_initcall.init) | ||
142 | __con_initcall_end = .; | ||
143 | } | ||
144 | .x86_cpu_dev.init : AT(ADDR(.x86_cpu_dev.init) - LOAD_OFFSET) { | ||
145 | __x86_cpu_dev_start = .; | ||
146 | *(.x86_cpu_dev.init) | ||
147 | __x86_cpu_dev_end = .; | ||
148 | } | ||
149 | SECURITY_INIT | ||
150 | . = ALIGN(4); | ||
151 | .altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) { | ||
152 | __alt_instructions = .; | ||
153 | *(.altinstructions) | ||
154 | __alt_instructions_end = .; | ||
155 | } | ||
156 | .altinstr_replacement : AT(ADDR(.altinstr_replacement) - LOAD_OFFSET) { | ||
157 | *(.altinstr_replacement) | ||
158 | } | ||
159 | . = ALIGN(4); | ||
160 | .parainstructions : AT(ADDR(.parainstructions) - LOAD_OFFSET) { | ||
161 | __parainstructions = .; | ||
162 | *(.parainstructions) | ||
163 | __parainstructions_end = .; | ||
164 | } | ||
165 | /* .exit.text is discard at runtime, not link time, to deal with references | ||
166 | from .altinstructions and .eh_frame */ | ||
167 | .exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) { | ||
168 | EXIT_TEXT | ||
169 | } | ||
170 | .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) { | ||
171 | EXIT_DATA | ||
172 | } | ||
173 | #if defined(CONFIG_BLK_DEV_INITRD) | ||
174 | . = ALIGN(PAGE_SIZE); | ||
175 | .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) { | ||
176 | __initramfs_start = .; | ||
177 | *(.init.ramfs) | ||
178 | __initramfs_end = .; | ||
179 | } | ||
180 | #endif | ||
181 | PERCPU(PAGE_SIZE) | ||
182 | . = ALIGN(PAGE_SIZE); | ||
183 | /* freed after init ends here */ | ||
184 | |||
185 | .bss : AT(ADDR(.bss) - LOAD_OFFSET) { | ||
186 | __init_end = .; | ||
187 | __bss_start = .; /* BSS */ | ||
188 | *(.bss.page_aligned) | ||
189 | *(.bss) | ||
190 | . = ALIGN(4); | ||
191 | __bss_stop = .; | ||
192 | } | ||
193 | |||
194 | .brk : AT(ADDR(.brk) - LOAD_OFFSET) { | ||
195 | . = ALIGN(PAGE_SIZE); | ||
196 | __brk_base = . ; | ||
197 | . += 64 * 1024 ; /* 64k alignment slop space */ | ||
198 | *(.brk_reservation) /* areas brk users have reserved */ | ||
199 | __brk_limit = . ; | ||
200 | } | ||
201 | |||
202 | .end : AT(ADDR(.end) - LOAD_OFFSET) { | ||
203 | _end = . ; | ||
204 | } | ||
205 | |||
206 | /* Sections to be discarded */ | ||
207 | /DISCARD/ : { | ||
208 | *(.exitcall.exit) | ||
209 | *(.discard) | ||
210 | } | ||
211 | |||
212 | STABS_DEBUG | ||
213 | |||
214 | DWARF_DEBUG | ||
215 | } | ||
216 | |||
217 | /* | ||
218 | * Build-time check on the image size: | ||
219 | */ | ||
220 | ASSERT((_end - LOAD_OFFSET <= KERNEL_IMAGE_SIZE), | ||
221 | "kernel image bigger than KERNEL_IMAGE_SIZE") | ||
222 | |||
223 | #ifdef CONFIG_KEXEC | ||
224 | /* Link time checks */ | ||
225 | #include <asm/kexec.h> | ||
226 | |||
227 | ASSERT(kexec_control_code_size <= KEXEC_CONTROL_CODE_MAX_SIZE, | ||
228 | "kexec control code size is too big") | ||
229 | #endif | ||
diff --git a/arch/x86/kernel/vmlinux_64.lds.S b/arch/x86/kernel/vmlinux_64.lds.S deleted file mode 100644 index c8742507b030..000000000000 --- a/arch/x86/kernel/vmlinux_64.lds.S +++ /dev/null | |||
@@ -1,298 +0,0 @@ | |||
1 | /* ld script to make x86-64 Linux kernel | ||
2 | * Written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>; | ||
3 | */ | ||
4 | |||
5 | #define LOAD_OFFSET __START_KERNEL_map | ||
6 | |||
7 | #include <asm-generic/vmlinux.lds.h> | ||
8 | #include <asm/asm-offsets.h> | ||
9 | #include <asm/page_types.h> | ||
10 | |||
11 | #undef i386 /* in case the preprocessor is a 32bit one */ | ||
12 | |||
13 | OUTPUT_FORMAT("elf64-x86-64", "elf64-x86-64", "elf64-x86-64") | ||
14 | OUTPUT_ARCH(i386:x86-64) | ||
15 | ENTRY(phys_startup_64) | ||
16 | jiffies_64 = jiffies; | ||
17 | PHDRS { | ||
18 | text PT_LOAD FLAGS(5); /* R_E */ | ||
19 | data PT_LOAD FLAGS(7); /* RWE */ | ||
20 | user PT_LOAD FLAGS(7); /* RWE */ | ||
21 | data.init PT_LOAD FLAGS(7); /* RWE */ | ||
22 | #ifdef CONFIG_SMP | ||
23 | percpu PT_LOAD FLAGS(7); /* RWE */ | ||
24 | #endif | ||
25 | data.init2 PT_LOAD FLAGS(7); /* RWE */ | ||
26 | note PT_NOTE FLAGS(0); /* ___ */ | ||
27 | } | ||
28 | SECTIONS | ||
29 | { | ||
30 | . = __START_KERNEL; | ||
31 | phys_startup_64 = startup_64 - LOAD_OFFSET; | ||
32 | .text : AT(ADDR(.text) - LOAD_OFFSET) { | ||
33 | _text = .; /* Text and read-only data */ | ||
34 | /* First the code that has to be first for bootstrapping */ | ||
35 | *(.text.head) | ||
36 | _stext = .; | ||
37 | /* Then the rest */ | ||
38 | TEXT_TEXT | ||
39 | SCHED_TEXT | ||
40 | LOCK_TEXT | ||
41 | KPROBES_TEXT | ||
42 | IRQENTRY_TEXT | ||
43 | *(.fixup) | ||
44 | *(.gnu.warning) | ||
45 | _etext = .; /* End of text section */ | ||
46 | } :text = 0x9090 | ||
47 | |||
48 | NOTES :text :note | ||
49 | |||
50 | . = ALIGN(16); /* Exception table */ | ||
51 | __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) { | ||
52 | __start___ex_table = .; | ||
53 | *(__ex_table) | ||
54 | __stop___ex_table = .; | ||
55 | } :text = 0x9090 | ||
56 | |||
57 | RODATA | ||
58 | |||
59 | . = ALIGN(PAGE_SIZE); /* Align data segment to page size boundary */ | ||
60 | /* Data */ | ||
61 | .data : AT(ADDR(.data) - LOAD_OFFSET) { | ||
62 | DATA_DATA | ||
63 | CONSTRUCTORS | ||
64 | _edata = .; /* End of data section */ | ||
65 | } :data | ||
66 | |||
67 | |||
68 | .data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET) { | ||
69 | . = ALIGN(PAGE_SIZE); | ||
70 | . = ALIGN(CONFIG_X86_L1_CACHE_BYTES); | ||
71 | *(.data.cacheline_aligned) | ||
72 | } | ||
73 | . = ALIGN(CONFIG_X86_INTERNODE_CACHE_BYTES); | ||
74 | .data.read_mostly : AT(ADDR(.data.read_mostly) - LOAD_OFFSET) { | ||
75 | *(.data.read_mostly) | ||
76 | } | ||
77 | |||
78 | #define VSYSCALL_ADDR (-10*1024*1024) | ||
79 | #define VSYSCALL_PHYS_ADDR ((LOADADDR(.data.read_mostly) + SIZEOF(.data.read_mostly) + 4095) & ~(4095)) | ||
80 | #define VSYSCALL_VIRT_ADDR ((ADDR(.data.read_mostly) + SIZEOF(.data.read_mostly) + 4095) & ~(4095)) | ||
81 | |||
82 | #define VLOAD_OFFSET (VSYSCALL_ADDR - VSYSCALL_PHYS_ADDR) | ||
83 | #define VLOAD(x) (ADDR(x) - VLOAD_OFFSET) | ||
84 | |||
85 | #define VVIRT_OFFSET (VSYSCALL_ADDR - VSYSCALL_VIRT_ADDR) | ||
86 | #define VVIRT(x) (ADDR(x) - VVIRT_OFFSET) | ||
87 | |||
88 | . = VSYSCALL_ADDR; | ||
89 | .vsyscall_0 : AT(VSYSCALL_PHYS_ADDR) { *(.vsyscall_0) } :user | ||
90 | __vsyscall_0 = VSYSCALL_VIRT_ADDR; | ||
91 | |||
92 | . = ALIGN(CONFIG_X86_L1_CACHE_BYTES); | ||
93 | .vsyscall_fn : AT(VLOAD(.vsyscall_fn)) { *(.vsyscall_fn) } | ||
94 | . = ALIGN(CONFIG_X86_L1_CACHE_BYTES); | ||
95 | .vsyscall_gtod_data : AT(VLOAD(.vsyscall_gtod_data)) | ||
96 | { *(.vsyscall_gtod_data) } | ||
97 | vsyscall_gtod_data = VVIRT(.vsyscall_gtod_data); | ||
98 | .vsyscall_clock : AT(VLOAD(.vsyscall_clock)) | ||
99 | { *(.vsyscall_clock) } | ||
100 | vsyscall_clock = VVIRT(.vsyscall_clock); | ||
101 | |||
102 | |||
103 | .vsyscall_1 ADDR(.vsyscall_0) + 1024: AT(VLOAD(.vsyscall_1)) | ||
104 | { *(.vsyscall_1) } | ||
105 | .vsyscall_2 ADDR(.vsyscall_0) + 2048: AT(VLOAD(.vsyscall_2)) | ||
106 | { *(.vsyscall_2) } | ||
107 | |||
108 | .vgetcpu_mode : AT(VLOAD(.vgetcpu_mode)) { *(.vgetcpu_mode) } | ||
109 | vgetcpu_mode = VVIRT(.vgetcpu_mode); | ||
110 | |||
111 | . = ALIGN(CONFIG_X86_L1_CACHE_BYTES); | ||
112 | .jiffies : AT(VLOAD(.jiffies)) { *(.jiffies) } | ||
113 | jiffies = VVIRT(.jiffies); | ||
114 | |||
115 | .vsyscall_3 ADDR(.vsyscall_0) + 3072: AT(VLOAD(.vsyscall_3)) | ||
116 | { *(.vsyscall_3) } | ||
117 | |||
118 | . = VSYSCALL_VIRT_ADDR + PAGE_SIZE; | ||
119 | |||
120 | #undef VSYSCALL_ADDR | ||
121 | #undef VSYSCALL_PHYS_ADDR | ||
122 | #undef VSYSCALL_VIRT_ADDR | ||
123 | #undef VLOAD_OFFSET | ||
124 | #undef VLOAD | ||
125 | #undef VVIRT_OFFSET | ||
126 | #undef VVIRT | ||
127 | |||
128 | .data.init_task : AT(ADDR(.data.init_task) - LOAD_OFFSET) { | ||
129 | . = ALIGN(THREAD_SIZE); /* init_task */ | ||
130 | *(.data.init_task) | ||
131 | }:data.init | ||
132 | |||
133 | .data.page_aligned : AT(ADDR(.data.page_aligned) - LOAD_OFFSET) { | ||
134 | . = ALIGN(PAGE_SIZE); | ||
135 | *(.data.page_aligned) | ||
136 | } | ||
137 | |||
138 | .smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) { | ||
139 | /* might get freed after init */ | ||
140 | . = ALIGN(PAGE_SIZE); | ||
141 | __smp_alt_begin = .; | ||
142 | __smp_locks = .; | ||
143 | *(.smp_locks) | ||
144 | __smp_locks_end = .; | ||
145 | . = ALIGN(PAGE_SIZE); | ||
146 | __smp_alt_end = .; | ||
147 | } | ||
148 | |||
149 | . = ALIGN(PAGE_SIZE); /* Init code and data */ | ||
150 | __init_begin = .; /* paired with __init_end */ | ||
151 | .init.text : AT(ADDR(.init.text) - LOAD_OFFSET) { | ||
152 | _sinittext = .; | ||
153 | INIT_TEXT | ||
154 | _einittext = .; | ||
155 | } | ||
156 | .init.data : AT(ADDR(.init.data) - LOAD_OFFSET) { | ||
157 | __initdata_begin = .; | ||
158 | INIT_DATA | ||
159 | __initdata_end = .; | ||
160 | } | ||
161 | |||
162 | .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) { | ||
163 | . = ALIGN(16); | ||
164 | __setup_start = .; | ||
165 | *(.init.setup) | ||
166 | __setup_end = .; | ||
167 | } | ||
168 | .initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET) { | ||
169 | __initcall_start = .; | ||
170 | INITCALLS | ||
171 | __initcall_end = .; | ||
172 | } | ||
173 | .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET) { | ||
174 | __con_initcall_start = .; | ||
175 | *(.con_initcall.init) | ||
176 | __con_initcall_end = .; | ||
177 | } | ||
178 | .x86_cpu_dev.init : AT(ADDR(.x86_cpu_dev.init) - LOAD_OFFSET) { | ||
179 | __x86_cpu_dev_start = .; | ||
180 | *(.x86_cpu_dev.init) | ||
181 | __x86_cpu_dev_end = .; | ||
182 | } | ||
183 | SECURITY_INIT | ||
184 | |||
185 | . = ALIGN(8); | ||
186 | .parainstructions : AT(ADDR(.parainstructions) - LOAD_OFFSET) { | ||
187 | __parainstructions = .; | ||
188 | *(.parainstructions) | ||
189 | __parainstructions_end = .; | ||
190 | } | ||
191 | |||
192 | .altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) { | ||
193 | . = ALIGN(8); | ||
194 | __alt_instructions = .; | ||
195 | *(.altinstructions) | ||
196 | __alt_instructions_end = .; | ||
197 | } | ||
198 | .altinstr_replacement : AT(ADDR(.altinstr_replacement) - LOAD_OFFSET) { | ||
199 | *(.altinstr_replacement) | ||
200 | } | ||
201 | /* .exit.text is discard at runtime, not link time, to deal with references | ||
202 | from .altinstructions and .eh_frame */ | ||
203 | .exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) { | ||
204 | EXIT_TEXT | ||
205 | } | ||
206 | .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) { | ||
207 | EXIT_DATA | ||
208 | } | ||
209 | |||
210 | #ifdef CONFIG_BLK_DEV_INITRD | ||
211 | . = ALIGN(PAGE_SIZE); | ||
212 | .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) { | ||
213 | __initramfs_start = .; | ||
214 | *(.init.ramfs) | ||
215 | __initramfs_end = .; | ||
216 | } | ||
217 | #endif | ||
218 | |||
219 | #ifdef CONFIG_SMP | ||
220 | /* | ||
221 | * percpu offsets are zero-based on SMP. PERCPU_VADDR() changes the | ||
222 | * output PHDR, so the next output section - __data_nosave - should | ||
223 | * start another section data.init2. Also, pda should be at the head of | ||
224 | * percpu area. Preallocate it and define the percpu offset symbol | ||
225 | * so that it can be accessed as a percpu variable. | ||
226 | */ | ||
227 | . = ALIGN(PAGE_SIZE); | ||
228 | PERCPU_VADDR(0, :percpu) | ||
229 | #else | ||
230 | PERCPU(PAGE_SIZE) | ||
231 | #endif | ||
232 | |||
233 | . = ALIGN(PAGE_SIZE); | ||
234 | __init_end = .; | ||
235 | |||
236 | .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) { | ||
237 | . = ALIGN(PAGE_SIZE); | ||
238 | __nosave_begin = .; | ||
239 | *(.data.nosave) | ||
240 | . = ALIGN(PAGE_SIZE); | ||
241 | __nosave_end = .; | ||
242 | } :data.init2 /* use another section data.init2, see PERCPU_VADDR() above */ | ||
243 | |||
244 | .bss : AT(ADDR(.bss) - LOAD_OFFSET) { | ||
245 | . = ALIGN(PAGE_SIZE); | ||
246 | __bss_start = .; /* BSS */ | ||
247 | *(.bss.page_aligned) | ||
248 | *(.bss) | ||
249 | __bss_stop = .; | ||
250 | } | ||
251 | |||
252 | .brk : AT(ADDR(.brk) - LOAD_OFFSET) { | ||
253 | . = ALIGN(PAGE_SIZE); | ||
254 | __brk_base = . ; | ||
255 | . += 64 * 1024 ; /* 64k alignment slop space */ | ||
256 | *(.brk_reservation) /* areas brk users have reserved */ | ||
257 | __brk_limit = . ; | ||
258 | } | ||
259 | |||
260 | _end = . ; | ||
261 | |||
262 | /* Sections to be discarded */ | ||
263 | /DISCARD/ : { | ||
264 | *(.exitcall.exit) | ||
265 | *(.eh_frame) | ||
266 | *(.discard) | ||
267 | } | ||
268 | |||
269 | STABS_DEBUG | ||
270 | |||
271 | DWARF_DEBUG | ||
272 | } | ||
273 | |||
274 | /* | ||
275 | * Per-cpu symbols which need to be offset from __per_cpu_load | ||
276 | * for the boot processor. | ||
277 | */ | ||
278 | #define INIT_PER_CPU(x) init_per_cpu__##x = per_cpu__##x + __per_cpu_load | ||
279 | INIT_PER_CPU(gdt_page); | ||
280 | INIT_PER_CPU(irq_stack_union); | ||
281 | |||
282 | /* | ||
283 | * Build-time check on the image size: | ||
284 | */ | ||
285 | ASSERT((_end - _text <= KERNEL_IMAGE_SIZE), | ||
286 | "kernel image bigger than KERNEL_IMAGE_SIZE") | ||
287 | |||
288 | #ifdef CONFIG_SMP | ||
289 | ASSERT((per_cpu__irq_stack_union == 0), | ||
290 | "irq_stack_union is not at start of per-cpu area"); | ||
291 | #endif | ||
292 | |||
293 | #ifdef CONFIG_KEXEC | ||
294 | #include <asm/kexec.h> | ||
295 | |||
296 | ASSERT(kexec_control_code_size <= KEXEC_CONTROL_CODE_MAX_SIZE, | ||
297 | "kexec control code size is too big") | ||
298 | #endif | ||
diff --git a/arch/x86/kernel/vsyscall_64.c b/arch/x86/kernel/vsyscall_64.c index 44153afc9067..25ee06a80aad 100644 --- a/arch/x86/kernel/vsyscall_64.c +++ b/arch/x86/kernel/vsyscall_64.c | |||
@@ -132,15 +132,7 @@ static __always_inline void do_vgettimeofday(struct timeval * tv) | |||
132 | return; | 132 | return; |
133 | } | 133 | } |
134 | 134 | ||
135 | /* | ||
136 | * Surround the RDTSC by barriers, to make sure it's not | ||
137 | * speculated to outside the seqlock critical section and | ||
138 | * does not cause time warps: | ||
139 | */ | ||
140 | rdtsc_barrier(); | ||
141 | now = vread(); | 135 | now = vread(); |
142 | rdtsc_barrier(); | ||
143 | |||
144 | base = __vsyscall_gtod_data.clock.cycle_last; | 136 | base = __vsyscall_gtod_data.clock.cycle_last; |
145 | mask = __vsyscall_gtod_data.clock.mask; | 137 | mask = __vsyscall_gtod_data.clock.mask; |
146 | mult = __vsyscall_gtod_data.clock.mult; | 138 | mult = __vsyscall_gtod_data.clock.mult; |
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c index 33a93b417396..4e0c26559395 100644 --- a/arch/x86/lguest/boot.c +++ b/arch/x86/lguest/boot.c | |||
@@ -167,10 +167,16 @@ static void lazy_hcall3(unsigned long call, | |||
167 | 167 | ||
168 | /* When lazy mode is turned off reset the per-cpu lazy mode variable and then | 168 | /* When lazy mode is turned off reset the per-cpu lazy mode variable and then |
169 | * issue the do-nothing hypercall to flush any stored calls. */ | 169 | * issue the do-nothing hypercall to flush any stored calls. */ |
170 | static void lguest_leave_lazy_mode(void) | 170 | static void lguest_leave_lazy_mmu_mode(void) |
171 | { | 171 | { |
172 | paravirt_leave_lazy(paravirt_get_lazy_mode()); | ||
173 | kvm_hypercall0(LHCALL_FLUSH_ASYNC); | 172 | kvm_hypercall0(LHCALL_FLUSH_ASYNC); |
173 | paravirt_leave_lazy_mmu(); | ||
174 | } | ||
175 | |||
176 | static void lguest_end_context_switch(struct task_struct *next) | ||
177 | { | ||
178 | kvm_hypercall0(LHCALL_FLUSH_ASYNC); | ||
179 | paravirt_end_context_switch(next); | ||
174 | } | 180 | } |
175 | 181 | ||
176 | /*G:033 | 182 | /*G:033 |
@@ -637,7 +643,7 @@ static void __init lguest_init_IRQ(void) | |||
637 | 643 | ||
638 | void lguest_setup_irq(unsigned int irq) | 644 | void lguest_setup_irq(unsigned int irq) |
639 | { | 645 | { |
640 | irq_to_desc_alloc_cpu(irq, 0); | 646 | irq_to_desc_alloc_node(irq, 0); |
641 | set_irq_chip_and_handler_name(irq, &lguest_irq_controller, | 647 | set_irq_chip_and_handler_name(irq, &lguest_irq_controller, |
642 | handle_level_irq, "level"); | 648 | handle_level_irq, "level"); |
643 | } | 649 | } |
@@ -1054,8 +1060,8 @@ __init void lguest_init(void) | |||
1054 | pv_cpu_ops.write_gdt_entry = lguest_write_gdt_entry; | 1060 | pv_cpu_ops.write_gdt_entry = lguest_write_gdt_entry; |
1055 | pv_cpu_ops.write_idt_entry = lguest_write_idt_entry; | 1061 | pv_cpu_ops.write_idt_entry = lguest_write_idt_entry; |
1056 | pv_cpu_ops.wbinvd = lguest_wbinvd; | 1062 | pv_cpu_ops.wbinvd = lguest_wbinvd; |
1057 | pv_cpu_ops.lazy_mode.enter = paravirt_enter_lazy_cpu; | 1063 | pv_cpu_ops.start_context_switch = paravirt_start_context_switch; |
1058 | pv_cpu_ops.lazy_mode.leave = lguest_leave_lazy_mode; | 1064 | pv_cpu_ops.end_context_switch = lguest_end_context_switch; |
1059 | 1065 | ||
1060 | /* pagetable management */ | 1066 | /* pagetable management */ |
1061 | pv_mmu_ops.write_cr3 = lguest_write_cr3; | 1067 | pv_mmu_ops.write_cr3 = lguest_write_cr3; |
@@ -1068,7 +1074,7 @@ __init void lguest_init(void) | |||
1068 | pv_mmu_ops.read_cr2 = lguest_read_cr2; | 1074 | pv_mmu_ops.read_cr2 = lguest_read_cr2; |
1069 | pv_mmu_ops.read_cr3 = lguest_read_cr3; | 1075 | pv_mmu_ops.read_cr3 = lguest_read_cr3; |
1070 | pv_mmu_ops.lazy_mode.enter = paravirt_enter_lazy_mmu; | 1076 | pv_mmu_ops.lazy_mode.enter = paravirt_enter_lazy_mmu; |
1071 | pv_mmu_ops.lazy_mode.leave = lguest_leave_lazy_mode; | 1077 | pv_mmu_ops.lazy_mode.leave = lguest_leave_lazy_mmu_mode; |
1072 | pv_mmu_ops.pte_update = lguest_pte_update; | 1078 | pv_mmu_ops.pte_update = lguest_pte_update; |
1073 | pv_mmu_ops.pte_update_defer = lguest_pte_update; | 1079 | pv_mmu_ops.pte_update_defer = lguest_pte_update; |
1074 | 1080 | ||
diff --git a/arch/x86/mm/dump_pagetables.c b/arch/x86/mm/dump_pagetables.c index e7277cbcfb40..a725b7f760ae 100644 --- a/arch/x86/mm/dump_pagetables.c +++ b/arch/x86/mm/dump_pagetables.c | |||
@@ -161,13 +161,14 @@ static void note_page(struct seq_file *m, struct pg_state *st, | |||
161 | st->current_address >= st->marker[1].start_address) { | 161 | st->current_address >= st->marker[1].start_address) { |
162 | const char *unit = units; | 162 | const char *unit = units; |
163 | unsigned long delta; | 163 | unsigned long delta; |
164 | int width = sizeof(unsigned long) * 2; | ||
164 | 165 | ||
165 | /* | 166 | /* |
166 | * Now print the actual finished series | 167 | * Now print the actual finished series |
167 | */ | 168 | */ |
168 | seq_printf(m, "0x%p-0x%p ", | 169 | seq_printf(m, "0x%0*lx-0x%0*lx ", |
169 | (void *)st->start_address, | 170 | width, st->start_address, |
170 | (void *)st->current_address); | 171 | width, st->current_address); |
171 | 172 | ||
172 | delta = (st->current_address - st->start_address) >> 10; | 173 | delta = (st->current_address - st->start_address) >> 10; |
173 | while (!(delta & 1023) && unit[1]) { | 174 | while (!(delta & 1023) && unit[1]) { |
diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c index 5c6d816f30b4..c6acc6326374 100644 --- a/arch/x86/mm/fault.c +++ b/arch/x86/mm/fault.c | |||
@@ -3,41 +3,17 @@ | |||
3 | * Copyright (C) 2001, 2002 Andi Kleen, SuSE Labs. | 3 | * Copyright (C) 2001, 2002 Andi Kleen, SuSE Labs. |
4 | * Copyright (C) 2008-2009, Red Hat Inc., Ingo Molnar | 4 | * Copyright (C) 2008-2009, Red Hat Inc., Ingo Molnar |
5 | */ | 5 | */ |
6 | #include <linux/interrupt.h> | 6 | #include <linux/magic.h> /* STACK_END_MAGIC */ |
7 | #include <linux/mmiotrace.h> | 7 | #include <linux/sched.h> /* test_thread_flag(), ... */ |
8 | #include <linux/bootmem.h> | 8 | #include <linux/kdebug.h> /* oops_begin/end, ... */ |
9 | #include <linux/compiler.h> | 9 | #include <linux/module.h> /* search_exception_table */ |
10 | #include <linux/highmem.h> | 10 | #include <linux/bootmem.h> /* max_low_pfn */ |
11 | #include <linux/kprobes.h> | 11 | #include <linux/kprobes.h> /* __kprobes, ... */ |
12 | #include <linux/uaccess.h> | 12 | #include <linux/mmiotrace.h> /* kmmio_handler, ... */ |
13 | #include <linux/vmalloc.h> | 13 | #include <linux/perf_counter.h> /* perf_swcounter_event */ |
14 | #include <linux/vt_kern.h> | 14 | |
15 | #include <linux/signal.h> | 15 | #include <asm/traps.h> /* dotraplinkage, ... */ |
16 | #include <linux/kernel.h> | 16 | #include <asm/pgalloc.h> /* pgd_*(), ... */ |
17 | #include <linux/ptrace.h> | ||
18 | #include <linux/string.h> | ||
19 | #include <linux/module.h> | ||
20 | #include <linux/kdebug.h> | ||
21 | #include <linux/errno.h> | ||
22 | #include <linux/magic.h> | ||
23 | #include <linux/sched.h> | ||
24 | #include <linux/types.h> | ||
25 | #include <linux/init.h> | ||
26 | #include <linux/mman.h> | ||
27 | #include <linux/tty.h> | ||
28 | #include <linux/smp.h> | ||
29 | #include <linux/mm.h> | ||
30 | #include <linux/perf_counter.h> | ||
31 | |||
32 | #include <asm-generic/sections.h> | ||
33 | |||
34 | #include <asm/tlbflush.h> | ||
35 | #include <asm/pgalloc.h> | ||
36 | #include <asm/segment.h> | ||
37 | #include <asm/system.h> | ||
38 | #include <asm/proto.h> | ||
39 | #include <asm/traps.h> | ||
40 | #include <asm/desc.h> | ||
41 | 17 | ||
42 | /* | 18 | /* |
43 | * Page fault error code bits: | 19 | * Page fault error code bits: |
@@ -226,12 +202,10 @@ static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address) | |||
226 | if (!pmd_present(*pmd_k)) | 202 | if (!pmd_present(*pmd_k)) |
227 | return NULL; | 203 | return NULL; |
228 | 204 | ||
229 | if (!pmd_present(*pmd)) { | 205 | if (!pmd_present(*pmd)) |
230 | set_pmd(pmd, *pmd_k); | 206 | set_pmd(pmd, *pmd_k); |
231 | arch_flush_lazy_mmu_mode(); | 207 | else |
232 | } else { | ||
233 | BUG_ON(pmd_page(*pmd) != pmd_page(*pmd_k)); | 208 | BUG_ON(pmd_page(*pmd) != pmd_page(*pmd_k)); |
234 | } | ||
235 | 209 | ||
236 | return pmd_k; | 210 | return pmd_k; |
237 | } | 211 | } |
@@ -539,8 +513,6 @@ bad: | |||
539 | static int is_errata93(struct pt_regs *regs, unsigned long address) | 513 | static int is_errata93(struct pt_regs *regs, unsigned long address) |
540 | { | 514 | { |
541 | #ifdef CONFIG_X86_64 | 515 | #ifdef CONFIG_X86_64 |
542 | static int once; | ||
543 | |||
544 | if (address != regs->ip) | 516 | if (address != regs->ip) |
545 | return 0; | 517 | return 0; |
546 | 518 | ||
@@ -550,10 +522,7 @@ static int is_errata93(struct pt_regs *regs, unsigned long address) | |||
550 | address |= 0xffffffffUL << 32; | 522 | address |= 0xffffffffUL << 32; |
551 | if ((address >= (u64)_stext && address <= (u64)_etext) || | 523 | if ((address >= (u64)_stext && address <= (u64)_etext) || |
552 | (address >= MODULES_VADDR && address <= MODULES_END)) { | 524 | (address >= MODULES_VADDR && address <= MODULES_END)) { |
553 | if (!once) { | 525 | printk_once(errata93_warning); |
554 | printk(errata93_warning); | ||
555 | once = 1; | ||
556 | } | ||
557 | regs->ip = address; | 526 | regs->ip = address; |
558 | return 1; | 527 | return 1; |
559 | } | 528 | } |
diff --git a/arch/x86/mm/highmem_32.c b/arch/x86/mm/highmem_32.c index 8126e8d1a2a4..58f621e81919 100644 --- a/arch/x86/mm/highmem_32.c +++ b/arch/x86/mm/highmem_32.c | |||
@@ -44,7 +44,6 @@ void *kmap_atomic_prot(struct page *page, enum km_type type, pgprot_t prot) | |||
44 | vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); | 44 | vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); |
45 | BUG_ON(!pte_none(*(kmap_pte-idx))); | 45 | BUG_ON(!pte_none(*(kmap_pte-idx))); |
46 | set_pte(kmap_pte-idx, mk_pte(page, prot)); | 46 | set_pte(kmap_pte-idx, mk_pte(page, prot)); |
47 | arch_flush_lazy_mmu_mode(); | ||
48 | 47 | ||
49 | return (void *)vaddr; | 48 | return (void *)vaddr; |
50 | } | 49 | } |
@@ -74,7 +73,6 @@ void kunmap_atomic(void *kvaddr, enum km_type type) | |||
74 | #endif | 73 | #endif |
75 | } | 74 | } |
76 | 75 | ||
77 | arch_flush_lazy_mmu_mode(); | ||
78 | pagefault_enable(); | 76 | pagefault_enable(); |
79 | } | 77 | } |
80 | 78 | ||
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c index ae4f7b5d7104..34c1bfb64f1c 100644 --- a/arch/x86/mm/init.c +++ b/arch/x86/mm/init.c | |||
@@ -1,3 +1,4 @@ | |||
1 | #include <linux/initrd.h> | ||
1 | #include <linux/ioport.h> | 2 | #include <linux/ioport.h> |
2 | #include <linux/swap.h> | 3 | #include <linux/swap.h> |
3 | 4 | ||
@@ -10,6 +11,9 @@ | |||
10 | #include <asm/setup.h> | 11 | #include <asm/setup.h> |
11 | #include <asm/system.h> | 12 | #include <asm/system.h> |
12 | #include <asm/tlbflush.h> | 13 | #include <asm/tlbflush.h> |
14 | #include <asm/tlb.h> | ||
15 | |||
16 | DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); | ||
13 | 17 | ||
14 | unsigned long __initdata e820_table_start; | 18 | unsigned long __initdata e820_table_start; |
15 | unsigned long __meminitdata e820_table_end; | 19 | unsigned long __meminitdata e820_table_end; |
@@ -23,6 +27,69 @@ int direct_gbpages | |||
23 | #endif | 27 | #endif |
24 | ; | 28 | ; |
25 | 29 | ||
30 | int nx_enabled; | ||
31 | |||
32 | #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) | ||
33 | static int disable_nx __cpuinitdata; | ||
34 | |||
35 | /* | ||
36 | * noexec = on|off | ||
37 | * | ||
38 | * Control non-executable mappings for processes. | ||
39 | * | ||
40 | * on Enable | ||
41 | * off Disable | ||
42 | */ | ||
43 | static int __init noexec_setup(char *str) | ||
44 | { | ||
45 | if (!str) | ||
46 | return -EINVAL; | ||
47 | if (!strncmp(str, "on", 2)) { | ||
48 | __supported_pte_mask |= _PAGE_NX; | ||
49 | disable_nx = 0; | ||
50 | } else if (!strncmp(str, "off", 3)) { | ||
51 | disable_nx = 1; | ||
52 | __supported_pte_mask &= ~_PAGE_NX; | ||
53 | } | ||
54 | return 0; | ||
55 | } | ||
56 | early_param("noexec", noexec_setup); | ||
57 | #endif | ||
58 | |||
59 | #ifdef CONFIG_X86_PAE | ||
60 | static void __init set_nx(void) | ||
61 | { | ||
62 | unsigned int v[4], l, h; | ||
63 | |||
64 | if (cpu_has_pae && (cpuid_eax(0x80000000) > 0x80000001)) { | ||
65 | cpuid(0x80000001, &v[0], &v[1], &v[2], &v[3]); | ||
66 | |||
67 | if ((v[3] & (1 << 20)) && !disable_nx) { | ||
68 | rdmsr(MSR_EFER, l, h); | ||
69 | l |= EFER_NX; | ||
70 | wrmsr(MSR_EFER, l, h); | ||
71 | nx_enabled = 1; | ||
72 | __supported_pte_mask |= _PAGE_NX; | ||
73 | } | ||
74 | } | ||
75 | } | ||
76 | #else | ||
77 | static inline void set_nx(void) | ||
78 | { | ||
79 | } | ||
80 | #endif | ||
81 | |||
82 | #ifdef CONFIG_X86_64 | ||
83 | void __cpuinit check_efer(void) | ||
84 | { | ||
85 | unsigned long efer; | ||
86 | |||
87 | rdmsrl(MSR_EFER, efer); | ||
88 | if (!(efer & EFER_NX) || disable_nx) | ||
89 | __supported_pte_mask &= ~_PAGE_NX; | ||
90 | } | ||
91 | #endif | ||
92 | |||
26 | static void __init find_early_table_space(unsigned long end, int use_pse, | 93 | static void __init find_early_table_space(unsigned long end, int use_pse, |
27 | int use_gbpages) | 94 | int use_gbpages) |
28 | { | 95 | { |
@@ -66,12 +133,11 @@ static void __init find_early_table_space(unsigned long end, int use_pse, | |||
66 | */ | 133 | */ |
67 | #ifdef CONFIG_X86_32 | 134 | #ifdef CONFIG_X86_32 |
68 | start = 0x7000; | 135 | start = 0x7000; |
69 | e820_table_start = find_e820_area(start, max_pfn_mapped<<PAGE_SHIFT, | 136 | #else |
70 | tables, PAGE_SIZE); | ||
71 | #else /* CONFIG_X86_64 */ | ||
72 | start = 0x8000; | 137 | start = 0x8000; |
73 | e820_table_start = find_e820_area(start, end, tables, PAGE_SIZE); | ||
74 | #endif | 138 | #endif |
139 | e820_table_start = find_e820_area(start, max_pfn_mapped<<PAGE_SHIFT, | ||
140 | tables, PAGE_SIZE); | ||
75 | if (e820_table_start == -1UL) | 141 | if (e820_table_start == -1UL) |
76 | panic("Cannot find space for the kernel page tables"); | 142 | panic("Cannot find space for the kernel page tables"); |
77 | 143 | ||
@@ -159,12 +225,9 @@ unsigned long __init_refok init_memory_mapping(unsigned long start, | |||
159 | use_gbpages = direct_gbpages; | 225 | use_gbpages = direct_gbpages; |
160 | #endif | 226 | #endif |
161 | 227 | ||
162 | #ifdef CONFIG_X86_32 | ||
163 | #ifdef CONFIG_X86_PAE | ||
164 | set_nx(); | 228 | set_nx(); |
165 | if (nx_enabled) | 229 | if (nx_enabled) |
166 | printk(KERN_INFO "NX (Execute Disable) protection: active\n"); | 230 | printk(KERN_INFO "NX (Execute Disable) protection: active\n"); |
167 | #endif | ||
168 | 231 | ||
169 | /* Enable PSE if available */ | 232 | /* Enable PSE if available */ |
170 | if (cpu_has_pse) | 233 | if (cpu_has_pse) |
@@ -175,7 +238,6 @@ unsigned long __init_refok init_memory_mapping(unsigned long start, | |||
175 | set_in_cr4(X86_CR4_PGE); | 238 | set_in_cr4(X86_CR4_PGE); |
176 | __supported_pte_mask |= _PAGE_GLOBAL; | 239 | __supported_pte_mask |= _PAGE_GLOBAL; |
177 | } | 240 | } |
178 | #endif | ||
179 | 241 | ||
180 | if (use_gbpages) | 242 | if (use_gbpages) |
181 | page_size_mask |= 1 << PG_LEVEL_1G; | 243 | page_size_mask |= 1 << PG_LEVEL_1G; |
diff --git a/arch/x86/mm/init_32.c b/arch/x86/mm/init_32.c index 749559ed80f5..949708d7a481 100644 --- a/arch/x86/mm/init_32.c +++ b/arch/x86/mm/init_32.c | |||
@@ -49,12 +49,9 @@ | |||
49 | #include <asm/paravirt.h> | 49 | #include <asm/paravirt.h> |
50 | #include <asm/setup.h> | 50 | #include <asm/setup.h> |
51 | #include <asm/cacheflush.h> | 51 | #include <asm/cacheflush.h> |
52 | #include <asm/page_types.h> | ||
52 | #include <asm/init.h> | 53 | #include <asm/init.h> |
53 | 54 | ||
54 | unsigned long max_low_pfn_mapped; | ||
55 | unsigned long max_pfn_mapped; | ||
56 | |||
57 | DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); | ||
58 | unsigned long highstart_pfn, highend_pfn; | 55 | unsigned long highstart_pfn, highend_pfn; |
59 | 56 | ||
60 | static noinline int do_test_wp_bit(void); | 57 | static noinline int do_test_wp_bit(void); |
@@ -587,61 +584,9 @@ void zap_low_mappings(void) | |||
587 | flush_tlb_all(); | 584 | flush_tlb_all(); |
588 | } | 585 | } |
589 | 586 | ||
590 | int nx_enabled; | ||
591 | |||
592 | pteval_t __supported_pte_mask __read_mostly = ~(_PAGE_NX | _PAGE_GLOBAL | _PAGE_IOMAP); | 587 | pteval_t __supported_pte_mask __read_mostly = ~(_PAGE_NX | _PAGE_GLOBAL | _PAGE_IOMAP); |
593 | EXPORT_SYMBOL_GPL(__supported_pte_mask); | 588 | EXPORT_SYMBOL_GPL(__supported_pte_mask); |
594 | 589 | ||
595 | #ifdef CONFIG_X86_PAE | ||
596 | |||
597 | static int disable_nx __initdata; | ||
598 | |||
599 | /* | ||
600 | * noexec = on|off | ||
601 | * | ||
602 | * Control non executable mappings. | ||
603 | * | ||
604 | * on Enable | ||
605 | * off Disable | ||
606 | */ | ||
607 | static int __init noexec_setup(char *str) | ||
608 | { | ||
609 | if (!str || !strcmp(str, "on")) { | ||
610 | if (cpu_has_nx) { | ||
611 | __supported_pte_mask |= _PAGE_NX; | ||
612 | disable_nx = 0; | ||
613 | } | ||
614 | } else { | ||
615 | if (!strcmp(str, "off")) { | ||
616 | disable_nx = 1; | ||
617 | __supported_pte_mask &= ~_PAGE_NX; | ||
618 | } else { | ||
619 | return -EINVAL; | ||
620 | } | ||
621 | } | ||
622 | |||
623 | return 0; | ||
624 | } | ||
625 | early_param("noexec", noexec_setup); | ||
626 | |||
627 | void __init set_nx(void) | ||
628 | { | ||
629 | unsigned int v[4], l, h; | ||
630 | |||
631 | if (cpu_has_pae && (cpuid_eax(0x80000000) > 0x80000001)) { | ||
632 | cpuid(0x80000001, &v[0], &v[1], &v[2], &v[3]); | ||
633 | |||
634 | if ((v[3] & (1 << 20)) && !disable_nx) { | ||
635 | rdmsr(MSR_EFER, l, h); | ||
636 | l |= EFER_NX; | ||
637 | wrmsr(MSR_EFER, l, h); | ||
638 | nx_enabled = 1; | ||
639 | __supported_pte_mask |= _PAGE_NX; | ||
640 | } | ||
641 | } | ||
642 | } | ||
643 | #endif | ||
644 | |||
645 | /* user-defined highmem size */ | 590 | /* user-defined highmem size */ |
646 | static unsigned int highmem_pages = -1; | 591 | static unsigned int highmem_pages = -1; |
647 | 592 | ||
@@ -761,15 +706,15 @@ void __init initmem_init(unsigned long start_pfn, | |||
761 | highstart_pfn = highend_pfn = max_pfn; | 706 | highstart_pfn = highend_pfn = max_pfn; |
762 | if (max_pfn > max_low_pfn) | 707 | if (max_pfn > max_low_pfn) |
763 | highstart_pfn = max_low_pfn; | 708 | highstart_pfn = max_low_pfn; |
764 | memory_present(0, 0, highend_pfn); | ||
765 | e820_register_active_regions(0, 0, highend_pfn); | 709 | e820_register_active_regions(0, 0, highend_pfn); |
710 | sparse_memory_present_with_active_regions(0); | ||
766 | printk(KERN_NOTICE "%ldMB HIGHMEM available.\n", | 711 | printk(KERN_NOTICE "%ldMB HIGHMEM available.\n", |
767 | pages_to_mb(highend_pfn - highstart_pfn)); | 712 | pages_to_mb(highend_pfn - highstart_pfn)); |
768 | num_physpages = highend_pfn; | 713 | num_physpages = highend_pfn; |
769 | high_memory = (void *) __va(highstart_pfn * PAGE_SIZE - 1) + 1; | 714 | high_memory = (void *) __va(highstart_pfn * PAGE_SIZE - 1) + 1; |
770 | #else | 715 | #else |
771 | memory_present(0, 0, max_low_pfn); | ||
772 | e820_register_active_regions(0, 0, max_low_pfn); | 716 | e820_register_active_regions(0, 0, max_low_pfn); |
717 | sparse_memory_present_with_active_regions(0); | ||
773 | num_physpages = max_low_pfn; | 718 | num_physpages = max_low_pfn; |
774 | high_memory = (void *) __va(max_low_pfn * PAGE_SIZE - 1) + 1; | 719 | high_memory = (void *) __va(max_low_pfn * PAGE_SIZE - 1) + 1; |
775 | #endif | 720 | #endif |
diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c index 1753e8020df6..52bb9519bb86 100644 --- a/arch/x86/mm/init_64.c +++ b/arch/x86/mm/init_64.c | |||
@@ -50,18 +50,8 @@ | |||
50 | #include <asm/cacheflush.h> | 50 | #include <asm/cacheflush.h> |
51 | #include <asm/init.h> | 51 | #include <asm/init.h> |
52 | 52 | ||
53 | /* | ||
54 | * end_pfn only includes RAM, while max_pfn_mapped includes all e820 entries. | ||
55 | * The direct mapping extends to max_pfn_mapped, so that we can directly access | ||
56 | * apertures, ACPI and other tables without having to play with fixmaps. | ||
57 | */ | ||
58 | unsigned long max_low_pfn_mapped; | ||
59 | unsigned long max_pfn_mapped; | ||
60 | |||
61 | static unsigned long dma_reserve __initdata; | 53 | static unsigned long dma_reserve __initdata; |
62 | 54 | ||
63 | DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); | ||
64 | |||
65 | static int __init parse_direct_gbpages_off(char *arg) | 55 | static int __init parse_direct_gbpages_off(char *arg) |
66 | { | 56 | { |
67 | direct_gbpages = 0; | 57 | direct_gbpages = 0; |
@@ -85,39 +75,6 @@ early_param("gbpages", parse_direct_gbpages_on); | |||
85 | pteval_t __supported_pte_mask __read_mostly = ~_PAGE_IOMAP; | 75 | pteval_t __supported_pte_mask __read_mostly = ~_PAGE_IOMAP; |
86 | EXPORT_SYMBOL_GPL(__supported_pte_mask); | 76 | EXPORT_SYMBOL_GPL(__supported_pte_mask); |
87 | 77 | ||
88 | static int disable_nx __cpuinitdata; | ||
89 | |||
90 | /* | ||
91 | * noexec=on|off | ||
92 | * Control non-executable mappings for 64-bit processes. | ||
93 | * | ||
94 | * on Enable (default) | ||
95 | * off Disable | ||
96 | */ | ||
97 | static int __init nonx_setup(char *str) | ||
98 | { | ||
99 | if (!str) | ||
100 | return -EINVAL; | ||
101 | if (!strncmp(str, "on", 2)) { | ||
102 | __supported_pte_mask |= _PAGE_NX; | ||
103 | disable_nx = 0; | ||
104 | } else if (!strncmp(str, "off", 3)) { | ||
105 | disable_nx = 1; | ||
106 | __supported_pte_mask &= ~_PAGE_NX; | ||
107 | } | ||
108 | return 0; | ||
109 | } | ||
110 | early_param("noexec", nonx_setup); | ||
111 | |||
112 | void __cpuinit check_efer(void) | ||
113 | { | ||
114 | unsigned long efer; | ||
115 | |||
116 | rdmsrl(MSR_EFER, efer); | ||
117 | if (!(efer & EFER_NX) || disable_nx) | ||
118 | __supported_pte_mask &= ~_PAGE_NX; | ||
119 | } | ||
120 | |||
121 | int force_personality32; | 78 | int force_personality32; |
122 | 79 | ||
123 | /* | 80 | /* |
@@ -628,6 +585,7 @@ void __init initmem_init(unsigned long start_pfn, unsigned long end_pfn) | |||
628 | early_res_to_bootmem(0, end_pfn<<PAGE_SHIFT); | 585 | early_res_to_bootmem(0, end_pfn<<PAGE_SHIFT); |
629 | reserve_bootmem(bootmap, bootmap_size, BOOTMEM_DEFAULT); | 586 | reserve_bootmem(bootmap, bootmap_size, BOOTMEM_DEFAULT); |
630 | } | 587 | } |
588 | #endif | ||
631 | 589 | ||
632 | void __init paging_init(void) | 590 | void __init paging_init(void) |
633 | { | 591 | { |
@@ -638,11 +596,10 @@ void __init paging_init(void) | |||
638 | max_zone_pfns[ZONE_DMA32] = MAX_DMA32_PFN; | 596 | max_zone_pfns[ZONE_DMA32] = MAX_DMA32_PFN; |
639 | max_zone_pfns[ZONE_NORMAL] = max_pfn; | 597 | max_zone_pfns[ZONE_NORMAL] = max_pfn; |
640 | 598 | ||
641 | memory_present(0, 0, max_pfn); | 599 | sparse_memory_present_with_active_regions(MAX_NUMNODES); |
642 | sparse_init(); | 600 | sparse_init(); |
643 | free_area_init_nodes(max_zone_pfns); | 601 | free_area_init_nodes(max_zone_pfns); |
644 | } | 602 | } |
645 | #endif | ||
646 | 603 | ||
647 | /* | 604 | /* |
648 | * Memory hotplug specific functions | 605 | * Memory hotplug specific functions |
diff --git a/arch/x86/mm/iomap_32.c b/arch/x86/mm/iomap_32.c index 8056545e2d39..fe6f84ca121e 100644 --- a/arch/x86/mm/iomap_32.c +++ b/arch/x86/mm/iomap_32.c | |||
@@ -82,7 +82,6 @@ iounmap_atomic(void *kvaddr, enum km_type type) | |||
82 | if (vaddr == __fix_to_virt(FIX_KMAP_BEGIN+idx)) | 82 | if (vaddr == __fix_to_virt(FIX_KMAP_BEGIN+idx)) |
83 | kpte_clear_flush(kmap_pte-idx, vaddr); | 83 | kpte_clear_flush(kmap_pte-idx, vaddr); |
84 | 84 | ||
85 | arch_flush_lazy_mmu_mode(); | ||
86 | pagefault_enable(); | 85 | pagefault_enable(); |
87 | } | 86 | } |
88 | EXPORT_SYMBOL_GPL(iounmap_atomic); | 87 | EXPORT_SYMBOL_GPL(iounmap_atomic); |
diff --git a/arch/x86/mm/kmmio.c b/arch/x86/mm/kmmio.c index 50dc802a1c46..16ccbd77917f 100644 --- a/arch/x86/mm/kmmio.c +++ b/arch/x86/mm/kmmio.c | |||
@@ -32,7 +32,7 @@ struct kmmio_fault_page { | |||
32 | struct list_head list; | 32 | struct list_head list; |
33 | struct kmmio_fault_page *release_next; | 33 | struct kmmio_fault_page *release_next; |
34 | unsigned long page; /* location of the fault page */ | 34 | unsigned long page; /* location of the fault page */ |
35 | bool old_presence; /* page presence prior to arming */ | 35 | pteval_t old_presence; /* page presence prior to arming */ |
36 | bool armed; | 36 | bool armed; |
37 | 37 | ||
38 | /* | 38 | /* |
@@ -97,60 +97,62 @@ static struct kmmio_probe *get_kmmio_probe(unsigned long addr) | |||
97 | static struct kmmio_fault_page *get_kmmio_fault_page(unsigned long page) | 97 | static struct kmmio_fault_page *get_kmmio_fault_page(unsigned long page) |
98 | { | 98 | { |
99 | struct list_head *head; | 99 | struct list_head *head; |
100 | struct kmmio_fault_page *p; | 100 | struct kmmio_fault_page *f; |
101 | 101 | ||
102 | page &= PAGE_MASK; | 102 | page &= PAGE_MASK; |
103 | head = kmmio_page_list(page); | 103 | head = kmmio_page_list(page); |
104 | list_for_each_entry_rcu(p, head, list) { | 104 | list_for_each_entry_rcu(f, head, list) { |
105 | if (p->page == page) | 105 | if (f->page == page) |
106 | return p; | 106 | return f; |
107 | } | 107 | } |
108 | return NULL; | 108 | return NULL; |
109 | } | 109 | } |
110 | 110 | ||
111 | static void set_pmd_presence(pmd_t *pmd, bool present, bool *old) | 111 | static void clear_pmd_presence(pmd_t *pmd, bool clear, pmdval_t *old) |
112 | { | 112 | { |
113 | pmdval_t v = pmd_val(*pmd); | 113 | pmdval_t v = pmd_val(*pmd); |
114 | *old = !!(v & _PAGE_PRESENT); | 114 | if (clear) { |
115 | v &= ~_PAGE_PRESENT; | 115 | *old = v & _PAGE_PRESENT; |
116 | if (present) | 116 | v &= ~_PAGE_PRESENT; |
117 | v |= _PAGE_PRESENT; | 117 | } else /* presume this has been called with clear==true previously */ |
118 | v |= *old; | ||
118 | set_pmd(pmd, __pmd(v)); | 119 | set_pmd(pmd, __pmd(v)); |
119 | } | 120 | } |
120 | 121 | ||
121 | static void set_pte_presence(pte_t *pte, bool present, bool *old) | 122 | static void clear_pte_presence(pte_t *pte, bool clear, pteval_t *old) |
122 | { | 123 | { |
123 | pteval_t v = pte_val(*pte); | 124 | pteval_t v = pte_val(*pte); |
124 | *old = !!(v & _PAGE_PRESENT); | 125 | if (clear) { |
125 | v &= ~_PAGE_PRESENT; | 126 | *old = v & _PAGE_PRESENT; |
126 | if (present) | 127 | v &= ~_PAGE_PRESENT; |
127 | v |= _PAGE_PRESENT; | 128 | } else /* presume this has been called with clear==true previously */ |
129 | v |= *old; | ||
128 | set_pte_atomic(pte, __pte(v)); | 130 | set_pte_atomic(pte, __pte(v)); |
129 | } | 131 | } |
130 | 132 | ||
131 | static int set_page_presence(unsigned long addr, bool present, bool *old) | 133 | static int clear_page_presence(struct kmmio_fault_page *f, bool clear) |
132 | { | 134 | { |
133 | unsigned int level; | 135 | unsigned int level; |
134 | pte_t *pte = lookup_address(addr, &level); | 136 | pte_t *pte = lookup_address(f->page, &level); |
135 | 137 | ||
136 | if (!pte) { | 138 | if (!pte) { |
137 | pr_err("kmmio: no pte for page 0x%08lx\n", addr); | 139 | pr_err("kmmio: no pte for page 0x%08lx\n", f->page); |
138 | return -1; | 140 | return -1; |
139 | } | 141 | } |
140 | 142 | ||
141 | switch (level) { | 143 | switch (level) { |
142 | case PG_LEVEL_2M: | 144 | case PG_LEVEL_2M: |
143 | set_pmd_presence((pmd_t *)pte, present, old); | 145 | clear_pmd_presence((pmd_t *)pte, clear, &f->old_presence); |
144 | break; | 146 | break; |
145 | case PG_LEVEL_4K: | 147 | case PG_LEVEL_4K: |
146 | set_pte_presence(pte, present, old); | 148 | clear_pte_presence(pte, clear, &f->old_presence); |
147 | break; | 149 | break; |
148 | default: | 150 | default: |
149 | pr_err("kmmio: unexpected page level 0x%x.\n", level); | 151 | pr_err("kmmio: unexpected page level 0x%x.\n", level); |
150 | return -1; | 152 | return -1; |
151 | } | 153 | } |
152 | 154 | ||
153 | __flush_tlb_one(addr); | 155 | __flush_tlb_one(f->page); |
154 | return 0; | 156 | return 0; |
155 | } | 157 | } |
156 | 158 | ||
@@ -171,9 +173,9 @@ static int arm_kmmio_fault_page(struct kmmio_fault_page *f) | |||
171 | WARN_ONCE(f->armed, KERN_ERR "kmmio page already armed.\n"); | 173 | WARN_ONCE(f->armed, KERN_ERR "kmmio page already armed.\n"); |
172 | if (f->armed) { | 174 | if (f->armed) { |
173 | pr_warning("kmmio double-arm: page 0x%08lx, ref %d, old %d\n", | 175 | pr_warning("kmmio double-arm: page 0x%08lx, ref %d, old %d\n", |
174 | f->page, f->count, f->old_presence); | 176 | f->page, f->count, !!f->old_presence); |
175 | } | 177 | } |
176 | ret = set_page_presence(f->page, false, &f->old_presence); | 178 | ret = clear_page_presence(f, true); |
177 | WARN_ONCE(ret < 0, KERN_ERR "kmmio arming 0x%08lx failed.\n", f->page); | 179 | WARN_ONCE(ret < 0, KERN_ERR "kmmio arming 0x%08lx failed.\n", f->page); |
178 | f->armed = true; | 180 | f->armed = true; |
179 | return ret; | 181 | return ret; |
@@ -182,8 +184,7 @@ static int arm_kmmio_fault_page(struct kmmio_fault_page *f) | |||
182 | /** Restore the given page to saved presence state. */ | 184 | /** Restore the given page to saved presence state. */ |
183 | static void disarm_kmmio_fault_page(struct kmmio_fault_page *f) | 185 | static void disarm_kmmio_fault_page(struct kmmio_fault_page *f) |
184 | { | 186 | { |
185 | bool tmp; | 187 | int ret = clear_page_presence(f, false); |
186 | int ret = set_page_presence(f->page, f->old_presence, &tmp); | ||
187 | WARN_ONCE(ret < 0, | 188 | WARN_ONCE(ret < 0, |
188 | KERN_ERR "kmmio disarming 0x%08lx failed.\n", f->page); | 189 | KERN_ERR "kmmio disarming 0x%08lx failed.\n", f->page); |
189 | f->armed = false; | 190 | f->armed = false; |
@@ -310,7 +311,12 @@ static int post_kmmio_handler(unsigned long condition, struct pt_regs *regs) | |||
310 | struct kmmio_context *ctx = &get_cpu_var(kmmio_ctx); | 311 | struct kmmio_context *ctx = &get_cpu_var(kmmio_ctx); |
311 | 312 | ||
312 | if (!ctx->active) { | 313 | if (!ctx->active) { |
313 | pr_debug("kmmio: spurious debug trap on CPU %d.\n", | 314 | /* |
315 | * debug traps without an active context are due to either | ||
316 | * something external causing them (f.e. using a debugger while | ||
317 | * mmio tracing enabled), or erroneous behaviour | ||
318 | */ | ||
319 | pr_warning("kmmio: unexpected debug trap on CPU %d.\n", | ||
314 | smp_processor_id()); | 320 | smp_processor_id()); |
315 | goto out; | 321 | goto out; |
316 | } | 322 | } |
@@ -439,12 +445,12 @@ static void rcu_free_kmmio_fault_pages(struct rcu_head *head) | |||
439 | head, | 445 | head, |
440 | struct kmmio_delayed_release, | 446 | struct kmmio_delayed_release, |
441 | rcu); | 447 | rcu); |
442 | struct kmmio_fault_page *p = dr->release_list; | 448 | struct kmmio_fault_page *f = dr->release_list; |
443 | while (p) { | 449 | while (f) { |
444 | struct kmmio_fault_page *next = p->release_next; | 450 | struct kmmio_fault_page *next = f->release_next; |
445 | BUG_ON(p->count); | 451 | BUG_ON(f->count); |
446 | kfree(p); | 452 | kfree(f); |
447 | p = next; | 453 | f = next; |
448 | } | 454 | } |
449 | kfree(dr); | 455 | kfree(dr); |
450 | } | 456 | } |
@@ -453,19 +459,19 @@ static void remove_kmmio_fault_pages(struct rcu_head *head) | |||
453 | { | 459 | { |
454 | struct kmmio_delayed_release *dr = | 460 | struct kmmio_delayed_release *dr = |
455 | container_of(head, struct kmmio_delayed_release, rcu); | 461 | container_of(head, struct kmmio_delayed_release, rcu); |
456 | struct kmmio_fault_page *p = dr->release_list; | 462 | struct kmmio_fault_page *f = dr->release_list; |
457 | struct kmmio_fault_page **prevp = &dr->release_list; | 463 | struct kmmio_fault_page **prevp = &dr->release_list; |
458 | unsigned long flags; | 464 | unsigned long flags; |
459 | 465 | ||
460 | spin_lock_irqsave(&kmmio_lock, flags); | 466 | spin_lock_irqsave(&kmmio_lock, flags); |
461 | while (p) { | 467 | while (f) { |
462 | if (!p->count) { | 468 | if (!f->count) { |
463 | list_del_rcu(&p->list); | 469 | list_del_rcu(&f->list); |
464 | prevp = &p->release_next; | 470 | prevp = &f->release_next; |
465 | } else { | 471 | } else { |
466 | *prevp = p->release_next; | 472 | *prevp = f->release_next; |
467 | } | 473 | } |
468 | p = p->release_next; | 474 | f = f->release_next; |
469 | } | 475 | } |
470 | spin_unlock_irqrestore(&kmmio_lock, flags); | 476 | spin_unlock_irqrestore(&kmmio_lock, flags); |
471 | 477 | ||
@@ -528,8 +534,8 @@ void unregister_kmmio_probe(struct kmmio_probe *p) | |||
528 | } | 534 | } |
529 | EXPORT_SYMBOL(unregister_kmmio_probe); | 535 | EXPORT_SYMBOL(unregister_kmmio_probe); |
530 | 536 | ||
531 | static int kmmio_die_notifier(struct notifier_block *nb, unsigned long val, | 537 | static int |
532 | void *args) | 538 | kmmio_die_notifier(struct notifier_block *nb, unsigned long val, void *args) |
533 | { | 539 | { |
534 | struct die_args *arg = args; | 540 | struct die_args *arg = args; |
535 | 541 | ||
@@ -544,11 +550,23 @@ static struct notifier_block nb_die = { | |||
544 | .notifier_call = kmmio_die_notifier | 550 | .notifier_call = kmmio_die_notifier |
545 | }; | 551 | }; |
546 | 552 | ||
547 | static int __init init_kmmio(void) | 553 | int kmmio_init(void) |
548 | { | 554 | { |
549 | int i; | 555 | int i; |
556 | |||
550 | for (i = 0; i < KMMIO_PAGE_TABLE_SIZE; i++) | 557 | for (i = 0; i < KMMIO_PAGE_TABLE_SIZE; i++) |
551 | INIT_LIST_HEAD(&kmmio_page_table[i]); | 558 | INIT_LIST_HEAD(&kmmio_page_table[i]); |
559 | |||
552 | return register_die_notifier(&nb_die); | 560 | return register_die_notifier(&nb_die); |
553 | } | 561 | } |
554 | fs_initcall(init_kmmio); /* should be before device_initcall() */ | 562 | |
563 | void kmmio_cleanup(void) | ||
564 | { | ||
565 | int i; | ||
566 | |||
567 | unregister_die_notifier(&nb_die); | ||
568 | for (i = 0; i < KMMIO_PAGE_TABLE_SIZE; i++) { | ||
569 | WARN_ONCE(!list_empty(&kmmio_page_table[i]), | ||
570 | KERN_ERR "kmmio_page_table not empty at cleanup, any further tracing will leak memory.\n"); | ||
571 | } | ||
572 | } | ||
diff --git a/arch/x86/mm/memtest.c b/arch/x86/mm/memtest.c index 605c8be06217..c0bedcd10f97 100644 --- a/arch/x86/mm/memtest.c +++ b/arch/x86/mm/memtest.c | |||
@@ -40,23 +40,23 @@ static void __init reserve_bad_mem(u64 pattern, u64 start_bad, u64 end_bad) | |||
40 | 40 | ||
41 | static void __init memtest(u64 pattern, u64 start_phys, u64 size) | 41 | static void __init memtest(u64 pattern, u64 start_phys, u64 size) |
42 | { | 42 | { |
43 | u64 i, count; | 43 | u64 *p; |
44 | u64 *start; | 44 | void *start, *end; |
45 | u64 start_bad, last_bad; | 45 | u64 start_bad, last_bad; |
46 | u64 start_phys_aligned; | 46 | u64 start_phys_aligned; |
47 | size_t incr; | 47 | size_t incr; |
48 | 48 | ||
49 | incr = sizeof(pattern); | 49 | incr = sizeof(pattern); |
50 | start_phys_aligned = ALIGN(start_phys, incr); | 50 | start_phys_aligned = ALIGN(start_phys, incr); |
51 | count = (size - (start_phys_aligned - start_phys))/incr; | ||
52 | start = __va(start_phys_aligned); | 51 | start = __va(start_phys_aligned); |
52 | end = start + size - (start_phys_aligned - start_phys); | ||
53 | start_bad = 0; | 53 | start_bad = 0; |
54 | last_bad = 0; | 54 | last_bad = 0; |
55 | 55 | ||
56 | for (i = 0; i < count; i++) | 56 | for (p = start; p < end; p++) |
57 | start[i] = pattern; | 57 | *p = pattern; |
58 | for (i = 0; i < count; i++, start++, start_phys_aligned += incr) { | 58 | for (p = start; p < end; p++, start_phys_aligned += incr) { |
59 | if (*start == pattern) | 59 | if (*p == pattern) |
60 | continue; | 60 | continue; |
61 | if (start_phys_aligned == last_bad + incr) { | 61 | if (start_phys_aligned == last_bad + incr) { |
62 | last_bad += incr; | 62 | last_bad += incr; |
diff --git a/arch/x86/mm/mmio-mod.c b/arch/x86/mm/mmio-mod.c index c9342ed8b402..132772a8ec57 100644 --- a/arch/x86/mm/mmio-mod.c +++ b/arch/x86/mm/mmio-mod.c | |||
@@ -451,6 +451,7 @@ void enable_mmiotrace(void) | |||
451 | 451 | ||
452 | if (nommiotrace) | 452 | if (nommiotrace) |
453 | pr_info(NAME "MMIO tracing disabled.\n"); | 453 | pr_info(NAME "MMIO tracing disabled.\n"); |
454 | kmmio_init(); | ||
454 | enter_uniprocessor(); | 455 | enter_uniprocessor(); |
455 | spin_lock_irq(&trace_lock); | 456 | spin_lock_irq(&trace_lock); |
456 | atomic_inc(&mmiotrace_enabled); | 457 | atomic_inc(&mmiotrace_enabled); |
@@ -473,6 +474,7 @@ void disable_mmiotrace(void) | |||
473 | 474 | ||
474 | clear_trace_list(); /* guarantees: no more kmmio callbacks */ | 475 | clear_trace_list(); /* guarantees: no more kmmio callbacks */ |
475 | leave_uniprocessor(); | 476 | leave_uniprocessor(); |
477 | kmmio_cleanup(); | ||
476 | pr_info(NAME "disabled.\n"); | 478 | pr_info(NAME "disabled.\n"); |
477 | out: | 479 | out: |
478 | mutex_unlock(&mmiotrace_mutex); | 480 | mutex_unlock(&mmiotrace_mutex); |
diff --git a/arch/x86/mm/numa_64.c b/arch/x86/mm/numa_64.c index 2d05a12029dc..459913beac71 100644 --- a/arch/x86/mm/numa_64.c +++ b/arch/x86/mm/numa_64.c | |||
@@ -179,18 +179,25 @@ static void * __init early_node_mem(int nodeid, unsigned long start, | |||
179 | } | 179 | } |
180 | 180 | ||
181 | /* Initialize bootmem allocator for a node */ | 181 | /* Initialize bootmem allocator for a node */ |
182 | void __init setup_node_bootmem(int nodeid, unsigned long start, | 182 | void __init |
183 | unsigned long end) | 183 | setup_node_bootmem(int nodeid, unsigned long start, unsigned long end) |
184 | { | 184 | { |
185 | unsigned long start_pfn, last_pfn, bootmap_pages, bootmap_size; | 185 | unsigned long start_pfn, last_pfn, bootmap_pages, bootmap_size; |
186 | const int pgdat_size = roundup(sizeof(pg_data_t), PAGE_SIZE); | ||
186 | unsigned long bootmap_start, nodedata_phys; | 187 | unsigned long bootmap_start, nodedata_phys; |
187 | void *bootmap; | 188 | void *bootmap; |
188 | const int pgdat_size = roundup(sizeof(pg_data_t), PAGE_SIZE); | ||
189 | int nid; | 189 | int nid; |
190 | 190 | ||
191 | if (!end) | 191 | if (!end) |
192 | return; | 192 | return; |
193 | 193 | ||
194 | /* | ||
195 | * Don't confuse VM with a node that doesn't have the | ||
196 | * minimum amount of memory: | ||
197 | */ | ||
198 | if (end && (end - start) < NODE_MIN_SIZE) | ||
199 | return; | ||
200 | |||
194 | start = roundup(start, ZONE_ALIGN); | 201 | start = roundup(start, ZONE_ALIGN); |
195 | 202 | ||
196 | printk(KERN_INFO "Bootmem setup node %d %016lx-%016lx\n", nodeid, | 203 | printk(KERN_INFO "Bootmem setup node %d %016lx-%016lx\n", nodeid, |
@@ -272,9 +279,6 @@ void __init setup_node_bootmem(int nodeid, unsigned long start, | |||
272 | reserve_bootmem_node(NODE_DATA(nodeid), bootmap_start, | 279 | reserve_bootmem_node(NODE_DATA(nodeid), bootmap_start, |
273 | bootmap_pages<<PAGE_SHIFT, BOOTMEM_DEFAULT); | 280 | bootmap_pages<<PAGE_SHIFT, BOOTMEM_DEFAULT); |
274 | 281 | ||
275 | #ifdef CONFIG_ACPI_NUMA | ||
276 | srat_reserve_add_area(nodeid); | ||
277 | #endif | ||
278 | node_set_online(nodeid); | 282 | node_set_online(nodeid); |
279 | } | 283 | } |
280 | 284 | ||
@@ -578,21 +582,6 @@ unsigned long __init numa_free_all_bootmem(void) | |||
578 | return pages; | 582 | return pages; |
579 | } | 583 | } |
580 | 584 | ||
581 | void __init paging_init(void) | ||
582 | { | ||
583 | unsigned long max_zone_pfns[MAX_NR_ZONES]; | ||
584 | |||
585 | memset(max_zone_pfns, 0, sizeof(max_zone_pfns)); | ||
586 | max_zone_pfns[ZONE_DMA] = MAX_DMA_PFN; | ||
587 | max_zone_pfns[ZONE_DMA32] = MAX_DMA32_PFN; | ||
588 | max_zone_pfns[ZONE_NORMAL] = max_pfn; | ||
589 | |||
590 | sparse_memory_present_with_active_regions(MAX_NUMNODES); | ||
591 | sparse_init(); | ||
592 | |||
593 | free_area_init_nodes(max_zone_pfns); | ||
594 | } | ||
595 | |||
596 | static __init int numa_setup(char *opt) | 585 | static __init int numa_setup(char *opt) |
597 | { | 586 | { |
598 | if (!opt) | 587 | if (!opt) |
@@ -606,8 +595,6 @@ static __init int numa_setup(char *opt) | |||
606 | #ifdef CONFIG_ACPI_NUMA | 595 | #ifdef CONFIG_ACPI_NUMA |
607 | if (!strncmp(opt, "noacpi", 6)) | 596 | if (!strncmp(opt, "noacpi", 6)) |
608 | acpi_numa = -1; | 597 | acpi_numa = -1; |
609 | if (!strncmp(opt, "hotadd=", 7)) | ||
610 | hotadd_percent = simple_strtoul(opt+7, NULL, 10); | ||
611 | #endif | 598 | #endif |
612 | return 0; | 599 | return 0; |
613 | } | 600 | } |
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c index e17efed088c5..6ce9518fe2ac 100644 --- a/arch/x86/mm/pageattr.c +++ b/arch/x86/mm/pageattr.c | |||
@@ -839,13 +839,6 @@ static int change_page_attr_set_clr(unsigned long *addr, int numpages, | |||
839 | 839 | ||
840 | vm_unmap_aliases(); | 840 | vm_unmap_aliases(); |
841 | 841 | ||
842 | /* | ||
843 | * If we're called with lazy mmu updates enabled, the | ||
844 | * in-memory pte state may be stale. Flush pending updates to | ||
845 | * bring them up to date. | ||
846 | */ | ||
847 | arch_flush_lazy_mmu_mode(); | ||
848 | |||
849 | cpa.vaddr = addr; | 842 | cpa.vaddr = addr; |
850 | cpa.pages = pages; | 843 | cpa.pages = pages; |
851 | cpa.numpages = numpages; | 844 | cpa.numpages = numpages; |
@@ -890,13 +883,6 @@ static int change_page_attr_set_clr(unsigned long *addr, int numpages, | |||
890 | } else | 883 | } else |
891 | cpa_flush_all(cache); | 884 | cpa_flush_all(cache); |
892 | 885 | ||
893 | /* | ||
894 | * If we've been called with lazy mmu updates enabled, then | ||
895 | * make sure that everything gets flushed out before we | ||
896 | * return. | ||
897 | */ | ||
898 | arch_flush_lazy_mmu_mode(); | ||
899 | |||
900 | out: | 886 | out: |
901 | return ret; | 887 | return ret; |
902 | } | 888 | } |
diff --git a/arch/x86/mm/srat_64.c b/arch/x86/mm/srat_64.c index 01765955baaf..2dfcbf9df2ae 100644 --- a/arch/x86/mm/srat_64.c +++ b/arch/x86/mm/srat_64.c | |||
@@ -31,17 +31,11 @@ static nodemask_t nodes_parsed __initdata; | |||
31 | static nodemask_t cpu_nodes_parsed __initdata; | 31 | static nodemask_t cpu_nodes_parsed __initdata; |
32 | static struct bootnode nodes[MAX_NUMNODES] __initdata; | 32 | static struct bootnode nodes[MAX_NUMNODES] __initdata; |
33 | static struct bootnode nodes_add[MAX_NUMNODES]; | 33 | static struct bootnode nodes_add[MAX_NUMNODES]; |
34 | static int found_add_area __initdata; | ||
35 | int hotadd_percent __initdata = 0; | ||
36 | 34 | ||
37 | static int num_node_memblks __initdata; | 35 | static int num_node_memblks __initdata; |
38 | static struct bootnode node_memblk_range[NR_NODE_MEMBLKS] __initdata; | 36 | static struct bootnode node_memblk_range[NR_NODE_MEMBLKS] __initdata; |
39 | static int memblk_nodeid[NR_NODE_MEMBLKS] __initdata; | 37 | static int memblk_nodeid[NR_NODE_MEMBLKS] __initdata; |
40 | 38 | ||
41 | /* Too small nodes confuse the VM badly. Usually they result | ||
42 | from BIOS bugs. */ | ||
43 | #define NODE_MIN_SIZE (4*1024*1024) | ||
44 | |||
45 | static __init int setup_node(int pxm) | 39 | static __init int setup_node(int pxm) |
46 | { | 40 | { |
47 | return acpi_map_pxm_to_node(pxm); | 41 | return acpi_map_pxm_to_node(pxm); |
@@ -66,9 +60,6 @@ static __init void cutoff_node(int i, unsigned long start, unsigned long end) | |||
66 | { | 60 | { |
67 | struct bootnode *nd = &nodes[i]; | 61 | struct bootnode *nd = &nodes[i]; |
68 | 62 | ||
69 | if (found_add_area) | ||
70 | return; | ||
71 | |||
72 | if (nd->start < start) { | 63 | if (nd->start < start) { |
73 | nd->start = start; | 64 | nd->start = start; |
74 | if (nd->end < nd->start) | 65 | if (nd->end < nd->start) |
@@ -86,7 +77,6 @@ static __init void bad_srat(void) | |||
86 | int i; | 77 | int i; |
87 | printk(KERN_ERR "SRAT: SRAT not used.\n"); | 78 | printk(KERN_ERR "SRAT: SRAT not used.\n"); |
88 | acpi_numa = -1; | 79 | acpi_numa = -1; |
89 | found_add_area = 0; | ||
90 | for (i = 0; i < MAX_LOCAL_APIC; i++) | 80 | for (i = 0; i < MAX_LOCAL_APIC; i++) |
91 | apicid_to_node[i] = NUMA_NO_NODE; | 81 | apicid_to_node[i] = NUMA_NO_NODE; |
92 | for (i = 0; i < MAX_NUMNODES; i++) | 82 | for (i = 0; i < MAX_NUMNODES; i++) |
@@ -182,24 +172,21 @@ acpi_numa_processor_affinity_init(struct acpi_srat_cpu_affinity *pa) | |||
182 | pxm, apic_id, node); | 172 | pxm, apic_id, node); |
183 | } | 173 | } |
184 | 174 | ||
185 | static int update_end_of_memory(unsigned long end) {return -1;} | ||
186 | static int hotadd_enough_memory(struct bootnode *nd) {return 1;} | ||
187 | #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE | 175 | #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE |
188 | static inline int save_add_info(void) {return 1;} | 176 | static inline int save_add_info(void) {return 1;} |
189 | #else | 177 | #else |
190 | static inline int save_add_info(void) {return 0;} | 178 | static inline int save_add_info(void) {return 0;} |
191 | #endif | 179 | #endif |
192 | /* | 180 | /* |
193 | * Update nodes_add and decide if to include add are in the zone. | 181 | * Update nodes_add[] |
194 | * Both SPARSE and RESERVE need nodes_add information. | 182 | * This code supports one contiguous hot add area per node |
195 | * This code supports one contiguous hot add area per node. | ||
196 | */ | 183 | */ |
197 | static int __init | 184 | static void __init |
198 | reserve_hotadd(int node, unsigned long start, unsigned long end) | 185 | update_nodes_add(int node, unsigned long start, unsigned long end) |
199 | { | 186 | { |
200 | unsigned long s_pfn = start >> PAGE_SHIFT; | 187 | unsigned long s_pfn = start >> PAGE_SHIFT; |
201 | unsigned long e_pfn = end >> PAGE_SHIFT; | 188 | unsigned long e_pfn = end >> PAGE_SHIFT; |
202 | int ret = 0, changed = 0; | 189 | int changed = 0; |
203 | struct bootnode *nd = &nodes_add[node]; | 190 | struct bootnode *nd = &nodes_add[node]; |
204 | 191 | ||
205 | /* I had some trouble with strange memory hotadd regions breaking | 192 | /* I had some trouble with strange memory hotadd regions breaking |
@@ -210,7 +197,7 @@ reserve_hotadd(int node, unsigned long start, unsigned long end) | |||
210 | mistakes */ | 197 | mistakes */ |
211 | if ((signed long)(end - start) < NODE_MIN_SIZE) { | 198 | if ((signed long)(end - start) < NODE_MIN_SIZE) { |
212 | printk(KERN_ERR "SRAT: Hotplug area too small\n"); | 199 | printk(KERN_ERR "SRAT: Hotplug area too small\n"); |
213 | return -1; | 200 | return; |
214 | } | 201 | } |
215 | 202 | ||
216 | /* This check might be a bit too strict, but I'm keeping it for now. */ | 203 | /* This check might be a bit too strict, but I'm keeping it for now. */ |
@@ -218,12 +205,7 @@ reserve_hotadd(int node, unsigned long start, unsigned long end) | |||
218 | printk(KERN_ERR | 205 | printk(KERN_ERR |
219 | "SRAT: Hotplug area %lu -> %lu has existing memory\n", | 206 | "SRAT: Hotplug area %lu -> %lu has existing memory\n", |
220 | s_pfn, e_pfn); | 207 | s_pfn, e_pfn); |
221 | return -1; | 208 | return; |
222 | } | ||
223 | |||
224 | if (!hotadd_enough_memory(&nodes_add[node])) { | ||
225 | printk(KERN_ERR "SRAT: Hotplug area too large\n"); | ||
226 | return -1; | ||
227 | } | 209 | } |
228 | 210 | ||
229 | /* Looks good */ | 211 | /* Looks good */ |
@@ -245,11 +227,9 @@ reserve_hotadd(int node, unsigned long start, unsigned long end) | |||
245 | printk(KERN_ERR "SRAT: Hotplug zone not continuous. Partly ignored\n"); | 227 | printk(KERN_ERR "SRAT: Hotplug zone not continuous. Partly ignored\n"); |
246 | } | 228 | } |
247 | 229 | ||
248 | ret = update_end_of_memory(nd->end); | ||
249 | |||
250 | if (changed) | 230 | if (changed) |
251 | printk(KERN_INFO "SRAT: hot plug zone found %Lx - %Lx\n", nd->start, nd->end); | 231 | printk(KERN_INFO "SRAT: hot plug zone found %Lx - %Lx\n", |
252 | return ret; | 232 | nd->start, nd->end); |
253 | } | 233 | } |
254 | 234 | ||
255 | /* Callback for parsing of the Proximity Domain <-> Memory Area mappings */ | 235 | /* Callback for parsing of the Proximity Domain <-> Memory Area mappings */ |
@@ -310,13 +290,10 @@ acpi_numa_memory_affinity_init(struct acpi_srat_mem_affinity *ma) | |||
310 | start, end); | 290 | start, end); |
311 | e820_register_active_regions(node, start >> PAGE_SHIFT, | 291 | e820_register_active_regions(node, start >> PAGE_SHIFT, |
312 | end >> PAGE_SHIFT); | 292 | end >> PAGE_SHIFT); |
313 | push_node_boundaries(node, nd->start >> PAGE_SHIFT, | ||
314 | nd->end >> PAGE_SHIFT); | ||
315 | 293 | ||
316 | if ((ma->flags & ACPI_SRAT_MEM_HOT_PLUGGABLE) && | 294 | if (ma->flags & ACPI_SRAT_MEM_HOT_PLUGGABLE) { |
317 | (reserve_hotadd(node, start, end) < 0)) { | 295 | update_nodes_add(node, start, end); |
318 | /* Ignore hotadd region. Undo damage */ | 296 | /* restore nodes[node] */ |
319 | printk(KERN_NOTICE "SRAT: Hotplug region ignored\n"); | ||
320 | *nd = oldnode; | 297 | *nd = oldnode; |
321 | if ((nd->start | nd->end) == 0) | 298 | if ((nd->start | nd->end) == 0) |
322 | node_clear(node, nodes_parsed); | 299 | node_clear(node, nodes_parsed); |
@@ -345,9 +322,9 @@ static int __init nodes_cover_memory(const struct bootnode *nodes) | |||
345 | pxmram = 0; | 322 | pxmram = 0; |
346 | } | 323 | } |
347 | 324 | ||
348 | e820ram = max_pfn - absent_pages_in_range(0, max_pfn); | 325 | e820ram = max_pfn - (e820_hole_size(0, max_pfn<<PAGE_SHIFT)>>PAGE_SHIFT); |
349 | /* We seem to lose 3 pages somewhere. Allow a bit of slack. */ | 326 | /* We seem to lose 3 pages somewhere. Allow 1M of slack. */ |
350 | if ((long)(e820ram - pxmram) >= 1*1024*1024) { | 327 | if ((long)(e820ram - pxmram) >= (1<<(20 - PAGE_SHIFT))) { |
351 | printk(KERN_ERR | 328 | printk(KERN_ERR |
352 | "SRAT: PXMs only cover %luMB of your %luMB e820 RAM. Not used.\n", | 329 | "SRAT: PXMs only cover %luMB of your %luMB e820 RAM. Not used.\n", |
353 | (pxmram << PAGE_SHIFT) >> 20, | 330 | (pxmram << PAGE_SHIFT) >> 20, |
@@ -357,17 +334,6 @@ static int __init nodes_cover_memory(const struct bootnode *nodes) | |||
357 | return 1; | 334 | return 1; |
358 | } | 335 | } |
359 | 336 | ||
360 | static void __init unparse_node(int node) | ||
361 | { | ||
362 | int i; | ||
363 | node_clear(node, nodes_parsed); | ||
364 | node_clear(node, cpu_nodes_parsed); | ||
365 | for (i = 0; i < MAX_LOCAL_APIC; i++) { | ||
366 | if (apicid_to_node[i] == node) | ||
367 | apicid_to_node[i] = NUMA_NO_NODE; | ||
368 | } | ||
369 | } | ||
370 | |||
371 | void __init acpi_numa_arch_fixup(void) {} | 337 | void __init acpi_numa_arch_fixup(void) {} |
372 | 338 | ||
373 | /* Use the information discovered above to actually set up the nodes. */ | 339 | /* Use the information discovered above to actually set up the nodes. */ |
@@ -379,18 +345,8 @@ int __init acpi_scan_nodes(unsigned long start, unsigned long end) | |||
379 | return -1; | 345 | return -1; |
380 | 346 | ||
381 | /* First clean up the node list */ | 347 | /* First clean up the node list */ |
382 | for (i = 0; i < MAX_NUMNODES; i++) { | 348 | for (i = 0; i < MAX_NUMNODES; i++) |
383 | cutoff_node(i, start, end); | 349 | cutoff_node(i, start, end); |
384 | /* | ||
385 | * don't confuse VM with a node that doesn't have the | ||
386 | * minimum memory. | ||
387 | */ | ||
388 | if (nodes[i].end && | ||
389 | (nodes[i].end - nodes[i].start) < NODE_MIN_SIZE) { | ||
390 | unparse_node(i); | ||
391 | node_set_offline(i); | ||
392 | } | ||
393 | } | ||
394 | 350 | ||
395 | if (!nodes_cover_memory(nodes)) { | 351 | if (!nodes_cover_memory(nodes)) { |
396 | bad_srat(); | 352 | bad_srat(); |
@@ -423,7 +379,7 @@ int __init acpi_scan_nodes(unsigned long start, unsigned long end) | |||
423 | 379 | ||
424 | if (node == NUMA_NO_NODE) | 380 | if (node == NUMA_NO_NODE) |
425 | continue; | 381 | continue; |
426 | if (!node_isset(node, node_possible_map)) | 382 | if (!node_online(node)) |
427 | numa_clear_node(i); | 383 | numa_clear_node(i); |
428 | } | 384 | } |
429 | numa_init_array(); | 385 | numa_init_array(); |
@@ -510,26 +466,6 @@ static int null_slit_node_compare(int a, int b) | |||
510 | } | 466 | } |
511 | #endif /* CONFIG_NUMA_EMU */ | 467 | #endif /* CONFIG_NUMA_EMU */ |
512 | 468 | ||
513 | void __init srat_reserve_add_area(int nodeid) | ||
514 | { | ||
515 | if (found_add_area && nodes_add[nodeid].end) { | ||
516 | u64 total_mb; | ||
517 | |||
518 | printk(KERN_INFO "SRAT: Reserving hot-add memory space " | ||
519 | "for node %d at %Lx-%Lx\n", | ||
520 | nodeid, nodes_add[nodeid].start, nodes_add[nodeid].end); | ||
521 | total_mb = (nodes_add[nodeid].end - nodes_add[nodeid].start) | ||
522 | >> PAGE_SHIFT; | ||
523 | total_mb *= sizeof(struct page); | ||
524 | total_mb >>= 20; | ||
525 | printk(KERN_INFO "SRAT: This will cost you %Lu MB of " | ||
526 | "pre-allocated memory.\n", (unsigned long long)total_mb); | ||
527 | reserve_bootmem_node(NODE_DATA(nodeid), nodes_add[nodeid].start, | ||
528 | nodes_add[nodeid].end - nodes_add[nodeid].start, | ||
529 | BOOTMEM_DEFAULT); | ||
530 | } | ||
531 | } | ||
532 | |||
533 | int __node_distance(int a, int b) | 469 | int __node_distance(int a, int b) |
534 | { | 470 | { |
535 | int index; | 471 | int index; |
diff --git a/arch/x86/oprofile/nmi_int.c b/arch/x86/oprofile/nmi_int.c index c638685136e1..b07dd8d0b321 100644 --- a/arch/x86/oprofile/nmi_int.c +++ b/arch/x86/oprofile/nmi_int.c | |||
@@ -357,14 +357,11 @@ static void exit_sysfs(void) | |||
357 | #define exit_sysfs() do { } while (0) | 357 | #define exit_sysfs() do { } while (0) |
358 | #endif /* CONFIG_PM */ | 358 | #endif /* CONFIG_PM */ |
359 | 359 | ||
360 | static int p4force; | ||
361 | module_param(p4force, int, 0); | ||
362 | |||
363 | static int __init p4_init(char **cpu_type) | 360 | static int __init p4_init(char **cpu_type) |
364 | { | 361 | { |
365 | __u8 cpu_model = boot_cpu_data.x86_model; | 362 | __u8 cpu_model = boot_cpu_data.x86_model; |
366 | 363 | ||
367 | if (!p4force && (cpu_model > 6 || cpu_model == 5)) | 364 | if (cpu_model > 6 || cpu_model == 5) |
368 | return 0; | 365 | return 0; |
369 | 366 | ||
370 | #ifndef CONFIG_SMP | 367 | #ifndef CONFIG_SMP |
@@ -390,10 +387,25 @@ static int __init p4_init(char **cpu_type) | |||
390 | return 0; | 387 | return 0; |
391 | } | 388 | } |
392 | 389 | ||
390 | static int force_arch_perfmon; | ||
391 | static int force_cpu_type(const char *str, struct kernel_param *kp) | ||
392 | { | ||
393 | if (!strcmp(str, "archperfmon")) { | ||
394 | force_arch_perfmon = 1; | ||
395 | printk(KERN_INFO "oprofile: forcing architectural perfmon\n"); | ||
396 | } | ||
397 | |||
398 | return 0; | ||
399 | } | ||
400 | module_param_call(cpu_type, force_cpu_type, NULL, NULL, 0); | ||
401 | |||
393 | static int __init ppro_init(char **cpu_type) | 402 | static int __init ppro_init(char **cpu_type) |
394 | { | 403 | { |
395 | __u8 cpu_model = boot_cpu_data.x86_model; | 404 | __u8 cpu_model = boot_cpu_data.x86_model; |
396 | 405 | ||
406 | if (force_arch_perfmon && cpu_has_arch_perfmon) | ||
407 | return 0; | ||
408 | |||
397 | switch (cpu_model) { | 409 | switch (cpu_model) { |
398 | case 0 ... 2: | 410 | case 0 ... 2: |
399 | *cpu_type = "i386/ppro"; | 411 | *cpu_type = "i386/ppro"; |
@@ -415,6 +427,13 @@ static int __init ppro_init(char **cpu_type) | |||
415 | case 15: case 23: | 427 | case 15: case 23: |
416 | *cpu_type = "i386/core_2"; | 428 | *cpu_type = "i386/core_2"; |
417 | break; | 429 | break; |
430 | case 26: | ||
431 | arch_perfmon_setup_counters(); | ||
432 | *cpu_type = "i386/core_i7"; | ||
433 | break; | ||
434 | case 28: | ||
435 | *cpu_type = "i386/atom"; | ||
436 | break; | ||
418 | default: | 437 | default: |
419 | /* Unknown */ | 438 | /* Unknown */ |
420 | return 0; | 439 | return 0; |
diff --git a/arch/x86/pci/irq.c b/arch/x86/pci/irq.c index fecbce6e7d7c..0696d506c4ad 100644 --- a/arch/x86/pci/irq.c +++ b/arch/x86/pci/irq.c | |||
@@ -889,6 +889,9 @@ static int pcibios_lookup_irq(struct pci_dev *dev, int assign) | |||
889 | return 0; | 889 | return 0; |
890 | } | 890 | } |
891 | 891 | ||
892 | if (io_apic_assign_pci_irqs) | ||
893 | return 0; | ||
894 | |||
892 | /* Find IRQ routing entry */ | 895 | /* Find IRQ routing entry */ |
893 | 896 | ||
894 | if (!pirq_table) | 897 | if (!pirq_table) |
@@ -1039,56 +1042,15 @@ static void __init pcibios_fixup_irqs(void) | |||
1039 | pirq_penalty[dev->irq]++; | 1042 | pirq_penalty[dev->irq]++; |
1040 | } | 1043 | } |
1041 | 1044 | ||
1045 | if (io_apic_assign_pci_irqs) | ||
1046 | return; | ||
1047 | |||
1042 | dev = NULL; | 1048 | dev = NULL; |
1043 | while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) { | 1049 | while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) { |
1044 | pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin); | 1050 | pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin); |
1045 | if (!pin) | 1051 | if (!pin) |
1046 | continue; | 1052 | continue; |
1047 | 1053 | ||
1048 | #ifdef CONFIG_X86_IO_APIC | ||
1049 | /* | ||
1050 | * Recalculate IRQ numbers if we use the I/O APIC. | ||
1051 | */ | ||
1052 | if (io_apic_assign_pci_irqs) { | ||
1053 | int irq; | ||
1054 | |||
1055 | /* | ||
1056 | * interrupt pins are numbered starting from 1 | ||
1057 | */ | ||
1058 | irq = IO_APIC_get_PCI_irq_vector(dev->bus->number, | ||
1059 | PCI_SLOT(dev->devfn), pin - 1); | ||
1060 | /* | ||
1061 | * Busses behind bridges are typically not listed in the | ||
1062 | * MP-table. In this case we have to look up the IRQ | ||
1063 | * based on the parent bus, parent slot, and pin number. | ||
1064 | * The SMP code detects such bridged busses itself so we | ||
1065 | * should get into this branch reliably. | ||
1066 | */ | ||
1067 | if (irq < 0 && dev->bus->parent) { | ||
1068 | /* go back to the bridge */ | ||
1069 | struct pci_dev *bridge = dev->bus->self; | ||
1070 | int bus; | ||
1071 | |||
1072 | pin = pci_swizzle_interrupt_pin(dev, pin); | ||
1073 | bus = bridge->bus->number; | ||
1074 | irq = IO_APIC_get_PCI_irq_vector(bus, | ||
1075 | PCI_SLOT(bridge->devfn), pin - 1); | ||
1076 | if (irq >= 0) | ||
1077 | dev_warn(&dev->dev, | ||
1078 | "using bridge %s INT %c to " | ||
1079 | "get IRQ %d\n", | ||
1080 | pci_name(bridge), | ||
1081 | 'A' + pin - 1, irq); | ||
1082 | } | ||
1083 | if (irq >= 0) { | ||
1084 | dev_info(&dev->dev, | ||
1085 | "PCI->APIC IRQ transform: INT %c " | ||
1086 | "-> IRQ %d\n", | ||
1087 | 'A' + pin - 1, irq); | ||
1088 | dev->irq = irq; | ||
1089 | } | ||
1090 | } | ||
1091 | #endif | ||
1092 | /* | 1054 | /* |
1093 | * Still no IRQ? Try to lookup one... | 1055 | * Still no IRQ? Try to lookup one... |
1094 | */ | 1056 | */ |
@@ -1183,6 +1145,19 @@ int __init pcibios_irq_init(void) | |||
1183 | pcibios_enable_irq = pirq_enable_irq; | 1145 | pcibios_enable_irq = pirq_enable_irq; |
1184 | 1146 | ||
1185 | pcibios_fixup_irqs(); | 1147 | pcibios_fixup_irqs(); |
1148 | |||
1149 | if (io_apic_assign_pci_irqs && pci_routeirq) { | ||
1150 | struct pci_dev *dev = NULL; | ||
1151 | /* | ||
1152 | * PCI IRQ routing is set up by pci_enable_device(), but we | ||
1153 | * also do it here in case there are still broken drivers that | ||
1154 | * don't use pci_enable_device(). | ||
1155 | */ | ||
1156 | printk(KERN_INFO "PCI: Routing PCI interrupts for all devices because \"pci=routeirq\" specified\n"); | ||
1157 | for_each_pci_dev(dev) | ||
1158 | pirq_enable_irq(dev); | ||
1159 | } | ||
1160 | |||
1186 | return 0; | 1161 | return 0; |
1187 | } | 1162 | } |
1188 | 1163 | ||
@@ -1213,16 +1188,23 @@ void pcibios_penalize_isa_irq(int irq, int active) | |||
1213 | static int pirq_enable_irq(struct pci_dev *dev) | 1188 | static int pirq_enable_irq(struct pci_dev *dev) |
1214 | { | 1189 | { |
1215 | u8 pin; | 1190 | u8 pin; |
1216 | struct pci_dev *temp_dev; | ||
1217 | 1191 | ||
1218 | pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin); | 1192 | pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin); |
1219 | if (pin && !pcibios_lookup_irq(dev, 1) && !dev->irq) { | 1193 | if (pin && !pcibios_lookup_irq(dev, 1)) { |
1220 | char *msg = ""; | 1194 | char *msg = ""; |
1221 | 1195 | ||
1196 | if (!io_apic_assign_pci_irqs && dev->irq) | ||
1197 | return 0; | ||
1198 | |||
1222 | if (io_apic_assign_pci_irqs) { | 1199 | if (io_apic_assign_pci_irqs) { |
1200 | #ifdef CONFIG_X86_IO_APIC | ||
1201 | struct pci_dev *temp_dev; | ||
1223 | int irq; | 1202 | int irq; |
1203 | struct io_apic_irq_attr irq_attr; | ||
1224 | 1204 | ||
1225 | irq = IO_APIC_get_PCI_irq_vector(dev->bus->number, PCI_SLOT(dev->devfn), pin - 1); | 1205 | irq = IO_APIC_get_PCI_irq_vector(dev->bus->number, |
1206 | PCI_SLOT(dev->devfn), | ||
1207 | pin - 1, &irq_attr); | ||
1226 | /* | 1208 | /* |
1227 | * Busses behind bridges are typically not listed in the MP-table. | 1209 | * Busses behind bridges are typically not listed in the MP-table. |
1228 | * In this case we have to look up the IRQ based on the parent bus, | 1210 | * In this case we have to look up the IRQ based on the parent bus, |
@@ -1235,7 +1217,8 @@ static int pirq_enable_irq(struct pci_dev *dev) | |||
1235 | 1217 | ||
1236 | pin = pci_swizzle_interrupt_pin(dev, pin); | 1218 | pin = pci_swizzle_interrupt_pin(dev, pin); |
1237 | irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number, | 1219 | irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number, |
1238 | PCI_SLOT(bridge->devfn), pin - 1); | 1220 | PCI_SLOT(bridge->devfn), |
1221 | pin - 1, &irq_attr); | ||
1239 | if (irq >= 0) | 1222 | if (irq >= 0) |
1240 | dev_warn(&dev->dev, "using bridge %s " | 1223 | dev_warn(&dev->dev, "using bridge %s " |
1241 | "INT %c to get IRQ %d\n", | 1224 | "INT %c to get IRQ %d\n", |
@@ -1245,12 +1228,15 @@ static int pirq_enable_irq(struct pci_dev *dev) | |||
1245 | } | 1228 | } |
1246 | dev = temp_dev; | 1229 | dev = temp_dev; |
1247 | if (irq >= 0) { | 1230 | if (irq >= 0) { |
1231 | io_apic_set_pci_routing(&dev->dev, irq, | ||
1232 | &irq_attr); | ||
1233 | dev->irq = irq; | ||
1248 | dev_info(&dev->dev, "PCI->APIC IRQ transform: " | 1234 | dev_info(&dev->dev, "PCI->APIC IRQ transform: " |
1249 | "INT %c -> IRQ %d\n", 'A' + pin - 1, irq); | 1235 | "INT %c -> IRQ %d\n", 'A' + pin - 1, irq); |
1250 | dev->irq = irq; | ||
1251 | return 0; | 1236 | return 0; |
1252 | } else | 1237 | } else |
1253 | msg = "; probably buggy MP table"; | 1238 | msg = "; probably buggy MP table"; |
1239 | #endif | ||
1254 | } else if (pci_probe & PCI_BIOS_IRQ_SCAN) | 1240 | } else if (pci_probe & PCI_BIOS_IRQ_SCAN) |
1255 | msg = ""; | 1241 | msg = ""; |
1256 | else | 1242 | else |
diff --git a/arch/x86/pci/mmconfig-shared.c b/arch/x86/pci/mmconfig-shared.c index 5fa10bb9604f..8766b0e216c5 100644 --- a/arch/x86/pci/mmconfig-shared.c +++ b/arch/x86/pci/mmconfig-shared.c | |||
@@ -375,7 +375,7 @@ static acpi_status __init check_mcfg_resource(struct acpi_resource *res, | |||
375 | if (!fixmem32) | 375 | if (!fixmem32) |
376 | return AE_OK; | 376 | return AE_OK; |
377 | if ((mcfg_res->start >= fixmem32->address) && | 377 | if ((mcfg_res->start >= fixmem32->address) && |
378 | (mcfg_res->end <= (fixmem32->address + | 378 | (mcfg_res->end < (fixmem32->address + |
379 | fixmem32->address_length))) { | 379 | fixmem32->address_length))) { |
380 | mcfg_res->flags = 1; | 380 | mcfg_res->flags = 1; |
381 | return AE_CTRL_TERMINATE; | 381 | return AE_CTRL_TERMINATE; |
@@ -392,7 +392,7 @@ static acpi_status __init check_mcfg_resource(struct acpi_resource *res, | |||
392 | return AE_OK; | 392 | return AE_OK; |
393 | 393 | ||
394 | if ((mcfg_res->start >= address.minimum) && | 394 | if ((mcfg_res->start >= address.minimum) && |
395 | (mcfg_res->end <= (address.minimum + address.address_length))) { | 395 | (mcfg_res->end < (address.minimum + address.address_length))) { |
396 | mcfg_res->flags = 1; | 396 | mcfg_res->flags = 1; |
397 | return AE_CTRL_TERMINATE; | 397 | return AE_CTRL_TERMINATE; |
398 | } | 398 | } |
@@ -418,7 +418,7 @@ static int __init is_acpi_reserved(u64 start, u64 end, unsigned not_used) | |||
418 | struct resource mcfg_res; | 418 | struct resource mcfg_res; |
419 | 419 | ||
420 | mcfg_res.start = start; | 420 | mcfg_res.start = start; |
421 | mcfg_res.end = end; | 421 | mcfg_res.end = end - 1; |
422 | mcfg_res.flags = 0; | 422 | mcfg_res.flags = 0; |
423 | 423 | ||
424 | acpi_get_devices("PNP0C01", find_mboard_resource, &mcfg_res, NULL); | 424 | acpi_get_devices("PNP0C01", find_mboard_resource, &mcfg_res, NULL); |
diff --git a/arch/x86/vdso/vma.c b/arch/x86/vdso/vma.c index 93b7a2938b2f..21e1aeb9f3ea 100644 --- a/arch/x86/vdso/vma.c +++ b/arch/x86/vdso/vma.c | |||
@@ -8,6 +8,7 @@ | |||
8 | #include <linux/sched.h> | 8 | #include <linux/sched.h> |
9 | #include <linux/init.h> | 9 | #include <linux/init.h> |
10 | #include <linux/random.h> | 10 | #include <linux/random.h> |
11 | #include <linux/elf.h> | ||
11 | #include <asm/vsyscall.h> | 12 | #include <asm/vsyscall.h> |
12 | #include <asm/vgtod.h> | 13 | #include <asm/vgtod.h> |
13 | #include <asm/proto.h> | 14 | #include <asm/proto.h> |
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c index f09e8c36ee80..0a1700a2be9c 100644 --- a/arch/x86/xen/enlighten.c +++ b/arch/x86/xen/enlighten.c | |||
@@ -20,6 +20,7 @@ | |||
20 | #include <linux/delay.h> | 20 | #include <linux/delay.h> |
21 | #include <linux/start_kernel.h> | 21 | #include <linux/start_kernel.h> |
22 | #include <linux/sched.h> | 22 | #include <linux/sched.h> |
23 | #include <linux/kprobes.h> | ||
23 | #include <linux/bootmem.h> | 24 | #include <linux/bootmem.h> |
24 | #include <linux/module.h> | 25 | #include <linux/module.h> |
25 | #include <linux/mm.h> | 26 | #include <linux/mm.h> |
@@ -44,6 +45,7 @@ | |||
44 | #include <asm/processor.h> | 45 | #include <asm/processor.h> |
45 | #include <asm/proto.h> | 46 | #include <asm/proto.h> |
46 | #include <asm/msr-index.h> | 47 | #include <asm/msr-index.h> |
48 | #include <asm/traps.h> | ||
47 | #include <asm/setup.h> | 49 | #include <asm/setup.h> |
48 | #include <asm/desc.h> | 50 | #include <asm/desc.h> |
49 | #include <asm/pgtable.h> | 51 | #include <asm/pgtable.h> |
@@ -240,10 +242,10 @@ static unsigned long xen_get_debugreg(int reg) | |||
240 | return HYPERVISOR_get_debugreg(reg); | 242 | return HYPERVISOR_get_debugreg(reg); |
241 | } | 243 | } |
242 | 244 | ||
243 | void xen_leave_lazy(void) | 245 | static void xen_end_context_switch(struct task_struct *next) |
244 | { | 246 | { |
245 | paravirt_leave_lazy(paravirt_get_lazy_mode()); | ||
246 | xen_mc_flush(); | 247 | xen_mc_flush(); |
248 | paravirt_end_context_switch(next); | ||
247 | } | 249 | } |
248 | 250 | ||
249 | static unsigned long xen_store_tr(void) | 251 | static unsigned long xen_store_tr(void) |
@@ -428,11 +430,44 @@ static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, | |||
428 | static int cvt_gate_to_trap(int vector, const gate_desc *val, | 430 | static int cvt_gate_to_trap(int vector, const gate_desc *val, |
429 | struct trap_info *info) | 431 | struct trap_info *info) |
430 | { | 432 | { |
433 | unsigned long addr; | ||
434 | |||
431 | if (val->type != GATE_TRAP && val->type != GATE_INTERRUPT) | 435 | if (val->type != GATE_TRAP && val->type != GATE_INTERRUPT) |
432 | return 0; | 436 | return 0; |
433 | 437 | ||
434 | info->vector = vector; | 438 | info->vector = vector; |
435 | info->address = gate_offset(*val); | 439 | |
440 | addr = gate_offset(*val); | ||
441 | #ifdef CONFIG_X86_64 | ||
442 | /* | ||
443 | * Look for known traps using IST, and substitute them | ||
444 | * appropriately. The debugger ones are the only ones we care | ||
445 | * about. Xen will handle faults like double_fault and | ||
446 | * machine_check, so we should never see them. Warn if | ||
447 | * there's an unexpected IST-using fault handler. | ||
448 | */ | ||
449 | if (addr == (unsigned long)debug) | ||
450 | addr = (unsigned long)xen_debug; | ||
451 | else if (addr == (unsigned long)int3) | ||
452 | addr = (unsigned long)xen_int3; | ||
453 | else if (addr == (unsigned long)stack_segment) | ||
454 | addr = (unsigned long)xen_stack_segment; | ||
455 | else if (addr == (unsigned long)double_fault || | ||
456 | addr == (unsigned long)nmi) { | ||
457 | /* Don't need to handle these */ | ||
458 | return 0; | ||
459 | #ifdef CONFIG_X86_MCE | ||
460 | } else if (addr == (unsigned long)machine_check) { | ||
461 | return 0; | ||
462 | #endif | ||
463 | } else { | ||
464 | /* Some other trap using IST? */ | ||
465 | if (WARN_ON(val->ist != 0)) | ||
466 | return 0; | ||
467 | } | ||
468 | #endif /* CONFIG_X86_64 */ | ||
469 | info->address = addr; | ||
470 | |||
436 | info->cs = gate_segment(*val); | 471 | info->cs = gate_segment(*val); |
437 | info->flags = val->dpl; | 472 | info->flags = val->dpl; |
438 | /* interrupt gates clear IF */ | 473 | /* interrupt gates clear IF */ |
@@ -623,10 +658,26 @@ static void xen_clts(void) | |||
623 | xen_mc_issue(PARAVIRT_LAZY_CPU); | 658 | xen_mc_issue(PARAVIRT_LAZY_CPU); |
624 | } | 659 | } |
625 | 660 | ||
661 | static DEFINE_PER_CPU(unsigned long, xen_cr0_value); | ||
662 | |||
663 | static unsigned long xen_read_cr0(void) | ||
664 | { | ||
665 | unsigned long cr0 = percpu_read(xen_cr0_value); | ||
666 | |||
667 | if (unlikely(cr0 == 0)) { | ||
668 | cr0 = native_read_cr0(); | ||
669 | percpu_write(xen_cr0_value, cr0); | ||
670 | } | ||
671 | |||
672 | return cr0; | ||
673 | } | ||
674 | |||
626 | static void xen_write_cr0(unsigned long cr0) | 675 | static void xen_write_cr0(unsigned long cr0) |
627 | { | 676 | { |
628 | struct multicall_space mcs; | 677 | struct multicall_space mcs; |
629 | 678 | ||
679 | percpu_write(xen_cr0_value, cr0); | ||
680 | |||
630 | /* Only pay attention to cr0.TS; everything else is | 681 | /* Only pay attention to cr0.TS; everything else is |
631 | ignored. */ | 682 | ignored. */ |
632 | mcs = xen_mc_entry(0); | 683 | mcs = xen_mc_entry(0); |
@@ -812,7 +863,7 @@ static const struct pv_cpu_ops xen_cpu_ops __initdata = { | |||
812 | 863 | ||
813 | .clts = xen_clts, | 864 | .clts = xen_clts, |
814 | 865 | ||
815 | .read_cr0 = native_read_cr0, | 866 | .read_cr0 = xen_read_cr0, |
816 | .write_cr0 = xen_write_cr0, | 867 | .write_cr0 = xen_write_cr0, |
817 | 868 | ||
818 | .read_cr4 = native_read_cr4, | 869 | .read_cr4 = native_read_cr4, |
@@ -860,10 +911,8 @@ static const struct pv_cpu_ops xen_cpu_ops __initdata = { | |||
860 | /* Xen takes care of %gs when switching to usermode for us */ | 911 | /* Xen takes care of %gs when switching to usermode for us */ |
861 | .swapgs = paravirt_nop, | 912 | .swapgs = paravirt_nop, |
862 | 913 | ||
863 | .lazy_mode = { | 914 | .start_context_switch = paravirt_start_context_switch, |
864 | .enter = paravirt_enter_lazy_cpu, | 915 | .end_context_switch = xen_end_context_switch, |
865 | .leave = xen_leave_lazy, | ||
866 | }, | ||
867 | }; | 916 | }; |
868 | 917 | ||
869 | static const struct pv_apic_ops xen_apic_ops __initdata = { | 918 | static const struct pv_apic_ops xen_apic_ops __initdata = { |
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c index fba55b1a4021..4ceb28581652 100644 --- a/arch/x86/xen/mmu.c +++ b/arch/x86/xen/mmu.c | |||
@@ -452,10 +452,6 @@ void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags) | |||
452 | void xen_set_pte_at(struct mm_struct *mm, unsigned long addr, | 452 | void xen_set_pte_at(struct mm_struct *mm, unsigned long addr, |
453 | pte_t *ptep, pte_t pteval) | 453 | pte_t *ptep, pte_t pteval) |
454 | { | 454 | { |
455 | /* updates to init_mm may be done without lock */ | ||
456 | if (mm == &init_mm) | ||
457 | preempt_disable(); | ||
458 | |||
459 | ADD_STATS(set_pte_at, 1); | 455 | ADD_STATS(set_pte_at, 1); |
460 | // ADD_STATS(set_pte_at_pinned, xen_page_pinned(ptep)); | 456 | // ADD_STATS(set_pte_at_pinned, xen_page_pinned(ptep)); |
461 | ADD_STATS(set_pte_at_current, mm == current->mm); | 457 | ADD_STATS(set_pte_at_current, mm == current->mm); |
@@ -476,9 +472,7 @@ void xen_set_pte_at(struct mm_struct *mm, unsigned long addr, | |||
476 | } | 472 | } |
477 | xen_set_pte(ptep, pteval); | 473 | xen_set_pte(ptep, pteval); |
478 | 474 | ||
479 | out: | 475 | out: return; |
480 | if (mm == &init_mm) | ||
481 | preempt_enable(); | ||
482 | } | 476 | } |
483 | 477 | ||
484 | pte_t xen_ptep_modify_prot_start(struct mm_struct *mm, | 478 | pte_t xen_ptep_modify_prot_start(struct mm_struct *mm, |
@@ -1152,10 +1146,8 @@ static void drop_other_mm_ref(void *info) | |||
1152 | 1146 | ||
1153 | /* If this cpu still has a stale cr3 reference, then make sure | 1147 | /* If this cpu still has a stale cr3 reference, then make sure |
1154 | it has been flushed. */ | 1148 | it has been flushed. */ |
1155 | if (percpu_read(xen_current_cr3) == __pa(mm->pgd)) { | 1149 | if (percpu_read(xen_current_cr3) == __pa(mm->pgd)) |
1156 | load_cr3(swapper_pg_dir); | 1150 | load_cr3(swapper_pg_dir); |
1157 | arch_flush_lazy_cpu_mode(); | ||
1158 | } | ||
1159 | } | 1151 | } |
1160 | 1152 | ||
1161 | static void xen_drop_mm_ref(struct mm_struct *mm) | 1153 | static void xen_drop_mm_ref(struct mm_struct *mm) |
@@ -1168,7 +1160,6 @@ static void xen_drop_mm_ref(struct mm_struct *mm) | |||
1168 | load_cr3(swapper_pg_dir); | 1160 | load_cr3(swapper_pg_dir); |
1169 | else | 1161 | else |
1170 | leave_mm(smp_processor_id()); | 1162 | leave_mm(smp_processor_id()); |
1171 | arch_flush_lazy_cpu_mode(); | ||
1172 | } | 1163 | } |
1173 | 1164 | ||
1174 | /* Get the "official" set of cpus referring to our pagetable. */ | 1165 | /* Get the "official" set of cpus referring to our pagetable. */ |
@@ -1876,6 +1867,14 @@ __init void xen_post_allocator_init(void) | |||
1876 | xen_mark_init_mm_pinned(); | 1867 | xen_mark_init_mm_pinned(); |
1877 | } | 1868 | } |
1878 | 1869 | ||
1870 | static void xen_leave_lazy_mmu(void) | ||
1871 | { | ||
1872 | preempt_disable(); | ||
1873 | xen_mc_flush(); | ||
1874 | paravirt_leave_lazy_mmu(); | ||
1875 | preempt_enable(); | ||
1876 | } | ||
1877 | |||
1879 | const struct pv_mmu_ops xen_mmu_ops __initdata = { | 1878 | const struct pv_mmu_ops xen_mmu_ops __initdata = { |
1880 | .pagetable_setup_start = xen_pagetable_setup_start, | 1879 | .pagetable_setup_start = xen_pagetable_setup_start, |
1881 | .pagetable_setup_done = xen_pagetable_setup_done, | 1880 | .pagetable_setup_done = xen_pagetable_setup_done, |
@@ -1949,7 +1948,7 @@ const struct pv_mmu_ops xen_mmu_ops __initdata = { | |||
1949 | 1948 | ||
1950 | .lazy_mode = { | 1949 | .lazy_mode = { |
1951 | .enter = paravirt_enter_lazy_mmu, | 1950 | .enter = paravirt_enter_lazy_mmu, |
1952 | .leave = xen_leave_lazy, | 1951 | .leave = xen_leave_lazy_mmu, |
1953 | }, | 1952 | }, |
1954 | 1953 | ||
1955 | .set_fixmap = xen_set_fixmap, | 1954 | .set_fixmap = xen_set_fixmap, |
diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c index 15c6c68db6a2..ad0047f47cd4 100644 --- a/arch/x86/xen/setup.c +++ b/arch/x86/xen/setup.c | |||
@@ -61,9 +61,9 @@ char * __init xen_memory_setup(void) | |||
61 | * - xen_start_info | 61 | * - xen_start_info |
62 | * See comment above "struct start_info" in <xen/interface/xen.h> | 62 | * See comment above "struct start_info" in <xen/interface/xen.h> |
63 | */ | 63 | */ |
64 | e820_add_region(__pa(xen_start_info->mfn_list), | 64 | reserve_early(__pa(xen_start_info->mfn_list), |
65 | xen_start_info->pt_base - xen_start_info->mfn_list, | 65 | __pa(xen_start_info->pt_base), |
66 | E820_RESERVED); | 66 | "XEN START INFO"); |
67 | 67 | ||
68 | sanitize_e820_map(e820.map, ARRAY_SIZE(e820.map), &e820.nr_map); | 68 | sanitize_e820_map(e820.map, ARRAY_SIZE(e820.map), &e820.nr_map); |
69 | 69 | ||
diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h index ca6596b05d53..22494fd4c9b5 100644 --- a/arch/x86/xen/xen-ops.h +++ b/arch/x86/xen/xen-ops.h | |||
@@ -30,7 +30,6 @@ pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn); | |||
30 | void xen_ident_map_ISA(void); | 30 | void xen_ident_map_ISA(void); |
31 | void xen_reserve_top(void); | 31 | void xen_reserve_top(void); |
32 | 32 | ||
33 | void xen_leave_lazy(void); | ||
34 | void xen_post_allocator_init(void); | 33 | void xen_post_allocator_init(void); |
35 | 34 | ||
36 | char * __init xen_memory_setup(void); | 35 | char * __init xen_memory_setup(void); |