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authorPeter Zijlstra <a.p.zijlstra@chello.nl>2010-01-25 09:58:43 -0500
committerIngo Molnar <mingo@elte.hu>2010-01-29 03:01:45 -0500
commit2e8418736dff9c6fdadb2f87dcc2087cebf32167 (patch)
tree983d0a5dad6e879d168fbeca457b104c27e0c775 /arch/x86
parent184f412c3341cd24fbd26604634a5800b83dbdc3 (diff)
perf_event: x86: Deduplicate the disable code
Share the meat of the x86_pmu_disable() code with hw_perf_enable(). Also remove the barrier() from that code, since I could not convince myself we actually need it. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Stephane Eranian <eranian@google.com> LKML-Reference: <new-submission> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/kernel/cpu/perf_event.c29
1 files changed, 13 insertions, 16 deletions
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index fdbe24842271..07fa0c2faa09 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -1401,6 +1401,8 @@ static inline void x86_assign_hw_event(struct perf_event *event,
1401 } 1401 }
1402} 1402}
1403 1403
1404static void __x86_pmu_disable(struct perf_event *event, struct cpu_hw_events *cpuc);
1405
1404void hw_perf_enable(void) 1406void hw_perf_enable(void)
1405{ 1407{
1406 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); 1408 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
@@ -1426,13 +1428,7 @@ void hw_perf_enable(void)
1426 if (hwc->idx == -1 || hwc->idx == cpuc->assign[i]) 1428 if (hwc->idx == -1 || hwc->idx == cpuc->assign[i])
1427 continue; 1429 continue;
1428 1430
1429 x86_pmu.disable(hwc, hwc->idx); 1431 __x86_pmu_disable(event, cpuc);
1430
1431 clear_bit(hwc->idx, cpuc->active_mask);
1432 barrier();
1433 cpuc->events[hwc->idx] = NULL;
1434
1435 x86_perf_event_update(event, hwc, hwc->idx);
1436 1432
1437 hwc->idx = -1; 1433 hwc->idx = -1;
1438 } 1434 }
@@ -1822,11 +1818,10 @@ static void intel_pmu_drain_bts_buffer(struct cpu_hw_events *cpuc)
1822 event->pending_kill = POLL_IN; 1818 event->pending_kill = POLL_IN;
1823} 1819}
1824 1820
1825static void x86_pmu_disable(struct perf_event *event) 1821static void __x86_pmu_disable(struct perf_event *event, struct cpu_hw_events *cpuc)
1826{ 1822{
1827 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
1828 struct hw_perf_event *hwc = &event->hw; 1823 struct hw_perf_event *hwc = &event->hw;
1829 int i, idx = hwc->idx; 1824 int idx = hwc->idx;
1830 1825
1831 /* 1826 /*
1832 * Must be done before we disable, otherwise the nmi handler 1827 * Must be done before we disable, otherwise the nmi handler
@@ -1836,12 +1831,6 @@ static void x86_pmu_disable(struct perf_event *event)
1836 x86_pmu.disable(hwc, idx); 1831 x86_pmu.disable(hwc, idx);
1837 1832
1838 /* 1833 /*
1839 * Make sure the cleared pointer becomes visible before we
1840 * (potentially) free the event:
1841 */
1842 barrier();
1843
1844 /*
1845 * Drain the remaining delta count out of a event 1834 * Drain the remaining delta count out of a event
1846 * that we are disabling: 1835 * that we are disabling:
1847 */ 1836 */
@@ -1852,6 +1841,14 @@ static void x86_pmu_disable(struct perf_event *event)
1852 intel_pmu_drain_bts_buffer(cpuc); 1841 intel_pmu_drain_bts_buffer(cpuc);
1853 1842
1854 cpuc->events[idx] = NULL; 1843 cpuc->events[idx] = NULL;
1844}
1845
1846static void x86_pmu_disable(struct perf_event *event)
1847{
1848 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
1849 int i;
1850
1851 __x86_pmu_disable(event, cpuc);
1855 1852
1856 for (i = 0; i < cpuc->n_events; i++) { 1853 for (i = 0; i < cpuc->n_events; i++) {
1857 if (event == cpuc->event_list[i]) { 1854 if (event == cpuc->event_list[i]) {