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authorChris Wright <chrisw@sous-sol.org>2007-10-12 17:04:23 -0400
committerThomas Gleixner <tglx@inhelltoy.tec.linutronix.de>2007-10-12 17:04:23 -0400
commitbc1d99c1de85e826765318738e00e6c4e9a0cd12 (patch)
tree1da1924e333a41af5d16a7d7e7837b737521a993 /arch/x86
parent9f75e9b74a45d7d3c343c8979f49d5e6b92bbce3 (diff)
x86_64: cleanup apic.c after clock events switch
Make variables static. Signed-off-by: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/kernel/apic_64.c22
1 files changed, 14 insertions, 8 deletions
diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c
index 1231365404c4..395928de28ea 100644
--- a/arch/x86/kernel/apic_64.c
+++ b/arch/x86/kernel/apic_64.c
@@ -41,9 +41,8 @@
41#include <asm/apic.h> 41#include <asm/apic.h>
42 42
43int apic_verbosity; 43int apic_verbosity;
44int apic_calibrate_pmtmr __initdata;
45
46int disable_apic_timer __cpuinitdata; 44int disable_apic_timer __cpuinitdata;
45static int apic_calibrate_pmtmr __initdata;
47 46
48/* Local APIC timer works in C2? */ 47/* Local APIC timer works in C2? */
49int local_apic_timer_c2_ok; 48int local_apic_timer_c2_ok;
@@ -247,7 +246,10 @@ void disconnect_bsp_APIC(int virt_wire_setup)
247 apic_write(APIC_SPIV, value); 246 apic_write(APIC_SPIV, value);
248 247
249 if (!virt_wire_setup) { 248 if (!virt_wire_setup) {
250 /* For LVT0 make it edge triggered, active high, external and enabled */ 249 /*
250 * For LVT0 make it edge triggered, active high,
251 * external and enabled
252 */
251 value = apic_read(APIC_LVT0); 253 value = apic_read(APIC_LVT0);
252 value &= ~(APIC_MODE_MASK | APIC_SEND_PENDING | 254 value &= ~(APIC_MODE_MASK | APIC_SEND_PENDING |
253 APIC_INPUT_POLARITY | APIC_LVT_REMOTE_IRR | 255 APIC_INPUT_POLARITY | APIC_LVT_REMOTE_IRR |
@@ -483,10 +485,12 @@ void __cpuinit setup_local_APIC (void)
483 value = apic_read(APIC_LVT0) & APIC_LVT_MASKED; 485 value = apic_read(APIC_LVT0) & APIC_LVT_MASKED;
484 if (!smp_processor_id() && !value) { 486 if (!smp_processor_id() && !value) {
485 value = APIC_DM_EXTINT; 487 value = APIC_DM_EXTINT;
486 apic_printk(APIC_VERBOSE, "enabled ExtINT on CPU#%d\n", smp_processor_id()); 488 apic_printk(APIC_VERBOSE, "enabled ExtINT on CPU#%d\n",
489 smp_processor_id());
487 } else { 490 } else {
488 value = APIC_DM_EXTINT | APIC_LVT_MASKED; 491 value = APIC_DM_EXTINT | APIC_LVT_MASKED;
489 apic_printk(APIC_VERBOSE, "masked ExtINT on CPU#%d\n", smp_processor_id()); 492 apic_printk(APIC_VERBOSE, "masked ExtINT on CPU#%d\n",
493 smp_processor_id());
490 } 494 }
491 apic_write(APIC_LVT0, value); 495 apic_write(APIC_LVT0, value);
492 496
@@ -793,12 +797,14 @@ void __init init_apic_mappings(void)
793 if (smp_found_config) { 797 if (smp_found_config) {
794 ioapic_phys = mp_ioapics[i].mpc_apicaddr; 798 ioapic_phys = mp_ioapics[i].mpc_apicaddr;
795 } else { 799 } else {
796 ioapic_phys = (unsigned long) alloc_bootmem_pages(PAGE_SIZE); 800 ioapic_phys = (unsigned long)
801 alloc_bootmem_pages(PAGE_SIZE);
797 ioapic_phys = __pa(ioapic_phys); 802 ioapic_phys = __pa(ioapic_phys);
798 } 803 }
799 set_fixmap_nocache(idx, ioapic_phys); 804 set_fixmap_nocache(idx, ioapic_phys);
800 apic_printk(APIC_VERBOSE,"mapped IOAPIC to %016lx (%016lx)\n", 805 apic_printk(APIC_VERBOSE,
801 __fix_to_virt(idx), ioapic_phys); 806 "mapped IOAPIC to %016lx (%016lx)\n",
807 __fix_to_virt(idx), ioapic_phys);
802 idx++; 808 idx++;
803 809
804 if (ioapic_res != NULL) { 810 if (ioapic_res != NULL) {