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authorIngo Molnar <mingo@elte.hu>2009-01-31 11:32:31 -0500
committerIngo Molnar <mingo@elte.hu>2009-02-05 16:30:01 -0500
commit9d45cf9e36bf9bcf16df6e1cbf049807c8402823 (patch)
tree2118a16701418af10d215d2174df7ee0a5cbe6bd /arch/x86
parenta146649bc19d5eba4f5bfac6720c5f252d517a71 (diff)
parent0cd5c3c80a0ebd68c08312fa7d8c13149cc61c4c (diff)
Merge branch 'x86/urgent' into x86/apic
Conflicts: arch/x86/mach-default/setup.c Semantic merge: arch/x86/kernel/irqinit_32.c Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/Kconfig11
-rw-r--r--arch/x86/Kconfig.cpu28
-rw-r--r--arch/x86/include/asm/dma-mapping.h4
-rw-r--r--arch/x86/include/asm/e820.h1
-rw-r--r--arch/x86/include/asm/kvm.h2
-rw-r--r--arch/x86/include/asm/mce.h5
-rw-r--r--arch/x86/include/asm/mtrr.h1
-rw-r--r--arch/x86/include/asm/pgtable.h26
-rw-r--r--arch/x86/include/asm/ptrace-abi.h2
-rw-r--r--arch/x86/include/asm/sigcontext.h2
-rw-r--r--arch/x86/include/asm/swab.h2
-rw-r--r--arch/x86/include/asm/xen/page.h2
-rw-r--r--arch/x86/kernel/apic.c2
-rw-r--r--arch/x86/kernel/cpu/intel_cacheinfo.c15
-rw-r--r--arch/x86/kernel/cpu/mtrr/main.c3
-rw-r--r--arch/x86/kernel/ds.c31
-rw-r--r--arch/x86/kernel/entry_64.S1
-rw-r--r--arch/x86/kernel/io_apic.c5
-rw-r--r--arch/x86/kernel/pci-gart_64.c2
-rw-r--r--arch/x86/kernel/process_64.c9
-rw-r--r--arch/x86/kernel/setup.c2
-rw-r--r--arch/x86/lguest/boot.c4
-rw-r--r--arch/x86/mach-voyager/setup.c12
-rw-r--r--arch/x86/mach-voyager/voyager_smp.c25
-rw-r--r--arch/x86/pci/irq.c1
-rw-r--r--arch/x86/xen/multicalls.h4
26 files changed, 132 insertions, 70 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index c6e567bb6491..80291f749b66 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -1783,6 +1783,17 @@ config DMAR
1783 and include PCI device scope covered by these DMA 1783 and include PCI device scope covered by these DMA
1784 remapping devices. 1784 remapping devices.
1785 1785
1786config DMAR_DEFAULT_ON
1787 def_bool n
1788 prompt "Enable DMA Remapping Devices by default"
1789 depends on DMAR
1790 help
1791 Selecting this option will enable a DMAR device at boot time if
1792 one is found. If this option is not selected, DMAR support can
1793 be enabled by passing intel_iommu=on to the kernel. It is
1794 recommended you say N here while the DMAR code remains
1795 experimental.
1796
1786config DMAR_GFX_WA 1797config DMAR_GFX_WA
1787 def_bool y 1798 def_bool y
1788 prompt "Support for Graphics workaround" 1799 prompt "Support for Graphics workaround"
diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu
index 8eb50ba9161e..085fef4d8660 100644
--- a/arch/x86/Kconfig.cpu
+++ b/arch/x86/Kconfig.cpu
@@ -167,9 +167,9 @@ config MK7
167config MK8 167config MK8
168 bool "Opteron/Athlon64/Hammer/K8" 168 bool "Opteron/Athlon64/Hammer/K8"
169 help 169 help
170 Select this for an AMD Opteron or Athlon64 Hammer-family processor. Enables 170 Select this for an AMD Opteron or Athlon64 Hammer-family processor.
171 use of some extended instructions, and passes appropriate optimization 171 Enables use of some extended instructions, and passes appropriate
172 flags to GCC. 172 optimization flags to GCC.
173 173
174config MCRUSOE 174config MCRUSOE
175 bool "Crusoe" 175 bool "Crusoe"
@@ -256,9 +256,11 @@ config MPSC
256config MCORE2 256config MCORE2
257 bool "Core 2/newer Xeon" 257 bool "Core 2/newer Xeon"
258 help 258 help
259 Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and 53xx) 259
260 CPUs. You can distinguish newer from older Xeons by the CPU family 260 Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and
261 in /proc/cpuinfo. Newer ones have 6 and older ones 15 (not a typo) 261 53xx) CPUs. You can distinguish newer from older Xeons by the CPU
262 family in /proc/cpuinfo. Newer ones have 6 and older ones 15
263 (not a typo)
262 264
263config GENERIC_CPU 265config GENERIC_CPU
264 bool "Generic-x86-64" 266 bool "Generic-x86-64"
@@ -318,14 +320,14 @@ config X86_PPRO_FENCE
318 bool "PentiumPro memory ordering errata workaround" 320 bool "PentiumPro memory ordering errata workaround"
319 depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 || MGEODEGX1 321 depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 || MGEODEGX1
320 help 322 help
321 Old PentiumPro multiprocessor systems had errata that could cause memory 323 Old PentiumPro multiprocessor systems had errata that could cause
322 operations to violate the x86 ordering standard in rare cases. Enabling this 324 memory operations to violate the x86 ordering standard in rare cases.
323 option will attempt to work around some (but not all) occurances of 325 Enabling this option will attempt to work around some (but not all)
324 this problem, at the cost of much heavier spinlock and memory barrier 326 occurances of this problem, at the cost of much heavier spinlock and
325 operations. 327 memory barrier operations.
326 328
327 If unsure, say n here. Even distro kernels should think twice before enabling 329 If unsure, say n here. Even distro kernels should think twice before
328 this: there are few systems, and an unlikely bug. 330 enabling this: there are few systems, and an unlikely bug.
329 331
330config X86_F00F_BUG 332config X86_F00F_BUG
331 def_bool y 333 def_bool y
diff --git a/arch/x86/include/asm/dma-mapping.h b/arch/x86/include/asm/dma-mapping.h
index 4035357f5b9d..132a134d12f2 100644
--- a/arch/x86/include/asm/dma-mapping.h
+++ b/arch/x86/include/asm/dma-mapping.h
@@ -2,8 +2,8 @@
2#define _ASM_X86_DMA_MAPPING_H 2#define _ASM_X86_DMA_MAPPING_H
3 3
4/* 4/*
5 * IOMMU interface. See Documentation/DMA-mapping.txt and DMA-API.txt for 5 * IOMMU interface. See Documentation/PCI/PCI-DMA-mapping.txt and
6 * documentation. 6 * Documentation/DMA-API.txt for documentation.
7 */ 7 */
8 8
9#include <linux/scatterlist.h> 9#include <linux/scatterlist.h>
diff --git a/arch/x86/include/asm/e820.h b/arch/x86/include/asm/e820.h
index 3d8ceddbd407..00d41ce4c844 100644
--- a/arch/x86/include/asm/e820.h
+++ b/arch/x86/include/asm/e820.h
@@ -49,6 +49,7 @@
49#define E820_RESERVED_KERN 128 49#define E820_RESERVED_KERN 128
50 50
51#ifndef __ASSEMBLY__ 51#ifndef __ASSEMBLY__
52#include <linux/types.h>
52struct e820entry { 53struct e820entry {
53 __u64 addr; /* start of memory segment */ 54 __u64 addr; /* start of memory segment */
54 __u64 size; /* size of memory segment */ 55 __u64 size; /* size of memory segment */
diff --git a/arch/x86/include/asm/kvm.h b/arch/x86/include/asm/kvm.h
index b95162af0bf6..d2e3bf3608af 100644
--- a/arch/x86/include/asm/kvm.h
+++ b/arch/x86/include/asm/kvm.h
@@ -6,7 +6,7 @@
6 * 6 *
7 */ 7 */
8 8
9#include <asm/types.h> 9#include <linux/types.h>
10#include <linux/ioctl.h> 10#include <linux/ioctl.h>
11 11
12/* Architectural interrupt line count. */ 12/* Architectural interrupt line count. */
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index 1d6e17c2f23a..32c6e17b960b 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -3,8 +3,8 @@
3 3
4#ifdef __x86_64__ 4#ifdef __x86_64__
5 5
6#include <linux/types.h>
6#include <asm/ioctls.h> 7#include <asm/ioctls.h>
7#include <asm/types.h>
8 8
9/* 9/*
10 * Machine Check support for x86 10 * Machine Check support for x86
@@ -115,8 +115,6 @@ extern int mce_notify_user(void);
115 115
116#endif /* !CONFIG_X86_32 */ 116#endif /* !CONFIG_X86_32 */
117 117
118
119
120#ifdef CONFIG_X86_MCE 118#ifdef CONFIG_X86_MCE
121extern void mcheck_init(struct cpuinfo_x86 *c); 119extern void mcheck_init(struct cpuinfo_x86 *c);
122#else 120#else
@@ -126,5 +124,4 @@ extern void stop_mce(void);
126extern void restart_mce(void); 124extern void restart_mce(void);
127 125
128#endif /* __KERNEL__ */ 126#endif /* __KERNEL__ */
129
130#endif /* _ASM_X86_MCE_H */ 127#endif /* _ASM_X86_MCE_H */
diff --git a/arch/x86/include/asm/mtrr.h b/arch/x86/include/asm/mtrr.h
index 14080d22edb3..a51ada8467de 100644
--- a/arch/x86/include/asm/mtrr.h
+++ b/arch/x86/include/asm/mtrr.h
@@ -23,6 +23,7 @@
23#ifndef _ASM_X86_MTRR_H 23#ifndef _ASM_X86_MTRR_H
24#define _ASM_X86_MTRR_H 24#define _ASM_X86_MTRR_H
25 25
26#include <linux/types.h>
26#include <linux/ioctl.h> 27#include <linux/ioctl.h>
27#include <linux/errno.h> 28#include <linux/errno.h>
28 29
diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
index 6ceaef08486f..6f7c102018bf 100644
--- a/arch/x86/include/asm/pgtable.h
+++ b/arch/x86/include/asm/pgtable.h
@@ -316,16 +316,30 @@ static inline pte_t pte_mkspecial(pte_t pte)
316 316
317extern pteval_t __supported_pte_mask; 317extern pteval_t __supported_pte_mask;
318 318
319/*
320 * Mask out unsupported bits in a present pgprot. Non-present pgprots
321 * can use those bits for other purposes, so leave them be.
322 */
323static inline pgprotval_t massage_pgprot(pgprot_t pgprot)
324{
325 pgprotval_t protval = pgprot_val(pgprot);
326
327 if (protval & _PAGE_PRESENT)
328 protval &= __supported_pte_mask;
329
330 return protval;
331}
332
319static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot) 333static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
320{ 334{
321 return __pte((((phys_addr_t)page_nr << PAGE_SHIFT) | 335 return __pte(((phys_addr_t)page_nr << PAGE_SHIFT) |
322 pgprot_val(pgprot)) & __supported_pte_mask); 336 massage_pgprot(pgprot));
323} 337}
324 338
325static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot) 339static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
326{ 340{
327 return __pmd((((phys_addr_t)page_nr << PAGE_SHIFT) | 341 return __pmd(((phys_addr_t)page_nr << PAGE_SHIFT) |
328 pgprot_val(pgprot)) & __supported_pte_mask); 342 massage_pgprot(pgprot));
329} 343}
330 344
331static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 345static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
@@ -337,7 +351,7 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
337 * the newprot (if present): 351 * the newprot (if present):
338 */ 352 */
339 val &= _PAGE_CHG_MASK; 353 val &= _PAGE_CHG_MASK;
340 val |= pgprot_val(newprot) & (~_PAGE_CHG_MASK) & __supported_pte_mask; 354 val |= massage_pgprot(newprot) & ~_PAGE_CHG_MASK;
341 355
342 return __pte(val); 356 return __pte(val);
343} 357}
@@ -353,7 +367,7 @@ static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
353 367
354#define pte_pgprot(x) __pgprot(pte_flags(x) & PTE_FLAGS_MASK) 368#define pte_pgprot(x) __pgprot(pte_flags(x) & PTE_FLAGS_MASK)
355 369
356#define canon_pgprot(p) __pgprot(pgprot_val(p) & __supported_pte_mask) 370#define canon_pgprot(p) __pgprot(massage_pgprot(p))
357 371
358static inline int is_new_memtype_allowed(unsigned long flags, 372static inline int is_new_memtype_allowed(unsigned long flags,
359 unsigned long new_flags) 373 unsigned long new_flags)
diff --git a/arch/x86/include/asm/ptrace-abi.h b/arch/x86/include/asm/ptrace-abi.h
index 25f1bb8fc626..8e0f8d199e05 100644
--- a/arch/x86/include/asm/ptrace-abi.h
+++ b/arch/x86/include/asm/ptrace-abi.h
@@ -83,7 +83,7 @@
83#ifdef CONFIG_X86_PTRACE_BTS 83#ifdef CONFIG_X86_PTRACE_BTS
84 84
85#ifndef __ASSEMBLY__ 85#ifndef __ASSEMBLY__
86#include <asm/types.h> 86#include <linux/types.h>
87 87
88/* configuration/status structure used in PTRACE_BTS_CONFIG and 88/* configuration/status structure used in PTRACE_BTS_CONFIG and
89 PTRACE_BTS_STATUS commands. 89 PTRACE_BTS_STATUS commands.
diff --git a/arch/x86/include/asm/sigcontext.h b/arch/x86/include/asm/sigcontext.h
index 0afcb5e58acc..ec666491aaa4 100644
--- a/arch/x86/include/asm/sigcontext.h
+++ b/arch/x86/include/asm/sigcontext.h
@@ -2,7 +2,7 @@
2#define _ASM_X86_SIGCONTEXT_H 2#define _ASM_X86_SIGCONTEXT_H
3 3
4#include <linux/compiler.h> 4#include <linux/compiler.h>
5#include <asm/types.h> 5#include <linux/types.h>
6 6
7#define FP_XSTATE_MAGIC1 0x46505853U 7#define FP_XSTATE_MAGIC1 0x46505853U
8#define FP_XSTATE_MAGIC2 0x46505845U 8#define FP_XSTATE_MAGIC2 0x46505845U
diff --git a/arch/x86/include/asm/swab.h b/arch/x86/include/asm/swab.h
index 306d4178ffc9..557cd9f00661 100644
--- a/arch/x86/include/asm/swab.h
+++ b/arch/x86/include/asm/swab.h
@@ -1,7 +1,7 @@
1#ifndef _ASM_X86_SWAB_H 1#ifndef _ASM_X86_SWAB_H
2#define _ASM_X86_SWAB_H 2#define _ASM_X86_SWAB_H
3 3
4#include <asm/types.h> 4#include <linux/types.h>
5#include <linux/compiler.h> 5#include <linux/compiler.h>
6 6
7static inline __attribute_const__ __u32 __arch_swab32(__u32 val) 7static inline __attribute_const__ __u32 __arch_swab32(__u32 val)
diff --git a/arch/x86/include/asm/xen/page.h b/arch/x86/include/asm/xen/page.h
index 7ef617ef1df3..4bd990ee43df 100644
--- a/arch/x86/include/asm/xen/page.h
+++ b/arch/x86/include/asm/xen/page.h
@@ -137,7 +137,7 @@ static inline pte_t mfn_pte(unsigned long page_nr, pgprot_t pgprot)
137 pte_t pte; 137 pte_t pte;
138 138
139 pte.pte = ((phys_addr_t)page_nr << PAGE_SHIFT) | 139 pte.pte = ((phys_addr_t)page_nr << PAGE_SHIFT) |
140 (pgprot_val(pgprot) & __supported_pte_mask); 140 massage_pgprot(pgprot);
141 141
142 return pte; 142 return pte;
143} 143}
diff --git a/arch/x86/kernel/apic.c b/arch/x86/kernel/apic.c
index 5475e1c31800..8bd801db24d9 100644
--- a/arch/x86/kernel/apic.c
+++ b/arch/x86/kernel/apic.c
@@ -1461,7 +1461,7 @@ static int __init detect_init_APIC(void)
1461 switch (boot_cpu_data.x86_vendor) { 1461 switch (boot_cpu_data.x86_vendor) {
1462 case X86_VENDOR_AMD: 1462 case X86_VENDOR_AMD:
1463 if ((boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model > 1) || 1463 if ((boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model > 1) ||
1464 (boot_cpu_data.x86 == 15)) 1464 (boot_cpu_data.x86 >= 15))
1465 break; 1465 break;
1466 goto no_apic; 1466 goto no_apic;
1467 case X86_VENDOR_INTEL: 1467 case X86_VENDOR_INTEL:
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index 58527a9fc404..7293508d8f5c 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -36,8 +36,11 @@ static struct _cache_table cache_table[] __cpuinitdata =
36{ 36{
37 { 0x06, LVL_1_INST, 8 }, /* 4-way set assoc, 32 byte line size */ 37 { 0x06, LVL_1_INST, 8 }, /* 4-way set assoc, 32 byte line size */
38 { 0x08, LVL_1_INST, 16 }, /* 4-way set assoc, 32 byte line size */ 38 { 0x08, LVL_1_INST, 16 }, /* 4-way set assoc, 32 byte line size */
39 { 0x09, LVL_1_INST, 32 }, /* 4-way set assoc, 64 byte line size */
39 { 0x0a, LVL_1_DATA, 8 }, /* 2 way set assoc, 32 byte line size */ 40 { 0x0a, LVL_1_DATA, 8 }, /* 2 way set assoc, 32 byte line size */
40 { 0x0c, LVL_1_DATA, 16 }, /* 4-way set assoc, 32 byte line size */ 41 { 0x0c, LVL_1_DATA, 16 }, /* 4-way set assoc, 32 byte line size */
42 { 0x0d, LVL_1_DATA, 16 }, /* 4-way set assoc, 64 byte line size */
43 { 0x21, LVL_2, 256 }, /* 8-way set assoc, 64 byte line size */
41 { 0x22, LVL_3, 512 }, /* 4-way set assoc, sectored cache, 64 byte line size */ 44 { 0x22, LVL_3, 512 }, /* 4-way set assoc, sectored cache, 64 byte line size */
42 { 0x23, LVL_3, 1024 }, /* 8-way set assoc, sectored cache, 64 byte line size */ 45 { 0x23, LVL_3, 1024 }, /* 8-way set assoc, sectored cache, 64 byte line size */
43 { 0x25, LVL_3, 2048 }, /* 8-way set assoc, sectored cache, 64 byte line size */ 46 { 0x25, LVL_3, 2048 }, /* 8-way set assoc, sectored cache, 64 byte line size */
@@ -85,6 +88,18 @@ static struct _cache_table cache_table[] __cpuinitdata =
85 { 0x85, LVL_2, 2048 }, /* 8-way set assoc, 32 byte line size */ 88 { 0x85, LVL_2, 2048 }, /* 8-way set assoc, 32 byte line size */
86 { 0x86, LVL_2, 512 }, /* 4-way set assoc, 64 byte line size */ 89 { 0x86, LVL_2, 512 }, /* 4-way set assoc, 64 byte line size */
87 { 0x87, LVL_2, 1024 }, /* 8-way set assoc, 64 byte line size */ 90 { 0x87, LVL_2, 1024 }, /* 8-way set assoc, 64 byte line size */
91 { 0xd0, LVL_3, 512 }, /* 4-way set assoc, 64 byte line size */
92 { 0xd1, LVL_3, 1024 }, /* 4-way set assoc, 64 byte line size */
93 { 0xd2, LVL_3, 2048 }, /* 4-way set assoc, 64 byte line size */
94 { 0xd6, LVL_3, 1024 }, /* 8-way set assoc, 64 byte line size */
95 { 0xd7, LVL_3, 2038 }, /* 8-way set assoc, 64 byte line size */
96 { 0xd8, LVL_3, 4096 }, /* 12-way set assoc, 64 byte line size */
97 { 0xdc, LVL_3, 2048 }, /* 12-way set assoc, 64 byte line size */
98 { 0xdd, LVL_3, 4096 }, /* 12-way set assoc, 64 byte line size */
99 { 0xde, LVL_3, 8192 }, /* 12-way set assoc, 64 byte line size */
100 { 0xe2, LVL_3, 2048 }, /* 16-way set assoc, 64 byte line size */
101 { 0xe3, LVL_3, 4096 }, /* 16-way set assoc, 64 byte line size */
102 { 0xe4, LVL_3, 8192 }, /* 16-way set assoc, 64 byte line size */
88 { 0x00, 0, 0} 103 { 0x00, 0, 0}
89}; 104};
90 105
diff --git a/arch/x86/kernel/cpu/mtrr/main.c b/arch/x86/kernel/cpu/mtrr/main.c
index d259e5d2e054..236a401b8259 100644
--- a/arch/x86/kernel/cpu/mtrr/main.c
+++ b/arch/x86/kernel/cpu/mtrr/main.c
@@ -1594,8 +1594,7 @@ int __init mtrr_trim_uncached_memory(unsigned long end_pfn)
1594 1594
1595 /* kvm/qemu doesn't have mtrr set right, don't trim them all */ 1595 /* kvm/qemu doesn't have mtrr set right, don't trim them all */
1596 if (!highest_pfn) { 1596 if (!highest_pfn) {
1597 WARN(!kvm_para_available(), KERN_WARNING 1597 printk(KERN_INFO "CPU MTRRs all blank - virtualized system.\n");
1598 "WARNING: strange, CPU MTRRs all blank?\n");
1599 return 0; 1598 return 0;
1600 } 1599 }
1601 1600
diff --git a/arch/x86/kernel/ds.c b/arch/x86/kernel/ds.c
index da91701a2348..169a120587be 100644
--- a/arch/x86/kernel/ds.c
+++ b/arch/x86/kernel/ds.c
@@ -15,8 +15,8 @@
15 * - buffer allocation (memory accounting) 15 * - buffer allocation (memory accounting)
16 * 16 *
17 * 17 *
18 * Copyright (C) 2007-2008 Intel Corporation. 18 * Copyright (C) 2007-2009 Intel Corporation.
19 * Markus Metzger <markus.t.metzger@intel.com>, 2007-2008 19 * Markus Metzger <markus.t.metzger@intel.com>, 2007-2009
20 */ 20 */
21 21
22 22
@@ -890,7 +890,7 @@ int ds_set_pebs_reset(struct pebs_tracer *tracer, u64 value)
890} 890}
891 891
892static const struct ds_configuration ds_cfg_netburst = { 892static const struct ds_configuration ds_cfg_netburst = {
893 .name = "netburst", 893 .name = "Netburst",
894 .ctl[dsf_bts] = (1 << 2) | (1 << 3), 894 .ctl[dsf_bts] = (1 << 2) | (1 << 3),
895 .ctl[dsf_bts_kernel] = (1 << 5), 895 .ctl[dsf_bts_kernel] = (1 << 5),
896 .ctl[dsf_bts_user] = (1 << 6), 896 .ctl[dsf_bts_user] = (1 << 6),
@@ -904,7 +904,7 @@ static const struct ds_configuration ds_cfg_netburst = {
904#endif 904#endif
905}; 905};
906static const struct ds_configuration ds_cfg_pentium_m = { 906static const struct ds_configuration ds_cfg_pentium_m = {
907 .name = "pentium m", 907 .name = "Pentium M",
908 .ctl[dsf_bts] = (1 << 6) | (1 << 7), 908 .ctl[dsf_bts] = (1 << 6) | (1 << 7),
909 909
910 .sizeof_field = sizeof(long), 910 .sizeof_field = sizeof(long),
@@ -915,8 +915,8 @@ static const struct ds_configuration ds_cfg_pentium_m = {
915 .sizeof_rec[ds_pebs] = sizeof(long) * 18, 915 .sizeof_rec[ds_pebs] = sizeof(long) * 18,
916#endif 916#endif
917}; 917};
918static const struct ds_configuration ds_cfg_core2 = { 918static const struct ds_configuration ds_cfg_core2_atom = {
919 .name = "core 2", 919 .name = "Core 2/Atom",
920 .ctl[dsf_bts] = (1 << 6) | (1 << 7), 920 .ctl[dsf_bts] = (1 << 6) | (1 << 7),
921 .ctl[dsf_bts_kernel] = (1 << 9), 921 .ctl[dsf_bts_kernel] = (1 << 9),
922 .ctl[dsf_bts_user] = (1 << 10), 922 .ctl[dsf_bts_user] = (1 << 10),
@@ -949,19 +949,22 @@ void __cpuinit ds_init_intel(struct cpuinfo_x86 *c)
949 switch (c->x86) { 949 switch (c->x86) {
950 case 0x6: 950 case 0x6:
951 switch (c->x86_model) { 951 switch (c->x86_model) {
952 case 0 ... 0xC: 952 case 0x9:
953 /* sorry, don't know about them */ 953 case 0xd: /* Pentium M */
954 break;
955 case 0xD:
956 case 0xE: /* Pentium M */
957 ds_configure(&ds_cfg_pentium_m); 954 ds_configure(&ds_cfg_pentium_m);
958 break; 955 break;
959 default: /* Core2, Atom, ... */ 956 case 0xf:
960 ds_configure(&ds_cfg_core2); 957 case 0x17: /* Core2 */
958 case 0x1c: /* Atom */
959 ds_configure(&ds_cfg_core2_atom);
960 break;
961 case 0x1a: /* i7 */
962 default:
963 /* sorry, don't know about them */
961 break; 964 break;
962 } 965 }
963 break; 966 break;
964 case 0xF: 967 case 0xf:
965 switch (c->x86_model) { 968 switch (c->x86_model) {
966 case 0x0: 969 case 0x0:
967 case 0x1: 970 case 0x1:
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
index 82801fd2e931..1f7d697b5c00 100644
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -347,6 +347,7 @@ ENTRY(save_args)
347 popq_cfi %rax /* move return address... */ 347 popq_cfi %rax /* move return address... */
348 mov PER_CPU_VAR(irq_stack_ptr),%rsp 348 mov PER_CPU_VAR(irq_stack_ptr),%rsp
349 EMPTY_FRAME 0 349 EMPTY_FRAME 0
350 pushq_cfi %rbp /* backlink for unwinder */
350 pushq_cfi %rax /* ... to the new stack */ 351 pushq_cfi %rax /* ... to the new stack */
351 /* 352 /*
352 * We entered an interrupt context - irqs are off: 353 * We entered an interrupt context - irqs are off:
diff --git a/arch/x86/kernel/io_apic.c b/arch/x86/kernel/io_apic.c
index 84bccac4619f..9578d33f20a0 100644
--- a/arch/x86/kernel/io_apic.c
+++ b/arch/x86/kernel/io_apic.c
@@ -2524,14 +2524,15 @@ static void irq_complete_move(struct irq_desc **descp)
2524 2524
2525 vector = ~get_irq_regs()->orig_ax; 2525 vector = ~get_irq_regs()->orig_ax;
2526 me = smp_processor_id(); 2526 me = smp_processor_id();
2527
2528 if (vector == cfg->vector && cpumask_test_cpu(me, cfg->domain)) {
2527#ifdef CONFIG_NUMA_MIGRATE_IRQ_DESC 2529#ifdef CONFIG_NUMA_MIGRATE_IRQ_DESC
2528 *descp = desc = move_irq_desc(desc, me); 2530 *descp = desc = move_irq_desc(desc, me);
2529 /* get the new one */ 2531 /* get the new one */
2530 cfg = desc->chip_data; 2532 cfg = desc->chip_data;
2531#endif 2533#endif
2532
2533 if (vector == cfg->vector && cpumask_test_cpu(me, cfg->domain))
2534 send_cleanup_vector(cfg); 2534 send_cleanup_vector(cfg);
2535 }
2535} 2536}
2536#else 2537#else
2537static inline void irq_complete_move(struct irq_desc **descp) {} 2538static inline void irq_complete_move(struct irq_desc **descp) {}
diff --git a/arch/x86/kernel/pci-gart_64.c b/arch/x86/kernel/pci-gart_64.c
index 00c2bcd41463..d5768b1af080 100644
--- a/arch/x86/kernel/pci-gart_64.c
+++ b/arch/x86/kernel/pci-gart_64.c
@@ -5,7 +5,7 @@
5 * This allows to use PCI devices that only support 32bit addresses on systems 5 * This allows to use PCI devices that only support 32bit addresses on systems
6 * with more than 4GB. 6 * with more than 4GB.
7 * 7 *
8 * See Documentation/DMA-mapping.txt for the interface specification. 8 * See Documentation/PCI/PCI-DMA-mapping.txt for the interface specification.
9 * 9 *
10 * Copyright 2002 Andi Kleen, SuSE Labs. 10 * Copyright 2002 Andi Kleen, SuSE Labs.
11 * Subject to the GNU General Public License v2 only. 11 * Subject to the GNU General Public License v2 only.
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index c422eebb0c58..8eb169e45584 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -41,6 +41,7 @@
41#include <linux/uaccess.h> 41#include <linux/uaccess.h>
42#include <linux/io.h> 42#include <linux/io.h>
43#include <linux/ftrace.h> 43#include <linux/ftrace.h>
44#include <linux/dmi.h>
44 45
45#include <asm/pgtable.h> 46#include <asm/pgtable.h>
46#include <asm/system.h> 47#include <asm/system.h>
@@ -168,14 +169,18 @@ void __show_regs(struct pt_regs *regs, int all)
168 unsigned long d0, d1, d2, d3, d6, d7; 169 unsigned long d0, d1, d2, d3, d6, d7;
169 unsigned int fsindex, gsindex; 170 unsigned int fsindex, gsindex;
170 unsigned int ds, cs, es; 171 unsigned int ds, cs, es;
172 const char *board;
171 173
172 printk("\n"); 174 printk("\n");
173 print_modules(); 175 print_modules();
174 printk(KERN_INFO "Pid: %d, comm: %.20s %s %s %.*s\n", 176 board = dmi_get_system_info(DMI_PRODUCT_NAME);
177 if (!board)
178 board = "";
179 printk(KERN_INFO "Pid: %d, comm: %.20s %s %s %.*s %s\n",
175 current->pid, current->comm, print_tainted(), 180 current->pid, current->comm, print_tainted(),
176 init_utsname()->release, 181 init_utsname()->release,
177 (int)strcspn(init_utsname()->version, " "), 182 (int)strcspn(init_utsname()->version, " "),
178 init_utsname()->version); 183 init_utsname()->version, board);
179 printk(KERN_INFO "RIP: %04lx:[<%016lx>] ", regs->cs & 0xffff, regs->ip); 184 printk(KERN_INFO "RIP: %04lx:[<%016lx>] ", regs->cs & 0xffff, regs->ip);
180 printk_address(regs->ip, 1); 185 printk_address(regs->ip, 1);
181 printk(KERN_INFO "RSP: %04lx:%016lx EFLAGS: %08lx\n", regs->ss, 186 printk(KERN_INFO "RSP: %04lx:%016lx EFLAGS: %08lx\n", regs->ss,
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index df64afff5806..8d8fa992c9a0 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -620,7 +620,7 @@ struct x86_quirks *x86_quirks __initdata = &default_x86_quirks;
620static int __init dmi_low_memory_corruption(const struct dmi_system_id *d) 620static int __init dmi_low_memory_corruption(const struct dmi_system_id *d)
621{ 621{
622 printk(KERN_NOTICE 622 printk(KERN_NOTICE
623 "%s detected: BIOS may corrupt low RAM, working it around.\n", 623 "%s detected: BIOS may corrupt low RAM, working around it.\n",
624 d->ident); 624 d->ident);
625 625
626 e820_update_range(0, 0x10000, E820_RAM, E820_RESERVED); 626 e820_update_range(0, 0x10000, E820_RAM, E820_RESERVED);
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c
index a7ed208f81e3..92f1c6f3e19d 100644
--- a/arch/x86/lguest/boot.c
+++ b/arch/x86/lguest/boot.c
@@ -931,7 +931,7 @@ static void lguest_restart(char *reason)
931 * that we can fit comfortably. 931 * that we can fit comfortably.
932 * 932 *
933 * First we need assembly templates of each of the patchable Guest operations, 933 * First we need assembly templates of each of the patchable Guest operations,
934 * and these are in lguest_asm.S. */ 934 * and these are in i386_head.S. */
935 935
936/*G:060 We construct a table from the assembler templates: */ 936/*G:060 We construct a table from the assembler templates: */
937static const struct lguest_insns 937static const struct lguest_insns
@@ -1093,7 +1093,7 @@ __init void lguest_init(void)
1093 acpi_ht = 0; 1093 acpi_ht = 0;
1094#endif 1094#endif
1095 1095
1096 /* We set the perferred console to "hvc". This is the "hypervisor 1096 /* We set the preferred console to "hvc". This is the "hypervisor
1097 * virtual console" driver written by the PowerPC people, which we also 1097 * virtual console" driver written by the PowerPC people, which we also
1098 * adapted for lguest's use. */ 1098 * adapted for lguest's use. */
1099 add_preferred_console("hvc", 0, NULL); 1099 add_preferred_console("hvc", 0, NULL);
diff --git a/arch/x86/mach-voyager/setup.c b/arch/x86/mach-voyager/setup.c
index 0ade62555ff3..66b7eb57d8e4 100644
--- a/arch/x86/mach-voyager/setup.c
+++ b/arch/x86/mach-voyager/setup.c
@@ -34,13 +34,23 @@ void __init intr_init_hook(void)
34 setup_irq(2, &irq2); 34 setup_irq(2, &irq2);
35} 35}
36 36
37void __init pre_setup_arch_hook(void) 37static void voyager_disable_tsc(void)
38{ 38{
39 /* Voyagers run their CPUs from independent clocks, so disable 39 /* Voyagers run their CPUs from independent clocks, so disable
40 * the TSC code because we can't sync them */ 40 * the TSC code because we can't sync them */
41 setup_clear_cpu_cap(X86_FEATURE_TSC); 41 setup_clear_cpu_cap(X86_FEATURE_TSC);
42} 42}
43 43
44void __init pre_setup_arch_hook(void)
45{
46 voyager_disable_tsc();
47}
48
49void __init pre_time_init_hook(void)
50{
51 voyager_disable_tsc();
52}
53
44void __init trap_init_hook(void) 54void __init trap_init_hook(void)
45{ 55{
46} 56}
diff --git a/arch/x86/mach-voyager/voyager_smp.c b/arch/x86/mach-voyager/voyager_smp.c
index 331cd6d56483..328cb0ce62f0 100644
--- a/arch/x86/mach-voyager/voyager_smp.c
+++ b/arch/x86/mach-voyager/voyager_smp.c
@@ -81,7 +81,7 @@ static void enable_local_vic_irq(unsigned int irq);
81static void disable_local_vic_irq(unsigned int irq); 81static void disable_local_vic_irq(unsigned int irq);
82static void before_handle_vic_irq(unsigned int irq); 82static void before_handle_vic_irq(unsigned int irq);
83static void after_handle_vic_irq(unsigned int irq); 83static void after_handle_vic_irq(unsigned int irq);
84static void set_vic_irq_affinity(unsigned int irq, cpumask_t mask); 84static void set_vic_irq_affinity(unsigned int irq, const struct cpumask *mask);
85static void ack_vic_irq(unsigned int irq); 85static void ack_vic_irq(unsigned int irq);
86static void vic_enable_cpi(void); 86static void vic_enable_cpi(void);
87static void do_boot_cpu(__u8 cpuid); 87static void do_boot_cpu(__u8 cpuid);
@@ -211,8 +211,6 @@ static __u32 cpu_booted_map;
211static cpumask_t smp_commenced_mask = CPU_MASK_NONE; 211static cpumask_t smp_commenced_mask = CPU_MASK_NONE;
212 212
213/* This is for the new dynamic CPU boot code */ 213/* This is for the new dynamic CPU boot code */
214cpumask_t cpu_callin_map = CPU_MASK_NONE;
215cpumask_t cpu_callout_map = CPU_MASK_NONE;
216 214
217/* The per processor IRQ masks (these are usually kept in sync) */ 215/* The per processor IRQ masks (these are usually kept in sync) */
218static __u16 vic_irq_mask[NR_CPUS] __cacheline_aligned; 216static __u16 vic_irq_mask[NR_CPUS] __cacheline_aligned;
@@ -378,7 +376,7 @@ void __init find_smp_config(void)
378 cpus_addr(phys_cpu_present_map)[0] |= 376 cpus_addr(phys_cpu_present_map)[0] |=
379 voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK + 377 voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK +
380 3) << 24; 378 3) << 24;
381 cpu_possible_map = phys_cpu_present_map; 379 init_cpu_possible(&phys_cpu_present_map);
382 printk("VOYAGER SMP: phys_cpu_present_map = 0x%lx\n", 380 printk("VOYAGER SMP: phys_cpu_present_map = 0x%lx\n",
383 cpus_addr(phys_cpu_present_map)[0]); 381 cpus_addr(phys_cpu_present_map)[0]);
384 /* Here we set up the VIC to enable SMP */ 382 /* Here we set up the VIC to enable SMP */
@@ -1598,16 +1596,16 @@ static void after_handle_vic_irq(unsigned int irq)
1598 * change the mask and then do an interrupt enable CPI to re-enable on 1596 * change the mask and then do an interrupt enable CPI to re-enable on
1599 * the selected processors */ 1597 * the selected processors */
1600 1598
1601void set_vic_irq_affinity(unsigned int irq, cpumask_t mask) 1599void set_vic_irq_affinity(unsigned int irq, const struct cpumask *mask)
1602{ 1600{
1603 /* Only extended processors handle interrupts */ 1601 /* Only extended processors handle interrupts */
1604 unsigned long real_mask; 1602 unsigned long real_mask;
1605 unsigned long irq_mask = 1 << irq; 1603 unsigned long irq_mask = 1 << irq;
1606 int cpu; 1604 int cpu;
1607 1605
1608 real_mask = cpus_addr(mask)[0] & voyager_extended_vic_processors; 1606 real_mask = cpus_addr(*mask)[0] & voyager_extended_vic_processors;
1609 1607
1610 if (cpus_addr(mask)[0] == 0) 1608 if (cpus_addr(*mask)[0] == 0)
1611 /* can't have no CPUs to accept the interrupt -- extremely 1609 /* can't have no CPUs to accept the interrupt -- extremely
1612 * bad things will happen */ 1610 * bad things will happen */
1613 return; 1611 return;
@@ -1748,10 +1746,11 @@ static void __cpuinit voyager_smp_prepare_boot_cpu(void)
1748{ 1746{
1749 switch_to_new_gdt(); 1747 switch_to_new_gdt();
1750 1748
1751 cpu_set(smp_processor_id(), cpu_online_map); 1749 cpu_online_map = cpumask_of_cpu(smp_processor_id());
1752 cpu_set(smp_processor_id(), cpu_callout_map); 1750 cpu_callout_map = cpumask_of_cpu(smp_processor_id());
1753 cpu_set(smp_processor_id(), cpu_possible_map); 1751 cpu_callin_map = CPU_MASK_NONE;
1754 cpu_set(smp_processor_id(), cpu_present_map); 1752 cpu_present_map = cpumask_of_cpu(smp_processor_id());
1753
1755} 1754}
1756 1755
1757static int __cpuinit voyager_cpu_up(unsigned int cpu) 1756static int __cpuinit voyager_cpu_up(unsigned int cpu)
@@ -1780,9 +1779,9 @@ void __init smp_setup_processor_id(void)
1780 current_thread_info()->cpu = hard_smp_processor_id(); 1779 current_thread_info()->cpu = hard_smp_processor_id();
1781} 1780}
1782 1781
1783static void voyager_send_call_func(cpumask_t callmask) 1782static void voyager_send_call_func(const struct cpumask *callmask)
1784{ 1783{
1785 __u32 mask = cpus_addr(callmask)[0] & ~(1 << smp_processor_id()); 1784 __u32 mask = cpus_addr(*callmask)[0] & ~(1 << smp_processor_id());
1786 send_CPI(mask, VIC_CALL_FUNCTION_CPI); 1785 send_CPI(mask, VIC_CALL_FUNCTION_CPI);
1787} 1786}
1788 1787
diff --git a/arch/x86/pci/irq.c b/arch/x86/pci/irq.c
index 4064345cf144..fecbce6e7d7c 100644
--- a/arch/x86/pci/irq.c
+++ b/arch/x86/pci/irq.c
@@ -572,6 +572,7 @@ static __init int intel_router_probe(struct irq_router *r, struct pci_dev *route
572 case PCI_DEVICE_ID_INTEL_ICH7_1: 572 case PCI_DEVICE_ID_INTEL_ICH7_1:
573 case PCI_DEVICE_ID_INTEL_ICH7_30: 573 case PCI_DEVICE_ID_INTEL_ICH7_30:
574 case PCI_DEVICE_ID_INTEL_ICH7_31: 574 case PCI_DEVICE_ID_INTEL_ICH7_31:
575 case PCI_DEVICE_ID_INTEL_TGP_LPC:
575 case PCI_DEVICE_ID_INTEL_ESB2_0: 576 case PCI_DEVICE_ID_INTEL_ESB2_0:
576 case PCI_DEVICE_ID_INTEL_ICH8_0: 577 case PCI_DEVICE_ID_INTEL_ICH8_0:
577 case PCI_DEVICE_ID_INTEL_ICH8_1: 578 case PCI_DEVICE_ID_INTEL_ICH8_1:
diff --git a/arch/x86/xen/multicalls.h b/arch/x86/xen/multicalls.h
index e786fa7f2615..9e565da5d1f7 100644
--- a/arch/x86/xen/multicalls.h
+++ b/arch/x86/xen/multicalls.h
@@ -19,8 +19,10 @@ DECLARE_PER_CPU(unsigned long, xen_mc_irq_flags);
19 paired with xen_mc_issue() */ 19 paired with xen_mc_issue() */
20static inline void xen_mc_batch(void) 20static inline void xen_mc_batch(void)
21{ 21{
22 unsigned long flags;
22 /* need to disable interrupts until this entry is complete */ 23 /* need to disable interrupts until this entry is complete */
23 local_irq_save(__get_cpu_var(xen_mc_irq_flags)); 24 local_irq_save(flags);
25 __get_cpu_var(xen_mc_irq_flags) = flags;
24} 26}
25 27
26static inline struct multicall_space xen_mc_entry(size_t args) 28static inline struct multicall_space xen_mc_entry(size_t args)