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authorLinus Torvalds <torvalds@linux-foundation.org>2010-03-13 17:45:49 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2010-03-13 17:45:49 -0500
commit15c989d4d14b82f43cae7efc6a7794cdd556f274 (patch)
tree3f1a22991aacf42acaf56467cbe79897146d3e32 /arch/x86
parent4e3eaddd142e2142c048c5052a0a9d2604fccfc6 (diff)
parent0e152cd7c16832bd5cadee0c2e41d9959bc9b6f9 (diff)
Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, k8 nb: Fix boot crash: enable k8_northbridges unconditionally on AMD systems x86, UV: Fix target_cpus() in x2apic_uv_x.c x86: Reduce per cpu warning boot up messages x86: Reduce per cpu MCA boot up messages x86_64, cpa: Don't work hard in preserving kernel 2M mappings when using 4K already
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/Kconfig4
-rw-r--r--arch/x86/kernel/apic/x2apic_uv_x.c4
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce_intel.c4
-rw-r--r--arch/x86/kernel/k8.c14
-rw-r--r--arch/x86/kernel/pci-gart_64.c2
-rw-r--r--arch/x86/kernel/process.c2
-rw-r--r--arch/x86/mm/pageattr.c25
7 files changed, 44 insertions, 11 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 93936de67796..0eacb1ffb421 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -662,7 +662,7 @@ config GART_IOMMU
662 bool "GART IOMMU support" if EMBEDDED 662 bool "GART IOMMU support" if EMBEDDED
663 default y 663 default y
664 select SWIOTLB 664 select SWIOTLB
665 depends on X86_64 && PCI 665 depends on X86_64 && PCI && K8_NB
666 ---help--- 666 ---help---
667 Support for full DMA access of devices with 32bit memory access only 667 Support for full DMA access of devices with 32bit memory access only
668 on systems with more than 3GB. This is usually needed for USB, 668 on systems with more than 3GB. This is usually needed for USB,
@@ -2061,7 +2061,7 @@ endif # X86_32
2061 2061
2062config K8_NB 2062config K8_NB
2063 def_bool y 2063 def_bool y
2064 depends on AGP_AMD64 || (X86_64 && (GART_IOMMU || (PCI && NUMA))) 2064 depends on CPU_SUP_AMD && PCI
2065 2065
2066source "drivers/pcmcia/Kconfig" 2066source "drivers/pcmcia/Kconfig"
2067 2067
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index 3740c8a4eae7..49dbeaef2a27 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -120,11 +120,9 @@ EXPORT_SYMBOL_GPL(uv_possible_blades);
120unsigned long sn_rtc_cycles_per_second; 120unsigned long sn_rtc_cycles_per_second;
121EXPORT_SYMBOL(sn_rtc_cycles_per_second); 121EXPORT_SYMBOL(sn_rtc_cycles_per_second);
122 122
123/* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */
124
125static const struct cpumask *uv_target_cpus(void) 123static const struct cpumask *uv_target_cpus(void)
126{ 124{
127 return cpumask_of(0); 125 return cpu_online_mask;
128} 126}
129 127
130static void uv_vector_allocation_domain(int cpu, struct cpumask *retmask) 128static void uv_vector_allocation_domain(int cpu, struct cpumask *retmask)
diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel.c b/arch/x86/kernel/cpu/mcheck/mce_intel.c
index 7c785634af2b..d15df6e49bf0 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_intel.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_intel.c
@@ -95,7 +95,7 @@ static void cmci_discover(int banks, int boot)
95 95
96 /* Already owned by someone else? */ 96 /* Already owned by someone else? */
97 if (val & CMCI_EN) { 97 if (val & CMCI_EN) {
98 if (test_and_clear_bit(i, owned) || boot) 98 if (test_and_clear_bit(i, owned) && !boot)
99 print_update("SHD", &hdr, i); 99 print_update("SHD", &hdr, i);
100 __clear_bit(i, __get_cpu_var(mce_poll_banks)); 100 __clear_bit(i, __get_cpu_var(mce_poll_banks));
101 continue; 101 continue;
@@ -107,7 +107,7 @@ static void cmci_discover(int banks, int boot)
107 107
108 /* Did the enable bit stick? -- the bank supports CMCI */ 108 /* Did the enable bit stick? -- the bank supports CMCI */
109 if (val & CMCI_EN) { 109 if (val & CMCI_EN) {
110 if (!test_and_set_bit(i, owned) || boot) 110 if (!test_and_set_bit(i, owned) && !boot)
111 print_update("CMCI", &hdr, i); 111 print_update("CMCI", &hdr, i);
112 __clear_bit(i, __get_cpu_var(mce_poll_banks)); 112 __clear_bit(i, __get_cpu_var(mce_poll_banks));
113 } else { 113 } else {
diff --git a/arch/x86/kernel/k8.c b/arch/x86/kernel/k8.c
index cbc4332a77b2..9b895464dd03 100644
--- a/arch/x86/kernel/k8.c
+++ b/arch/x86/kernel/k8.c
@@ -121,3 +121,17 @@ void k8_flush_garts(void)
121} 121}
122EXPORT_SYMBOL_GPL(k8_flush_garts); 122EXPORT_SYMBOL_GPL(k8_flush_garts);
123 123
124static __init int init_k8_nbs(void)
125{
126 int err = 0;
127
128 err = cache_k8_northbridges();
129
130 if (err < 0)
131 printk(KERN_NOTICE "K8 NB: Cannot enumerate AMD northbridges.\n");
132
133 return err;
134}
135
136/* This has to go after the PCI subsystem */
137fs_initcall(init_k8_nbs);
diff --git a/arch/x86/kernel/pci-gart_64.c b/arch/x86/kernel/pci-gart_64.c
index 34de53b46f87..f3af115a573a 100644
--- a/arch/x86/kernel/pci-gart_64.c
+++ b/arch/x86/kernel/pci-gart_64.c
@@ -735,7 +735,7 @@ int __init gart_iommu_init(void)
735 unsigned long scratch; 735 unsigned long scratch;
736 long i; 736 long i;
737 737
738 if (cache_k8_northbridges() < 0 || num_k8_northbridges == 0) 738 if (num_k8_northbridges == 0)
739 return 0; 739 return 0;
740 740
741#ifndef CONFIG_AGP_AMD64 741#ifndef CONFIG_AGP_AMD64
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 02d678065d7d..ad9540676fcc 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -607,7 +607,7 @@ void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
607{ 607{
608#ifdef CONFIG_SMP 608#ifdef CONFIG_SMP
609 if (pm_idle == poll_idle && smp_num_siblings > 1) { 609 if (pm_idle == poll_idle && smp_num_siblings > 1) {
610 printk(KERN_WARNING "WARNING: polling idle and HT enabled," 610 printk_once(KERN_WARNING "WARNING: polling idle and HT enabled,"
611 " performance may degrade.\n"); 611 " performance may degrade.\n");
612 } 612 }
613#endif 613#endif
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 1d4eb93d333c..cf07c26d9a4a 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -291,8 +291,29 @@ static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
291 */ 291 */
292 if (kernel_set_to_readonly && 292 if (kernel_set_to_readonly &&
293 within(address, (unsigned long)_text, 293 within(address, (unsigned long)_text,
294 (unsigned long)__end_rodata_hpage_align)) 294 (unsigned long)__end_rodata_hpage_align)) {
295 pgprot_val(forbidden) |= _PAGE_RW; 295 unsigned int level;
296
297 /*
298 * Don't enforce the !RW mapping for the kernel text mapping,
299 * if the current mapping is already using small page mapping.
300 * No need to work hard to preserve large page mappings in this
301 * case.
302 *
303 * This also fixes the Linux Xen paravirt guest boot failure
304 * (because of unexpected read-only mappings for kernel identity
305 * mappings). In this paravirt guest case, the kernel text
306 * mapping and the kernel identity mapping share the same
307 * page-table pages. Thus we can't really use different
308 * protections for the kernel text and identity mappings. Also,
309 * these shared mappings are made of small page mappings.
310 * Thus this don't enforce !RW mapping for small page kernel
311 * text mapping logic will help Linux Xen parvirt guest boot
312 * aswell.
313 */
314 if (lookup_address(address, &level) && (level != PG_LEVEL_4K))
315 pgprot_val(forbidden) |= _PAGE_RW;
316 }
296#endif 317#endif
297 318
298 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden)); 319 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));