diff options
author | Andreas Herrmann <andreas.herrmann3@amd.com> | 2009-04-09 09:16:17 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2009-04-10 08:21:49 -0400 |
commit | afd9fceec55225d33be878927056a548c2eef26c (patch) | |
tree | 0a71688345a2514d66d5741e096791e93fadda64 /arch/x86 | |
parent | 845d8c761ec763871936c62b837c4a9ea6d0fbdb (diff) |
x86: cacheinfo: use cached K8 NB_MISC devices instead of scanning for it
Impact: avoid code duplication
Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Mark Langsdorf <mark.langsdorf@amd.com>
LKML-Reference: <20090409131617.GI31527@alberich.amd.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86')
-rw-r--r-- | arch/x86/include/asm/k8.h | 8 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/intel_cacheinfo.c | 37 |
2 files changed, 11 insertions, 34 deletions
diff --git a/arch/x86/include/asm/k8.h b/arch/x86/include/asm/k8.h index 54c8cc53b24d..c23b3d171be5 100644 --- a/arch/x86/include/asm/k8.h +++ b/arch/x86/include/asm/k8.h | |||
@@ -12,4 +12,12 @@ extern int cache_k8_northbridges(void); | |||
12 | extern void k8_flush_garts(void); | 12 | extern void k8_flush_garts(void); |
13 | extern int k8_scan_nodes(unsigned long start, unsigned long end); | 13 | extern int k8_scan_nodes(unsigned long start, unsigned long end); |
14 | 14 | ||
15 | #ifdef CONFIG_K8_NB | ||
16 | #define node_to_k8_nb_misc(node) \ | ||
17 | (node < num_k8_northbridges) ? k8_northbridges[node] : NULL | ||
18 | #else | ||
19 | #define node_to_k8_nb_misc(node) NULL | ||
20 | #endif | ||
21 | |||
22 | |||
15 | #endif /* _ASM_X86_K8_H */ | 23 | #endif /* _ASM_X86_K8_H */ |
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c index 1ab46e05adf0..0cde07153697 100644 --- a/arch/x86/kernel/cpu/intel_cacheinfo.c +++ b/arch/x86/kernel/cpu/intel_cacheinfo.c | |||
@@ -17,6 +17,7 @@ | |||
17 | 17 | ||
18 | #include <asm/processor.h> | 18 | #include <asm/processor.h> |
19 | #include <asm/smp.h> | 19 | #include <asm/smp.h> |
20 | #include <asm/k8.h> | ||
20 | 21 | ||
21 | #define LVL_1_INST 1 | 22 | #define LVL_1_INST 1 |
22 | #define LVL_1_DATA 2 | 23 | #define LVL_1_DATA 2 |
@@ -159,14 +160,6 @@ struct _cpuid4_info_regs { | |||
159 | unsigned long can_disable; | 160 | unsigned long can_disable; |
160 | }; | 161 | }; |
161 | 162 | ||
162 | #if defined(CONFIG_PCI) && defined(CONFIG_SYSFS) | ||
163 | static struct pci_device_id k8_nb_id[] = { | ||
164 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x1103) }, | ||
165 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x1203) }, | ||
166 | {} | ||
167 | }; | ||
168 | #endif | ||
169 | |||
170 | unsigned short num_cache_leaves; | 163 | unsigned short num_cache_leaves; |
171 | 164 | ||
172 | /* AMD doesn't have CPUID4. Emulate it here to report the same | 165 | /* AMD doesn't have CPUID4. Emulate it here to report the same |
@@ -704,30 +697,6 @@ static ssize_t show_type(struct _cpuid4_info *this_leaf, char *buf) | |||
704 | #define to_object(k) container_of(k, struct _index_kobject, kobj) | 697 | #define to_object(k) container_of(k, struct _index_kobject, kobj) |
705 | #define to_attr(a) container_of(a, struct _cache_attr, attr) | 698 | #define to_attr(a) container_of(a, struct _cache_attr, attr) |
706 | 699 | ||
707 | #ifdef CONFIG_PCI | ||
708 | static struct pci_dev *get_k8_northbridge(int node) | ||
709 | { | ||
710 | struct pci_dev *dev = NULL; | ||
711 | int i; | ||
712 | |||
713 | for (i = 0; i <= node; i++) { | ||
714 | do { | ||
715 | dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev); | ||
716 | if (!dev) | ||
717 | break; | ||
718 | } while (!pci_match_id(&k8_nb_id[0], dev)); | ||
719 | if (!dev) | ||
720 | break; | ||
721 | } | ||
722 | return dev; | ||
723 | } | ||
724 | #else | ||
725 | static struct pci_dev *get_k8_northbridge(int node) | ||
726 | { | ||
727 | return NULL; | ||
728 | } | ||
729 | #endif | ||
730 | |||
731 | static ssize_t show_cache_disable(struct _cpuid4_info *this_leaf, char *buf) | 700 | static ssize_t show_cache_disable(struct _cpuid4_info *this_leaf, char *buf) |
732 | { | 701 | { |
733 | const struct cpumask *mask = to_cpumask(this_leaf->shared_cpu_map); | 702 | const struct cpumask *mask = to_cpumask(this_leaf->shared_cpu_map); |
@@ -739,7 +708,7 @@ static ssize_t show_cache_disable(struct _cpuid4_info *this_leaf, char *buf) | |||
739 | if (!this_leaf->can_disable) | 708 | if (!this_leaf->can_disable) |
740 | return sprintf(buf, "Feature not enabled\n"); | 709 | return sprintf(buf, "Feature not enabled\n"); |
741 | 710 | ||
742 | dev = get_k8_northbridge(node); | 711 | dev = node_to_k8_nb_misc(node); |
743 | if (!dev) { | 712 | if (!dev) { |
744 | printk(KERN_ERR "Attempting AMD northbridge operation on a system with no northbridge\n"); | 713 | printk(KERN_ERR "Attempting AMD northbridge operation on a system with no northbridge\n"); |
745 | return -EINVAL; | 714 | return -EINVAL; |
@@ -783,7 +752,7 @@ store_cache_disable(struct _cpuid4_info *this_leaf, const char *buf, | |||
783 | return -EINVAL; | 752 | return -EINVAL; |
784 | 753 | ||
785 | val |= 0xc0000000; | 754 | val |= 0xc0000000; |
786 | dev = get_k8_northbridge(node); | 755 | dev = node_to_k8_nb_misc(node); |
787 | if (!dev) { | 756 | if (!dev) { |
788 | printk(KERN_ERR "Attempting AMD northbridge operation on a system with no northbridge\n"); | 757 | printk(KERN_ERR "Attempting AMD northbridge operation on a system with no northbridge\n"); |
789 | return -EINVAL; | 758 | return -EINVAL; |