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authorThomas Gleixner <tglx@linutronix.de>2007-10-17 12:04:36 -0400
committerThomas Gleixner <tglx@inhelltoy.tec.linutronix.de>2007-10-17 14:16:06 -0400
commit6a61f6a55708f5e50c4d78934199e7e9257e6aa2 (patch)
treeb834e5a3a4a73b6c6412afbb3068b4ee32fe936c /arch/x86
parent6d43be8ea8c92a41557dacde94ae73565cbc01f0 (diff)
x86: clean up struct irqaction initializers
clean up struct irqaction initializers to C99. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/kernel/i8259_32.c6
-rw-r--r--arch/x86/mach-default/setup.c6
-rw-r--r--arch/x86/mach-voyager/setup.c6
3 files changed, 15 insertions, 3 deletions
diff --git a/arch/x86/kernel/i8259_32.c b/arch/x86/kernel/i8259_32.c
index 679bb33acbf1..d34a10cc13a7 100644
--- a/arch/x86/kernel/i8259_32.c
+++ b/arch/x86/kernel/i8259_32.c
@@ -349,7 +349,11 @@ static irqreturn_t math_error_irq(int cpl, void *dev_id)
349 * New motherboards sometimes make IRQ 13 be a PCI interrupt, 349 * New motherboards sometimes make IRQ 13 be a PCI interrupt,
350 * so allow interrupt sharing. 350 * so allow interrupt sharing.
351 */ 351 */
352static struct irqaction fpu_irq = { math_error_irq, 0, CPU_MASK_NONE, "fpu", NULL, NULL }; 352static struct irqaction fpu_irq = {
353 .handler = math_error_irq,
354 .mask = CPU_MASK_NONE,
355 .name = "fpu",
356};
353 357
354void __init init_ISA_irqs (void) 358void __init init_ISA_irqs (void)
355{ 359{
diff --git a/arch/x86/mach-default/setup.c b/arch/x86/mach-default/setup.c
index 1bd82983986d..3f08010f3517 100644
--- a/arch/x86/mach-default/setup.c
+++ b/arch/x86/mach-default/setup.c
@@ -35,7 +35,11 @@ void __init pre_intr_init_hook(void)
35/* 35/*
36 * IRQ2 is cascade interrupt to second interrupt controller 36 * IRQ2 is cascade interrupt to second interrupt controller
37 */ 37 */
38static struct irqaction irq2 = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL}; 38static struct irqaction irq2 = {
39 .handler = no_action,
40 .mask = CPU_MASK_NONE,
41 .name = "cascade",
42};
39 43
40/** 44/**
41 * intr_init_hook - post gate setup interrupt initialisation 45 * intr_init_hook - post gate setup interrupt initialisation
diff --git a/arch/x86/mach-voyager/setup.c b/arch/x86/mach-voyager/setup.c
index a0ab4002abcd..3bef977cb29b 100644
--- a/arch/x86/mach-voyager/setup.c
+++ b/arch/x86/mach-voyager/setup.c
@@ -18,7 +18,11 @@ void __init pre_intr_init_hook(void)
18/* 18/*
19 * IRQ2 is cascade interrupt to second interrupt controller 19 * IRQ2 is cascade interrupt to second interrupt controller
20 */ 20 */
21static struct irqaction irq2 = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL}; 21static struct irqaction irq2 = {
22 .handler = no_action,
23 .mask = CPU_MASK_NONE,
24 .name = "cascade",
25};
22 26
23void __init intr_init_hook(void) 27void __init intr_init_hook(void)
24{ 28{