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authorJiri Kosina <jkosina@suse.cz>2010-08-04 09:14:38 -0400
committerJiri Kosina <jkosina@suse.cz>2010-08-04 09:14:38 -0400
commitd790d4d583aeaed9fc6f8a9f4d9f8ce6b1c15c7f (patch)
tree854ab394486288d40fa8179cbfaf66e8bdc44b0f /arch/x86
parent73b2c7165b76b20eb1290e7efebc33cfd21db1ca (diff)
parent3a09b1be53d23df780a0cd0e4087a05e2ca4a00c (diff)
Merge branch 'master' into for-next
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/boot/video-vga.c3
-rw-r--r--arch/x86/include/asm/io_apic.h4
-rw-r--r--arch/x86/include/asm/percpu.h2
-rw-r--r--arch/x86/include/asm/pgtable_32_types.h2
-rw-r--r--arch/x86/include/asm/system.h2
-rw-r--r--arch/x86/include/asm/x86_init.h2
-rw-r--r--arch/x86/kernel/acpi/boot.c8
-rw-r--r--arch/x86/kernel/acpi/cstate.c9
-rw-r--r--arch/x86/kernel/acpi/sleep.c9
-rw-r--r--arch/x86/kernel/apic/apic.c2
-rw-r--r--arch/x86/kernel/apic/io_apic.c12
-rw-r--r--arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c41
-rw-r--r--arch/x86/kernel/cpu/cpufreq/powernow-k8.c11
-rw-r--r--arch/x86/kernel/cpu/perf_event_amd.c4
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel.c1
-rw-r--r--arch/x86/kernel/e820.c2
-rw-r--r--arch/x86/kernel/early-quirks.c18
-rw-r--r--arch/x86/kernel/entry_64.S4
-rw-r--r--arch/x86/kernel/hpet.c2
-rw-r--r--arch/x86/kernel/i8259.c25
-rw-r--r--arch/x86/kernel/kgdb.c9
-rw-r--r--arch/x86/kernel/kprobes.c2
-rw-r--r--arch/x86/kernel/mpparse.c2
-rw-r--r--arch/x86/kernel/mrst.c7
-rw-r--r--arch/x86/kernel/pci-calgary_64.c17
-rw-r--r--arch/x86/kernel/quirks.c5
-rw-r--r--arch/x86/kernel/reboot.c8
-rw-r--r--arch/x86/kernel/setup_percpu.c17
-rw-r--r--arch/x86/kernel/sfi.c2
-rw-r--r--arch/x86/kernel/traps.c11
-rw-r--r--arch/x86/kernel/x86_init.c7
-rw-r--r--arch/x86/kvm/mmu.c4
-rw-r--r--arch/x86/kvm/paging_tmpl.h1
-rw-r--r--arch/x86/kvm/vmx.c7
-rw-r--r--arch/x86/kvm/x86.c4
-rw-r--r--arch/x86/mm/pat.c2
-rw-r--r--arch/x86/mm/pat_rbtree.c35
-rw-r--r--arch/x86/pci/i386.c1
-rw-r--r--arch/x86/pci/mrst.c7
39 files changed, 182 insertions, 129 deletions
diff --git a/arch/x86/boot/video-vga.c b/arch/x86/boot/video-vga.c
index ed7aeff786b2..45bc9402aa49 100644
--- a/arch/x86/boot/video-vga.c
+++ b/arch/x86/boot/video-vga.c
@@ -41,13 +41,12 @@ static __videocard video_vga;
41static u8 vga_set_basic_mode(void) 41static u8 vga_set_basic_mode(void)
42{ 42{
43 struct biosregs ireg, oreg; 43 struct biosregs ireg, oreg;
44 u16 ax;
45 u8 mode; 44 u8 mode;
46 45
47 initregs(&ireg); 46 initregs(&ireg);
48 47
49 /* Query current mode */ 48 /* Query current mode */
50 ax = 0x0f00; 49 ireg.ax = 0x0f00;
51 intcall(0x10, &ireg, &oreg); 50 intcall(0x10, &ireg, &oreg);
52 mode = oreg.al; 51 mode = oreg.al;
53 52
diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 63cb4096c3dc..9cb2edb87c2f 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -183,7 +183,7 @@ struct mp_ioapic_gsi{
183 u32 gsi_end; 183 u32 gsi_end;
184}; 184};
185extern struct mp_ioapic_gsi mp_gsi_routing[]; 185extern struct mp_ioapic_gsi mp_gsi_routing[];
186extern u32 gsi_end; 186extern u32 gsi_top;
187int mp_find_ioapic(u32 gsi); 187int mp_find_ioapic(u32 gsi);
188int mp_find_ioapic_pin(int ioapic, u32 gsi); 188int mp_find_ioapic_pin(int ioapic, u32 gsi);
189void __init mp_register_ioapic(int id, u32 address, u32 gsi_base); 189void __init mp_register_ioapic(int id, u32 address, u32 gsi_base);
@@ -197,7 +197,7 @@ static const int timer_through_8259 = 0;
197static inline void ioapic_init_mappings(void) { } 197static inline void ioapic_init_mappings(void) { }
198static inline void ioapic_insert_resources(void) { } 198static inline void ioapic_insert_resources(void) { }
199static inline void probe_nr_irqs_gsi(void) { } 199static inline void probe_nr_irqs_gsi(void) { }
200#define gsi_end (NR_IRQS_LEGACY - 1) 200#define gsi_top (NR_IRQS_LEGACY)
201static inline int mp_find_ioapic(u32 gsi) { return 0; } 201static inline int mp_find_ioapic(u32 gsi) { return 0; }
202 202
203struct io_apic_irq_attr; 203struct io_apic_irq_attr;
diff --git a/arch/x86/include/asm/percpu.h b/arch/x86/include/asm/percpu.h
index 0797e748d280..cd28f9ad910d 100644
--- a/arch/x86/include/asm/percpu.h
+++ b/arch/x86/include/asm/percpu.h
@@ -77,6 +77,7 @@ do { \
77 if (0) { \ 77 if (0) { \
78 pto_T__ pto_tmp__; \ 78 pto_T__ pto_tmp__; \
79 pto_tmp__ = (val); \ 79 pto_tmp__ = (val); \
80 (void)pto_tmp__; \
80 } \ 81 } \
81 switch (sizeof(var)) { \ 82 switch (sizeof(var)) { \
82 case 1: \ 83 case 1: \
@@ -115,6 +116,7 @@ do { \
115 if (0) { \ 116 if (0) { \
116 pao_T__ pao_tmp__; \ 117 pao_T__ pao_tmp__; \
117 pao_tmp__ = (val); \ 118 pao_tmp__ = (val); \
119 (void)pao_tmp__; \
118 } \ 120 } \
119 switch (sizeof(var)) { \ 121 switch (sizeof(var)) { \
120 case 1: \ 122 case 1: \
diff --git a/arch/x86/include/asm/pgtable_32_types.h b/arch/x86/include/asm/pgtable_32_types.h
index 5e67c1532314..ed5903be26fe 100644
--- a/arch/x86/include/asm/pgtable_32_types.h
+++ b/arch/x86/include/asm/pgtable_32_types.h
@@ -26,7 +26,7 @@
26 */ 26 */
27#define VMALLOC_OFFSET (8 * 1024 * 1024) 27#define VMALLOC_OFFSET (8 * 1024 * 1024)
28 28
29#ifndef __ASSEMBLER__ 29#ifndef __ASSEMBLY__
30extern bool __vmalloc_start_set; /* set once high_memory is set */ 30extern bool __vmalloc_start_set; /* set once high_memory is set */
31#endif 31#endif
32 32
diff --git a/arch/x86/include/asm/system.h b/arch/x86/include/asm/system.h
index b8fe48ee2ed9..e7f4d33c55ed 100644
--- a/arch/x86/include/asm/system.h
+++ b/arch/x86/include/asm/system.h
@@ -451,7 +451,7 @@ void stop_this_cpu(void *dummy);
451 * 451 *
452 * (Could use an alternative three way for this if there was one.) 452 * (Could use an alternative three way for this if there was one.)
453 */ 453 */
454static inline void rdtsc_barrier(void) 454static __always_inline void rdtsc_barrier(void)
455{ 455{
456 alternative(ASM_NOP3, "mfence", X86_FEATURE_MFENCE_RDTSC); 456 alternative(ASM_NOP3, "mfence", X86_FEATURE_MFENCE_RDTSC);
457 alternative(ASM_NOP3, "lfence", X86_FEATURE_LFENCE_RDTSC); 457 alternative(ASM_NOP3, "lfence", X86_FEATURE_LFENCE_RDTSC);
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index 519b54327d75..baa579c8e038 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -142,6 +142,7 @@ struct x86_cpuinit_ops {
142 * @set_wallclock: set time back to HW clock 142 * @set_wallclock: set time back to HW clock
143 * @is_untracked_pat_range exclude from PAT logic 143 * @is_untracked_pat_range exclude from PAT logic
144 * @nmi_init enable NMI on cpus 144 * @nmi_init enable NMI on cpus
145 * @i8042_detect pre-detect if i8042 controller exists
145 */ 146 */
146struct x86_platform_ops { 147struct x86_platform_ops {
147 unsigned long (*calibrate_tsc)(void); 148 unsigned long (*calibrate_tsc)(void);
@@ -150,6 +151,7 @@ struct x86_platform_ops {
150 void (*iommu_shutdown)(void); 151 void (*iommu_shutdown)(void);
151 bool (*is_untracked_pat_range)(u64 start, u64 end); 152 bool (*is_untracked_pat_range)(u64 start, u64 end);
152 void (*nmi_init)(void); 153 void (*nmi_init)(void);
154 int (*i8042_detect)(void);
153}; 155};
154 156
155extern struct x86_init_ops x86_init; 157extern struct x86_init_ops x86_init;
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index 60cc4058ed5f..c05872aa3ce0 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -118,7 +118,7 @@ static unsigned int gsi_to_irq(unsigned int gsi)
118 if (gsi >= NR_IRQS_LEGACY) 118 if (gsi >= NR_IRQS_LEGACY)
119 irq = gsi; 119 irq = gsi;
120 else 120 else
121 irq = gsi_end + 1 + gsi; 121 irq = gsi_top + gsi;
122 122
123 return irq; 123 return irq;
124} 124}
@@ -129,10 +129,10 @@ static u32 irq_to_gsi(int irq)
129 129
130 if (irq < NR_IRQS_LEGACY) 130 if (irq < NR_IRQS_LEGACY)
131 gsi = isa_irq_to_gsi[irq]; 131 gsi = isa_irq_to_gsi[irq];
132 else if (irq <= gsi_end) 132 else if (irq < gsi_top)
133 gsi = irq; 133 gsi = irq;
134 else if (irq <= (gsi_end + NR_IRQS_LEGACY)) 134 else if (irq < (gsi_top + NR_IRQS_LEGACY))
135 gsi = irq - gsi_end; 135 gsi = irq - gsi_top;
136 else 136 else
137 gsi = 0xffffffff; 137 gsi = 0xffffffff;
138 138
diff --git a/arch/x86/kernel/acpi/cstate.c b/arch/x86/kernel/acpi/cstate.c
index 2e837f5080fe..fb7a5f052e2b 100644
--- a/arch/x86/kernel/acpi/cstate.c
+++ b/arch/x86/kernel/acpi/cstate.c
@@ -145,6 +145,15 @@ int acpi_processor_ffh_cstate_probe(unsigned int cpu,
145 percpu_entry->states[cx->index].eax = cx->address; 145 percpu_entry->states[cx->index].eax = cx->address;
146 percpu_entry->states[cx->index].ecx = MWAIT_ECX_INTERRUPT_BREAK; 146 percpu_entry->states[cx->index].ecx = MWAIT_ECX_INTERRUPT_BREAK;
147 } 147 }
148
149 /*
150 * For _CST FFH on Intel, if GAS.access_size bit 1 is cleared,
151 * then we should skip checking BM_STS for this C-state.
152 * ref: "Intel Processor Vendor-Specific ACPI Interface Specification"
153 */
154 if ((c->x86_vendor == X86_VENDOR_INTEL) && !(reg->access_size & 0x2))
155 cx->bm_sts_skip = 1;
156
148 return retval; 157 return retval;
149} 158}
150EXPORT_SYMBOL_GPL(acpi_processor_ffh_cstate_probe); 159EXPORT_SYMBOL_GPL(acpi_processor_ffh_cstate_probe);
diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c
index f51cc55aced6..33cec152070d 100644
--- a/arch/x86/kernel/acpi/sleep.c
+++ b/arch/x86/kernel/acpi/sleep.c
@@ -157,9 +157,14 @@ static int __init acpi_sleep_setup(char *str)
157#ifdef CONFIG_HIBERNATION 157#ifdef CONFIG_HIBERNATION
158 if (strncmp(str, "s4_nohwsig", 10) == 0) 158 if (strncmp(str, "s4_nohwsig", 10) == 0)
159 acpi_no_s4_hw_signature(); 159 acpi_no_s4_hw_signature();
160 if (strncmp(str, "s4_nonvs", 8) == 0) 160 if (strncmp(str, "s4_nonvs", 8) == 0) {
161 acpi_s4_no_nvs(); 161 pr_warning("ACPI: acpi_sleep=s4_nonvs is deprecated, "
162 "please use acpi_sleep=nonvs instead");
163 acpi_nvs_nosave();
164 }
162#endif 165#endif
166 if (strncmp(str, "nonvs", 5) == 0)
167 acpi_nvs_nosave();
163 if (strncmp(str, "old_ordering", 12) == 0) 168 if (strncmp(str, "old_ordering", 12) == 0)
164 acpi_old_suspend_ordering(); 169 acpi_old_suspend_ordering();
165 str = strchr(str, ','); 170 str = strchr(str, ',');
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 0bcc5aeda998..980508c79082 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -921,7 +921,7 @@ void disable_local_APIC(void)
921 unsigned int value; 921 unsigned int value;
922 922
923 /* APIC hasn't been mapped yet */ 923 /* APIC hasn't been mapped yet */
924 if (!apic_phys) 924 if (!x2apic_mode && !apic_phys)
925 return; 925 return;
926 926
927 clear_local_APIC(); 927 clear_local_APIC();
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 33f3563a2a52..e41ed24ab26d 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -89,8 +89,8 @@ int nr_ioapics;
89/* IO APIC gsi routing info */ 89/* IO APIC gsi routing info */
90struct mp_ioapic_gsi mp_gsi_routing[MAX_IO_APICS]; 90struct mp_ioapic_gsi mp_gsi_routing[MAX_IO_APICS];
91 91
92/* The last gsi number used */ 92/* The one past the highest gsi number used */
93u32 gsi_end; 93u32 gsi_top;
94 94
95/* MP IRQ source entries */ 95/* MP IRQ source entries */
96struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES]; 96struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES];
@@ -1035,7 +1035,7 @@ static int pin_2_irq(int idx, int apic, int pin)
1035 if (gsi >= NR_IRQS_LEGACY) 1035 if (gsi >= NR_IRQS_LEGACY)
1036 irq = gsi; 1036 irq = gsi;
1037 else 1037 else
1038 irq = gsi_end + 1 + gsi; 1038 irq = gsi_top + gsi;
1039 } 1039 }
1040 1040
1041#ifdef CONFIG_X86_32 1041#ifdef CONFIG_X86_32
@@ -3853,7 +3853,7 @@ void __init probe_nr_irqs_gsi(void)
3853{ 3853{
3854 int nr; 3854 int nr;
3855 3855
3856 nr = gsi_end + 1 + NR_IRQS_LEGACY; 3856 nr = gsi_top + NR_IRQS_LEGACY;
3857 if (nr > nr_irqs_gsi) 3857 if (nr > nr_irqs_gsi)
3858 nr_irqs_gsi = nr; 3858 nr_irqs_gsi = nr;
3859 3859
@@ -4294,8 +4294,8 @@ void __init mp_register_ioapic(int id, u32 address, u32 gsi_base)
4294 */ 4294 */
4295 nr_ioapic_registers[idx] = entries; 4295 nr_ioapic_registers[idx] = entries;
4296 4296
4297 if (mp_gsi_routing[idx].gsi_end > gsi_end) 4297 if (mp_gsi_routing[idx].gsi_end >= gsi_top)
4298 gsi_end = mp_gsi_routing[idx].gsi_end; 4298 gsi_top = mp_gsi_routing[idx].gsi_end + 1;
4299 4299
4300 printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, address 0x%x, " 4300 printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, address 0x%x, "
4301 "GSI %d-%d\n", idx, mp_ioapics[idx].apicid, 4301 "GSI %d-%d\n", idx, mp_ioapics[idx].apicid,
diff --git a/arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c b/arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c
index ce7cde713e71..a36de5bbb622 100644
--- a/arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c
+++ b/arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c
@@ -368,22 +368,16 @@ static int __init pcc_cpufreq_do_osc(acpi_handle *handle)
368 return -ENODEV; 368 return -ENODEV;
369 369
370 out_obj = output.pointer; 370 out_obj = output.pointer;
371 if (out_obj->type != ACPI_TYPE_BUFFER) { 371 if (out_obj->type != ACPI_TYPE_BUFFER)
372 ret = -ENODEV; 372 return -ENODEV;
373 goto out_free;
374 }
375 373
376 errors = *((u32 *)out_obj->buffer.pointer) & ~(1 << 0); 374 errors = *((u32 *)out_obj->buffer.pointer) & ~(1 << 0);
377 if (errors) { 375 if (errors)
378 ret = -ENODEV; 376 return -ENODEV;
379 goto out_free;
380 }
381 377
382 supported = *((u32 *)(out_obj->buffer.pointer + 4)); 378 supported = *((u32 *)(out_obj->buffer.pointer + 4));
383 if (!(supported & 0x1)) { 379 if (!(supported & 0x1))
384 ret = -ENODEV; 380 return -ENODEV;
385 goto out_free;
386 }
387 381
388out_free: 382out_free:
389 kfree(output.pointer); 383 kfree(output.pointer);
@@ -397,13 +391,17 @@ static int __init pcc_cpufreq_probe(void)
397 struct pcc_memory_resource *mem_resource; 391 struct pcc_memory_resource *mem_resource;
398 struct pcc_register_resource *reg_resource; 392 struct pcc_register_resource *reg_resource;
399 union acpi_object *out_obj, *member; 393 union acpi_object *out_obj, *member;
400 acpi_handle handle, osc_handle; 394 acpi_handle handle, osc_handle, pcch_handle;
401 int ret = 0; 395 int ret = 0;
402 396
403 status = acpi_get_handle(NULL, "\\_SB", &handle); 397 status = acpi_get_handle(NULL, "\\_SB", &handle);
404 if (ACPI_FAILURE(status)) 398 if (ACPI_FAILURE(status))
405 return -ENODEV; 399 return -ENODEV;
406 400
401 status = acpi_get_handle(handle, "PCCH", &pcch_handle);
402 if (ACPI_FAILURE(status))
403 return -ENODEV;
404
407 status = acpi_get_handle(handle, "_OSC", &osc_handle); 405 status = acpi_get_handle(handle, "_OSC", &osc_handle);
408 if (ACPI_SUCCESS(status)) { 406 if (ACPI_SUCCESS(status)) {
409 ret = pcc_cpufreq_do_osc(&osc_handle); 407 ret = pcc_cpufreq_do_osc(&osc_handle);
@@ -543,13 +541,13 @@ static int pcc_cpufreq_cpu_init(struct cpufreq_policy *policy)
543 541
544 if (!pcch_virt_addr) { 542 if (!pcch_virt_addr) {
545 result = -1; 543 result = -1;
546 goto pcch_null; 544 goto out;
547 } 545 }
548 546
549 result = pcc_get_offset(cpu); 547 result = pcc_get_offset(cpu);
550 if (result) { 548 if (result) {
551 dprintk("init: PCCP evaluation failed\n"); 549 dprintk("init: PCCP evaluation failed\n");
552 goto free; 550 goto out;
553 } 551 }
554 552
555 policy->max = policy->cpuinfo.max_freq = 553 policy->max = policy->cpuinfo.max_freq =
@@ -558,14 +556,15 @@ static int pcc_cpufreq_cpu_init(struct cpufreq_policy *policy)
558 ioread32(&pcch_hdr->minimum_frequency) * 1000; 556 ioread32(&pcch_hdr->minimum_frequency) * 1000;
559 policy->cur = pcc_get_freq(cpu); 557 policy->cur = pcc_get_freq(cpu);
560 558
559 if (!policy->cur) {
560 dprintk("init: Unable to get current CPU frequency\n");
561 result = -EINVAL;
562 goto out;
563 }
564
561 dprintk("init: policy->max is %d, policy->min is %d\n", 565 dprintk("init: policy->max is %d, policy->min is %d\n",
562 policy->max, policy->min); 566 policy->max, policy->min);
563 567out:
564 return 0;
565free:
566 pcc_clear_mapping();
567 free_percpu(pcc_cpu_info);
568pcch_null:
569 return result; 568 return result;
570} 569}
571 570
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
index 0af9aa20fce1..1376f4144b3f 100644
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
@@ -1023,13 +1023,12 @@ static int get_transition_latency(struct powernow_k8_data *data)
1023 } 1023 }
1024 if (max_latency == 0) { 1024 if (max_latency == 0) {
1025 /* 1025 /*
1026 * Fam 11h always returns 0 as transition latency. 1026 * Fam 11h and later may return 0 as transition latency. This
1027 * This is intended and means "very fast". While cpufreq core 1027 * is intended and means "very fast". While cpufreq core and
1028 * and governors currently can handle that gracefully, better 1028 * governors currently can handle that gracefully, better set it
1029 * set it to 1 to avoid problems in the future. 1029 * to 1 to avoid problems in the future.
1030 * For all others it's a BIOS bug.
1031 */ 1030 */
1032 if (boot_cpu_data.x86 != 0x11) 1031 if (boot_cpu_data.x86 < 0x11)
1033 printk(KERN_ERR FW_WARN PFX "Invalid zero transition " 1032 printk(KERN_ERR FW_WARN PFX "Invalid zero transition "
1034 "latency\n"); 1033 "latency\n");
1035 max_latency = 1; 1034 max_latency = 1;
diff --git a/arch/x86/kernel/cpu/perf_event_amd.c b/arch/x86/kernel/cpu/perf_event_amd.c
index 611df11ba15e..c2897b7b4a3b 100644
--- a/arch/x86/kernel/cpu/perf_event_amd.c
+++ b/arch/x86/kernel/cpu/perf_event_amd.c
@@ -102,8 +102,8 @@ static const u64 amd_perfmon_event_map[] =
102 [PERF_COUNT_HW_INSTRUCTIONS] = 0x00c0, 102 [PERF_COUNT_HW_INSTRUCTIONS] = 0x00c0,
103 [PERF_COUNT_HW_CACHE_REFERENCES] = 0x0080, 103 [PERF_COUNT_HW_CACHE_REFERENCES] = 0x0080,
104 [PERF_COUNT_HW_CACHE_MISSES] = 0x0081, 104 [PERF_COUNT_HW_CACHE_MISSES] = 0x0081,
105 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x00c4, 105 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x00c2,
106 [PERF_COUNT_HW_BRANCH_MISSES] = 0x00c5, 106 [PERF_COUNT_HW_BRANCH_MISSES] = 0x00c3,
107}; 107};
108 108
109static u64 amd_pmu_event_map(int hw_event) 109static u64 amd_pmu_event_map(int hw_event)
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index fdbc652d3feb..214ac860ebe0 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -72,6 +72,7 @@ static struct event_constraint intel_westmere_event_constraints[] =
72 INTEL_EVENT_CONSTRAINT(0x51, 0x3), /* L1D */ 72 INTEL_EVENT_CONSTRAINT(0x51, 0x3), /* L1D */
73 INTEL_EVENT_CONSTRAINT(0x60, 0x1), /* OFFCORE_REQUESTS_OUTSTANDING */ 73 INTEL_EVENT_CONSTRAINT(0x60, 0x1), /* OFFCORE_REQUESTS_OUTSTANDING */
74 INTEL_EVENT_CONSTRAINT(0x63, 0x3), /* CACHE_LOCK_CYCLES */ 74 INTEL_EVENT_CONSTRAINT(0x63, 0x3), /* CACHE_LOCK_CYCLES */
75 INTEL_EVENT_CONSTRAINT(0xb3, 0x1), /* SNOOPQ_REQUEST_OUTSTANDING */
75 EVENT_CONSTRAINT_END 76 EVENT_CONSTRAINT_END
76}; 77};
77 78
diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c
index 7bca3c6a02fb..0d6fc71bedb1 100644
--- a/arch/x86/kernel/e820.c
+++ b/arch/x86/kernel/e820.c
@@ -729,7 +729,7 @@ static int __init e820_mark_nvs_memory(void)
729 struct e820entry *ei = &e820.map[i]; 729 struct e820entry *ei = &e820.map[i];
730 730
731 if (ei->type == E820_NVS) 731 if (ei->type == E820_NVS)
732 hibernate_nvs_register(ei->addr, ei->size); 732 suspend_nvs_register(ei->addr, ei->size);
733 } 733 }
734 734
735 return 0; 735 return 0;
diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
index ebdb85cf2686..e5cc7e82e60d 100644
--- a/arch/x86/kernel/early-quirks.c
+++ b/arch/x86/kernel/early-quirks.c
@@ -18,6 +18,7 @@
18#include <asm/apic.h> 18#include <asm/apic.h>
19#include <asm/iommu.h> 19#include <asm/iommu.h>
20#include <asm/gart.h> 20#include <asm/gart.h>
21#include <asm/hpet.h>
21 22
22static void __init fix_hypertransport_config(int num, int slot, int func) 23static void __init fix_hypertransport_config(int num, int slot, int func)
23{ 24{
@@ -191,6 +192,21 @@ static void __init ati_bugs_contd(int num, int slot, int func)
191} 192}
192#endif 193#endif
193 194
195/*
196 * Force the read back of the CMP register in hpet_next_event()
197 * to work around the problem that the CMP register write seems to be
198 * delayed. See hpet_next_event() for details.
199 *
200 * We do this on all SMBUS incarnations for now until we have more
201 * information about the affected chipsets.
202 */
203static void __init ati_hpet_bugs(int num, int slot, int func)
204{
205#ifdef CONFIG_HPET_TIMER
206 hpet_readback_cmp = 1;
207#endif
208}
209
194#define QFLAG_APPLY_ONCE 0x1 210#define QFLAG_APPLY_ONCE 0x1
195#define QFLAG_APPLIED 0x2 211#define QFLAG_APPLIED 0x2
196#define QFLAG_DONE (QFLAG_APPLY_ONCE|QFLAG_APPLIED) 212#define QFLAG_DONE (QFLAG_APPLY_ONCE|QFLAG_APPLIED)
@@ -220,6 +236,8 @@ static struct chipset early_qrk[] __initdata = {
220 PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs }, 236 PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs },
221 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS, 237 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS,
222 PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs_contd }, 238 PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs_contd },
239 { PCI_VENDOR_ID_ATI, PCI_ANY_ID,
240 PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_hpet_bugs },
223 {} 241 {}
224}; 242};
225 243
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
index 0697ff139837..4db7c4d12ffa 100644
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -571,8 +571,8 @@ auditsys:
571 * masked off. 571 * masked off.
572 */ 572 */
573sysret_audit: 573sysret_audit:
574 movq %rax,%rsi /* second arg, syscall return value */ 574 movq RAX-ARGOFFSET(%rsp),%rsi /* second arg, syscall return value */
575 cmpq $0,%rax /* is it < 0? */ 575 cmpq $0,%rsi /* is it < 0? */
576 setl %al /* 1 if so, 0 if not */ 576 setl %al /* 1 if so, 0 if not */
577 movzbl %al,%edi /* zero-extend that into %edi */ 577 movzbl %al,%edi /* zero-extend that into %edi */
578 inc %edi /* first arg, 0->1(AUDITSC_SUCCESS), 1->2(AUDITSC_FAILURE) */ 578 inc %edi /* first arg, 0->1(AUDITSC_SUCCESS), 1->2(AUDITSC_FAILURE) */
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index a198b7c87a12..ba390d731175 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -964,7 +964,7 @@ fs_initcall(hpet_late_init);
964 964
965void hpet_disable(void) 965void hpet_disable(void)
966{ 966{
967 if (is_hpet_capable()) { 967 if (is_hpet_capable() && hpet_virt_address) {
968 unsigned int cfg = hpet_readl(HPET_CFG); 968 unsigned int cfg = hpet_readl(HPET_CFG);
969 969
970 if (hpet_legacy_int_enabled) { 970 if (hpet_legacy_int_enabled) {
diff --git a/arch/x86/kernel/i8259.c b/arch/x86/kernel/i8259.c
index 7c9f02c130f3..cafa7c80ac95 100644
--- a/arch/x86/kernel/i8259.c
+++ b/arch/x86/kernel/i8259.c
@@ -276,16 +276,6 @@ static struct sys_device device_i8259A = {
276 .cls = &i8259_sysdev_class, 276 .cls = &i8259_sysdev_class,
277}; 277};
278 278
279static int __init i8259A_init_sysfs(void)
280{
281 int error = sysdev_class_register(&i8259_sysdev_class);
282 if (!error)
283 error = sysdev_register(&device_i8259A);
284 return error;
285}
286
287device_initcall(i8259A_init_sysfs);
288
289static void mask_8259A(void) 279static void mask_8259A(void)
290{ 280{
291 unsigned long flags; 281 unsigned long flags;
@@ -407,3 +397,18 @@ struct legacy_pic default_legacy_pic = {
407}; 397};
408 398
409struct legacy_pic *legacy_pic = &default_legacy_pic; 399struct legacy_pic *legacy_pic = &default_legacy_pic;
400
401static int __init i8259A_init_sysfs(void)
402{
403 int error;
404
405 if (legacy_pic != &default_legacy_pic)
406 return 0;
407
408 error = sysdev_class_register(&i8259_sysdev_class);
409 if (!error)
410 error = sysdev_register(&device_i8259A);
411 return error;
412}
413
414device_initcall(i8259A_init_sysfs);
diff --git a/arch/x86/kernel/kgdb.c b/arch/x86/kernel/kgdb.c
index 4f4af75b9482..01ab17ae2ae7 100644
--- a/arch/x86/kernel/kgdb.c
+++ b/arch/x86/kernel/kgdb.c
@@ -572,7 +572,6 @@ static int __kgdb_notify(struct die_args *args, unsigned long cmd)
572 return NOTIFY_STOP; 572 return NOTIFY_STOP;
573} 573}
574 574
575#ifdef CONFIG_KGDB_LOW_LEVEL_TRAP
576int kgdb_ll_trap(int cmd, const char *str, 575int kgdb_ll_trap(int cmd, const char *str,
577 struct pt_regs *regs, long err, int trap, int sig) 576 struct pt_regs *regs, long err, int trap, int sig)
578{ 577{
@@ -590,7 +589,6 @@ int kgdb_ll_trap(int cmd, const char *str,
590 589
591 return __kgdb_notify(&args, cmd); 590 return __kgdb_notify(&args, cmd);
592} 591}
593#endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */
594 592
595static int 593static int
596kgdb_notify(struct notifier_block *self, unsigned long cmd, void *ptr) 594kgdb_notify(struct notifier_block *self, unsigned long cmd, void *ptr)
@@ -625,6 +623,12 @@ int kgdb_arch_init(void)
625 return register_die_notifier(&kgdb_notifier); 623 return register_die_notifier(&kgdb_notifier);
626} 624}
627 625
626static void kgdb_hw_overflow_handler(struct perf_event *event, int nmi,
627 struct perf_sample_data *data, struct pt_regs *regs)
628{
629 kgdb_ll_trap(DIE_DEBUG, "debug", regs, 0, 0, SIGTRAP);
630}
631
628void kgdb_arch_late(void) 632void kgdb_arch_late(void)
629{ 633{
630 int i, cpu; 634 int i, cpu;
@@ -655,6 +659,7 @@ void kgdb_arch_late(void)
655 for_each_online_cpu(cpu) { 659 for_each_online_cpu(cpu) {
656 pevent = per_cpu_ptr(breakinfo[i].pev, cpu); 660 pevent = per_cpu_ptr(breakinfo[i].pev, cpu);
657 pevent[0]->hw.sample_period = 1; 661 pevent[0]->hw.sample_period = 1;
662 pevent[0]->overflow_handler = kgdb_hw_overflow_handler;
658 if (pevent[0]->destroy != NULL) { 663 if (pevent[0]->destroy != NULL) {
659 pevent[0]->destroy = NULL; 664 pevent[0]->destroy = NULL;
660 release_bp_slot(*pevent); 665 release_bp_slot(*pevent);
diff --git a/arch/x86/kernel/kprobes.c b/arch/x86/kernel/kprobes.c
index 345a4b1fe144..675879b65ce6 100644
--- a/arch/x86/kernel/kprobes.c
+++ b/arch/x86/kernel/kprobes.c
@@ -640,8 +640,8 @@ static int __kprobes kprobe_handler(struct pt_regs *regs)
640 /* Skip cs, ip, orig_ax and gs. */ \ 640 /* Skip cs, ip, orig_ax and gs. */ \
641 " subl $16, %esp\n" \ 641 " subl $16, %esp\n" \
642 " pushl %fs\n" \ 642 " pushl %fs\n" \
643 " pushl %ds\n" \
644 " pushl %es\n" \ 643 " pushl %es\n" \
644 " pushl %ds\n" \
645 " pushl %eax\n" \ 645 " pushl %eax\n" \
646 " pushl %ebp\n" \ 646 " pushl %ebp\n" \
647 " pushl %edi\n" \ 647 " pushl %edi\n" \
diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c
index 5ae5d2426edf..d86dbf7e54be 100644
--- a/arch/x86/kernel/mpparse.c
+++ b/arch/x86/kernel/mpparse.c
@@ -123,7 +123,7 @@ static void __init MP_ioapic_info(struct mpc_ioapic *m)
123 printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n", 123 printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n",
124 m->apicid, m->apicver, m->apicaddr); 124 m->apicid, m->apicver, m->apicaddr);
125 125
126 mp_register_ioapic(m->apicid, m->apicaddr, gsi_end + 1); 126 mp_register_ioapic(m->apicid, m->apicaddr, gsi_top);
127} 127}
128 128
129static void print_MP_intsrc_info(struct mpc_intsrc *m) 129static void print_MP_intsrc_info(struct mpc_intsrc *m)
diff --git a/arch/x86/kernel/mrst.c b/arch/x86/kernel/mrst.c
index e796448f0eb5..5915e0b33303 100644
--- a/arch/x86/kernel/mrst.c
+++ b/arch/x86/kernel/mrst.c
@@ -216,6 +216,12 @@ static void __init mrst_setup_boot_clock(void)
216 setup_boot_APIC_clock(); 216 setup_boot_APIC_clock();
217}; 217};
218 218
219/* MID systems don't have i8042 controller */
220static int mrst_i8042_detect(void)
221{
222 return 0;
223}
224
219/* 225/*
220 * Moorestown specific x86_init function overrides and early setup 226 * Moorestown specific x86_init function overrides and early setup
221 * calls. 227 * calls.
@@ -233,6 +239,7 @@ void __init x86_mrst_early_setup(void)
233 x86_cpuinit.setup_percpu_clockev = mrst_setup_secondary_clock; 239 x86_cpuinit.setup_percpu_clockev = mrst_setup_secondary_clock;
234 240
235 x86_platform.calibrate_tsc = mrst_calibrate_tsc; 241 x86_platform.calibrate_tsc = mrst_calibrate_tsc;
242 x86_platform.i8042_detect = mrst_i8042_detect;
236 x86_init.pci.init = pci_mrst_init; 243 x86_init.pci.init = pci_mrst_init;
237 x86_init.pci.fixup_irqs = x86_init_noop; 244 x86_init.pci.fixup_irqs = x86_init_noop;
238 245
diff --git a/arch/x86/kernel/pci-calgary_64.c b/arch/x86/kernel/pci-calgary_64.c
index fb99f7edb341..078d4ec1a9d9 100644
--- a/arch/x86/kernel/pci-calgary_64.c
+++ b/arch/x86/kernel/pci-calgary_64.c
@@ -103,11 +103,16 @@ int use_calgary __read_mostly = 0;
103#define PMR_SOFTSTOPFAULT 0x40000000 103#define PMR_SOFTSTOPFAULT 0x40000000
104#define PMR_HARDSTOP 0x20000000 104#define PMR_HARDSTOP 0x20000000
105 105
106#define MAX_NUM_OF_PHBS 8 /* how many PHBs in total? */ 106/*
107#define MAX_NUM_CHASSIS 8 /* max number of chassis */ 107 * The maximum PHB bus number.
108/* MAX_PHB_BUS_NUM is the maximal possible dev->bus->number */ 108 * x3950M2 (rare): 8 chassis, 48 PHBs per chassis = 384
109#define MAX_PHB_BUS_NUM (MAX_NUM_OF_PHBS * MAX_NUM_CHASSIS * 2) 109 * x3950M2: 4 chassis, 48 PHBs per chassis = 192
110#define PHBS_PER_CALGARY 4 110 * x3950 (PCIE): 8 chassis, 32 PHBs per chassis = 256
111 * x3950 (PCIX): 8 chassis, 16 PHBs per chassis = 128
112 */
113#define MAX_PHB_BUS_NUM 256
114
115#define PHBS_PER_CALGARY 4
111 116
112/* register offsets in Calgary's internal register space */ 117/* register offsets in Calgary's internal register space */
113static const unsigned long tar_offsets[] = { 118static const unsigned long tar_offsets[] = {
@@ -1051,8 +1056,6 @@ static int __init calgary_init_one(struct pci_dev *dev)
1051 struct iommu_table *tbl; 1056 struct iommu_table *tbl;
1052 int ret; 1057 int ret;
1053 1058
1054 BUG_ON(dev->bus->number >= MAX_PHB_BUS_NUM);
1055
1056 bbar = busno_to_bbar(dev->bus->number); 1059 bbar = busno_to_bbar(dev->bus->number);
1057 ret = calgary_setup_tar(dev, bbar); 1060 ret = calgary_setup_tar(dev, bbar);
1058 if (ret) 1061 if (ret)
diff --git a/arch/x86/kernel/quirks.c b/arch/x86/kernel/quirks.c
index e72d3fc6547d..939b9e98245f 100644
--- a/arch/x86/kernel/quirks.c
+++ b/arch/x86/kernel/quirks.c
@@ -498,15 +498,10 @@ void force_hpet_resume(void)
498 * See erratum #27 (Misinterpreted MSI Requests May Result in 498 * See erratum #27 (Misinterpreted MSI Requests May Result in
499 * Corrupted LPC DMA Data) in AMD Publication #46837, 499 * Corrupted LPC DMA Data) in AMD Publication #46837,
500 * "SB700 Family Product Errata", Rev. 1.0, March 2010. 500 * "SB700 Family Product Errata", Rev. 1.0, March 2010.
501 *
502 * Also force the read back of the CMP register in hpet_next_event()
503 * to work around the problem that the CMP register write seems to be
504 * delayed. See hpet_next_event() for details.
505 */ 501 */
506static void force_disable_hpet_msi(struct pci_dev *unused) 502static void force_disable_hpet_msi(struct pci_dev *unused)
507{ 503{
508 hpet_msi_disable = 1; 504 hpet_msi_disable = 1;
509 hpet_readback_cmp = 1;
510} 505}
511 506
512DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS, 507DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS,
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c
index 8e1aac86b50c..e3af342fe83a 100644
--- a/arch/x86/kernel/reboot.c
+++ b/arch/x86/kernel/reboot.c
@@ -228,6 +228,14 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = {
228 DMI_MATCH(DMI_PRODUCT_NAME, "Precision WorkStation T5400"), 228 DMI_MATCH(DMI_PRODUCT_NAME, "Precision WorkStation T5400"),
229 }, 229 },
230 }, 230 },
231 { /* Handle problems with rebooting on Dell T7400's */
232 .callback = set_bios_reboot,
233 .ident = "Dell Precision T7400",
234 .matches = {
235 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
236 DMI_MATCH(DMI_PRODUCT_NAME, "Precision WorkStation T7400"),
237 },
238 },
231 { /* Handle problems with rebooting on HP laptops */ 239 { /* Handle problems with rebooting on HP laptops */
232 .callback = set_bios_reboot, 240 .callback = set_bios_reboot,
233 .ident = "HP Compaq Laptop", 241 .ident = "HP Compaq Laptop",
diff --git a/arch/x86/kernel/setup_percpu.c b/arch/x86/kernel/setup_percpu.c
index de3b63ae3da2..a60df9ae6454 100644
--- a/arch/x86/kernel/setup_percpu.c
+++ b/arch/x86/kernel/setup_percpu.c
@@ -238,6 +238,15 @@ void __init setup_per_cpu_areas(void)
238#ifdef CONFIG_NUMA 238#ifdef CONFIG_NUMA
239 per_cpu(x86_cpu_to_node_map, cpu) = 239 per_cpu(x86_cpu_to_node_map, cpu) =
240 early_per_cpu_map(x86_cpu_to_node_map, cpu); 240 early_per_cpu_map(x86_cpu_to_node_map, cpu);
241 /*
242 * Ensure that the boot cpu numa_node is correct when the boot
243 * cpu is on a node that doesn't have memory installed.
244 * Also cpu_up() will call cpu_to_node() for APs when
245 * MEMORY_HOTPLUG is defined, before per_cpu(numa_node) is set
246 * up later with c_init aka intel_init/amd_init.
247 * So set them all (boot cpu and all APs).
248 */
249 set_cpu_numa_node(cpu, early_cpu_to_node(cpu));
241#endif 250#endif
242#endif 251#endif
243 /* 252 /*
@@ -257,14 +266,6 @@ void __init setup_per_cpu_areas(void)
257 early_per_cpu_ptr(x86_cpu_to_node_map) = NULL; 266 early_per_cpu_ptr(x86_cpu_to_node_map) = NULL;
258#endif 267#endif
259 268
260#if defined(CONFIG_X86_64) && defined(CONFIG_NUMA)
261 /*
262 * make sure boot cpu numa_node is right, when boot cpu is on the
263 * node that doesn't have mem installed
264 */
265 set_cpu_numa_node(boot_cpu_id, early_cpu_to_node(boot_cpu_id));
266#endif
267
268 /* Setup node to cpumask map */ 269 /* Setup node to cpumask map */
269 setup_node_to_cpumask_map(); 270 setup_node_to_cpumask_map();
270 271
diff --git a/arch/x86/kernel/sfi.c b/arch/x86/kernel/sfi.c
index 7ded57896c0a..cb22acf3ed09 100644
--- a/arch/x86/kernel/sfi.c
+++ b/arch/x86/kernel/sfi.c
@@ -93,7 +93,7 @@ static int __init sfi_parse_ioapic(struct sfi_table_header *table)
93 pentry = (struct sfi_apic_table_entry *)sb->pentry; 93 pentry = (struct sfi_apic_table_entry *)sb->pentry;
94 94
95 for (i = 0; i < num; i++) { 95 for (i = 0; i < num; i++) {
96 mp_register_ioapic(i, pentry->phys_addr, gsi_end + 1); 96 mp_register_ioapic(i, pentry->phys_addr, gsi_top);
97 pentry++; 97 pentry++;
98 } 98 }
99 99
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index 142d70c74b02..725ef4d17cd5 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -526,6 +526,7 @@ asmlinkage __kprobes struct pt_regs *sync_regs(struct pt_regs *eregs)
526dotraplinkage void __kprobes do_debug(struct pt_regs *regs, long error_code) 526dotraplinkage void __kprobes do_debug(struct pt_regs *regs, long error_code)
527{ 527{
528 struct task_struct *tsk = current; 528 struct task_struct *tsk = current;
529 int user_icebp = 0;
529 unsigned long dr6; 530 unsigned long dr6;
530 int si_code; 531 int si_code;
531 532
@@ -534,6 +535,14 @@ dotraplinkage void __kprobes do_debug(struct pt_regs *regs, long error_code)
534 /* Filter out all the reserved bits which are preset to 1 */ 535 /* Filter out all the reserved bits which are preset to 1 */
535 dr6 &= ~DR6_RESERVED; 536 dr6 &= ~DR6_RESERVED;
536 537
538 /*
539 * If dr6 has no reason to give us about the origin of this trap,
540 * then it's very likely the result of an icebp/int01 trap.
541 * User wants a sigtrap for that.
542 */
543 if (!dr6 && user_mode(regs))
544 user_icebp = 1;
545
537 /* Catch kmemcheck conditions first of all! */ 546 /* Catch kmemcheck conditions first of all! */
538 if ((dr6 & DR_STEP) && kmemcheck_trap(regs)) 547 if ((dr6 & DR_STEP) && kmemcheck_trap(regs))
539 return; 548 return;
@@ -575,7 +584,7 @@ dotraplinkage void __kprobes do_debug(struct pt_regs *regs, long error_code)
575 regs->flags &= ~X86_EFLAGS_TF; 584 regs->flags &= ~X86_EFLAGS_TF;
576 } 585 }
577 si_code = get_si_code(tsk->thread.debugreg6); 586 si_code = get_si_code(tsk->thread.debugreg6);
578 if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS)) 587 if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS) || user_icebp)
579 send_sigtrap(tsk, regs, error_code, si_code); 588 send_sigtrap(tsk, regs, error_code, si_code);
580 preempt_conditional_cli(regs); 589 preempt_conditional_cli(regs);
581 590
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
index 61a1e8c7e19f..cd6da6bf3eca 100644
--- a/arch/x86/kernel/x86_init.c
+++ b/arch/x86/kernel/x86_init.c
@@ -5,6 +5,7 @@
5 */ 5 */
6#include <linux/init.h> 6#include <linux/init.h>
7#include <linux/ioport.h> 7#include <linux/ioport.h>
8#include <linux/module.h>
8 9
9#include <asm/bios_ebda.h> 10#include <asm/bios_ebda.h>
10#include <asm/paravirt.h> 11#include <asm/paravirt.h>
@@ -85,6 +86,7 @@ struct x86_cpuinit_ops x86_cpuinit __cpuinitdata = {
85}; 86};
86 87
87static void default_nmi_init(void) { }; 88static void default_nmi_init(void) { };
89static int default_i8042_detect(void) { return 1; };
88 90
89struct x86_platform_ops x86_platform = { 91struct x86_platform_ops x86_platform = {
90 .calibrate_tsc = native_calibrate_tsc, 92 .calibrate_tsc = native_calibrate_tsc,
@@ -92,5 +94,8 @@ struct x86_platform_ops x86_platform = {
92 .set_wallclock = mach_set_rtc_mmss, 94 .set_wallclock = mach_set_rtc_mmss,
93 .iommu_shutdown = iommu_shutdown_noop, 95 .iommu_shutdown = iommu_shutdown_noop,
94 .is_untracked_pat_range = is_ISA_range, 96 .is_untracked_pat_range = is_ISA_range,
95 .nmi_init = default_nmi_init 97 .nmi_init = default_nmi_init,
98 .i8042_detect = default_i8042_detect
96}; 99};
100
101EXPORT_SYMBOL_GPL(x86_platform);
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index a6f695d76928..b1ed0a1a5913 100644
--- a/arch/x86/kvm/mmu.c
+++ b/arch/x86/kvm/mmu.c
@@ -1879,6 +1879,8 @@ static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1879 pgprintk("hfn old %lx new %lx\n", 1879 pgprintk("hfn old %lx new %lx\n",
1880 spte_to_pfn(*sptep), pfn); 1880 spte_to_pfn(*sptep), pfn);
1881 rmap_remove(vcpu->kvm, sptep); 1881 rmap_remove(vcpu->kvm, sptep);
1882 __set_spte(sptep, shadow_trap_nonpresent_pte);
1883 kvm_flush_remote_tlbs(vcpu->kvm);
1882 } else 1884 } else
1883 was_rmapped = 1; 1885 was_rmapped = 1;
1884 } 1886 }
@@ -2924,7 +2926,7 @@ static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm)
2924 return kvm_mmu_zap_page(kvm, page) + 1; 2926 return kvm_mmu_zap_page(kvm, page) + 1;
2925} 2927}
2926 2928
2927static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask) 2929static int mmu_shrink(struct shrinker *shrink, int nr_to_scan, gfp_t gfp_mask)
2928{ 2930{
2929 struct kvm *kvm; 2931 struct kvm *kvm;
2930 struct kvm *kvm_freed = NULL; 2932 struct kvm *kvm_freed = NULL;
diff --git a/arch/x86/kvm/paging_tmpl.h b/arch/x86/kvm/paging_tmpl.h
index 89d66ca4d87c..2331bdc2b549 100644
--- a/arch/x86/kvm/paging_tmpl.h
+++ b/arch/x86/kvm/paging_tmpl.h
@@ -342,6 +342,7 @@ static u64 *FNAME(fetch)(struct kvm_vcpu *vcpu, gva_t addr,
342 /* advance table_gfn when emulating 1gb pages with 4k */ 342 /* advance table_gfn when emulating 1gb pages with 4k */
343 if (delta == 0) 343 if (delta == 0)
344 table_gfn += PT_INDEX(addr, level); 344 table_gfn += PT_INDEX(addr, level);
345 access &= gw->pte_access;
345 } else { 346 } else {
346 direct = 0; 347 direct = 0;
347 table_gfn = gw->table_gfn[level - 2]; 348 table_gfn = gw->table_gfn[level - 2];
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 859a01a07dbf..ee03679efe78 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -1744,18 +1744,15 @@ static void enter_lmode(struct kvm_vcpu *vcpu)
1744 (guest_tr_ar & ~AR_TYPE_MASK) 1744 (guest_tr_ar & ~AR_TYPE_MASK)
1745 | AR_TYPE_BUSY_64_TSS); 1745 | AR_TYPE_BUSY_64_TSS);
1746 } 1746 }
1747 vcpu->arch.efer |= EFER_LMA; 1747 vmx_set_efer(vcpu, vcpu->arch.efer | EFER_LMA);
1748 vmx_set_efer(vcpu, vcpu->arch.efer);
1749} 1748}
1750 1749
1751static void exit_lmode(struct kvm_vcpu *vcpu) 1750static void exit_lmode(struct kvm_vcpu *vcpu)
1752{ 1751{
1753 vcpu->arch.efer &= ~EFER_LMA;
1754
1755 vmcs_write32(VM_ENTRY_CONTROLS, 1752 vmcs_write32(VM_ENTRY_CONTROLS,
1756 vmcs_read32(VM_ENTRY_CONTROLS) 1753 vmcs_read32(VM_ENTRY_CONTROLS)
1757 & ~VM_ENTRY_IA32E_MODE); 1754 & ~VM_ENTRY_IA32E_MODE);
1758 vmx_set_efer(vcpu, vcpu->arch.efer); 1755 vmx_set_efer(vcpu, vcpu->arch.efer & ~EFER_LMA);
1759} 1756}
1760 1757
1761#endif 1758#endif
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 05d571f6f196..7fa89c39c64f 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -1562,7 +1562,7 @@ static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1562 1562
1563 r = -ENOMEM; 1563 r = -ENOMEM;
1564 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs; 1564 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1565 entries = vmalloc(size); 1565 entries = kmalloc(size, GFP_KERNEL);
1566 if (!entries) 1566 if (!entries)
1567 goto out; 1567 goto out;
1568 1568
@@ -1581,7 +1581,7 @@ static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1581 r = n; 1581 r = n;
1582 1582
1583out_free: 1583out_free:
1584 vfree(entries); 1584 kfree(entries);
1585out: 1585out:
1586 return r; 1586 return r;
1587} 1587}
diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c
index acc15b23b743..64121a18b8cb 100644
--- a/arch/x86/mm/pat.c
+++ b/arch/x86/mm/pat.c
@@ -302,7 +302,7 @@ int reserve_memtype(u64 start, u64 end, unsigned long req_type,
302 return -EINVAL; 302 return -EINVAL;
303 } 303 }
304 304
305 new = kmalloc(sizeof(struct memtype), GFP_KERNEL); 305 new = kzalloc(sizeof(struct memtype), GFP_KERNEL);
306 if (!new) 306 if (!new)
307 return -ENOMEM; 307 return -ENOMEM;
308 308
diff --git a/arch/x86/mm/pat_rbtree.c b/arch/x86/mm/pat_rbtree.c
index f537087bb740..8acaddd0fb21 100644
--- a/arch/x86/mm/pat_rbtree.c
+++ b/arch/x86/mm/pat_rbtree.c
@@ -34,8 +34,7 @@
34 * memtype_lock protects the rbtree. 34 * memtype_lock protects the rbtree.
35 */ 35 */
36 36
37static void memtype_rb_augment_cb(struct rb_node *node); 37static struct rb_root memtype_rbroot = RB_ROOT;
38static struct rb_root memtype_rbroot = RB_AUGMENT_ROOT(&memtype_rb_augment_cb);
39 38
40static int is_node_overlap(struct memtype *node, u64 start, u64 end) 39static int is_node_overlap(struct memtype *node, u64 start, u64 end)
41{ 40{
@@ -56,7 +55,7 @@ static u64 get_subtree_max_end(struct rb_node *node)
56} 55}
57 56
58/* Update 'subtree_max_end' for a node, based on node and its children */ 57/* Update 'subtree_max_end' for a node, based on node and its children */
59static void update_node_max_end(struct rb_node *node) 58static void memtype_rb_augment_cb(struct rb_node *node, void *__unused)
60{ 59{
61 struct memtype *data; 60 struct memtype *data;
62 u64 max_end, child_max_end; 61 u64 max_end, child_max_end;
@@ -78,25 +77,6 @@ static void update_node_max_end(struct rb_node *node)
78 data->subtree_max_end = max_end; 77 data->subtree_max_end = max_end;
79} 78}
80 79
81/* Update 'subtree_max_end' for a node and all its ancestors */
82static void update_path_max_end(struct rb_node *node)
83{
84 u64 old_max_end, new_max_end;
85
86 while (node) {
87 struct memtype *data = container_of(node, struct memtype, rb);
88
89 old_max_end = data->subtree_max_end;
90 update_node_max_end(node);
91 new_max_end = data->subtree_max_end;
92
93 if (new_max_end == old_max_end)
94 break;
95
96 node = rb_parent(node);
97 }
98}
99
100/* Find the first (lowest start addr) overlapping range from rb tree */ 80/* Find the first (lowest start addr) overlapping range from rb tree */
101static struct memtype *memtype_rb_lowest_match(struct rb_root *root, 81static struct memtype *memtype_rb_lowest_match(struct rb_root *root,
102 u64 start, u64 end) 82 u64 start, u64 end)
@@ -190,12 +170,6 @@ failure:
190 return -EBUSY; 170 return -EBUSY;
191} 171}
192 172
193static void memtype_rb_augment_cb(struct rb_node *node)
194{
195 if (node)
196 update_path_max_end(node);
197}
198
199static void memtype_rb_insert(struct rb_root *root, struct memtype *newdata) 173static void memtype_rb_insert(struct rb_root *root, struct memtype *newdata)
200{ 174{
201 struct rb_node **node = &(root->rb_node); 175 struct rb_node **node = &(root->rb_node);
@@ -213,6 +187,7 @@ static void memtype_rb_insert(struct rb_root *root, struct memtype *newdata)
213 187
214 rb_link_node(&newdata->rb, parent, node); 188 rb_link_node(&newdata->rb, parent, node);
215 rb_insert_color(&newdata->rb, root); 189 rb_insert_color(&newdata->rb, root);
190 rb_augment_insert(&newdata->rb, memtype_rb_augment_cb, NULL);
216} 191}
217 192
218int rbt_memtype_check_insert(struct memtype *new, unsigned long *ret_type) 193int rbt_memtype_check_insert(struct memtype *new, unsigned long *ret_type)
@@ -226,6 +201,7 @@ int rbt_memtype_check_insert(struct memtype *new, unsigned long *ret_type)
226 if (ret_type) 201 if (ret_type)
227 new->type = *ret_type; 202 new->type = *ret_type;
228 203
204 new->subtree_max_end = new->end;
229 memtype_rb_insert(&memtype_rbroot, new); 205 memtype_rb_insert(&memtype_rbroot, new);
230 } 206 }
231 return err; 207 return err;
@@ -233,13 +209,16 @@ int rbt_memtype_check_insert(struct memtype *new, unsigned long *ret_type)
233 209
234struct memtype *rbt_memtype_erase(u64 start, u64 end) 210struct memtype *rbt_memtype_erase(u64 start, u64 end)
235{ 211{
212 struct rb_node *deepest;
236 struct memtype *data; 213 struct memtype *data;
237 214
238 data = memtype_rb_exact_match(&memtype_rbroot, start, end); 215 data = memtype_rb_exact_match(&memtype_rbroot, start, end);
239 if (!data) 216 if (!data)
240 goto out; 217 goto out;
241 218
219 deepest = rb_augment_erase_begin(&data->rb);
242 rb_erase(&data->rb, &memtype_rbroot); 220 rb_erase(&data->rb, &memtype_rbroot);
221 rb_augment_erase_end(deepest, memtype_rb_augment_cb, NULL);
243out: 222out:
244 return data; 223 return data;
245} 224}
diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c
index 6fdb3ec30c31..55253095be84 100644
--- a/arch/x86/pci/i386.c
+++ b/arch/x86/pci/i386.c
@@ -184,6 +184,7 @@ static void __init pcibios_allocate_resources(int pass)
184 idx, r, disabled, pass); 184 idx, r, disabled, pass);
185 if (pci_claim_resource(dev, idx) < 0) { 185 if (pci_claim_resource(dev, idx) < 0) {
186 /* We'll assign a new address later */ 186 /* We'll assign a new address later */
187 dev->fw_addr[idx] = r->start;
187 r->end -= r->start; 188 r->end -= r->start;
188 r->start = 0; 189 r->start = 0;
189 } 190 }
diff --git a/arch/x86/pci/mrst.c b/arch/x86/pci/mrst.c
index 7ef3a2735df3..cb29191cee58 100644
--- a/arch/x86/pci/mrst.c
+++ b/arch/x86/pci/mrst.c
@@ -66,8 +66,9 @@ static int fixed_bar_cap(struct pci_bus *bus, unsigned int devfn)
66 devfn, pos, 4, &pcie_cap)) 66 devfn, pos, 4, &pcie_cap))
67 return 0; 67 return 0;
68 68
69 if (pcie_cap == 0xffffffff) 69 if (PCI_EXT_CAP_ID(pcie_cap) == 0x0000 ||
70 return 0; 70 PCI_EXT_CAP_ID(pcie_cap) == 0xffff)
71 break;
71 72
72 if (PCI_EXT_CAP_ID(pcie_cap) == PCI_EXT_CAP_ID_VNDR) { 73 if (PCI_EXT_CAP_ID(pcie_cap) == PCI_EXT_CAP_ID_VNDR) {
73 raw_pci_ext_ops->read(pci_domain_nr(bus), bus->number, 74 raw_pci_ext_ops->read(pci_domain_nr(bus), bus->number,
@@ -76,7 +77,7 @@ static int fixed_bar_cap(struct pci_bus *bus, unsigned int devfn)
76 return pos; 77 return pos;
77 } 78 }
78 79
79 pos = pcie_cap >> 20; 80 pos = PCI_EXT_CAP_NEXT(pcie_cap);
80 } 81 }
81 82
82 return 0; 83 return 0;