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authorSuresh Siddha <suresh.b.siddha@intel.com>2011-05-18 19:31:35 -0400
committerIngo Molnar <mingo@elte.hu>2011-05-20 07:40:56 -0400
commitb69c6c3becc102f3eebc4ebba582abfe76be3f45 (patch)
tree3c31978e0dcdbe372208d6eaed691ab171f0ede3 /arch/x86
parent15bac20bd8a039e9acb274785be82772e1237eed (diff)
x86, ioapic: Add struct ioapic
Introduce struct ioapic with nr_registers field. This will pave way for consolidating different MAX_IO_APICS arrays into it. Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: daniel.blueman@gmail.com Link: http://lkml.kernel.org/r/20110518233157.744315519@sbsiddha-MOBL3.sc.intel.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/include/asm/io_apic.h1
-rw-r--r--arch/x86/kernel/apic/io_apic.c32
2 files changed, 17 insertions, 16 deletions
diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index f46984e45094..147700a3f56c 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -105,7 +105,6 @@ struct IR_IO_APIC_route_entry {
105 * # of IO-APICs and # of IRQ routing registers 105 * # of IO-APICs and # of IRQ routing registers
106 */ 106 */
107extern int nr_ioapics; 107extern int nr_ioapics;
108extern int nr_ioapic_registers[MAX_IO_APICS];
109 108
110#define MP_MAX_IOAPIC_PIN 127 109#define MP_MAX_IOAPIC_PIN 127
111 110
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 4fc544dcf7f1..2a18a98a3b04 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -76,10 +76,12 @@ int sis_apic_bug = -1;
76static DEFINE_RAW_SPINLOCK(ioapic_lock); 76static DEFINE_RAW_SPINLOCK(ioapic_lock);
77static DEFINE_RAW_SPINLOCK(vector_lock); 77static DEFINE_RAW_SPINLOCK(vector_lock);
78 78
79/* 79static struct ioapic {
80 * # of IRQ routing registers 80 /*
81 */ 81 * # of IRQ routing registers
82int nr_ioapic_registers[MAX_IO_APICS]; 82 */
83 int nr_registers;
84} ioapics[MAX_IO_APICS];
83 85
84/* I/O APIC entries */ 86/* I/O APIC entries */
85struct mpc_ioapic mp_ioapics[MAX_IO_APICS]; 87struct mpc_ioapic mp_ioapics[MAX_IO_APICS];
@@ -187,7 +189,7 @@ int __init arch_early_irq_init(void)
187 for (i = 0; i < nr_ioapics; i++) { 189 for (i = 0; i < nr_ioapics; i++) {
188 ioapic_saved_data[i] = 190 ioapic_saved_data[i] =
189 kzalloc(sizeof(struct IO_APIC_route_entry) * 191 kzalloc(sizeof(struct IO_APIC_route_entry) *
190 nr_ioapic_registers[i], GFP_KERNEL); 192 ioapics[i].nr_registers, GFP_KERNEL);
191 if (!ioapic_saved_data[i]) 193 if (!ioapic_saved_data[i])
192 pr_err("IOAPIC %d: suspend/resume impossible!\n", i); 194 pr_err("IOAPIC %d: suspend/resume impossible!\n", i);
193 } 195 }
@@ -586,7 +588,7 @@ static void clear_IO_APIC (void)
586 int apic, pin; 588 int apic, pin;
587 589
588 for (apic = 0; apic < nr_ioapics; apic++) 590 for (apic = 0; apic < nr_ioapics; apic++)
589 for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) 591 for (pin = 0; pin < ioapics[apic].nr_registers; pin++)
590 clear_IO_APIC_pin(apic, pin); 592 clear_IO_APIC_pin(apic, pin);
591} 593}
592 594
@@ -642,7 +644,7 @@ int save_ioapic_entries(void)
642 continue; 644 continue;
643 } 645 }
644 646
645 for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) 647 for (pin = 0; pin < ioapics[apic].nr_registers; pin++)
646 ioapic_saved_data[apic][pin] = 648 ioapic_saved_data[apic][pin] =
647 ioapic_read_entry(apic, pin); 649 ioapic_read_entry(apic, pin);
648 } 650 }
@@ -661,7 +663,7 @@ void mask_ioapic_entries(void)
661 if (!ioapic_saved_data[apic]) 663 if (!ioapic_saved_data[apic])
662 continue; 664 continue;
663 665
664 for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) { 666 for (pin = 0; pin < ioapics[apic].nr_registers; pin++) {
665 struct IO_APIC_route_entry entry; 667 struct IO_APIC_route_entry entry;
666 668
667 entry = ioapic_saved_data[apic][pin]; 669 entry = ioapic_saved_data[apic][pin];
@@ -684,7 +686,7 @@ int restore_ioapic_entries(void)
684 if (!ioapic_saved_data[apic]) 686 if (!ioapic_saved_data[apic])
685 continue; 687 continue;
686 688
687 for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) 689 for (pin = 0; pin < ioapics[apic].nr_registers; pin++)
688 ioapic_write_entry(apic, pin, 690 ioapic_write_entry(apic, pin,
689 ioapic_saved_data[apic][pin]); 691 ioapic_saved_data[apic][pin]);
690 } 692 }
@@ -1191,7 +1193,7 @@ static inline int IO_APIC_irq_trigger(int irq)
1191 int apic, idx, pin; 1193 int apic, idx, pin;
1192 1194
1193 for (apic = 0; apic < nr_ioapics; apic++) { 1195 for (apic = 0; apic < nr_ioapics; apic++) {
1194 for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) { 1196 for (pin = 0; pin < ioapics[apic].nr_registers; pin++) {
1195 idx = find_irq_entry(apic, pin, mp_INT); 1197 idx = find_irq_entry(apic, pin, mp_INT);
1196 if ((idx != -1) && (irq == pin_2_irq(idx, apic, pin))) 1198 if ((idx != -1) && (irq == pin_2_irq(idx, apic, pin)))
1197 return irq_trigger(idx); 1199 return irq_trigger(idx);
@@ -1358,7 +1360,7 @@ static void __init __io_apic_setup_irqs(unsigned int apic_id)
1358 struct io_apic_irq_attr attr; 1360 struct io_apic_irq_attr attr;
1359 unsigned int pin, irq; 1361 unsigned int pin, irq;
1360 1362
1361 for (pin = 0; pin < nr_ioapic_registers[apic_id]; pin++) { 1363 for (pin = 0; pin < ioapics[apic_id].nr_registers; pin++) {
1362 idx = find_irq_entry(apic_id, pin, mp_INT); 1364 idx = find_irq_entry(apic_id, pin, mp_INT);
1363 if (io_apic_pin_not_connected(idx, apic_id, pin)) 1365 if (io_apic_pin_not_connected(idx, apic_id, pin))
1364 continue; 1366 continue;
@@ -1480,7 +1482,7 @@ __apicdebuginit(void) print_IO_APIC(void)
1480 printk(KERN_DEBUG "number of MP IRQ sources: %d.\n", mp_irq_entries); 1482 printk(KERN_DEBUG "number of MP IRQ sources: %d.\n", mp_irq_entries);
1481 for (i = 0; i < nr_ioapics; i++) 1483 for (i = 0; i < nr_ioapics; i++)
1482 printk(KERN_DEBUG "number of IO-APIC #%d registers: %d.\n", 1484 printk(KERN_DEBUG "number of IO-APIC #%d registers: %d.\n",
1483 mp_ioapics[i].apicid, nr_ioapic_registers[i]); 1485 mp_ioapics[i].apicid, ioapics[i].nr_registers);
1484 1486
1485 /* 1487 /*
1486 * We are a bit conservative about what we expect. We have to 1488 * We are a bit conservative about what we expect. We have to
@@ -1794,7 +1796,7 @@ void __init enable_IO_APIC(void)
1794 for(apic = 0; apic < nr_ioapics; apic++) { 1796 for(apic = 0; apic < nr_ioapics; apic++) {
1795 int pin; 1797 int pin;
1796 /* See if any of the pins is in ExtINT mode */ 1798 /* See if any of the pins is in ExtINT mode */
1797 for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) { 1799 for (pin = 0; pin < ioapics[apic].nr_registers; pin++) {
1798 struct IO_APIC_route_entry entry; 1800 struct IO_APIC_route_entry entry;
1799 entry = ioapic_read_entry(apic, pin); 1801 entry = ioapic_read_entry(apic, pin);
1800 1802
@@ -3754,7 +3756,7 @@ void __init setup_ioapic_dest(void)
3754 return; 3756 return;
3755 3757
3756 for (ioapic = 0; ioapic < nr_ioapics; ioapic++) 3758 for (ioapic = 0; ioapic < nr_ioapics; ioapic++)
3757 for (pin = 0; pin < nr_ioapic_registers[ioapic]; pin++) { 3759 for (pin = 0; pin < ioapics[ioapic].nr_registers; pin++) {
3758 irq_entry = find_irq_entry(ioapic, pin, mp_INT); 3760 irq_entry = find_irq_entry(ioapic, pin, mp_INT);
3759 if (irq_entry == -1) 3761 if (irq_entry == -1)
3760 continue; 3762 continue;
@@ -3948,7 +3950,7 @@ void __init mp_register_ioapic(int id, u32 address, u32 gsi_base)
3948 /* 3950 /*
3949 * The number of IO-APIC IRQ registers (== #pins): 3951 * The number of IO-APIC IRQ registers (== #pins):
3950 */ 3952 */
3951 nr_ioapic_registers[idx] = entries; 3953 ioapics[idx].nr_registers = entries;
3952 3954
3953 if (mp_gsi_routing[idx].gsi_end >= gsi_top) 3955 if (mp_gsi_routing[idx].gsi_end >= gsi_top)
3954 gsi_top = mp_gsi_routing[idx].gsi_end + 1; 3956 gsi_top = mp_gsi_routing[idx].gsi_end + 1;